From 4e2a5258a5b16e670fa46eb3b0fa677bf456cf9b Mon Sep 17 00:00:00 2001 From: kntran1 <61509560+kntran1@users.noreply.github.com> Date: Mon, 23 Mar 2026 14:40:39 -0500 Subject: [PATCH] Initial commit Initial commit. --- CMakeLists.txt | 57 + Kconfig | 13 + VERSION | 5 + .../cyber_nrf52840/Kconfig.cyber_nrf52840 | 2 + boards/MAPS/cyber_nrf52840/Kconfig.defconfig | 6 + boards/MAPS/cyber_nrf52840/board.cmake | 9 + boards/MAPS/cyber_nrf52840/board.yml | 5 + .../cyber_nrf52840-pinctrl.dtsi | 123 + boards/MAPS/cyber_nrf52840/cyber_nrf52840.dts | 243 + boards/MAPS/cyber_nrf52840/cyber_nrf52840.yml | 11 + .../cyber_nrf52840/cyber_nrf52840_defconfig | 12 + boards/MAPS/cyber_nrf52840/pre_dt_board.cmake | 2 + bootloader/mcuboot/.gitignore | 30 + bootloader/mcuboot/.gitmodules | 21 + bootloader/mcuboot/.mbedignore | 20 + bootloader/mcuboot/.travis.yml-disabled | 81 + bootloader/mcuboot/CODE_OF_CONDUCT.md | 134 + bootloader/mcuboot/Cargo.lock | 542 + bootloader/mcuboot/Cargo.toml | 14 + bootloader/mcuboot/LICENSE | 206 + bootloader/mcuboot/NOTICE | 11 + bootloader/mcuboot/README.md | 85 + .../include/boot_serial/boot_serial.h | 59 + .../boot_serial/boot_serial_encryption.h | 32 + bootloader/mcuboot/boot/boot_serial/pkg.yml | 38 + .../boot/boot_serial/src/boot_serial.c | 1498 ++ .../boot_serial/src/boot_serial_encryption.c | 308 + .../boot/boot_serial/src/boot_serial_priv.h | 106 + .../mcuboot/boot/boot_serial/src/zcbor_bulk.c | 69 + .../mcuboot/boot/boot_serial/src/zcbor_bulk.h | 116 + .../mcuboot/boot/boot_serial/syscfg.yml | 96 + .../mcuboot/boot/boot_serial/test/pkg.yml | 35 + .../boot/boot_serial/test/src/boot_test.c | 85 + .../boot/boot_serial/test/src/boot_test.h | 50 + .../src/testcases/boot_serial_empty_img_msg.c | 35 + .../src/testcases/boot_serial_empty_msg.c | 37 + .../test/src/testcases/boot_serial_img_msg.c | 70 + .../test/src/testcases/boot_serial_setup.c | 24 + .../boot_serial_upload_bigger_image.c | 117 + .../mcuboot/boot/boot_serial/test/syscfg.yml | 23 + .../mcuboot/boot/bootutil/CMakeLists.txt | 35 + .../boot/bootutil/include/bootutil/bench.h | 68 + .../bootutil/include/bootutil/boot_hooks.h | 181 + .../include/bootutil/boot_public_hooks.h | 52 + .../bootutil/include/bootutil/boot_record.h | 89 + .../bootutil/include/bootutil/boot_status.h | 188 + .../boot/bootutil/include/bootutil/bootutil.h | 104 + .../bootutil/include/bootutil/bootutil_log.h | 59 + .../include/bootutil/bootutil_public.h | 316 + .../bootutil/include/bootutil/bootutil_test.h | 35 + .../boot/bootutil/include/bootutil/caps.h | 67 + .../include/bootutil/crypto/aes_ctr.h | 158 + .../bootutil/include/bootutil/crypto/aes_kw.h | 142 + .../bootutil/include/bootutil/crypto/common.h | 29 + .../include/bootutil/crypto/ecdh_p256.h | 154 + .../include/bootutil/crypto/ecdh_x25519.h | 57 + .../bootutil/include/bootutil/crypto/ecdsa.h | 672 + .../include/bootutil/crypto/hmac_sha256.h | 134 + .../bootutil/include/bootutil/crypto/rsa.h | 356 + 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src/app/app.h create mode 100644 src/app/app_cli.c create mode 100644 src/app/app_cli.h create mode 100644 src/app/ble.c create mode 100644 src/app/ble.h create mode 100644 src/app/bubble.c create mode 100644 src/app/bubble.h create mode 100644 src/app/event.c create mode 100644 src/app/event.h create mode 100644 src/app/fiber.c create mode 100644 src/app/fiber.h create mode 100644 src/app/fsm.c create mode 100644 src/app/fsm.h create mode 100644 src/app/light_sensor.c create mode 100644 src/app/light_sensor.h create mode 100644 src/app/log.c create mode 100644 src/app/log.h create mode 100644 src/app/motion.c create mode 100644 src/app/motion.h create mode 100644 src/app/pin.c create mode 100644 src/app/pin.h create mode 100644 src/app/scope_ring.c create mode 100644 src/app/scope_ring.h create mode 100644 src/app/shot_capture.c create mode 100644 src/app/shot_capture.h create mode 100644 src/app/shot_storage.c create mode 100644 src/app/shot_storage.h create mode 100644 src/app/uuid.h create mode 100644 src/app/uuid_base.h create mode 100644 src/bsp/als.c create mode 100644 src/bsp/als.h create mode 100644 src/bsp/battery.c create mode 100644 src/bsp/battery.h create mode 100644 src/bsp/button.c create mode 100644 src/bsp/button.h create mode 100644 src/bsp/imu.c create mode 100644 src/bsp/imu.h create mode 100644 src/bsp/imu_reg.h create mode 100644 src/bsp/led.c create mode 100644 src/bsp/led.h create mode 100644 src/bsp/led_ring.c create mode 100644 src/bsp/led_ring.h create mode 100644 src/bsp/mcu.c create mode 100644 src/bsp/mcu.h create mode 100644 src/bsp/nvm_ext.c create mode 100644 src/bsp/nvm_ext.h create mode 100644 src/bsp/power.c create mode 100644 src/bsp/power.h create mode 100644 src/bsp/rtc.c create mode 100644 src/bsp/rtc.h create mode 100644 src/bsp/wdt.c create mode 100644 src/bsp/wdt.h create mode 100644 src/lib/cli.c create mode 100644 src/lib/cli.h create mode 100644 src/lib/crc.c create mode 100644 src/lib/crc.h create mode 100644 src/lib/debug.c create mode 100644 src/lib/debug.h create mode 100644 src/lib/errno.c create mode 100644 src/lib/errno.h create mode 100644 src/lib/fs.c create mode 100644 src/lib/fs.h create mode 100644 src/lib/gamma.c create mode 100644 src/lib/gamma.h create mode 100644 src/lib/print.c create mode 100644 src/lib/print.h create mode 100644 src/lib/rgb.c create mode 100644 src/lib/rgb.h create mode 100644 src/lib/virtual_led_ring.c create mode 100644 src/lib/virtual_led_ring.h create mode 100644 src/main.c create mode 100644 src/wrappers/adc.c create mode 100644 src/wrappers/adc.h create mode 100644 src/wrappers/gpio - Copy.c create mode 100644 src/wrappers/gpio - Copy.h create mode 100644 src/wrappers/gpio.c create mode 100644 src/wrappers/gpio.h create mode 100644 src/wrappers/i2c.c create mode 100644 src/wrappers/i2c.h create mode 100644 src/wrappers/pwm.c create mode 100644 src/wrappers/pwm.h create mode 100644 src/wrappers/spi.c create mode 100644 src/wrappers/spi.h create mode 100644 src/wrappers/uart.c create mode 100644 src/wrappers/uart.h create mode 100644 sysbuild.conf create mode 100644 sysbuild/mcuboot.conf diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 0000000..c1b098d --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,57 @@ +cmake_minimum_required(VERSION 3.20.0) +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) + +project(cyber_scope) + +target_sources(app PRIVATE src/main.c) + +# APP +target_sources(app PRIVATE src/main.c) +target_sources(app PRIVATE src/app/app_cli.c) +target_sources(app PRIVATE src/app/app.c) +target_sources(app PRIVATE src/app/ble.c) +target_sources(app PRIVATE src/app/bubble.c) +target_sources(app PRIVATE src/app/fiber.c) +target_sources(app PRIVATE src/app/fsm.c) +target_sources(app PRIVATE src/app/event.c) +target_sources(app PRIVATE src/app/light_sensor.c) +target_sources(app PRIVATE src/app/motion.c) +target_sources(app PRIVATE src/app/pin.c) +target_sources(app PRIVATE src/app/scope_ring.c) +target_sources(app PRIVATE src/app/shot_storage.c) +target_sources(app PRIVATE src/app/shot_capture.c) + +# BSP +target_sources(app PRIVATE src/bsp/als.c) +target_sources(app PRIVATE src/bsp/battery.c) +target_sources(app PRIVATE src/bsp/button.c) +target_sources(app PRIVATE src/bsp/imu.h) +target_sources(app PRIVATE src/bsp/imu.c) +target_sources(app PRIVATE src/bsp/led_ring.c) +target_sources(app PRIVATE src/bsp/led.c) +target_sources(app PRIVATE src/bsp/mcu.c) +target_sources(app PRIVATE src/bsp/nvm_ext.c) +target_sources(app PRIVATE src/bsp/power.c) +target_sources(app PRIVATE src/bsp/rtc.c) +target_sources(app PRIVATE src/bsp/wdt.c) + +# LIB +target_sources(app PRIVATE src/lib/cli.c) +target_sources(app PRIVATE src/lib/crc.c) +if(CONFIG_DBG_STATS) + target_sources(app PRIVATE src/lib/debug.c) +endif() +target_sources(app PRIVATE src/lib/errno.c) +target_sources(app PRIVATE src/lib/fs.c) +target_sources(app PRIVATE src/lib/gamma.c) +target_sources(app PRIVATE src/lib/print.c) +target_sources(app PRIVATE src/lib/rgb.c) +target_sources(app PRIVATE src/lib/virtual_led_ring.c) + +# WRAPPERS +target_sources(app PRIVATE src/wrappers/adc.c) +target_sources(app PRIVATE src/wrappers/gpio.c) +target_sources(app PRIVATE src/wrappers/i2c.c) +target_sources(app PRIVATE src/wrappers/pwm.c) +target_sources(app PRIVATE src/wrappers/spi.c) +target_sources(app PRIVATE src/wrappers/uart.c) diff --git a/Kconfig b/Kconfig new file mode 100644 index 0000000..8ddcaa8 --- /dev/null +++ b/Kconfig @@ -0,0 +1,13 @@ +# Copyright (C) Morgan Advanced Programmable Systems, Inc. + +mainmenu "Cyber Scope Application" + +config DBG_STATS + bool "Enable debug statistics" + default n + help + Enable debug statistics variables for development and debugging. + When enabled, counters for I2C transfers, FIFO reads, shot captures, + etc. are tracked. When disabled, no code or RAM is used. + +source "Kconfig.zephyr" diff --git a/VERSION b/VERSION new file mode 100644 index 0000000..9d8c17b --- /dev/null +++ b/VERSION @@ -0,0 +1,5 @@ +VERSION_MAJOR = 0 +VERSION_MINOR = 0 +PATCHLEVEL = 0 +VERSION_TWEAK = 0 +EXTRAVERSION = 0 \ No newline at end of file diff --git a/boards/MAPS/cyber_nrf52840/Kconfig.cyber_nrf52840 b/boards/MAPS/cyber_nrf52840/Kconfig.cyber_nrf52840 new file mode 100644 index 0000000..927aceb --- /dev/null +++ b/boards/MAPS/cyber_nrf52840/Kconfig.cyber_nrf52840 @@ -0,0 +1,2 @@ +config BOARD_CYBER_NRF52840 + select SOC_NRF52840_QIAA diff --git a/boards/MAPS/cyber_nrf52840/Kconfig.defconfig b/boards/MAPS/cyber_nrf52840/Kconfig.defconfig new file mode 100644 index 0000000..c60e44b --- /dev/null +++ b/boards/MAPS/cyber_nrf52840/Kconfig.defconfig @@ -0,0 +1,6 @@ +if BOARD_CYBER_NRF52840 + +config BT_CTLR + default BT + +endif # BOARD_CYBER_NRF52840 \ No newline at end of file diff --git a/boards/MAPS/cyber_nrf52840/board.cmake b/boards/MAPS/cyber_nrf52840/board.cmake new file mode 100644 index 0000000..4a36350 --- /dev/null +++ b/boards/MAPS/cyber_nrf52840/board.cmake @@ -0,0 +1,9 @@ +board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000") +board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000") + +set(OPENOCD_NRF5_SUBFAMILY "nrf52") +include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) +include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) \ No newline at end of file diff --git a/boards/MAPS/cyber_nrf52840/board.yml b/boards/MAPS/cyber_nrf52840/board.yml new file mode 100644 index 0000000..4540f01 --- /dev/null +++ b/boards/MAPS/cyber_nrf52840/board.yml @@ -0,0 +1,5 @@ +board: + name: cyber_nrf52840 + vendor: MAPS + socs: + - name: nrf52840 \ No newline at end of file diff --git a/boards/MAPS/cyber_nrf52840/cyber_nrf52840-pinctrl.dtsi b/boards/MAPS/cyber_nrf52840/cyber_nrf52840-pinctrl.dtsi new file mode 100644 index 0000000..55335a4 --- /dev/null +++ b/boards/MAPS/cyber_nrf52840/cyber_nrf52840-pinctrl.dtsi @@ -0,0 +1,123 @@ +&pinctrl { + i2c0_default: i2c0_default { + group1 { + psels = , + ; + }; + }; + + i2c0_sleep: i2c0_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; + + i2c1_default: i2c1_default { + group1 { + psels = , + ; + }; + }; + + i2c1_sleep: i2c1_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; + + i2s0_default: i2s0_default { + group1 { + /* Using i2s SDOUT to drive LED ring. SCK and LRCK not needed but Zephyr driver will not + * drive SDOUT without them. Workaround : Burn up 2 unused GPIO for SCK and LRCK. + */ + psels = , + , + ; + }; + }; + + i2s0_sleep: i2s0_sleep { + group1 { + psels = , + , + ; + low-power-enable; + }; + }; + + pwm0_default: pwm0_default { + group1 { + psels = , + , + ; + }; + }; + + pwm0_sleep: pwm0_sleep { + group1 { + psels = , + , + ; + low-power-enable; + }; + }; + + qspi_default: qspi_default { + group1 { + psels = , + , + , + , + , + ; + }; + }; + + qspi_sleep: qspi_sleep { + group1 { + psels = , + , + , + , + , + ; + low-power-enable; + }; + }; + + spi2_default: spi2_default { + group1 { + psels = , + , + ; + }; + }; + + spi2_sleep: spi2_sleep { + group1 { + psels = , + , + ; + low-power-enable; + }; + }; + + uart0_default: uart0_default { + group1 { + psels = , + ; + }; + }; + + uart0_sleep: uart0_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; +}; diff --git a/boards/MAPS/cyber_nrf52840/cyber_nrf52840.dts b/boards/MAPS/cyber_nrf52840/cyber_nrf52840.dts new file mode 100644 index 0000000..c0094bf --- /dev/null +++ b/boards/MAPS/cyber_nrf52840/cyber_nrf52840.dts @@ -0,0 +1,243 @@ +/dts-v1/; +#include +#include "cyber_nrf52840-pinctrl.dtsi" +/* For use with WS2812 LEDs. */ +#include + +/ { + model = "MAPS - Cyber NRF52840 Board"; + compatible = "MAPS,cyber-nrf52840"; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,console = &uart0; + }; + + zephyr,user { + io-channels = <&adc 0>; + }; + + aliases { + mcuboot-led = &mcuboot_led; + left-button = &left_button; + center-button = ¢er_button; + right-button = &right_button; + pwr-5v-enable = &pwr_5v_enable; + led-ring-pwr = &led_ring_pwr; + led-ring-level-shift-enable = &led_ring_level_shift_enable; + led-ring-din = &led_ring_din; + battery-check-enable = &battery_check_enable; + imu-int = &imu_int; + + + bubble-led = &bubble_led; + pin-led = &pin_led; + fiber-led = &fiber_led; + + led-ring = &led_ring; + + watchdog0 = &wdt0; + + // spi-flash0 = &mx25r64; + // bootloader-led0 = &bubble_led; + // mcuboot-button0 = ¢er_button; + // mcuboot-led0 = &bubble_led; + }; + + // GPIO enable assumes true is whatever the logic level is set to. Set everything to active high here so we can control in code. + gpios { + compatible = "gpio-keys"; + mcuboot_led: mcuboot_led { + gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + }; + left_button: left_button { + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + }; + center_button: center_button { + gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + }; + right_button: right_button { + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + }; + pwr_5v_enable: pwr_5v_enable { + gpios = <&gpio0 12 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>; + }; + led_ring_pwr: led_ring_pwr { + gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + }; + led_ring_level_shift_enable: led_ring_level_shift_enable { + gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; + }; + led_ring_din: led_ring_din { + gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; + }; + battery_check_enable: battery_check_enable { + gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + }; + imu_int: imu_int { + gpios = <&gpio0 11 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>; + }; + charger_status: charger_status { + gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; + }; + + }; + + pwmleds: pwmleds { + compatible = "pwm-leds"; + + bubble_led: bubble_led { + pwms = <&pwm0 0 PWM_USEC(4000) PWM_POLARITY_NORMAL>; + }; + + pin_led: pin_led { + pwms = <&pwm0 1 PWM_USEC(4000) PWM_POLARITY_NORMAL>; + }; + + fiber_led: fiber_led { + pwms = <&pwm0 2 PWM_USEC(4000) PWM_POLARITY_NORMAL>; + }; + }; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(48)>; + }; + + slot0_partition: partition@c000 { + label = "image-0"; + reg = <0x0000c000 DT_SIZE_K(472)>; + }; + + slot1_partition: partition@82000 { + label = "image-1"; + reg = <0x00082000 DT_SIZE_K(472)>; + }; + + storage_partition: partition@f8000 { + label = "storage"; + reg = <0x000f8000 DT_SIZE_K(32)>; + }; + }; +}; + +&uicr { + /* Pins P0.09 and P0.10 are defaulted to be used with NFC, need to configure for standard GPIO + * https://devzone.nordicsemi.com/f/nordic-q-a/35505/nrf52-enabling-gpio-on-nfc-pins + */ + nfct-pins-as-gpios; +}; + +&adc { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1_6"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P0.02 */ + zephyr,resolution = <12>; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpiote { + status = "okay"; +}; + +&i2c0 { + compatible = "nordic,nrf-twi"; + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-1 = <&i2c0_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&i2c1 { + compatible = "nordic,nrf-twim"; + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c1_default>; + pinctrl-1 = <&i2c1_sleep>; + pinctrl-names = "default", "sleep"; +}; + +i2s_led: &i2s0 { + status = "okay"; + pinctrl-0 = <&i2s0_default>; + pinctrl-1 = <&i2s0_sleep>; + pinctrl-names = "default", "sleep"; + + led_ring: ws2812 { + compatible = "worldsemi,ws2812-i2s"; + + i2s-dev = < &i2s_led >; + chain-length = <24>; + color-mapping = ; + // out-active-low; + reset-delay = <120>; + }; +}; + +&spi2 { + compatible = "nordic,nrf-spim"; + status = "okay"; + pinctrl-0 = <&spi2_default>; + pinctrl-1 = <&spi2_sleep>; + pinctrl-names = "default", "sleep"; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; +}; + +&uart0 { + status = "okay"; + pinctrl-0 = <&uart0_default>; + pinctrl-1 = <&uart0_sleep>; + pinctrl-names = "default", "sleep"; + current-speed = <115200>; +}; + +&pwm0 { + status = "okay"; + pinctrl-0 = <&pwm0_default>; + pinctrl-1 = <&pwm0_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&qspi { + status = "disabled"; + pinctrl-0 = <&qspi_default>; + pinctrl-1 = <&qspi_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&rtc2 { + status = "okay"; + clock-frequency = <32768>; + prescaler = <4095>; /* +1 for prescaler */ +}; + +&wdt0 { + status = "okay"; +}; diff --git a/boards/MAPS/cyber_nrf52840/cyber_nrf52840.yml b/boards/MAPS/cyber_nrf52840/cyber_nrf52840.yml new file mode 100644 index 0000000..2fa0bfe --- /dev/null +++ b/boards/MAPS/cyber_nrf52840/cyber_nrf52840.yml @@ -0,0 +1,11 @@ +identifier: cyber_nrf52840/nrf52840 +name: Custom Board auto generated by nRF Connect for VS Code +vendor: MAPS +type: mcu +arch: arm +ram: 256 +flash: 1024 +toolchain: + - zephyr +supported: + - gpio \ No newline at end of file diff --git a/boards/MAPS/cyber_nrf52840/cyber_nrf52840_defconfig b/boards/MAPS/cyber_nrf52840/cyber_nrf52840_defconfig new file mode 100644 index 0000000..5170518 --- /dev/null +++ b/boards/MAPS/cyber_nrf52840/cyber_nrf52840_defconfig @@ -0,0 +1,12 @@ +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable uart driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/MAPS/cyber_nrf52840/pre_dt_board.cmake b/boards/MAPS/cyber_nrf52840/pre_dt_board.cmake new file mode 100644 index 0000000..519d784 --- /dev/null +++ b/boards/MAPS/cyber_nrf52840/pre_dt_board.cmake @@ -0,0 +1,2 @@ +# Suppress "unique_unit_address_if_enabled" to handle some overlaps +list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled") diff --git a/bootloader/mcuboot/.gitignore b/bootloader/mcuboot/.gitignore new file mode 100644 index 0000000..7986688 --- /dev/null +++ b/bootloader/mcuboot/.gitignore @@ -0,0 +1,30 @@ +outdir/ +.*.swp +target.sh +*.pyc +tags +rusty-tags.* + +# mynewt +/repos/ +/project.state +/bin/ +/targets/ +**/build/**/* + +#Eclipse project files +.cproject +.project + +# Compiled python modules. +*.pyc + +# Setuptools distribution folder. +/scripts/dist/ + +# Python egg metadata, regenerated from source files by setuptools. +/scripts/*.egg-info +/scripts/*.egg + +# The target directory from Rust development +/target/ diff --git a/bootloader/mcuboot/.gitmodules b/bootloader/mcuboot/.gitmodules new file mode 100644 index 0000000..37919b0 --- /dev/null +++ b/bootloader/mcuboot/.gitmodules @@ -0,0 +1,21 @@ +[submodule "sim/mbedtls"] + path = ext/mbedtls + url = https://github.com/ARMmbed/mbedtls +[submodule "boot/cypress/libs/mtb-pdl-cat1"] + path = boot/cypress/libs/mtb-pdl-cat1 + url = https://github.com/cypresssemiconductorco/mtb-pdl-cat1.git +[submodule "boot/cypress/libs/pdl/psoc6pdl"] + path = boot/cypress/libs/pdl/psoc6pdl + url = https://github.com/cypresssemiconductorco/psoc6pdl.git +[submodule "boot/cypress/libs/retarget-io"] + path = boot/cypress/libs/retarget-io + url = https://github.com/cypresssemiconductorco/retarget-io.git +[submodule "boot/cypress/libs/core-lib"] + path = boot/cypress/libs/core-lib + url = https://github.com/cypresssemiconductorco/core-lib.git +[submodule "boot/cypress/libs/psoc6hal"] + path = boot/cypress/libs/psoc6hal + url = https://github.com/cypresssemiconductorco/psoc6hal.git +[submodule "boot/cypress/libs/cy-mbedtls-acceleration"] + path = boot/cypress/libs/cy-mbedtls-acceleration + url = https://github.com/cypresssemiconductorco/cy-mbedtls-acceleration.git diff --git a/bootloader/mcuboot/.mbedignore b/bootloader/mcuboot/.mbedignore new file mode 100644 index 0000000..5dd4ea2 --- /dev/null +++ b/bootloader/mcuboot/.mbedignore @@ -0,0 +1,20 @@ +boot/boot_serial/* +boot/mynewt/* +boot/zephyr/* +boot/cypress/* +boot/espressif/* +boot/nuttx/* +ci/* +docs/* +ptest/* +samples/* +scripts/* +sim/* +testplan/* +ext/fiat/* +ext/mbedtls/* +ext/mbedtls-asn1/* +ext/nrf/* +ext/tinycrypt/tests/* +ext/tinycrypt/* +ext/tinycrypt-sha512/* diff --git a/bootloader/mcuboot/.travis.yml-disabled b/bootloader/mcuboot/.travis.yml-disabled new file mode 100644 index 0000000..bc89c48 --- /dev/null +++ b/bootloader/mcuboot/.travis.yml-disabled @@ -0,0 +1,81 @@ +# Travis configuration. Run FI hardening tests. + +language: minimal + +services: + - docker + +matrix: + include: + - os: linux + language: minimal + env: BUILD_TYPE=RELEASE SKIP_SIZE=2,4,6,8,10 TEST=fih-tests DAMAGE_TYPE=SIGNATURE + + - os: linux + language: minimal + env: BUILD_TYPE=RELEASE SKIP_SIZE=2,4,6,8,10 FIH_LEVEL=LOW TEST=fih-tests DAMAGE_TYPE=SIGNATURE + + - os: linux + language: minimal + env: BUILD_TYPE=RELEASE SKIP_SIZE=2,4,6,8,10 FIH_LEVEL=MEDIUM TEST=fih-tests DAMAGE_TYPE=SIGNATURE + + - os: linux + language: minimal + env: BUILD_TYPE=MINSIZEREL SKIP_SIZE=2,4,6 TEST=fih-tests DAMAGE_TYPE=SIGNATURE + + - os: linux + language: minimal + env: BUILD_TYPE=MINSIZEREL SKIP_SIZE=2,4,6 FIH_LEVEL=LOW TEST=fih-tests DAMAGE_TYPE=SIGNATURE + + - os: linux + language: minimal + env: BUILD_TYPE=MINSIZEREL SKIP_SIZE=2,4,6 FIH_LEVEL=MEDIUM TEST=fih-tests DAMAGE_TYPE=SIGNATURE + + - os: linux + language: minimal + env: BUILD_TYPE=MINSIZEREL SKIP_SIZE=8,10 TEST=fih-tests DAMAGE_TYPE=SIGNATURE + + - os: linux + language: minimal + env: BUILD_TYPE=MINSIZEREL SKIP_SIZE=8,10 FIH_LEVEL=LOW TEST=fih-tests DAMAGE_TYPE=SIGNATURE + + - os: linux + language: minimal + env: BUILD_TYPE=MINSIZEREL SKIP_SIZE=8,10 FIH_LEVEL=MEDIUM TEST=fih-tests DAMAGE_TYPE=SIGNATURE + + ## Corrupt image hash is not tested as it is in the unprotected TLV section + ## and is easy to calculate a valid hash for a changed image + #- os: linux + # language: minimal + # env: BUILD_TYPE=MINSIZEREL SKIP_SIZE=2,4,6 TEST=fih-tests DAMAGE_TYPE=IMAGE_HASH + + ## Max profile is not tested as it requires HW entropy source which is not + ## present in the QEMU system being used for the tests. + #- os: linux + # language: minimal + # env: FIH_LEVEL=MAX TEST=fih-tests + +before_install: + - | + if [ "$TRAVIS_PULL_REQUEST" != "false" ]; then + ./ci/check-signed-off-by.sh + if [ $? -ne 0 ]; then + exit 1 + fi + fi + +install: + - ./ci/${TEST}_install.sh + +script: + - ./ci/${TEST}_run.sh + +cache: + directories: + - docker + +notifications: + slack: + rooms: + - secure: "Tg9ZvJfb6e4QSEsxUvwW2MIqbuNRxD4nAOkgs8eopj/fRtqN6Zk06NVSeMmYcZunDFJXUSzYANBsF98OtaaUlm4WVt2T0ZFBJZrOYfIv18/zXCjYa04sDxur57F1ZYTYKyRpdUkfzPd/rGE4jKLQNcia+r/BTQbJkcZbXeg5/6cUeMP1so8/o0oMhSQP+GH0fLbyLzx3VPE8zu6+j2fCFC7R3idxtfO9VtsKlubfi3HgPgXTs+DEAAA8aoOku2esjFSFXTtdUFGz90YzyShZvtMcRg3Grp9+PZAsJwWk4eKSonKCO0DScfPUlMZbJcV7VsmyTxYKLLsGRZae6ZBH+XLfx5XeqgtgCor3FYx2dUXYfV9y8VvERDdossB0gZ/V2OUGePctDefiORytV6dMa7X3AfSdosgs/tjG4kbf+PMaVULzwF6dd3CdsxdClSl68UQPWA6wC2TEyo1EQea8jgZU6heLustZaQZhBkFkr/6j75XeGBjPw2fgVRkgg/OnTOYmo7N8181wOU+xORIEO1BtYmgRpc0cgpm4H9457diSHG1D2SoNy4tiQPCW2enN00QNGK5pZSL/FGA/ReUcALgAW0QcOljjU2bUSGPxo/VAi5ZyljWgVAGQ5qHJ4jgdfPf7VJUzCVH64G1S5+0gZPpO6vvvPdZtqeXrfBZMOBw=" + on_success: always diff --git a/bootloader/mcuboot/CODE_OF_CONDUCT.md b/bootloader/mcuboot/CODE_OF_CONDUCT.md new file mode 100644 index 0000000..51bb693 --- /dev/null +++ b/bootloader/mcuboot/CODE_OF_CONDUCT.md @@ -0,0 +1,134 @@ + +# Contributor Covenant Code of Conduct + +## Our Pledge + +We as members, contributors, and leaders pledge to make participation in our +community a harassment-free experience for everyone, regardless of age, body +size, visible or invisible disability, ethnicity, sex characteristics, gender +identity and expression, level of experience, education, socio-economic status, +nationality, personal appearance, race, caste, color, religion, or sexual identity +and orientation. + +We pledge to act and interact in ways that contribute to an open, welcoming, +diverse, inclusive, and healthy community. + +## Our Standards + +Examples of behavior that contributes to a positive environment for our +community include: + +* Demonstrating empathy and kindness toward other people +* Being respectful of differing opinions, viewpoints, and experiences +* Giving and gracefully accepting constructive feedback +* Accepting responsibility and apologizing to those affected by our mistakes, + and learning from the experience +* Focusing on what is best not just for us as individuals, but for the + overall community + +Examples of unacceptable behavior include: + +* The use of sexualized language or imagery, and sexual attention or + advances of any kind +* Trolling, insulting or derogatory comments, and personal or political attacks +* Public or private harassment +* Publishing others' private information, such as a physical or email + address, without their explicit permission +* Other conduct which could reasonably be considered inappropriate in a + professional setting + +## Enforcement Responsibilities + +Community leaders are responsible for clarifying and enforcing our standards of +acceptable behavior and will take appropriate and fair corrective action in +response to any behavior that they deem inappropriate, threatening, offensive, +or harmful. + +Community leaders have the right and responsibility to remove, edit, or reject +comments, commits, code, wiki edits, issues, and other contributions that are +not aligned to this Code of Conduct, and will communicate reasons for moderation +decisions when appropriate. + +## Scope + +This Code of Conduct applies within all community spaces, and also applies when +an individual is officially representing the community in public spaces. +Examples of representing our community include using an official e-mail address, +posting via an official social media account, or acting as an appointed +representative at an online or offline event. + +## Enforcement + +Instances of abusive, harassing, or otherwise unacceptable behavior may be +reported to the community leaders responsible for enforcement at +mcuboot@groups.io. +All complaints will be reviewed and investigated promptly and fairly. + +All community leaders are obligated to respect the privacy and security of the +reporter of any incident. + +## Enforcement Guidelines + +Community leaders will follow these Community Impact Guidelines in determining +the consequences for any action they deem in violation of this Code of Conduct: + +### 1. Correction + +**Community Impact**: Use of inappropriate language or other behavior deemed +unprofessional or unwelcome in the community. + +**Consequence**: A private, written warning from community leaders, providing +clarity around the nature of the violation and an explanation of why the +behavior was inappropriate. A public apology may be requested. + +### 2. Warning + +**Community Impact**: A violation through a single incident or series +of actions. + +**Consequence**: A warning with consequences for continued behavior. No +interaction with the people involved, including unsolicited interaction with +those enforcing the Code of Conduct, for a specified period of time. This +includes avoiding interactions in community spaces as well as external channels +like social media. Violating these terms may lead to a temporary or +permanent ban. + +### 3. Temporary Ban + +**Community Impact**: A serious violation of community standards, including +sustained inappropriate behavior. + +**Consequence**: A temporary ban from any sort of interaction or public +communication with the community for a specified period of time. No public or +private interaction with the people involved, including unsolicited interaction +with those enforcing the Code of Conduct, is allowed during this period. +Violating these terms may lead to a permanent ban. + +### 4. Permanent Ban + +**Community Impact**: Demonstrating a pattern of violation of community +standards, including sustained inappropriate behavior, harassment of an +individual, or aggression toward or disparagement of classes of individuals. + +**Consequence**: A permanent ban from any sort of public interaction within +the community. + +## Attribution + +This Code of Conduct is adapted from the [Contributor Covenant][homepage], +version 2.0, available at +[https://www.contributor-covenant.org/version/2/0/code_of_conduct.html][v2.0]. + +Community Impact Guidelines were inspired by +[Mozilla's code of conduct enforcement ladder][Mozilla CoC]. + +For answers to common questions about this code of conduct, see the FAQ at +[https://www.contributor-covenant.org/faq][FAQ]. Translations are available +at [https://www.contributor-covenant.org/translations][translations]. + +[homepage]: https://www.contributor-covenant.org +[v2.0]: https://www.contributor-covenant.org/version/2/0/code_of_conduct.html +[Mozilla CoC]: https://github.com/mozilla/diversity +[FAQ]: https://www.contributor-covenant.org/faq +[translations]: https://www.contributor-covenant.org/translations + diff --git a/bootloader/mcuboot/Cargo.lock b/bootloader/mcuboot/Cargo.lock new file mode 100644 index 0000000..9dff624 --- /dev/null +++ b/bootloader/mcuboot/Cargo.lock @@ -0,0 +1,542 @@ +# This file is automatically @generated by Cargo. +# It is not intended for manual editing. +version = 3 + +[[package]] +name = "aes" +version = "0.7.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9e8b47f52ea9bae42228d07ec09eb676433d7c4ed1ebdf0f1d1c29ed446f1ab8" +dependencies = [ + "cfg-if", + "cipher", + "cpufeatures", + "ctr", + "opaque-debug", +] + +[[package]] +name = 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+1,14 @@ +[workspace] +members = ["sim"] +exclude = ["ptest"] +resolver = "2" + +# The simulator runs very slowly without optimization. A value of 1 +# compiles in about half the time, but runs about 5-6 times slower. 2 +# and 3 are hardly different in either compile time or performance. +# Use 2 in case that makes the code slightly more debuggable. +[profile.test] +opt-level = 2 + +[profile.dev] +opt-level = 2 diff --git a/bootloader/mcuboot/LICENSE b/bootloader/mcuboot/LICENSE new file mode 100644 index 0000000..d89a331 --- /dev/null +++ b/bootloader/mcuboot/LICENSE @@ -0,0 +1,206 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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It defines a +common infrastructure for the bootloader and the system flash layout on +microcontroller systems, and provides a secure bootloader that enables easy +software upgrade. + +MCUboot is not dependent on any specific operating system and hardware and +relies on hardware porting layers from the operating system it works with. +Currently, MCUboot works with the following operating systems and SoCs: +- [Zephyr](https://www.zephyrproject.org/) +- [Apache Mynewt](https://mynewt.apache.org/) +- [Apache NuttX](https://nuttx.apache.org/) +- [RIOT](https://www.riot-os.org/) +- [Mbed OS](https://os.mbed.com/) +- [Espressif](https://www.espressif.com/) +- [Cypress/Infineon](https://www.cypress.com/) + +RIOT is supported only as a boot target. We will accept any new +port contributed by the community once it is good enough. + +## MCUboot How-tos + +See the following pages for instructions on using MCUboot with different +operating systems and SoCs: +- [Zephyr](docs/readme-zephyr.md) +- [Apache Mynewt](docs/readme-mynewt.md) +- [Apache NuttX](docs/readme-nuttx.md) +- [RIOT](docs/readme-riot.md) +- [Mbed OS](docs/readme-mbed.md) +- [Espressif](docs/readme-espressif.md) +- [Cypress/Infineon](boot/cypress/README.md) + +There are also instructions for the [Simulator](sim/README.rst). + +## Roadmap + +The issues being planned and worked on are tracked using GitHub issues. To +give your input, visit [MCUboot GitHub +Issues](https://github.com/mcu-tools/mcuboot/issues). + +## Source files + +You can find additional documentation on the bootloader in the source files. +For more information, use the following links: +- [boot/bootutil](https://github.com/mcu-tools/mcuboot/tree/main/boot/bootutil) - The core of the bootloader itself. +- [boot/boot\_serial](https://github.com/mcu-tools/mcuboot/tree/main/boot/boot_serial) - Support for serial upgrade within the bootloader itself. +- [boot/zephyr](https://github.com/mcu-tools/mcuboot/tree/main/boot/zephyr) - Port of the bootloader to Zephyr. +- [boot/mynewt](https://github.com/mcu-tools/mcuboot/tree/main/boot/mynewt) - Bootloader application for Apache Mynewt. +- [boot/nuttx](https://github.com/mcu-tools/mcuboot/tree/main/boot/nuttx) - Bootloader application and port of MCUboot interfaces for Apache NuttX. +- [boot/mbed](https://github.com/mcu-tools/mcuboot/tree/main/boot/mbed) - Port of the bootloader to Mbed OS. +- [boot/espressif](https://github.com/mcu-tools/mcuboot/tree/main/boot/espressif) - Bootloader application and MCUboot port for Espressif SoCs. +- [boot/cypress](https://github.com/mcu-tools/mcuboot/tree/main/boot/cypress) - Bootloader application and MCUboot port for Cypress/Infineon SoCs. +- [imgtool](https://github.com/mcu-tools/mcuboot/tree/main/scripts/imgtool.py) - A tool to securely sign firmware images for booting by MCUboot. +- [sim](https://github.com/mcu-tools/mcuboot/tree/main/sim) - A bootloader simulator for testing and regression. + +## Joining the project + +Developers are welcome! + +Use the following links to join or see more about the project: + +* [Our developer mailing list](https://groups.io/g/MCUBoot) +* [Our Discord channel](https://discord.com/channels/1106321706588577904/1106322802308550716)
+ Get [your invite](https://discord.com/invite/5PpXhvda5p) diff --git a/bootloader/mcuboot/boot/boot_serial/include/boot_serial/boot_serial.h b/bootloader/mcuboot/boot/boot_serial/include/boot_serial/boot_serial.h new file mode 100644 index 0000000..8c56fe7 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/include/boot_serial/boot_serial.h @@ -0,0 +1,59 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef __BOOT_SERIAL_H__ +#define __BOOT_SERIAL_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Function pointers to read/write data from uart. + * read returns the number of bytes read, str points to buffer to fill, + * cnt is the number of bytes to fill within buffer, *newline will be + * set if newline is the last character. + * write takes as it's arguments pointer to data to write, and the count + * of bytes. + */ +struct boot_uart_funcs { + int (*read)(char *str, int cnt, int *newline); + void (*write)(const char *ptr, int cnt); +}; + +/** + * Start processing newtmgr commands for uploading image0 over serial. + * Assumes serial port is open and waits for download command. + */ +void boot_serial_start(const struct boot_uart_funcs *f); + +/** + * Start processing newtmgr commands for uploading image0 over serial. + * Assumes serial port is open and waits for download command. + * This function will return if there is no mcumgr command received within + * the given timeout. If a command is received within this timeout, the + * function is similar to boot_serial_start + */ +void boot_serial_check_start(const struct boot_uart_funcs *f, int timeout_in_ms); + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOT_SERIAL_H__ */ diff --git a/bootloader/mcuboot/boot/boot_serial/include/boot_serial/boot_serial_encryption.h b/bootloader/mcuboot/boot/boot_serial/include/boot_serial/boot_serial_encryption.h new file mode 100644 index 0000000..b7cf9ff --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/include/boot_serial/boot_serial_encryption.h @@ -0,0 +1,32 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2023 Nordic Semiconductor ASA + */ + +#ifndef H_BOOT_SERIAL_ENCRYPTION_ +#define H_BOOT_SERIAL_ENCRYPTION_ +#include "bootutil/fault_injection_hardening.h" + +/** + * Validate hash of a primary boot image doing on the fly decryption as well + * + * @param[in] fa_p flash area pointer + * @param[in] hdr boot image header pointer + * @param[in] buf buffer which is used for validating data + * @param[in] buf_size size of input buffer + * + * @return FIH_SUCCESS on success, error code otherwise + */ +fih_ret +boot_image_validate_encrypted(const struct flash_area *fa_p, + struct image_header *hdr, uint8_t *buf, + uint16_t buf_size); + +/** + * Handle an encrypted firmware in the main flash. + * This will decrypt the image inplace + */ +int boot_handle_enc_fw(const struct flash_area *flash_area); + +#endif diff --git a/bootloader/mcuboot/boot/boot_serial/pkg.yml b/bootloader/mcuboot/boot/boot_serial/pkg.yml new file mode 100644 index 0000000..aaaf703 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/pkg.yml @@ -0,0 +1,38 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: boot/boot_serial +pkg.description: The boot_serial library is used when downloading image over serial port. +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: + - boot + - bootloader + +pkg.deps: + - "@apache-mynewt-core/hw/hal" + - "@apache-mynewt-core/kernel/os" + - "@apache-mynewt-core/encoding/base64" + - "@mcuboot/boot/mynewt/flash_map_backend" + - "@mcuboot/boot/mynewt/boot_uart" + - "@mcuboot/boot/zcbor" + - "@apache-mynewt-core/util/crc" + +pkg.req_apis: + - bootloader diff --git a/bootloader/mcuboot/boot/boot_serial/src/boot_serial.c b/bootloader/mcuboot/boot/boot_serial/src/boot_serial.c new file mode 100644 index 0000000..3891793 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/src/boot_serial.c @@ -0,0 +1,1498 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +#include +#include +#include +#include +#include +#include +#include + +#include "sysflash/sysflash.h" + +#include "bootutil/bootutil_log.h" + +#ifdef __ZEPHYR__ +#include +#include +#include +#include +#include +#include +#include +#include +#elif __ESPRESSIF__ +#include +#include +#include +#include +#include +#else +#include +#include +#include +#include +#include +#include +#include +#endif /* __ZEPHYR__ */ + +#include +#include +#include "zcbor_bulk.h" + +#include +#include +#include + +#include +#include + +#include "boot_serial/boot_serial.h" +#include "boot_serial_priv.h" +#include "mcuboot_config/mcuboot_config.h" +#include "../src/bootutil_priv.h" + +#ifdef MCUBOOT_ENC_IMAGES +#include "boot_serial/boot_serial_encryption.h" +#endif + +#include "bootutil/boot_hooks.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE ZCBOR_ARRAY_SIZE +#endif + +#if defined(MCUBOOT_SHA512) + #define IMAGE_HASH_SIZE (64) + #define IMAGE_SHA_TLV IMAGE_TLV_SHA512 +#elif defined(MCUBOOT_SIGN_EC384) + #define IMAGE_HASH_SIZE (48) + #define IMAGE_SHA_TLV IMAGE_TLV_SHA384 +#else + #define IMAGE_HASH_SIZE (32) + #define IMAGE_SHA_TLV IMAGE_TLV_SHA256 +#endif + +#ifndef MCUBOOT_SERIAL_MAX_RECEIVE_SIZE +#define MCUBOOT_SERIAL_MAX_RECEIVE_SIZE 512 +#endif + +#ifdef MCUBOOT_SERIAL_IMG_GRP_IMAGE_STATE +#define BOOT_SERIAL_IMAGE_STATE_SIZE_MAX 48 +#else +#define BOOT_SERIAL_IMAGE_STATE_SIZE_MAX 0 +#endif +#ifdef MCUBOOT_SERIAL_IMG_GRP_HASH +#define BOOT_SERIAL_HASH_SIZE_MAX (IMAGE_HASH_SIZE + 4) +#else +#define BOOT_SERIAL_HASH_SIZE_MAX 0 +#endif +#ifdef MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO +#define BOOT_SERIAL_SLOT_INFO_SIZE_MAX 164 +#else +#define BOOT_SERIAL_SLOT_INFO_SIZE_MAX 0 +#endif + +#if (128 + BOOT_SERIAL_IMAGE_STATE_SIZE_MAX + BOOT_SERIAL_HASH_SIZE_MAX) > \ + BOOT_SERIAL_SLOT_INFO_SIZE_MAX +#define BOOT_SERIAL_MAX_MESSAGE_SIZE (128 + BOOT_SERIAL_IMAGE_STATE_SIZE_MAX + \ + BOOT_SERIAL_HASH_SIZE_MAX) +#else +#define BOOT_SERIAL_MAX_MESSAGE_SIZE BOOT_SERIAL_SLOT_INFO_SIZE_MAX +#endif + +#define BOOT_SERIAL_OUT_MAX (BOOT_SERIAL_MAX_MESSAGE_SIZE * BOOT_IMAGE_NUMBER) + +#define BOOT_SERIAL_FRAME_MTU 124 /* 127 - pkt start (2 bytes) and stop (1 byte) */ + +/* Number of estimated CBOR elements for responses */ +#define CBOR_ENTRIES_SLOT_INFO_IMAGE_MAP 4 +#define CBOR_ENTRIES_SLOT_INFO_SLOTS_MAP 3 + +#ifdef __ZEPHYR__ +/* base64 lib encodes data to null-terminated string */ +#define BASE64_ENCODE_SIZE(in_size) ((((((in_size) - 1) / 3) * 4) + 4) + 1) + +#define CRC16_INITIAL_CRC 0 /* what to seed crc16 with */ +#define CRC_CITT_POLYMINAL 0x1021 + +#define ntohs(x) sys_be16_to_cpu(x) +#define htons(x) sys_cpu_to_be16(x) +#elif __ESPRESSIF__ +#define BASE64_ENCODE_SIZE(in_size) ((((((in_size) - 1) / 3) * 4) + 4) + 1) +#define CRC16_INITIAL_CRC 0 /* what to seed crc16 with */ + +#define ntohs(x) be16toh(x) +#define htons(x) htobe16(x) + +#define base64_decode mbedtls_base64_decode +#define base64_encode mbedtls_base64_encode +#endif + +#if (BOOT_IMAGE_NUMBER > 1) +#define IMAGES_ITER(x) for ((x) = 0; (x) < BOOT_IMAGE_NUMBER; ++(x)) +#else +#define IMAGES_ITER(x) +#endif + +static char in_buf[MCUBOOT_SERIAL_MAX_RECEIVE_SIZE + 1]; +static char dec_buf[MCUBOOT_SERIAL_MAX_RECEIVE_SIZE + 1]; +const struct boot_uart_funcs *boot_uf; +static struct nmgr_hdr *bs_hdr; +static bool bs_entry; + +static char bs_obuf[BOOT_SERIAL_OUT_MAX]; + +static void boot_serial_output(void); + +#ifdef MCUBOOT_SERIAL_IMG_GRP_HASH +static int boot_serial_get_hash(const struct image_header *hdr, + const struct flash_area *fap, uint8_t *hash); +#endif + +static zcbor_state_t cbor_state[2]; + +void reset_cbor_state(void) +{ + zcbor_new_encode_state(cbor_state, 2, (uint8_t *)bs_obuf, + sizeof(bs_obuf), 0); +} + +/** + * Function that processes MGMT_GROUP_ID_PERUSER mcumgr group and may be + * used to process any groups that have not been processed by generic boot + * serial implementation. + * + * @param[in] hdr -- the decoded header of mcumgr message; + * @param[in] buffer -- buffer with first mcumgr message; + * @param[in] len -- length of of data in buffer; + * @param[out] *cs -- object with encoded response. + * + * @return 0 on success; non-0 error code otherwise. + */ +extern int bs_peruser_system_specific(const struct nmgr_hdr *hdr, + const char *buffer, + int len, zcbor_state_t *cs); + +#define zcbor_tstr_put_lit_cast(state, string) \ + zcbor_tstr_encode_ptr(state, (char *)string, sizeof(string) - 1) + +#ifndef MCUBOOT_USE_SNPRINTF +/* + * Convert version into string without use of snprintf(). + */ +static int +u32toa(char *tgt, uint32_t val) +{ + char *dst; + uint32_t d = 1; + uint32_t dgt; + int n = 0; + + dst = tgt; + while (val / d >= 10) { + d *= 10; + } + while (d) { + dgt = val / d; + val %= d; + d /= 10; + if (n || dgt > 0 || d == 0) { + *dst++ = dgt + '0'; + ++n; + } + } + *dst = '\0'; + + return dst - tgt; +} + +/* + * dst has to be able to fit "255.255.65535.4294967295" (25 characters). + */ +static void +bs_list_img_ver(char *dst, int maxlen, struct image_version *ver) +{ + int off; + + off = u32toa(dst, ver->iv_major); + dst[off++] = '.'; + off += u32toa(dst + off, ver->iv_minor); + dst[off++] = '.'; + off += u32toa(dst + off, ver->iv_revision); + + if (ver->iv_build_num != 0) { + dst[off++] = '.'; + off += u32toa(dst + off, ver->iv_build_num); + } +} +#else +/* + * dst has to be able to fit "255.255.65535.4294967295" (25 characters). + */ +static void +bs_list_img_ver(char *dst, int maxlen, struct image_version *ver) +{ + int len; + + len = snprintf(dst, maxlen, "%hu.%hu.%hu", (uint16_t)ver->iv_major, + (uint16_t)ver->iv_minor, ver->iv_revision); + + if (ver->iv_build_num != 0 && len > 0 && len < maxlen) { + snprintf(&dst[len], (maxlen - len), ".%u", ver->iv_build_num); + } +} +#endif /* !MCUBOOT_USE_SNPRINTF */ + +/* + * List images. + */ +static void +bs_list(char *buf, int len) +{ + struct image_header hdr; + uint32_t slot, area_id; + const struct flash_area *fap; + uint8_t image_index; +#ifdef MCUBOOT_SERIAL_IMG_GRP_HASH + uint8_t hash[IMAGE_HASH_SIZE]; +#endif + + zcbor_map_start_encode(cbor_state, 1); + zcbor_tstr_put_lit_cast(cbor_state, "images"); + zcbor_list_start_encode(cbor_state, 5); + image_index = 0; + IMAGES_ITER(image_index) { +#ifdef MCUBOOT_SERIAL_IMG_GRP_IMAGE_STATE + int swap_status = boot_swap_type_multi(image_index); +#endif + + for (slot = 0; slot < MCUBOOT_IMAGE_NUMBER; slot++) { + FIH_DECLARE(fih_rc, FIH_FAILURE); + uint8_t tmpbuf[64]; + +#ifdef MCUBOOT_SERIAL_IMG_GRP_IMAGE_STATE + bool active = false; + bool confirmed = false; + bool pending = false; + bool permanent = false; +#endif + + area_id = flash_area_id_from_multi_image_slot(image_index, slot); + if (flash_area_open(area_id, &fap)) { + continue; + } + + int rc = BOOT_HOOK_CALL(boot_read_image_header_hook, + BOOT_HOOK_REGULAR, image_index, slot, &hdr); + if (rc == BOOT_HOOK_REGULAR) + { + flash_area_read(fap, 0, &hdr, sizeof(hdr)); + } + + if (hdr.ih_magic == IMAGE_MAGIC) + { + BOOT_HOOK_CALL_FIH(boot_image_check_hook, + FIH_BOOT_HOOK_REGULAR, + fih_rc, image_index, slot); + if (FIH_EQ(fih_rc, FIH_BOOT_HOOK_REGULAR)) + { +#if defined(MCUBOOT_ENC_IMAGES) +#if !defined(MCUBOOT_SINGLE_APPLICATION_SLOT) + if (IS_ENCRYPTED(&hdr) && MUST_DECRYPT(fap, image_index, &hdr)) { + FIH_CALL(boot_image_validate_encrypted, fih_rc, fap, + &hdr, tmpbuf, sizeof(tmpbuf)); + } else { +#endif + if (IS_ENCRYPTED(&hdr)) { + /* + * There is an image present which has an encrypted flag set but is + * not encrypted, therefore remove the flag from the header and run a + * normal image validation on it. + */ + hdr.ih_flags &= ~ENCRYPTIONFLAGS; + } +#endif + + FIH_CALL(bootutil_img_validate, fih_rc, NULL, 0, &hdr, + fap, tmpbuf, sizeof(tmpbuf), NULL, 0, NULL); +#if defined(MCUBOOT_ENC_IMAGES) && !defined(MCUBOOT_SINGLE_APPLICATION_SLOT) + } +#endif + } + } + + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + flash_area_close(fap); + continue; + } + +#ifdef MCUBOOT_SERIAL_IMG_GRP_HASH + /* Retrieve hash of image for identification */ + rc = boot_serial_get_hash(&hdr, fap, hash); +#endif + + flash_area_close(fap); + zcbor_map_start_encode(cbor_state, 20); + +#if (BOOT_IMAGE_NUMBER > 1) + zcbor_tstr_put_lit_cast(cbor_state, "image"); + zcbor_uint32_put(cbor_state, image_index); +#endif + +#ifdef MCUBOOT_SERIAL_IMG_GRP_IMAGE_STATE + if (swap_status == BOOT_SWAP_TYPE_NONE) { + if (slot == BOOT_PRIMARY_SLOT) { + confirmed = true; + active = true; + } + } else if (swap_status == BOOT_SWAP_TYPE_TEST) { + if (slot == BOOT_PRIMARY_SLOT) { + confirmed = true; + } else { + pending = true; + } + } else if (swap_status == BOOT_SWAP_TYPE_PERM) { + if (slot == BOOT_PRIMARY_SLOT) { + confirmed = true; + } else { + pending = true; + permanent = true; + } + } else if (swap_status == BOOT_SWAP_TYPE_REVERT) { + if (slot == BOOT_PRIMARY_SLOT) { + active = true; + } else { + confirmed = true; + } + } + + if (!(hdr.ih_flags & IMAGE_F_NON_BOOTABLE)) { + zcbor_tstr_put_lit_cast(cbor_state, "bootable"); + zcbor_bool_put(cbor_state, true); + } + + if (confirmed) { + zcbor_tstr_put_lit_cast(cbor_state, "confirmed"); + zcbor_bool_put(cbor_state, true); + } + + if (active) { + zcbor_tstr_put_lit_cast(cbor_state, "active"); + zcbor_bool_put(cbor_state, true); + } + + if (pending) { + zcbor_tstr_put_lit_cast(cbor_state, "pending"); + zcbor_bool_put(cbor_state, true); + } + + if (permanent) { + zcbor_tstr_put_lit_cast(cbor_state, "permanent"); + zcbor_bool_put(cbor_state, true); + } +#endif + + zcbor_tstr_put_lit_cast(cbor_state, "slot"); + zcbor_uint32_put(cbor_state, slot); + +#ifdef MCUBOOT_SERIAL_IMG_GRP_HASH + if (rc == 0) { + zcbor_tstr_put_lit_cast(cbor_state, "hash"); + zcbor_bstr_encode_ptr(cbor_state, hash, sizeof(hash)); + } +#endif + + zcbor_tstr_put_lit_cast(cbor_state, "version"); + + bs_list_img_ver((char *)tmpbuf, sizeof(tmpbuf), &hdr.ih_ver); + + zcbor_tstr_encode_ptr(cbor_state, (char *)tmpbuf, strlen((char *)tmpbuf)); + zcbor_map_end_encode(cbor_state, 20); + } + } + zcbor_list_end_encode(cbor_state, 5); + zcbor_map_end_encode(cbor_state, 1); + boot_serial_output(); +} + +#ifdef MCUBOOT_SERIAL_IMG_GRP_IMAGE_STATE +/* + * Set image state. + */ +static void +bs_set(char *buf, int len) +{ + /* + * Expected data format. + * { + * "confirm": + * "hash": + * } + */ + uint8_t image_index = 0; + size_t decoded = 0; + uint8_t hash[IMAGE_HASH_SIZE]; + bool confirm; + struct zcbor_string img_hash; + bool ok; + int rc; + +#ifdef MCUBOOT_SERIAL_IMG_GRP_HASH + bool found = false; +#endif + + zcbor_state_t zsd[4]; + zcbor_new_state(zsd, sizeof(zsd) / sizeof(zcbor_state_t), (uint8_t *)buf, len, 1, NULL, 0); + + struct zcbor_map_decode_key_val image_set_state_decode[] = { + ZCBOR_MAP_DECODE_KEY_DECODER("confirm", zcbor_bool_decode, &confirm), +#ifdef MCUBOOT_SERIAL_IMG_GRP_HASH + ZCBOR_MAP_DECODE_KEY_DECODER("hash", zcbor_bstr_decode, &img_hash), +#endif + }; + + ok = zcbor_map_decode_bulk(zsd, image_set_state_decode, ARRAY_SIZE(image_set_state_decode), + &decoded) == 0; + + if (!ok) { + rc = MGMT_ERR_EINVAL; + goto out; + } + +#ifdef MCUBOOT_SERIAL_IMG_GRP_HASH + if ((img_hash.len != sizeof(hash) && img_hash.len != 0) || + (img_hash.len == 0 && BOOT_IMAGE_NUMBER > 1)) { + /* Hash is required and was not provided or is invalid size */ + rc = MGMT_ERR_EINVAL; + goto out; + } + + if (img_hash.len != 0) { + for (image_index = 0; image_index < BOOT_IMAGE_NUMBER; ++image_index) { + struct image_header hdr; + uint32_t area_id; + const struct flash_area *fap; + uint8_t tmpbuf[64]; + + area_id = flash_area_id_from_multi_image_slot(image_index, 1); + if (flash_area_open(area_id, &fap)) { + BOOT_LOG_ERR("Failed to open flash area ID %d", area_id); + continue; + } + + rc = BOOT_HOOK_CALL(boot_read_image_header_hook, + BOOT_HOOK_REGULAR, image_index, 1, &hdr); + if (rc == BOOT_HOOK_REGULAR) + { + flash_area_read(fap, 0, &hdr, sizeof(hdr)); + } + + if (hdr.ih_magic == IMAGE_MAGIC) + { + FIH_DECLARE(fih_rc, FIH_FAILURE); + + BOOT_HOOK_CALL_FIH(boot_image_check_hook, + FIH_BOOT_HOOK_REGULAR, + fih_rc, image_index, 1); + if (FIH_EQ(fih_rc, FIH_BOOT_HOOK_REGULAR)) + { +#ifdef MCUBOOT_ENC_IMAGES + if (IS_ENCRYPTED(&hdr)) { + FIH_CALL(boot_image_validate_encrypted, fih_rc, fap, + &hdr, tmpbuf, sizeof(tmpbuf)); + } else { +#endif + FIH_CALL(bootutil_img_validate, fih_rc, NULL, 0, &hdr, + fap, tmpbuf, sizeof(tmpbuf), NULL, 0, NULL); +#ifdef MCUBOOT_ENC_IMAGES + } +#endif + } + + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + continue; + } + } + + /* Retrieve hash of image for identification */ + rc = boot_serial_get_hash(&hdr, fap, hash); + flash_area_close(fap); + + if (rc == 0 && memcmp(hash, img_hash.value, sizeof(hash)) == 0) { + /* Hash matches, set this slot for test or confirmation */ + found = true; + break; + } + } + + if (!found) { + /* Image was not found with specified hash */ + BOOT_LOG_ERR("Did not find image with specified hash"); + rc = MGMT_ERR_ENOENT; + goto out; + } + } +#endif + + rc = boot_set_pending_multi(image_index, confirm); + +out: + if (rc == 0) { + /* Success - return updated list of images */ + bs_list(buf, len); + } else { + /* Error code, only return the error */ + zcbor_map_start_encode(cbor_state, 10); + zcbor_tstr_put_lit_cast(cbor_state, "rc"); + zcbor_int32_put(cbor_state, rc); + zcbor_map_end_encode(cbor_state, 10); + + boot_serial_output(); + } +} +#endif + +/* + * Send rc code only. + */ +static void +bs_rc_rsp(int rc_code) +{ + zcbor_map_start_encode(cbor_state, 10); + zcbor_tstr_put_lit_cast(cbor_state, "rc"); + zcbor_int32_put(cbor_state, rc_code); + zcbor_map_end_encode(cbor_state, 10); + boot_serial_output(); +} + +static void +bs_list_set(uint8_t op, char *buf, int len) +{ + if (op == NMGR_OP_READ) { + bs_list(buf, len); + } else { +#ifdef MCUBOOT_SERIAL_IMG_GRP_IMAGE_STATE + bs_set(buf, len); +#else + bs_rc_rsp(MGMT_ERR_ENOTSUP); +#endif + } +} + +#ifdef MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO +static void +bs_slot_info(uint8_t op, char *buf, int len) +{ + uint32_t slot, area_id; + const struct flash_area *fap; + uint8_t image_index = 0; + int rc; + bool ok = true; + const struct image_max_size *image_max_sizes; + + if (op != NMGR_OP_READ) { + bs_rc_rsp(MGMT_ERR_ENOTSUP); + } + + image_max_sizes = boot_get_max_app_size(); + + zcbor_map_start_encode(cbor_state, 1); + zcbor_tstr_put_lit_cast(cbor_state, "images"); + zcbor_list_start_encode(cbor_state, MCUBOOT_IMAGE_NUMBER); + + IMAGES_ITER(image_index) { + for (slot = 0; slot < MCUBOOT_IMAGE_NUMBER; slot++) { + if (slot == 0) { + ok = zcbor_map_start_encode(cbor_state, CBOR_ENTRIES_SLOT_INFO_IMAGE_MAP) && + zcbor_tstr_put_lit(cbor_state, "image") && + zcbor_uint32_put(cbor_state, (uint32_t)image_index) && + zcbor_tstr_put_lit(cbor_state, "slots") && + zcbor_list_start_encode(cbor_state, MCUBOOT_IMAGE_NUMBER); + + if (!ok) { + goto finish; + } + } + + ok = zcbor_map_start_encode(cbor_state, CBOR_ENTRIES_SLOT_INFO_SLOTS_MAP) && + zcbor_tstr_put_lit(cbor_state, "slot") && + zcbor_uint32_put(cbor_state, slot); + + if (!ok) { + goto finish; + } + + area_id = flash_area_id_from_multi_image_slot(image_index, slot); + rc = flash_area_open(area_id, &fap); + + if (rc) { + ok = zcbor_tstr_put_lit(cbor_state, "rc") && + zcbor_int32_put(cbor_state, rc); + } else { + if (sizeof(fap->fa_size) == sizeof(uint64_t)) { + ok = zcbor_tstr_put_lit(cbor_state, "size") && + zcbor_uint64_put(cbor_state, fap->fa_size); + } else { + ok = zcbor_tstr_put_lit(cbor_state, "size") && + zcbor_uint32_put(cbor_state, fap->fa_size); + } + + if (!ok) { + flash_area_close(fap); + goto finish; + } + + /* + * Check if we support uploading to this slot and if so, return the + * image ID + */ +#if defined(MCUBOOT_SINGLE_APPLICATION_SLOT) + ok = zcbor_tstr_put_lit(cbor_state, "upload_image_id") && + zcbor_uint32_put(cbor_state, (image_index + 1)); +#elif defined(MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD) + ok = zcbor_tstr_put_lit(cbor_state, "upload_image_id") && + zcbor_uint32_put(cbor_state, (image_index * 2 + slot + 1)); +#else + if (slot == 1) { + ok = zcbor_tstr_put_lit(cbor_state, "upload_image_id") && + zcbor_uint32_put(cbor_state, (image_index * 2 + 1)); + } +#endif + + flash_area_close(fap); + + if (!ok) { + goto finish; + } + + ok = zcbor_map_end_encode(cbor_state, CBOR_ENTRIES_SLOT_INFO_SLOTS_MAP); + + if (!ok) { + goto finish; + } + + if (slot == (MCUBOOT_IMAGE_NUMBER - 1)) { + ok = zcbor_list_end_encode(cbor_state, MCUBOOT_IMAGE_NUMBER); + + if (!ok) { + goto finish; + } + + if (image_max_sizes[image_index].calculated == true) { + ok = zcbor_tstr_put_lit(cbor_state, "max_image_size") && + zcbor_uint32_put(cbor_state, + image_max_sizes[image_index].max_size); + + if (!ok) { + goto finish; + } + } + + ok = zcbor_map_end_encode(cbor_state, CBOR_ENTRIES_SLOT_INFO_IMAGE_MAP); + + } + } + + if (!ok) { + goto finish; + } + } + } + + ok = zcbor_list_end_encode(cbor_state, MCUBOOT_IMAGE_NUMBER) && + zcbor_map_end_encode(cbor_state, 1); + +finish: + if (!ok) { + reset_cbor_state(); + bs_rc_rsp(MGMT_ERR_ENOMEM); + } + + boot_serial_output(); +} +#endif + +#ifdef MCUBOOT_ERASE_PROGRESSIVELY +/** Erases range of flash, aligned to sector size + * + * Function will erase all sectors withing [start, end] range; it does not check + * the @p start for alignment, and it will use @p end to find boundaries of las + * sector to erase. Function returns offset of the first byte past the last + * erased sector, so basically offset of next sector to be erased if needed. + * The function is intended to be called iteratively with previously returned + * offset as @p start. + * + * @param start starting offset, aligned to sector offset; + * @param end ending offset, maybe anywhere within sector; + * + * @retval On success: offset of the first byte past last erased sector; + * On failure: -EINVAL. + */ +static off_t erase_range(const struct flash_area *fap, off_t start, off_t end) +{ + struct flash_sector sect; + size_t size; + int rc; + + if (end >= flash_area_get_size(fap)) { + return -EINVAL; + } + + if (end < start) { + return start; + } + + if (flash_area_get_sector(fap, end, §)) { + return -EINVAL; + } + + size = flash_sector_get_off(§) + flash_sector_get_size(§) - start; + BOOT_LOG_DBG("Erasing range 0x%jx:0x%jx", (intmax_t)start, + (intmax_t)(start + size - 1)); + + rc = flash_area_erase(fap, start, size); + if (rc != 0) { + BOOT_LOG_ERR("Error %d while erasing range", rc); + return -EINVAL; + } + + return start + size; +} +#endif + +/* + * Image upload request. + */ +static void +bs_upload(char *buf, int len) +{ + static size_t img_size; /* Total image size, held for duration of upload */ + static uint32_t curr_off; /* Expected current offset */ + const uint8_t *img_chunk = NULL; /* Pointer to buffer with received image chunk */ + size_t img_chunk_len = 0; /* Length of received image chunk */ + size_t img_chunk_off = SIZE_MAX; /* Offset of image chunk within image */ + uint8_t rem_bytes; /* Reminder bytes after aligning chunk write to + * to flash alignment */ + uint32_t img_num_tmp = UINT_MAX; /* Temp variable for image number */ + static uint32_t img_num = 0; + size_t img_size_tmp = SIZE_MAX; /* Temp variable for image size */ + const struct flash_area *fap = NULL; + int rc; + struct zcbor_string img_chunk_data; + size_t decoded = 0; + bool ok; +#ifdef MCUBOOT_ERASE_PROGRESSIVELY + static off_t not_yet_erased = 0; /* Offset of next byte to erase; writes to flash + * are done in consecutive manner and erases are done + * to allow currently received chunk to be written; + * this state variable holds information where last + * erase has stopped to let us know whether erase + * is needed to be able to write current chunk. + */ + static struct flash_sector status_sector; +#endif + + zcbor_state_t zsd[4]; + zcbor_new_state(zsd, sizeof(zsd) / sizeof(zcbor_state_t), (uint8_t *)buf, len, 1, NULL, 0); + + struct zcbor_map_decode_key_val image_upload_decode[] = { + ZCBOR_MAP_DECODE_KEY_DECODER("image", zcbor_uint32_decode, &img_num_tmp), + ZCBOR_MAP_DECODE_KEY_DECODER("data", zcbor_bstr_decode, &img_chunk_data), + ZCBOR_MAP_DECODE_KEY_DECODER("len", zcbor_size_decode, &img_size_tmp), + ZCBOR_MAP_DECODE_KEY_DECODER("off", zcbor_size_decode, &img_chunk_off), + }; + + ok = zcbor_map_decode_bulk(zsd, image_upload_decode, ARRAY_SIZE(image_upload_decode), + &decoded) == 0; + + if (!ok) { + goto out_invalid_data; + } + + img_chunk = img_chunk_data.value; + img_chunk_len = img_chunk_data.len; + + /* + * Expected data format. + * { + * "image": + * "data": + * "len": + * "off": + * } + */ + + if (img_chunk_off == SIZE_MAX || img_chunk == NULL) { + /* + * Offset must be set in every block. + */ + goto out_invalid_data; + } + + /* Use image number only from packet with offset == 0. */ + if (img_chunk_off == 0) { + if (img_num_tmp != UINT_MAX) { + img_num = img_num_tmp; + } else { + img_num = 0; + } + } + +#if !defined(MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD) + rc = flash_area_open(flash_area_id_from_multi_image_slot(img_num, 0), &fap); +#else + rc = flash_area_open(flash_area_id_from_direct_image(img_num), &fap); +#endif + if (rc) { + rc = MGMT_ERR_EINVAL; + goto out; + } + + if (img_chunk_off == 0) { + /* Receiving chunk with 0 offset resets the upload state; this basically + * means that upload has started from beginning. + */ + const size_t area_size = flash_area_get_size(fap); + + curr_off = 0; +#ifdef MCUBOOT_ERASE_PROGRESSIVELY + /* Get trailer sector information; this is done early because inability to get + * that sector information means that upload will not work anyway. + * TODO: This is single occurrence issue, it should get detected during tests + * and fixed otherwise you are deploying broken mcuboot. + */ + if (flash_area_get_sector(fap, boot_status_off(fap), &status_sector)) { + rc = MGMT_ERR_EUNKNOWN; + BOOT_LOG_ERR("Unable to determine flash sector of the image trailer"); + goto out; + } +#endif + +#if defined(MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE) + /* We are using swap state at end of flash area to store validation + * result. Make sure the user cannot write it from an image to skip validation. + */ + if (img_size_tmp > (area_size - BOOT_MAGIC_SZ)) { + goto out_invalid_data; + } +#else + if (img_size_tmp > area_size) { + goto out_invalid_data; + } + +#endif + +#ifndef MCUBOOT_ERASE_PROGRESSIVELY + /* Non-progressive erase erases entire image slot when first chunk of + * an image is received. + */ + rc = flash_area_erase(fap, 0, area_size); + if (rc) { + goto out_invalid_data; + } +#else + not_yet_erased = 0; +#endif + + img_size = img_size_tmp; + } else if (img_chunk_off != curr_off) { + /* If received chunk offset does not match expected one jump, pretend + * success and jump to out; out will respond to client with success + * and request the expected offset, held by curr_off. + */ + rc = 0; + goto out; + } else if (curr_off + img_chunk_len > img_size) { + rc = MGMT_ERR_EINVAL; + goto out; + } + +#ifdef MCUBOOT_ERASE_PROGRESSIVELY + /* Progressive erase will erase enough flash, aligned to sector size, + * as needed for the current chunk to be written. + */ + not_yet_erased = erase_range(fap, not_yet_erased, + curr_off + img_chunk_len - 1); + + if (not_yet_erased < 0) { + rc = MGMT_ERR_EINVAL; + goto out; + } +#endif + + /* Writes are aligned to flash write alignment, so may drop a few bytes + * from the end of the buffer; we will request these bytes again with + * new buffer by responding with request for offset after the last aligned + * write. + */ + rem_bytes = img_chunk_len % flash_area_align(fap); + img_chunk_len -= rem_bytes; + + if (curr_off + img_chunk_len + rem_bytes < img_size) { + rem_bytes = 0; + } + + BOOT_LOG_DBG("Writing at 0x%x until 0x%x", curr_off, curr_off + (uint32_t)img_chunk_len); + /* Write flash aligned chunk, note that img_chunk_len now holds aligned length */ +#if defined(MCUBOOT_SERIAL_UNALIGNED_BUFFER_SIZE) && MCUBOOT_SERIAL_UNALIGNED_BUFFER_SIZE > 0 + if (flash_area_align(fap) > 1 && + (((size_t)img_chunk) & (flash_area_align(fap) - 1)) != 0) { + /* Buffer address incompatible with write address, use buffer to write */ + uint8_t write_size = MCUBOOT_SERIAL_UNALIGNED_BUFFER_SIZE; + uint8_t wbs_aligned[MCUBOOT_SERIAL_UNALIGNED_BUFFER_SIZE]; + + while (img_chunk_len >= flash_area_align(fap)) { + if (write_size > img_chunk_len) { + write_size = img_chunk_len; + } + + memset(wbs_aligned, flash_area_erased_val(fap), sizeof(wbs_aligned)); + memcpy(wbs_aligned, img_chunk, write_size); + + rc = flash_area_write(fap, curr_off, wbs_aligned, write_size); + + if (rc != 0) { + goto out; + } + + curr_off += write_size; + img_chunk += write_size; + img_chunk_len -= write_size; + } + } else { + rc = flash_area_write(fap, curr_off, img_chunk, img_chunk_len); + } +#else + rc = flash_area_write(fap, curr_off, img_chunk, img_chunk_len); +#endif + + if (rc == 0 && rem_bytes) { + /* Non-zero rem_bytes means that last chunk needs alignment; the aligned + * part, in the img_chunk_len - rem_bytes count bytes, has already been + * written by the above write, so we are left with the rem_bytes. + */ + uint8_t wbs_aligned[BOOT_MAX_ALIGN]; + + memset(wbs_aligned, flash_area_erased_val(fap), sizeof(wbs_aligned)); + memcpy(wbs_aligned, img_chunk + img_chunk_len, rem_bytes); + + rc = flash_area_write(fap, curr_off + img_chunk_len, wbs_aligned, + flash_area_align(fap)); + } + + if (rc == 0) { + curr_off += img_chunk_len + rem_bytes; + if (curr_off == img_size) { +#ifdef MCUBOOT_ERASE_PROGRESSIVELY + /* Assure that sector for image trailer was erased. */ + /* Check whether it was erased during previous upload. */ + off_t start = flash_sector_get_off(&status_sector); + + if (erase_range(fap, start, start) < 0) { + rc = MGMT_ERR_EUNKNOWN; + goto out; + } +#endif + rc = BOOT_HOOK_CALL(boot_serial_uploaded_hook, 0, img_num, fap, + img_size); + if (rc) { + BOOT_LOG_ERR("Error %d post upload hook", rc); + goto out; + } + } + } else { + out_invalid_data: + rc = MGMT_ERR_EINVAL; + } + +out: + BOOT_LOG_DBG("RX: 0x%x", rc); + zcbor_map_start_encode(cbor_state, 10); + zcbor_tstr_put_lit_cast(cbor_state, "rc"); + zcbor_int32_put(cbor_state, rc); + if (rc == 0) { + zcbor_tstr_put_lit_cast(cbor_state, "off"); + zcbor_uint32_put(cbor_state, curr_off); + } + zcbor_map_end_encode(cbor_state, 10); + + boot_serial_output(); + +#ifdef MCUBOOT_ENC_IMAGES + /* Check if this upload was for the primary slot */ +#if !defined(MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD) + if (flash_area_id_from_multi_image_slot(img_num, 0) == FLASH_AREA_IMAGE_PRIMARY(0)) +#else + if (flash_area_id_from_direct_image(img_num) == FLASH_AREA_IMAGE_PRIMARY(0)) +#endif + { + if (curr_off == img_size) { + /* Last sector received, now start a decryption on the image if it is encrypted */ + rc = boot_handle_enc_fw(fap); + } + } +#endif + + flash_area_close(fap); +} + +#ifdef MCUBOOT_BOOT_MGMT_ECHO +static void +bs_echo(char *buf, int len) +{ + struct zcbor_string value = { 0 }; + struct zcbor_string key; + bool ok; + uint32_t rc = MGMT_ERR_EINVAL; + + zcbor_state_t zsd[4]; + zcbor_new_state(zsd, sizeof(zsd) / sizeof(zcbor_state_t), (uint8_t *)buf, len, 1, NULL, 0); + + if (!zcbor_map_start_decode(zsd)) { + goto out; + } + + do { + ok = zcbor_tstr_decode(zsd, &key); + + if (ok) { + if (key.len == 1 && *key.value == 'd') { + ok = zcbor_tstr_decode(zsd, &value); + break; + } + + ok = zcbor_any_skip(zsd, NULL); + } + } while (ok); + + if (!ok || !zcbor_map_end_decode(zsd)) { + goto out; + } + + zcbor_map_start_encode(cbor_state, 10); + zcbor_tstr_put_lit(cbor_state, "r"); + if (zcbor_tstr_encode(cbor_state, &value) && zcbor_map_end_encode(cbor_state, 10)) { + boot_serial_output(); + return; + } else { + rc = MGMT_ERR_ENOMEM; + } + +out: + reset_cbor_state(); + bs_rc_rsp(rc); +} +#endif + +/* + * Reset, and (presumably) boot to newly uploaded image. Flush console + * before restarting. + */ +static void +bs_reset(char *buf, int len) +{ + int rc = BOOT_HOOK_CALL(boot_reset_request_hook, 0, false); + if (rc == BOOT_RESET_REQUEST_HOOK_BUSY) { + rc = MGMT_ERR_EBUSY; + } else { + /* Currently whatever else is returned it is just converted + * to 0/no error. Boot serial starts accepting "force" parameter + * in command this needs to change. + */ + rc = 0; + } + bs_rc_rsp(rc); + + if (rc == 0) { +#ifdef __ZEPHYR__ +#ifdef CONFIG_MULTITHREADING + k_sleep(K_MSEC(250)); +#else + k_busy_wait(250000); +#endif + sys_reboot(SYS_REBOOT_COLD); +#elif __ESPRESSIF__ + esp_rom_delay_us(250000); + bootloader_reset(); +#else + os_cputime_delay_usecs(250000); + hal_system_reset(); +#endif + } +} + +/* + * Parse incoming line of input from console. + * Expect newtmgr protocol with serial transport. + */ +void +boot_serial_input(char *buf, int len) +{ + struct nmgr_hdr *hdr; + + hdr = (struct nmgr_hdr *)buf; + if (len < sizeof(*hdr) || + (hdr->nh_op != NMGR_OP_READ && hdr->nh_op != NMGR_OP_WRITE) || + (ntohs(hdr->nh_len) < len - sizeof(*hdr))) { + return; + } + bs_hdr = hdr; + hdr->nh_group = ntohs(hdr->nh_group); + + buf += sizeof(*hdr); + len -= sizeof(*hdr); + + reset_cbor_state(); + + /* + * Limited support for commands. + */ + if (hdr->nh_group == MGMT_GROUP_ID_IMAGE) { + switch (hdr->nh_id) { + case IMGMGR_NMGR_ID_STATE: + bs_list_set(hdr->nh_op, buf, len); + break; + case IMGMGR_NMGR_ID_UPLOAD: + bs_upload(buf, len); + break; +#ifdef MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO + case IMGMGR_NMGR_ID_SLOT_INFO: + bs_slot_info(hdr->nh_op, buf, len); + break; +#endif + default: + bs_rc_rsp(MGMT_ERR_ENOTSUP); + break; + } + } else if (hdr->nh_group == MGMT_GROUP_ID_DEFAULT) { + switch (hdr->nh_id) { +#ifdef MCUBOOT_BOOT_MGMT_ECHO + case NMGR_ID_ECHO: + bs_echo(buf, len); + break; +#endif + case NMGR_ID_CONS_ECHO_CTRL: + bs_rc_rsp(0); + break; + case NMGR_ID_RESET: + bs_reset(buf, len); + break; + default: + bs_rc_rsp(MGMT_ERR_ENOTSUP); + break; + } + } else if (MCUBOOT_PERUSER_MGMT_GROUP_ENABLED == 1) { + if (bs_peruser_system_specific(hdr, buf, len, cbor_state) == 0) { + boot_serial_output(); + } + } else { + bs_rc_rsp(MGMT_ERR_ENOTSUP); + } +#ifdef MCUBOOT_SERIAL_WAIT_FOR_DFU + bs_entry = true; +#endif +} + +static void +boot_serial_output(void) +{ + char *data; + int len, out; + uint16_t crc; + uint16_t totlen; + char pkt_cont[2] = { SHELL_NLIP_DATA_START1, SHELL_NLIP_DATA_START2 }; + char pkt_start[2] = { SHELL_NLIP_PKT_START1, SHELL_NLIP_PKT_START2 }; + char buf[BOOT_SERIAL_OUT_MAX + sizeof(*bs_hdr) + sizeof(crc) + sizeof(totlen)]; + char encoded_buf[BASE64_ENCODE_SIZE(sizeof(buf))]; + + data = bs_obuf; + len = (uintptr_t)cbor_state->payload_mut - (uintptr_t)bs_obuf; + + bs_hdr->nh_op++; + bs_hdr->nh_flags = 0; + bs_hdr->nh_len = htons(len); + bs_hdr->nh_group = htons(bs_hdr->nh_group); + +#ifdef __ZEPHYR__ + crc = crc16_itu_t(CRC16_INITIAL_CRC, (uint8_t *)bs_hdr, sizeof(*bs_hdr)); + crc = crc16_itu_t(crc, data, len); +#elif __ESPRESSIF__ + /* For ESP32 it was used the CRC API in rom/crc.h */ + crc = ~esp_crc16_be(~CRC16_INITIAL_CRC, (uint8_t *)bs_hdr, sizeof(*bs_hdr)); + crc = ~esp_crc16_be(~crc, (uint8_t *)data, len); +#else + crc = crc16_ccitt(CRC16_INITIAL_CRC, bs_hdr, sizeof(*bs_hdr)); + crc = crc16_ccitt(crc, data, len); +#endif + crc = htons(crc); + + totlen = len + sizeof(*bs_hdr) + sizeof(crc); + totlen = htons(totlen); + + memcpy(buf, &totlen, sizeof(totlen)); + totlen = sizeof(totlen); + memcpy(&buf[totlen], bs_hdr, sizeof(*bs_hdr)); + totlen += sizeof(*bs_hdr); + memcpy(&buf[totlen], data, len); + totlen += len; + memcpy(&buf[totlen], &crc, sizeof(crc)); + totlen += sizeof(crc); +#ifdef __ZEPHYR__ + size_t enc_len; + base64_encode(encoded_buf, sizeof(encoded_buf), &enc_len, buf, totlen); + totlen = enc_len; +#elif __ESPRESSIF__ + size_t enc_len; + base64_encode((unsigned char *)encoded_buf, sizeof(encoded_buf), &enc_len, (unsigned char *)buf, totlen); + totlen = enc_len; +#else + totlen = base64_encode(buf, totlen, encoded_buf, 1); +#endif + + out = 0; + while (out < totlen) { + if (out == 0) { + boot_uf->write(pkt_start, sizeof(pkt_start)); + } else { + boot_uf->write(pkt_cont, sizeof(pkt_cont)); + } + + len = MIN(BOOT_SERIAL_FRAME_MTU, totlen - out); + boot_uf->write(&encoded_buf[out], len); + + out += len; + + boot_uf->write("\n", 1); + } + + BOOT_LOG_DBG("TX"); +} + +/* + * Returns 1 if full packet has been received. + */ +static int +boot_serial_in_dec(char *in, int inlen, char *out, int *out_off, int maxout) +{ + size_t rc; + uint16_t crc; + uint16_t len; + +#ifdef __ZEPHYR__ + int err; + err = base64_decode( &out[*out_off], maxout - *out_off, &rc, in, inlen - 2); + if (err) { + return -1; + } +#elif __ESPRESSIF__ + int err; + err = base64_decode((unsigned char *)&out[*out_off], maxout - *out_off, &rc, (unsigned char *)in, inlen); + if (err) { + return -1; + } +#else + if (*out_off + base64_decode_len(in) >= maxout) { + return -1; + } + rc = base64_decode(in, &out[*out_off]); + if (rc < 0) { + return -1; + } +#endif + + *out_off += rc; + if (*out_off <= sizeof(uint16_t)) { + return 0; + } + + len = ntohs(*(uint16_t *)out); + if (len != *out_off - sizeof(uint16_t)) { + return 0; + } + + out += sizeof(uint16_t); +#ifdef __ZEPHYR__ + crc = crc16_itu_t(CRC16_INITIAL_CRC, out, len); +#elif __ESPRESSIF__ + crc = ~esp_crc16_be(~CRC16_INITIAL_CRC, (uint8_t *)out, len); +#else + crc = crc16_ccitt(CRC16_INITIAL_CRC, out, len); +#endif + if (crc || len <= sizeof(crc)) { + return 0; + } + *out_off -= sizeof(crc); + out[*out_off] = '\0'; + + return 1; +} + +/* + * Task which waits reading console, expecting to get image over + * serial port. + */ +static void +boot_serial_read_console(const struct boot_uart_funcs *f,int timeout_in_ms) +{ + int rc; + int off; + int dec_off = 0; + int full_line; + int max_input; + int elapsed_in_ms = 0; + +#ifndef MCUBOOT_SERIAL_WAIT_FOR_DFU + bool allow_idle = true; +#endif + + boot_uf = f; + max_input = sizeof(in_buf); + + off = 0; + while (timeout_in_ms > 0 || bs_entry) { + /* + * Don't enter CPU idle state here if timeout based serial recovery is + * used as otherwise the boot process hangs forever, waiting for input + * from serial console (if single-thread mode is used). + */ +#ifndef MCUBOOT_SERIAL_WAIT_FOR_DFU + if (allow_idle == true) { + MCUBOOT_CPU_IDLE(); + allow_idle = false; + } +#endif + MCUBOOT_WATCHDOG_FEED(); +#ifdef MCUBOOT_SERIAL_WAIT_FOR_DFU + uint32_t start = k_uptime_get_32(); +#endif + rc = f->read(in_buf + off, sizeof(in_buf) - off, &full_line); + if (rc <= 0 && !full_line) { +#ifndef MCUBOOT_SERIAL_WAIT_FOR_DFU + allow_idle = true; +#endif + goto check_timeout; + } + off += rc; + if (!full_line) { + if (off == max_input) { + /* + * Full line, no newline yet. Reset the input buffer. + */ + off = 0; + } + goto check_timeout; + } + if (in_buf[0] == SHELL_NLIP_PKT_START1 && + in_buf[1] == SHELL_NLIP_PKT_START2) { + dec_off = 0; + rc = boot_serial_in_dec(&in_buf[2], off - 2, dec_buf, &dec_off, max_input); + } else if (in_buf[0] == SHELL_NLIP_DATA_START1 && + in_buf[1] == SHELL_NLIP_DATA_START2) { + rc = boot_serial_in_dec(&in_buf[2], off - 2, dec_buf, &dec_off, max_input); + } + + /* serve errors: out of decode memory, or bad encoding */ + if (rc == 1) { + boot_serial_input(&dec_buf[2], dec_off - 2); + } + off = 0; +check_timeout: + /* Subtract elapsed time */ +#ifdef MCUBOOT_SERIAL_WAIT_FOR_DFU + elapsed_in_ms = (k_uptime_get_32() - start); +#endif + timeout_in_ms -= elapsed_in_ms; + } +} + +/* + * Task which waits reading console, expecting to get image over + * serial port. + */ +void +boot_serial_start(const struct boot_uart_funcs *f) +{ + bs_entry = true; + boot_serial_read_console(f,0); +} + +#ifdef MCUBOOT_SERIAL_WAIT_FOR_DFU +/* + * Task which waits reading console for a certain amount of timeout. + * If within this timeout no mcumgr command is received, the function is + * returning, else the serial boot is never exited + */ +void +boot_serial_check_start(const struct boot_uart_funcs *f, int timeout_in_ms) +{ + bs_entry = false; + boot_serial_read_console(f,timeout_in_ms); +} +#endif + +#ifdef MCUBOOT_SERIAL_IMG_GRP_HASH +/* Function to find the hash of an image, returns 0 on success. */ +static int boot_serial_get_hash(const struct image_header *hdr, + const struct flash_area *fap, uint8_t *hash) +{ + struct image_tlv_iter it; + uint32_t offset; + uint16_t len; + uint16_t type; + int rc; + + /* Manifest data is concatenated to the end of the image. + * It is encoded in TLV format. + */ + rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_ANY, false); + if (rc) { + return -1; + } + + /* Traverse through the TLV area to find the image hash TLV. */ + while (true) { + rc = bootutil_tlv_iter_next(&it, &offset, &len, &type); + if (rc < 0) { + return -1; + } else if (rc > 0) { + break; + } + + if (type == IMAGE_SHA_TLV) { + /* Get the image's hash value from the manifest section. */ + if (len != IMAGE_HASH_SIZE) { + return -1; + } + + rc = flash_area_read(fap, offset, hash, len); + if (rc) { + return -1; + } + + return 0; + } + } + + return -1; +} +#endif diff --git a/bootloader/mcuboot/boot/boot_serial/src/boot_serial_encryption.c b/bootloader/mcuboot/boot/boot_serial/src/boot_serial_encryption.c new file mode 100644 index 0000000..c4bd7d8 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/src/boot_serial_encryption.c @@ -0,0 +1,308 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2020-2023 Nordic Semiconductor ASA + * Copyright (c) 2020 Arm Limited + */ + +#include +#include "bootutil/image.h" +#include <../src/bootutil_priv.h> +#include "bootutil/bootutil_log.h" +#include "bootutil/bootutil_public.h" +#include "bootutil/fault_injection_hardening.h" +#include "bootutil/enc_key.h" + +#include "mcuboot_config/mcuboot_config.h" + +#ifdef MCUBOOT_ENC_IMAGES + +BOOT_LOG_MODULE_DECLARE(serial_encryption); + +fih_ret +boot_image_validate_encrypted(const struct flash_area *fa_p, + struct image_header *hdr, uint8_t *buf, + uint16_t buf_size) +{ + FIH_DECLARE(fih_rc, FIH_FAILURE); + + struct boot_loader_state boot_data; + struct boot_loader_state *state = &boot_data; + struct boot_status _bs; + struct boot_status *bs = &_bs; + uint8_t image_index; + int rc; + + memset(&boot_data, 0, sizeof(struct boot_loader_state)); + image_index = BOOT_CURR_IMG(state); + if(IS_ENCRYPTED(hdr)) { + rc = boot_enc_load(BOOT_CURR_ENC(state), 1, hdr, fa_p, bs); + if (rc < 0) { + FIH_RET(fih_rc); + } + rc = boot_enc_set_key(BOOT_CURR_ENC(state), 1, bs); + if (rc < 0) { + FIH_RET(fih_rc); + } + } + FIH_CALL(bootutil_img_validate, fih_rc, BOOT_CURR_ENC(state), image_index, + hdr, fa_p, buf, buf_size, NULL, 0, NULL); + + FIH_RET(fih_rc); +} + +/* + * Compute the total size of the given image. Includes the size of + * the TLVs. + */ +static int +read_image_size(const struct flash_area *fa_p, + struct image_header *hdr, + uint32_t *size) +{ + struct image_tlv_info info; + uint32_t off; + uint32_t protect_tlv_size; + int rc; + + off = BOOT_TLV_OFF(hdr); + + if (flash_area_read(fa_p, off, &info, sizeof(info))) { + rc = BOOT_EFLASH; + goto done; + } + + protect_tlv_size = hdr->ih_protect_tlv_size; + if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) { + if (protect_tlv_size != info.it_tlv_tot) { + rc = BOOT_EBADIMAGE; + goto done; + } + + if (flash_area_read(fa_p, off + info.it_tlv_tot, &info, sizeof(info))) { + rc = BOOT_EFLASH; + goto done; + } + } else if (protect_tlv_size != 0) { + rc = BOOT_EBADIMAGE; + goto done; + } + + if (info.it_magic != IMAGE_TLV_INFO_MAGIC) { + rc = BOOT_EBADIMAGE; + goto done; + } + + *size = off + protect_tlv_size + info.it_tlv_tot; + rc = 0; + +done: + return rc; +} + +/** + * reads, decrypts in RAM & write back the decrypted image in the same region + * This function is NOT power failsafe since the image is decrypted in the RAM + * buffer. + * + * @param flash_area The ID of the source flash area. + * @param off_src The offset within the flash area to + * copy from. + * @param sz The number of bytes to copy. should match erase sector + * + * @return 0 on success; nonzero on failure. + */ +static int +decrypt_region_inplace(struct boot_loader_state *state, + const struct flash_area *fap, + struct image_header *hdr, + uint32_t off, uint32_t sz) +{ + uint32_t bytes_copied; + int chunk_sz; + int rc; + uint32_t tlv_off; + size_t blk_off; + uint16_t idx; + uint32_t blk_sz; + int slot = flash_area_id_to_multi_image_slot(BOOT_CURR_IMG(state), + flash_area_get_id(fap)); + uint8_t buf[sz] __attribute__((aligned)); + assert(sz <= sizeof buf); + assert(slot >= 0); + + bytes_copied = 0; + while (bytes_copied < sz) { + if (sz - bytes_copied > sizeof buf) { + chunk_sz = sizeof buf; + } else { + chunk_sz = sz - bytes_copied; + } + + rc = flash_area_read(fap, off + bytes_copied, buf, chunk_sz); + if (rc != 0) { + return BOOT_EFLASH; + } + + if (IS_ENCRYPTED(hdr)) { + blk_sz = chunk_sz; + idx = 0; + if (off + bytes_copied < hdr->ih_hdr_size) { + /* do not decrypt header */ + if (hdr->ih_hdr_size > (off + bytes_copied + chunk_sz)) { + /* all bytes in header, skip decryption */ + blk_sz = 0; + } + else { + blk_sz = off + bytes_copied + chunk_sz - hdr->ih_hdr_size; + } + + blk_off = 0; + idx = hdr->ih_hdr_size; + } else { + blk_off = ((off + bytes_copied) - hdr->ih_hdr_size) & 0xf; + } + tlv_off = BOOT_TLV_OFF(hdr); + if (off + bytes_copied + chunk_sz > tlv_off) { + /* do not decrypt TLVs */ + if (off + bytes_copied >= tlv_off) { + blk_sz = 0; + } else { + blk_sz = tlv_off - (off + bytes_copied); + } + } + boot_enc_decrypt(BOOT_CURR_ENC(state), slot, + (off + bytes_copied + idx) - hdr->ih_hdr_size, blk_sz, + blk_off, &buf[idx]); + } + rc = flash_area_erase(fap, off + bytes_copied, chunk_sz); + if (rc != 0) { + return BOOT_EFLASH; + } + rc = flash_area_write(fap, off + bytes_copied, buf, chunk_sz); + if (rc != 0) { + return BOOT_EFLASH; + } + + bytes_copied += chunk_sz; + + MCUBOOT_WATCHDOG_FEED(); + } + + return 0; +} + +/** + * Check if a image was encrypted into the first slot, and decrypt it + * in place. this operation is not power failsafe. + * + * The operation is done by checking the last flash sector, and using it as a + * temporarely scratch partition. The + * + * @param[in] fa_p flash area pointer + * @param[in] hdr boot image header pointer + * + * @return FIH_SUCCESS on success, error code otherwise + */ +inline static fih_ret +decrypt_image_inplace(const struct flash_area *fa_p, + struct image_header *hdr) +{ + FIH_DECLARE(fih_rc, FIH_FAILURE); + int rc; + struct boot_loader_state boot_data; + struct boot_loader_state *state = &boot_data; + struct boot_status _bs; + struct boot_status *bs = &_bs; + size_t size; + size_t sect_size; + size_t sect_count; + size_t sect; + struct flash_sector sector; + + memset(&boot_data, 0, sizeof(struct boot_loader_state)); + memset(&_bs, 0, sizeof(struct boot_status)); + + /* Get size from last sector to know page/sector erase size */ + rc = flash_area_get_sector(fa_p, boot_status_off(fa_p), §or); + + + if(IS_ENCRYPTED(hdr)) { +#if 0 //Skip this step?, the image will just not boot if it's not decrypted properly + static uint8_t tmpbuf[BOOT_TMPBUF_SZ]; + /* First check if the encrypted image is a good image before decrypting */ + FIH_CALL(boot_image_validate_encrypted,fih_rc,fa_p,&_hdr,tmpbuf,BOOT_TMPBUF_SZ); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_RET(fih_rc); + } +#endif + memset(&boot_data, 0, sizeof(struct boot_loader_state)); + /* Load the encryption keys into cache */ + rc = boot_enc_load(BOOT_CURR_ENC(state), 0, hdr, fa_p, bs); + if (rc < 0) { + FIH_RET(fih_rc); + } + if (rc == 0 && boot_enc_set_key(BOOT_CURR_ENC(state), 0, bs)) { + FIH_RET(fih_rc); + } + } + else + { + /* Expected encrypted image! */ + FIH_RET(fih_rc); + } + + uint32_t src_size = 0; + rc = read_image_size(fa_p,hdr, &src_size); + if (rc != 0) { + FIH_RET(fih_rc); + } + + /* TODO: This assumes every sector has an equal size, should instead use + * flash_area_get_sectors() to get the size of each sector and iterate + * over it. + */ + sect_size = sector.fs_size; + sect_count = fa_p->fa_size / sect_size; + for (sect = 0, size = 0; size < src_size && sect < sect_count; sect++) { + rc = decrypt_region_inplace(state, fa_p,hdr, size, sect_size); + if (rc != 0) { + FIH_RET(fih_rc); + } + size += sect_size; + } + + fih_rc = FIH_SUCCESS; + FIH_RET(fih_rc); +} + +int +boot_handle_enc_fw(const struct flash_area *flash_area) +{ + int rc = -1; + struct image_header _hdr = { 0 }; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + rc = boot_image_load_header(flash_area, &_hdr); + if (rc != 0) { + goto out; + } + + if (IS_ENCRYPTED(&_hdr)) { + //encrypted, we need to decrypt in place + FIH_CALL(decrypt_image_inplace,fih_rc,flash_area,&_hdr); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + rc = -1; + goto out; + } + } + else + { + rc = 0; + } + +out: + return rc; +} + +#endif diff --git a/bootloader/mcuboot/boot/boot_serial/src/boot_serial_priv.h b/bootloader/mcuboot/boot/boot_serial/src/boot_serial_priv.h new file mode 100644 index 0000000..1801da1 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/src/boot_serial_priv.h @@ -0,0 +1,106 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef __BOOTUTIL_SERIAL_PRIV_H__ +#define __BOOTUTIL_SERIAL_PRIV_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * From shell.h + */ +#define SHELL_NLIP_PKT_START1 6 +#define SHELL_NLIP_PKT_START2 9 + +#define SHELL_NLIP_DATA_START1 4 +#define SHELL_NLIP_DATA_START2 20 + +/* + * From newtmgr.h + */ +#define MGMT_ERR_OK 0 +#define MGMT_ERR_EUNKNOWN 1 +#define MGMT_ERR_ENOMEM 2 +#define MGMT_ERR_EINVAL 3 +#define MGMT_ERR_ENOENT 5 +#define MGMT_ERR_ENOTSUP 8 +#define MGMT_ERR_EBUSY 10 + +#define NMGR_OP_READ 0 +#define NMGR_OP_WRITE 2 + +#define MGMT_GROUP_ID_DEFAULT 0 +#define MGMT_GROUP_ID_IMAGE 1 +#define MGMT_GROUP_ID_PERUSER 64 + +#define NMGR_ID_ECHO 0 +#define NMGR_ID_CONS_ECHO_CTRL 1 +#define NMGR_ID_RESET 5 + +#ifndef __packed +#define __packed __attribute__((__packed__)) +#endif + +struct nmgr_hdr { +#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) + uint8_t _res1:3; + uint8_t nh_version:2; + uint8_t nh_op:3; /* NMGR_OP_XXX */ +#else + uint8_t nh_op:3; /* NMGR_OP_XXX */ + uint8_t nh_version:2; + uint8_t _res1:3; +#endif + uint8_t nh_flags; + uint16_t nh_len; /* length of the payload */ + uint16_t nh_group; /* NMGR_GROUP_XXX */ + uint8_t nh_seq; /* sequence number */ + uint8_t nh_id; /* message ID within group */ +} __packed; + +/* + * From imgmgr.h + */ +#define IMGMGR_NMGR_ID_STATE 0 +#define IMGMGR_NMGR_ID_UPLOAD 1 +#define IMGMGR_NMGR_ID_SLOT_INFO 6 + +void boot_serial_input(char *buf, int len); +extern const struct boot_uart_funcs *boot_uf; + +/** + * @brief Selects direct image to upload according to the "image" + * parameter of the mcumgr update frame. + * + * @param[in] image_id the value of the "image" parameter of the + * mcumgr update frame to be translated. + * + * @return flash area ID for the image if defined; + * -EINVAL when flash area for given image number has not been + * defined. + */ +extern int flash_area_id_from_direct_image(int image_id); + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOTUTIL_SERIAL_PRIV_H__ */ diff --git a/bootloader/mcuboot/boot/boot_serial/src/zcbor_bulk.c b/bootloader/mcuboot/boot/boot_serial/src/zcbor_bulk.c new file mode 100644 index 0000000..35ae0bd --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/src/zcbor_bulk.c @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2022 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include "zcbor_bulk.h" + +int zcbor_map_decode_bulk(zcbor_state_t *zsd, struct zcbor_map_decode_key_val *map, + size_t map_size, size_t *matched) +{ + bool ok; + struct zcbor_map_decode_key_val *dptr = map; + + if (!zcbor_map_start_decode(zsd)) { + return -EBADMSG; + } + + *matched = 0; + ok = true; + + do { + struct zcbor_string key; + bool found = false; + size_t map_count = 0; + + ok = zcbor_tstr_decode(zsd, &key); + + while (ok && map_count < map_size) { + if (dptr >= (map + map_size)) { + dptr = map; + } + + if (key.len == dptr->key.len && + memcmp(key.value, dptr->key.value, key.len) == 0) { + + if (dptr->found) { + return -EADDRINUSE; + } + if (!dptr->decoder(zsd, dptr->value_ptr)) { + /* Failure to decode value matched to key + * means that either decoder has been + * incorrectly assigned or SMP payload + * is broken anyway. + */ + return -ENOMSG; + } + + dptr->found = true; + found = true; + ++dptr; + ++(*matched); + break; + } + + ++dptr; + ++map_count; + } + + if (!found && ok) { + ok = zcbor_any_skip(zsd, NULL); + } + } while (ok); + + return zcbor_map_end_decode(zsd) ? 0 : -EBADMSG; +} diff --git a/bootloader/mcuboot/boot/boot_serial/src/zcbor_bulk.h b/bootloader/mcuboot/boot/boot_serial/src/zcbor_bulk.h new file mode 100644 index 0000000..3b7c42f --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/src/zcbor_bulk.h @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2022 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef H_ZCBOR_BULK_PRIV_ +#define H_ZCBOR_BULK_PRIV_ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __ZEPHYR__ +#include +#include +#else +#include "zcbor_common.h" +#include "zcbor_decode.h" +#endif + +/** @cond INTERNAL_HIDDEN */ + +struct zcbor_map_decode_key_val { + struct zcbor_string key; /* Map key string */ + zcbor_decoder_t *decoder; /* Key corresponding decoder */ + void *value_ptr; + bool found; +}; + +/** @brief Define single key-decoder mapping + * + * The macro creates a single zcbor_map_decode_key_val type object. + * + * @param k key is "" enclosed string representing key; + * @param dec decoder function; this should be zcbor_decoder_t + * type function from zcbor or a user provided implementation + * compatible with the type. + * @param vp non-NULL pointer for result of decoding; should correspond + * to type served by decoder function for the mapping. + */ +#define ZCBOR_MAP_DECODE_KEY_DECODER(k, dec, vp) \ + { \ + { \ + .value = (uint8_t *)k, \ + .len = sizeof(k) - 1, \ + }, \ + .decoder = (zcbor_decoder_t *)dec, \ + .value_ptr = vp, \ + } + +/** @brief Define single key-value decode mapping + * + * ZCBOR_MAP_DECODE_KEY_DECODER should be used instead of this macro as, + * this macro does not allow keys with whitespaces embeeded, which CBOR + * does allow. + * + * The macro creates a single zcbor_map_decode_key_val type object. + * + * @param k key; the @p k will be stringified so should be given + * without ""; + * @param dec decoder function; this should be zcbor_decoder_t + * type function from zcbor or a user provided implementation + * compatible with the type. + * @param vp non-NULL pointer for result of decoding; should correspond + * to type served by decoder function for the mapping. + */ +#define ZCBOR_MAP_DECODE_KEY_VAL(k, dec, vp) \ + ZCBOR_MAP_DECODE_KEY_DECODER(STRINGIFY(k), dec, vp) + +/** @brief Decodes single level map according to a provided key-decode map. + * + * The function takes @p map of key to decoder array defined as: + * + * struct zcbor_map_decode_key_val map[] = { + * ZCBOR_MAP_DECODE_KEY_DECODER("key0", decode_fun0, val_ptr0), + * ZCBOR_MAP_DECODE_KEY_DECODER("key1", decode_fun1, val_ptr1), + * ... + * }; + * + * where "key?" is string representing key; the decode_fun? is + * zcbor_decoder_t compatible function, either from zcbor or defined by + * user; val_ptr? are pointers to variables where decoder function for + * a given key will place a decoded value - they have to agree in type + * with decoder function. + * + * Failure to decode any of values will cause the function to return + * negative error, and leave the map open: map is broken anyway or key-decoder + * mapping is broken, and we can not really decode the map. + * + * Note that the function opens map by itself and will fail if map + * is already opened. + * + * @param zsd zcbor decoder state; + * @param map key-decoder mapping list; + * @param map_size size of maps, both maps have to have the same size; + * @param matched pointer to the counter of matched keys, zeroed upon + * successful map entry and incremented only for successful + * decoded fields. + * @return 0 when the whole map has been parsed, there have been + * no decoding errors, and map has been closed successfully; + * -ENOMSG when given decoder function failed to decode + * value; + * -EADDRINUSE when key appears twice within map, map is then + * parsed up to they key that has appeared twice; + * -EBADMSG when failed to close map. + */ +int zcbor_map_decode_bulk(zcbor_state_t *zsd, struct zcbor_map_decode_key_val *map, + size_t map_size, size_t *matched); + +/** @endcond */ + +#ifdef __cplusplus +} +#endif + +#endif /* H_ZCBOR_BULK_PRIV_ */ diff --git a/bootloader/mcuboot/boot/boot_serial/syscfg.yml b/bootloader/mcuboot/boot/boot_serial/syscfg.yml new file mode 100644 index 0000000..e479bd5 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/syscfg.yml @@ -0,0 +1,96 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +syscfg.defs: + BOOT_SERIAL_DETECT_PIN: + description: > + Start the serial boot loader if this pin is asserted at boot time. + value: '-1' + restrictions: + - '(BOOT_SERIAL_DETECT_PIN != -1) || + (BOOT_SERIAL_DETECT_TIMEOUT != 0) || + (BOOT_SERIAL_NVREG_INDEX != -1)' + + BOOT_SERIAL_DETECT_PIN_CFG: + description: > + GPIO configuration for the serial boot loader detect pin. + value: 'HAL_GPIO_PULL_UP' + + BOOT_SERIAL_DETECT_PIN_VAL: + description: > + The value the detect pin must be set to for the serial boot loader + to start. + value: 0 + + BOOT_SERIAL_DETECT_TIMEOUT: + description: > + The duration, in milliseconds, to listen on the UART for the + management string (BOOT_SERIAL_DETECT_STRING). If the management + string is detected during this period, the serial boot loader is + started. If the period expires without the management string being + received, the boot loader runs in the normal (non-serial) mode. + Specify 0 to disable listening on the UART for the management + string. + value: 0 + restrictions: + - '(BOOT_SERIAL_DETECT_PIN != -1) || + (BOOT_SERIAL_DETECT_TIMEOUT != 0) || + (BOOT_SERIAL_NVREG_INDEX != -1)' + + BOOT_SERIAL_DETECT_STRING: + description: > + The string to listen for on the UART. If this management string is + detected during the timeout period, the serial boot loader is + started. If the period expires without this string being received, + the boot loader runs in the normal (non-serial) mode. This setting + has no effect if BOOT_SERIAL_DETECT_TIMEOUT is set to 0. + value: '"nmgr"' + + BOOT_SERIAL_REPORT_PIN: + description: > + The GPIO to toggle while the serial boot loader is running. Set to + -1 to disable reporting. + value: 'LED_BLINK_PIN' + + BOOT_SERIAL_REPORT_FREQ: + description: > + The toggle rate, in Hz, of the serial boot loader report pin. + value: 4 + + BOOT_SERIAL_NVREG_MAGIC: + description: > + Magic number, to be saved in a retained (reset-surviving) register. + If the value in the register matches, the serial bootloader will + load. Value must not be 0. + value: 0xB7 + restrictions: + - '(BOOT_SERIAL_NVREG_MAGIC != 0)' + + BOOT_SERIAL_NVREG_INDEX: + description: > + Index of retained register to use (using hal_nvreg_read) for reading + magic value. + value: -1 + restrictions: + - '(BOOT_SERIAL_DETECT_PIN != -1) || + (BOOT_SERIAL_DETECT_TIMEOUT != 0) || + (BOOT_SERIAL_NVREG_INDEX != -1)' + + BOOT_SERIAL_MGMT_ECHO: + description: If enabled, support for the mcumgr echo command is being added. + value: 0 diff --git a/bootloader/mcuboot/boot/boot_serial/test/pkg.yml b/bootloader/mcuboot/boot/boot_serial/test/pkg.yml new file mode 100644 index 0000000..5f55728 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/test/pkg.yml @@ -0,0 +1,35 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# +pkg.name: boot/boot_serial/test +pkg.type: unittest +pkg.description: "Boot serial unit tests." +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: + +pkg.deps: + - "@mcuboot/boot/boot_serial" + - "@mcuboot/boot/bootutil" + - "@apache-mynewt-core/sys/log/stub" + - "@apache-mynewt-core/test/testutil" + +pkg.deps.SELFTEST: + - "@apache-mynewt-core/sys/console/stub" + +pkg.cflags: + - '-DMCUBOOT_MYNEWT=1' diff --git a/bootloader/mcuboot/boot/boot_serial/test/src/boot_test.c b/bootloader/mcuboot/boot/boot_serial/test/src/boot_test.c new file mode 100644 index 0000000..e8deb7e --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/test/src/boot_test.c @@ -0,0 +1,85 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +#include +#include +#include +#include +#include +#include +#include "syscfg/syscfg.h" +#include "sysflash/sysflash.h" +#include "os/endian.h" +#include "base64/base64.h" +#include "crc/crc16.h" +#include "testutil/testutil.h" +#include "hal/hal_flash.h" +#include "flash_map_backend/flash_map_backend.h" + +#include "boot_serial/boot_serial.h" +#include "boot_serial_priv.h" + +TEST_CASE_DECL(boot_serial_setup) +TEST_CASE_DECL(boot_serial_empty_msg) +TEST_CASE_DECL(boot_serial_empty_img_msg) +TEST_CASE_DECL(boot_serial_img_msg) +TEST_CASE_DECL(boot_serial_upload_bigger_image) + +static void +test_uart_write(const char *str, int len) +{ +} + +static const struct boot_uart_funcs test_uart = { + .write = test_uart_write +}; + +void +tx_msg(void *src, int len) +{ + boot_serial_input(src, len); +} + +TEST_SUITE(boot_serial_suite) +{ + boot_serial_setup(); + boot_serial_empty_msg(); + boot_serial_empty_img_msg(); + boot_serial_img_msg(); + boot_serial_upload_bigger_image(); +} + +int +boot_serial_test(void) +{ + boot_uf = &test_uart; + boot_serial_suite(); + return tu_any_failed; +} + +#if MYNEWT_VAL(SELFTEST) +int +main(void) +{ + sysinit(); + + boot_serial_test(); + + return tu_any_failed; +} +#endif diff --git a/bootloader/mcuboot/boot/boot_serial/test/src/boot_test.h b/bootloader/mcuboot/boot/boot_serial/test/src/boot_test.h new file mode 100644 index 0000000..2139d9f --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/test/src/boot_test.h @@ -0,0 +1,50 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +#ifndef _BOOT_TEST_H +#define _BOOT_TEST_H + +#include +#include +#include +#include +#include +#include +#include "syscfg/syscfg.h" +#include "sysflash/sysflash.h" +#include "os/endian.h" +#include "base64/base64.h" +#include "crc/crc16.h" +#include "testutil/testutil.h" +#include "hal/hal_flash.h" +#include "flash_map_backend/flash_map_backend.h" +#include "bootutil/bootutil.h" + +#include "boot_serial_priv.h" + +#ifdef __cplusplus +extern "C" { +#endif + +void tx_msg(void *src, int len); + +#ifdef __cplusplus +} +#endif + +#endif /* _BOOT_TEST_H */ diff --git a/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_empty_img_msg.c b/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_empty_img_msg.c new file mode 100644 index 0000000..a5e7174 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_empty_img_msg.c @@ -0,0 +1,35 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +#include "boot_test.h" + +TEST_CASE(boot_serial_empty_img_msg) +{ + char buf[sizeof(struct nmgr_hdr) + 32]; + struct nmgr_hdr *hdr; + + hdr = (struct nmgr_hdr *)buf; + memset(hdr, 0, sizeof(*hdr)); + hdr->nh_op = NMGR_OP_WRITE; + hdr->nh_group = htons(MGMT_GROUP_ID_IMAGE); + hdr->nh_id = IMGMGR_NMGR_ID_UPLOAD; + hdr->nh_len = htons(2); + strcpy((char *)(hdr + 1), "{}"); + + tx_msg(buf, sizeof(*hdr) + 2); +} diff --git a/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_empty_msg.c b/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_empty_msg.c new file mode 100644 index 0000000..12b6457 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_empty_msg.c @@ -0,0 +1,37 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +#include "boot_test.h" + +TEST_CASE(boot_serial_empty_msg) +{ + char buf[4]; + struct nmgr_hdr hdr; + + tx_msg(buf, 0); + + strcpy(buf, "--"); + tx_msg(buf, 2); + + memset(&hdr, 0, sizeof(hdr)); + tx_msg(&hdr, sizeof(hdr)); + + hdr.nh_op = NMGR_OP_WRITE; + + tx_msg(&hdr, sizeof(hdr)); +} diff --git a/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_img_msg.c b/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_img_msg.c new file mode 100644 index 0000000..7aa9590 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_img_msg.c @@ -0,0 +1,70 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include "boot_test.h" + +TEST_CASE(boot_serial_img_msg) +{ + char img[16]; + char enc_img[BASE64_ENCODE_SIZE(sizeof(img)) + 1]; + char buf[sizeof(struct nmgr_hdr) + sizeof(enc_img) + 32]; + int len; + int rc; + struct nmgr_hdr *hdr; + const struct flash_area *fap; + + /* 00000000 a3 64 64 61 74 61 58 10 |.ddataX.| + * 00000008 a5 a5 a5 a5 a5 a5 a5 a5 |........| + * 00000010 a5 a5 a5 a5 a5 a5 a5 a5 |........| + * 00000018 63 6c 65 6e 1a 00 01 14 |clen....| + * 00000020 e8 63 6f 66 66 00 |.coff.| + */ + static const uint8_t payload[] = { + 0xa3, 0x64, 0x64, 0x61, 0x74, 0x61, 0x58, 0x10, + /* 16 bytes of image data starts here. */ + 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, + 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, + 0x63, 0x6c, 0x65, 0x6e, 0x1a, 0x00, 0x01, 0x14, + 0xe8, 0x63, 0x6f, 0x66, 0x66, 0x00, + }; + + memset(img, 0xa5, sizeof(img)); + + hdr = (struct nmgr_hdr *)buf; + memset(hdr, 0, sizeof(*hdr)); + hdr->nh_op = NMGR_OP_WRITE; + hdr->nh_group = htons(MGMT_GROUP_ID_IMAGE); + hdr->nh_id = IMGMGR_NMGR_ID_UPLOAD; + + memcpy(hdr + 1, payload, sizeof payload); + hdr->nh_len = htons(sizeof payload); + + len = sizeof(*hdr) + sizeof payload; + tx_msg(buf, len); + + /* + * Validate contents inside the primary slot + */ + rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(0), &fap); + assert(rc == 0); + + rc = flash_area_read(fap, 0, enc_img, sizeof(img)); + assert(rc == 0); + assert(!memcmp(enc_img, img, sizeof(img))); +} diff --git a/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_setup.c b/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_setup.c new file mode 100644 index 0000000..791e845 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_setup.c @@ -0,0 +1,24 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +#include "boot_test.h" + +TEST_CASE(boot_serial_setup) +{ + +} diff --git a/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_upload_bigger_image.c b/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_upload_bigger_image.c new file mode 100644 index 0000000..d8b3185 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/test/src/testcases/boot_serial_upload_bigger_image.c @@ -0,0 +1,117 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include + +#include "boot_test.h" +#include "zcbor_common.h" + +TEST_CASE(boot_serial_upload_bigger_image) +{ + char img[256]; + char enc_img[64]; + char buf[sizeof(struct nmgr_hdr) + 128]; + int len; + int off; + int rc; + struct nmgr_hdr *hdr; + const struct flash_area *fap; + int i; + + const int payload_off = sizeof *hdr; + const int img_data_off = payload_off + 8; + + /* 00000000 a3 64 64 61 74 61 58 20 |.ddataX.| + * 00000008 00 00 00 00 00 00 00 00 |........| + * 00000010 00 00 00 00 00 00 00 00 |........| + * 00000018 00 00 00 00 00 00 00 00 |........| + * 00000020 00 00 00 00 00 00 00 00 |........| + * 00000028 63 6c 65 6e 1a 00 01 14 |clen....| + * 00000030 e8 63 6f 66 66 00 |.coff.| + */ + static const uint8_t payload_first[] = { + 0xa3, 0x64, 0x64, 0x61, 0x74, 0x61, 0x58, 0x20, + /* 32 bytes of image data starts here. */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x63, 0x6c, 0x65, 0x6e, 0x1a, 0x00, 0x01, 0x14, + 0xe8, 0x63, 0x6f, 0x66, 0x66, 0x00, + }; + + /* 00000000 a3 64 64 61 74 61 58 20 |.ddataX.| + * 00000008 00 00 00 00 00 00 00 00 |........| + * 00000010 00 00 00 00 00 00 00 00 |........| + * 00000018 00 00 00 00 00 00 00 00 |........| + * 00000020 00 00 00 00 00 00 00 00 |........| + * 00000028 63 6f 66 66 00 00 |coff..| + */ + static const uint8_t payload_next[] = { + 0xa2, 0x64, 0x64, 0x61, 0x74, 0x61, 0x58, 0x20, + /* 32 bytes of image data starts here. */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x63, 0x6f, 0x66, 0x66, + /* 2 bytes of offset value starts here. */ + 0x00, 0x00 + }; + + for (i = 0; i < sizeof(img); i++) { + img[i] = i; + } + + for (off = 0; off < sizeof(img); off += 32) { + hdr = (struct nmgr_hdr *)buf; + memset(hdr, 0, sizeof(*hdr)); + hdr->nh_op = NMGR_OP_WRITE; + hdr->nh_group = htons(MGMT_GROUP_ID_IMAGE); + hdr->nh_id = IMGMGR_NMGR_ID_UPLOAD; + + if (off) { + memcpy(buf + payload_off, payload_next, sizeof payload_next); + len = sizeof payload_next; + buf[payload_off + len - 2] = ZCBOR_VALUE_IS_1_BYTE; + buf[payload_off + len - 1] = off; + } else { + memcpy(buf + payload_off, payload_first, sizeof payload_first); + len = sizeof payload_first; + } + memcpy(buf + img_data_off, img + off, 32); + hdr->nh_len = htons(len); + + len = sizeof(*hdr) + len; + + tx_msg(buf, len); + } + + /* + * Validate contents inside the primary slot + */ + rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(0), &fap); + assert(rc == 0); + + for (off = 0; off < sizeof(img); off += sizeof(enc_img)) { + rc = flash_area_read(fap, off, enc_img, sizeof(enc_img)); + assert(rc == 0); + assert(!memcmp(enc_img, &img[off], sizeof(enc_img))); + } +} diff --git a/bootloader/mcuboot/boot/boot_serial/test/syscfg.yml b/bootloader/mcuboot/boot/boot_serial/test/syscfg.yml new file mode 100644 index 0000000..ff841d6 --- /dev/null +++ b/bootloader/mcuboot/boot/boot_serial/test/syscfg.yml @@ -0,0 +1,23 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +# Package: boot/boot_serial/test + +syscfg.vals: + # This is here to work around the $notnull syscfg restriction. + BOOT_SERIAL_DETECT_PIN: 0 diff --git a/bootloader/mcuboot/boot/bootutil/CMakeLists.txt b/bootloader/mcuboot/boot/bootutil/CMakeLists.txt new file mode 100644 index 0000000..9097706 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/CMakeLists.txt @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# Copyright (c) 2020-2023, Arm Limited. All rights reserved. +# +# SPDX-License-Identifier: Apache-2.0 +# +#------------------------------------------------------------------------------ + +add_library(bootutil STATIC) + +target_include_directories(bootutil + PUBLIC + include + PRIVATE + src +) + +target_sources(bootutil + PRIVATE + src/boot_record.c + src/bootutil_misc.c + src/bootutil_public.c + src/caps.c + src/encrypted.c + src/fault_injection_hardening.c + src/fault_injection_hardening_delay_rng_mbedtls.c + src/image_ecdsa.c + src/image_ed25519.c + src/image_rsa.c + src/image_validate.c + src/loader.c + src/swap_misc.c + src/swap_move.c + src/swap_scratch.c + src/tlv.c +) diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/bench.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/bench.h new file mode 100644 index 0000000..1e7195c --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/bench.h @@ -0,0 +1,68 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2019 Linaro Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef H_BOOTUTIL_BENCH_H__ +#define H_BOOTUTIL_BENCH_H__ + +#include "ignore.h" + +#ifdef MCUBOOT_USE_BENCH + +/* The platform-specific benchmark code should define a + * `bench_state_t` type that holds the information needed for the + * benchmark. This is generally something small, such as an integer + * holding the state. This should also define plat_bench_start and + * plat_bench_end, which likely have to be macros so that log messages + * come from the right place in the code. */ +#include + +/* + * These are simple barrier-type benchmarks. If a platform has + * benchmarks that are enabled, calling `boot_bench_start()` before a + * block of code and `boot_bench_stop()` after that block of code will + * present this information in some manner (usually through logging). + * The details of what is measured and how it is printed are specific + * to the platform and the implementation. A pointer to the + * platform-specific state should be passed in. + */ +#define boot_bench_start(_state) do { \ + plat_bench_start(_state); \ +} while (0) + +#define boot_bench_stop(_state) do { \ + plat_bench_stop(_state); \ +} while (0) + +#else /* not MCUBOOT_USE_BENCH */ + +/* The type needs to take space. As long as it remains unused, the C + * compiler should eliminate this value entirely. */ +typedef int bench_state_t; + +/* Without benchmarking enabled, these are just empty. */ +#define boot_bench_start(_state) do { \ + IGNORE(_state); \ +} while(0) + +#define boot_bench_stop(_state) do { \ + IGNORE(_state); \ +} while(0) + +#endif /* not MCUBOOT_USE_BENCH */ + +#endif /* not H_BOOTUTIL_BENCH_H__ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_hooks.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_hooks.h new file mode 100644 index 0000000..6d4a34e --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_hooks.h @@ -0,0 +1,181 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2021 Nordic Semiconductor ASA + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +/** + * @file + * @brief Hooks definition implementation API + * + * This file contains API interface definition for hooks which can be + * implemented to overide or to amend some of MCUboot's native routines. + */ + +#ifndef H_BOOTUTIL_HOOKS +#define H_BOOTUTIL_HOOKS + +#ifdef MCUBOOT_IMAGE_ACCESS_HOOKS + +#define BOOT_HOOK_CALL(f, ret_default, ...) f(__VA_ARGS__) + +#define BOOT_HOOK_CALL_FIH(f, fih_ret_default, fih_rc, ...) \ + do { \ + FIH_CALL(f, fih_rc, __VA_ARGS__); \ + } while(0); + +#else + +#define BOOT_HOOK_CALL(f, ret_default, ...) ret_default + +#define BOOT_HOOK_CALL_FIH(f, fih_ret_default, fih_rc, ...) \ + do { \ + fih_rc = fih_ret_default; \ + } while(0); + +#endif + +/** Hook for provide image header data. + * + * This Hook may be used to overide image header read implementation or doing + * a custom action before. + * + * @param img_index the index of the image pair + * @param slot slot number + * @param img_head image header structure to be populated + * + * @retval 0: header was read/populated, skip direct header data read + * BOOT_HOOK_REGULAR: follow the normal execution path, + * otherwise an error-code value. + */ +int boot_read_image_header_hook(int img_index, int slot, + struct image_header *img_head); + +/** Hook for Validate image hash/signature + * + * This Hook may be used to overide image validation procedure or doing + * a custom action before. + * + * @param img_index the index of the image pair + * @param slot slot number + * + * @retval FIH_SUCCESS: image is valid, skip direct validation + * FIH_FAILURE: image is invalid, skip direct validation + * FIH_BOOT_HOOK_REGULAR: follow the normal execution path. + */ +fih_ret boot_image_check_hook(int img_index, int slot); + +/** Hook for implement image update + * + * This hook is for for implementing an alternative mechanism of image update or + * doing a custom action before. + * + * @param img_index the index of the image pair + * @param img_head the image header of the secondary image + * @param area the flash area of the secondary image. + * + * @retval 0: update was done, skip performing the update + * BOOT_HOOK_REGULAR: follow the normal execution path, + * otherwise an error-code value. + */ +int boot_perform_update_hook(int img_index, struct image_header *img_head, + const struct flash_area *area); + +/** Hook for implement image's post copying action + * + * This hook is for implement action which might be done right after image was + * copied to the primary slot. This hook is called in MCUBOOT_OVERWRITE_ONLY + * mode only. + * + * @param img_index the index of the image pair + * @param area the flash area of the primary image. + * @param size size of copied image. + * + * @retval 0: success, mcuboot will follow normal code execution flow after + * execution of this call. + * non-zero: an error, mcuboot will return from + * boot_copy_image() with error. + * Update will be undone so might be resume on the next boot. + */ +int boot_copy_region_post_hook(int img_index, const struct flash_area *area, + size_t size); + +/** Hook for implement image's post recovery upload action + * + * This hook is for implement action which might be done right after image was + * copied to the primary slot. This hook is called in serial recovery upload + * operation. + * + * @param img_index the index of the image pair + * @param area the flash area of the primary image. + * @param size size of copied image. + * + * @retval 0: success, mcuboot will follow normal code execution flow after + * execution of this call. + * non-zero: an error, will be transferred as part of comand response + * as "rc" entry. + */ +int boot_serial_uploaded_hook(int img_index, const struct flash_area *area, + size_t size); + +/** Hook for implement the image's slot installation status fetch operation for + * the MGMT custom command. + * + * The image's slot installation status is custom property. It's detailed + * definition depends on user implementation. It is only defined that the status + * will be set to 0 if this hook not provides another value. + * + * @param img_index the index of the image pair + * @param slot slot number + * @param img_install_stat the image installation status to be populated + * + * @retval 0: the installaton status was fetched successfully, + * BOOT_HOOK_REGULAR: follow the normal execution path, status will be + * set to 0 + * otherwise an error-code value. Error-code is ignored, but it is up to + * the implementation to reflect this error in img_install_stat. + */ +int boot_img_install_stat_hook(int image_index, int slot, + int *img_install_stat); + +/** Hook will be invoked when boot_serial requests device reset. + * The hook may be used to prevent device reset. + * + * @param force set to true when request tries to force reset. + * + * @retval 0 when reset should be performed; + * BOOT_RESET_REQUEST_HOOK_BUSY when some processing is still in + * progress; + * BOOT_RESET_REQUEST_HOOK_TIMEOUT internal process timed out; + * BOOT_RESET_REQUEST_HOOK_CHECK_FAILED internal code failed to + * obtian status; + * BOOT_RESET_REQUEST_HOOK_INTERNAL_ERROR unspecified internal + * error while checking status. + */ +int boot_reset_request_hook(bool force); + +#define BOOT_RESET_REQUEST_HOOK_BUSY 1 +#define BOOT_RESET_REQUEST_HOOK_TIMEOUT 2 +#define BOOT_RESET_REQUEST_HOOK_CHECK_FAILED 3 +#define BOOT_RESET_REQUEST_HOOK_INTERNAL_ERROR 4 + +#endif /*H_BOOTUTIL_HOOKS*/ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_public_hooks.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_public_hooks.h new file mode 100644 index 0000000..453edf2 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_public_hooks.h @@ -0,0 +1,52 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2021 Nordic Semiconductor ASA + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +/** + * @file + * @brief Hooks definition implementation API + * + * This file contains API interface definition for hooks which can be + * implemented for overide some of MCUboot's native routines. + */ + +#ifndef H_BOOTUTIL_PUBLIC_HOOKS +#define H_BOOTUTIL_PUBLIC_HOOKS + +#include "bootutil/boot_hooks.h" + +/** Hook for provide primary image swap state. + * + * @param img_index the index of the image pair + * @param state image swap state structure to be populated + * + * @retval 0: header was read/populated + * FIH_FAILURE: image is invalid, + * BOOT_HOOK_REGULAR if hook not implemented for the image-slot, + * othervise an error-code value. + */ +int boot_read_swap_state_primary_slot_hook(int image_index, + struct boot_swap_state *state); + +#endif /*H_BOOTUTIL_PUBLIC_HOOKS*/ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_record.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_record.h new file mode 100644 index 0000000..14b2cd8 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_record.h @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2018-2021 Arm Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __BOOT_RECORD_H__ +#define __BOOT_RECORD_H__ + +#include +#include +#include "bootutil/image.h" +#include "bootutil/bootutil.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** Error codes for using the shared memory area. */ +enum shared_memory_status { + SHARED_MEMORY_OK = 0, + SHARED_MEMORY_OVERFLOW, + SHARED_MEMORY_OVERWRITE, + SHARED_MEMORY_GEN_ERROR, + SHARED_MEMORY_WRITE_ERROR, + SHARED_MEMORY_READ_ERROR, +}; + +/** + * @brief Add a data item to the shared data area between bootloader and + * runtime SW + * + * @param[in] major_type TLV major type, identify consumer + * @param[in] minor_type TLV minor type, identify TLV type + * @param[in] size length of added data + * @param[in] data pointer to data + * + * @return 0 on success; nonzero on failure. + */ +int boot_add_data_to_shared_area(uint8_t major_type, + uint16_t minor_type, + size_t size, + const uint8_t *data); + +/** + * Add an image's all boot status information to the shared memory area + * between the bootloader and runtime SW. + * + * @param[in] sw_module Identifier of the SW component. + * @param[in] hdr Pointer to the image header stored in RAM. + * @param[in] fap Pointer to the flash area where image is stored. + * + * @return 0 on success; nonzero on failure. + */ +int boot_save_boot_status(uint8_t sw_module, + const struct image_header *hdr, + const struct flash_area *fap); + +/** + * Add application specific data to the shared memory area between the + * bootloader and runtime SW. + * + * @param[in] hdr Pointer to the image header stored in RAM. + * @param[in] fap Pointer to the flash area where image is stored. + * @param[in] slot The currently active slot being booted. + * @param[in] max_app_sizes The maximum sizes of images that can be loaded. + * + * @return 0 on success; nonzero on failure. + */ +int boot_save_shared_data(const struct image_header *hdr, + const struct flash_area *fap, + const uint8_t active_slot, + const struct image_max_size *max_app_sizes); + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOT_RECORD_H__ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_status.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_status.h new file mode 100644 index 0000000..ea3de5e --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/boot_status.h @@ -0,0 +1,188 @@ +/* + * Copyright (c) 2018-2020 Arm Limited + * Copyright (c) 2020 Linaro Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __BOOT_STATUS_H__ +#define __BOOT_STATUS_H__ + +#include +#include + + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * The shared data between boot loader and runtime SW is TLV encoded. The + * shared data is stored in a well known location in memory and this is a + * contract between boot loader and runtime SW. + * + * The structure of shared data must be the following: + * - At the beginning there must be a header: struct shared_data_tlv_header + * This contains a magic number and a size field which covers the entire + * size of the shared data area including this header. + * - After the header there come the entries which are composed from an entry + * header structure: struct shared_data_tlv_entry and the data. In the entry + * header is a type field (tly_type) which identify the consumer of the + * entry in the runtime SW and specify the subtype of that data item. There + * is a size field (tlv_len) which covers the size of the the data. After + * this structure comes the actual data. + * + * - Arbitrary number and size of data entry can be in the shared memory area. + * + * This table gives of overview about the tlv_type field in the entry header. + * The tlv_type always composed from a major and minor number. Major number + * identifies the addressee in runtime SW, who should process the data entry. + * Minor number used to encode more info about the data entry. The actual + * definition of minor number could change per major number. + * + * In case of boot status data, which can be processed by an attestation + * service the minor number is split further to two part: sw_module and claim. + * The sw_module identifies the SW component in the system which the data item + * belongs to and the claim part identifies the exact type of the data. + * + * |---------------------------------------| + * | tlv_type (16) | + * |---------------------------------------| + * | tlv_major(4)| tlv_minor(12) | + * |---------------------------------------| + * | MAJOR_IAS | sw_module(6) | claim(6) | + * |---------------------------------------| + */ + +/* General macros to handle TLV type */ +#define MAJOR_MASK 0xF /* 4 bit */ +#define MAJOR_POS 12 /* 12 bit */ +#define MINOR_MASK 0xFFF /* 12 bit */ + +#define SET_TLV_TYPE(major, minor) \ + (((uint16_t)((major) & MAJOR_MASK) << MAJOR_POS) \ + | ((minor) & MINOR_MASK)) +#define GET_MAJOR(tlv_type) ((uint16_t)(tlv_type) >> MAJOR_POS) +#define GET_MINOR(tlv_type) ((tlv_type) & MINOR_MASK) + +/* Magic value which marks the beginning of shared data area in memory */ +#define SHARED_DATA_TLV_INFO_MAGIC 0x2016 + +/* Initial attestation specific macros */ + +/** + * Major numbers (4 bit) to identify the + * consumer of shared data in runtime SW. + */ +#define TLV_MAJOR_IAS 0x1 +#define TLV_MAJOR_BLINFO 0x2 + +/* Initial attestation: Claim per SW components / SW modules */ +/* Bits: 0-2 */ +#define SW_VERSION 0x00 +#define SW_SIGNER_ID 0x01 +/* Reserved 0x02 */ +#define SW_TYPE 0x03 +/* Bits: 3-5 */ +#define SW_MEASURE_VALUE 0x08 +#define SW_MEASURE_TYPE 0x09 +#define SW_BOOT_RECORD 0x3F + +#define MODULE_POS 6 /* 6 bit */ +#define CLAIM_MASK 0x3F /* 6 bit */ +#define MEASUREMENT_CLAIM_POS 3 /* 3 bit */ + +#define GET_IAS_MODULE(tlv_type) ((uint16_t)GET_MINOR(tlv_type) >> MODULE_POS) +#define GET_IAS_CLAIM(tlv_type) (GET_MINOR(tlv_type) & CLAIM_MASK) +#define SET_IAS_MINOR(sw_module, claim) \ + (((uint16_t)(sw_module) << MODULE_POS) | (claim)) + +/* Bootloader information */ +#define BLINFO_MODE 0x00 +#define BLINFO_SIGNATURE_TYPE 0x01 +#define BLINFO_RECOVERY 0x02 +#define BLINFO_RUNNING_SLOT 0x03 +#define BLINFO_BOOTLOADER_VERSION 0x04 +#define BLINFO_MAX_APPLICATION_SIZE 0x05 /* Same as BLINFO_MAX_APPLICATION_SIZE_IMAGE_0, legacy name */ +#define BLINFO_MAX_APPLICATION_SIZE_IMAGE_0 BLINFO_MAX_APPLICATION_SIZE +#define BLINFO_MAX_APPLICATION_SIZE_IMAGE_1 0x06 +#define BLINFO_MAX_APPLICATION_SIZE_IMAGE_2 0x07 +#define BLINFO_MAX_APPLICATION_SIZE_IMAGE_3 0x08 +#define BLINFO_MAX_APPLICATION_SIZE_IMAGE_4 0x09 + +enum mcuboot_mode { + MCUBOOT_MODE_SINGLE_SLOT, + MCUBOOT_MODE_SWAP_USING_SCRATCH, + MCUBOOT_MODE_UPGRADE_ONLY, + MCUBOOT_MODE_SWAP_USING_MOVE, + MCUBOOT_MODE_DIRECT_XIP, + MCUBOOT_MODE_DIRECT_XIP_WITH_REVERT, + MCUBOOT_MODE_RAM_LOAD, + MCUBOOT_MODE_FIRMWARE_LOADER +}; + +enum mcuboot_signature_type { + MCUBOOT_SIGNATURE_TYPE_NONE, + MCUBOOT_SIGNATURE_TYPE_RSA, + MCUBOOT_SIGNATURE_TYPE_ECDSA_P256, + MCUBOOT_SIGNATURE_TYPE_ED25519 +}; + +enum mcuboot_recovery_mode { + MCUBOOT_RECOVERY_MODE_NONE, + MCUBOOT_RECOVERY_MODE_SERIAL_RECOVERY, + MCUBOOT_RECOVERY_MODE_DFU, +}; + +/** + * Shared data TLV header. All fields in little endian. + * + * ----------------------------------- + * | tlv_magic(16) | tlv_tot_len(16) | + * ----------------------------------- + */ +struct shared_data_tlv_header { + uint16_t tlv_magic; + uint16_t tlv_tot_len; /* size of whole TLV area (including this header) */ +}; + +#define SHARED_DATA_HEADER_SIZE sizeof(struct shared_data_tlv_header) + +/** + * Shared data TLV entry header format. All fields in little endian. + * + * ------------------------------- + * | tlv_type(16) | tlv_len(16) | + * ------------------------------- + * | Raw data | + * ------------------------------- + */ +struct shared_data_tlv_entry { + uint16_t tlv_type; + uint16_t tlv_len; /* TLV data length (not including this header). */ +}; + +#define SHARED_DATA_ENTRY_HEADER_SIZE sizeof(struct shared_data_tlv_entry) +#define SHARED_DATA_ENTRY_SIZE(size) (size + SHARED_DATA_ENTRY_HEADER_SIZE) + +/* Structure to store the boot data for the runtime SW. */ +struct shared_boot_data { + struct shared_data_tlv_header header; + uint8_t data[]; +}; + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOT_STATUS_H__ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil.h new file mode 100644 index 0000000..070adaf --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil.h @@ -0,0 +1,104 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2017-2019 Linaro LTD + * Copyright (c) 2016-2019 JUUL Labs + * Copyright (c) 2019-2021 Arm Limited + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_BOOTUTIL_ +#define H_BOOTUTIL_ + +#include +#include "bootutil/fault_injection_hardening.h" +#include "bootutil/bootutil_public.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef MCUBOOT_IMAGE_NUMBER +#define BOOT_IMAGE_NUMBER MCUBOOT_IMAGE_NUMBER +#else +#define BOOT_IMAGE_NUMBER 1 +#endif + +_Static_assert(BOOT_IMAGE_NUMBER > 0, "Invalid value for BOOT_IMAGE_NUMBER"); + +struct image_header; +/** + * A response object provided by the boot loader code; indicates where to jump + * to execute the main image. + */ +struct boot_rsp { + /** A pointer to the header of the image to be executed. */ + const struct image_header *br_hdr; + + /** + * The flash offset of the image to execute. Indicates the position of + * the image header within its flash device. + */ + uint8_t br_flash_dev_id; + uint32_t br_image_off; +}; + +/* This is not actually used by mcuboot's code but can be used by apps + * when attempting to read/write a trailer. + */ +struct image_trailer { + uint8_t swap_type; + uint8_t pad1[BOOT_MAX_ALIGN - 1]; + uint8_t copy_done; + uint8_t pad2[BOOT_MAX_ALIGN - 1]; + uint8_t image_ok; + uint8_t pad3[BOOT_MAX_ALIGN - 1]; +#if BOOT_MAX_ALIGN > BOOT_MAGIC_SZ + uint8_t pad4[BOOT_MAGIC_ALIGN_SIZE - BOOT_MAGIC_SZ]; +#endif + uint8_t magic[BOOT_MAGIC_SZ]; +}; + +struct image_max_size { + bool calculated; + uint32_t max_size; +}; + +/* you must have pre-allocated all the entries within this structure */ +fih_ret boot_go(struct boot_rsp *rsp); +fih_ret boot_go_for_image_id(struct boot_rsp *rsp, uint32_t image_id); + +struct boot_loader_state; +void boot_state_clear(struct boot_loader_state *state); +fih_ret context_boot_go(struct boot_loader_state *state, struct boot_rsp *rsp); +const struct image_max_size *boot_get_max_app_size(void); + +#define SPLIT_GO_OK (0) +#define SPLIT_GO_NON_MATCHING (-1) +#define SPLIT_GO_ERR (-2) + +fih_ret split_go(int loader_slot, int split_slot, void **entry); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil_log.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil_log.h new file mode 100644 index 0000000..f2c70b9 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil_log.h @@ -0,0 +1,59 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2017 Linaro Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef H_BOOTUTIL_LOG_H_ +#define H_BOOTUTIL_LOG_H_ + +#include "ignore.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#ifdef MCUBOOT_HAVE_LOGGING +#include + +#define BOOT_LOG_ERR(...) MCUBOOT_LOG_ERR(__VA_ARGS__) +#define BOOT_LOG_WRN(...) MCUBOOT_LOG_WRN(__VA_ARGS__) +#define BOOT_LOG_INF(...) MCUBOOT_LOG_INF(__VA_ARGS__) +#define BOOT_LOG_DBG(...) MCUBOOT_LOG_DBG(__VA_ARGS__) +#define BOOT_LOG_SIM(...) MCUBOOT_LOG_SIM(__VA_ARGS__) + +#define BOOT_LOG_MODULE_DECLARE(module) MCUBOOT_LOG_MODULE_DECLARE(module) +#define BOOT_LOG_MODULE_REGISTER(module) MCUBOOT_LOG_MODULE_REGISTER(module) + +#else + +#define BOOT_LOG_ERR(...) IGNORE(__VA_ARGS__) +#define BOOT_LOG_WRN(...) IGNORE(__VA_ARGS__) +#define BOOT_LOG_INF(...) IGNORE(__VA_ARGS__) +#define BOOT_LOG_DBG(...) IGNORE(__VA_ARGS__) +#define BOOT_LOG_SIM(...) IGNORE(__VA_ARGS__) + +#define BOOT_LOG_MODULE_DECLARE(module) +#define BOOT_LOG_MODULE_REGISTER(module) + +#endif /* MCUBOOT_HAVE_LOGGING */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil_public.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil_public.h new file mode 100644 index 0000000..b2d5a5d --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil_public.h @@ -0,0 +1,316 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2017-2019 Linaro LTD + * Copyright (c) 2016-2019 JUUL Labs + * Copyright (c) 2019-2021 Arm Limited + * Copyright (c) 2020-2021 Nordic Semiconductor ASA + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +/** + * @file + * @brief Public MCUBoot interface API + * + * This file contains API which can be combined with the application in order + * to interact with the MCUBoot bootloader. This API are shared code-base betwen + * MCUBoot and the application which controls DFU process. + */ + +#ifndef H_BOOTUTIL_PUBLIC +#define H_BOOTUTIL_PUBLIC + +#include +#include +#include +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef ALIGN_UP +#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1)) +#endif + +#ifndef ALIGN_DOWN +#define ALIGN_DOWN(num, align) ((num) & ~((align) - 1)) +#endif + +/** Attempt to boot the contents of the primary slot. */ +#define BOOT_SWAP_TYPE_NONE 1 + +/** + * Swap to the secondary slot. + * Absent a confirm command, revert back on next boot. + */ +#define BOOT_SWAP_TYPE_TEST 2 + +/** + * Swap to the secondary slot, + * and permanently switch to booting its contents. + */ +#define BOOT_SWAP_TYPE_PERM 3 + +/** Swap back to alternate slot. A confirm changes this state to NONE. */ +#define BOOT_SWAP_TYPE_REVERT 4 + +/** Swap failed because image to be run is not valid */ +#define BOOT_SWAP_TYPE_FAIL 5 + +/** Swapping encountered an unrecoverable error */ +#define BOOT_SWAP_TYPE_PANIC 0xff + +#define BOOT_MAGIC_SZ 16 + +#ifdef MCUBOOT_BOOT_MAX_ALIGN + +#if defined(MCUBOOT_SWAP_USING_MOVE) || defined(MCUBOOT_SWAP_USING_SCRATCH) +_Static_assert(MCUBOOT_BOOT_MAX_ALIGN >= 8 && MCUBOOT_BOOT_MAX_ALIGN <= 32, + "Unsupported value for MCUBOOT_BOOT_MAX_ALIGN for SWAP upgrade modes"); +#endif + +#define BOOT_MAX_ALIGN MCUBOOT_BOOT_MAX_ALIGN +#define BOOT_MAGIC_ALIGN_SIZE ALIGN_UP(BOOT_MAGIC_SZ, BOOT_MAX_ALIGN) +#else +#define BOOT_MAX_ALIGN 8 +#define BOOT_MAGIC_ALIGN_SIZE BOOT_MAGIC_SZ +#endif + +#define BOOT_MAGIC_GOOD 1 +#define BOOT_MAGIC_BAD 2 +#define BOOT_MAGIC_UNSET 3 +#define BOOT_MAGIC_ANY 4 /* NOTE: control only, not dependent on sector */ +#define BOOT_MAGIC_NOTGOOD 5 /* NOTE: control only, not dependent on sector */ + +/* + * NOTE: leave BOOT_FLAG_SET equal to one, this is written to flash! + */ +#define BOOT_FLAG_SET 1 +#define BOOT_FLAG_BAD 2 +#define BOOT_FLAG_UNSET 3 +#define BOOT_FLAG_ANY 4 /* NOTE: control only, not dependent on sector */ + +#define BOOT_EFLASH 1 +#define BOOT_EFILE 2 +#define BOOT_EBADIMAGE 3 +#define BOOT_EBADVECT 4 +#define BOOT_EBADSTATUS 5 +#define BOOT_ENOMEM 6 +#define BOOT_EBADARGS 7 +#define BOOT_EBADVERSION 8 +#define BOOT_EFLASH_SEC 9 + +#define BOOT_HOOK_REGULAR 1 +/* + * Extract the swap type and image number from image trailers's swap_info + * filed. + */ +#define BOOT_GET_SWAP_TYPE(swap_info) ((swap_info) & 0x0F) +#define BOOT_GET_IMAGE_NUM(swap_info) ((swap_info) >> 4) + +/* Construct the swap_info field from swap type and image number */ +#define BOOT_SET_SWAP_INFO(swap_info, image, type) { \ + assert((image) < 0xF); \ + assert((type) < 0xF); \ + (swap_info) = (image) << 4 \ + | (type); \ + } +#ifdef MCUBOOT_HAVE_ASSERT_H +#include "mcuboot_config/mcuboot_assert.h" +#else +#include +#ifndef ASSERT +#define ASSERT assert +#endif +#endif + +struct boot_swap_state { + uint8_t magic; /* One of the BOOT_MAGIC_[...] values. */ + uint8_t swap_type; /* One of the BOOT_SWAP_TYPE_[...] values. */ + uint8_t copy_done; /* One of the BOOT_FLAG_[...] values. */ + uint8_t image_ok; /* One of the BOOT_FLAG_[...] values. */ + uint8_t image_num; /* Boot status belongs to this image */ +}; + +/** + * @brief Determines the action, if any, that mcuboot will take on a image pair. + * + * @param image_index Image pair index. + * + * @return a BOOT_SWAP_TYPE_[...] constant on success, negative errno code on + * fail. + */ +int boot_swap_type_multi(int image_index); + +/** + * @brief Determines the action, if any, that mcuboot will take. + * + * Works the same as a boot_swap_type_multi(0) call; + * + * @return a BOOT_SWAP_TYPE_[...] constant on success, negative errno code on + * fail. + */ +int boot_swap_type(void); + +/** + * Marks the image with the given index in the secondary slot as pending. On the + * next reboot, the system will perform a one-time boot of the the secondary + * slot image. + * + * @param image_index Image pair index. + * + * @param permanent Whether the image should be used permanently or + * only tested once: + * 0=run image once, then confirm or revert. + * 1=run image forever. + * + * @return 0 on success; nonzero on failure. + */ +int boot_set_pending_multi(int image_index, int permanent); + +/** + * Marks the image with index 0 in the secondary slot as pending. On the next + * reboot, the system will perform a one-time boot of the the secondary slot + * image. Note that this API is kept for compatibility. The + * boot_set_pending_multi() API is recommended. + * + * @param permanent Whether the image should be used permanently or + * only tested once: + * 0=run image once, then confirm or revert. + * 1=run image forever. + * + * @return 0 on success; nonzero on failure. + */ +int boot_set_pending(int permanent); + +/** + * Marks the image with the given index in the primary slot as confirmed. The + * system will continue booting into the image in the primary slot until told to + * boot from a different slot. + * + * @param image_index Image pair index. + * + * @return 0 on success; nonzero on failure. + */ +int boot_set_confirmed_multi(int image_index); + +/** + * Marks the image with index 0 in the primary slot as confirmed. The system + * will continue booting into the image in the primary slot until told to boot + * from a different slot. Note that this API is kept for compatibility. The + * boot_set_confirmed_multi() API is recommended. + * + * @return 0 on success; nonzero on failure. + */ +int boot_set_confirmed(void); + +/** + * @brief Get offset of the swap info field in the image trailer. + * + * @param fap Flash are for which offset is determined. + * + * @retval offset of the swap info field. + */ +uint32_t boot_swap_info_off(const struct flash_area *fap); + +/** + * @brief Get value of image-ok flag of the image. + * + * If called from chin-loaded image the image-ok flag value can be used to check + * whether application itself is already confirmed. + * + * @param fap Flash area of the image. + * @param image_ok[out] image-ok value. + * + * @return 0 on success; nonzero on failure. + */ +int boot_read_image_ok(const struct flash_area *fap, uint8_t *image_ok); + +/** + * @brief Read the image swap state + * + * @param flash_area_id id of flash partition from which state will be read; + * @param state pointer to structure for storing swap state. + * + * @return 0 on success; non-zero error code on failure; + */ +int +boot_read_swap_state_by_id(int flash_area_id, struct boot_swap_state *state); + +/** + * @brief Read the image swap state + * + * @param fa pointer to flash_area object; + * @param state pointer to structure for storing swap state. + * + * @return 0 on success; non-zero error code on failure. + */ +int +boot_read_swap_state(const struct flash_area *fa, + struct boot_swap_state *state); + +/** + * @brief Set next image application slot by flash area pointer + * + * @param fa pointer to flash_area representing image to set for next boot; + * @param active should be true if @fa points to currently running image + * slot, false otherwise; + * @param confirm confirms image; when @p active is true, this is considered + * true, regardless of passed value. + * + * It is users responsibility to identify whether @p fa provided as parameter + * is currently running/active image and provide proper value to @p active. + * Failing to do so may render device non-upgradeable. + * + * Note that in multi-image setup running/active application is the one + * that is currently being executed by any MCU core, from the pair of + * slots dedicated to that MCU core. As confirming application currently + * running on a given slot should be, preferably, done after functional + * tests prove application to function correctly, it may not be a good idea + * to cross-confirm running images. + * An application should only confirm slots designated to MCU core it is + * running on. + * + * @return 0 on success; non-zero error code on failure. + */ +int +boot_set_next(const struct flash_area *fa, bool active, bool confirm); + +/** + * Attempts to load image header from flash; verifies flash header fields. + * + * @param[in] fa_p flash area pointer + * @param[out] hdr buffer for image header + * + * @return 0 on success, error code otherwise + */ +int +boot_image_load_header(const struct flash_area *fa_p, + struct image_header *hdr); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil_test.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil_test.h new file mode 100644 index 0000000..f48bf01 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/bootutil_test.h @@ -0,0 +1,35 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_BOOTUTIL_TEST_ +#define H_BOOTUTIL_TEST_ + +#ifdef __cplusplus +extern "C" { +#endif + +int boot_test_all(void); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/caps.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/caps.h new file mode 100644 index 0000000..f4ff373 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/caps.h @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2017 Linaro Limited + * Copyright (c) 2021-2023 Arm Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef H_BOOTUTIL_CAPS_H_ +#define H_BOOTUTIL_CAPS_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * The bootloader can be compile with different capabilities selected + * at compile time. This function provides runtime access to these + * capabilities. This is intended primarily for testing, although + * these will possibly be available at runtime to the application + * running within the bootloader. + */ +uint32_t bootutil_get_caps(void); + +#define BOOTUTIL_CAP_RSA2048 (1<<0) + /* reserved (1<<1) */ +#define BOOTUTIL_CAP_ECDSA_P256 (1<<2) +#define BOOTUTIL_CAP_SWAP_USING_SCRATCH (1<<3) +#define BOOTUTIL_CAP_OVERWRITE_UPGRADE (1<<4) +#define BOOTUTIL_CAP_ENC_RSA (1<<5) +#define BOOTUTIL_CAP_ENC_KW (1<<6) +#define BOOTUTIL_CAP_VALIDATE_PRIMARY_SLOT (1<<7) +#define BOOTUTIL_CAP_RSA3072 (1<<8) +#define BOOTUTIL_CAP_ED25519 (1<<9) +#define BOOTUTIL_CAP_ENC_EC256 (1<<10) +#define BOOTUTIL_CAP_SWAP_USING_MOVE (1<<11) +#define BOOTUTIL_CAP_DOWNGRADE_PREVENTION (1<<12) +#define BOOTUTIL_CAP_ENC_X25519 (1<<13) +#define BOOTUTIL_CAP_BOOTSTRAP (1<<14) +#define BOOTUTIL_CAP_AES256 (1<<15) +#define BOOTUTIL_CAP_RAM_LOAD (1<<16) +#define BOOTUTIL_CAP_DIRECT_XIP (1<<17) +#define BOOTUTIL_CAP_HW_ROLLBACK_PROT (1<<18) +#define BOOTUTIL_CAP_ECDSA_P384 (1<<19) + +/* + * Query the number of images this bootloader is configured for. This + * is also primarily used for testing. + */ +uint32_t bootutil_get_num_images(void); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/aes_ctr.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/aes_ctr.h new file mode 100644 index 0000000..4419036 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/aes_ctr.h @@ -0,0 +1,158 @@ +/* + * This module provides a thin abstraction over some of the crypto + * primitives to make it easier to swap out the used crypto library. + * + * At this point, there are two choices: MCUBOOT_USE_MBED_TLS, or + * MCUBOOT_USE_TINYCRYPT. It is a compile error there is not exactly + * one of these defined. + */ + +#ifndef __BOOTUTIL_CRYPTO_AES_CTR_H_ +#define __BOOTUTIL_CRYPTO_AES_CTR_H_ + +#include + +#include "mcuboot_config/mcuboot_config.h" + +#if (defined(MCUBOOT_USE_MBED_TLS) + \ + defined(MCUBOOT_USE_TINYCRYPT) + defined(MCUBOOT_USE_PSA_CRYPTO)) != 1 + #error "One crypto backend must be defined: either MBED_TLS or TINYCRYPT or PSA" +#endif + +#if defined(MCUBOOT_USE_MBED_TLS) + #include + #include "bootutil/enc_key_public.h" + #define BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE BOOT_ENC_KEY_SIZE + #define BOOTUTIL_CRYPTO_AES_CTR_BLOCK_SIZE (16) +#endif /* MCUBOOT_USE_MBED_TLS */ + +#if defined(MCUBOOT_USE_TINYCRYPT) + #if defined(MCUBOOT_AES_256) + #error "Cannot use AES-256 for encryption with Tinycrypt library." + #endif + #include + #include + #include + #include + #define BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE TC_AES_KEY_SIZE + #define BOOTUTIL_CRYPTO_AES_CTR_BLOCK_SIZE TC_AES_BLOCK_SIZE +#endif /* MCUBOOT_USE_TINYCRYPT */ + + +#if defined(MCUBOOT_USE_PSA_CRYPTO) + #include + #include "bootutil/enc_key_public.h" + #define BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE BOOT_ENC_KEY_SIZE + #define BOOTUTIL_CRYPTO_AES_CTR_BLOCK_SIZE (16) +#endif + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(MCUBOOT_USE_PSA_CRYPTO) +typedef struct { + /* Fixme: This should not be, here, psa_key_id should be passed */ + uint8_t key[BOOT_ENC_KEY_SIZE]; +} bootutil_aes_ctr_context; + +void bootutil_aes_ctr_init(bootutil_aes_ctr_context *ctx); + +static inline void bootutil_aes_ctr_drop(bootutil_aes_ctr_context *ctx) +{ + memset(ctx, 0, sizeof(ctx)); +} + +static inline int bootutil_aes_ctr_set_key(bootutil_aes_ctr_context *ctx, const uint8_t *k) +{ + memcpy(ctx->key, k, sizeof(ctx->key)); + + return 0; +} + +int bootutil_aes_ctr_encrypt(bootutil_aes_ctr_context *ctx, uint8_t *counter, + const uint8_t *m, uint32_t mlen, size_t blk_off, uint8_t *c); +int bootutil_aes_ctr_decrypt(bootutil_aes_ctr_context *ctx, uint8_t *counter, + const uint8_t *c, uint32_t clen, size_t blk_off, uint8_t *m); +#endif + +#if defined(MCUBOOT_USE_MBED_TLS) +typedef mbedtls_aes_context bootutil_aes_ctr_context; +static inline void bootutil_aes_ctr_init(bootutil_aes_ctr_context *ctx) +{ + (void)mbedtls_aes_init(ctx); +} + +static inline void bootutil_aes_ctr_drop(bootutil_aes_ctr_context *ctx) +{ + mbedtls_aes_free(ctx); +} + +static inline int bootutil_aes_ctr_set_key(bootutil_aes_ctr_context *ctx, const uint8_t *k) +{ + return mbedtls_aes_setkey_enc(ctx, k, BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE * 8); +} + +static inline int bootutil_aes_ctr_encrypt(bootutil_aes_ctr_context *ctx, uint8_t *counter, const uint8_t *m, uint32_t mlen, size_t blk_off, uint8_t *c) +{ + uint8_t stream_block[BOOTUTIL_CRYPTO_AES_CTR_BLOCK_SIZE]; + return mbedtls_aes_crypt_ctr(ctx, mlen, &blk_off, counter, stream_block, m, c); +} + +static inline int bootutil_aes_ctr_decrypt(bootutil_aes_ctr_context *ctx, uint8_t *counter, const uint8_t *c, uint32_t clen, size_t blk_off, uint8_t *m) +{ + uint8_t stream_block[BOOTUTIL_CRYPTO_AES_CTR_BLOCK_SIZE]; + return mbedtls_aes_crypt_ctr(ctx, clen, &blk_off, counter, stream_block, c, m); +} +#endif /* MCUBOOT_USE_MBED_TLS */ + +#if defined(MCUBOOT_USE_TINYCRYPT) +typedef struct tc_aes_key_sched_struct bootutil_aes_ctr_context; +static inline void bootutil_aes_ctr_init(bootutil_aes_ctr_context *ctx) +{ + (void)ctx; +} + +static inline void bootutil_aes_ctr_drop(bootutil_aes_ctr_context *ctx) +{ + (void)ctx; +} + +static inline int bootutil_aes_ctr_set_key(bootutil_aes_ctr_context *ctx, const uint8_t *k) +{ + int rc; + rc = tc_aes128_set_encrypt_key(ctx, k); + if (rc != TC_CRYPTO_SUCCESS) { + return -1; + } + return 0; +} + +static int _bootutil_aes_ctr_crypt(bootutil_aes_ctr_context *ctx, uint8_t *counter, const uint8_t *in, uint32_t inlen, uint32_t blk_off, uint8_t *out) +{ + int rc; + rc = tc_ctr_mode(out, inlen, in, inlen, counter, &blk_off, ctx); + if (rc != TC_CRYPTO_SUCCESS) { + return -1; + } + return 0; +} + +static inline int bootutil_aes_ctr_encrypt(bootutil_aes_ctr_context *ctx, uint8_t *counter, const uint8_t *m, uint32_t mlen, uint32_t blk_off, uint8_t *c) +{ + return _bootutil_aes_ctr_crypt(ctx, counter, m, mlen, blk_off, c); +} + +static inline int bootutil_aes_ctr_decrypt(bootutil_aes_ctr_context *ctx, uint8_t *counter, const uint8_t *c, uint32_t clen, uint32_t blk_off, uint8_t *m) +{ + return _bootutil_aes_ctr_crypt(ctx, counter, c, clen, blk_off, m); +} +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOTUTIL_CRYPTO_AES_CTR_H_ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/aes_kw.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/aes_kw.h new file mode 100644 index 0000000..34045c2 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/aes_kw.h @@ -0,0 +1,142 @@ +/* + * This module provides a thin abstraction over some of the crypto + * primitives to make it easier to swap out the used crypto library. + * + * At this point, there are two choices: MCUBOOT_USE_MBED_TLS, or + * MCUBOOT_USE_TINYCRYPT. It is a compile error there is not exactly + * one of these defined. + */ + +#ifndef __BOOTUTIL_CRYPTO_AES_KW_H_ +#define __BOOTUTIL_CRYPTO_AES_KW_H_ + +#include "mcuboot_config/mcuboot_config.h" + +#if (defined(MCUBOOT_USE_MBED_TLS) + \ + defined(MCUBOOT_USE_TINYCRYPT)) != 1 + #error "One crypto backend must be defined: either MBED_TLS or TINYCRYPT" +#endif + +#if defined(MCUBOOT_USE_MBED_TLS) + #include + #include +#endif /* MCUBOOT_USE_MBED_TLS */ + +#if defined(MCUBOOT_USE_TINYCRYPT) + #if defined(MCUBOOT_AES_256) + #error "Cannot use AES-256 for encryption with Tinycrypt library." + #endif + #include + #include +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(MCUBOOT_USE_MBED_TLS) +typedef mbedtls_nist_kw_context bootutil_aes_kw_context; +static inline void bootutil_aes_kw_init(bootutil_aes_kw_context *ctx) +{ + (void)mbedtls_nist_kw_init(ctx); +} + +static inline void bootutil_aes_kw_drop(bootutil_aes_kw_context *ctx) +{ + mbedtls_nist_kw_free(ctx); +} + +static inline int bootutil_aes_kw_set_unwrap_key(bootutil_aes_kw_context *ctx, const uint8_t *k, uint32_t klen) +{ + return mbedtls_nist_kw_setkey(ctx, MBEDTLS_CIPHER_ID_AES, k, klen * 8, 0); +} + +static inline int bootutil_aes_kw_unwrap(bootutil_aes_kw_context *ctx, const uint8_t *wrapped_key, uint32_t wrapped_key_len, uint8_t *key, uint32_t key_len) +{ + size_t olen; + return mbedtls_nist_kw_unwrap(ctx, MBEDTLS_KW_MODE_KW, wrapped_key, wrapped_key_len, key, &olen, key_len); +} +#endif /* MCUBOOT_USE_MBED_TLS */ + +#if defined(MCUBOOT_USE_TINYCRYPT) +typedef struct tc_aes_key_sched_struct bootutil_aes_kw_context; +static inline void bootutil_aes_kw_init(bootutil_aes_kw_context *ctx) +{ + (void)ctx; +} + +static inline void bootutil_aes_kw_drop(bootutil_aes_kw_context *ctx) +{ + (void)ctx; +} + +static inline int bootutil_aes_kw_set_unwrap_key(bootutil_aes_kw_context *ctx, const uint8_t *k, uint32_t klen) +{ + int rc; + + if (klen != 16) { + return -1; + } + + rc = tc_aes128_set_decrypt_key(ctx, k); + if (rc != TC_CRYPTO_SUCCESS) { + return -1; + } + return 0; +} + +/* + * Implements AES key unwrapping following RFC-3394 section 2.2.2, using + * tinycrypt for AES-128 decryption. + */ +static int bootutil_aes_kw_unwrap(bootutil_aes_kw_context *ctx, const uint8_t *wrapped_key, uint32_t wrapped_key_len, uint8_t *key, uint32_t key_len) +{ + uint8_t A[8]; + uint8_t B[16]; + int8_t i, j, k; + + if (wrapped_key_len != 24 || key_len != 16) { + return -1; + } + + for (k = 0; k < 8; k++) { + A[k] = wrapped_key[k]; + key[k] = wrapped_key[8 + k]; + key[8 + k] = wrapped_key[16 + k]; + } + + for (j = 5; j >= 0; j--) { + for (i = 2; i > 0; i--) { + for (k = 0; k < 8; k++) { + B[k] = A[k]; + B[8 + k] = key[((i-1) * 8) + k]; + } + B[7] ^= 2 * j + i; + if (tc_aes_decrypt((uint8_t *)&B, (uint8_t *)&B, ctx) != TC_CRYPTO_SUCCESS) { + return -1; + } + for (k = 0; k < 8; k++) { + A[k] = B[k]; + key[((i-1) * 8) + k] = B[8 + k]; + } + } + } + + for (i = 0, k = 0; i < 8; i++) { + k |= A[i] ^ 0xa6; + } + if (k) { + return -1; + } + + return 0; +} +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOTUTIL_CRYPTO_AES_KW_H_ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/common.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/common.h new file mode 100644 index 0000000..1fb5c58 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/common.h @@ -0,0 +1,29 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2021 Arm Limited + */ + +#ifndef __BOOTUTIL_CRYPTO_COMMON_H__ +#define __BOOTUTIL_CRYPTO_COMMON_H__ + +/* The check below can be performed even for those cases + * where MCUBOOT_USE_MBED_TLS has not been defined + */ +#include "mbedtls/version.h" +#if MBEDTLS_VERSION_NUMBER >= 0x03000000 +#define MBEDTLS_CONTEXT_MEMBER(X) MBEDTLS_PRIVATE(X) +#else +#define MBEDTLS_CONTEXT_MEMBER(X) X +#endif + +/* Newer versions of Mbed TLS have removed the private accessor requirement for + * the ASN1 fields. + */ +#if (MBEDTLS_VERSION_NUMBER >= 0x03000000) && (MBEDTLS_VERSION_NUMBER < 0x03010000) +#define ASN1_CONTEXT_MEMBER(X) MBEDTLS_PRIVATE(X) +#else +#define ASN1_CONTEXT_MEMBER(X) X +#endif + +#endif /* __BOOTUTIL_CRYPTO_COMMON_H__ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/ecdh_p256.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/ecdh_p256.h new file mode 100644 index 0000000..962535c --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/ecdh_p256.h @@ -0,0 +1,154 @@ +/* + * This module provides a thin abstraction over some of the crypto + * primitives to make it easier to swap out the used crypto library. + * + * At this point, there are two choices: MCUBOOT_USE_MBED_TLS, or + * MCUBOOT_USE_TINYCRYPT. It is a compile error there is not exactly + * one of these defined. + */ + +#ifndef __BOOTUTIL_CRYPTO_ECDH_P256_H_ +#define __BOOTUTIL_CRYPTO_ECDH_P256_H_ + +#include "mcuboot_config/mcuboot_config.h" + +#if (defined(MCUBOOT_USE_MBED_TLS) + \ + defined(MCUBOOT_USE_TINYCRYPT)) != 1 + #error "One crypto backend must be defined: either MBED_TLS or TINYCRYPT" +#endif + +#if defined(MCUBOOT_USE_MBED_TLS) + #include + #include + #define EC256_PUBK_LEN (65) +#endif /* MCUBOOT_USE_MBED_TLS */ + +#if defined(MCUBOOT_USE_TINYCRYPT) + #include + #include + #define BOOTUTIL_CRYPTO_ECDH_P256_HASH_SIZE (4 * 8) +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(MCUBOOT_USE_TINYCRYPT) +typedef uintptr_t bootutil_ecdh_p256_context; +static inline void bootutil_ecdh_p256_init(bootutil_ecdh_p256_context *ctx) +{ + (void)ctx; +} + +static inline void bootutil_ecdh_p256_drop(bootutil_ecdh_p256_context *ctx) +{ + (void)ctx; +} + +static inline int bootutil_ecdh_p256_shared_secret(bootutil_ecdh_p256_context *ctx, const uint8_t *pk, const uint8_t *sk, uint8_t *z) +{ + int rc; + (void)ctx; + + if (pk[0] != 0x04) { + return -1; + } + + rc = uECC_valid_public_key(&pk[1], uECC_secp256r1()); + if (rc != 0) { + return -1; + } + + rc = uECC_shared_secret(&pk[1], sk, z, uECC_secp256r1()); + if (rc != TC_CRYPTO_SUCCESS) { + return -1; + } + return 0; +} +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#if defined(MCUBOOT_USE_MBED_TLS) +#define NUM_ECC_BYTES 32 + +#if MBEDTLS_VERSION_NUMBER >= 0x03000000 +static int fake_rng(void *p_rng, unsigned char *output, size_t len); +#endif + +typedef struct bootutil_ecdh_p256_context { + mbedtls_ecp_group grp; + mbedtls_ecp_point P; + mbedtls_mpi z; + mbedtls_mpi d; +} bootutil_ecdh_p256_context; + +static inline void bootutil_ecdh_p256_init(bootutil_ecdh_p256_context *ctx) +{ + mbedtls_mpi_init(&ctx->z); + mbedtls_mpi_init(&ctx->d); + + mbedtls_ecp_group_init(&ctx->grp); + mbedtls_ecp_point_init(&ctx->P); + + if (mbedtls_ecp_group_load(&ctx->grp, MBEDTLS_ECP_DP_SECP256R1) != 0) { + mbedtls_ecp_group_free(&ctx->grp); + mbedtls_ecp_point_free(&ctx->P); + } +} + +static inline void bootutil_ecdh_p256_drop(bootutil_ecdh_p256_context *ctx) +{ + mbedtls_mpi_free(&ctx->d); + mbedtls_mpi_free(&ctx->z); + mbedtls_ecp_group_free(&ctx->grp); + mbedtls_ecp_point_free(&ctx->P); +} + +static inline int bootutil_ecdh_p256_shared_secret(bootutil_ecdh_p256_context *ctx, const uint8_t *pk, const uint8_t *sk, uint8_t *z) +{ + int rc; + + rc = mbedtls_ecp_point_read_binary(&ctx->grp, + &ctx->P, + pk, + EC256_PUBK_LEN); + if (rc != 0) { + mbedtls_ecp_group_free(&ctx->grp); + mbedtls_ecp_point_free(&ctx->P); + return -1; + } + + rc = mbedtls_ecp_check_pubkey(&ctx->grp, &ctx->P); + if (rc != 0) { + mbedtls_ecp_group_free(&ctx->grp); + mbedtls_ecp_point_free(&ctx->P); + return -1; + } + + mbedtls_mpi_read_binary(&ctx->d, sk, NUM_ECC_BYTES); + +#if MBEDTLS_VERSION_NUMBER >= 0x03000000 + rc = mbedtls_ecdh_compute_shared(&ctx->grp, + &ctx->z, + &ctx->P, + &ctx->d, + fake_rng, + NULL); +#else + rc = mbedtls_ecdh_compute_shared(&ctx->grp, + &ctx->z, + &ctx->P, + &ctx->d, + NULL, + NULL); +#endif + mbedtls_mpi_write_binary(&ctx->z, z, NUM_ECC_BYTES); + + return rc; +} +#endif /* MCUBOOT_USE_MBED_TLS */ + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOTUTIL_CRYPTO_ECDH_P256_H_ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/ecdh_x25519.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/ecdh_x25519.h new file mode 100644 index 0000000..1d11b64 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/ecdh_x25519.h @@ -0,0 +1,57 @@ +/* + * This module provides a thin abstraction over some of the crypto + * primitives to make it easier to swap out the used crypto library. + * + * At this point, there are two choices: MCUBOOT_USE_MBED_TLS, or + * MCUBOOT_USE_TINYCRYPT. It is a compile error there is not exactly + * one of these defined. + */ + +#ifndef __BOOTUTIL_CRYPTO_ECDH_X25519_H_ +#define __BOOTUTIL_CRYPTO_ECDH_X25519_H_ + +#include "mcuboot_config/mcuboot_config.h" + +#if (defined(MCUBOOT_USE_MBED_TLS) + \ + defined(MCUBOOT_USE_TINYCRYPT)) != 1 + #error "One crypto backend must be defined: either MBED_TLS or TINYCRYPT" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(MCUBOOT_USE_TINYCRYPT) || defined(MCUBOOT_USE_MBED_TLS) +extern int X25519(uint8_t out_shared_key[32], const uint8_t private_key[32], + const uint8_t peer_public_value[32]); + +typedef uintptr_t bootutil_ecdh_x25519_context; +static inline void bootutil_ecdh_x25519_init(bootutil_ecdh_x25519_context *ctx) +{ + (void)ctx; +} + +static inline void bootutil_ecdh_x25519_drop(bootutil_ecdh_x25519_context *ctx) +{ + (void)ctx; +} + +static inline int bootutil_ecdh_x25519_shared_secret(bootutil_ecdh_x25519_context *ctx, const uint8_t *pk, const uint8_t *sk, uint8_t *z) +{ + int rc; + (void)ctx; + + rc = X25519(z, sk, pk); + if (rc != 0) { + return -1; + } + + return 0; +} +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOTUTIL_CRYPTO_ECDH_X25519_H_ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/ecdsa.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/ecdsa.h new file mode 100644 index 0000000..85355f2 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/ecdsa.h @@ -0,0 +1,672 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2023-2024 Arm Limited + */ + +/* + * This module provides a thin abstraction over some of the crypto + * primitives to make it easier to swap out the used crypto library. + * + * At this point, the choices are: MCUBOOT_USE_TINYCRYPT, MCUBOOT_USE_CC310, + * MCUBOOT_USE_MBED_TLS, MCUBOOT_USE_PSA_CRYPTO. Note that support for + * MCUBOOT_USE_PSA_CRYPTO is still experimental and it might not support all + * the crypto abstractions that MCUBOOT_USE_MBED_TLS supports. For this + * reason, it's allowed to have both of them defined, and for crypto modules + * that support both abstractions, the MCUBOOT_USE_PSA_CRYPTO will take + * precedence. + */ + +#ifndef __BOOTUTIL_CRYPTO_ECDSA_H_ +#define __BOOTUTIL_CRYPTO_ECDSA_H_ + +#include +#include "mcuboot_config/mcuboot_config.h" + +#if defined(MCUBOOT_USE_PSA_CRYPTO) || defined(MCUBOOT_USE_MBED_TLS) +#define MCUBOOT_USE_PSA_OR_MBED_TLS +#endif /* MCUBOOT_USE_PSA_CRYPTO || MCUBOOT_USE_MBED_TLS */ + +#if defined(MCUBOOT_SIGN_EC384) && \ + !defined(MCUBOOT_USE_PSA_CRYPTO) + #error "P384 requires PSA_CRYPTO to be defined" +#endif + +#if (defined(MCUBOOT_USE_TINYCRYPT) + \ + defined(MCUBOOT_USE_CC310) + \ + defined(MCUBOOT_USE_NRF_EXTERNAL_CRYPTO) + \ + defined(MCUBOOT_USE_PSA_OR_MBED_TLS)) != 1 + #error "One crypto backend must be defined: either CC310/TINYCRYPT/MBED_TLS/PSA_CRYPTO" +#endif + +#if defined(MCUBOOT_USE_TINYCRYPT) + #include + #include +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#if defined(MCUBOOT_USE_CC310) + #include +#endif /* MCUBOOT_USE_CC310 */ + +#if defined(MCUBOOT_USE_PSA_CRYPTO) + #include + #include +#elif defined(MCUBOOT_USE_MBED_TLS) + #include + /* Indicate to the caller that the verify function needs the raw ASN.1 + * signature, not a decoded one. */ + #define MCUBOOT_ECDSA_NEED_ASN1_SIG +#endif /* MCUBOOT_USE_MBED_TLS */ + +/*TODO: remove this after cypress port mbedtls to abstract crypto api */ +#if defined(MCUBOOT_USE_CC310) || defined(MCUBOOT_USE_MBED_TLS) +#define NUM_ECC_BYTES (256 / 8) +#endif + +/* Universal defines */ +#define BOOTUTIL_CRYPTO_ECDSA_P256_HASH_SIZE (32) + +#include "mbedtls/oid.h" +#include "mbedtls/asn1.h" +#include "bootutil/sign_key.h" +#include "common.h" + +#if defined(MCUBOOT_USE_NRF_EXTERNAL_CRYPTO) + #include + #define NUM_ECC_BYTES (256 / 8) +#endif /* MCUBOOT_USE_NRF_EXTERNAL_CRYPTO */ + +#ifdef __cplusplus +extern "C" { +#endif + +#if (defined(MCUBOOT_USE_TINYCRYPT) || defined(MCUBOOT_USE_MBED_TLS) || \ + defined(MCUBOOT_USE_CC310) || defined(MCUBOOT_USE_NRF_EXTERNAL_CRYPTO)) \ + && !defined(MCUBOOT_USE_PSA_CRYPTO) +/* + * Declaring these like this adds NULL termination. + */ +static const uint8_t ec_pubkey_oid[] = MBEDTLS_OID_EC_ALG_UNRESTRICTED; +static const uint8_t ec_secp256r1_oid[] = MBEDTLS_OID_EC_GRP_SECP256R1; + +/* + * Parse a public key. Helper function. + */ +static int bootutil_import_key(uint8_t **cp, uint8_t *end) +{ + size_t len; + mbedtls_asn1_buf alg; + mbedtls_asn1_buf param; + + if (mbedtls_asn1_get_tag(cp, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) { + return -1; + } + end = *cp + len; + + /* ECParameters (RFC5480) */ + if (mbedtls_asn1_get_alg(cp, end, &alg, ¶m)) { + return -2; + } + /* id-ecPublicKey (RFC5480) */ + if (alg.ASN1_CONTEXT_MEMBER(len) != sizeof(ec_pubkey_oid) - 1 || + memcmp(alg.ASN1_CONTEXT_MEMBER(p), ec_pubkey_oid, sizeof(ec_pubkey_oid) - 1)) { + return -3; + } + /* namedCurve (RFC5480) */ + if (param.ASN1_CONTEXT_MEMBER(len) != sizeof(ec_secp256r1_oid) - 1 || + memcmp(param.ASN1_CONTEXT_MEMBER(p), ec_secp256r1_oid, sizeof(ec_secp256r1_oid) - 1)) { + return -4; + } + /* ECPoint (RFC5480) */ + if (mbedtls_asn1_get_bitstring_null(cp, end, &len)) { + return -6; + } + if (*cp + len != end) { + return -7; + } + + if (len != 2 * NUM_ECC_BYTES + 1) { + return -8; + } + + return 0; +} +#endif /* (MCUBOOT_USE_TINYCRYPT || MCUBOOT_USE_MBED_TLS || MCUBOOT_USE_CC310) && !MCUBOOT_USE_PSA_CRYPTO */ + +/* + * cp points to ASN1 string containing an integer. + * Verify the tag, and that the length is 32 bytes. Helper function. + */ +static int bootutil_read_bigint(uint8_t i[NUM_ECC_BYTES], uint8_t **cp, uint8_t *end) +{ + size_t len; + + if (mbedtls_asn1_get_tag(cp, end, &len, MBEDTLS_ASN1_INTEGER)) { + return -3; + } + + if (len >= NUM_ECC_BYTES) { + memcpy(i, *cp + len - NUM_ECC_BYTES, NUM_ECC_BYTES); + } else { + memset(i, 0, NUM_ECC_BYTES - len); + memcpy(i + NUM_ECC_BYTES - len, *cp, len); + } + *cp += len; + return 0; +} + +/* + * Read in signature. Signature has r and s encoded as integers. Helper function. + */ +static int bootutil_decode_sig(uint8_t signature[NUM_ECC_BYTES * 2], uint8_t *cp, uint8_t *end) +{ + int rc; + size_t len; + + rc = mbedtls_asn1_get_tag(&cp, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE); + if (rc) { + return -1; + } + if (cp + len > end) { + return -2; + } + + rc = bootutil_read_bigint(signature, &cp, end); + if (rc) { + return -3; + } + rc = bootutil_read_bigint(signature + NUM_ECC_BYTES, &cp, end); + if (rc) { + return -4; + } + return 0; +} + +#if defined(MCUBOOT_USE_TINYCRYPT) +typedef uintptr_t bootutil_ecdsa_context; +static inline void bootutil_ecdsa_init(bootutil_ecdsa_context *ctx) +{ + (void)ctx; +} + +static inline void bootutil_ecdsa_drop(bootutil_ecdsa_context *ctx) +{ + (void)ctx; +} + +static inline int bootutil_ecdsa_verify(bootutil_ecdsa_context *ctx, + uint8_t *pk, size_t pk_len, + uint8_t *hash, size_t hash_len, + uint8_t *sig, size_t sig_len) +{ + int rc; + (void)ctx; + (void)pk_len; + (void)sig_len; + (void)hash_len; + + uint8_t signature[2 * NUM_ECC_BYTES]; + rc = bootutil_decode_sig(signature, sig, sig + sig_len); + if (rc) { + return -1; + } + + /* Only support uncompressed keys. */ + if (pk[0] != 0x04) { + return -1; + } + pk++; + + rc = uECC_verify(pk, hash, BOOTUTIL_CRYPTO_ECDSA_P256_HASH_SIZE, signature, uECC_secp256r1()); + if (rc != TC_CRYPTO_SUCCESS) { + return -1; + } + return 0; +} + +static inline int bootutil_ecdsa_parse_public_key(bootutil_ecdsa_context *ctx, + uint8_t **cp,uint8_t *end) +{ + (void)ctx; + return bootutil_import_key(cp, end); +} +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#if defined(MCUBOOT_USE_CC310) +typedef uintptr_t bootutil_ecdsa_context; +static inline void bootutil_ecdsa_init(bootutil_ecdsa_context *ctx) +{ + (void)ctx; +} + +static inline void bootutil_ecdsa_drop(bootutil_ecdsa_context *ctx) +{ + (void)ctx; +} + +static inline int bootutil_ecdsa_verify(bootutil_ecdsa_context *ctx, + uint8_t *pk, size_t pk_len, + uint8_t *hash, size_t hash_len, + uint8_t *sig, size_t sig_len) +{ + (void)ctx; + (void)pk_len; + (void)hash_len; + uint8_t dsig[2 * NUM_ECC_BYTES]; + + if (bootutil_decode_sig(dsig, sig, sig + sig_len)) { + return -1; + } + + /* Only support uncompressed keys. */ + if (pk[0] != 0x04) { + return -1; + } + pk++; + + return cc310_ecdsa_verify_secp256r1(hash, pk, dsig, BOOTUTIL_CRYPTO_ECDSA_P256_HASH_SIZE); +} + +static inline int bootutil_ecdsa_parse_public_key(bootutil_ecdsa_context *ctx, + uint8_t **cp,uint8_t *end) +{ + (void)ctx; + return bootutil_import_key(cp, end); +} +#endif /* MCUBOOT_USE_CC310 */ + +#if defined(MCUBOOT_USE_PSA_CRYPTO) +typedef struct { + psa_key_id_t key_id; + size_t curve_byte_count; + psa_algorithm_t required_algorithm; +} bootutil_ecdsa_context; + +/* ECDSA public key with format specified in RFC5280 et al. in ASN.1 syntax + * + * SEQUENCE { + * SEQUENCE { + * OBJECT idEcPublicKey + * OBJECT namedCurve + * } + * BIT STRING publicKey + * } + * + * ECDSA signature format specified in RFC3279 et al. in ASN.1 syntax + * + * SEQUENCE { + * INTEGER r + * INTEGER s + * } + * + */ + +/* Offset in bytes from the start of the encoding to the length field + * of the innermost SEQUENCE in the ECDSA public key + */ +#define PUB_KEY_LEN_OFF (3) + +/* Offset in bytes from the start of the publicKey encoding of the BIT STRING */ +#define PUB_KEY_VAL_OFF (3) + +/* Computes the pointer to the idEcPublicKey OID from the base of the encoding */ +#define PUB_KEY_OID_OFFSET(p) (*p + PUB_KEY_LEN_OFF+1) + +/* Computes the pointer to the namedCurve OID from the base of the encoding */ +#define CURVE_TYPE_OID_OFFSET(p) PUB_KEY_OID_OFFSET(p) + sizeof(IdEcPublicKey) + +/* This helper function gets a pointer to the bitstring associated to the publicKey + * as encoded per RFC 5280. This function assumes that the public key encoding is not + * bigger than 127 bytes (i.e. usually up until 384 bit curves) + * + * \param[in,out] p Double pointer to a buffer containing the RFC 5280 of the ECDSA public key. + * On output, the pointer is updated to point to the start of the public key + * in BIT STRING form. + * \param[out] size Pointer to a buffer containing the size of the public key extracted + * + */ +static inline void get_public_key_from_rfc5280_encoding(uint8_t **p, size_t *size) +{ + uint8_t *key_start = (*p) + (PUB_KEY_LEN_OFF + 1 + (*p)[PUB_KEY_LEN_OFF] + PUB_KEY_VAL_OFF); + *p = key_start; + *size = key_start[-2]-1; /* -2 from PUB_KEY_VAL_OFF to get the length, -1 to remove the ASN.1 padding byte count */ +} + +/* This helper function parses a signature as specified in RFC3279 into a pair + * (r,s) of contiguous bytes + * + * \param[in] sig Pointer to a buffer containing the encoded signature + * \param[in] num_of_curve_bytes The required number of bytes for r and s + * \param[out] r_s_pair Buffer containing the (r,s) pair extracted. It's caller + * responsibility to ensure the buffer is big enough to + * hold the parsed (r,s) pair. + */ +static void parse_signature_from_rfc5480_encoding(const uint8_t *sig, + size_t num_of_curve_bytes, + uint8_t *r_s_pair) +{ + const uint8_t *sig_ptr = NULL; + + /* r or s can be greater than the expected size by one, due to the way + * ASN.1 encodes signed integers. If either r or s starts with a bit 1, + * a zero byte will be added in front of the encoding + */ + + /* sig[0] == 0x30, sig[1] == , sig[2] == 0x02 */ + + /* Move r in place */ + size_t r_len = sig[3]; + sig_ptr = &sig[4]; + if (r_len >= num_of_curve_bytes) { + sig_ptr = sig_ptr + r_len - num_of_curve_bytes; + memcpy(&r_s_pair[0], sig_ptr, num_of_curve_bytes); + if(r_len % 2) { + r_len--; + } + } else { + /* For encodings that reduce the size of r or s in case of zeros */ + memcpy(&r_s_pair[num_of_curve_bytes - r_len], sig_ptr, r_len); + } + + /* Move s in place */ + size_t s_len = sig_ptr[r_len+1]; /* + 1 to skip SEQUENCE */ + sig_ptr = &sig_ptr[r_len+2]; + if (s_len >= num_of_curve_bytes) { + sig_ptr = sig_ptr + s_len - num_of_curve_bytes; + memcpy(&r_s_pair[num_of_curve_bytes], sig_ptr, num_of_curve_bytes); + } else { + /* For encodings that reduce the size of r or s in case of zeros */ + memcpy(&r_s_pair[2*num_of_curve_bytes - s_len], sig_ptr, s_len); + } +} + +// OID id-ecPublicKey 1.2.840.10045.2.1. +static const uint8_t IdEcPublicKey[] = {0x06, 0x07, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x02, 0x01}; +#if defined(MCUBOOT_SIGN_EC256) +// OID secp256r1 1.2.840.10045.3.1.7. +static const uint8_t Secp256r1[] = {0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x03, 0x01, 0x07}; +#endif /* MCUBOOT_SIGN_EC256 */ +#if defined(MCUBOOT_SIGN_EC384) +// OID secp384r1 1.3.132.0.34 +static const uint8_t Secp384r1[] = {0x06, 0x05, 0x2b, 0x81, 0x04, 0x00, 0x22}; +#endif /* MCUBOOT_SIGN_EC384 */ + +static inline void bootutil_ecdsa_init(bootutil_ecdsa_context *ctx) +{ +#if !defined(MCUBOOT_BUILTIN_KEY) + ctx->key_id = PSA_KEY_ID_NULL; + ctx->curve_byte_count = 0; + ctx->required_algorithm = 0; + +#else /* !MCUBOOT_BUILTIN_KEY */ + /* The incoming key ID is equal to the image index. The key ID value must be + * shifted (by one in this case) because zero is reserved (PSA_KEY_ID_NULL) + * and considered invalid. + */ + ctx->key_id++; /* Make sure it is not equal to 0. */ +#if defined(MCUBOOT_SIGN_EC256) + ctx->curve_byte_count = 32; + ctx->required_algorithm = PSA_ALG_SHA_256; +#endif /* MCUBOOT_SIGN_EC256 */ +#if defined(MCUBOOT_SIGN_EC384) + ctx->curve_byte_count = 48; + ctx->required_algorithm = PSA_ALG_SHA_384; +#endif /* MCUBOOT_SIGN_EC384 */ +#endif /* !MCUBOOT_BUILTIN_KEY */ +} + +static inline void bootutil_ecdsa_drop(bootutil_ecdsa_context *ctx) +{ + if (ctx->key_id != PSA_KEY_ID_NULL) { + (void)psa_destroy_key(ctx->key_id); + } +} + +#if !defined(MCUBOOT_BUILTIN_KEY) +/* + * Parse a ECDSA public key with format specified in RFC5280 et al. + * + * OID for icEcPublicKey is 1.2.840.10045.2.1 + * OIDs for supported curves are as follows: + * secp256r1 (prime256v1): 1.2.840.10045.3.1.7 + * secp384r1: 1.3.132.0.34 + */ +static int bootutil_ecdsa_parse_public_key(bootutil_ecdsa_context *ctx, + uint8_t **cp, uint8_t *end) +{ + psa_key_attributes_t key_attributes = psa_key_attributes_init(); + size_t key_size; + (void)end; + + /* public key oid is valid */ + if (memcmp(PUB_KEY_OID_OFFSET(cp), IdEcPublicKey, sizeof(IdEcPublicKey))) { + return (int)PSA_ERROR_INVALID_ARGUMENT; + } + +#if defined(MCUBOOT_SIGN_EC256) + if (!memcmp(CURVE_TYPE_OID_OFFSET(cp), Secp256r1, sizeof(Secp256r1))) { + ctx->curve_byte_count = 32; + ctx->required_algorithm = PSA_ALG_SHA_256; + } else +#endif /* MCUBOOT_SIGN_EC256 */ +#if defined(MCUBOOT_SIGN_EC384) + if (!memcmp(CURVE_TYPE_OID_OFFSET(cp), Secp384r1, sizeof(Secp384r1))) { + ctx->curve_byte_count = 48; + ctx->required_algorithm = PSA_ALG_SHA_384; + } else +#endif /* MCUBOOT_SIGN_EC384 */ + { + return (int)PSA_ERROR_INVALID_ARGUMENT; + } + + get_public_key_from_rfc5280_encoding(cp, &key_size); + /* Set attributes and import key */ + psa_set_key_usage_flags(&key_attributes, PSA_KEY_USAGE_VERIFY_HASH); + psa_set_key_algorithm(&key_attributes, PSA_ALG_ECDSA(ctx->required_algorithm)); + psa_set_key_type(&key_attributes, PSA_KEY_TYPE_ECC_PUBLIC_KEY(PSA_ECC_FAMILY_SECP_R1)); + + return (int)psa_import_key(&key_attributes, *cp, key_size, &ctx->key_id); +} +#endif /* !MCUBOOT_BUILTIN_KEY */ + +/* Verify the signature against the provided hash. The signature gets parsed from + * the encoding first, then PSA Crypto has a dedicated API for ECDSA verification + */ +static inline int bootutil_ecdsa_verify(bootutil_ecdsa_context *ctx, + uint8_t *pk, size_t pk_len, + uint8_t *hash, size_t hlen, + uint8_t *sig, size_t slen) +{ + (void)pk; + (void)pk_len; + (void)slen; + + uint8_t reformatted_signature[96] = {0}; /* Enough for P-384 signature sizes */ + parse_signature_from_rfc5480_encoding(sig, ctx->curve_byte_count,reformatted_signature); + + return (int) psa_verify_hash(ctx->key_id, PSA_ALG_ECDSA(ctx->required_algorithm), + hash, hlen, reformatted_signature, 2*ctx->curve_byte_count); +} +#elif defined(MCUBOOT_USE_MBED_TLS) + +typedef mbedtls_ecdsa_context bootutil_ecdsa_context; +static inline void bootutil_ecdsa_init(bootutil_ecdsa_context *ctx) +{ + mbedtls_ecdsa_init(ctx); +} + +static inline void bootutil_ecdsa_drop(bootutil_ecdsa_context *ctx) +{ + mbedtls_ecdsa_free(ctx); +} + +#ifdef CY_MBEDTLS_HW_ACCELERATION +/* + * Parse the public key used for signing. + */ +static int bootutil_parse_eckey(bootutil_ecdsa_context *ctx, uint8_t **p, uint8_t *end) +{ + size_t len; + mbedtls_asn1_buf alg; + mbedtls_asn1_buf param; + + if (mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) { + return -1; + } + end = *p + len; + + if (mbedtls_asn1_get_alg(p, end, &alg, ¶m)) { + return -2; + } + if (alg.ASN1_CONTEXT_MEMBER(len) != sizeof(ec_pubkey_oid) - 1 || + memcmp(alg.ASN1_CONTEXT_MEMBER(p), ec_pubkey_oid, sizeof(ec_pubkey_oid) - 1)) { + return -3; + } + if (param.ASN1_CONTEXT_MEMBER(len) != sizeof(ec_secp256r1_oid) - 1|| + memcmp(param.ASN1_CONTEXT_MEMBER(p), ec_secp256r1_oid, sizeof(ec_secp256r1_oid) - 1)) { + return -4; + } + + if (mbedtls_ecp_group_load(&ctx->grp, MBEDTLS_ECP_DP_SECP256R1)) { + return -5; + } + + if (mbedtls_asn1_get_bitstring_null(p, end, &len)) { + return -6; + } + if (*p + len != end) { + return -7; + } + + if (mbedtls_ecp_point_read_binary(&ctx->grp, &ctx->Q, *p, end - *p)) { + return -8; + } + + if (mbedtls_ecp_check_pubkey(&ctx->grp, &ctx->Q)) { + return -9; + } + return 0; +} + +static inline int bootutil_ecdsa_verify(bootutil_ecdsa_context *ctx, + uint8_t *pk, size_t pk_len, + uint8_t *hash, size_t hash_len, + uint8_t *sig, size_t sig_len) +{ + (void)pk; + (void)pk_len; + + /* + * This is simplified, as the hash length is also 32 bytes. + */ + while (sig[sig_len - 1] == '\0') { + sig_len--; + } + return mbedtls_ecdsa_read_signature(&ctx, hash, hash_len, sig, sig_len); +} + +#else /* CY_MBEDTLS_HW_ACCELERATION */ + +static inline int bootutil_ecdsa_verify(bootutil_ecdsa_context *ctx, + uint8_t *pk, size_t pk_len, + uint8_t *hash, size_t hash_len, + uint8_t *sig, size_t sig_len) +{ + int rc; + + (void)sig; + (void)hash; + (void)hash_len; + + rc = mbedtls_ecp_group_load(&ctx->MBEDTLS_CONTEXT_MEMBER(grp), MBEDTLS_ECP_DP_SECP256R1); + if (rc) { + return -1; + } + + rc = mbedtls_ecp_point_read_binary(&ctx->MBEDTLS_CONTEXT_MEMBER(grp), &ctx->MBEDTLS_CONTEXT_MEMBER(Q), pk, pk_len); + if (rc) { + return -1; + } + + rc = mbedtls_ecp_check_pubkey(&ctx->MBEDTLS_CONTEXT_MEMBER(grp), &ctx->MBEDTLS_CONTEXT_MEMBER(Q)); + if (rc) { + return -1; + } + + rc = mbedtls_ecdsa_read_signature(ctx, hash, BOOTUTIL_CRYPTO_ECDSA_P256_HASH_SIZE, + sig, sig_len); + if (rc) { + return -1; + } + + return 0; +} + +#endif /* CY_MBEDTLS_HW_ACCELERATION */ + +static inline int bootutil_ecdsa_parse_public_key(bootutil_ecdsa_context *ctx, + uint8_t **cp,uint8_t *end) +{ + int rc; +#ifdef CY_MBEDTLS_HW_ACCELERATION + rc = bootutil_parse_eckey(&ctx, cp, end); +#else + (void)ctx; + rc = bootutil_import_key(cp, end); +#endif + return rc; +} + +#endif /* MCUBOOT_USE_MBED_TLS */ + +#if defined(MCUBOOT_USE_NRF_EXTERNAL_CRYPTO) +typedef uintptr_t bootutil_ecdsa_context; +static inline void bootutil_ecdsa_init(bootutil_ecdsa_context *ctx) +{ + (void)ctx; +} + +static inline void bootutil_ecdsa_drop(bootutil_ecdsa_context *ctx) +{ + (void)ctx; +} + +static inline int bootutil_ecdsa_verify(bootutil_ecdsa_context *ctx, + uint8_t *pk, size_t pk_len, + uint8_t *hash, size_t hash_len, + uint8_t *sig, size_t sig_len) +{ + (void)ctx; + (void)pk_len; + (void)hash_len; + uint8_t dsig[2 * NUM_ECC_BYTES]; + + if (bootutil_decode_sig(dsig, sig, sig + sig_len)) { + return -1; + } + + /* Only support uncompressed keys. */ + if (pk[0] != 0x04) { + return -1; + } + pk++; + + return bl_secp256r1_validate(hash, BOOTUTIL_CRYPTO_ECDSA_P256_HASH_SIZE, pk, dsig); +} + +static inline int bootutil_ecdsa_parse_public_key(bootutil_ecdsa_context *ctx, + uint8_t **cp,uint8_t *end) +{ + (void)ctx; + return bootutil_import_key(cp, end); +} +#endif /* MCUBOOT_USE_NRF_EXTERNAL_CRYPTO */ + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOTUTIL_CRYPTO_ECDSA_H_ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/hmac_sha256.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/hmac_sha256.h new file mode 100644 index 0000000..e684018 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/hmac_sha256.h @@ -0,0 +1,134 @@ +/* + * This module provides a thin abstraction over some of the crypto + * primitives to make it easier to swap out the used crypto library. + * + * At this point, there are two choices: MCUBOOT_USE_MBED_TLS, or + * MCUBOOT_USE_TINYCRYPT. It is a compile error there is not exactly + * one of these defined. + */ + +#ifndef __BOOTUTIL_CRYPTO_HMAC_SHA256_H_ +#define __BOOTUTIL_CRYPTO_HMAC_SHA256_H_ + +#include "mcuboot_config/mcuboot_config.h" + +#if (defined(MCUBOOT_USE_MBED_TLS) + \ + defined(MCUBOOT_USE_TINYCRYPT)) != 1 + #error "One crypto backend must be defined: either MBED_TLS or TINYCRYPT" +#endif + +#if defined(MCUBOOT_USE_MBED_TLS) + #include + #include + #include + #include +#endif /* MCUBOOT_USE_MBED_TLS */ + +#if defined(MCUBOOT_USE_TINYCRYPT) + #include + #include + #include + #include +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(MCUBOOT_USE_TINYCRYPT) +typedef struct tc_hmac_state_struct bootutil_hmac_sha256_context; +static inline void bootutil_hmac_sha256_init(bootutil_hmac_sha256_context *ctx) +{ + (void)ctx; +} + +static inline void bootutil_hmac_sha256_drop(bootutil_hmac_sha256_context *ctx) +{ + (void)ctx; +} + +static inline int bootutil_hmac_sha256_set_key(bootutil_hmac_sha256_context *ctx, const uint8_t *key, unsigned int key_size) +{ + int rc; + rc = tc_hmac_set_key(ctx, key, key_size); + if (rc != TC_CRYPTO_SUCCESS) { + return -1; + } + rc = tc_hmac_init(ctx); + if (rc != TC_CRYPTO_SUCCESS) { + return -1; + } + return 0; +} + +static inline int bootutil_hmac_sha256_update(bootutil_hmac_sha256_context *ctx, const void *data, unsigned int data_length) +{ + int rc; + rc = tc_hmac_update(ctx, data, data_length); + if (rc != TC_CRYPTO_SUCCESS) { + return -1; + } + return 0; +} + +static inline int bootutil_hmac_sha256_finish(bootutil_hmac_sha256_context *ctx, uint8_t *tag, unsigned int taglen) +{ + int rc; + rc = tc_hmac_final(tag, taglen, ctx); + if (rc != TC_CRYPTO_SUCCESS) { + return -1; + } + return 0; +} +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#if defined(MCUBOOT_USE_MBED_TLS) +/** + * The generic message-digest context. + */ +typedef mbedtls_md_context_t bootutil_hmac_sha256_context; + +static inline void bootutil_hmac_sha256_init(bootutil_hmac_sha256_context *ctx) +{ + mbedtls_md_init(ctx); +} + +static inline void bootutil_hmac_sha256_drop(bootutil_hmac_sha256_context *ctx) +{ + mbedtls_md_free(ctx); +} + +static inline int bootutil_hmac_sha256_set_key(bootutil_hmac_sha256_context *ctx, const uint8_t *key, unsigned int key_size) +{ + int rc; + + rc = mbedtls_md_setup(ctx, mbedtls_md_info_from_string("SHA256"), 1); + if (rc != 0) { + return rc; + } + rc = mbedtls_md_hmac_starts(ctx, key, key_size); + return rc; +} + +static inline int bootutil_hmac_sha256_update(bootutil_hmac_sha256_context *ctx, const void *data, unsigned int data_length) +{ + return mbedtls_md_hmac_update(ctx, data, data_length); +} + +static inline int bootutil_hmac_sha256_finish(bootutil_hmac_sha256_context *ctx, uint8_t *tag, unsigned int taglen) +{ + (void)taglen; + /* + * HMAC the key and check that our received MAC matches the generated tag + */ + return mbedtls_md_hmac_finish(ctx, tag); +} +#endif /* MCUBOOT_USE_MBED_TLS */ + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOTUTIL_CRYPTO_HMAC_SHA256_H_ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/rsa.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/rsa.h new file mode 100644 index 0000000..581e4ec --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/rsa.h @@ -0,0 +1,356 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2023 Arm Limited + */ + +/* + * This module provides a thin abstraction over some of the crypto + * primitives to make it easier to swap out the used crypto library. + * + * At this point, the choices are: MCUBOOT_USE_MBED_TLS and + * MCUBOOT_USE_PSA_CRYPTO. Note that support for MCUBOOT_USE_PSA_CRYPTO is + * still experimental and it might not support all the crypto abstractions + * that MCUBOOT_USE_MBED_TLS supports. For this reason, it's allowed to have + * both of them defined, and for crypto modules that support both abstractions, + * the MCUBOOT_USE_PSA_CRYPTO will take precedence. + */ + +/* + * Note: The source file that includes this header should either define one of the + * two options BOOTUTIL_CRYPTO_RSA_CRYPT_ENABLED or BOOTUTIL_CRYPTO_RSA_SIGN_ENABLED + * This will make the signature functions or encryption functions visible without + * generating a "defined but not used" compiler warning + */ + +#ifndef __BOOTUTIL_CRYPTO_RSA_H_ +#define __BOOTUTIL_CRYPTO_RSA_H_ + +#include "mcuboot_config/mcuboot_config.h" + +#if defined(MCUBOOT_USE_PSA_CRYPTO) || defined(MCUBOOT_USE_MBED_TLS) +#define MCUBOOT_USE_PSA_OR_MBED_TLS +#endif /* MCUBOOT_USE_PSA_CRYPTO || MCUBOOT_USE_MBED_TLS */ + +#if (defined(MCUBOOT_USE_PSA_OR_MBED_TLS)) != 1 + #error "One crypto backend must be defined: either MBED_TLS/PSA_CRYPTO" +#endif + +#if defined(MCUBOOT_USE_PSA_CRYPTO) + +#include +#include "bootutil/enc_key_public.h" + +#elif defined(MCUBOOT_USE_MBED_TLS) + +#include "mbedtls/rsa.h" +#include "mbedtls/version.h" +#if defined(BOOTUTIL_CRYPTO_RSA_CRYPT_ENABLED) +#if MBEDTLS_VERSION_NUMBER >= 0x03000000 +#include "rsa_alt_helpers.h" +#else +#include "mbedtls/rsa_internal.h" +#endif +#endif /* BOOTUTIL_CRYPTO_RSA_CRYPT_ENABLED */ +#include "mbedtls/asn1.h" +#include "bootutil/crypto/common.h" + +#endif /* MCUBOOT_USE_MBED_TLS */ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(MCUBOOT_USE_PSA_CRYPTO) + +typedef struct { + psa_key_id_t key_id; +} bootutil_rsa_context; + +static inline void bootutil_rsa_init(bootutil_rsa_context *ctx) +{ + ctx->key_id = PSA_KEY_ID_NULL; +} + +static inline void bootutil_rsa_drop(bootutil_rsa_context *ctx) +{ + if (ctx->key_id != PSA_KEY_ID_NULL) { + (void)psa_destroy_key(ctx->key_id); + } +} + +#if defined(BOOTUTIL_CRYPTO_RSA_CRYPT_ENABLED) +static int bootutil_rsa_oaep_decrypt( + bootutil_rsa_context *ctx, + size_t *olen, + const uint8_t *input, + uint8_t *output, + size_t output_max_len) +{ + psa_status_t status = PSA_ERROR_INVALID_ARGUMENT; + + /* Perform an additional defensive check to compare the modulus of the RSA + * key to the expected input of the decryption function, i.e. TLV_ENC_RSA_SZ + */ + psa_key_attributes_t key_attr = psa_key_attributes_init(); + status = psa_get_key_attributes(ctx->key_id, &key_attr); + if (status != PSA_SUCCESS) { + return -1; + } + size_t input_size = PSA_BITS_TO_BYTES(psa_get_key_bits(&key_attr)); + if (input_size != TLV_ENC_RSA_SZ) { + return -1; + } + + status = psa_asymmetric_decrypt(ctx->key_id, PSA_ALG_RSA_OAEP(PSA_ALG_SHA_256), + input, TLV_ENC_RSA_SZ, NULL, 0, + output, output_max_len, olen); + return (int)status; +} + +/* + * Parse a RSA private key with format specified in RFC3447 A.1.2 + * + * The key is meant to be used for OAEP decrypt hence algorithm and usage are hardcoded + */ +static int +bootutil_rsa_parse_private_key(bootutil_rsa_context *ctx, uint8_t **p, uint8_t *end) +{ + psa_status_t status = PSA_ERROR_INVALID_ARGUMENT; + psa_key_attributes_t key_attributes = psa_key_attributes_init(); + + /* Set attributes and import key */ + psa_set_key_usage_flags(&key_attributes, PSA_KEY_USAGE_DECRYPT); + psa_set_key_algorithm(&key_attributes, PSA_ALG_RSA_OAEP(PSA_ALG_SHA_256)); + psa_set_key_type(&key_attributes, PSA_KEY_TYPE_RSA_KEY_PAIR); + + status = psa_import_key(&key_attributes, *p, (end - *p), &ctx->key_id); + return (int)status; +} + +#endif /* BOOTUTIL_CRYPTO_RSA_CRYPT_ENABLED */ + +#if defined(BOOTUTIL_CRYPTO_RSA_SIGN_ENABLED) +/* + * Parse a RSA public key with format specified in RFC3447 A.1.1 + * + * The key is meant to be used for PSS signature verification hence algorithm and usage are hardcoded + */ +static int +bootutil_rsa_parse_public_key(bootutil_rsa_context *ctx, uint8_t **p, uint8_t *end) +{ + psa_status_t status = PSA_ERROR_INVALID_ARGUMENT; + psa_key_attributes_t key_attributes = psa_key_attributes_init(); + + /* Set attributes and import key */ + psa_set_key_usage_flags(&key_attributes, PSA_KEY_USAGE_VERIFY_HASH); + psa_set_key_algorithm(&key_attributes, PSA_ALG_RSA_PSS(PSA_ALG_SHA_256)); + psa_set_key_type(&key_attributes, PSA_KEY_TYPE_RSA_PUBLIC_KEY); + + status = psa_import_key(&key_attributes, *p, (end - *p), &ctx->key_id); + return (int)status; +} + +/* Get the modulus (N) length in bytes */ +static size_t bootutil_rsa_get_len(const bootutil_rsa_context *ctx) +{ + psa_key_attributes_t key_attributes = psa_key_attributes_init(); + psa_status_t status = psa_get_key_attributes(ctx->key_id, &key_attributes); + if (status != PSA_SUCCESS) { + return 0; + } + return PSA_BITS_TO_BYTES(psa_get_key_bits(&key_attributes)); +} + +/* PSA Crypto has a dedicated API for RSASSA-PSS verification */ +static inline int bootutil_rsassa_pss_verify(const bootutil_rsa_context *ctx, + uint8_t *hash, size_t hlen, uint8_t *sig, size_t slen) +{ + return (int) psa_verify_hash(ctx->key_id, PSA_ALG_RSA_PSS(PSA_ALG_SHA_256), + hash, hlen, sig, slen); +} +#endif /* BOOTUTIL_CRYPTO_RSA_SIGN_ENABLED */ + +#elif defined(MCUBOOT_USE_MBED_TLS) + +typedef mbedtls_rsa_context bootutil_rsa_context; + +static inline void bootutil_rsa_init(bootutil_rsa_context *ctx) +{ +#if MBEDTLS_VERSION_NUMBER >= 0x03000000 + mbedtls_rsa_init(ctx); + mbedtls_rsa_set_padding(ctx, MBEDTLS_RSA_PKCS_V21, MBEDTLS_MD_SHA256); +#else + mbedtls_rsa_init(ctx, MBEDTLS_RSA_PKCS_V21, MBEDTLS_MD_SHA256); +#endif +} + +static inline void bootutil_rsa_drop(bootutil_rsa_context *ctx) +{ + mbedtls_rsa_free(ctx); +} + +#if defined(BOOTUTIL_CRYPTO_RSA_CRYPT_ENABLED) && (MBEDTLS_VERSION_NUMBER >= 0x03000000) +static int fake_rng(void *p_rng, unsigned char *output, size_t len); +#endif /* BOOTUTIL_CRYPTO_RSA_CRYPT_ENABLED && MBEDTLS_VERSION_NUMBER >= 3.0 */ + +#if defined(BOOTUTIL_CRYPTO_RSA_CRYPT_ENABLED) +static inline int bootutil_rsa_oaep_decrypt( + bootutil_rsa_context *ctx, + size_t *olen, + const uint8_t *input, + uint8_t *output, + size_t output_max_len) +{ + int rc = -1; +#if MBEDTLS_VERSION_NUMBER >= 0x03000000 + rc = mbedtls_rsa_rsaes_oaep_decrypt(ctx, fake_rng, NULL, + NULL, 0, olen, input, output, output_max_len); +#else + rc = mbedtls_rsa_rsaes_oaep_decrypt(ctx, NULL, NULL, MBEDTLS_RSA_PRIVATE, + NULL, 0, olen, input, output, output_max_len); +#endif + return rc; +} + +/* + * Parse a RSA private key with format specified in RFC3447 A.1.2 + */ +static int +bootutil_rsa_parse_private_key(bootutil_rsa_context *ctx, uint8_t **p, uint8_t *end) +{ + size_t len; + + if (mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE) != 0) { + return -1; + } + + if (*p + len != end) { + return -2; + } + + /* Non-optional fields. */ + if ( /* version */ + mbedtls_asn1_get_int(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(ver)) != 0 || + /* public modulus */ + mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(N)) != 0 || + /* public exponent */ + mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(E)) != 0 || + /* private exponent */ + mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(D)) != 0 || + /* primes */ + mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(P)) != 0 || + mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(Q)) != 0) { + + return -3; + } + +#if !defined(MBEDTLS_RSA_NO_CRT) + /* + * DP/DQ/QP are only used inside mbedTLS if it was built with the + * Chinese Remainder Theorem enabled (default). In case it is disabled + * we parse, or if not available, we calculate those values. + */ + if (*p < end) { + if ( /* d mod (p-1) and d mod (q-1) */ + mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(DP)) != 0 || + mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(DQ)) != 0 || + /* q ^ (-1) mod p */ + mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(QP)) != 0) { + + return -4; + } + } else { + if (mbedtls_rsa_deduce_crt(&ctx->MBEDTLS_CONTEXT_MEMBER(P), + &ctx->MBEDTLS_CONTEXT_MEMBER(Q), + &ctx->MBEDTLS_CONTEXT_MEMBER(D), + &ctx->MBEDTLS_CONTEXT_MEMBER(DP), + &ctx->MBEDTLS_CONTEXT_MEMBER(DQ), + &ctx->MBEDTLS_CONTEXT_MEMBER(QP)) != 0) { + return -5; + } + } +#endif /* !MBEDTLS_RSA_NO_CRT */ + + ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N)); + + if (mbedtls_rsa_check_privkey(ctx) != 0) { + return -6; + } + + return 0; +} +#endif /* BOOTUTIL_CRYPTO_RSA_CRYPT_ENABLED */ + +#if defined(BOOTUTIL_CRYPTO_RSA_SIGN_ENABLED) +/* + * Parse a RSA public key with format specified in RFC3447 A.1.1 + */ +static int +bootutil_rsa_parse_public_key(bootutil_rsa_context *ctx, uint8_t **p, uint8_t *end) +{ + int rc; + size_t len; + + if ((rc = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + return -1; + } + + if (*p + len != end) { + return -2; + } + + if ((rc = mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(N))) != 0 || + (rc = mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(E))) != 0) { + return -3; + } + + ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N)); + + if (*p != end) { + return -4; + } + + /* The Mbed TLS version is more than 2.6.1 */ +#if MBEDTLS_VERSION_NUMBER > 0x02060100 + rc = mbedtls_rsa_import(ctx, &ctx->MBEDTLS_CONTEXT_MEMBER(N), NULL, + NULL, NULL, &ctx->MBEDTLS_CONTEXT_MEMBER(E)); + if (rc != 0) { + return -5; + } +#endif + + rc = mbedtls_rsa_check_pubkey(ctx); + if (rc != 0) { + return -6; + } + + ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N)); + + return 0; +} + +/* Get the modulus (N) length in bytes */ +static inline size_t bootutil_rsa_get_len(const bootutil_rsa_context *ctx) +{ + return mbedtls_rsa_get_len(ctx); +} + +/* Performs modular exponentiation using the public key output = input^E mod N */ +static inline int bootutil_rsa_public(bootutil_rsa_context *ctx, const uint8_t *input, uint8_t *output) +{ + return mbedtls_rsa_public(ctx, input, output); +} +#endif /* BOOTUTIL_CRYPTO_RSA_SIGN_ENABLED */ + +#endif /* MCUBOOT_USE_MBED_TLS */ + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOTUTIL_CRYPTO_RSA_H_ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/sha.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/sha.h new file mode 100644 index 0000000..88e94fb --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/crypto/sha.h @@ -0,0 +1,250 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2017-2019 Linaro LTD + * Copyright (c) 2017-2019 JUUL Labs + * Copyright (c) 2021-2023 Arm Limited + */ + +/* + * This module provides a thin abstraction over some of the crypto + * primitives to make it easier to swap out the used crypto library. + * + * At this point, the choices are: MCUBOOT_USE_MBED_TLS, MCUBOOT_USE_TINYCRYPT, + * MCUBOOT_USE_PSA_CRYPTO, MCUBOOT_USE_CC310. Note that support for MCUBOOT_USE_PSA_CRYPTO + * is still experimental and it might not support all the crypto abstractions + * that MCUBOOT_USE_MBED_TLS supports. For this reason, it's allowed to have + * both of them defined, and for crypto modules that support both abstractions, + * the MCUBOOT_USE_PSA_CRYPTO will take precedence. + */ + +#ifndef __BOOTUTIL_CRYPTO_SHA_H_ +#define __BOOTUTIL_CRYPTO_SHA_H_ + +#include "mcuboot_config/mcuboot_config.h" +#include "mcuboot_config/mcuboot_logging.h" + +#if defined(MCUBOOT_USE_PSA_CRYPTO) || defined(MCUBOOT_USE_MBED_TLS) +#define MCUBOOT_USE_PSA_OR_MBED_TLS +#endif /* MCUBOOT_USE_PSA_CRYPTO || MCUBOOT_USE_MBED_TLS */ + +#if (defined(MCUBOOT_USE_PSA_OR_MBED_TLS) + \ + defined(MCUBOOT_USE_TINYCRYPT) + \ + defined(MCUBOOT_USE_NRF_EXTERNAL_CRYPTO) + \ + defined(MCUBOOT_USE_CC310)) != 1 + #error "One crypto backend must be defined: either CC310/MBED_TLS/TINYCRYPT/PSA_CRYPTO" +#endif + +#if defined(MCUBOOT_SHA512) + #define IMAGE_HASH_SIZE (64) + #define EXPECTED_HASH_TLV IMAGE_TLV_SHA512 +#elif defined(MCUBOOT_SIGN_EC384) + #define IMAGE_HASH_SIZE (48) + #define EXPECTED_HASH_TLV IMAGE_TLV_SHA384 +#else + #define IMAGE_HASH_SIZE (32) + #define EXPECTED_HASH_TLV IMAGE_TLV_SHA256 +#endif /* MCUBOOT_SIGN */ + +/* Universal defines for SHA-256 */ +#define BOOTUTIL_CRYPTO_SHA256_BLOCK_SIZE (64) +#define BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE (32) + +#if defined(MCUBOOT_USE_PSA_CRYPTO) + +#include + +#elif defined(MCUBOOT_USE_MBED_TLS) + +#include +#include +#if MBEDTLS_VERSION_NUMBER >= 0x03000000 +#include +#endif + +#endif /* MCUBOOT_USE_MBED_TLS */ + +#if defined(MCUBOOT_USE_TINYCRYPT) + #include + #include +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#if defined(MCUBOOT_USE_CC310) + #include +#endif /* MCUBOOT_USE_CC310 */ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(MCUBOOT_USE_PSA_CRYPTO) + +typedef psa_hash_operation_t bootutil_sha_context; + +static inline int bootutil_sha_init(bootutil_sha_context *ctx) +{ + *ctx = psa_hash_operation_init(); +#if defined(MCUBOOT_SHA512) + psa_status_t status = psa_hash_setup(ctx, PSA_ALG_SHA_512); +#elif defined(MCUBOOT_SIGN_EC384) + psa_status_t status = psa_hash_setup(ctx, PSA_ALG_SHA_384); +#else + psa_status_t status = psa_hash_setup(ctx, PSA_ALG_SHA_256); +#endif + return (int)status; +} + +static inline int bootutil_sha_drop(bootutil_sha_context *ctx) +{ + return (int)psa_hash_abort(ctx); +} + +static inline int bootutil_sha_update(bootutil_sha_context *ctx, + const void *data, + uint32_t data_len) +{ + return (int)psa_hash_update(ctx, data, data_len); +} + +static inline int bootutil_sha_finish(bootutil_sha_context *ctx, + uint8_t *output) +{ + size_t hash_length = 0; + /* Assumes the output buffer is at least the expected size of the hash */ +#if defined(MCUBOOT_SHA512) + return (int)psa_hash_finish(ctx, output, PSA_HASH_LENGTH(PSA_ALG_SHA_512), &hash_length); +#elif defined(MCUBOOT_SIGN_EC384) + return (int)psa_hash_finish(ctx, output, PSA_HASH_LENGTH(PSA_ALG_SHA_384), &hash_length); +#else + return (int)psa_hash_finish(ctx, output, PSA_HASH_LENGTH(PSA_ALG_SHA_256), &hash_length); +#endif +} + +#elif defined(MCUBOOT_USE_MBED_TLS) + +typedef mbedtls_sha256_context bootutil_sha_context; + +static inline int bootutil_sha_init(bootutil_sha_context *ctx) +{ + mbedtls_sha256_init(ctx); + return mbedtls_sha256_starts_ret(ctx, 0); +} + +static inline int bootutil_sha_drop(bootutil_sha_context *ctx) +{ + mbedtls_sha256_free(ctx); + return 0; +} + +static inline int bootutil_sha_update(bootutil_sha_context *ctx, + const void *data, + uint32_t data_len) +{ + return mbedtls_sha256_update_ret(ctx, data, data_len); +} + +static inline int bootutil_sha_finish(bootutil_sha_context *ctx, + uint8_t *output) +{ + return mbedtls_sha256_finish_ret(ctx, output); +} + +#endif /* MCUBOOT_USE_MBED_TLS */ + +#if defined(MCUBOOT_USE_TINYCRYPT) +typedef struct tc_sha256_state_struct bootutil_sha_context; + +static inline int bootutil_sha_init(bootutil_sha_context *ctx) +{ + tc_sha256_init(ctx); + return 0; +} + +static inline int bootutil_sha_drop(bootutil_sha_context *ctx) +{ + (void)ctx; + return 0; +} + +static inline int bootutil_sha_update(bootutil_sha_context *ctx, + const void *data, + uint32_t data_len) +{ + return tc_sha256_update(ctx, data, data_len); +} + +static inline int bootutil_sha_finish(bootutil_sha_context *ctx, + uint8_t *output) +{ + return tc_sha256_final(output, ctx); +} +#endif /* MCUBOOT_USE_TINYCRYPT */ + +#if defined(MCUBOOT_USE_CC310) +static inline int bootutil_sha_init(bootutil_sha_context *ctx) +{ + cc310_sha256_init(ctx); + return 0; +} + +static inline int bootutil_sha_drop(bootutil_sha_context *ctx) +{ + (void)ctx; + nrf_cc310_disable(); + return 0; +} + +static inline int bootutil_sha_update(bootutil_sha_context *ctx, + const void *data, + uint32_t data_len) +{ + cc310_sha256_update(ctx, data, data_len); + return 0; +} + +static inline int bootutil_sha_finish(bootutil_sha_context *ctx, + uint8_t *output) +{ + cc310_sha256_finalize(ctx, output); + return 0; +} +#endif /* MCUBOOT_USE_CC310 */ + +#if defined(MCUBOOT_USE_NRF_EXTERNAL_CRYPTO) + +#include + +typedef bl_sha256_ctx_t bootutil_sha_context; + +static inline void bootutil_sha_init(bootutil_sha_context *ctx) +{ + bl_sha256_init(ctx); +} + +static inline void bootutil_sha_drop(bootutil_sha_context *ctx) +{ + (void)ctx; +} + +static inline int bootutil_sha_update(bootutil_sha_context *ctx, + const void *data, + uint32_t data_len) +{ + return bl_sha256_update(ctx, data, data_len); +} + +static inline int bootutil_sha_finish(bootutil_sha_context *ctx, + uint8_t *output) +{ + bl_sha256_finalize(ctx, output); + return 0; +} +#endif /* MCUBOOT_USE_NRF_EXTERNAL_CRYPTO */ + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOTUTIL_CRYPTO_SHA_H_ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/enc_key.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/enc_key.h new file mode 100644 index 0000000..4ff2432 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/enc_key.h @@ -0,0 +1,83 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2018-2019 JUUL Labs + * Copyright (c) 2019 Arm Limited + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef BOOTUTIL_ENC_KEY_H +#define BOOTUTIL_ENC_KEY_H + +#include +#include +#include +#include "bootutil/crypto/aes_ctr.h" +#include "bootutil/image.h" +#include "bootutil/sign_key.h" +#include "bootutil/enc_key_public.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define BOOT_ENC_TLV_ALIGN_SIZE ALIGN_UP(BOOT_ENC_TLV_SIZE, BOOT_MAX_ALIGN) + +struct enc_key_data { + uint8_t valid; + bootutil_aes_ctr_context aes_ctr; +}; + +/** + * Retrieve the private key for image encryption. + * + * @param[out] private_key structure to store the private key and + * its length. + * + * @return 0 on success; nonzero on failure. + * + */ +int boot_enc_retrieve_private_key(struct bootutil_key **private_key); + +struct boot_status; + +/* Decrypt random, symmetric encryption key */ +int boot_decrypt_key(const uint8_t *buf, uint8_t *enckey); + +int boot_enc_init(struct enc_key_data *enc_state, uint8_t slot); +int boot_enc_drop(struct enc_key_data *enc_state, uint8_t slot); +int boot_enc_set_key(struct enc_key_data *enc_state, uint8_t slot, + const struct boot_status *bs); +int boot_enc_load(struct enc_key_data *enc_state, int slot, + const struct image_header *hdr, const struct flash_area *fap, + struct boot_status *bs); +bool boot_enc_valid(struct enc_key_data *enc_state, int slot); +void boot_enc_encrypt(struct enc_key_data *enc_state, int slot, + uint32_t off, uint32_t sz, uint32_t blk_off, uint8_t *buf); +void boot_enc_decrypt(struct enc_key_data *enc_state, int slot, + uint32_t off, uint32_t sz, uint32_t blk_off, uint8_t *buf); +void boot_enc_zeroize(struct enc_key_data *enc_state); + +#ifdef __cplusplus +} +#endif + +#endif /* BOOTUTIL_ENC_KEY_H */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/enc_key_public.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/enc_key_public.h new file mode 100644 index 0000000..6874cfb --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/enc_key_public.h @@ -0,0 +1,66 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2018-2019 JUUL Labs + * Copyright (c) 2019-2021 Arm Limited + * Copyright (c) 2021 Nordic Semiconductor ASA + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef BOOTUTIL_ENC_KEY_PUBLIC_H +#define BOOTUTIL_ENC_KEY_PUBLIC_H +#include +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef ALIGN_UP +#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1)) +#endif + +#ifdef MCUBOOT_AES_256 +#define BOOT_ENC_KEY_SIZE 32 +#else +#define BOOT_ENC_KEY_SIZE 16 +#endif + +#define BOOT_ENC_KEY_ALIGN_SIZE ALIGN_UP(BOOT_ENC_KEY_SIZE, BOOT_MAX_ALIGN) + +#define TLV_ENC_RSA_SZ 256 +#define TLV_ENC_KW_SZ (BOOT_ENC_KEY_SIZE + 8) +#define TLV_ENC_EC256_SZ (65 + 32 + BOOT_ENC_KEY_SIZE) +#define TLV_ENC_X25519_SZ (32 + 32 + BOOT_ENC_KEY_SIZE) + +#if defined(MCUBOOT_ENCRYPT_RSA) +#define BOOT_ENC_TLV_SIZE TLV_ENC_RSA_SZ +#elif defined(MCUBOOT_ENCRYPT_EC256) +#define BOOT_ENC_TLV_SIZE TLV_ENC_EC256_SZ +#elif defined(MCUBOOT_ENCRYPT_X25519) +#define BOOT_ENC_TLV_SIZE TLV_ENC_X25519_SZ +#else +#define BOOT_ENC_TLV_SIZE TLV_ENC_KW_SZ +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* BOOTUTIL_ENC_KEY_PUBLIC_H */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/fault_injection_hardening.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/fault_injection_hardening.h new file mode 100644 index 0000000..fdf01b5 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/fault_injection_hardening.h @@ -0,0 +1,371 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2020 Arm Limited + */ + +#ifndef __FAULT_INJECTION_HARDENING_H__ +#define __FAULT_INJECTION_HARDENING_H__ + +/* Fault injection mitigation library. + * + * Has support for different measures, which can either be enabled/disabled + * separately or by defining one of the MCUBOOT_FIH_PROFILEs. + * + * NOTE: These constructs against fault injection attacks are not guaranteed to + * be secure for all compilers, but execution is going to be correct and + * including them will certainly help to harden the code. + * + * FIH_ENABLE_DOUBLE_VARS makes critical variables into a tuple (x, x ^ msk). + * Then the correctness of x can be checked by XORing the two tuple values + * together. This also means that comparisons between fih_ints can be verified + * by doing x == y && x_msk == y_msk. + * + * FIH_ENABLE_GLOBAL_FAIL makes all while(1) failure loops redirect to a global + * failure loop. This loop has mitigations against loop escapes / unlooping. + * This also means that any unlooping won't immediately continue executing the + * function that was executing before the failure. + * + * FIH_ENABLE_CFI (Control Flow Integrity) creates a global counter that is + * incremented before every FIH_CALL of vulnerable functions. On the function + * return the counter is decremented, and after the return it is verified that + * the counter has the same value as before this process. This can be used to + * verify that the function has actually been called. This protection is + * intended to discover that important functions are called in an expected + * sequence and neither of them is missed due to an instruction skip which could + * be a result of glitching attack. It does not provide protection against ROP + * or JOP attacks. + * + * FIH_ENABLE_DELAY causes random delays. This makes it hard to cause faults + * precisely. It requires an RNG. An mbedtls integration is provided in + * fault_injection_hardening_delay_mbedtls.h, but any RNG that has an entropy + * source can be used by implementing the fih_delay_random_uchar function. + * + * The basic call pattern is: + * + * FIH_DECLARE(fih_rc, FIH_FAILURE); + * FIH_CALL(vulnerable_function, fih_rc, arg1, arg2); + * if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + * FIH_PANIC; + * } + * + * Note that any function called by FIH_CALL must only return using FIH_RETURN, + * as otherwise the CFI counter will not be decremented and the CFI check will + * fail causing a panic. + */ + +#include "mcuboot_config/mcuboot_config.h" + +#if defined(MCUBOOT_FIH_PROFILE_HIGH) + +#define FIH_ENABLE_DELAY /* Requires an entropy source */ +#define FIH_ENABLE_DOUBLE_VARS +#define FIH_ENABLE_GLOBAL_FAIL +#define FIH_ENABLE_CFI + +#elif defined(MCUBOOT_FIH_PROFILE_MEDIUM) + +#define FIH_ENABLE_DOUBLE_VARS +#define FIH_ENABLE_GLOBAL_FAIL +#define FIH_ENABLE_CFI + +#elif defined(MCUBOOT_FIH_PROFILE_LOW) + +#define FIH_ENABLE_GLOBAL_FAIL +#define FIH_ENABLE_CFI + +#elif !defined(MCUBOOT_FIH_PROFILE_OFF) +#define MCUBOOT_FIH_PROFILE_OFF +#endif /* MCUBOOT_FIH_PROFILE */ + +#ifdef FIH_ENABLE_DELAY +#include "fault_injection_hardening_delay_rng.h" +#endif /* FIH_ENABLE_DELAY */ + + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +/* Non-zero success value to defend against register resets. Zero is the most + * common value for a corrupted register so complex bit-patterns are used + */ +#ifndef MCUBOOT_FIH_PROFILE_OFF +#define FIH_POSITIVE_VALUE 0x1AAAAAAA +#define FIH_NEGATIVE_VALUE 0x15555555 +#define FIH_CONST1 0x1FCDEA88 +#define FIH_CONST2 0x19C1F6E1 +#else +#define FIH_POSITIVE_VALUE 0 +#define FIH_NEGATIVE_VALUE -1 +#define FIH_CONST1 1 +#define FIH_CONST2 1 +#endif + +/* A volatile mask is used to prevent compiler optimization - the mask is xored + * with the variable to create the backup and the integrity can be checked with + * another xor. The mask value doesn't _really_ matter that much, as long as + * it has reasonably high hamming weight. + */ +#define _FIH_MASK_VALUE 0xBEEF + +#ifdef FIH_ENABLE_DOUBLE_VARS + +/* All ints are replaced with two int - the normal one and a backup which is + * XORed with the mask. + */ +extern volatile int _fih_mask; +typedef volatile struct { + volatile int val; + volatile int msk; +} fih_int; +typedef volatile int fih_ret; + +#else + +typedef int fih_int; +typedef int fih_ret; + +#endif /* FIH_ENABLE_DOUBLE_VARS */ + +extern fih_ret FIH_SUCCESS; +extern fih_ret FIH_FAILURE; +extern fih_ret FIH_NO_BOOTABLE_IMAGE; +extern fih_ret FIH_BOOT_HOOK_REGULAR; + +#ifdef FIH_ENABLE_GLOBAL_FAIL +/* Global failure handler - more resistant to unlooping. noinline and used are + * used to prevent optimization + */ +__attribute__((noinline)) __attribute__((used)) +void fih_panic_loop(void); +#define FIH_PANIC fih_panic_loop() +#else +#define FIH_PANIC while (1) {} +#endif /* FIH_ENABLE_GLOBAL_FAIL */ + +/* NOTE: For functions to be inlined outside their compilation unit they have to + * have the body in the header file. This is required as function calls are easy + * to skip. + */ +#ifdef FIH_ENABLE_DELAY + +/* Delaying logic, with randomness from a CSPRNG */ +__attribute__((always_inline)) inline +int fih_delay(void) +{ + unsigned char delay; + int foo = 0; + volatile int rc; + + delay = fih_delay_random_uchar(); + + for (volatile int i = 0; i < delay; i++) { + foo++; + } + + rc = 1; + + /* rc is volatile so if it is the return value then the function cannot be + * optimized + */ + return rc; +} + +#else + +__attribute__((always_inline)) inline +int fih_delay_init(void) +{ + return 1; +} + +__attribute__((always_inline)) inline +int fih_delay(void) +{ + return 1; +} +#endif /* FIH_ENABLE_DELAY */ + +#ifdef FIH_ENABLE_DOUBLE_VARS + +__attribute__((always_inline)) inline +void fih_int_validate(fih_int x) +{ + if (x.val != (x.msk ^ _fih_mask)) { + FIH_PANIC; + } +} + +/* Convert a fih_int to an int. Validate for tampering. */ +__attribute__((always_inline)) inline +int fih_int_decode(fih_int x) +{ + fih_int_validate(x); + return x.val; +} + +/* Convert an int to a fih_int, can be used to encode specific error codes. */ +__attribute__((always_inline)) inline +fih_int fih_int_encode(int x) +{ + fih_int ret = {x, x ^ _fih_mask}; + return ret; +} + +/* Standard equality. If A == B then 1, else 0 */ +#define FIH_EQ(x, y) ((x == y) && fih_delay() && !(y != x)) +#define FIH_NOT_EQ(x, y) ((x != y) || !fih_delay() || !(y == x)) +#define FIH_SET(x, y) x = y; if(fih_delay() && (x != y)) FIH_PANIC + +#else + +/* NOOP */ +__attribute__((always_inline)) inline +void fih_int_validate(fih_int x) +{ + (void) x; + return; +} + +/* NOOP */ +__attribute__((always_inline)) inline +int fih_int_decode(fih_int x) +{ + return x; +} + +/* NOOP */ +__attribute__((always_inline)) inline +fih_int fih_int_encode(int x) +{ + return x; +} + +#define FIH_EQ(x, y) (x == y) +#define FIH_NOT_EQ(x, y) (x != y) +#define FIH_SET(x, y) x = y + +#endif /* FIH_ENABLE_DOUBLE_VARS */ + +#define FIH_DECLARE(var, val) \ + fih_ret FIH_SET(var, val) + +/* C has a common return pattern where 0 is a correct value and all others are + * errors. This function converts 0 to FIH_SUCCESS and any other number to a + * value that is not FIH_SUCCESS + */ +__attribute__((always_inline)) inline +fih_ret fih_ret_encode_zero_equality(int x) +{ + if (x) { + return FIH_FAILURE; + } else { + return FIH_SUCCESS; + } +} + +#ifdef FIH_ENABLE_CFI +extern fih_int _fih_cfi_ctr; +#endif /* FIH_ENABLE_CFI */ + +fih_int fih_cfi_get_and_increment(void); +void fih_cfi_validate(fih_int saved); +void fih_cfi_decrement(void); + +/* Label for interacting with FIH testing tool. Can be parsed from the elf file + * after compilation. Does not require debug symbols. + */ +#if defined(__ICCARM__) +#define FIH_LABEL(str, lin, cnt) __asm volatile ("FIH_LABEL_" str "_" #lin "_" #cnt "::" ::); +#elif defined(__APPLE__) +#define FIH_LABEL(str) do {} while (0) +#else +#define FIH_LABEL(str) __asm volatile ("FIH_LABEL_" str "_%=:" ::); +#endif + +/* Main FIH calling macro. return variable is second argument. Does some setup + * before and validation afterwards. Inserts labels for use with testing script. + * + * First perform the precall step - this gets the current value of the CFI + * counter and saves it to a local variable, and then increments the counter. + * + * Then set the return variable to FIH_FAILURE as a base case. + * + * Then perform the function call. As part of the funtion FIH_RET must be called + * which will decrement the counter. + * + * The postcall step gets the value of the counter and compares it to the + * previously saved value. If this is equal then the function call and all child + * function calls were performed. + */ +#if defined(__ICCARM__) +#define FIH_CALL(f, ret, ...) FIH_CALL2(f, ret, __LINE__, __COUNTER__, __VA_ARGS__) + +#define FIH_CALL2(f, ret, l, c, ...) \ + do { \ + FIH_LABEL("FIH_CALL_START", l, c); \ + FIH_CFI_PRECALL_BLOCK; \ + ret = FIH_FAILURE; \ + if (fih_delay()) { \ + ret = f(__VA_ARGS__); \ + } \ + FIH_CFI_POSTCALL_BLOCK; \ + FIH_LABEL("FIH_CALL_END", l, c); \ + } while (0) + +#else + +#define FIH_CALL(f, ret, ...) \ + do { \ + FIH_LABEL("FIH_CALL_START"); \ + FIH_CFI_PRECALL_BLOCK; \ + ret = FIH_FAILURE; \ + if (fih_delay()) { \ + ret = f(__VA_ARGS__); \ + } \ + FIH_CFI_POSTCALL_BLOCK; \ + FIH_LABEL("FIH_CALL_END"); \ + } while (0) +#endif + +/* FIH return changes the state of the internal state machine. If you do a + * FIH_CALL then you need to do a FIH_RET else the state machine will detect + * tampering and panic. + */ +#define FIH_RET(ret) \ + do { \ + FIH_CFI_PRERET; \ + return ret; \ + } while (0) + + +#ifdef FIH_ENABLE_CFI +/* Macro wrappers for functions - Even when the functions have zero body this + * saves a few bytes on noop functions as it doesn't generate the call/ret + * + * CFI precall function saves the CFI counter and then increments it - the + * postcall then checks if the counter is equal to the saved value. In order for + * this to be the case a FIH_RET must have been performed inside the called + * function in order to decrement the counter, so the function must have been + * called. + */ +#define FIH_CFI_PRECALL_BLOCK \ + fih_int _fih_cfi_saved_value = fih_cfi_get_and_increment() + +#define FIH_CFI_POSTCALL_BLOCK \ + fih_cfi_validate(_fih_cfi_saved_value) + +#define FIH_CFI_PRERET \ + fih_cfi_decrement() +#else +#define FIH_CFI_PRECALL_BLOCK +#define FIH_CFI_POSTCALL_BLOCK +#define FIH_CFI_PRERET +#endif /* FIH_ENABLE_CFI */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __FAULT_INJECTION_HARDENING_H__ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/fault_injection_hardening_delay_rng.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/fault_injection_hardening_delay_rng.h new file mode 100644 index 0000000..339fecb --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/fault_injection_hardening_delay_rng.h @@ -0,0 +1,30 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2020 Arm Limited + */ + +#ifndef __FAULT_INJECTION_HARDENING_DELAY_RNG_H__ +#define __FAULT_INJECTION_HARDENING_DELAY_RNG_H__ + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +/** + * \brief Set up the RNG for use with random delays. Called once at startup. + */ +int fih_delay_init(void); + +/** + * \brief Get a random unsigned char from an RNG seeded with an entropy source. + * + * \return A random value that fits inside an unsigned char. + */ +unsigned char fih_delay_random_uchar(void); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __FAULT_INJECTION_HARDENING_DELAY_RNG_H__ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/ignore.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/ignore.h new file mode 100644 index 0000000..1684c05 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/ignore.h @@ -0,0 +1,70 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2017 Nordic Semiconductor ASA + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_IGNORE_ +#define H_IGNORE_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * These macros prevent the "set but not used" warnings for log writes below + * the log level. + */ + +#define IGN_1(X) ((void)(X)) +#define IGN_2(X, ...) ((void)(X));IGN_1(__VA_ARGS__) +#define IGN_3(X, ...) ((void)(X));IGN_2(__VA_ARGS__) +#define IGN_4(X, ...) ((void)(X));IGN_3(__VA_ARGS__) +#define IGN_5(X, ...) ((void)(X));IGN_4(__VA_ARGS__) +#define IGN_6(X, ...) ((void)(X));IGN_5(__VA_ARGS__) +#define IGN_7(X, ...) ((void)(X));IGN_6(__VA_ARGS__) +#define IGN_8(X, ...) ((void)(X));IGN_7(__VA_ARGS__) +#define IGN_9(X, ...) ((void)(X));IGN_8(__VA_ARGS__) +#define IGN_10(X, ...) ((void)(X));IGN_9(__VA_ARGS__) +#define IGN_11(X, ...) ((void)(X));IGN_10(__VA_ARGS__) +#define IGN_12(X, ...) ((void)(X));IGN_11(__VA_ARGS__) +#define IGN_13(X, ...) ((void)(X));IGN_12(__VA_ARGS__) +#define IGN_14(X, ...) ((void)(X));IGN_13(__VA_ARGS__) +#define IGN_15(X, ...) ((void)(X));IGN_14(__VA_ARGS__) +#define IGN_16(X, ...) ((void)(X));IGN_15(__VA_ARGS__) +#define IGN_17(X, ...) ((void)(X));IGN_16(__VA_ARGS__) +#define IGN_18(X, ...) ((void)(X));IGN_17(__VA_ARGS__) +#define IGN_19(X, ...) ((void)(X));IGN_18(__VA_ARGS__) +#define IGN_20(X, ...) ((void)(X));IGN_19(__VA_ARGS__) + +#define GET_MACRO(_1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, \ + _13, _14, _15, _16, _17, _18, _19, _20, NAME, ...) NAME +#define IGNORE(...) \ + GET_MACRO(__VA_ARGS__, IGN_20, IGN_19, IGN_18, IGN_17, IGN_16, IGN_15, \ + IGN_14, IGN_13, IGN_12, IGN_11, IGN_10, IGN_9, IGN_8, IGN_7, \ + IGN_6, IGN_5, IGN_4, IGN_3, IGN_2, IGN_1)(__VA_ARGS__) + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/image.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/image.h new file mode 100644 index 0000000..05e0443 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/image.h @@ -0,0 +1,228 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2016-2019 Linaro LTD + * Copyright (c) 2016-2019 JUUL Labs + * Copyright (c) 2019-2023 Arm Limited + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_IMAGE_ +#define H_IMAGE_ + +#include +#include +#include "bootutil/fault_injection_hardening.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef __packed +#define __packed __attribute__((__packed__)) +#endif + +struct flash_area; + +#define IMAGE_MAGIC 0x96f3b83d +#define IMAGE_MAGIC_V1 0x96f3b83c +#define IMAGE_MAGIC_NONE 0xffffffff +#define IMAGE_TLV_INFO_MAGIC 0x6907 +#define IMAGE_TLV_PROT_INFO_MAGIC 0x6908 + +#define IMAGE_HEADER_SIZE 32 +#define IMAGE_HASH_LEN 32 /* Size of SHA256 TLV hash */ + +/* + * Image header flags. + */ +#define IMAGE_F_PIC 0x00000001 /* Not supported. */ +#define IMAGE_F_ENCRYPTED_AES128 0x00000004 /* Encrypted using AES128. */ +#define IMAGE_F_ENCRYPTED_AES256 0x00000008 /* Encrypted using AES256. */ +#define IMAGE_F_NON_BOOTABLE 0x00000010 /* Split image app. */ +/* + * Indicates that this image should be loaded into RAM instead of run + * directly from flash. The address to load should be in the + * ih_load_addr field of the header. + */ +#define IMAGE_F_RAM_LOAD 0x00000020 + +/* + * Indicates that ih_load_addr stores information on flash/ROM address the + * image has been built for. + */ +#define IMAGE_F_ROM_FIXED 0x00000100 + +/* + * Flags that indicate if the image data is compressed + */ +#define IMAGE_F_COMPRESSED_LZMA1 0x00000200 +#define IMAGE_F_COMPRESSED_LZMA2 0x00000400 +#define IMAGE_F_COMPRESSED_ARM_THUMB_FLT 0x00000800 + +/* + * ECSDA224 is with NIST P-224 + * ECSDA256 is with NIST P-256 + */ + +/* + * Image trailer TLV types. + * + * Signature is generated by computing signature over the image hash. + * + * Signature comes in the form of 2 TLVs. + * 1st on identifies the public key which should be used to verify it. + * 2nd one is the actual signature. + */ +#define IMAGE_TLV_KEYHASH 0x01 /* hash of the public key */ +#define IMAGE_TLV_PUBKEY 0x02 /* public key */ +#define IMAGE_TLV_SHA256 0x10 /* SHA256 of image hdr and body */ +#define IMAGE_TLV_SHA384 0x11 /* SHA384 of image hdr and body */ +#define IMAGE_TLV_SHA512 0x12 /* SHA512 of image hdr and body */ +#define IMAGE_TLV_RSA2048_PSS 0x20 /* RSA2048 of hash output */ +#define IMAGE_TLV_ECDSA224 0x21 /* ECDSA of hash output - Not supported anymore */ +#define IMAGE_TLV_ECDSA_SIG 0x22 /* ECDSA of hash output */ +#define IMAGE_TLV_RSA3072_PSS 0x23 /* RSA3072 of hash output */ +#define IMAGE_TLV_ED25519 0x24 /* ed25519 of hash output */ +#define IMAGE_TLV_SIG_PURE 0x25 /* Indicator that attached signature has been prepared + * over image rather than its digest. + */ +#define IMAGE_TLV_ENC_RSA2048 0x30 /* Key encrypted with RSA-OAEP-2048 */ +#define IMAGE_TLV_ENC_KW 0x31 /* Key encrypted with AES-KW 128 or 256*/ +#define IMAGE_TLV_ENC_EC256 0x32 /* Key encrypted with ECIES-EC256 */ +#define IMAGE_TLV_ENC_X25519 0x33 /* Key encrypted with ECIES-X25519 */ +#define IMAGE_TLV_DEPENDENCY 0x40 /* Image depends on other image */ +#define IMAGE_TLV_SEC_CNT 0x50 /* security counter */ +#define IMAGE_TLV_BOOT_RECORD 0x60 /* measured boot record */ +/* The following flags relate to compressed images and are for the decompressed image data */ +#define IMAGE_TLV_DECOMP_SIZE 0x70 /* Decompressed image size excluding header/TLVs */ +#define IMAGE_TLV_DECOMP_SHA 0x71 /* + * Decompressed image shaX hash, this field must match + * the format and size of the raw slot (compressed) + * shaX hash + */ +#define IMAGE_TLV_DECOMP_SIGNATURE 0x72 /* + * Decompressed image signature, this field must match + * the format and size of the raw slot (compressed) + * signature + */ + /* + * vendor reserved TLVs at xxA0-xxFF, + * where xx denotes the upper byte + * range. Examples: + * 0x00a0 - 0x00ff + * 0x01a0 - 0x01ff + * 0x02a0 - 0x02ff + * ... + * 0xffa0 - 0xfffe + */ +#define IMAGE_TLV_ANY 0xffff /* Used to iterate over all TLV */ + +struct image_version { + uint8_t iv_major; + uint8_t iv_minor; + uint16_t iv_revision; + uint32_t iv_build_num; +} __packed; + +struct image_dependency { + uint8_t image_id; /* Image index (from 0) */ + uint8_t _pad1; + uint16_t _pad2; + struct image_version image_min_version; /* Indicates at minimum which + * version of firmware must be + * available to satisfy compliance + */ +}; + +/** Image header. All fields are in little endian byte order. */ +struct image_header { + uint32_t ih_magic; + uint32_t ih_load_addr; + uint16_t ih_hdr_size; /* Size of image header (bytes). */ + uint16_t ih_protect_tlv_size; /* Size of protected TLV area (bytes). */ + uint32_t ih_img_size; /* Does not include header. */ + uint32_t ih_flags; /* IMAGE_F_[...]. */ + struct image_version ih_ver; + uint32_t _pad1; +} __packed; + +/** Image TLV header. All fields in little endian. */ +struct image_tlv_info { + uint16_t it_magic; + uint16_t it_tlv_tot; /* size of TLV area (including tlv_info header) */ +} __packed; + +/** Image trailer TLV format. All fields in little endian. */ +struct image_tlv { + uint16_t it_type; /* IMAGE_TLV_[...]. */ + uint16_t it_len; /* Data length (not including TLV header). */ +} __packed; + +#define ENCRYPTIONFLAGS (IMAGE_F_ENCRYPTED_AES128 | IMAGE_F_ENCRYPTED_AES256) +#define IS_ENCRYPTED(hdr) (((hdr)->ih_flags & IMAGE_F_ENCRYPTED_AES128) \ + || ((hdr)->ih_flags & IMAGE_F_ENCRYPTED_AES256)) +#define MUST_DECRYPT(fap, idx, hdr) \ + (flash_area_get_id(fap) == FLASH_AREA_IMAGE_SECONDARY(idx) && IS_ENCRYPTED(hdr)) + +#define COMPRESSIONFLAGS (IMAGE_F_COMPRESSED_LZMA1 | IMAGE_F_COMPRESSED_LZMA2 \ + | IMAGE_F_COMPRESSED_ARM_THUMB_FLT) +#define IS_COMPRESSED(hdr) ((hdr)->ih_flags & COMPRESSIONFLAGS) +#define MUST_DECOMPRESS(fap, idx, hdr) \ + (flash_area_get_id(fap) == FLASH_AREA_IMAGE_SECONDARY(idx) && IS_COMPRESSED(hdr)) + +_Static_assert(sizeof(struct image_header) == IMAGE_HEADER_SIZE, + "struct image_header not required size"); + +struct enc_key_data; +fih_ret bootutil_img_validate(struct enc_key_data *enc_state, int image_index, + struct image_header *hdr, + const struct flash_area *fap, + uint8_t *tmp_buf, uint32_t tmp_buf_sz, + uint8_t *seed, int seed_len, uint8_t *out_hash); + +struct image_tlv_iter { + const struct image_header *hdr; + const struct flash_area *fap; + uint16_t type; + bool prot; + uint32_t prot_end; + uint32_t tlv_off; + uint32_t tlv_end; +}; + +int bootutil_tlv_iter_begin(struct image_tlv_iter *it, + const struct image_header *hdr, + const struct flash_area *fap, uint16_t type, + bool prot); +int bootutil_tlv_iter_next(struct image_tlv_iter *it, uint32_t *off, + uint16_t *len, uint16_t *type); +int bootutil_tlv_iter_is_prot(struct image_tlv_iter *it, uint32_t off); + +int32_t bootutil_get_img_security_cnt(struct image_header *hdr, + const struct flash_area *fap, + uint32_t *security_cnt); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/mcuboot_status.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/mcuboot_status.h new file mode 100644 index 0000000..b734923 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/mcuboot_status.h @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2022, Laird Connectivity + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef H_MCUBOOT_STATUS_ +#define H_MCUBOOT_STATUS_ + +/* Enumeration representing the states that MCUboot can be in */ +typedef enum +{ + MCUBOOT_STATUS_STARTUP = 0, + MCUBOOT_STATUS_UPGRADING, + MCUBOOT_STATUS_BOOTABLE_IMAGE_FOUND, + MCUBOOT_STATUS_NO_BOOTABLE_IMAGE_FOUND, + MCUBOOT_STATUS_BOOT_FAILED, + MCUBOOT_STATUS_USB_DFU_WAITING, + MCUBOOT_STATUS_USB_DFU_ENTERED, + MCUBOOT_STATUS_USB_DFU_TIMED_OUT, + MCUBOOT_STATUS_SERIAL_DFU_ENTERED, +} mcuboot_status_type_t; + +#if defined(CONFIG_MCUBOOT_ACTION_HOOKS) +extern void mcuboot_status_change(mcuboot_status_type_t status); +#else +#define mcuboot_status_change(_status) do {} while (0) +#endif + +#endif /* H_MCUBOOT_STATUS_ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/ramload.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/ramload.h new file mode 100644 index 0000000..03513b0 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/ramload.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2021, Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __RAMLOAD_H__ +#define __RAMLOAD_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef MULTIPLE_EXECUTABLE_RAM_REGIONS +/** + * Provides information about the Executable RAM for a given image ID. + * + * @param image_id Index of the image (from 0). + * @param exec_ram_start Pointer to store the start address of the exec RAM + * @param exec_ram_size Pointer to store the size of the exec RAM + * + * @return 0 on success; nonzero on failure. + */ +int boot_get_image_exec_ram_info(uint32_t image_id, + uint32_t *exec_ram_start, + uint32_t *exec_ram_size); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __RAMLOAD_H__ */ \ No newline at end of file diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/security_cnt.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/security_cnt.h new file mode 100644 index 0000000..e1562d2 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/security_cnt.h @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2019-2020, Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __SECURITY_CNT_H__ +#define __SECURITY_CNT_H__ + +/** + * @file security_cnt.h + * + * @note The interface must be implemented in a fail-safe way that is + * resistant to asynchronous power failures or it can use hardware + * counters that have this capability, if supported by the platform. + * When a counter incrementation was interrupted it must be able to + * continue the incrementation process or recover the previous consistent + * status of the counters. If the counters have reached a stable status + * (every counter incrementation operation has finished), from that point + * their value cannot decrease due to any kind of power failure. + * + * @note A security counter might be implemented using non-volatile OTP memory + * (i.e. fuses) in which case it is the responsibility of the platform + * code to map each possible security counter values onto the fuse bits + * as the direct usage of counter values can be costly / impractical. + */ + +#include +#include "bootutil/fault_injection_hardening.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Initialises the security counters. + * + * @return FIH_SUCCESS on success + */ +fih_ret boot_nv_security_counter_init(void); + +/** + * Reads the stored value of a given image's security counter. + * + * @param image_id Index of the image (from 0). + * @param security_cnt Pointer to store the security counter value. + * + * @return FIH_SUCCESS on success + */ +fih_ret boot_nv_security_counter_get(uint32_t image_id, fih_int *security_cnt); + +/** + * Updates the stored value of a given image's security counter with a new + * security counter value if the new one is greater. + * + * @param image_id Index of the image (from 0). + * @param img_security_cnt New security counter value. The new value must be + * between 0 and UINT32_MAX and it must be greater than + * or equal to the current security counter value. + * + * @return 0 on success; nonzero on failure. + */ +int32_t boot_nv_security_counter_update(uint32_t image_id, + uint32_t img_security_cnt); + +#ifdef __cplusplus +} +#endif + +#endif /* __SECURITY_CNT_H__ */ diff --git a/bootloader/mcuboot/boot/bootutil/include/bootutil/sign_key.h b/bootloader/mcuboot/boot/bootutil/include/bootutil/sign_key.h new file mode 100644 index 0000000..a5e81d3 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/include/bootutil/sign_key.h @@ -0,0 +1,71 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef __BOOTUTIL_SIGN_KEY_H_ +#define __BOOTUTIL_SIGN_KEY_H_ + +#include +#include + +/* mcuboot_config.h is needed for MCUBOOT_HW_KEY to work */ +#include "mcuboot_config/mcuboot_config.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef MCUBOOT_HW_KEY +struct bootutil_key { + const uint8_t *key; + const unsigned int *len; +}; + +extern const struct bootutil_key bootutil_keys[]; +#else +struct bootutil_key { + uint8_t *key; + unsigned int *len; +}; + +extern struct bootutil_key bootutil_keys[]; + +/** + * Retrieve the hash of the corresponding public key for image authentication. + * + * @param[in] image_index Index of the image to be authenticated. + * @param[out] public_key_hash Buffer to store the key-hash in. + * @param[in,out] key_hash_size As input the size of the buffer. As output + * the actual key-hash length. + * + * @return 0 on success; nonzero on failure. + */ +int boot_retrieve_public_key_hash(uint8_t image_index, + uint8_t *public_key_hash, + size_t *key_hash_size); +#endif /* !MCUBOOT_HW_KEY */ + +extern const int bootutil_key_cnt; + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOTUTIL_SIGN_KEY_H_ */ diff --git a/bootloader/mcuboot/boot/bootutil/pkg.yml b/bootloader/mcuboot/boot/bootutil/pkg.yml new file mode 100644 index 0000000..e919785 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/pkg.yml @@ -0,0 +1,65 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: boot/bootutil +pkg.description: The bootutil library performs most of the functions of a boot loader. +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: + - boot + - bootloader + +pkg.apis: + - bootloader + +pkg.cflags: + - "-DMCUBOOT_MYNEWT=1" + +pkg.cflags.BOOTUTIL_USE_MBED_TLS: + - '-DMBEDTLS_USER_CONFIG_FILE="mbedtls/config_mynewt.h"' + +pkg.deps: + - "@mcuboot/boot/mynewt/mcuboot_config" + - "@apache-mynewt-core/hw/hal" + - "@apache-mynewt-core/kernel/os" + - "@apache-mynewt-core/sys/defs" + - "@mcuboot/boot/mynewt/flash_map_backend" + +pkg.ign_files.BOOTUTIL_SINGLE_APPLICATION_SLOT: + - "loader.c" + - "swap_scratch.c" + +pkg.deps.BOOTUTIL_USE_MBED_TLS: + - "@apache-mynewt-core/crypto/mbedtls" + +pkg.deps.BOOTUTIL_USE_TINYCRYPT: + - "@mcuboot/ext/tinycrypt/lib" + - "@mcuboot/ext/mbedtls-asn1" + +pkg.deps.BOOTUTIL_SIGN_ED25519: + - "@mcuboot/ext/tinycrypt/lib" + - "@mcuboot/ext/tinycrypt-sha512/lib" + - "@mcuboot/ext/mbedtls-asn1" + - "@mcuboot/ext/fiat" + +pkg.deps.BOOTUTIL_ENCRYPT_X25519: + - "@mcuboot/ext/tinycrypt/lib" + - "@mcuboot/ext/tinycrypt-sha512/lib" + - "@mcuboot/ext/mbedtls-asn1" + - "@mcuboot/ext/fiat" diff --git a/bootloader/mcuboot/boot/bootutil/src/boot_record.c b/bootloader/mcuboot/boot/bootutil/src/boot_record.c new file mode 100644 index 0000000..ccd9e6e --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/boot_record.c @@ -0,0 +1,343 @@ +/* + * Copyright (c) 2018-2023 Arm Limited + * Copyright (c) 2020 Linaro Limited + * Copyright (c) 2023, Nordic Semiconductor ASA + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include + +#include "mcuboot_config/mcuboot_config.h" +#include "bootutil/crypto/sha.h" + +#if defined(MCUBOOT_MEASURED_BOOT) || defined(MCUBOOT_DATA_SHARING) +#include "bootutil/boot_record.h" +#include "bootutil/boot_status.h" +#include "bootutil_priv.h" +#include "bootutil/image.h" +#include "flash_map_backend/flash_map_backend.h" + +#if !defined(MCUBOOT_CUSTOM_DATA_SHARING_FUNCTION) +/** + * @var shared_memory_init_done + * + * @brief Indicates whether shared memory area was already initialized. + * + */ +static bool shared_memory_init_done; + +/* See in boot_record.h */ +int +boot_add_data_to_shared_area(uint8_t major_type, + uint16_t minor_type, + size_t size, + const uint8_t *data) +{ + struct shared_data_tlv_entry tlv_entry = {0}; + struct shared_boot_data *boot_data; + uint16_t boot_data_size; + uintptr_t tlv_end, offset; + + if (data == NULL) { + return SHARED_MEMORY_GEN_ERROR; + } + + boot_data = (struct shared_boot_data *)MCUBOOT_SHARED_DATA_BASE; + + /* Check whether first time to call this function. If does then initialise + * shared data area. + */ + if (!shared_memory_init_done) { + memset((void *)MCUBOOT_SHARED_DATA_BASE, 0, MCUBOOT_SHARED_DATA_SIZE); + boot_data->header.tlv_magic = SHARED_DATA_TLV_INFO_MAGIC; + boot_data->header.tlv_tot_len = SHARED_DATA_HEADER_SIZE; + shared_memory_init_done = true; + } + + /* Check whether TLV entry is already added. + * Get the boundaries of TLV section + */ + tlv_end = MCUBOOT_SHARED_DATA_BASE + boot_data->header.tlv_tot_len; + offset = MCUBOOT_SHARED_DATA_BASE + SHARED_DATA_HEADER_SIZE; + + /* Iterates over the TLV section looks for the same entry if found then + * returns with error: SHARED_MEMORY_OVERWRITE + */ + while (offset < tlv_end) { + /* Create local copy to avoid unaligned access */ + memcpy(&tlv_entry, (const void *)offset, SHARED_DATA_ENTRY_HEADER_SIZE); + if (GET_MAJOR(tlv_entry.tlv_type) == major_type && + GET_MINOR(tlv_entry.tlv_type) == minor_type) { + return SHARED_MEMORY_OVERWRITE; + } + + offset += SHARED_DATA_ENTRY_SIZE(tlv_entry.tlv_len); + } + + /* Add TLV entry */ + tlv_entry.tlv_type = SET_TLV_TYPE(major_type, minor_type); + tlv_entry.tlv_len = size; + + if (!boot_u16_safe_add(&boot_data_size, boot_data->header.tlv_tot_len, + SHARED_DATA_ENTRY_SIZE(size))) { + return SHARED_MEMORY_GEN_ERROR; + } + + /* Verify overflow of shared area */ + if (boot_data_size > MCUBOOT_SHARED_DATA_SIZE) { + return SHARED_MEMORY_OVERFLOW; + } + + offset = tlv_end; + memcpy((void *)offset, &tlv_entry, SHARED_DATA_ENTRY_HEADER_SIZE); + + offset += SHARED_DATA_ENTRY_HEADER_SIZE; + memcpy((void *)offset, data, size); + + boot_data->header.tlv_tot_len += SHARED_DATA_ENTRY_SIZE(size); + + return SHARED_MEMORY_OK; +} +#endif /* MCUBOOT_MEASURED_BOOT OR MCUBOOT_DATA_SHARING */ +#endif /* !MCUBOOT_CUSTOM_DATA_SHARING_FUNCTION */ + +#ifdef MCUBOOT_MEASURED_BOOT +/* See in boot_record.h */ +int +boot_save_boot_status(uint8_t sw_module, + const struct image_header *hdr, + const struct flash_area *fap) +{ + + struct image_tlv_iter it; + uint32_t offset; + uint16_t len; + uint16_t type; + uint16_t ias_minor; + size_t record_len = 0; + uint8_t image_hash[IMAGE_HASH_SIZE]; + uint8_t buf[MAX_BOOT_RECORD_SZ]; + bool boot_record_found = false; + bool hash_found = false; + int rc; + + /* Manifest data is concatenated to the end of the image. + * It is encoded in TLV format. + */ + + rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_ANY, false); + if (rc) { + return -1; + } + + /* Traverse through the TLV area to find the boot record + * and image hash TLVs. + */ + while (true) { + rc = bootutil_tlv_iter_next(&it, &offset, &len, &type); + if (rc < 0) { + return -1; + } else if (rc > 0) { + break; + } + + if (type == IMAGE_TLV_BOOT_RECORD) { + if (len > sizeof(buf)) { + return -1; + } + rc = flash_area_read(fap, offset, buf, len); + if (rc) { + return -1; + } + + record_len = len; + boot_record_found = true; + + } else if (type == EXPECTED_HASH_TLV) { + /* Get the image's hash value from the manifest section. */ + if (len > sizeof(image_hash)) { + return -1; + } + rc = flash_area_read(fap, offset, image_hash, len); + if (rc) { + return -1; + } + + hash_found = true; + + /* The boot record TLV is part of the protected TLV area which is + * located before the other parts of the TLV area (including the + * image hash) so at this point it is okay to break the loop + * as the boot record TLV should have already been found. + */ + break; + } + } + + if (!boot_record_found || !hash_found) { + return -1; + } + + /* Ensure that we have enough in the record for the hash. This + * prevents an underflow in the calculation below. + */ + if (record_len < sizeof(image_hash)) { + return -1; + } + + /* Update the measurement value (hash of the image) data item in the + * boot record. It is always the last item in the structure to make + * it easy to calculate its position. + * The image hash is computed over the image header, the image itself and + * the protected TLV area (which should already include the image hash as + * part of the boot record TLV). For this reason this field has been + * filled with zeros during the image signing process. + */ + offset = record_len - sizeof(image_hash); + /* The size of 'buf' has already been checked when + * the BOOT_RECORD TLV was read, it won't overflow. + */ + memcpy(buf + offset, image_hash, sizeof(image_hash)); + + /* Add the CBOR encoded boot record to the shared data area. */ + ias_minor = SET_IAS_MINOR(sw_module, SW_BOOT_RECORD); + rc = boot_add_data_to_shared_area(TLV_MAJOR_IAS, + ias_minor, + record_len, + buf); + if (rc != SHARED_MEMORY_OK) { + return rc; + } + + return 0; +} +#endif /* MCUBOOT_MEASURED_BOOT */ + +#ifdef MCUBOOT_DATA_SHARING_BOOTINFO +int boot_save_shared_data(const struct image_header *hdr, const struct flash_area *fap, + const uint8_t slot, const struct image_max_size *max_app_sizes) +{ + int rc; + uint8_t image = 0; + +#if defined(MCUBOOT_SINGLE_APPLICATION_SLOT) + uint8_t mode = MCUBOOT_MODE_SINGLE_SLOT; +#elif defined(MCUBOOT_SWAP_USING_SCRATCH) + uint8_t mode = MCUBOOT_MODE_SWAP_USING_SCRATCH; +#elif defined(MCUBOOT_OVERWRITE_ONLY) + uint8_t mode = MCUBOOT_MODE_UPGRADE_ONLY; +#elif defined(MCUBOOT_SWAP_USING_MOVE) + uint8_t mode = MCUBOOT_MODE_SWAP_USING_MOVE; +#elif defined(MCUBOOT_DIRECT_XIP) +#if defined(MCUBOOT_DIRECT_XIP_REVERT) + uint8_t mode = MCUBOOT_MODE_DIRECT_XIP_WITH_REVERT; +#else + uint8_t mode = MCUBOOT_MODE_DIRECT_XIP; +#endif +#elif defined(MCUBOOT_RAM_LOAD) + uint8_t mode = MCUBOOT_MODE_RAM_LOAD; +#elif defined(MCUBOOT_FIRMWARE_LOADER) + uint8_t mode = MCUBOOT_MODE_FIRMWARE_LOADER; +#else +#error "Unknown mcuboot operating mode" +#endif + +#if defined(MCUBOOT_SIGN_RSA) + uint8_t signature_type = MCUBOOT_SIGNATURE_TYPE_RSA; +#elif defined(MCUBOOT_SIGN_EC256) + uint8_t signature_type = MCUBOOT_SIGNATURE_TYPE_ECDSA_P256; +#elif defined(MCUBOOT_SIGN_ED25519) + uint8_t signature_type = MCUBOOT_SIGNATURE_TYPE_ED25519; +#else + uint8_t signature_type = MCUBOOT_SIGNATURE_TYPE_NONE; +#endif + +#if defined(MCUBOOT_SERIAL_RECOVERY) + uint8_t recovery = MCUBOOT_RECOVERY_MODE_SERIAL_RECOVERY; +#elif defined(MCUBOOT_USB_DFU) + uint8_t recovery = MCUBOOT_RECOVERY_MODE_DFU; +#else + uint8_t recovery = MCUBOOT_RECOVERY_MODE_NONE; +#endif + +#if defined(MCUBOOT_VERSION_AVAILABLE) + struct image_version mcuboot_version = { + .iv_major = MCUBOOT_VERSION_MAJOR, + .iv_minor = MCUBOOT_VERSION_MINOR, + +#if defined(MCUBOOT_VERSION_PATCHLEVEL) + .iv_revision = MCUBOOT_VERSION_PATCHLEVEL, +#else + .iv_revision = 0, +#endif + +#if defined(MCUBOOT_VERSION_TWEAK) + .iv_build_num = MCUBOOT_VERSION_TWEAK, +#else + .iv_build_num = 0, +#endif + }; +#endif + + /* Write out all fields */ + rc = boot_add_data_to_shared_area(TLV_MAJOR_BLINFO, BLINFO_MODE, + sizeof(mode), &mode); + + if (!rc) { + rc = boot_add_data_to_shared_area(TLV_MAJOR_BLINFO, + BLINFO_SIGNATURE_TYPE, + sizeof(signature_type), + &signature_type); + } + + if (!rc) { + rc = boot_add_data_to_shared_area(TLV_MAJOR_BLINFO, + BLINFO_RECOVERY, + sizeof(recovery), &recovery); + } + + if (!rc) { + rc = boot_add_data_to_shared_area(TLV_MAJOR_BLINFO, + BLINFO_RUNNING_SLOT, + sizeof(slot), (void *)&slot); + } + +#if defined(MCUBOOT_VERSION_AVAILABLE) + if (!rc) { + rc = boot_add_data_to_shared_area(TLV_MAJOR_BLINFO, + BLINFO_BOOTLOADER_VERSION, + sizeof(mcuboot_version), + (void *)&mcuboot_version); + } +#endif + + while (image < BOOT_IMAGE_NUMBER && !rc) { + if (max_app_sizes[image].calculated == true) { + rc = boot_add_data_to_shared_area(TLV_MAJOR_BLINFO, + (BLINFO_MAX_APPLICATION_SIZE + image), + sizeof(max_app_sizes[image].max_size), + (void *)&max_app_sizes[image].max_size); + + } + + ++image; + } + + return rc; +} +#endif /* MCUBOOT_DATA_SHARING_BOOTINFO */ diff --git a/bootloader/mcuboot/boot/bootutil/src/bootutil_misc.c b/bootloader/mcuboot/boot/bootutil/src/bootutil_misc.c new file mode 100644 index 0000000..4620213 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/bootutil_misc.c @@ -0,0 +1,357 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2017-2019 Linaro LTD + * Copyright (c) 2016-2019 JUUL Labs + * Copyright (c) 2019-2020 Arm Limited + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include +#include +#include + +#include "sysflash/sysflash.h" +#include "flash_map_backend/flash_map_backend.h" + +#include "bootutil/image.h" +#include "bootutil/bootutil.h" +#include "bootutil_priv.h" +#include "bootutil_misc.h" +#include "bootutil/bootutil_log.h" +#include "bootutil/fault_injection_hardening.h" +#ifdef MCUBOOT_ENC_IMAGES +#include "bootutil/enc_key.h" +#endif + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +/* Currently only used by imgmgr */ +int boot_current_slot; + +/** + * @brief Determine if the data at two memory addresses is equal + * + * @param s1 The first memory region to compare. + * @param s2 The second memory region to compare. + * @param n The amount of bytes to compare. + * + * @note This function does not comply with the specification of memcmp, + * so should not be considered a drop-in replacement. It has no + * constant time execution. The point is to make sure that all the + * bytes are compared and detect if loop was abused and some cycles + * was skipped due to fault injection. + * + * @return FIH_SUCCESS if memory regions are equal, otherwise FIH_FAILURE + */ +#ifdef MCUBOOT_FIH_PROFILE_OFF +inline +fih_ret boot_fih_memequal(const void *s1, const void *s2, size_t n) +{ + return memcmp(s1, s2, n); +} +#else +fih_ret boot_fih_memequal(const void *s1, const void *s2, size_t n) +{ + size_t i; + uint8_t *s1_p = (uint8_t*) s1; + uint8_t *s2_p = (uint8_t*) s2; + FIH_DECLARE(ret, FIH_FAILURE); + + for (i = 0; i < n; i++) { + if (s1_p[i] != s2_p[i]) { + goto out; + } + } + if (i == n) { + ret = FIH_SUCCESS; + } + +out: + FIH_RET(ret); +} +#endif + +/* + * Amount of space used to save information required when doing a swap, + * or while a swap is under progress, but not the status of sector swap + * progress itself. + */ +static inline uint32_t +boot_trailer_info_sz(void) +{ + return ( +#ifdef MCUBOOT_ENC_IMAGES + /* encryption keys */ +# if MCUBOOT_SWAP_SAVE_ENCTLV + BOOT_ENC_TLV_ALIGN_SIZE * 2 + +# else + BOOT_ENC_KEY_ALIGN_SIZE * 2 + +# endif +#endif + /* swap_type + copy_done + image_ok + swap_size */ + BOOT_MAX_ALIGN * 4 + + BOOT_MAGIC_ALIGN_SIZE + ); +} + +/* + * Amount of space used to maintain progress information for a single swap + * operation. + */ +static inline uint32_t +boot_status_entry_sz(uint32_t min_write_sz) +{ + return BOOT_STATUS_STATE_COUNT * min_write_sz; +} + +uint32_t +boot_status_sz(uint32_t min_write_sz) +{ + return BOOT_STATUS_MAX_ENTRIES * boot_status_entry_sz(min_write_sz); +} + +uint32_t +boot_trailer_sz(uint32_t min_write_sz) +{ + return boot_status_sz(min_write_sz) + boot_trailer_info_sz(); +} + +#if MCUBOOT_SWAP_USING_SCRATCH +/* + * Similar to `boot_trailer_sz` but this function returns the space used to + * store status in the scratch partition. The scratch partition only stores + * status during the swap of the last sector from primary/secondary (which + * is the first swap operation) and thus only requires space for one swap. + */ +static uint32_t +boot_scratch_trailer_sz(uint32_t min_write_sz) +{ + return boot_status_entry_sz(min_write_sz) + boot_trailer_info_sz(); +} +#endif + +int +boot_status_entries(int image_index, const struct flash_area *fap) +{ +#if MCUBOOT_SWAP_USING_SCRATCH + if (flash_area_get_id(fap) == FLASH_AREA_IMAGE_SCRATCH) { + return BOOT_STATUS_STATE_COUNT; + } else +#endif + if (flash_area_get_id(fap) == FLASH_AREA_IMAGE_PRIMARY(image_index) || + flash_area_get_id(fap) == FLASH_AREA_IMAGE_SECONDARY(image_index)) { + return BOOT_STATUS_STATE_COUNT * BOOT_STATUS_MAX_ENTRIES; + } + return -1; +} + +uint32_t +boot_status_off(const struct flash_area *fap) +{ + uint32_t off_from_end; + uint32_t elem_sz; + + elem_sz = flash_area_align(fap); + +#if MCUBOOT_SWAP_USING_SCRATCH + if (fap->fa_id == FLASH_AREA_IMAGE_SCRATCH) { + off_from_end = boot_scratch_trailer_sz(elem_sz); + } else { +#endif + off_from_end = boot_trailer_sz(elem_sz); +#if MCUBOOT_SWAP_USING_SCRATCH + } +#endif + + assert(off_from_end <= flash_area_get_size(fap)); + return flash_area_get_size(fap) - off_from_end; +} + +#ifdef MCUBOOT_ENC_IMAGES +static inline uint32_t +boot_enc_key_off(const struct flash_area *fap, uint8_t slot) +{ +#if MCUBOOT_SWAP_SAVE_ENCTLV + return boot_swap_size_off(fap) - ((slot + 1) * BOOT_ENC_TLV_ALIGN_SIZE); +#else + return boot_swap_size_off(fap) - ((slot + 1) * BOOT_ENC_KEY_ALIGN_SIZE); +#endif +} +#endif + +/** + * This functions tries to locate the status area after an aborted swap, + * by looking for the magic in the possible locations. + * + * If the magic is successfully found, a flash_area * is returned and it + * is the responsibility of the called to close it. + * + * @returns 0 on success, -1 on errors + */ +int +boot_find_status(int image_index, const struct flash_area **fap) +{ + uint8_t areas[] = { +#if MCUBOOT_SWAP_USING_SCRATCH + FLASH_AREA_IMAGE_SCRATCH, +#endif + FLASH_AREA_IMAGE_PRIMARY(image_index), + }; + unsigned int i; + + /* + * In the middle a swap, tries to locate the area that is currently + * storing a valid magic, first on the primary slot, then on scratch. + * Both "slots" can end up being temporary storage for a swap and it + * is assumed that if magic is valid then other metadata is too, + * because magic is always written in the last step. + */ + + for (i = 0; i < sizeof(areas) / sizeof(areas[0]); i++) { + uint8_t magic[BOOT_MAGIC_SZ]; + + if (flash_area_open(areas[i], fap)) { + break; + } + + if (flash_area_read(*fap, boot_magic_off(*fap), magic, BOOT_MAGIC_SZ)) { + flash_area_close(*fap); + break; + } + + if (BOOT_MAGIC_GOOD == boot_magic_decode(magic)) { + return 0; + } + + flash_area_close(*fap); + } + + /* If we got here, no magic was found */ + fap = NULL; + return -1; +} + +int +boot_read_swap_size(const struct flash_area *fap, uint32_t *swap_size) +{ + uint32_t off; + int rc; + + off = boot_swap_size_off(fap); + rc = flash_area_read(fap, off, swap_size, sizeof *swap_size); + + return rc; +} + +#ifdef MCUBOOT_ENC_IMAGES +int +boot_read_enc_key(const struct flash_area *fap, uint8_t slot, struct boot_status *bs) +{ + uint32_t off; +#if MCUBOOT_SWAP_SAVE_ENCTLV + uint32_t i; +#endif + int rc; + + off = boot_enc_key_off(fap, slot); +#if MCUBOOT_SWAP_SAVE_ENCTLV + rc = flash_area_read(fap, off, bs->enctlv[slot], BOOT_ENC_TLV_ALIGN_SIZE); + if (rc == 0) { + for (i = 0; i < BOOT_ENC_TLV_ALIGN_SIZE; i++) { + if (bs->enctlv[slot][i] != 0xff) { + break; + } + } + /* Only try to decrypt non-erased TLV metadata */ + if (i != BOOT_ENC_TLV_ALIGN_SIZE) { + rc = boot_decrypt_key(bs->enctlv[slot], bs->enckey[slot]); + } + } +#else + rc = flash_area_read(fap, off, bs->enckey[slot], BOOT_ENC_KEY_ALIGN_SIZE); +#endif + + return rc; +} +#endif + +int +boot_write_swap_size(const struct flash_area *fap, uint32_t swap_size) +{ + uint32_t off; + + off = boot_swap_size_off(fap); + BOOT_LOG_DBG("writing swap_size; fa_id=%d off=0x%lx (0x%lx)", + flash_area_get_id(fap), (unsigned long)off, + (unsigned long)flash_area_get_off(fap) + off); + return boot_write_trailer(fap, off, (const uint8_t *) &swap_size, 4); +} + +#ifdef MCUBOOT_ENC_IMAGES +int +boot_write_enc_key(const struct flash_area *fap, uint8_t slot, + const struct boot_status *bs) +{ + uint32_t off; + int rc; + + off = boot_enc_key_off(fap, slot); + BOOT_LOG_DBG("writing enc_key; fa_id=%d off=0x%lx (0x%lx)", + flash_area_get_id(fap), (unsigned long)off, + (unsigned long)flash_area_get_off(fap) + off); +#if MCUBOOT_SWAP_SAVE_ENCTLV + rc = flash_area_write(fap, off, bs->enctlv[slot], BOOT_ENC_TLV_ALIGN_SIZE); +#else + rc = flash_area_write(fap, off, bs->enckey[slot], BOOT_ENC_KEY_ALIGN_SIZE); +#endif + if (rc != 0) { + return BOOT_EFLASH; + } + + return 0; +} +#endif + +uint32_t bootutil_max_image_size(const struct flash_area *fap) +{ +#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SINGLE_APPLICATION_SLOT) || \ + defined(MCUBOOT_FIRMWARE_LOADER) + return boot_status_off(fap); +#elif defined(MCUBOOT_SWAP_USING_MOVE) + struct flash_sector sector; + /* get the last sector offset */ + int rc = flash_area_get_sector(fap, boot_status_off(fap), §or); + if (rc) { + BOOT_LOG_ERR("Unable to determine flash sector of the image trailer"); + return 0; /* Returning of zero here should cause any check which uses + * this value to fail. + */ + } + return flash_sector_get_off(§or); +#elif defined(MCUBOOT_OVERWRITE_ONLY) + return boot_swap_info_off(fap); +#elif defined(MCUBOOT_DIRECT_XIP) + return boot_swap_info_off(fap); +#elif defined(MCUBOOT_RAM_LOAD) + return boot_swap_info_off(fap); +#endif +} diff --git a/bootloader/mcuboot/boot/bootutil/src/bootutil_misc.h b/bootloader/mcuboot/boot/bootutil/src/bootutil_misc.h new file mode 100644 index 0000000..1fcaabd --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/bootutil_misc.h @@ -0,0 +1,52 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2023 Nordic Semiconductor ASA + * + */ +#ifndef H_BOOTUTIL_MISC_ +#define H_BOOTUTIL_MISC_ + +#include +#include +#include + +#include "bootutil/bootutil_public.h" +#ifdef MCUBOOT_ENC_IMAGES +#include "bootutil/enc_key.h" +#endif + +static int +boot_magic_decode(const uint8_t *magic) +{ + if (memcmp(magic, BOOT_IMG_MAGIC, BOOT_MAGIC_SZ) == 0) { + return BOOT_MAGIC_GOOD; + } + return BOOT_MAGIC_BAD; +} + +static inline uint32_t +boot_magic_off(const struct flash_area *fap) +{ + return flash_area_get_size(fap) - BOOT_MAGIC_SZ; +} + +static inline uint32_t +boot_image_ok_off(const struct flash_area *fap) +{ + return ALIGN_DOWN(boot_magic_off(fap) - BOOT_MAX_ALIGN, BOOT_MAX_ALIGN); +} + +static inline uint32_t +boot_copy_done_off(const struct flash_area *fap) +{ + return boot_image_ok_off(fap) - BOOT_MAX_ALIGN; +} + +static inline uint32_t +boot_swap_size_off(const struct flash_area *fap) +{ + return boot_swap_info_off(fap) - BOOT_MAX_ALIGN; +} + +#endif /* H_BOOTUTIL_MISC_ */ diff --git a/bootloader/mcuboot/boot/bootutil/src/bootutil_priv.h b/bootloader/mcuboot/boot/bootutil/src/bootutil_priv.h new file mode 100644 index 0000000..c23f616 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/bootutil_priv.h @@ -0,0 +1,486 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2017-2020 Linaro LTD + * Copyright (c) 2017-2019 JUUL Labs + * Copyright (c) 2019-2021 Arm Limited + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_BOOTUTIL_PRIV_ +#define H_BOOTUTIL_PRIV_ + +#include + +#include "sysflash/sysflash.h" + +#include + +#include "bootutil/bootutil.h" +#include "bootutil/image.h" +#include "bootutil/fault_injection_hardening.h" +#include "mcuboot_config/mcuboot_config.h" + +#ifdef MCUBOOT_ENC_IMAGES +#include "bootutil/enc_key.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +struct flash_area; + +#define BOOT_TMPBUF_SZ 256 + +/** Number of image slots in flash; currently limited to two. */ +#define BOOT_NUM_SLOTS 2 + +#if (defined(MCUBOOT_OVERWRITE_ONLY) + \ + defined(MCUBOOT_SWAP_USING_MOVE) + \ + defined(MCUBOOT_DIRECT_XIP) + \ + defined(MCUBOOT_RAM_LOAD) + \ + defined(MCUBOOT_FIRMWARE_LOADER) + \ + defined(MCUBOOT_SWAP_USING_SCRATCH)) > 1 +#error "Please enable only one of MCUBOOT_OVERWRITE_ONLY, MCUBOOT_SWAP_USING_MOVE, MCUBOOT_DIRECT_XIP, MCUBOOT_RAM_LOAD or MCUBOOT_FIRMWARE_LOADER" +#endif + +#if !defined(MCUBOOT_DIRECT_XIP) && \ + defined(MCUBOOT_DIRECT_XIP_REVERT) +#error "MCUBOOT_DIRECT_XIP_REVERT cannot be enabled unless MCUBOOT_DIRECT_XIP is used" +#endif + +#if !defined(MCUBOOT_OVERWRITE_ONLY) && \ + !defined(MCUBOOT_SWAP_USING_MOVE) && \ + !defined(MCUBOOT_DIRECT_XIP) && \ + !defined(MCUBOOT_RAM_LOAD) && \ + !defined(MCUBOOT_SINGLE_APPLICATION_SLOT) && \ + !defined(MCUBOOT_FIRMWARE_LOADER) +#define MCUBOOT_SWAP_USING_SCRATCH 1 +#endif + +#define BOOT_STATUS_OP_MOVE 1 +#define BOOT_STATUS_OP_SWAP 2 + +/* + * Maintain state of copy progress. + */ +struct boot_status { + uint32_t idx; /* Which area we're operating on */ + uint8_t state; /* Which part of the swapping process are we at */ + uint8_t op; /* What operation are we performing? */ + uint8_t use_scratch; /* Are status bytes ever written to scratch? */ + uint8_t swap_type; /* The type of swap in effect */ + uint32_t swap_size; /* Total size of swapped image */ +#ifdef MCUBOOT_ENC_IMAGES + uint8_t enckey[BOOT_NUM_SLOTS][BOOT_ENC_KEY_ALIGN_SIZE]; +#if MCUBOOT_SWAP_SAVE_ENCTLV + uint8_t enctlv[BOOT_NUM_SLOTS][BOOT_ENC_TLV_ALIGN_SIZE]; +#endif +#endif + int source; /* Which slot contains swap status metadata */ +}; + +#define BOOT_STATUS_IDX_0 1 + +#define BOOT_STATUS_STATE_0 1 +#define BOOT_STATUS_STATE_1 2 +#define BOOT_STATUS_STATE_2 3 + +/** + * End-of-image slot structure. + * + * 0 1 2 3 + * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * ~ ~ + * ~ Swap status (BOOT_MAX_IMG_SECTORS * min-write-size * 3) ~ + * ~ ~ + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | Encryption key 0 (16 octets) [*] | + * | | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | 0xff padding as needed | + * | (BOOT_MAX_ALIGN minus 16 octets from Encryption key 0) [*] | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | Encryption key 1 (16 octets) [*] | + * | | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | 0xff padding as needed | + * | (BOOT_MAX_ALIGN minus 16 octets from Encryption key 1) [*] | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | Swap size (4 octets) | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | 0xff padding as needed | + * | (BOOT_MAX_ALIGN minus 4 octets from Swap size) | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | Swap info | 0xff padding (BOOT_MAX_ALIGN minus 1 octet) | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | Copy done | 0xff padding (BOOT_MAX_ALIGN minus 1 octet) | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | Image OK | 0xff padding (BOOT_MAX_ALIGN minus 1 octet) | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | 0xff padding as needed | + * | (BOOT_MAX_ALIGN minus 16 octets from MAGIC) | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * | MAGIC (16 octets) | + * | | + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + * + * [*]: Only present if the encryption option is enabled + * (`MCUBOOT_ENC_IMAGES`). + */ + +union boot_img_magic_t +{ + struct { + uint16_t align; + uint8_t magic[14]; + }; + uint8_t val[16]; +}; + +extern const union boot_img_magic_t boot_img_magic; + +#define BOOT_IMG_MAGIC (boot_img_magic.val) + +#if BOOT_MAX_ALIGN == 8 +#define BOOT_IMG_ALIGN (BOOT_MAX_ALIGN) +#else +#define BOOT_IMG_ALIGN (boot_img_magic.align) +#endif + +_Static_assert(sizeof(boot_img_magic) == BOOT_MAGIC_SZ, "Invalid size for image magic"); + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) +#define ARE_SLOTS_EQUIVALENT() 0 +#else +#define ARE_SLOTS_EQUIVALENT() 1 + +#if defined(MCUBOOT_DIRECT_XIP) && defined(MCUBOOT_ENC_IMAGES) +#error "Image encryption (MCUBOOT_ENC_IMAGES) is not supported when MCUBOOT_DIRECT_XIP is selected." +#endif /* MCUBOOT_DIRECT_XIP && MCUBOOT_ENC_IMAGES */ +#endif /* MCUBOOT_DIRECT_XIP || MCUBOOT_RAM_LOAD */ + +#define BOOT_MAX_IMG_SECTORS MCUBOOT_MAX_IMG_SECTORS + +#define BOOT_LOG_IMAGE_INFO(slot, hdr) \ + BOOT_LOG_INF("%-9s slot: version=%u.%u.%u+%u", \ + ((slot) == BOOT_PRIMARY_SLOT) ? "Primary" : "Secondary", \ + (hdr)->ih_ver.iv_major, \ + (hdr)->ih_ver.iv_minor, \ + (hdr)->ih_ver.iv_revision, \ + (hdr)->ih_ver.iv_build_num) + +#if MCUBOOT_SWAP_USING_MOVE +#define BOOT_STATUS_MOVE_STATE_COUNT 1 +#define BOOT_STATUS_SWAP_STATE_COUNT 2 +#define BOOT_STATUS_STATE_COUNT (BOOT_STATUS_MOVE_STATE_COUNT + BOOT_STATUS_SWAP_STATE_COUNT) +#else +#define BOOT_STATUS_STATE_COUNT 3 +#endif + +/** Maximum number of image sectors supported by the bootloader. */ +#define BOOT_STATUS_MAX_ENTRIES BOOT_MAX_IMG_SECTORS + +#define BOOT_PRIMARY_SLOT 0 +#define BOOT_SECONDARY_SLOT 1 + +#define BOOT_STATUS_SOURCE_NONE 0 +#define BOOT_STATUS_SOURCE_SCRATCH 1 +#define BOOT_STATUS_SOURCE_PRIMARY_SLOT 2 + +/** + * Compatibility shim for flash sector type. + * + * This can be deleted when flash_area_to_sectors() is removed. + */ +#ifdef MCUBOOT_USE_FLASH_AREA_GET_SECTORS +typedef struct flash_sector boot_sector_t; +#else +typedef struct flash_area boot_sector_t; +#endif + +/** Private state maintained during boot. */ +struct boot_loader_state { + struct { + struct image_header hdr; + const struct flash_area *area; + boot_sector_t *sectors; + uint32_t num_sectors; + } imgs[BOOT_IMAGE_NUMBER][BOOT_NUM_SLOTS]; + +#if MCUBOOT_SWAP_USING_SCRATCH + struct { + const struct flash_area *area; + boot_sector_t *sectors; + uint32_t num_sectors; + } scratch; +#endif + + uint8_t swap_type[BOOT_IMAGE_NUMBER]; + uint32_t write_sz; + +#if defined(MCUBOOT_ENC_IMAGES) + struct enc_key_data enc[BOOT_IMAGE_NUMBER][BOOT_NUM_SLOTS]; +#endif + +#if (BOOT_IMAGE_NUMBER > 1) + uint8_t curr_img_idx; + bool img_mask[BOOT_IMAGE_NUMBER]; +#endif + +#if defined(MCUBOOT_DIRECT_XIP) || defined(MCUBOOT_RAM_LOAD) + struct slot_usage_t { + /* Index of the slot chosen to be loaded */ + uint32_t active_slot; + bool slot_available[BOOT_NUM_SLOTS]; +#if defined(MCUBOOT_RAM_LOAD) + /* Image destination and size for the active slot */ + uint32_t img_dst; + uint32_t img_sz; +#elif defined(MCUBOOT_DIRECT_XIP_REVERT) + /* Swap status for the active slot */ + struct boot_swap_state swap_state; +#endif + } slot_usage[BOOT_IMAGE_NUMBER]; +#endif /* MCUBOOT_DIRECT_XIP || MCUBOOT_RAM_LOAD */ +}; + +fih_ret bootutil_verify_sig(uint8_t *hash, uint32_t hlen, uint8_t *sig, + size_t slen, uint8_t key_id); + +fih_ret bootutil_verify_img(const uint8_t *img, uint32_t size, + uint8_t *sig, size_t slen, uint8_t key_id); + +fih_ret boot_fih_memequal(const void *s1, const void *s2, size_t n); + +int boot_find_status(int image_index, const struct flash_area **fap); +int boot_magic_compatible_check(uint8_t tbl_val, uint8_t val); +uint32_t boot_status_sz(uint32_t min_write_sz); +uint32_t boot_trailer_sz(uint32_t min_write_sz); +int boot_status_entries(int image_index, const struct flash_area *fap); +uint32_t boot_status_off(const struct flash_area *fap); +int boot_read_swap_state(const struct flash_area *fap, + struct boot_swap_state *state); +int boot_read_swap_state_by_id(int flash_area_id, + struct boot_swap_state *state); +int boot_write_magic(const struct flash_area *fap); +int boot_write_status(const struct boot_loader_state *state, struct boot_status *bs); +int boot_write_copy_done(const struct flash_area *fap); +int boot_write_image_ok(const struct flash_area *fap); +int boot_write_swap_info(const struct flash_area *fap, uint8_t swap_type, + uint8_t image_num); +int boot_write_swap_size(const struct flash_area *fap, uint32_t swap_size); +int boot_write_trailer(const struct flash_area *fap, uint32_t off, + const uint8_t *inbuf, uint8_t inlen); +int boot_write_trailer_flag(const struct flash_area *fap, uint32_t off, + uint8_t flag_val); +int boot_read_swap_size(const struct flash_area *fap, uint32_t *swap_size); +int boot_slots_compatible(struct boot_loader_state *state); +uint32_t boot_status_internal_off(const struct boot_status *bs, int elem_sz); +int boot_read_image_header(struct boot_loader_state *state, int slot, + struct image_header *out_hdr, struct boot_status *bs); +int boot_copy_region(struct boot_loader_state *state, + const struct flash_area *fap_src, + const struct flash_area *fap_dst, + uint32_t off_src, uint32_t off_dst, uint32_t sz); +int boot_erase_region(const struct flash_area *fap, uint32_t off, uint32_t sz); +bool boot_status_is_reset(const struct boot_status *bs); + +#ifdef MCUBOOT_ENC_IMAGES +int boot_write_enc_key(const struct flash_area *fap, uint8_t slot, + const struct boot_status *bs); +int boot_read_enc_key(const struct flash_area *fap, uint8_t slot, + struct boot_status *bs); +#endif + +/** + * Checks that a buffer is erased according to what the erase value for the + * flash device provided in `flash_area` is. + * + * @returns true if the buffer is erased; false if any of the bytes is not + * erased, or when buffer is NULL, or when len == 0. + */ +bool bootutil_buffer_is_erased(const struct flash_area *area, + const void *buffer, size_t len); + +/** + * Safe (non-overflowing) uint32_t addition. Returns true, and stores + * the result in *dest if it can be done without overflow. Otherwise, + * returns false. + */ +static inline bool boot_u32_safe_add(uint32_t *dest, uint32_t a, uint32_t b) +{ + /* + * "a + b <= UINT32_MAX", subtract 'b' from both sides to avoid + * the overflow. + */ + if (a > UINT32_MAX - b) { + return false; + } else { + *dest = a + b; + return true; + } +} + +/** + * Safe (non-overflowing) uint16_t addition. Returns true, and stores + * the result in *dest if it can be done without overflow. Otherwise, + * returns false. + */ +static inline bool boot_u16_safe_add(uint16_t *dest, uint16_t a, uint16_t b) +{ + uint32_t tmp = a + b; + if (tmp > UINT16_MAX) { + return false; + } else { + *dest = tmp; + return true; + } +} + +/* + * Accessors for the contents of struct boot_loader_state. + */ + +/* These are macros so they can be used as lvalues. */ +#if (BOOT_IMAGE_NUMBER > 1) +#define BOOT_CURR_IMG(state) ((state)->curr_img_idx) +#else +#define BOOT_CURR_IMG(state) 0 +#endif +#ifdef MCUBOOT_ENC_IMAGES +#define BOOT_CURR_ENC(state) ((state)->enc[BOOT_CURR_IMG(state)]) +#else +#define BOOT_CURR_ENC(state) NULL +#endif +#define BOOT_IMG(state, slot) ((state)->imgs[BOOT_CURR_IMG(state)][(slot)]) +#define BOOT_IMG_AREA(state, slot) (BOOT_IMG(state, slot).area) +#define BOOT_WRITE_SZ(state) ((state)->write_sz) +#define BOOT_SWAP_TYPE(state) ((state)->swap_type[BOOT_CURR_IMG(state)]) +#define BOOT_TLV_OFF(hdr) ((hdr)->ih_hdr_size + (hdr)->ih_img_size) + +#define BOOT_IS_UPGRADE(swap_type) \ + (((swap_type) == BOOT_SWAP_TYPE_TEST) || \ + ((swap_type) == BOOT_SWAP_TYPE_REVERT) || \ + ((swap_type) == BOOT_SWAP_TYPE_PERM)) + +static inline struct image_header* +boot_img_hdr(struct boot_loader_state *state, size_t slot) +{ + return &BOOT_IMG(state, slot).hdr; +} + +static inline size_t +boot_img_num_sectors(const struct boot_loader_state *state, size_t slot) +{ + return BOOT_IMG(state, slot).num_sectors; +} + +/* + * Offset of the slot from the beginning of the flash device. + */ +static inline uint32_t +boot_img_slot_off(struct boot_loader_state *state, size_t slot) +{ + return flash_area_get_off(BOOT_IMG(state, slot).area); +} + +#ifndef MCUBOOT_USE_FLASH_AREA_GET_SECTORS + +static inline size_t +boot_img_sector_size(const struct boot_loader_state *state, + size_t slot, size_t sector) +{ + return flash_area_get_size(&BOOT_IMG(state, slot).sectors[sector]); +} + +/* + * Offset of the sector from the beginning of the image, NOT the flash + * device. + */ +static inline uint32_t +boot_img_sector_off(const struct boot_loader_state *state, size_t slot, + size_t sector) +{ + return flash_area_get_off(&BOOT_IMG(state, slot).sectors[sector]) - + flash_area_get_off(&BOOT_IMG(state, slot).sectors[0]); +} + +#else /* defined(MCUBOOT_USE_FLASH_AREA_GET_SECTORS) */ + +static inline size_t +boot_img_sector_size(const struct boot_loader_state *state, + size_t slot, size_t sector) +{ + return flash_sector_get_size(&BOOT_IMG(state, slot).sectors[sector]); +} + +static inline uint32_t +boot_img_sector_off(const struct boot_loader_state *state, size_t slot, + size_t sector) +{ + return flash_sector_get_off(&BOOT_IMG(state, slot).sectors[sector]) - + flash_sector_get_off(&BOOT_IMG(state, slot).sectors[0]); +} + +#endif /* !defined(MCUBOOT_USE_FLASH_AREA_GET_SECTORS) */ + +#ifdef MCUBOOT_RAM_LOAD +# ifdef __BOOTSIM__ + +/* Query for the layout of a RAM buffer appropriate for holding the + * image. This will be per-test-thread, and therefore must be queried + * through this call. */ +struct bootsim_ram_info { + uint32_t start; + uint32_t size; + uintptr_t base; +}; +struct bootsim_ram_info *bootsim_get_ram_info(void); + +#define IMAGE_GET_FIELD(field) (bootsim_get_ram_info()->field) +#define IMAGE_RAM_BASE IMAGE_GET_FIELD(base) +#define IMAGE_EXECUTABLE_RAM_START IMAGE_GET_FIELD(start) +#define IMAGE_EXECUTABLE_RAM_SIZE IMAGE_GET_FIELD(size) + +# else +# define IMAGE_RAM_BASE ((uintptr_t)0) +# endif + +#define LOAD_IMAGE_DATA(hdr, fap, start, output, size) \ + (memcpy((output),(void*)(IMAGE_RAM_BASE + (hdr)->ih_load_addr + (start)), \ + (size)), 0) +#else +#define IMAGE_RAM_BASE ((uintptr_t)0) + +#define LOAD_IMAGE_DATA(hdr, fap, start, output, size) \ + (flash_area_read((fap), (start), (output), (size))) +#endif /* MCUBOOT_RAM_LOAD */ + +uint32_t bootutil_max_image_size(const struct flash_area *fap); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/bootutil/src/bootutil_public.c b/bootloader/mcuboot/boot/bootutil/src/bootutil_public.c new file mode 100644 index 0000000..afa601c --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/bootutil_public.c @@ -0,0 +1,762 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2017-2019 Linaro LTD + * Copyright (c) 2016-2019 JUUL Labs + * Copyright (c) 2019-2023 Arm Limited + * Copyright (c) 2020-2023 Nordic Semiconductor ASA + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +/** + * @file + * @brief Public MCUBoot interface API implementation + * + * This file contains API implementation which can be combined with + * the application in order to interact with the MCUBoot bootloader. + * This file contains shared code-base betwen MCUBoot and the application + * which controls DFU process. + */ + +#include +#include +#include + +#include "sysflash/sysflash.h" +#include "flash_map_backend/flash_map_backend.h" + +#include "bootutil/image.h" +#include "bootutil/bootutil_public.h" +#include "bootutil/bootutil_log.h" + +#include "bootutil/boot_public_hooks.h" +#include "bootutil_priv.h" +#include "bootutil_misc.h" + +#ifdef CONFIG_MCUBOOT +BOOT_LOG_MODULE_DECLARE(mcuboot); +#else +BOOT_LOG_MODULE_REGISTER(mcuboot_util); +#endif + +#if BOOT_MAX_ALIGN == 8 +const union boot_img_magic_t boot_img_magic = { + .val = { + 0x77, 0xc2, 0x95, 0xf3, + 0x60, 0xd2, 0xef, 0x7f, + 0x35, 0x52, 0x50, 0x0f, + 0x2c, 0xb6, 0x79, 0x80 + } +}; +#else +const union boot_img_magic_t boot_img_magic = { + .align = BOOT_MAX_ALIGN, + .magic = { + 0x2d, 0xe1, + 0x5d, 0x29, 0x41, 0x0b, + 0x8d, 0x77, 0x67, 0x9c, + 0x11, 0x0f, 0x1f, 0x8a + } +}; +#endif + +struct boot_swap_table { + uint8_t magic_primary_slot; + uint8_t magic_secondary_slot; + uint8_t image_ok_primary_slot; + uint8_t image_ok_secondary_slot; + uint8_t copy_done_primary_slot; + + uint8_t swap_type; +}; + +/** + * This set of tables maps image trailer contents to swap operation type. + * When searching for a match, these tables must be iterated sequentially. + * + * NOTE: the table order is very important. The settings in the secondary + * slot always are priority to the primary slot and should be located + * earlier in the table. + * + * The table lists only states where there is action needs to be taken by + * the bootloader, as in starting/finishing a swap operation. + */ +static const struct boot_swap_table boot_swap_tables[] = { + { + .magic_primary_slot = BOOT_MAGIC_ANY, + .magic_secondary_slot = BOOT_MAGIC_GOOD, + .image_ok_primary_slot = BOOT_FLAG_ANY, + .image_ok_secondary_slot = BOOT_FLAG_UNSET, + .copy_done_primary_slot = BOOT_FLAG_ANY, + .swap_type = BOOT_SWAP_TYPE_TEST, + }, + { + .magic_primary_slot = BOOT_MAGIC_ANY, + .magic_secondary_slot = BOOT_MAGIC_GOOD, + .image_ok_primary_slot = BOOT_FLAG_ANY, + .image_ok_secondary_slot = BOOT_FLAG_SET, + .copy_done_primary_slot = BOOT_FLAG_ANY, + .swap_type = BOOT_SWAP_TYPE_PERM, + }, + { + .magic_primary_slot = BOOT_MAGIC_GOOD, + .magic_secondary_slot = BOOT_MAGIC_UNSET, + .image_ok_primary_slot = BOOT_FLAG_UNSET, + .image_ok_secondary_slot = BOOT_FLAG_ANY, + .copy_done_primary_slot = BOOT_FLAG_SET, + .swap_type = BOOT_SWAP_TYPE_REVERT, + }, +}; + +#define BOOT_SWAP_TABLES_COUNT \ + (sizeof boot_swap_tables / sizeof boot_swap_tables[0]) + +static int +boot_flag_decode(uint8_t flag) +{ + if (flag != BOOT_FLAG_SET) { + return BOOT_FLAG_BAD; + } + return BOOT_FLAG_SET; +} + +uint32_t +boot_swap_info_off(const struct flash_area *fap) +{ + return boot_copy_done_off(fap) - BOOT_MAX_ALIGN; +} + +/** + * Determines if a status source table is satisfied by the specified magic + * code. + * + * @param tbl_val A magic field from a status source table. + * @param val The magic value in a trailer, encoded as a + * BOOT_MAGIC_[...]. + * + * @return 1 if the two values are compatible; + * 0 otherwise. + */ +int +boot_magic_compatible_check(uint8_t tbl_val, uint8_t val) +{ + switch (tbl_val) { + case BOOT_MAGIC_ANY: + return 1; + + case BOOT_MAGIC_NOTGOOD: + return val != BOOT_MAGIC_GOOD; + + default: + return tbl_val == val; + } +} + +bool bootutil_buffer_is_erased(const struct flash_area *area, + const void *buffer, size_t len) +{ + size_t i; + uint8_t *u8b; + uint8_t erased_val; + + if (buffer == NULL || len == 0) { + return false; + } + + erased_val = flash_area_erased_val(area); + for (i = 0, u8b = (uint8_t *)buffer; i < len; i++) { + if (u8b[i] != erased_val) { + return false; + } + } + + return true; +} + +static int +boot_read_flag(const struct flash_area *fap, uint8_t *flag, uint32_t off) +{ + int rc; + + rc = flash_area_read(fap, off, flag, sizeof *flag); + if (rc < 0) { + return BOOT_EFLASH; + } + if (bootutil_buffer_is_erased(fap, flag, sizeof *flag)) { + *flag = BOOT_FLAG_UNSET; + } else { + *flag = boot_flag_decode(*flag); + } + + return 0; +} + +static inline int +boot_read_copy_done(const struct flash_area *fap, uint8_t *copy_done) +{ + return boot_read_flag(fap, copy_done, boot_copy_done_off(fap)); +} + + +int +boot_read_swap_state(const struct flash_area *fap, + struct boot_swap_state *state) +{ + uint8_t magic[BOOT_MAGIC_SZ]; + uint32_t off; + uint8_t swap_info; + int rc; + + off = boot_magic_off(fap); + rc = flash_area_read(fap, off, magic, BOOT_MAGIC_SZ); + if (rc < 0) { + return BOOT_EFLASH; + } + if (bootutil_buffer_is_erased(fap, magic, BOOT_MAGIC_SZ)) { + state->magic = BOOT_MAGIC_UNSET; + } else { + state->magic = boot_magic_decode(magic); + } + + off = boot_swap_info_off(fap); + rc = flash_area_read(fap, off, &swap_info, sizeof swap_info); + if (rc < 0) { + return BOOT_EFLASH; + } + + /* Extract the swap type and image number */ + state->swap_type = BOOT_GET_SWAP_TYPE(swap_info); + state->image_num = BOOT_GET_IMAGE_NUM(swap_info); + + if (bootutil_buffer_is_erased(fap, &swap_info, sizeof swap_info) || + state->swap_type > BOOT_SWAP_TYPE_REVERT) { + state->swap_type = BOOT_SWAP_TYPE_NONE; + state->image_num = 0; + } + + rc = boot_read_copy_done(fap, &state->copy_done); + if (rc) { + return BOOT_EFLASH; + } + + return boot_read_image_ok(fap, &state->image_ok); +} + +int +boot_read_swap_state_by_id(int flash_area_id, struct boot_swap_state *state) +{ + const struct flash_area *fap; + int rc; + + rc = flash_area_open(flash_area_id, &fap); + if (rc != 0) { + return BOOT_EFLASH; + } + + rc = boot_read_swap_state(fap, state); + flash_area_close(fap); + return rc; +} + +int +boot_write_magic(const struct flash_area *fap) +{ + uint32_t off; + uint32_t pad_off; + int rc; + uint8_t magic[BOOT_MAGIC_ALIGN_SIZE]; + uint8_t erased_val; + + off = boot_magic_off(fap); + + /* image_trailer structure was modified with additional padding such that + * the pad+magic ends up in a flash minimum write region. The address + * returned by boot_magic_off() is the start of magic which is not the + * start of the flash write boundary and thus writes to the magic will fail. + * To account for this change, write to magic is first padded with 0xFF + * before writing to the trailer. + */ + pad_off = ALIGN_DOWN(off, BOOT_MAX_ALIGN); + + erased_val = flash_area_erased_val(fap); + + memset(&magic[0], erased_val, sizeof(magic)); + memcpy(&magic[BOOT_MAGIC_ALIGN_SIZE - BOOT_MAGIC_SZ], BOOT_IMG_MAGIC, BOOT_MAGIC_SZ); + + BOOT_LOG_DBG("writing magic; fa_id=%d off=0x%lx (0x%lx)", + flash_area_get_id(fap), (unsigned long)off, + (unsigned long)(flash_area_get_off(fap) + off)); + rc = flash_area_write(fap, pad_off, &magic[0], BOOT_MAGIC_ALIGN_SIZE); + + if (rc != 0) { + return BOOT_EFLASH; + } + + return 0; +} + +/** + * Write trailer data; status bytes, swap_size, etc + * + * @returns 0 on success, != 0 on error. + */ +int +boot_write_trailer(const struct flash_area *fap, uint32_t off, + const uint8_t *inbuf, uint8_t inlen) +{ + uint8_t buf[BOOT_MAX_ALIGN]; + uint8_t erased_val; + uint32_t align; + int rc; + + align = flash_area_align(fap); + align = ALIGN_UP(inlen, align); + if (align > BOOT_MAX_ALIGN) { + return -1; + } + erased_val = flash_area_erased_val(fap); + + memcpy(buf, inbuf, inlen); + memset(&buf[inlen], erased_val, align - inlen); + + rc = flash_area_write(fap, off, buf, align); + if (rc != 0) { + return BOOT_EFLASH; + } + + return 0; +} + +int +boot_write_trailer_flag(const struct flash_area *fap, uint32_t off, + uint8_t flag_val) +{ + const uint8_t buf[1] = { flag_val }; + return boot_write_trailer(fap, off, buf, 1); +} + +int +boot_write_image_ok(const struct flash_area *fap) +{ + uint32_t off; + + off = boot_image_ok_off(fap); + BOOT_LOG_DBG("writing image_ok; fa_id=%d off=0x%lx (0x%lx)", + flash_area_get_id(fap), (unsigned long)off, + (unsigned long)(flash_area_get_off(fap) + off)); + return boot_write_trailer_flag(fap, off, BOOT_FLAG_SET); +} + +int +boot_read_image_ok(const struct flash_area *fap, uint8_t *image_ok) +{ + return boot_read_flag(fap, image_ok, boot_image_ok_off(fap)); +} + +/** + * Writes the specified value to the `swap-type` field of an image trailer. + * This value is persisted so that the boot loader knows what swap operation to + * resume in case of an unexpected reset. + */ +int +boot_write_swap_info(const struct flash_area *fap, uint8_t swap_type, + uint8_t image_num) +{ + uint32_t off; + uint8_t swap_info; + + BOOT_SET_SWAP_INFO(swap_info, image_num, swap_type); + off = boot_swap_info_off(fap); + BOOT_LOG_DBG("writing swap_info; fa_id=%d off=0x%lx (0x%lx), swap_type=0x%x" + " image_num=0x%x", + flash_area_get_id(fap), (unsigned long)off, + (unsigned long)(flash_area_get_off(fap) + off), + swap_type, image_num); + return boot_write_trailer(fap, off, (const uint8_t *) &swap_info, 1); +} + +int +boot_swap_type_multi(int image_index) +{ + const struct boot_swap_table *table; + struct boot_swap_state primary_slot; + struct boot_swap_state secondary_slot; + int rc; + size_t i; + + rc = BOOT_HOOK_CALL(boot_read_swap_state_primary_slot_hook, + BOOT_HOOK_REGULAR, image_index, &primary_slot); + if (rc == BOOT_HOOK_REGULAR) + { + rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_PRIMARY(image_index), + &primary_slot); + } + if (rc) { + return BOOT_SWAP_TYPE_PANIC; + } + + rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index), + &secondary_slot); + if (rc == BOOT_EFLASH) { + BOOT_LOG_INF("Secondary image of image pair (%d.) " + "is unreachable. Treat it as empty", image_index); + secondary_slot.magic = BOOT_MAGIC_UNSET; + secondary_slot.swap_type = BOOT_SWAP_TYPE_NONE; + secondary_slot.copy_done = BOOT_FLAG_UNSET; + secondary_slot.image_ok = BOOT_FLAG_UNSET; + secondary_slot.image_num = 0; + } else if (rc) { + return BOOT_SWAP_TYPE_PANIC; + } + + for (i = 0; i < BOOT_SWAP_TABLES_COUNT; i++) { + table = boot_swap_tables + i; + + if (boot_magic_compatible_check(table->magic_primary_slot, + primary_slot.magic) && + boot_magic_compatible_check(table->magic_secondary_slot, + secondary_slot.magic) && + (table->image_ok_primary_slot == BOOT_FLAG_ANY || + table->image_ok_primary_slot == primary_slot.image_ok) && + (table->image_ok_secondary_slot == BOOT_FLAG_ANY || + table->image_ok_secondary_slot == secondary_slot.image_ok) && + (table->copy_done_primary_slot == BOOT_FLAG_ANY || + table->copy_done_primary_slot == primary_slot.copy_done)) { + BOOT_LOG_INF("Image index: %d, Swap type: %s", image_index, + table->swap_type == BOOT_SWAP_TYPE_TEST ? "test" : + table->swap_type == BOOT_SWAP_TYPE_PERM ? "perm" : + table->swap_type == BOOT_SWAP_TYPE_REVERT ? "revert" : + "BUG; can't happen"); + if (table->swap_type != BOOT_SWAP_TYPE_TEST && + table->swap_type != BOOT_SWAP_TYPE_PERM && + table->swap_type != BOOT_SWAP_TYPE_REVERT) { + return BOOT_SWAP_TYPE_PANIC; + } + return table->swap_type; + } + } + + BOOT_LOG_INF("Image index: %d, Swap type: none", image_index); + return BOOT_SWAP_TYPE_NONE; +} + +int +boot_write_copy_done(const struct flash_area *fap) +{ + uint32_t off; + + off = boot_copy_done_off(fap); + BOOT_LOG_DBG("writing copy_done; fa_id=%d off=0x%lx (0x%lx)", + flash_area_get_id(fap), (unsigned long)off, + (unsigned long)(flash_area_get_off(fap) + off)); + return boot_write_trailer_flag(fap, off, BOOT_FLAG_SET); +} + +#ifndef MCUBOOT_BOOTUTIL_LIB_FOR_DIRECT_XIP + +static int flash_area_to_image(const struct flash_area *fa) +{ +#if BOOT_IMAGE_NUMBER > 1 + uint8_t i = 0; + int id = flash_area_get_id(fa); + + while (i < BOOT_IMAGE_NUMBER) { + if (FLASH_AREA_IMAGE_PRIMARY(i) == id || (FLASH_AREA_IMAGE_SECONDARY(i) == id)) { + return i; + } + + ++i; + } +#else + (void)fa; +#endif + return 0; +} + +int +boot_set_next(const struct flash_area *fa, bool active, bool confirm) +{ + struct boot_swap_state slot_state; + int rc; + + if (active) { + confirm = true; + } + + rc = boot_read_swap_state(fa, &slot_state); + if (rc != 0) { + return rc; + } + + switch (slot_state.magic) { + case BOOT_MAGIC_GOOD: + /* If non-active then swap already scheduled, else confirm needed.*/ + + if (active && slot_state.image_ok == BOOT_FLAG_UNSET) { + /* Intentionally do not check copy_done flag to be able to + * confirm a padded image which has been programmed using + * a programming interface. + */ + rc = boot_write_image_ok(fa); + } + + break; + + case BOOT_MAGIC_UNSET: + if (!active) { + rc = boot_write_magic(fa); + + if (rc == 0 && confirm) { + rc = boot_write_image_ok(fa); + } + + if (rc == 0) { + uint8_t swap_type; + + if (confirm) { + swap_type = BOOT_SWAP_TYPE_PERM; + } else { + swap_type = BOOT_SWAP_TYPE_TEST; + } + rc = boot_write_swap_info(fa, swap_type, flash_area_to_image(fa)); + } + } + break; + + case BOOT_MAGIC_BAD: + if (active) { + rc = BOOT_EBADVECT; + } else { + /* The image slot is corrupt. There is no way to recover, so erase the + * slot to allow future upgrades. + */ + flash_area_erase(fa, 0, flash_area_get_size(fa)); + rc = BOOT_EBADIMAGE; + } + break; + + default: + /* Something is not OK, this should never happen */ + assert(0); + rc = BOOT_EBADIMAGE; + } + + return rc; +} +#else +int +boot_set_next(const struct flash_area *fa, bool active, bool confirm) +{ + struct boot_swap_state slot_state; + int rc; + + if (active) { + /* The only way to set active slot for next boot is to confirm it, + * as DirectXIP will conclude that, since slot has not been confirmed + * last boot, it is bad and will remove it. + */ + confirm = true; + } + + rc = boot_read_swap_state(fa, &slot_state); + if (rc != 0) { + return rc; + } + + switch (slot_state.magic) { + case BOOT_MAGIC_UNSET: + /* Magic is needed for MCUboot to even consider booting an image */ + rc = boot_write_magic(fa); + if (rc != 0) { + break; + } + /* Pass */ + + case BOOT_MAGIC_GOOD: + if (confirm) { + if (slot_state.copy_done == BOOT_FLAG_UNSET) { + /* Magic is needed for DirectXIP to even try to boot application. + * DirectXIP will set copy-done flag before attempting to boot + * application. Next boot, application that has copy-done flag + * is expected to already have ok flag, otherwise it will be removed. + */ + rc = boot_write_copy_done(fa); + if (rc != 0) { + break; + } + } + + if (slot_state.image_ok == BOOT_FLAG_UNSET) { + rc = boot_write_image_ok(fa); + if (rc != 0) { + break; + } + } + } + break; + + case BOOT_MAGIC_BAD: + /* This image will not be boot next time anyway */ + rc = BOOT_EBADIMAGE; + break; + + default: + /* Something is not OK, this should never happen */ + assert(0); + rc = BOOT_EBADSTATUS; + } + + return rc; +} +#endif + +/* + * This function is not used by the bootloader itself, but its required API + * by external tooling like mcumgr. + */ +int +boot_swap_type(void) +{ + return boot_swap_type_multi(0); +} + +/** + * Marks the image with the given index in the secondary slot as pending. On the + * next reboot, the system will perform a one-time boot of the the secondary + * slot image. + * + * @param image_index Image pair index. + * + * @param permanent Whether the image should be used permanently or + * only tested once: + * 0=run image once, then confirm or revert. + * 1=run image forever. + * + * @return 0 on success; nonzero on failure. + */ +int +boot_set_pending_multi(int image_index, int permanent) +{ + const struct flash_area *fap; + int rc; + + rc = flash_area_open(FLASH_AREA_IMAGE_SECONDARY(image_index), &fap); + if (rc != 0) { + return BOOT_EFLASH; + } + + rc = boot_set_next(fap, false, !(permanent == 0)); + + flash_area_close(fap); + return rc; +} + +/** + * Marks the image with index 0 in the secondary slot as pending. On the next + * reboot, the system will perform a one-time boot of the the secondary slot + * image. Note that this API is kept for compatibility. The + * boot_set_pending_multi() API is recommended. + * + * @param permanent Whether the image should be used permanently or + * only tested once: + * 0=run image once, then confirm or revert. + * 1=run image forever. + * + * @return 0 on success; nonzero on failure. + */ +int +boot_set_pending(int permanent) +{ + return boot_set_pending_multi(0, permanent); +} + +/** + * Marks the image with the given index in the primary slot as confirmed. The + * system will continue booting into the image in the primary slot until told to + * boot from a different slot. + * + * @param image_index Image pair index. + * + * @return 0 on success; nonzero on failure. + */ +int +boot_set_confirmed_multi(int image_index) +{ + const struct flash_area *fap = NULL; + int rc; + + rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index), &fap); + if (rc != 0) { + return BOOT_EFLASH; + } + + rc = boot_set_next(fap, true, true); + + flash_area_close(fap); + return rc; +} + +/** + * Marks the image with index 0 in the primary slot as confirmed. The system + * will continue booting into the image in the primary slot until told to boot + * from a different slot. Note that this API is kept for compatibility. The + * boot_set_confirmed_multi() API is recommended. + * + * @return 0 on success; nonzero on failure. + */ +int +boot_set_confirmed(void) +{ + return boot_set_confirmed_multi(0); +} + +int +boot_image_load_header(const struct flash_area *fa_p, + struct image_header *hdr) +{ + uint32_t size; + int rc = flash_area_read(fa_p, 0, hdr, sizeof *hdr); + + if (rc != 0) { + rc = BOOT_EFLASH; + BOOT_LOG_ERR("Failed reading image header"); + return BOOT_EFLASH; + } + + if (hdr->ih_magic != IMAGE_MAGIC) { + BOOT_LOG_ERR("Bad image magic 0x%lx", (unsigned long)hdr->ih_magic); + + return BOOT_EBADIMAGE; + } + + if (hdr->ih_flags & IMAGE_F_NON_BOOTABLE) { + BOOT_LOG_ERR("Image not bootable"); + + return BOOT_EBADIMAGE; + } + + if (!boot_u32_safe_add(&size, hdr->ih_img_size, hdr->ih_hdr_size) || + size >= flash_area_get_size(fa_p)) { + return BOOT_EBADIMAGE; + } + + return 0; +} diff --git a/bootloader/mcuboot/boot/bootutil/src/caps.c b/bootloader/mcuboot/boot/bootutil/src/caps.c new file mode 100644 index 0000000..d7cd590 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/caps.c @@ -0,0 +1,95 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2017 Linaro Limited + * Copyright (c) 2021-2023 Arm Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include "mcuboot_config/mcuboot_config.h" + +uint32_t bootutil_get_caps(void) +{ + uint32_t res = 0; + +#if defined(MCUBOOT_SIGN_RSA) +#if MCUBOOT_SIGN_RSA_LEN == 2048 + res |= BOOTUTIL_CAP_RSA2048; +#endif +#if MCUBOOT_SIGN_RSA_LEN == 3072 + res |= BOOTUTIL_CAP_RSA3072; +#endif +#endif +#if defined(MCUBOOT_SIGN_EC256) + res |= BOOTUTIL_CAP_ECDSA_P256; +#endif +#if defined(MCUBOOT_SIGN_EC384) + res |= BOOTUTIL_CAP_ECDSA_P384; +#endif +#if defined(MCUBOOT_SIGN_ED25519) + res |= BOOTUTIL_CAP_ED25519; +#endif +#if defined(MCUBOOT_OVERWRITE_ONLY) + res |= BOOTUTIL_CAP_OVERWRITE_UPGRADE; +#elif defined(MCUBOOT_SWAP_USING_MOVE) + res |= BOOTUTIL_CAP_SWAP_USING_MOVE; +#else + res |= BOOTUTIL_CAP_SWAP_USING_SCRATCH; +#endif +#if defined(MCUBOOT_ENCRYPT_RSA) + res |= BOOTUTIL_CAP_ENC_RSA; +#endif +#if defined(MCUBOOT_ENCRYPT_KW) + res |= BOOTUTIL_CAP_ENC_KW; +#endif +#if defined(MCUBOOT_ENCRYPT_EC256) + res |= BOOTUTIL_CAP_ENC_EC256; +#endif +#if defined(MCUBOOT_ENCRYPT_X25519) + res |= BOOTUTIL_CAP_ENC_X25519; +#endif +#if defined(MCUBOOT_VALIDATE_PRIMARY_SLOT) + res |= BOOTUTIL_CAP_VALIDATE_PRIMARY_SLOT; +#endif +#if defined(MCUBOOT_DOWNGRADE_PREVENTION) + res |= BOOTUTIL_CAP_DOWNGRADE_PREVENTION; +#endif +#if defined(MCUBOOT_BOOTSTRAP) + res |= BOOTUTIL_CAP_BOOTSTRAP; +#endif +#if defined(MCUBOOT_AES_256) + res |= BOOTUTIL_CAP_AES256; +#endif +#if defined(MCUBOOT_RAM_LOAD) + res |= BOOTUTIL_CAP_RAM_LOAD; +#endif +#if defined(MCUBOOT_DIRECT_XIP) + res |= BOOTUTIL_CAP_DIRECT_XIP; +#endif +#if defined(MCUBOOT_HW_ROLLBACK_PROT) + res |= BOOTUTIL_CAP_HW_ROLLBACK_PROT; +#endif + + return res; +} + +uint32_t bootutil_get_num_images(void) +{ +#if defined(MCUBOOT_IMAGE_NUMBER) + return MCUBOOT_IMAGE_NUMBER; +#else + return 1; +#endif +} diff --git a/bootloader/mcuboot/boot/bootutil/src/ed25519_psa.c b/bootloader/mcuboot/boot/bootutil/src/ed25519_psa.c new file mode 100644 index 0000000..4dbbcb6 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/ed25519_psa.c @@ -0,0 +1,122 @@ +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ +#include +#include +#include + +#include +#include "bootutil/bootutil_log.h" + +#include +#include +#if defined(CONFIG_BOOT_SIGNATURE_USING_KMU) +#include +#endif + +BOOT_LOG_MODULE_DECLARE(ed25519_psa); + +#define SHA512_DIGEST_LENGTH 64 +#define EDDSA_KEY_LENGTH 32 +#define EDDSA_SIGNAGURE_LENGTH 64 + +#if defined(CONFIG_BOOT_SIGNATURE_USING_KMU) +/* List of KMU stored key ids available for MCUboot */ +#define MAKE_PSA_KMU_KEY_ID(id) PSA_KEY_HANDLE_FROM_CRACEN_KMU_SLOT(CRACEN_KMU_KEY_USAGE_SCHEME_RAW, id) +static psa_key_id_t kmu_key_ids[3] = { + MAKE_PSA_KMU_KEY_ID(226), + MAKE_PSA_KMU_KEY_ID(228), + MAKE_PSA_KMU_KEY_ID(230) +}; +#define KMU_KEY_COUNT (sizeof(kmu_key_ids)/sizeof(kmu_key_ids[0])) +#endif + +#if !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) +int ED25519_verify(const uint8_t *message, size_t message_len, + const uint8_t signature[EDDSA_SIGNAGURE_LENGTH], + const uint8_t public_key[EDDSA_KEY_LENGTH]) +{ + /* Set to any error */ + psa_status_t status = PSA_ERROR_BAD_STATE; + psa_key_attributes_t key_attr = PSA_KEY_ATTRIBUTES_INIT; + psa_key_id_t kid; + int ret = 0; /* Fail by default */ + + /* Initialize PSA Crypto */ + status = psa_crypto_init(); + if (status != PSA_SUCCESS) { + BOOT_LOG_ERR("PSA crypto init failed %d\n", status); + return 0; + } + + status = PSA_ERROR_BAD_STATE; + + psa_set_key_type(&key_attr, + PSA_KEY_TYPE_ECC_PUBLIC_KEY(PSA_ECC_FAMILY_TWISTED_EDWARDS)); + psa_set_key_usage_flags(&key_attr, PSA_KEY_USAGE_VERIFY_MESSAGE); + psa_set_key_algorithm(&key_attr, PSA_ALG_PURE_EDDSA); + + status = psa_import_key(&key_attr, public_key, EDDSA_KEY_LENGTH, &kid); + if (status != PSA_SUCCESS) { + BOOT_LOG_ERR("ED25519 key import failed %d", status); + return 0; + } + + status = psa_verify_message(kid, PSA_ALG_PURE_EDDSA, message, message_len, + signature, EDDSA_SIGNAGURE_LENGTH); + if (status != PSA_SUCCESS) { + BOOT_LOG_ERR("ED25519 signature verification failed %d", status); + ret = 0; + /* Pass through to destroy key */ + } else { + ret = 1; + /* Pass through to destroy key */ + } + + status = psa_destroy_key(kid); + + if (status != PSA_SUCCESS) { + /* Just for logging */ + BOOT_LOG_WRN("Failed to destroy key %d", status); + } + + return ret; +} +#else +int ED25519_verify(const uint8_t *message, size_t message_len, + const uint8_t signature[EDDSA_SIGNAGURE_LENGTH], + const uint8_t public_key[EDDSA_KEY_LENGTH]) +{ + ARG_UNUSED(public_key); + /* Set to any error */ + psa_status_t status = PSA_ERROR_BAD_STATE; + int ret = 0; /* Fail by default */ + + /* Initialize PSA Crypto */ + status = psa_crypto_init(); + if (status != PSA_SUCCESS) { + BOOT_LOG_ERR("PSA crypto init failed %d", status); + return 0; + } + + status = PSA_ERROR_BAD_STATE; + + for (int i = 0; i < KMU_KEY_COUNT; ++i) { + psa_key_id_t kid = kmu_key_ids[i]; + + status = psa_verify_message(kid, PSA_ALG_PURE_EDDSA, message, + message_len, signature, + EDDSA_SIGNAGURE_LENGTH); + if (status == PSA_SUCCESS) { + ret = 1; + break; + } + + BOOT_LOG_ERR("ED25519 signature verification failed %d", status); + } + + return ret; +} +#endif diff --git a/bootloader/mcuboot/boot/bootutil/src/encrypted.c b/bootloader/mcuboot/boot/bootutil/src/encrypted.c new file mode 100644 index 0000000..67fa819 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/encrypted.c @@ -0,0 +1,755 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2018-2019 JUUL Labs + * Copyright (c) 2019-2024 Arm Limited + */ + +#include "mcuboot_config/mcuboot_config.h" + +#if defined(MCUBOOT_ENC_IMAGES) +#include +#include +#include + +#if defined(MCUBOOT_ENCRYPT_RSA) +#define BOOTUTIL_CRYPTO_RSA_CRYPT_ENABLED +#include "bootutil/crypto/rsa.h" +#endif + +#if defined(MCUBOOT_ENCRYPT_KW) +#include "bootutil/crypto/aes_kw.h" +#endif + +#if defined(MCUBOOT_ENCRYPT_EC256) +#include "bootutil/crypto/ecdh_p256.h" +#endif + +#if !defined(MCUBOOT_USE_PSA_CRYPTO) +#if defined(MCUBOOT_ENCRYPT_X25519) +#include "bootutil/crypto/ecdh_x25519.h" +#endif + +#if defined(MCUBOOT_ENCRYPT_EC256) || defined(MCUBOOT_ENCRYPT_X25519) +#include "bootutil/crypto/sha.h" +#include "bootutil/crypto/hmac_sha256.h" +#include "mbedtls/oid.h" +#include "mbedtls/asn1.h" +#endif +#endif + +#include "bootutil/image.h" +#include "bootutil/enc_key.h" +#include "bootutil/sign_key.h" +#include "bootutil/crypto/common.h" + +#include "bootutil_priv.h" + +#define EXPECTED_ENC_LEN BOOT_ENC_TLV_SIZE + +#if defined(MCUBOOT_ENCRYPT_RSA) +# define EXPECTED_ENC_TLV IMAGE_TLV_ENC_RSA2048 +#elif defined(MCUBOOT_ENCRYPT_KW) +# define EXPECTED_ENC_TLV IMAGE_TLV_ENC_KW +#elif defined(MCUBOOT_ENCRYPT_EC256) +# define EXPECTED_ENC_TLV IMAGE_TLV_ENC_EC256 +# define EC_PUBK_INDEX (0) +# define EC_TAG_INDEX (65) +# define EC_CIPHERKEY_INDEX (65 + 32) +_Static_assert(EC_CIPHERKEY_INDEX + BOOT_ENC_KEY_SIZE == EXPECTED_ENC_LEN, + "Please fix ECIES-P256 component indexes"); +#elif defined(MCUBOOT_ENCRYPT_X25519) +# define EXPECTED_ENC_TLV IMAGE_TLV_ENC_X25519 +# define EC_PUBK_INDEX (0) +# define EC_TAG_INDEX (32) +# define EC_CIPHERKEY_INDEX (32 + 32) +_Static_assert(EC_CIPHERKEY_INDEX + BOOT_ENC_KEY_SIZE == EXPECTED_ENC_LEN, + "Please fix ECIES-X25519 component indexes"); +#endif + +/* NOUP Fixme: */ +#if !defined(CONFIG_BOOT_ED25519_PSA) +#if defined(MCUBOOT_ENCRYPT_EC256) || defined(MCUBOOT_ENCRYPT_X25519) +#if defined(_compare) +static inline int bootutil_constant_time_compare(const uint8_t *a, const uint8_t *b, size_t size) +{ + return _compare(a, b, size); +} +#else +static int bootutil_constant_time_compare(const uint8_t *a, const uint8_t *b, size_t size) +{ + const uint8_t *tempa = a; + const uint8_t *tempb = b; + uint8_t result = 0; + unsigned int i; + + for (i = 0; i < size; i++) { + result |= tempa[i] ^ tempb[i]; + } + return result; +} +#endif +#endif + +#if defined(MCUBOOT_ENCRYPT_KW) +static int +key_unwrap(const uint8_t *wrapped, uint8_t *enckey, struct bootutil_key *bootutil_enc_key) +{ + bootutil_aes_kw_context aes_kw; + int rc; + + bootutil_aes_kw_init(&aes_kw); + rc = bootutil_aes_kw_set_unwrap_key(&aes_kw, bootutil_enc_key->key, *bootutil_enc_key->len); + if (rc != 0) { + goto done; + } + rc = bootutil_aes_kw_unwrap(&aes_kw, wrapped, TLV_ENC_KW_SZ, enckey, BOOT_ENC_KEY_SIZE); + if (rc != 0) { + goto done; + } + +done: + bootutil_aes_kw_drop(&aes_kw); + return rc; +} +#endif /* MCUBOOT_ENCRYPT_KW */ + +#if defined(MCUBOOT_ENCRYPT_EC256) +static const uint8_t ec_pubkey_oid[] = MBEDTLS_OID_EC_ALG_UNRESTRICTED; +static const uint8_t ec_secp256r1_oid[] = MBEDTLS_OID_EC_GRP_SECP256R1; + +#define SHARED_KEY_LEN NUM_ECC_BYTES +#define PRIV_KEY_LEN NUM_ECC_BYTES + +/* + * Parses the output of `imgtool keygen`, which produces a PKCS#8 elliptic + * curve keypair. See RFC5208 and RFC5915. + */ +static int +parse_ec256_enckey(uint8_t **p, uint8_t *end, uint8_t *private_key) +{ + int rc; + size_t len; + int version; + mbedtls_asn1_buf alg; + mbedtls_asn1_buf param; + + if ((rc = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + return -1; + } + + if (*p + len != end) { + return -2; + } + + version = 0; + if (mbedtls_asn1_get_int(p, end, &version) || version != 0) { + return -3; + } + + if ((rc = mbedtls_asn1_get_alg(p, end, &alg, ¶m)) != 0) { + return -5; + } + + if (alg.ASN1_CONTEXT_MEMBER(len) != sizeof(ec_pubkey_oid) - 1 || + memcmp(alg.ASN1_CONTEXT_MEMBER(p), ec_pubkey_oid, sizeof(ec_pubkey_oid) - 1)) { + return -6; + } + if (param.ASN1_CONTEXT_MEMBER(len) != sizeof(ec_secp256r1_oid) - 1 || + memcmp(param.ASN1_CONTEXT_MEMBER(p), ec_secp256r1_oid, sizeof(ec_secp256r1_oid) - 1)) { + return -7; + } + + if ((rc = mbedtls_asn1_get_tag(p, end, &len, MBEDTLS_ASN1_OCTET_STRING)) != 0) { + return -8; + } + + /* RFC5915 - ECPrivateKey */ + + if ((rc = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + return -9; + } + + version = 0; + if (mbedtls_asn1_get_int(p, end, &version) || version != 1) { + return -10; + } + + /* privateKey */ + + if ((rc = mbedtls_asn1_get_tag(p, end, &len, MBEDTLS_ASN1_OCTET_STRING)) != 0) { + return -11; + } + + if (len != NUM_ECC_BYTES) { + return -12; + } + + memcpy(private_key, *p, len); + + /* publicKey usually follows but is not parsed here */ + + return 0; +} +#endif /* defined(MCUBOOT_ENCRYPT_EC256) */ + +#if defined(MCUBOOT_ENCRYPT_X25519) +#define X25519_OID "\x6e" +static const uint8_t ec_pubkey_oid[] = MBEDTLS_OID_ISO_IDENTIFIED_ORG \ + MBEDTLS_OID_ORG_GOV X25519_OID; + +#define SHARED_KEY_LEN 32 +#define PRIV_KEY_LEN 32 + +static int +parse_x25519_enckey(uint8_t **p, uint8_t *end, uint8_t *private_key) +{ + size_t len; + int version; + mbedtls_asn1_buf alg; + mbedtls_asn1_buf param; + + if (mbedtls_asn1_get_tag(p, end, &len, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE) != 0) { + return -1; + } + + if (*p + len != end) { + return -2; + } + + version = 0; + if (mbedtls_asn1_get_int(p, end, &version) || version != 0) { + return -3; + } + + if (mbedtls_asn1_get_alg(p, end, &alg, ¶m) != 0) { + return -4; + } + + if (alg.ASN1_CONTEXT_MEMBER(len) != sizeof(ec_pubkey_oid) - 1 || + memcmp(alg.ASN1_CONTEXT_MEMBER(p), ec_pubkey_oid, sizeof(ec_pubkey_oid) - 1)) { + return -5; + } + + if (mbedtls_asn1_get_tag(p, end, &len, MBEDTLS_ASN1_OCTET_STRING) != 0) { + return -6; + } + + if (mbedtls_asn1_get_tag(p, end, &len, MBEDTLS_ASN1_OCTET_STRING) != 0) { + return -7; + } + + if (len != PRIV_KEY_LEN) { + return -8; + } + + memcpy(private_key, *p, PRIV_KEY_LEN); + return 0; +} +#endif /* defined(MCUBOOT_ENCRYPT_X25519) */ + +#if defined(MCUBOOT_ENCRYPT_EC256) || defined(MCUBOOT_ENCRYPT_X25519) +/* + * HKDF as described by RFC5869. + * + * @param ikm The input data to be derived. + * @param ikm_len Length of the input data. + * @param info An information tag. + * @param info_len Length of the information tag. + * @param okm Output of the KDF computation. + * @param okm_len On input the requested length; on output the generated length + */ +static int +hkdf(uint8_t *ikm, uint16_t ikm_len, uint8_t *info, uint16_t info_len, + uint8_t *okm, uint16_t *okm_len) +{ + bootutil_hmac_sha256_context hmac; + uint8_t salt[BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE]; + uint8_t prk[BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE]; + uint8_t T[BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE]; + uint16_t off; + uint16_t len; + uint8_t counter; + bool first; + int rc; + + /* + * Extract + */ + + if (ikm == NULL || okm == NULL || ikm_len == 0) { + return -1; + } + + bootutil_hmac_sha256_init(&hmac); + + memset(salt, 0, BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE); + rc = bootutil_hmac_sha256_set_key(&hmac, salt, BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE); + if (rc != 0) { + goto error; + } + + rc = bootutil_hmac_sha256_update(&hmac, ikm, ikm_len); + if (rc != 0) { + goto error; + } + + rc = bootutil_hmac_sha256_finish(&hmac, prk, BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE); + if (rc != 0) { + goto error; + } + + bootutil_hmac_sha256_drop(&hmac); + + /* + * Expand + */ + + len = *okm_len; + counter = 1; + first = true; + for (off = 0; len > 0; off += BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE, ++counter) { + bootutil_hmac_sha256_init(&hmac); + + rc = bootutil_hmac_sha256_set_key(&hmac, prk, BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE); + if (rc != 0) { + goto error; + } + + if (first) { + first = false; + } else { + rc = bootutil_hmac_sha256_update(&hmac, T, BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE); + if (rc != 0) { + goto error; + } + } + + rc = bootutil_hmac_sha256_update(&hmac, info, info_len); + if (rc != 0) { + goto error; + } + + rc = bootutil_hmac_sha256_update(&hmac, &counter, 1); + if (rc != 0) { + goto error; + } + + rc = bootutil_hmac_sha256_finish(&hmac, T, BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE); + if (rc != 0) { + goto error; + } + + bootutil_hmac_sha256_drop(&hmac); + + if (len > BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE) { + memcpy(&okm[off], T, BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE); + len -= BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE; + } else { + memcpy(&okm[off], T, len); + len = 0; + } + } + + return 0; + +error: + bootutil_hmac_sha256_drop(&hmac); + return -1; +} +#endif /* MCUBOOT_ENCRYPT_EC256 || MCUBOOT_ENCRYPT_X25519 */ + +#if !defined(MCUBOOT_ENC_BUILTIN_KEY) +extern const struct bootutil_key bootutil_enc_key; + +/* + * Default implementation to retrieve the private encryption key which is + * embedded in the bootloader code (when MCUBOOT_ENC_BUILTIN_KEY is not defined). + */ +int boot_enc_retrieve_private_key(struct bootutil_key **private_key) +{ + *private_key = (struct bootutil_key *)&bootutil_enc_key; + + return 0; +} +#endif /* !MCUBOOT_ENC_BUILTIN_KEY */ + +#if ( (defined(MCUBOOT_ENCRYPT_RSA) && defined(MCUBOOT_USE_MBED_TLS) && !defined(MCUBOOT_USE_PSA_CRYPTO)) || \ + (defined(MCUBOOT_ENCRYPT_EC256) && defined(MCUBOOT_USE_MBED_TLS)) ) +#if MBEDTLS_VERSION_NUMBER >= 0x03000000 +static int fake_rng(void *p_rng, unsigned char *output, size_t len) +{ + size_t i; + + (void)p_rng; + for (i = 0; i < len; i++) { + output[i] = (char)i; + } + + return 0; +} +#endif /* MBEDTLS_VERSION_NUMBER */ +#endif /* (MCUBOOT_ENCRYPT_RSA && MCUBOOT_USE_MBED_TLS && !MCUBOOT_USE_PSA_CRYPTO) || + (MCUBOOT_ENCRYPT_EC256 && MCUBOOT_USE_MBED_TLS) */ + +/* + * Decrypt an encryption key TLV. + * + * @param buf An encryption TLV read from flash (build time fixed length) + * @param enckey An AES-128 or AES-256 key sized buffer to store to plain key. + */ +int +boot_decrypt_key(const uint8_t *buf, uint8_t *enckey) +{ +#if defined(MCUBOOT_ENCRYPT_RSA) + bootutil_rsa_context rsa; + uint8_t *cp; + uint8_t *cpend; + size_t olen; +#endif +#if defined(MCUBOOT_ENCRYPT_EC256) + bootutil_ecdh_p256_context ecdh_p256; +#endif +#if defined(MCUBOOT_ENCRYPT_X25519) + bootutil_ecdh_x25519_context ecdh_x25519; +#endif +#if defined(MCUBOOT_ENCRYPT_EC256) || defined(MCUBOOT_ENCRYPT_X25519) + bootutil_hmac_sha256_context hmac; + bootutil_aes_ctr_context aes_ctr; + uint8_t tag[BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE]; + uint8_t shared[SHARED_KEY_LEN]; + uint8_t derived_key[BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE + BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE]; + uint8_t *cp; + uint8_t *cpend; + uint8_t private_key[PRIV_KEY_LEN]; + uint8_t counter[BOOTUTIL_CRYPTO_AES_CTR_BLOCK_SIZE]; + uint16_t len; +#endif + struct bootutil_key *bootutil_enc_key = NULL; + int rc = -1; + + rc = boot_enc_retrieve_private_key(&bootutil_enc_key); + if (rc) { + return rc; + } + + if (bootutil_enc_key == NULL) { + return rc; + } + +#if defined(MCUBOOT_ENCRYPT_RSA) + + bootutil_rsa_init(&rsa); + cp = (uint8_t *)bootutil_enc_key->key; + cpend = cp + *bootutil_enc_key->len; + + /* The enckey is encrypted through RSA so for decryption we need the private key */ + rc = bootutil_rsa_parse_private_key(&rsa, &cp, cpend); + if (rc) { + bootutil_rsa_drop(&rsa); + return rc; + } + + rc = bootutil_rsa_oaep_decrypt(&rsa, &olen, buf, enckey, BOOT_ENC_KEY_SIZE); + bootutil_rsa_drop(&rsa); + if (rc) { + return rc; + } + +#endif /* defined(MCUBOOT_ENCRYPT_RSA) */ + +#if defined(MCUBOOT_ENCRYPT_KW) + + assert(*bootutil_enc_key->len == BOOT_ENC_KEY_SIZE); + rc = key_unwrap(buf, enckey, bootutil_enc_key); + +#endif /* defined(MCUBOOT_ENCRYPT_KW) */ + +#if defined(MCUBOOT_ENCRYPT_EC256) + + cp = (uint8_t *)bootutil_enc_key->key; + cpend = cp + *bootutil_enc_key->len; + + /* + * Load the stored EC256 decryption private key + */ + + rc = parse_ec256_enckey(&cp, cpend, private_key); + if (rc) { + return rc; + } + + /* + * First "element" in the TLV is the curve point (public key) + */ + bootutil_ecdh_p256_init(&ecdh_p256); + + rc = bootutil_ecdh_p256_shared_secret(&ecdh_p256, &buf[EC_PUBK_INDEX], private_key, shared); + bootutil_ecdh_p256_drop(&ecdh_p256); + if (rc != 0) { + return -1; + } + +#endif /* defined(MCUBOOT_ENCRYPT_EC256) */ + +#if defined(MCUBOOT_ENCRYPT_X25519) + + cp = (uint8_t *)bootutil_enc_key->key; + cpend = cp + *bootutil_enc_key->len; + + /* + * Load the stored X25519 decryption private key + */ + + rc = parse_x25519_enckey(&cp, cpend, private_key); + if (rc) { + return rc; + } + + /* + * First "element" in the TLV is the curve point (public key) + */ + + bootutil_ecdh_x25519_init(&ecdh_x25519); + + rc = bootutil_ecdh_x25519_shared_secret(&ecdh_x25519, &buf[EC_PUBK_INDEX], private_key, shared); + bootutil_ecdh_x25519_drop(&ecdh_x25519); + if (!rc) { + return -1; + } + +#endif /* defined(MCUBOOT_ENCRYPT_X25519) */ + +#if defined(MCUBOOT_ENCRYPT_EC256) || defined(MCUBOOT_ENCRYPT_X25519) + + /* + * Expand shared secret to create keys for AES-128-CTR + HMAC-SHA256 + */ + + len = BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE + BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE; + rc = hkdf(shared, SHARED_KEY_LEN, (uint8_t *)"MCUBoot_ECIES_v1", 16, + derived_key, &len); + if (rc != 0 || len != (BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE + BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE)) { + return -1; + } + + /* + * HMAC the key and check that our received MAC matches the generated tag + */ + + bootutil_hmac_sha256_init(&hmac); + + rc = bootutil_hmac_sha256_set_key(&hmac, &derived_key[BOOT_ENC_KEY_SIZE], 32); + if (rc != 0) { + (void)bootutil_hmac_sha256_drop(&hmac); + return -1; + } + + rc = bootutil_hmac_sha256_update(&hmac, &buf[EC_CIPHERKEY_INDEX], BOOT_ENC_KEY_SIZE); + if (rc != 0) { + (void)bootutil_hmac_sha256_drop(&hmac); + return -1; + } + + /* Assumes the tag buffer is at least sizeof(hmac_tag_size(state)) bytes */ + rc = bootutil_hmac_sha256_finish(&hmac, tag, BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE); + if (rc != 0) { + (void)bootutil_hmac_sha256_drop(&hmac); + return -1; + } + + if (bootutil_constant_time_compare(tag, &buf[EC_TAG_INDEX], 32) != 0) { + (void)bootutil_hmac_sha256_drop(&hmac); + return -1; + } + + bootutil_hmac_sha256_drop(&hmac); + + /* + * Finally decrypt the received ciphered key + */ + + bootutil_aes_ctr_init(&aes_ctr); + if (rc != 0) { + bootutil_aes_ctr_drop(&aes_ctr); + return -1; + } + + rc = bootutil_aes_ctr_set_key(&aes_ctr, derived_key); + if (rc != 0) { + bootutil_aes_ctr_drop(&aes_ctr); + return -1; + } + + memset(counter, 0, BOOTUTIL_CRYPTO_AES_CTR_BLOCK_SIZE); + rc = bootutil_aes_ctr_decrypt(&aes_ctr, counter, &buf[EC_CIPHERKEY_INDEX], BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE, 0, enckey); + if (rc != 0) { + bootutil_aes_ctr_drop(&aes_ctr); + return -1; + } + + bootutil_aes_ctr_drop(&aes_ctr); + + rc = 0; + +#endif /* defined(MCUBOOT_ENCRYPT_EC256) || defined(MCUBOOT_ENCRYPT_X25519) */ + + return rc; +} +#endif /* CONFIG_BOOT_ED25519_PSA */ + +/* + * Load encryption key. + */ +int +boot_enc_load(struct enc_key_data *enc_state, int slot, + const struct image_header *hdr, const struct flash_area *fap, + struct boot_status *bs) +{ + uint32_t off; + uint16_t len; + struct image_tlv_iter it; +#if MCUBOOT_SWAP_SAVE_ENCTLV + uint8_t *buf; +#else + uint8_t buf[EXPECTED_ENC_LEN]; +#endif + int rc; + + /* Already loaded... */ + if (enc_state[slot].valid) { + return 1; + } + + /* Initialize the AES context */ + boot_enc_init(enc_state, slot); + + rc = bootutil_tlv_iter_begin(&it, hdr, fap, EXPECTED_ENC_TLV, false); + if (rc) { + return -1; + } + + rc = bootutil_tlv_iter_next(&it, &off, &len, NULL); + if (rc != 0) { + return rc; + } + + if (len != EXPECTED_ENC_LEN) { + return -1; + } + +#if MCUBOOT_SWAP_SAVE_ENCTLV + buf = bs->enctlv[slot]; + memset(buf, 0xff, BOOT_ENC_TLV_ALIGN_SIZE); +#endif + + rc = flash_area_read(fap, off, buf, EXPECTED_ENC_LEN); + if (rc) { + return -1; + } + + return boot_decrypt_key(buf, bs->enckey[slot]); +} + +int +boot_enc_init(struct enc_key_data *enc_state, uint8_t slot) +{ + bootutil_aes_ctr_init(&enc_state[slot].aes_ctr); + return 0; +} + +int +boot_enc_drop(struct enc_key_data *enc_state, uint8_t slot) +{ + bootutil_aes_ctr_drop(&enc_state[slot].aes_ctr); + enc_state[slot].valid = 0; + return 0; +} + +int +boot_enc_set_key(struct enc_key_data *enc_state, uint8_t slot, + const struct boot_status *bs) +{ + int rc; + + rc = bootutil_aes_ctr_set_key(&enc_state[slot].aes_ctr, bs->enckey[slot]); + if (rc != 0) { + boot_enc_drop(enc_state, slot); + return -1; + } + + enc_state[slot].valid = 1; + + return 0; +} + + +bool +boot_enc_valid(struct enc_key_data *enc_state, int slot) +{ + return enc_state[slot].valid; +} + +void +boot_enc_encrypt(struct enc_key_data *enc_state, int slot, uint32_t off, + uint32_t sz, uint32_t blk_off, uint8_t *buf) +{ + struct enc_key_data *enc = &enc_state[slot]; + uint8_t nonce[16]; + + /* Nothing to do with size == 0 */ + if (sz == 0) { + return; + } + + memset(nonce, 0, 12); + off >>= 4; + nonce[12] = (uint8_t)(off >> 24); + nonce[13] = (uint8_t)(off >> 16); + nonce[14] = (uint8_t)(off >> 8); + nonce[15] = (uint8_t)off; + + assert(enc->valid == 1); + bootutil_aes_ctr_encrypt(&enc->aes_ctr, nonce, buf, sz, blk_off, buf); +} + +void +boot_enc_decrypt(struct enc_key_data *enc_state, int slot, uint32_t off, + uint32_t sz, uint32_t blk_off, uint8_t *buf) +{ + struct enc_key_data *enc = &enc_state[slot]; + uint8_t nonce[16]; + + /* Nothing to do with size == 0 */ + if (sz == 0) { + return; + } + + memset(nonce, 0, 12); + off >>= 4; + nonce[12] = (uint8_t)(off >> 24); + nonce[13] = (uint8_t)(off >> 16); + nonce[14] = (uint8_t)(off >> 8); + nonce[15] = (uint8_t)off; + + assert(enc->valid == 1); + bootutil_aes_ctr_decrypt(&enc->aes_ctr, nonce, buf, sz, blk_off, buf); +} + +/** + * Clears encrypted state after use. + */ +void +boot_enc_zeroize(struct enc_key_data *enc_state) +{ + uint8_t slot; + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + (void)boot_enc_drop(enc_state, slot); + } + memset(enc_state, 0, sizeof(struct enc_key_data) * BOOT_NUM_SLOTS); +} + +#endif /* MCUBOOT_ENC_IMAGES */ diff --git a/bootloader/mcuboot/boot/bootutil/src/encrypted_psa.c b/bootloader/mcuboot/boot/bootutil/src/encrypted_psa.c new file mode 100644 index 0000000..c3f7288 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/encrypted_psa.c @@ -0,0 +1,454 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#include "mcuboot_config/mcuboot_config.h" + +#include +#include +#include + +/* We are not really using the MBEDTLS but need the ASN.1 parsing functions */ +#define MBEDTLS_ASN1_PARSE_C + +#include "bootutil/crypto/sha.h" +#include "mbedtls/oid.h" +#include "mbedtls/asn1.h" + +#include "bootutil/image.h" +#include "bootutil/enc_key.h" +#include "bootutil/sign_key.h" +#include "bootutil/crypto/common.h" + +#include "bootutil_priv.h" +#include "bootutil/bootutil_log.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot_psa_enc); + +#define EXPECTED_ENC_LEN BOOT_ENC_TLV_SIZE +#define EXPECTED_ENC_TLV IMAGE_TLV_ENC_X25519 +#define EC_PUBK_INDEX (0) +#define EC_TAG_INDEX (32) +#define EC_CIPHERKEY_INDEX (32 + 32) +_Static_assert(EC_CIPHERKEY_INDEX + BOOT_ENC_KEY_SIZE == EXPECTED_ENC_LEN, + "Please fix ECIES-X25519 component indexes"); + +#define X25519_OID "\x6e" +static const uint8_t ec_pubkey_oid[] = MBEDTLS_OID_ISO_IDENTIFIED_ORG \ + MBEDTLS_OID_ORG_GOV X25519_OID; + +#define SHARED_KEY_LEN 32 +#define PRIV_KEY_LEN 32 + +/* Fixme: This duplicates code from encrypted.c and depends on mbedtls */ +static int +parse_x25519_enckey(uint8_t **p, uint8_t *end, uint8_t *private_key) +{ + size_t len; + int version; + mbedtls_asn1_buf alg; + mbedtls_asn1_buf param; + + if (mbedtls_asn1_get_tag(p, end, &len, MBEDTLS_ASN1_CONSTRUCTED | + MBEDTLS_ASN1_SEQUENCE) != 0) { + return -1; + } + + if (*p + len != end) { + return -2; + } + + version = 0; + if (mbedtls_asn1_get_int(p, end, &version) || version != 0) { + return -3; + } + + if (mbedtls_asn1_get_alg(p, end, &alg, ¶m) != 0) { + return -4; + } + + if (alg.ASN1_CONTEXT_MEMBER(len) != sizeof(ec_pubkey_oid) - 1 || + memcmp(alg.ASN1_CONTEXT_MEMBER(p), ec_pubkey_oid, sizeof(ec_pubkey_oid) - 1)) { + return -5; + } + + if (mbedtls_asn1_get_tag(p, end, &len, MBEDTLS_ASN1_OCTET_STRING) != 0) { + return -6; + } + + if (mbedtls_asn1_get_tag(p, end, &len, MBEDTLS_ASN1_OCTET_STRING) != 0) { + return -7; + } + + if (len != PRIV_KEY_LEN) { + return -8; + } + + memcpy(private_key, *p, PRIV_KEY_LEN); + return 0; +} + +void bootutil_aes_ctr_init(bootutil_aes_ctr_context *ctx) +{ + psa_status_t psa_ret = psa_crypto_init(); + + (void)ctx; + + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("AES init PSA crypto init failed %d", psa_ret); + assert(0); + } +} + +#if defined(MCUBOOT_ENC_IMAGES) +extern const struct bootutil_key bootutil_enc_key; +/* + * Decrypt an encryption key TLV. + * + * @param buf An encryption TLV read from flash (build time fixed length) + * @param enckey An AES-128 or AES-256 key sized buffer to store to plain key. + */ +int +boot_decrypt_key(const uint8_t *buf, uint8_t *enckey) +{ + uint8_t derived_key[BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE + BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE]; + uint8_t *cp; + uint8_t *cpend; + uint8_t private_key[PRIV_KEY_LEN]; + size_t len; + psa_status_t psa_ret = PSA_ERROR_BAD_STATE; + psa_status_t psa_cleanup_ret = PSA_ERROR_BAD_STATE; + psa_key_id_t kid; + psa_key_attributes_t kattr = PSA_KEY_ATTRIBUTES_INIT; + psa_key_derivation_operation_t key_do = PSA_KEY_DERIVATION_OPERATION_INIT; + psa_algorithm_t key_do_alg; + int rc = -1; + + cp = (uint8_t *)bootutil_enc_key.key; + cpend = cp + *bootutil_enc_key.len; + + /* The psa_cipher_decrypt needs initialization vector of proper length at + * the beginning of the input buffer. + */ + uint8_t iv_and_key[PSA_CIPHER_IV_LENGTH(PSA_KEY_TYPE_AES, PSA_ALG_CTR) + + BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE]; + + psa_ret = psa_crypto_init(); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("AES crypto init failed %d", psa_ret); + return -1; + } + + /* + * Load the stored X25519 decryption private key + */ + rc = parse_x25519_enckey(&cp, cpend, private_key); + if (rc) { + return rc; + } + + psa_set_key_type(&kattr, PSA_KEY_TYPE_ECC_KEY_PAIR(PSA_ECC_FAMILY_MONTGOMERY)); + psa_set_key_usage_flags(&kattr, PSA_KEY_USAGE_DERIVE); + psa_set_key_algorithm(&kattr, PSA_ALG_ECDH); + + psa_ret = psa_import_key(&kattr, private_key, sizeof(private_key), &kid); + memset(private_key, 0, sizeof(private_key)); + psa_reset_key_attributes(&kattr); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("Built-in key import failed %d", psa_ret); + return -1; + } + + key_do_alg = PSA_ALG_KEY_AGREEMENT(PSA_ALG_ECDH, PSA_ALG_HKDF(PSA_ALG_SHA_256)); + + psa_ret = psa_key_derivation_setup(&key_do, key_do_alg); + if (psa_ret != PSA_SUCCESS) { + psa_cleanup_ret = psa_destroy_key(kid); + if (psa_cleanup_ret != PSA_SUCCESS) { + BOOT_LOG_WRN("Built-in key destruction failed %d", psa_cleanup_ret); + } + BOOT_LOG_ERR("Key derivation setup failed %d", psa_ret); + return -1; + } + + /* Note: PSA 1.1.2 does not have psa_key_agreement that would be useful here + * as it could just add the derived key to the storage and return key id. + * Instead, we have to use the code below to generate derived key and put it + * into storage, to obtain the key id we can then use with psa_mac_* functions. + */ + psa_ret = psa_key_derivation_key_agreement(&key_do, PSA_KEY_DERIVATION_INPUT_SECRET, + kid, &buf[EC_PUBK_INDEX], + BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE); + psa_cleanup_ret = psa_destroy_key(kid); + if (psa_cleanup_ret != PSA_SUCCESS) { + BOOT_LOG_WRN("Built-in key destruction failed %d", psa_cleanup_ret); + } + if (psa_ret != PSA_SUCCESS) { + psa_cleanup_ret = psa_key_derivation_abort(&key_do); + if (psa_cleanup_ret != PSA_SUCCESS) { + BOOT_LOG_WRN("Key derivation abort failed %d", psa_ret); + } + + BOOT_LOG_ERR("Key derivation failed %d", psa_ret); + return -1; + } + + /* Only info, no salt */ + psa_ret = psa_key_derivation_input_bytes(&key_do, PSA_KEY_DERIVATION_INPUT_INFO, + "MCUBoot_ECIES_v1", 16); + if (psa_ret != PSA_SUCCESS) { + psa_cleanup_ret = psa_key_derivation_abort(&key_do); + if (psa_cleanup_ret != PSA_SUCCESS) { + BOOT_LOG_WRN("Key derivation abort failed %d", psa_ret); + } + BOOT_LOG_ERR("Key derivation failed %d", psa_ret); + return -1; + } + + len = BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE + BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE; + psa_ret = psa_key_derivation_output_bytes(&key_do, derived_key, len); + psa_cleanup_ret = psa_key_derivation_abort(&key_do); + if (psa_cleanup_ret != PSA_SUCCESS) { + BOOT_LOG_WRN("Key derivation cleanup failed %d", psa_ret); + } + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("Key derivation failed %d", psa_ret); + return -1; + } + + /* The derived key consists of BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE bytes + * followed by BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE bytes. Both parts will + * be imported at the point where needed and discarded immediately after. + */ + psa_set_key_type(&kattr, PSA_KEY_TYPE_HMAC); + psa_set_key_usage_flags(&kattr, PSA_KEY_USAGE_VERIFY_MESSAGE); + psa_set_key_algorithm(&kattr, PSA_ALG_HMAC(PSA_ALG_SHA_256)); + + /* Import the MAC tag key part of derived key, that is the part that starts + * after BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE and has length of + * BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE bytes. + */ + psa_ret = psa_import_key(&kattr, + &derived_key[BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE], + BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE, &kid); + psa_reset_key_attributes(&kattr); + if (psa_ret != PSA_SUCCESS) { + memset(derived_key, 0, sizeof(derived_key)); + BOOT_LOG_ERR("MAC key import failed %d", psa_ret); + return -1; + } + + /* Verify the MAC tag of the random encryption key */ + psa_ret = psa_mac_verify(kid, PSA_ALG_HMAC(PSA_ALG_SHA_256), + &buf[EC_CIPHERKEY_INDEX], BOOT_ENC_KEY_SIZE, + &buf[EC_TAG_INDEX], + BOOTUTIL_CRYPTO_SHA256_DIGEST_SIZE); + psa_cleanup_ret = psa_destroy_key(kid); + if (psa_cleanup_ret != PSA_SUCCESS) { + BOOT_LOG_WRN("MAC key destruction failed %d", psa_cleanup_ret); + } + if (psa_ret != PSA_SUCCESS) { + memset(derived_key, 0, sizeof(derived_key)); + BOOT_LOG_ERR("MAC verification failed %d", psa_ret); + return -1; + } + + /* The derived key is used in AES decryption of random key */ + psa_set_key_type(&kattr, PSA_KEY_TYPE_AES); + psa_set_key_usage_flags(&kattr, PSA_KEY_USAGE_DECRYPT); + psa_set_key_algorithm(&kattr, PSA_ALG_CTR); + + /* Import the AES partition of derived key, the first 16 bytes */ + psa_ret = psa_import_key(&kattr, &derived_key[0], + BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE, &kid); + memset(derived_key, 0, sizeof(derived_key)); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("AES key import failed %d", psa_ret); + return -1; + } + + /* Decrypt the random AES encryption key with AES and the key obtained + * at derivation. */ + memset(&iv_and_key[0], 0, PSA_CIPHER_IV_LENGTH(PSA_KEY_TYPE_AES, PSA_ALG_CTR)); + memcpy(&iv_and_key[PSA_CIPHER_IV_LENGTH(PSA_KEY_TYPE_AES, PSA_ALG_CTR)], + &buf[EC_CIPHERKEY_INDEX], + sizeof(iv_and_key) - PSA_CIPHER_IV_LENGTH(PSA_KEY_TYPE_AES, PSA_ALG_CTR)); + + len = 0; + psa_ret = psa_cipher_decrypt(kid, PSA_ALG_CTR, iv_and_key, sizeof(iv_and_key), + enckey, BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE, &len); + memset(iv_and_key, 0, sizeof(iv_and_key)); + psa_cleanup_ret = psa_destroy_key(kid); + if (psa_cleanup_ret != PSA_SUCCESS) { + BOOT_LOG_WRN("AES key destruction failed %d", psa_cleanup_ret); + } + if (psa_ret != PSA_SUCCESS || len != BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE) { + memset(enckey, 0, BOOTUTIL_CRYPTO_AES_CTR_KEY_SIZE); + BOOT_LOG_ERR("Random key decryption failed %d", psa_ret); + return -1; + } + + return 0; +} + +int bootutil_aes_ctr_encrypt(bootutil_aes_ctr_context *ctx, uint8_t *counter, + const uint8_t *m, uint32_t mlen, size_t blk_off, uint8_t *c) +{ + int ret = 0; + psa_status_t psa_ret = PSA_ERROR_BAD_STATE; + psa_key_attributes_t kattr = PSA_KEY_ATTRIBUTES_INIT; + psa_key_id_t kid; + psa_cipher_operation_t psa_op; + size_t elen = 0; /* Decrypted length */ + + /* Fixme: calling psa_crypto_init multiple times is not a problem, + * yet the code here is only present because there is not general + * crypto init. */ + psa_ret = psa_crypto_init(); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("PSA crypto init failed %d", psa_ret); + ret = -1; + goto gone; + } + + psa_op = psa_cipher_operation_init(); + + /* Fixme: Import should happen when key is decrypted, but due to lack + * of key destruction there is no way to destroy key stored by + * psa other way than here. */ + psa_set_key_type(&kattr, PSA_KEY_TYPE_AES); + psa_set_key_usage_flags(&kattr, PSA_KEY_USAGE_ENCRYPT); + psa_set_key_algorithm(&kattr, PSA_ALG_CTR); + + psa_ret = psa_import_key(&kattr, ctx->key, BOOT_ENC_KEY_SIZE, &kid); + psa_reset_key_attributes(&kattr); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("AES enc import key failed %d", psa_ret); + ret = -1; + goto gone; + } + + /* This could be done with psa_cipher_decrypt one-shot operation, but + * multi-part operation is used to avoid re-allocating input buffer + * to account for IV in front of data. + */ + psa_ret = psa_cipher_encrypt_setup(&psa_op, kid, PSA_ALG_CTR); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("AES enc setup failed %d", psa_ret); + ret = -1; + goto gone_with_key; + } + + /* Fixme: hardcoded counter size, but it is hardcoded everywhere */ + psa_ret = psa_cipher_set_iv(&psa_op, counter, 16); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("AES enc IV set failed %d", psa_ret); + ret = -1; + goto gone_after_setup; + } + + psa_ret = psa_cipher_update(&psa_op, m, mlen, c, mlen, &elen); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("AES enc encryption failed %d", psa_ret); + ret = -1; + goto gone_after_setup; + } + +gone_after_setup: + psa_ret = psa_cipher_abort(&psa_op); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_WRN("AES enc cipher abort failed %d", psa_ret); + /* Intentionally not changing the ret */ + } +gone_with_key: + /* Fixme: Should be removed once key is shared by id */ + psa_ret = psa_destroy_key(kid); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_WRN("AES enc destroy key failed %d", psa_ret); + /* Intentionally not changing the ret */ + } +gone: + return ret; +} + +int bootutil_aes_ctr_decrypt(bootutil_aes_ctr_context *ctx, uint8_t *counter, + const uint8_t *c, uint32_t clen, size_t blk_off, uint8_t *m) +{ + int ret = 0; + psa_status_t psa_ret = PSA_ERROR_BAD_STATE; + psa_key_attributes_t kattr = PSA_KEY_ATTRIBUTES_INIT; + psa_key_id_t kid; + psa_cipher_operation_t psa_op; + size_t dlen = 0; /* Decrypted length */ + + /* Fixme: the init should already happen before calling the function, but + * somehow it does not, for example when recovering in swap. + */ + psa_ret = psa_crypto_init(); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("PSA crypto init failed %d", psa_ret); + ret = -1; + goto gone; + } + + psa_op = psa_cipher_operation_init(); + + /* Fixme: Import should happen when key is decrypted, but due to lack + * of key destruction there is no way to destroy key stored by + * psa other way than here. */ + psa_set_key_type(&kattr, PSA_KEY_TYPE_AES); + psa_set_key_usage_flags(&kattr, PSA_KEY_USAGE_DECRYPT); + psa_set_key_algorithm(&kattr, PSA_ALG_CTR); + + psa_ret = psa_import_key(&kattr, ctx->key, BOOT_ENC_KEY_SIZE, &kid); + psa_reset_key_attributes(&kattr); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("AES dec import key failed %d", psa_ret); + ret = -1; + goto gone; + } + + /* This could be done with psa_cipher_decrypt one-shot operation, but + * multi-part operation is used to avoid re-allocating input buffer + * to account for IV in front of data. + */ + psa_ret = psa_cipher_decrypt_setup(&psa_op, kid, PSA_ALG_CTR); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("AES dec setup failed %d", psa_ret); + ret = -1; + goto gone_with_key; + } + + /* Fixme: hardcoded counter size, but it is hardcoded everywhere */ + psa_ret = psa_cipher_set_iv(&psa_op, counter, 16); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("AES dec IV set failed %d", psa_ret); + ret = -1; + goto gone_after_setup; + } + + psa_ret = psa_cipher_update(&psa_op, c, clen, m, clen, &dlen); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_ERR("AES dec decryption failed %d", psa_ret); + ret = -1; + goto gone_after_setup; + } + +gone_after_setup: + psa_ret = psa_cipher_abort(&psa_op); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_WRN("PSA dec abort failed %d", psa_ret); + /* Intentionally not changing the ret */ + } +gone_with_key: + psa_ret = psa_destroy_key(kid); + if (psa_ret != PSA_SUCCESS) { + BOOT_LOG_WRN("PSA dec key failed %d", psa_ret); + /* Intentionally not changing the ret */ + } +gone: + return ret; +} +#endif /* defined(MCUBOOT_ENC_IMAGES) */ diff --git a/bootloader/mcuboot/boot/bootutil/src/fault_injection_hardening.c b/bootloader/mcuboot/boot/bootutil/src/fault_injection_hardening.c new file mode 100644 index 0000000..11436cf --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/fault_injection_hardening.c @@ -0,0 +1,78 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2020 Arm Limited + */ + +#include "bootutil/fault_injection_hardening.h" + +#ifdef FIH_ENABLE_DOUBLE_VARS +/* Variable that could be (but isn't) changed at runtime to force the compiler + * not to optimize the double check. Value doesn't matter. + */ +volatile int _fih_mask = _FIH_MASK_VALUE; +#endif /* FIH_ENABLE_DOUBLE_VARS */ + +fih_ret FIH_SUCCESS = FIH_POSITIVE_VALUE; +fih_ret FIH_FAILURE = FIH_NEGATIVE_VALUE; +fih_ret FIH_NO_BOOTABLE_IMAGE = FIH_CONST1; +fih_ret FIH_BOOT_HOOK_REGULAR = FIH_CONST2; + +#ifdef FIH_ENABLE_CFI + +#ifdef FIH_ENABLE_DOUBLE_VARS +fih_int _fih_cfi_ctr = {0, 0 ^ _FIH_MASK_VALUE}; +#else +fih_int _fih_cfi_ctr = {0}; +#endif /* FIH_ENABLE_DOUBLE_VARS */ + +/* Increment the CFI counter by one, and return the value before the increment. + */ +fih_int fih_cfi_get_and_increment(void) +{ + fih_int saved = _fih_cfi_ctr; + _fih_cfi_ctr = fih_int_encode(fih_int_decode(saved) + 1); + return saved; +} + +/* Validate that the saved precall value is the same as the value of the global + * counter. For this to be the case, a fih_ret must have been called between + * these functions being executed. If the values aren't the same then panic. + */ +void fih_cfi_validate(fih_int saved) +{ + if (fih_int_decode(saved) != fih_int_decode(_fih_cfi_ctr)) { + FIH_PANIC; + } +} + +/* Decrement the global CFI counter by one, so that it has the same value as + * before the cfi_precall + */ +void fih_cfi_decrement(void) +{ + _fih_cfi_ctr = fih_int_encode(fih_int_decode(_fih_cfi_ctr) - 1); +} + +#endif /* FIH_ENABLE_CFI */ + +#ifdef FIH_ENABLE_GLOBAL_FAIL +/* Global failure loop for bootloader code. Uses attribute used to prevent + * compiler removing due to non-standard calling procedure. Multiple loop jumps + * used to make unlooping difficult. + */ +__attribute__((used)) +__attribute__((noinline)) +void fih_panic_loop(void) +{ + __asm volatile ("b fih_panic_loop"); + __asm volatile ("b fih_panic_loop"); + __asm volatile ("b fih_panic_loop"); + __asm volatile ("b fih_panic_loop"); + __asm volatile ("b fih_panic_loop"); + __asm volatile ("b fih_panic_loop"); + __asm volatile ("b fih_panic_loop"); + __asm volatile ("b fih_panic_loop"); + __asm volatile ("b fih_panic_loop"); +} +#endif /* FIH_ENABLE_GLOBAL_FAIL */ diff --git a/bootloader/mcuboot/boot/bootutil/src/fault_injection_hardening_delay_rng_mbedtls.c b/bootloader/mcuboot/boot/bootutil/src/fault_injection_hardening_delay_rng_mbedtls.c new file mode 100644 index 0000000..663999b --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/fault_injection_hardening_delay_rng_mbedtls.c @@ -0,0 +1,47 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2020 Arm Limited + */ + +#include "bootutil/fault_injection_hardening.h" + +#ifdef FIH_ENABLE_DELAY + +#include "mbedtls/ctr_drbg.h" +#include "mbedtls/entropy.h" + +/* Mbedtls implementation of the delay RNG. Can be replaced by any other RNG + * implementation that is backed by an entropy source by altering these + * functions. This is not provided as a header API and a C file implementation + * due to issues with inlining. + */ + +#ifdef MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES +#error "FIH_ENABLE_DELAY requires an entropy source" +#endif /* MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES */ + +mbedtls_entropy_context fih_entropy_ctx; +mbedtls_ctr_drbg_context fih_drbg_ctx; + +int fih_delay_init(void) +{ + mbedtls_entropy_init(&fih_entropy_ctx); + mbedtls_ctr_drbg_init(&fih_drbg_ctx); + mbedtls_ctr_drbg_seed(&fih_drbg_ctx , mbedtls_entropy_func, + &fih_entropy_ctx, NULL, 0); + + return 1; +} + +unsigned char fih_delay_random_uchar(void) +{ + unsigned char delay; + + mbedtls_ctr_drbg_random(&fih_drbg_ctx,(unsigned char*) &delay, + sizeof(delay)); + + return delay; +} + +#endif /* FIH_ENABLE_DELAY */ diff --git a/bootloader/mcuboot/boot/bootutil/src/image_ecdsa.c b/bootloader/mcuboot/boot/bootutil/src/image_ecdsa.c new file mode 100644 index 0000000..4604913 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/image_ecdsa.c @@ -0,0 +1,95 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2016-2019 JUUL Labs + * Copyright (c) 2017 Linaro LTD + * Copyright (C) 2021-2024 Arm Limited + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include + +#include "mcuboot_config/mcuboot_config.h" + +#if defined(MCUBOOT_SIGN_EC256) || defined(MCUBOOT_SIGN_EC384) + +#include "bootutil_priv.h" +#include "bootutil/fault_injection_hardening.h" +#include "bootutil/crypto/ecdsa.h" + +#if !defined(MCUBOOT_BUILTIN_KEY) +fih_ret +bootutil_verify_sig(uint8_t *hash, uint32_t hlen, uint8_t *sig, size_t slen, + uint8_t key_id) +{ + int rc; + bootutil_ecdsa_context ctx; + FIH_DECLARE(fih_rc, FIH_FAILURE); + uint8_t *pubkey; + uint8_t *end; + + pubkey = (uint8_t *)bootutil_keys[key_id].key; + end = pubkey + *bootutil_keys[key_id].len; + bootutil_ecdsa_init(&ctx); + + rc = bootutil_ecdsa_parse_public_key(&ctx, &pubkey, end); + if (rc) { + goto out; + } + + rc = bootutil_ecdsa_verify(&ctx, pubkey, end-pubkey, hash, hlen, sig, slen); + fih_rc = fih_ret_encode_zero_equality(rc); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_SET(fih_rc, FIH_FAILURE); + } + +out: + bootutil_ecdsa_drop(&ctx); + + FIH_RET(fih_rc); +} +#else /* !MCUBOOT_BUILTIN_KEY */ +fih_ret +bootutil_verify_sig(uint8_t *hash, uint32_t hlen, uint8_t *sig, size_t slen, + uint8_t key_id) +{ + int rc; + bootutil_ecdsa_context ctx; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + /* Use builtin key for image verification, no key parsing is required. */ + ctx.key_id = key_id; + bootutil_ecdsa_init(&ctx); + + /* The public key pointer and key size can be omitted. */ + rc = bootutil_ecdsa_verify(&ctx, NULL, 0, hash, hlen, sig, slen); + fih_rc = fih_ret_encode_zero_equality(rc); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_SET(fih_rc, FIH_FAILURE); + } + + bootutil_ecdsa_drop(&ctx); + + FIH_RET(fih_rc); +} +#endif /* MCUBOOT_BUILTIN_KEY */ + +#endif /* MCUBOOT_SIGN_EC256 || MCUBOOT_SIGN_EC384 */ diff --git a/bootloader/mcuboot/boot/bootutil/src/image_ed25519.c b/bootloader/mcuboot/boot/bootutil/src/image_ed25519.c new file mode 100644 index 0000000..e6c792a --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/image_ed25519.c @@ -0,0 +1,160 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2019 JUUL Labs + * Copyright (c) 2021-2023 Arm Limited + */ + +#include + +#include "mcuboot_config/mcuboot_config.h" + +#if defined(CONFIG_NRF_SECURITY) +/* We are not really using the MBEDTLS but need the ASN.1 parsing funcitons */ +#define MBEDTLS_ASN1_PARSE_C +#endif + +#ifdef MCUBOOT_SIGN_ED25519 +#include "bootutil/sign_key.h" + +#include "mbedtls/oid.h" +#include "mbedtls/asn1.h" + +#include "bootutil_priv.h" +#include "bootutil/crypto/common.h" +#include "bootutil/crypto/sha.h" + +#define EDDSA_SIGNATURE_LENGTH 64 +#define NUM_ED25519_BYTES 32 + +extern int ED25519_verify(const uint8_t *message, size_t message_len, + const uint8_t signature[EDDSA_SIGNATURE_LENGTH], + const uint8_t public_key[NUM_ED25519_BYTES]); + +#if !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) + +static const uint8_t ed25519_pubkey_oid[] = MBEDTLS_OID_ISO_IDENTIFIED_ORG "\x65\x70"; + +/* + * Parse the public key used for signing. + */ +static int +bootutil_import_key(uint8_t **cp, uint8_t *end) +{ + size_t len; + mbedtls_asn1_buf alg; + mbedtls_asn1_buf param; + + if (mbedtls_asn1_get_tag(cp, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) { + return -1; + } + end = *cp + len; + + if (mbedtls_asn1_get_alg(cp, end, &alg, ¶m)) { + return -2; + } + + if (alg.ASN1_CONTEXT_MEMBER(len) != sizeof(ed25519_pubkey_oid) - 1 || + memcmp(alg.ASN1_CONTEXT_MEMBER(p), ed25519_pubkey_oid, sizeof(ed25519_pubkey_oid) - 1)) { + return -3; + } + + if (mbedtls_asn1_get_bitstring_null(cp, end, &len)) { + return -4; + } + if (*cp + len != end) { + return -5; + } + + if (len != NUM_ED25519_BYTES) { + return -6; + } + + return 0; +} +#endif + +fih_ret +bootutil_verify_sig(uint8_t *hash, uint32_t hlen, uint8_t *sig, size_t slen, + uint8_t key_id) +{ + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + uint8_t *pubkey = NULL; +#if !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) + uint8_t *end; +#endif + + if (hlen != IMAGE_HASH_SIZE || slen != EDDSA_SIGNATURE_LENGTH) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + +#if !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) + pubkey = (uint8_t *)bootutil_keys[key_id].key; + end = pubkey + *bootutil_keys[key_id].len; + + rc = bootutil_import_key(&pubkey, end); + if (rc) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } +#endif + + rc = ED25519_verify(hash, IMAGE_HASH_SIZE, sig, pubkey); + + if (rc == 0) { + /* if verify returns 0, there was an error. */ + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + + FIH_SET(fih_rc, FIH_SUCCESS); +out: + + FIH_RET(fih_rc); +} + +fih_ret +bootutil_verify_img(const uint8_t *img, uint32_t size, + uint8_t *sig, size_t slen, uint8_t key_id) +{ + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + uint8_t *pubkey = NULL; +#if !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) + uint8_t *end; +#endif + + if (slen != EDDSA_SIGNATURE_LENGTH) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + +#if !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) + pubkey = (uint8_t *)bootutil_keys[key_id].key; + end = pubkey + *bootutil_keys[key_id].len; + + rc = bootutil_import_key(&pubkey, end); + if (rc) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } +#endif + + rc = ED25519_verify(img, size, sig, pubkey); + + if (rc == 0) { + /* if verify returns 0, there was an error. */ + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + + FIH_SET(fih_rc, FIH_SUCCESS); +out: + + FIH_RET(fih_rc); +} + +#endif /* MCUBOOT_SIGN_ED25519 */ diff --git a/bootloader/mcuboot/boot/bootutil/src/image_rsa.c b/bootloader/mcuboot/boot/bootutil/src/image_rsa.c new file mode 100644 index 0000000..37c35e0 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/image_rsa.c @@ -0,0 +1,288 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2017-2018 Linaro LTD + * Copyright (c) 2017-2019 JUUL Labs + * Copyright (c) 2020-2023 Arm Limited + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include + +#include "mcuboot_config/mcuboot_config.h" + +#ifdef MCUBOOT_SIGN_RSA +#include "bootutil_priv.h" +#include "bootutil/sign_key.h" +#include "bootutil/fault_injection_hardening.h" + +#define BOOTUTIL_CRYPTO_RSA_SIGN_ENABLED +#include "bootutil/crypto/rsa.h" + +/* PSA Crypto APIs provide an integrated API to perform the verification + * while for other crypto backends we need to implement each step at this + * abstraction level + */ +#if !defined(MCUBOOT_USE_PSA_CRYPTO) + +#include "bootutil/crypto/sha.h" + +/* + * Constants for this particular constrained implementation of + * RSA-PSS. In particular, we support RSA 2048, with a SHA256 hash, + * and a 32-byte salt. A signature with different parameters will be + * rejected as invalid. + */ + +/* The size, in octets, of the message. */ +#define PSS_EMLEN (MCUBOOT_SIGN_RSA_LEN / 8) + +/* The size of the hash function. For SHA256, this is 32 bytes. */ +#define PSS_HLEN 32 + +/* Size of the salt, should be fixed. */ +#define PSS_SLEN 32 + +/* The length of the mask: emLen - hLen - 1. */ +#define PSS_MASK_LEN (PSS_EMLEN - PSS_HLEN - 1) + +#define PSS_HASH_OFFSET PSS_MASK_LEN + +/* For the mask itself, how many bytes should be all zeros. */ +#define PSS_MASK_ZERO_COUNT (PSS_MASK_LEN - PSS_SLEN - 1) +#define PSS_MASK_ONE_POS PSS_MASK_ZERO_COUNT + +/* Where the salt starts. */ +#define PSS_MASK_SALT_POS (PSS_MASK_ONE_POS + 1) + +static const uint8_t pss_zeros[8] = {0}; + +/* + * Compute the RSA-PSS mask-generation function, MGF1. Assumptions + * are that the mask length will be less than 256 * PSS_HLEN, and + * therefore we never need to increment anything other than the low + * byte of the counter. + * + * This is described in PKCS#1, B.2.1. + */ +static void +pss_mgf1(uint8_t *mask, const uint8_t *hash) +{ + bootutil_sha_context ctx; + uint8_t counter[4] = { 0, 0, 0, 0 }; + uint8_t htmp[PSS_HLEN]; + int count = PSS_MASK_LEN; + int bytes; + + while (count > 0) { + bootutil_sha_init(&ctx); + bootutil_sha_update(&ctx, hash, PSS_HLEN); + bootutil_sha_update(&ctx, counter, 4); + bootutil_sha_finish(&ctx, htmp); + + counter[3]++; + + bytes = PSS_HLEN; + if (bytes > count) + bytes = count; + + memcpy(mask, htmp, bytes); + mask += bytes; + count -= bytes; + } + + bootutil_sha_drop(&ctx); +} + +/* + * Validate an RSA signature, using RSA-PSS, as described in PKCS #1 + * v2.2, section 9.1.2, with many parameters required to have fixed + * values. RSASSA-PSS-VERIFY RFC8017 section 8.1.2 + */ +static fih_ret +bootutil_cmp_rsasig(bootutil_rsa_context *ctx, uint8_t *hash, uint32_t hlen, + uint8_t *sig, size_t slen) +{ + bootutil_sha_context shactx; + uint8_t em[MBEDTLS_MPI_MAX_SIZE]; + uint8_t db_mask[PSS_MASK_LEN]; + uint8_t h2[PSS_HLEN]; + int i; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + /* The caller has already verified that slen == bootutil_rsa_get_len(ctx) */ + if (slen != PSS_EMLEN || + PSS_EMLEN > MBEDTLS_MPI_MAX_SIZE) { + goto out; + } + + if (hlen != PSS_HLEN) { + goto out; + } + + /* Apply RSAVP1 to produce em = sig^E mod N using the public key */ + if (bootutil_rsa_public(ctx, sig, em)) { + goto out; + } + + /* + * PKCS #1 v2.2, 9.1.2 EMSA-PSS-Verify + * + * emBits is 2048 + * emLen = ceil(emBits/8) = 256 + * + * The salt length is not known at the beginning. + */ + + /* Step 1. The message is constrained by the address space of a + * 32-bit processor, which is far less than the 2^61-1 limit of + * SHA-256. + */ + + /* Step 2. mHash is passed in as 'hash', with hLen the hlen + * argument. */ + + /* Step 3. if emLen < hLen + sLen + 2, inconsistent and stop. + * The salt length is not known at this point. + */ + + /* Step 4. If the rightmost octet of EM does have the value + * 0xbc, output inconsistent and stop. + */ + if (em[PSS_EMLEN - 1] != 0xbc) { + goto out; + } + + /* Step 5. Let maskedDB be the leftmost emLen - hLen - 1 octets + * of EM, and H be the next hLen octets. + * + * maskedDB is then the first 256 - 32 - 1 = 0-222 + * H is 32 bytes 223-254 + */ + + /* Step 6. If the leftmost 8emLen - emBits bits of the leftmost + * octet in maskedDB are not all equal to zero, output + * inconsistent and stop. + * + * 8emLen - emBits is zero, so there is nothing to test here. + */ + + /* Step 7. let dbMask = MGF(H, emLen - hLen - 1). */ + pss_mgf1(db_mask, &em[PSS_HASH_OFFSET]); + + /* Step 8. let DB = maskedDB xor dbMask. + * To avoid needing an additional buffer, store the 'db' in the + * same buffer as db_mask. From now, to the end of this function, + * db_mask refers to the unmasked 'db'. */ + for (i = 0; i < PSS_MASK_LEN; i++) { + db_mask[i] ^= em[i]; + } + + /* Step 9. Set the leftmost 8emLen - emBits bits of the leftmost + * octet in DB to zero. + * pycrypto seems to always make the emBits 2047, so we need to + * clear the top bit. */ + db_mask[0] &= 0x7F; + + /* Step 10. If the emLen - hLen - sLen - 2 leftmost octets of DB + * are not zero or if the octet at position emLen - hLen - sLen - + * 1 (the leftmost position is "position 1") does not have + * hexadecimal value 0x01, output "inconsistent" and stop. */ + for (i = 0; i < PSS_MASK_ZERO_COUNT; i++) { + if (db_mask[i] != 0) { + goto out; + } + } + + if (db_mask[PSS_MASK_ONE_POS] != 1) { + goto out; + } + + /* Step 11. Let salt be the last sLen octets of DB */ + + /* Step 12. Let M' = 0x00 00 00 00 00 00 00 00 || mHash || salt; */ + + /* Step 13. Let H' = Hash(M') */ + bootutil_sha_init(&shactx); + bootutil_sha_update(&shactx, pss_zeros, 8); + bootutil_sha_update(&shactx, hash, PSS_HLEN); + bootutil_sha_update(&shactx, &db_mask[PSS_MASK_SALT_POS], PSS_SLEN); + bootutil_sha_finish(&shactx, h2); + bootutil_sha_drop(&shactx); + + /* Step 14. If H = H', output "consistent". Otherwise, output + * "inconsistent". */ + FIH_CALL(boot_fih_memequal, fih_rc, h2, &em[PSS_HASH_OFFSET], PSS_HLEN); + +out: + FIH_RET(fih_rc); +} + +#else /* MCUBOOT_USE_PSA_CRYPTO */ + +static fih_ret +bootutil_cmp_rsasig(bootutil_rsa_context *ctx, uint8_t *hash, uint32_t hlen, + uint8_t *sig, size_t slen) +{ + int rc = -1; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + /* PSA Crypto APIs allow the verification in a single call */ + rc = bootutil_rsassa_pss_verify(ctx, hash, hlen, sig, slen); + + fih_rc = fih_ret_encode_zero_equality(rc); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_SET(fih_rc, FIH_FAILURE); + } + + FIH_RET(fih_rc); +} + +#endif /* MCUBOOT_USE_PSA_CRYPTO */ + +fih_ret +bootutil_verify_sig(uint8_t *hash, uint32_t hlen, uint8_t *sig, size_t slen, + uint8_t key_id) +{ + bootutil_rsa_context ctx; + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + uint8_t *cp; + uint8_t *end; + + bootutil_rsa_init(&ctx); + + cp = (uint8_t *)bootutil_keys[key_id].key; + end = cp + *bootutil_keys[key_id].len; + + /* The key used for signature verification is a public RSA key */ + rc = bootutil_rsa_parse_public_key(&ctx, &cp, end); + if (rc || slen != bootutil_rsa_get_len(&ctx)) { + goto out; + } + FIH_CALL(bootutil_cmp_rsasig, fih_rc, &ctx, hash, hlen, sig, slen); + +out: + bootutil_rsa_drop(&ctx); + + FIH_RET(fih_rc); +} +#endif /* MCUBOOT_SIGN_RSA */ diff --git a/bootloader/mcuboot/boot/bootutil/src/image_validate.c b/bootloader/mcuboot/boot/bootutil/src/image_validate.c new file mode 100644 index 0000000..f71d1d9 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/image_validate.c @@ -0,0 +1,920 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2017-2019 Linaro LTD + * Copyright (c) 2016-2019 JUUL Labs + * Copyright (c) 2019-2024 Arm Limited + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include +#include +#include +#include + +#include + +#include "bootutil/image.h" +#include "bootutil/crypto/sha.h" +#include "bootutil/sign_key.h" +#include "bootutil/security_cnt.h" +#include "bootutil/fault_injection_hardening.h" + +#include "mcuboot_config/mcuboot_config.h" + +#if defined(MCUBOOT_DECOMPRESS_IMAGES) +#include +#include +#endif + +#include "bootutil/bootutil_log.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +#ifdef MCUBOOT_ENC_IMAGES +#include "bootutil/enc_key.h" +#endif +#if defined(MCUBOOT_SIGN_RSA) +#include "mbedtls/rsa.h" +#endif +#if defined(MCUBOOT_SIGN_EC256) +#include "mbedtls/ecdsa.h" +#endif +#if defined(MCUBOOT_ENC_IMAGES) || defined(MCUBOOT_SIGN_RSA) || \ + defined(MCUBOOT_SIGN_EC256) +#include "mbedtls/asn1.h" +#endif + +#include "bootutil_priv.h" + +#ifndef MCUBOOT_SIGN_PURE +/* + * Compute SHA hash over the image. + * (SHA384 if ECDSA-P384 is being used, + * SHA256 otherwise). + */ +static int +bootutil_img_hash(struct enc_key_data *enc_state, int image_index, + struct image_header *hdr, const struct flash_area *fap, + uint8_t *tmp_buf, uint32_t tmp_buf_sz, uint8_t *hash_result, + uint8_t *seed, int seed_len) +{ + bootutil_sha_context sha_ctx; + uint32_t size; + uint16_t hdr_size; + uint32_t blk_off; + uint32_t tlv_off; +#if !defined(MCUBOOT_HASH_STORAGE_DIRECTLY) + int rc; + uint32_t off; + uint32_t blk_sz; +#endif + +#if (BOOT_IMAGE_NUMBER == 1) || !defined(MCUBOOT_ENC_IMAGES) || \ + defined(MCUBOOT_RAM_LOAD) + (void)enc_state; + (void)image_index; + (void)hdr_size; + (void)blk_off; + (void)tlv_off; +#ifdef MCUBOOT_RAM_LOAD + (void)blk_sz; + (void)off; + (void)rc; + (void)fap; + (void)tmp_buf; + (void)tmp_buf_sz; +#endif +#endif + +#ifdef MCUBOOT_ENC_IMAGES + /* Encrypted images only exist in the secondary slot */ + if (MUST_DECRYPT(fap, image_index, hdr) && + !boot_enc_valid(enc_state, 1)) { + return -1; + } +#endif + + bootutil_sha_init(&sha_ctx); + + /* in some cases (split image) the hash is seeded with data from + * the loader image */ + if (seed && (seed_len > 0)) { + bootutil_sha_update(&sha_ctx, seed, seed_len); + } + + /* Hash is computed over image header and image itself. */ + size = hdr_size = hdr->ih_hdr_size; + size += hdr->ih_img_size; + tlv_off = size; + + /* If protected TLVs are present they are also hashed. */ + size += hdr->ih_protect_tlv_size; + +#ifdef MCUBOOT_HASH_STORAGE_DIRECTLY + /* No chunk loading, storage is mapped to address space and can + * be directly given to hashing function. + */ + bootutil_sha_update(&sha_ctx, (void *)flash_area_get_off(fap), size); +#else /* MCUBOOT_HASH_STORAGE_DIRECTLY */ +#ifdef MCUBOOT_RAM_LOAD + bootutil_sha_update(&sha_ctx, + (void*)(IMAGE_RAM_BASE + hdr->ih_load_addr), + size); +#else + for (off = 0; off < size; off += blk_sz) { + blk_sz = size - off; + if (blk_sz > tmp_buf_sz) { + blk_sz = tmp_buf_sz; + } +#ifdef MCUBOOT_ENC_IMAGES + /* The only data that is encrypted in an image is the payload; + * both header and TLVs (when protected) are not. + */ + if ((off < hdr_size) && ((off + blk_sz) > hdr_size)) { + /* read only the header */ + blk_sz = hdr_size - off; + } + if ((off < tlv_off) && ((off + blk_sz) > tlv_off)) { + /* read only up to the end of the image payload */ + blk_sz = tlv_off - off; + } +#endif + rc = flash_area_read(fap, off, tmp_buf, blk_sz); + if (rc) { + bootutil_sha_drop(&sha_ctx); + return rc; + } +#ifdef MCUBOOT_ENC_IMAGES + if (MUST_DECRYPT(fap, image_index, hdr)) { + /* Only payload is encrypted (area between header and TLVs) */ + int slot = flash_area_id_to_multi_image_slot(image_index, + flash_area_get_id(fap)); + + if (off >= hdr_size && off < tlv_off) { + blk_off = (off - hdr_size) & 0xf; + boot_enc_decrypt(enc_state, slot, off - hdr_size, + blk_sz, blk_off, tmp_buf); + } + } +#endif + bootutil_sha_update(&sha_ctx, tmp_buf, blk_sz); + } +#endif /* MCUBOOT_RAM_LOAD */ +#endif /* MCUBOOT_HASH_STORAGE_DIRECTLY */ + bootutil_sha_finish(&sha_ctx, hash_result); + bootutil_sha_drop(&sha_ctx); + + return 0; +} +#endif + +/* + * Currently, we only support being able to verify one type of + * signature, because there is a single verification function that we + * call. List the type of TLV we are expecting. If we aren't + * configured for any signature, don't define this macro. + */ +#if (defined(MCUBOOT_SIGN_RSA) + \ + defined(MCUBOOT_SIGN_EC256) + \ + defined(MCUBOOT_SIGN_EC384) + \ + defined(MCUBOOT_SIGN_ED25519)) > 1 +#error "Only a single signature type is supported!" +#endif + +#if defined(MCUBOOT_SIGN_RSA) +# if MCUBOOT_SIGN_RSA_LEN == 2048 +# define EXPECTED_SIG_TLV IMAGE_TLV_RSA2048_PSS +# elif MCUBOOT_SIGN_RSA_LEN == 3072 +# define EXPECTED_SIG_TLV IMAGE_TLV_RSA3072_PSS +# else +# error "Unsupported RSA signature length" +# endif +# define SIG_BUF_SIZE (MCUBOOT_SIGN_RSA_LEN / 8) +# define EXPECTED_SIG_LEN(x) ((x) == SIG_BUF_SIZE) /* 2048 bits */ +#elif defined(MCUBOOT_SIGN_EC256) || \ + defined(MCUBOOT_SIGN_EC384) || \ + defined(MCUBOOT_SIGN_EC) +# define EXPECTED_SIG_TLV IMAGE_TLV_ECDSA_SIG +# define SIG_BUF_SIZE 128 +# define EXPECTED_SIG_LEN(x) (1) /* always true, ASN.1 will validate */ +#elif defined(MCUBOOT_SIGN_ED25519) +# define EXPECTED_SIG_TLV IMAGE_TLV_ED25519 +# define SIG_BUF_SIZE 64 +# define EXPECTED_SIG_LEN(x) ((x) == SIG_BUF_SIZE) +#else +# define SIG_BUF_SIZE 32 /* no signing, sha256 digest only */ +#endif + +#if (defined(MCUBOOT_HW_KEY) + \ + defined(MCUBOOT_BUILTIN_KEY)) > 1 +#error "Please use either MCUBOOT_HW_KEY or the MCUBOOT_BUILTIN_KEY feature." +#endif + +#ifdef EXPECTED_SIG_TLV + +#if !defined(MCUBOOT_BUILTIN_KEY) +#if !defined(MCUBOOT_HW_KEY) +/* The key TLV contains the hash of the public key. */ +# define EXPECTED_KEY_TLV IMAGE_TLV_KEYHASH +# define KEY_BUF_SIZE IMAGE_HASH_SIZE +#else +/* The key TLV contains the whole public key. + * Add a few extra bytes to the key buffer size for encoding and + * for public exponent. + */ +# define EXPECTED_KEY_TLV IMAGE_TLV_PUBKEY +# define KEY_BUF_SIZE (SIG_BUF_SIZE + 24) +#endif /* !MCUBOOT_HW_KEY */ + +#if !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) +#if !defined(MCUBOOT_HW_KEY) +static int +bootutil_find_key(uint8_t *keyhash, uint8_t keyhash_len) +{ + bootutil_sha_context sha_ctx; + int i; + const struct bootutil_key *key; + uint8_t hash[IMAGE_HASH_SIZE]; + + if (keyhash_len > IMAGE_HASH_SIZE) { + return -1; + } + + for (i = 0; i < bootutil_key_cnt; i++) { + key = &bootutil_keys[i]; + bootutil_sha_init(&sha_ctx); + bootutil_sha_update(&sha_ctx, key->key, *key->len); + bootutil_sha_finish(&sha_ctx, hash); + if (!memcmp(hash, keyhash, keyhash_len)) { + bootutil_sha_drop(&sha_ctx); + return i; + } + } + bootutil_sha_drop(&sha_ctx); + return -1; +} +#else /* !MCUBOOT_HW_KEY */ +extern unsigned int pub_key_len; +static int +bootutil_find_key(uint8_t image_index, uint8_t *key, uint16_t key_len) +{ + bootutil_sha_context sha_ctx; + uint8_t hash[IMAGE_HASH_SIZE]; + uint8_t key_hash[IMAGE_HASH_SIZE]; + size_t key_hash_size = sizeof(key_hash); + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + bootutil_sha_init(&sha_ctx); + bootutil_sha_update(&sha_ctx, key, key_len); + bootutil_sha_finish(&sha_ctx, hash); + bootutil_sha_drop(&sha_ctx); + + rc = boot_retrieve_public_key_hash(image_index, key_hash, &key_hash_size); + if (rc) { + return -1; + } + + /* Adding hardening to avoid this potential attack: + * - Image is signed with an arbitrary key and the corresponding public + * key is added as a TLV field. + * - During public key validation (comparing against key-hash read from + * HW) a fault is injected to accept the public key as valid one. + */ + FIH_CALL(boot_fih_memequal, fih_rc, hash, key_hash, key_hash_size); + if (FIH_EQ(fih_rc, FIH_SUCCESS)) { + bootutil_keys[0].key = key; + pub_key_len = key_len; + return 0; + } + + return -1; +} +#endif /* !MCUBOOT_HW_KEY */ +#endif /* !MCUBOOT_BUILTIN_KEY */ +#endif /* !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) */ +#endif /* EXPECTED_SIG_TLV */ + +/** + * Reads the value of an image's security counter. + * + * @param hdr Pointer to the image header structure. + * @param fap Pointer to a description structure of the image's + * flash area. + * @param security_cnt Pointer to store the security counter value. + * + * @return 0 on success; nonzero on failure. + */ +int32_t +bootutil_get_img_security_cnt(struct image_header *hdr, + const struct flash_area *fap, + uint32_t *img_security_cnt) +{ + struct image_tlv_iter it; + uint32_t off; + uint16_t len; + int32_t rc; + + if ((hdr == NULL) || + (fap == NULL) || + (img_security_cnt == NULL)) { + /* Invalid parameter. */ + return BOOT_EBADARGS; + } + + /* The security counter TLV is in the protected part of the TLV area. */ + if (hdr->ih_protect_tlv_size == 0) { + return BOOT_EBADIMAGE; + } + + rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_SEC_CNT, true); + if (rc) { + return rc; + } + + /* Traverse through the protected TLV area to find + * the security counter TLV. + */ + + rc = bootutil_tlv_iter_next(&it, &off, &len, NULL); + if (rc != 0) { + /* Security counter TLV has not been found. */ + return -1; + } + + if (len != sizeof(*img_security_cnt)) { + /* Security counter is not valid. */ + return BOOT_EBADIMAGE; + } + + rc = LOAD_IMAGE_DATA(hdr, fap, off, img_security_cnt, len); + if (rc != 0) { + return BOOT_EFLASH; + } + + return 0; +} + +#if defined(MCUBOOT_SIGN_PURE) +/* Returns: + * 0 -- found + * 1 -- not found or found but not true + * -1 -- failed for some reason + * + * Value of TLV does not matter, presence decides. + */ +static int bootutil_check_for_pure(const struct image_header *hdr, + const struct flash_area *fap) +{ + struct image_tlv_iter it; + uint32_t off; + uint16_t len; + int32_t rc; + + rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_SIG_PURE, false); + if (rc) { + return rc; + } + + /* Search for the TLV */ + rc = bootutil_tlv_iter_next(&it, &off, &len, NULL); + if (rc == 0 && len == 1) { + bool val; + + rc = LOAD_IMAGE_DATA(hdr, fap, off, &val, 1); + if (rc == 0) { + rc = !val; + } + } + + return rc; +} +#endif + + +#ifndef ALLOW_ROGUE_TLVS +/* + * The following list of TLVs are the only entries allowed in the unprotected + * TLV section. All other TLV entries must be in the protected section. + */ +static const uint16_t allowed_unprot_tlvs[] = { + IMAGE_TLV_KEYHASH, + IMAGE_TLV_PUBKEY, + IMAGE_TLV_SHA256, + IMAGE_TLV_SHA384, + IMAGE_TLV_SHA512, + IMAGE_TLV_RSA2048_PSS, + IMAGE_TLV_ECDSA224, + IMAGE_TLV_ECDSA_SIG, + IMAGE_TLV_RSA3072_PSS, + IMAGE_TLV_ED25519, +#if defined(MCUBOOT_SIGN_PURE) + IMAGE_TLV_SIG_PURE, +#endif + IMAGE_TLV_ENC_RSA2048, + IMAGE_TLV_ENC_KW, + IMAGE_TLV_ENC_EC256, + IMAGE_TLV_ENC_X25519, + /* Mark end with ANY. */ + IMAGE_TLV_ANY, +}; +#endif + +/* + * Verify the integrity of the image. + * Return non-zero if image could not be validated/does not validate. + */ +fih_ret +bootutil_img_validate(struct enc_key_data *enc_state, int image_index, + struct image_header *hdr, const struct flash_area *fap, + uint8_t *tmp_buf, uint32_t tmp_buf_sz, uint8_t *seed, + int seed_len, uint8_t *out_hash) +{ + uint32_t off; + uint16_t len; + uint16_t type; +#ifdef EXPECTED_SIG_TLV + FIH_DECLARE(valid_signature, FIH_FAILURE); +#ifndef MCUBOOT_BUILTIN_KEY + int key_id = -1; +#else + /* Pass a key ID equal to the image index, the underlying crypto library + * is responsible for mapping the image index to a builtin key ID. + */ + int key_id = image_index; +#endif /* !MCUBOOT_BUILTIN_KEY */ +#ifdef MCUBOOT_HW_KEY + uint8_t key_buf[KEY_BUF_SIZE]; +#endif +#endif /* EXPECTED_SIG_TLV */ + struct image_tlv_iter it; + uint8_t buf[SIG_BUF_SIZE]; +#if defined(EXPECTED_HASH_TLV) && !defined(MCUBOOT_SIGN_PURE) + int image_hash_valid = 0; + uint8_t hash[IMAGE_HASH_SIZE]; +#endif + int rc = 0; + FIH_DECLARE(fih_rc, FIH_FAILURE); +#ifdef MCUBOOT_HW_ROLLBACK_PROT + fih_int security_cnt = fih_int_encode(INT_MAX); + uint32_t img_security_cnt = 0; + FIH_DECLARE(security_counter_valid, FIH_FAILURE); +#endif + +#ifdef MCUBOOT_DECOMPRESS_IMAGES + /* If the image is compressed, the integrity of the image must also be validated */ + if (MUST_DECOMPRESS(fap, image_index, hdr)) { + bool found_decompressed_size = false; + bool found_decompressed_sha = false; + bool found_decompressed_signature = false; + + rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_ANY, true); + if (rc) { + goto out; + } + + if (it.tlv_end > bootutil_max_image_size(fap)) { + rc = -1; + goto out; + } + + while (true) { + uint16_t expected_size = 0; + bool *found_flag = NULL; + + rc = bootutil_tlv_iter_next(&it, &off, &len, &type); + if (rc < 0) { + goto out; + } else if (rc > 0) { + break; + } + + switch (type) { + case IMAGE_TLV_DECOMP_SIZE: + expected_size = sizeof(size_t); + found_flag = &found_decompressed_size; + break; + case IMAGE_TLV_DECOMP_SHA: + expected_size = IMAGE_HASH_SIZE; + found_flag = &found_decompressed_sha; + break; + case IMAGE_TLV_DECOMP_SIGNATURE: + found_flag = &found_decompressed_signature; + break; + default: + continue; + }; + + if (type == IMAGE_TLV_DECOMP_SIGNATURE && !EXPECTED_SIG_LEN(len)) { + rc = -1; + goto out; + } else if (type != IMAGE_TLV_DECOMP_SIGNATURE && len != expected_size) { + rc = -1; + goto out; + } + + *found_flag = true; + } + + rc = (!found_decompressed_size || !found_decompressed_sha || !found_decompressed_signature); + if (rc) { + goto out; + } + } +#endif + +#if defined(EXPECTED_HASH_TLV) && !defined(MCUBOOT_SIGN_PURE) + rc = bootutil_img_hash(enc_state, image_index, hdr, fap, tmp_buf, + tmp_buf_sz, hash, seed, seed_len); + if (rc) { + goto out; + } + + if (out_hash) { + memcpy(out_hash, hash, IMAGE_HASH_SIZE); + } +#endif + +#if defined(MCUBOOT_SIGN_PURE) + /* If Pure type signature is expected then it has to be there */ + rc = bootutil_check_for_pure(hdr, fap); + if (rc != 0) { + goto out; + } +#endif + + rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_ANY, false); + if (rc) { + goto out; + } + + if (it.tlv_end > bootutil_max_image_size(fap)) { + rc = -1; + goto out; + } + + /* + * Traverse through all of the TLVs, performing any checks we know + * and are able to do. + */ + while (true) { + rc = bootutil_tlv_iter_next(&it, &off, &len, &type); + if (rc < 0) { + goto out; + } else if (rc > 0) { + break; + } + +#ifndef ALLOW_ROGUE_TLVS + /* + * Ensure that the non-protected TLV only has entries necessary to hold + * the signature. We also allow encryption related keys to be in the + * unprotected area. + */ + if (!bootutil_tlv_iter_is_prot(&it, off)) { + bool found = false; + for (const uint16_t *p = allowed_unprot_tlvs; *p != IMAGE_TLV_ANY; p++) { + if (type == *p) { + found = true; + break; + } + } + if (!found) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + } +#endif + switch(type) { +#if defined(EXPECTED_HASH_TLV) && !defined(MCUBOOT_SIGN_PURE) + case EXPECTED_HASH_TLV: + { + /* Verify the image hash. This must always be present. */ + if (len != sizeof(hash)) { + rc = -1; + goto out; + } + rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, sizeof(hash)); + if (rc) { + goto out; + } + + FIH_CALL(boot_fih_memequal, fih_rc, hash, buf, sizeof(hash)); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + + image_hash_valid = 1; + break; + } +#endif /* defined(EXPECTED_HASH_TLV) && !defined(MCUBOOT_SIGN_PURE) */ +#if !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) +#ifdef EXPECTED_KEY_TLV + case EXPECTED_KEY_TLV: + { + /* + * Determine which key we should be checking. + */ + if (len > KEY_BUF_SIZE) { + rc = -1; + goto out; + } +#ifndef MCUBOOT_HW_KEY + rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, len); + if (rc) { + goto out; + } + key_id = bootutil_find_key(buf, len); +#else + rc = LOAD_IMAGE_DATA(hdr, fap, off, key_buf, len); + if (rc) { + goto out; + } + key_id = bootutil_find_key(image_index, key_buf, len); +#endif /* !MCUBOOT_HW_KEY */ + /* + * The key may not be found, which is acceptable. There + * can be multiple signatures, each preceded by a key. + */ + break; + } +#endif /* EXPECTED_KEY_TLV */ +#endif /* !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) */ +#ifdef EXPECTED_SIG_TLV + case EXPECTED_SIG_TLV: + { +#if !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) + /* Ignore this signature if it is out of bounds. */ + if (key_id < 0 || key_id >= bootutil_key_cnt) { + key_id = -1; + continue; + } +#endif /* !defined(CONFIG_BOOT_SIGNATURE_USING_KMU) */ + if (!EXPECTED_SIG_LEN(len) || len > sizeof(buf)) { + rc = -1; + goto out; + } + rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, len); + if (rc) { + goto out; + } +#ifndef MCUBOOT_SIGN_PURE + FIH_CALL(bootutil_verify_sig, valid_signature, hash, sizeof(hash), + buf, len, key_id); +#else + /* Directly check signature on the image, by using the mapping of + * a device to memory. The pointer is beginning of image in flash, + * so offset of area, the range is header + image + protected tlvs. + */ + FIH_CALL(bootutil_verify_img, valid_signature, (void *)flash_area_get_off(fap), + hdr->ih_hdr_size + hdr->ih_img_size + hdr->ih_protect_tlv_size, + buf, len, key_id); +#endif + key_id = -1; + break; + } +#endif /* EXPECTED_SIG_TLV */ +#ifdef MCUBOOT_HW_ROLLBACK_PROT + case IMAGE_TLV_SEC_CNT: + { + /* + * Verify the image's security counter. + * This must always be present. + */ + if (len != sizeof(img_security_cnt)) { + /* Security counter is not valid. */ + rc = -1; + goto out; + } + + rc = LOAD_IMAGE_DATA(hdr, fap, off, &img_security_cnt, len); + if (rc) { + goto out; + } + + FIH_CALL(boot_nv_security_counter_get, fih_rc, image_index, + &security_cnt); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + + /* Compare the new image's security counter value against the + * stored security counter value. + */ + fih_rc = fih_ret_encode_zero_equality(img_security_cnt < + (uint32_t)fih_int_decode(security_cnt)); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + + /* The image's security counter has been successfully verified. */ + security_counter_valid = fih_rc; + break; + } +#endif /* MCUBOOT_HW_ROLLBACK_PROT */ + } + } + +#if defined(EXPECTED_HASH_TLV) && !defined(MCUBOOT_SIGN_PURE) + rc = !image_hash_valid; + if (rc) { + goto out; + } +#elif defined(MCUBOOT_SIGN_PURE) + /* This returns true on EQ, rc is err on non-0 */ + rc = FIH_NOT_EQ(valid_signature, FIH_SUCCESS); +#endif +#ifdef EXPECTED_SIG_TLV + FIH_SET(fih_rc, valid_signature); +#endif +#ifdef MCUBOOT_HW_ROLLBACK_PROT + if (FIH_NOT_EQ(security_counter_valid, FIH_SUCCESS)) { + rc = -1; + goto out; + } +#endif + +#ifdef MCUBOOT_DECOMPRESS_IMAGES + /* Only after all previous verifications have passed, perform a dry-run of the decompression + * and ensure the image is valid + */ + if (!rc && MUST_DECOMPRESS(fap, image_index, hdr)) { + image_hash_valid = 0; + FIH_SET(valid_signature, FIH_FAILURE); + + rc = bootutil_img_hash_decompress(enc_state, image_index, hdr, fap, tmp_buf, tmp_buf_sz, + hash, seed, seed_len); + if (rc) { + goto out; + } + + rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_DECOMP_SHA, true); + if (rc) { + goto out; + } + + if (it.tlv_end > bootutil_max_image_size(fap)) { + rc = -1; + goto out; + } + + while (true) { + rc = bootutil_tlv_iter_next(&it, &off, &len, &type); + if (rc < 0) { + goto out; + } else if (rc > 0) { + break; + } + + if (type == IMAGE_TLV_DECOMP_SHA) { + /* Verify the image hash. This must always be present. */ + if (len != sizeof(hash)) { + rc = -1; + goto out; + } + rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, sizeof(hash)); + if (rc) { + goto out; + } + + FIH_CALL(boot_fih_memequal, fih_rc, hash, buf, sizeof(hash)); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + + image_hash_valid = 1; + } + } + + rc = !image_hash_valid; + if (rc) { + goto out; + } + +#ifdef EXPECTED_SIG_TLV +#ifdef EXPECTED_KEY_TLV + rc = bootutil_tlv_iter_begin(&it, hdr, fap, EXPECTED_KEY_TLV, false); + if (rc) { + goto out; + } + + if (it.tlv_end > bootutil_max_image_size(fap)) { + rc = -1; + goto out; + } + + while (true) { + rc = bootutil_tlv_iter_next(&it, &off, &len, &type); + if (rc < 0) { + goto out; + } else if (rc > 0) { + break; + } + + if (type == EXPECTED_KEY_TLV) { + /* + * Determine which key we should be checking. + */ + if (len > KEY_BUF_SIZE) { + rc = -1; + goto out; + } +#ifndef MCUBOOT_HW_KEY + rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, len); + if (rc) { + goto out; + } + key_id = bootutil_find_key(buf, len); +#else + rc = LOAD_IMAGE_DATA(hdr, fap, off, key_buf, len); + if (rc) { + goto out; + } + key_id = bootutil_find_key(image_index, key_buf, len); +#endif /* !MCUBOOT_HW_KEY */ + /* + * The key may not be found, which is acceptable. There + * can be multiple signatures, each preceded by a key. + */ + } + } +#endif /* EXPECTED_KEY_TLV */ + + rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_DECOMP_SIGNATURE, true); + if (rc) { + goto out; + } + + if (it.tlv_end > bootutil_max_image_size(fap)) { + rc = -1; + goto out; + } + + while (true) { + rc = bootutil_tlv_iter_next(&it, &off, &len, &type); + if (rc < 0) { + goto out; + } else if (rc > 0) { + rc = 0; + break; + } + + if (type == IMAGE_TLV_DECOMP_SIGNATURE) { + /* Ignore this signature if it is out of bounds. */ + if (key_id < 0 || key_id >= bootutil_key_cnt) { + key_id = -1; + continue; + } + + if (!EXPECTED_SIG_LEN(len) || len > sizeof(buf)) { + rc = -1; + goto out; + } + rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, len); + if (rc) { + goto out; + } + + FIH_CALL(bootutil_verify_sig, valid_signature, hash, sizeof(hash), + buf, len, key_id); + key_id = -1; + } + } +#endif /* EXPECTED_SIG_TLV */ + } +#endif + +#ifdef EXPECTED_SIG_TLV + FIH_SET(fih_rc, valid_signature); +#endif + +out: + if (rc) { + FIH_SET(fih_rc, FIH_FAILURE); + } + + FIH_RET(fih_rc); +} diff --git a/bootloader/mcuboot/boot/bootutil/src/loader.c b/bootloader/mcuboot/boot/bootutil/src/loader.c new file mode 100644 index 0000000..f35ec78 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/loader.c @@ -0,0 +1,3974 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2016-2020 Linaro LTD + * Copyright (c) 2016-2019 JUUL Labs + * Copyright (c) 2019-2023 Arm Limited + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +/** + * This file provides an interface to the boot loader. Functions defined in + * this file should only be called while the boot loader is running. + */ + +#include +#include +#include +#include +#include +#include "bootutil/bootutil.h" +#include "bootutil/bootutil_public.h" +#include "bootutil/image.h" +#include "bootutil_priv.h" +#include "swap_priv.h" +#include "bootutil/bootutil_log.h" +#include "bootutil/security_cnt.h" +#include "bootutil/boot_record.h" +#include "bootutil/fault_injection_hardening.h" +#include "bootutil/ramload.h" +#include "bootutil/boot_hooks.h" +#include "bootutil/mcuboot_status.h" + +#if defined(MCUBOOT_DECOMPRESS_IMAGES) +#include +#include +#endif + +#ifdef __ZEPHYR__ +#include +#endif + +#if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(PM_CPUNET_B0N_ADDRESS) +#include +#ifdef CONFIG_PCD_READ_NETCORE_APP_VERSION +#include +int pcd_version_cmp_net(const struct flash_area *fap, struct image_header *hdr); +#endif +#endif + +#ifdef MCUBOOT_ENC_IMAGES +#include "bootutil/enc_key.h" +#endif + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) +#include +#endif + +#include "mcuboot_config/mcuboot_config.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +static struct boot_loader_state boot_data; +#ifdef PM_S1_ADDRESS +static bool owner_nsib[BOOT_IMAGE_NUMBER] = {false}; +#endif + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) || defined(MCUBOOT_DATA_SHARING) +static struct image_max_size image_max_sizes[BOOT_IMAGE_NUMBER] = {0}; +#endif + +#if (!defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD)) || \ +defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) +#if !defined(__BOOTSIM__) +/* Used for holding static buffers in multiple functions to work around issues + * in older versions of gcc (e.g. 4.8.4) + */ +struct sector_buffer_t { + boot_sector_t primary[BOOT_IMAGE_NUMBER][BOOT_MAX_IMG_SECTORS]; + boot_sector_t secondary[BOOT_IMAGE_NUMBER][BOOT_MAX_IMG_SECTORS]; +#if MCUBOOT_SWAP_USING_SCRATCH + boot_sector_t scratch[BOOT_MAX_IMG_SECTORS]; +#endif +}; + +static struct sector_buffer_t sector_buffers; +#endif +#endif + +#if CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 && defined(MCUBOOT_OVERWRITE_ONLY) && \ + defined(MCUBOOT_DOWNGRADE_PREVENTION) +/* s0/s1 package version of the current MCUboot image */ +static const struct image_version mcuboot_s0_s1_image_version = { + .iv_major = CONFIG_MCUBOOT_MCUBOOT_S0_S1_VERSION_MAJOR, + .iv_minor = CONFIG_MCUBOOT_MCUBOOT_S0_S1_VERSION_MINOR, + .iv_revision = CONFIG_MCUBOOT_MCUBOOT_S0_S1_VERSION_REVISION, + .iv_build_num = CONFIG_MCUBOOT_MCUBOOT_S0_S1_VERSION_BUILD_NUMBER, +}; +#endif + +#if (BOOT_IMAGE_NUMBER > 1) +#define IMAGES_ITER(x) for ((x) = 0; (x) < BOOT_IMAGE_NUMBER; ++(x)) +#else +#define IMAGES_ITER(x) +#endif + +/* + * This macro allows some control on the allocation of local variables. + * When running natively on a target, we don't want to allocated huge + * variables on the stack, so make them global instead. For the simulator + * we want to run as many threads as there are tests, and it's safer + * to just make those variables stack allocated. + */ +#if !defined(__BOOTSIM__) +#define TARGET_STATIC static +#else +#define TARGET_STATIC +#endif + +#if BOOT_MAX_ALIGN > 1024 +#define BUF_SZ BOOT_MAX_ALIGN +#else +#define BUF_SZ 1024 +#endif + +#define NO_ACTIVE_SLOT UINT32_MAX + +static int +boot_read_image_headers(struct boot_loader_state *state, bool require_all, + struct boot_status *bs) +{ + int rc; + int i; + + for (i = 0; i < BOOT_NUM_SLOTS; i++) { + rc = BOOT_HOOK_CALL(boot_read_image_header_hook, BOOT_HOOK_REGULAR, + BOOT_CURR_IMG(state), i, boot_img_hdr(state, i)); + if (rc == BOOT_HOOK_REGULAR) + { + rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs); + } + if (rc != 0) { + /* If `require_all` is set, fail on any single fail, otherwise + * if at least the first slot's header was read successfully, + * then the boot loader can attempt a boot. + * + * Failure to read any headers is a fatal error. + */ +#if CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 + /* Patch needed for NCS. The primary slot of the second image + * (image 1) will not contain a valid image header until an upgrade + * of mcuboot has happened (filling S1 with the new version). + */ + if (BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER && i == 0) { + continue; + } +#endif /* CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 */ + if (i > 0 && !require_all) { + return 0; + } else { + return rc; + } + } + } + + return 0; +} + +/** + * Saves boot status and shared data for current image. + * + * @param state Boot loader status information. + * @param active_slot Index of the slot will be loaded for current image. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_add_shared_data(struct boot_loader_state *state, + uint8_t active_slot) +{ +#if defined(MCUBOOT_MEASURED_BOOT) || defined(MCUBOOT_DATA_SHARING) + int rc; + +#ifdef MCUBOOT_MEASURED_BOOT + rc = boot_save_boot_status(BOOT_CURR_IMG(state), + boot_img_hdr(state, active_slot), + BOOT_IMG_AREA(state, active_slot)); + if (rc != 0) { + BOOT_LOG_ERR("Failed to add image data to shared area"); + return rc; + } +#endif /* MCUBOOT_MEASURED_BOOT */ + +#ifdef MCUBOOT_DATA_SHARING + rc = boot_save_shared_data(boot_img_hdr(state, active_slot), + BOOT_IMG_AREA(state, active_slot), + active_slot, image_max_sizes); + if (rc != 0) { + BOOT_LOG_ERR("Failed to add data to shared memory area."); + return rc; + } +#endif /* MCUBOOT_DATA_SHARING */ + + return 0; + +#else /* MCUBOOT_MEASURED_BOOT || MCUBOOT_DATA_SHARING */ + (void) (state); + (void) (active_slot); + + return 0; +#endif +} + +/** + * Fills rsp to indicate how booting should occur. + * + * @param state Boot loader status information. + * @param rsp boot_rsp struct to fill. + */ +static void +fill_rsp(struct boot_loader_state *state, struct boot_rsp *rsp) +{ + uint32_t active_slot; + +#if (BOOT_IMAGE_NUMBER > 1) + /* Always boot from the first enabled image. */ + BOOT_CURR_IMG(state) = 0; + IMAGES_ITER(BOOT_CURR_IMG(state)) { + if (!state->img_mask[BOOT_CURR_IMG(state)]) { + break; + } + } + /* At least one image must be active, otherwise skip the execution */ + if (BOOT_CURR_IMG(state) >= BOOT_IMAGE_NUMBER) { + return; + } +#endif + +#if defined(MCUBOOT_DIRECT_XIP) || defined(MCUBOOT_RAM_LOAD) + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; +#else + active_slot = BOOT_PRIMARY_SLOT; +#endif + + rsp->br_flash_dev_id = flash_area_get_device_id(BOOT_IMG_AREA(state, active_slot)); + rsp->br_image_off = boot_img_slot_off(state, active_slot); + rsp->br_hdr = boot_img_hdr(state, active_slot); +} + +/** + * Closes all flash areas. + * + * @param state Boot loader status information. + */ +static void +close_all_flash_areas(struct boot_loader_state *state) +{ + uint32_t slot; + + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif +#if MCUBOOT_SWAP_USING_SCRATCH + flash_area_close(BOOT_SCRATCH_AREA(state)); +#endif + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + flash_area_close(BOOT_IMG_AREA(state, BOOT_NUM_SLOTS - 1 - slot)); + } + } +} + +#if (BOOT_IMAGE_NUMBER > 1) || \ + defined(MCUBOOT_DIRECT_XIP) || \ + defined(MCUBOOT_RAM_LOAD) || \ + defined(MCUBOOT_DOWNGRADE_PREVENTION) +/** + * Compare image version numbers + * + * By default, the comparison does not take build number into account. + * Enable MCUBOOT_VERSION_CMP_USE_BUILD_NUMBER to take the build number into account. + * + * @param ver1 Pointer to the first image version to compare. + * @param ver2 Pointer to the second image version to compare. + * + * @retval -1 If ver1 is less than ver2. + * @retval 0 If the image version numbers are equal. + * @retval 1 If ver1 is greater than ver2. + */ +static int +boot_version_cmp(const struct image_version *ver1, + const struct image_version *ver2) +{ + if (ver1->iv_major > ver2->iv_major) { + return 1; + } + if (ver1->iv_major < ver2->iv_major) { + return -1; + } + /* The major version numbers are equal, continue comparison. */ + if (ver1->iv_minor > ver2->iv_minor) { + return 1; + } + if (ver1->iv_minor < ver2->iv_minor) { + return -1; + } + /* The minor version numbers are equal, continue comparison. */ + if (ver1->iv_revision > ver2->iv_revision) { + return 1; + } + if (ver1->iv_revision < ver2->iv_revision) { + return -1; + } + +#if defined(MCUBOOT_VERSION_CMP_USE_BUILD_NUMBER) + /* The revisions are equal, continue comparison. */ + if (ver1->iv_build_num > ver2->iv_build_num) { + return 1; + } + if (ver1->iv_build_num < ver2->iv_build_num) { + return -1; + } +#endif + + return 0; +} +#endif + +#if (!defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD)) || \ +defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) +static int +boot_initialize_area(struct boot_loader_state *state, int flash_area) +{ + uint32_t num_sectors = BOOT_MAX_IMG_SECTORS; + boot_sector_t *out_sectors; + uint32_t *out_num_sectors; + int rc; + + num_sectors = BOOT_MAX_IMG_SECTORS; + + if (flash_area == FLASH_AREA_IMAGE_PRIMARY(BOOT_CURR_IMG(state))) { + out_sectors = BOOT_IMG(state, BOOT_PRIMARY_SLOT).sectors; + out_num_sectors = &BOOT_IMG(state, BOOT_PRIMARY_SLOT).num_sectors; + } else if (flash_area == FLASH_AREA_IMAGE_SECONDARY(BOOT_CURR_IMG(state))) { + out_sectors = BOOT_IMG(state, BOOT_SECONDARY_SLOT).sectors; + out_num_sectors = &BOOT_IMG(state, BOOT_SECONDARY_SLOT).num_sectors; +#if MCUBOOT_SWAP_USING_SCRATCH + } else if (flash_area == FLASH_AREA_IMAGE_SCRATCH) { + out_sectors = state->scratch.sectors; + out_num_sectors = &state->scratch.num_sectors; +#endif + } else { + return BOOT_EFLASH; + } + +#ifdef MCUBOOT_USE_FLASH_AREA_GET_SECTORS + rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors); +#else + _Static_assert(sizeof(int) <= sizeof(uint32_t), "Fix needed"); + rc = flash_area_to_sectors(flash_area, (int *)&num_sectors, out_sectors); +#endif /* defined(MCUBOOT_USE_FLASH_AREA_GET_SECTORS) */ + if (rc != 0) { + return rc; + } + *out_num_sectors = num_sectors; + return 0; +} +#endif + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) +static int +boot_read_sectors_recovery(struct boot_loader_state *state) +{ + uint8_t image_index; + int rc; + + image_index = BOOT_CURR_IMG(state); + + rc = boot_initialize_area(state, FLASH_AREA_IMAGE_PRIMARY(image_index)); + if (rc != 0) { + return BOOT_EFLASH; + } + + rc = boot_initialize_area(state, FLASH_AREA_IMAGE_SECONDARY(image_index)); + if (rc != 0) { + /* We need to differentiate from the primary image issue */ + return BOOT_EFLASH_SEC; + } + + return 0; +} +#endif + + +#if (BOOT_IMAGE_NUMBER > 1) + +static int +boot_verify_slot_dependencies(struct boot_loader_state *state, uint32_t slot); + +/** + * Check the image dependency whether it is satisfied and modify + * the swap type if necessary. + * + * @param dep Image dependency which has to be verified. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_verify_slot_dependency(struct boot_loader_state *state, + struct image_dependency *dep) +{ + struct image_version *dep_version; + size_t dep_slot; + int rc; + + /* Determine the source of the image which is the subject of + * the dependency and get it's version. */ +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) + uint8_t swap_type = state->swap_type[dep->image_id]; + dep_slot = BOOT_IS_UPGRADE(swap_type) ? BOOT_SECONDARY_SLOT + : BOOT_PRIMARY_SLOT; +#else + dep_slot = state->slot_usage[dep->image_id].active_slot; +#endif + + dep_version = &state->imgs[dep->image_id][dep_slot].hdr.ih_ver; + + rc = boot_version_cmp(dep_version, &dep->image_min_version); +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) + if (rc < 0) { + /* Dependency not satisfied. + * Modify the swap type to decrease the version number of the image + * (which will be located in the primary slot after the boot process), + * consequently the number of unsatisfied dependencies will be + * decreased or remain the same. + */ + switch (BOOT_SWAP_TYPE(state)) { + case BOOT_SWAP_TYPE_TEST: + case BOOT_SWAP_TYPE_PERM: + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + break; + case BOOT_SWAP_TYPE_NONE: + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_REVERT; + break; + default: + break; + } + } else { + /* Dependency satisfied. */ + rc = 0; + } +#else + if (rc >= 0) { + /* Dependency satisfied. */ + rc = 0; + } +#endif + + return rc; +} + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) +/** + * Iterate over all the images and verify whether the image dependencies in the + * TLV area are all satisfied and update the related swap type if necessary. + */ +static int +boot_verify_dependencies(struct boot_loader_state *state) +{ + int rc = -1; + uint8_t slot; + + BOOT_CURR_IMG(state) = 0; + while (BOOT_CURR_IMG(state) < BOOT_IMAGE_NUMBER) { + if (state->img_mask[BOOT_CURR_IMG(state)]) { + BOOT_CURR_IMG(state)++; + continue; + } + if (BOOT_SWAP_TYPE(state) != BOOT_SWAP_TYPE_NONE && + BOOT_SWAP_TYPE(state) != BOOT_SWAP_TYPE_FAIL) { + slot = BOOT_SECONDARY_SLOT; + } else { + slot = BOOT_PRIMARY_SLOT; + } + + rc = boot_verify_slot_dependencies(state, slot); + if (rc == 0) { + /* All dependencies've been satisfied, continue with next image. */ + BOOT_CURR_IMG(state)++; + } else if (rc == BOOT_EBADIMAGE) { + /* Cannot upgrade due to non-met dependencies, so disable all + * image upgrades. + */ + for (int idx = 0; idx < BOOT_IMAGE_NUMBER; idx++) { + BOOT_CURR_IMG(state) = idx; + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + } + break; + } else { + /* Other error happened, images are inconsistent */ + return rc; + } + } + return rc; +} +#else + +#if defined MCUBOOT_RAM_LOAD +static inline int +boot_remove_image_from_sram(struct boot_loader_state *state); +#endif + +/** + * Checks the dependency of all the active slots. If an image found with + * invalid or not satisfied dependencies the image is removed from SRAM (in + * case of MCUBOOT_RAM_LOAD strategy) and its slot is set to unavailable. + * + * @param state Boot loader status information. + * + * @return 0 if dependencies are met; nonzero otherwise. + */ +static int +boot_verify_dependencies(struct boot_loader_state *state) +{ + int rc = -1; + uint32_t active_slot; + + IMAGES_ITER(BOOT_CURR_IMG(state)) { + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + rc = boot_verify_slot_dependencies(state, active_slot); + if (rc != 0) { + /* Dependencies not met or invalid dependencies. */ + +#ifdef MCUBOOT_RAM_LOAD + boot_remove_image_from_sram(state); +#endif /* MCUBOOT_RAM_LOAD */ + + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[active_slot] = false; + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + + return rc; + } + } + + return rc; +} +#endif + +/** + * Read all dependency TLVs of an image from the flash and verify + * one after another to see if they are all satisfied. + * + * @param slot Image slot number. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_verify_slot_dependencies(struct boot_loader_state *state, uint32_t slot) +{ + const struct flash_area *fap; + struct image_tlv_iter it; + struct image_dependency dep; + uint32_t off; + uint16_t len; + int area_id; + int rc; + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + rc = bootutil_tlv_iter_begin(&it, boot_img_hdr(state, slot), fap, + IMAGE_TLV_DEPENDENCY, true); + if (rc != 0) { + goto done; + } + + while (true) { + rc = bootutil_tlv_iter_next(&it, &off, &len, NULL); + if (rc < 0) { + return -1; + } else if (rc > 0) { + rc = 0; + break; + } + + if (len != sizeof(dep)) { + rc = BOOT_EBADIMAGE; + goto done; + } + + rc = LOAD_IMAGE_DATA(boot_img_hdr(state, slot), + fap, off, &dep, len); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + if (dep.image_id >= BOOT_IMAGE_NUMBER) { + rc = BOOT_EBADARGS; + goto done; + } + + /* Verify dependency and modify the swap type if not satisfied. */ + rc = boot_verify_slot_dependency(state, &dep); + if (rc != 0) { + /* Dependency not satisfied */ + goto done; + } + } + +done: + flash_area_close(fap); + return rc; +} + +#endif /* (BOOT_IMAGE_NUMBER > 1) */ + +#if !defined(MCUBOOT_DIRECT_XIP) +/* + * Compute the total size of the given image. Includes the size of + * the TLVs. + */ +#if !defined(MCUBOOT_OVERWRITE_ONLY) || defined(MCUBOOT_OVERWRITE_ONLY_FAST) +static int +boot_read_image_size(struct boot_loader_state *state, int slot, uint32_t *size) +{ + const struct flash_area *fap; + struct image_tlv_info info; + uint32_t off; + uint32_t protect_tlv_size; + int area_id; + int rc; + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + +#ifdef MCUBOOT_DECOMPRESS_IMAGES + if (MUST_DECOMPRESS(fap, BOOT_CURR_IMG(state), boot_img_hdr(state, slot))) { + uint32_t tmp_size = 0; + + rc = bootutil_get_img_decomp_size(boot_img_hdr(state, slot), fap, &tmp_size); + + if (rc) { + rc = BOOT_EBADIMAGE; + goto done; + } + + off = boot_img_hdr(state, slot)->ih_hdr_size + tmp_size; + + rc = boot_size_protected_tlvs(boot_img_hdr(state, slot), fap, &tmp_size); + + if (rc) { + rc = BOOT_EBADIMAGE; + goto done; + } + + off += tmp_size; + + if (flash_area_read(fap, (BOOT_TLV_OFF(boot_img_hdr(state, slot)) + + boot_img_hdr(state, slot)->ih_protect_tlv_size), &info, + sizeof(info))) { + rc = BOOT_EFLASH; + goto done; + } + + if (info.it_magic != IMAGE_TLV_INFO_MAGIC) { + rc = BOOT_EBADIMAGE; + goto done; + } + + *size = off + info.it_tlv_tot; + } else { +#else + if (1) { +#endif + off = BOOT_TLV_OFF(boot_img_hdr(state, slot)); + + if (flash_area_read(fap, off, &info, sizeof(info))) { + rc = BOOT_EFLASH; + goto done; + } + + protect_tlv_size = boot_img_hdr(state, slot)->ih_protect_tlv_size; + if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) { + if (protect_tlv_size != info.it_tlv_tot) { + rc = BOOT_EBADIMAGE; + goto done; + } + + if (flash_area_read(fap, off + info.it_tlv_tot, &info, sizeof(info))) { + rc = BOOT_EFLASH; + goto done; + } + } else if (protect_tlv_size != 0) { + rc = BOOT_EBADIMAGE; + goto done; + } + + if (info.it_magic != IMAGE_TLV_INFO_MAGIC) { + rc = BOOT_EBADIMAGE; + goto done; + } + + *size = off + protect_tlv_size + info.it_tlv_tot; + } + + rc = 0; + +done: + flash_area_close(fap); + return rc; +} +#endif /* !MCUBOOT_OVERWRITE_ONLY */ + +#if !defined(MCUBOOT_RAM_LOAD) +static uint32_t +boot_write_sz(struct boot_loader_state *state) +{ + uint32_t elem_sz; +#if MCUBOOT_SWAP_USING_SCRATCH + uint32_t align; +#endif + + /* Figure out what size to write update status update as. The size depends + * on what the minimum write size is for scratch area, active image slot. + * We need to use the bigger of those 2 values. + */ + elem_sz = flash_area_align(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT)); +#if MCUBOOT_SWAP_USING_SCRATCH + align = flash_area_align(BOOT_SCRATCH_AREA(state)); + if (align > elem_sz) { + elem_sz = align; + } +#endif + + return elem_sz; +} + +/** + * Determines the sector layout of both image slots and the scratch area. + * This information is necessary for calculating the number of bytes to erase + * and copy during an image swap. The information collected during this + * function is used to populate the state. + */ +static int +boot_read_sectors(struct boot_loader_state *state) +{ + uint8_t image_index; + int rc; + + image_index = BOOT_CURR_IMG(state); + + rc = boot_initialize_area(state, FLASH_AREA_IMAGE_PRIMARY(image_index)); + if (rc != 0) { + return BOOT_EFLASH; + } + + rc = boot_initialize_area(state, FLASH_AREA_IMAGE_SECONDARY(image_index)); + if (rc != 0) { + /* We need to differentiate from the primary image issue */ + return BOOT_EFLASH_SEC; + } + +#if MCUBOOT_SWAP_USING_SCRATCH + rc = boot_initialize_area(state, FLASH_AREA_IMAGE_SCRATCH); + if (rc != 0) { + return BOOT_EFLASH; + } +#endif + + BOOT_WRITE_SZ(state) = boot_write_sz(state); + + return 0; +} + +void +boot_status_reset(struct boot_status *bs) +{ +#ifdef MCUBOOT_ENC_IMAGES + memset(&bs->enckey, 0xff, BOOT_NUM_SLOTS * BOOT_ENC_KEY_ALIGN_SIZE); +#if MCUBOOT_SWAP_SAVE_ENCTLV + memset(&bs->enctlv, 0xff, BOOT_NUM_SLOTS * BOOT_ENC_TLV_ALIGN_SIZE); +#endif +#endif /* MCUBOOT_ENC_IMAGES */ + + bs->use_scratch = 0; + bs->swap_size = 0; + bs->source = 0; + + bs->op = BOOT_STATUS_OP_MOVE; + bs->idx = BOOT_STATUS_IDX_0; + bs->state = BOOT_STATUS_STATE_0; + bs->swap_type = BOOT_SWAP_TYPE_NONE; +} + +bool +boot_status_is_reset(const struct boot_status *bs) +{ + return (bs->op == BOOT_STATUS_OP_MOVE && + bs->idx == BOOT_STATUS_IDX_0 && + bs->state == BOOT_STATUS_STATE_0); +} + +/** + * Writes the supplied boot status to the flash file system. The boot status + * contains the current state of an in-progress image copy operation. + * + * @param bs The boot status to write. + * + * @return 0 on success; nonzero on failure. + */ +int +boot_write_status(const struct boot_loader_state *state, struct boot_status *bs) +{ + const struct flash_area *fap; + uint32_t off; + int area_id; + int rc = 0; + uint8_t buf[BOOT_MAX_ALIGN]; + uint32_t align; + uint8_t erased_val; + + /* NOTE: The first sector copied (that is the last sector on slot) contains + * the trailer. Since in the last step the primary slot is erased, the + * first two status writes go to the scratch which will be copied to + * the primary slot! + */ + +#if MCUBOOT_SWAP_USING_SCRATCH + if (bs->use_scratch) { + /* Write to scratch. */ + area_id = FLASH_AREA_IMAGE_SCRATCH; + } else { +#endif + /* Write to the primary slot. */ + area_id = FLASH_AREA_IMAGE_PRIMARY(BOOT_CURR_IMG(state)); +#if MCUBOOT_SWAP_USING_SCRATCH + } +#endif + + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + return BOOT_EFLASH; + } + + off = boot_status_off(fap) + + boot_status_internal_off(bs, BOOT_WRITE_SZ(state)); + align = flash_area_align(fap); + erased_val = flash_area_erased_val(fap); + memset(buf, erased_val, BOOT_MAX_ALIGN); + buf[0] = bs->state; + + BOOT_LOG_DBG("writing swap status; fa_id=%d off=0x%lx (0x%lx)", + flash_area_get_id(fap), (unsigned long)off, + (unsigned long)flash_area_get_off(fap) + off); + + rc = flash_area_write(fap, off, buf, align); + if (rc != 0) { + rc = BOOT_EFLASH; + } + + flash_area_close(fap); + + return rc; +} +#endif /* !MCUBOOT_RAM_LOAD */ +#endif /* !MCUBOOT_DIRECT_XIP */ + +/* + * Validate image hash/signature and optionally the security counter in a slot. + */ +static fih_ret +boot_image_check(struct boot_loader_state *state, struct image_header *hdr, + const struct flash_area *fap, struct boot_status *bs) +{ + TARGET_STATIC uint8_t tmpbuf[BOOT_TMPBUF_SZ]; + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + (void)bs; + (void)rc; + +/* In the case of ram loading the image has already been decrypted as it is + * decrypted when copied in ram */ +#if defined(MCUBOOT_ENC_IMAGES) && !defined(MCUBOOT_RAM_LOAD) + if (MUST_DECRYPT(fap, BOOT_CURR_IMG(state), hdr)) { + rc = boot_enc_load(BOOT_CURR_ENC(state), 1, hdr, fap, bs); + if (rc < 0) { + FIH_RET(fih_rc); + } + if (rc == 0 && boot_enc_set_key(BOOT_CURR_ENC(state), 1, bs)) { + FIH_RET(fih_rc); + } + } +#endif + + FIH_CALL(bootutil_img_validate, fih_rc, BOOT_CURR_ENC(state), + BOOT_CURR_IMG(state), hdr, fap, tmpbuf, BOOT_TMPBUF_SZ, + NULL, 0, NULL); + + FIH_RET(fih_rc); +} + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) +static fih_ret +split_image_check(struct image_header *app_hdr, + const struct flash_area *app_fap, + struct image_header *loader_hdr, + const struct flash_area *loader_fap) +{ + static void *tmpbuf; + uint8_t loader_hash[32]; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + if (!tmpbuf) { + tmpbuf = malloc(BOOT_TMPBUF_SZ); + if (!tmpbuf) { + goto out; + } + } + + FIH_CALL(bootutil_img_validate, fih_rc, NULL, 0, loader_hdr, loader_fap, + tmpbuf, BOOT_TMPBUF_SZ, NULL, 0, loader_hash); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_RET(fih_rc); + } + + FIH_CALL(bootutil_img_validate, fih_rc, NULL, 0, app_hdr, app_fap, + tmpbuf, BOOT_TMPBUF_SZ, loader_hash, 32, NULL); + +out: + FIH_RET(fih_rc); +} +#endif /* !MCUBOOT_DIRECT_XIP && !MCUBOOT_RAM_LOAD */ + +/* + * Check that this is a valid header. Valid means that the magic is + * correct, and that the sizes/offsets are "sane". Sane means that + * there is no overflow on the arithmetic, and that the result fits + * within the flash area we are in. Also check the flags in the image + * and class the image as invalid if flags for encryption/compression + * are present but these features are not enabled. + */ +static bool +boot_is_header_valid(const struct image_header *hdr, const struct flash_area *fap, + struct boot_loader_state *state) +{ + uint32_t size; + + (void)state; + + if (hdr->ih_magic != IMAGE_MAGIC) { + return false; + } + + if (!boot_u32_safe_add(&size, hdr->ih_img_size, hdr->ih_hdr_size)) { + return false; + } + +#ifdef MCUBOOT_DECOMPRESS_IMAGES + if (!MUST_DECOMPRESS(fap, BOOT_CURR_IMG(state), hdr)) { +#else + if (1) { +#endif + if (!boot_u32_safe_add(&size, size, hdr->ih_protect_tlv_size)) { + return false; + } + } + + if (size >= flash_area_get_size(fap)) { + return false; + } + +#if !defined(MCUBOOT_ENC_IMAGES) + if (IS_ENCRYPTED(hdr)) { + return false; + } +#else + if ((hdr->ih_flags & IMAGE_F_ENCRYPTED_AES128) && + (hdr->ih_flags & IMAGE_F_ENCRYPTED_AES256)) + { + return false; + } +#endif + +#if !defined(MCUBOOT_DECOMPRESS_IMAGES) + if (IS_COMPRESSED(hdr)) { + return false; + } +#else + if (MUST_DECOMPRESS(fap, BOOT_CURR_IMG(state), hdr)) { + if (!boot_is_compressed_header_valid(hdr, fap, state)) { + return false; + } + } +#endif + + return true; +} + +/* + * Check that a memory area consists of a given value. + */ +static inline bool +boot_data_is_set_to(uint8_t val, void *data, size_t len) +{ + uint8_t i; + uint8_t *p = (uint8_t *)data; + for (i = 0; i < len; i++) { + if (val != p[i]) { + return false; + } + } + return true; +} + +static int +boot_check_header_erased(struct boot_loader_state *state, int slot) +{ + const struct flash_area *fap; + struct image_header *hdr; + uint8_t erased_val; + int area_id; + int rc; + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + return -1; + } + + erased_val = flash_area_erased_val(fap); + flash_area_close(fap); + + hdr = boot_img_hdr(state, slot); + if (!boot_data_is_set_to(erased_val, &hdr->ih_magic, sizeof(hdr->ih_magic))) { + return -1; + } + + return 0; +} + +#if defined(MCUBOOT_DIRECT_XIP) +/** + * Check if image in slot has been set with specific ROM address to run from + * and whether the slot starts at that address. + * + * @returns 0 if IMAGE_F_ROM_FIXED flag is not set; + * 0 if IMAGE_F_ROM_FIXED flag is set and ROM address specified in + * header matches the slot address; + * 1 if IMF_F_ROM_FIXED flag is set but ROM address specified in header + * does not match the slot address. + */ +static bool +boot_rom_address_check(struct boot_loader_state *state) +{ + uint32_t active_slot; + const struct image_header *hdr; + uint32_t f_off; + + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + hdr = boot_img_hdr(state, active_slot); + f_off = boot_img_slot_off(state, active_slot); + + if (hdr->ih_flags & IMAGE_F_ROM_FIXED && hdr->ih_load_addr != f_off) { + BOOT_LOG_WRN("Image in %s slot at 0x%x has been built for offset 0x%x"\ + ", skipping", + active_slot == 0 ? "primary" : "secondary", f_off, + hdr->ih_load_addr); + + /* If there is address mismatch, the image is not bootable from this + * slot. + */ + return 1; + } + return 0; +} +#endif + +/* + * Check that there is a valid image in a slot + * + * @returns + * FIH_SUCCESS if image was successfully validated + * FIH_NO_BOOTABLE_IMAGE if no bootloable image was found + * FIH_FAILURE on any errors + */ +static fih_ret +boot_validate_slot(struct boot_loader_state *state, int slot, + struct boot_status *bs) +{ + const struct flash_area *fap; + struct image_header *hdr; + int area_id; + FIH_DECLARE(fih_rc, FIH_FAILURE); + int rc; + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + FIH_RET(fih_rc); + } + + hdr = boot_img_hdr(state, slot); + if (boot_check_header_erased(state, slot) == 0 || + (hdr->ih_flags & IMAGE_F_NON_BOOTABLE)) { + +#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE) + /* + * This fixes an issue where an image might be erased, but a trailer + * be left behind. It can happen if the image is in the secondary slot + * and did not pass validation, in which case the whole slot is erased. + * If during the erase operation, a reset occurs, parts of the slot + * might have been erased while some did not. The concerning part is + * the trailer because it might disable a new image from being loaded + * through mcumgr; so we just get rid of the trailer here, if the header + * is erased. + */ + if (slot != BOOT_PRIMARY_SLOT) { + swap_erase_trailer_sectors(state, fap); + } +#endif + + /* No bootable image in slot; continue booting from the primary slot. */ + fih_rc = FIH_NO_BOOTABLE_IMAGE; + goto out; + } + +#if defined(MCUBOOT_OVERWRITE_ONLY) && defined(MCUBOOT_DOWNGRADE_PREVENTION) + if (slot != BOOT_PRIMARY_SLOT) { + /* Check if version of secondary slot is sufficient */ + +#if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(CONFIG_NRF53_MULTI_IMAGE_UPDATE) \ + && defined(CONFIG_PCD_APP) && defined(CONFIG_PCD_READ_NETCORE_APP_VERSION) + if (BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_NETWORK_CORE_IMAGE_NUMBER) { + rc = pcd_version_cmp_net(fap, boot_img_hdr(state, BOOT_SECONDARY_SLOT)); + } else { + rc = boot_version_cmp( + &boot_img_hdr(state, BOOT_SECONDARY_SLOT)->ih_ver, + &boot_img_hdr(state, BOOT_PRIMARY_SLOT)->ih_ver); + +#if CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 + if (rc >= 0 && BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER) { + /* Also check the new version of MCUboot against that of the current s0/s1 MCUboot + * trailer version to prevent downgrades + */ + int version_check; + + version_check = boot_version_cmp(&boot_img_hdr(state, BOOT_SECONDARY_SLOT)->ih_ver, + &mcuboot_s0_s1_image_version); + + /* Only update rc if the currently running version is newer */ + if (version_check < rc) { + rc = version_check; + } + } +#endif + } +#else + rc = boot_version_cmp( + &boot_img_hdr(state, BOOT_SECONDARY_SLOT)->ih_ver, + &boot_img_hdr(state, BOOT_PRIMARY_SLOT)->ih_ver); + +#if CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 + if (rc >= 0 && BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER) { + /* Also check the new version of MCUboot against that of the current s0/s1 MCUboot + * trailer version to prevent downgrades + */ + int version_check; + + version_check = boot_version_cmp(&boot_img_hdr(state, BOOT_SECONDARY_SLOT)->ih_ver, + &mcuboot_s0_s1_image_version); + + /* Only update rc if the currently running version is newer */ + if (version_check < rc) { + rc = version_check; + } + } +#endif +#endif + if (rc < 0 && boot_check_header_erased(state, BOOT_PRIMARY_SLOT)) { + BOOT_LOG_ERR("insufficient version in secondary slot"); + flash_area_erase(fap, 0, flash_area_get_size(fap)); + /* Image in the secondary slot does not satisfy version requirement. + * Erase the image and continue booting from the primary slot. + */ + fih_rc = FIH_NO_BOOTABLE_IMAGE; + goto out; + } + } +#endif + if (!boot_is_header_valid(hdr, fap, state)) { + fih_rc = FIH_FAILURE; + } else { + BOOT_HOOK_CALL_FIH(boot_image_check_hook, FIH_BOOT_HOOK_REGULAR, + fih_rc, BOOT_CURR_IMG(state), slot); + if (FIH_EQ(fih_rc, FIH_BOOT_HOOK_REGULAR)) { + FIH_CALL(boot_image_check, fih_rc, state, hdr, fap, bs); + } + } + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + if ((slot != BOOT_PRIMARY_SLOT) || ARE_SLOTS_EQUIVALENT()) { + flash_area_erase(fap, 0, flash_area_get_size(fap)); + /* Image is invalid, erase it to prevent further unnecessary + * attempts to validate and boot it. + */ + } + +#if !defined(__BOOTSIM__) + BOOT_LOG_ERR("Image in the %s slot is not valid!", + (slot == BOOT_PRIMARY_SLOT) ? "primary" : "secondary"); +#endif + fih_rc = FIH_NO_BOOTABLE_IMAGE; + goto out; + } + +#if MCUBOOT_IMAGE_NUMBER > 1 && !defined(MCUBOOT_ENC_IMAGES) && defined(MCUBOOT_VERIFY_IMG_ADDRESS) + /* Verify that the image in the secondary slot has a reset address + * located in the primary slot. This is done to avoid users incorrectly + * overwriting an application written to the incorrect slot. + * This feature is only supported by ARM platforms. + */ +#if MCUBOOT_IMAGE_NUMBER >= 3 + /* Currently the MCUboot can be configured for up to 3 image, where image number 2 is + * designated for XIP, where it is the second part of image stored in slots of image + * 0. This part of image is not bootable, as the XIP setup is done by the app in + * image 0 slot, and it does not carry the reset vector. + */ + if (area_id == FLASH_AREA_IMAGE_SECONDARY(2)) { + goto out; + } +#endif + if (area_id == FLASH_AREA_IMAGE_SECONDARY(BOOT_CURR_IMG(state))) { + const struct flash_area *pri_fa = BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT); + struct image_header *secondary_hdr = boot_img_hdr(state, slot); + uint32_t reset_value = 0; + uint32_t reset_addr = secondary_hdr->ih_hdr_size + sizeof(reset_value); + uint32_t min_addr, max_addr; + bool check_addresses = false; + + rc = flash_area_read(fap, reset_addr, &reset_value, sizeof(reset_value)); + if (rc != 0) { + fih_rc = FIH_NO_BOOTABLE_IMAGE; + goto out; + } + +#ifdef PM_CPUNET_APP_ADDRESS + /* The primary slot for the network core is emulated in RAM. + * Its flash_area hasn't got relevant boundaries. + * Therfore need to override its boundaries for the check. + */ + if (BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_NETWORK_CORE_IMAGE_NUMBER) { + min_addr = PM_CPUNET_APP_ADDRESS; + max_addr = PM_CPUNET_APP_ADDRESS + PM_CPUNET_APP_SIZE; + check_addresses = true; + } else +#endif +#if CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 + if (BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER) { +#if (CONFIG_NCS_IS_VARIANT_IMAGE) + min_addr = PM_S0_ADDRESS; + max_addr = (PM_S0_ADDRESS + PM_S0_SIZE); +#else + min_addr = PM_S1_ADDRESS; + max_addr = (PM_S1_ADDRESS + PM_S1_SIZE); +#endif + check_addresses = true; + } else +#endif + if (BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_APPLICATION_IMAGE_NUMBER) { +#if CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 +#if (CONFIG_NCS_IS_VARIANT_IMAGE) + min_addr = MIN(pri_fa->fa_off, PM_S0_ADDRESS); + max_addr = MAX((pri_fa->fa_off + pri_fa->fa_size), (PM_S0_ADDRESS + PM_S0_SIZE)); +#else + min_addr = MIN(pri_fa->fa_off, PM_S1_ADDRESS); + max_addr = MAX((pri_fa->fa_off + pri_fa->fa_size), (PM_S1_ADDRESS + PM_S1_SIZE)); +#endif +#else + min_addr = pri_fa->fa_off; + max_addr = pri_fa->fa_off + pri_fa->fa_size; +#endif + check_addresses = true; + } + + if (check_addresses == true && (reset_value < min_addr || reset_value > max_addr)) { + BOOT_LOG_ERR("Reset address of image in secondary slot is not in the primary slot"); + BOOT_LOG_ERR("Erasing image from secondary slot"); + + /* The vector table in the image located in the secondary + * slot does not target the primary slot. This might + * indicate that the image was loaded to the wrong slot. + * + * Erase the image and continue booting from the primary slot. + */ + flash_area_erase(fap, 0, fap->fa_size); + fih_rc = FIH_NO_BOOTABLE_IMAGE; + goto out; + } + } +#endif + +out: + flash_area_close(fap); + + FIH_RET(fih_rc); +} + +#ifdef MCUBOOT_HW_ROLLBACK_PROT +/** + * Updates the stored security counter value with the image's security counter + * value which resides in the given slot, only if it's greater than the stored + * value. + * + * @param image_index Index of the image to determine which security + * counter to update. + * @param slot Slot number of the image. + * @param hdr Pointer to the image header structure of the image + * that is currently stored in the given slot. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_update_security_counter(uint8_t image_index, int slot, + struct image_header *hdr) +{ + const struct flash_area *fap = NULL; + uint32_t img_security_cnt; + int rc; + + rc = flash_area_open(flash_area_id_from_multi_image_slot(image_index, slot), + &fap); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + rc = bootutil_get_img_security_cnt(hdr, fap, &img_security_cnt); + if (rc != 0) { + goto done; + } + + rc = boot_nv_security_counter_update(image_index, img_security_cnt); + if (rc != 0) { + goto done; + } + +done: + flash_area_close(fap); + return rc; +} +#endif /* MCUBOOT_HW_ROLLBACK_PROT */ + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) + +#if defined(CONFIG_MCUBOOT_CLEANUP_UNUSABLE_SECONDARY) &&\ +(defined(PM_S1_ADDRESS) || defined(CONFIG_SOC_NRF5340_CPUAPP)) + +#define SEC_SLOT_VIRGIN 0 +#define SEC_SLOT_TOUCHED 1 +#define SEC_SLOT_ASSIGNED 2 + +static uint8_t sec_slot_assignmnet[MCUBOOT_IMAGE_NUMBER] = {0}; + +static inline void sec_slot_touch(struct boot_loader_state *state) +{ +#if CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 + if (BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER) { + if (sec_slot_assignmnet[CONFIG_MCUBOOT_APPLICATION_IMAGE_NUMBER] == SEC_SLOT_VIRGIN) { + sec_slot_assignmnet[CONFIG_MCUBOOT_APPLICATION_IMAGE_NUMBER] = SEC_SLOT_TOUCHED; + } + } else if (BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_APPLICATION_IMAGE_NUMBER) { + if (sec_slot_assignmnet[CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER] == SEC_SLOT_VIRGIN) { + sec_slot_assignmnet[CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER] = SEC_SLOT_TOUCHED; + } + } +#endif + + if (sec_slot_assignmnet[BOOT_CURR_IMG(state)] == SEC_SLOT_VIRGIN) { + sec_slot_assignmnet[BOOT_CURR_IMG(state)] = SEC_SLOT_TOUCHED; + } +} + +static inline void sec_slot_mark_assigned(struct boot_loader_state *state) +{ +#if CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 + if (BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER) { + sec_slot_assignmnet[CONFIG_MCUBOOT_APPLICATION_IMAGE_NUMBER] = SEC_SLOT_ASSIGNED; + } else if (BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_APPLICATION_IMAGE_NUMBER) { + sec_slot_assignmnet[CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER] = SEC_SLOT_ASSIGNED; + } +#endif + + sec_slot_assignmnet[BOOT_CURR_IMG(state)] = SEC_SLOT_ASSIGNED; +} + +/** + * Cleanup up all secondary slot which couldn't be assigned to any primary slot. + * + * This function erases content of each secondary slot which contains valid + * header but couldn't be assigned to any of supported primary images. + * + * This function is supposed to be called after boot_validated_swap_type() + * iterates over all the images in context_boot_go(). + */ +static void sec_slot_cleanup_if_unusable(void) +{ + uint8_t idx; + + for (idx = 0; idx < MCUBOOT_IMAGE_NUMBER; idx++) { + if (SEC_SLOT_TOUCHED == sec_slot_assignmnet[idx]) { + const struct flash_area *secondary_fa; + int rc; + + rc = flash_area_open(flash_area_id_from_multi_image_slot(idx, BOOT_SECONDARY_SLOT), + &secondary_fa); + if (!rc) { + rc = flash_area_erase(secondary_fa, 0, secondary_fa->fa_size); + if (!rc) { + BOOT_LOG_ERR("Cleaned-up secondary slot of image %d", idx); + } + } + + if (rc) { + BOOT_LOG_ERR("Failed to clean-up secondary slot of image %d: %d", idx, rc); + } + } + } +} +#else +static inline void sec_slot_touch(struct boot_loader_state *state) +{ +} +static inline void sec_slot_mark_assigned(struct boot_loader_state *state) +{ +} +static inline void sec_slot_cleanup_if_unusable(void) +{ +} +#endif /* defined(CONFIG_MCUBOOT_CLEANUP_UNUSABLE_SECONDARY) &&\ + defined(PM_S1_ADDRESS) || defined(CONFIG_SOC_NRF5340_CPUAPP) */ + +/** + * Determines which swap operation to perform, if any. If it is determined + * that a swap operation is required, the image in the secondary slot is checked + * for validity. If the image in the secondary slot is invalid, it is erased, + * and a swap type of "none" is indicated. + * + * @return The type of swap to perform (BOOT_SWAP_TYPE...) + */ +static int +boot_validated_swap_type(struct boot_loader_state *state, + struct boot_status *bs) +{ + int swap_type; + FIH_DECLARE(fih_rc, FIH_FAILURE); + bool upgrade_valid = false; +#if defined(PM_S1_ADDRESS) + owner_nsib[BOOT_CURR_IMG(state)] = false; +#endif + +#if defined(PM_S1_ADDRESS) || defined(PM_CPUNET_B0N_ADDRESS) + const struct flash_area *secondary_fa = + BOOT_IMG_AREA(state, BOOT_SECONDARY_SLOT); + struct image_header *hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT); + uint32_t reset_addr = 0; + int rc = 0; + /* Patch needed for NCS. Since image 0 (the app) and image 1 (the other + * B1 slot S0 or S1) share the same secondary slot, we need to check + * whether the update candidate in the secondary slot is intended for + * image 0 or image 1 primary by looking at the address of the reset + * vector. Note that there are good reasons for not using img_num from + * the swap info. + */ + + if (hdr->ih_magic == IMAGE_MAGIC) { + rc = flash_area_read(secondary_fa, hdr->ih_hdr_size + + sizeof(uint32_t), &reset_addr, + sizeof(reset_addr)); + if (rc != 0) { + return BOOT_SWAP_TYPE_FAIL; + } + + sec_slot_touch(state); + +#ifdef PM_S1_ADDRESS +#ifdef PM_CPUNET_B0N_ADDRESS + if(!(reset_addr >= PM_CPUNET_APP_ADDRESS && reset_addr < PM_CPUNET_APP_END_ADDRESS)) +#endif + { + const struct flash_area *primary_fa; + rc = flash_area_open(flash_area_id_from_multi_image_slot( + BOOT_CURR_IMG(state), BOOT_PRIMARY_SLOT), + &primary_fa); + if (rc != 0) { + return BOOT_SWAP_TYPE_FAIL; + } + + /* Check start and end of primary slot for current image */ +#if (CONFIG_NCS_IS_VARIANT_IMAGE) + if (reset_addr >= PM_S0_ADDRESS && reset_addr <= (PM_S0_ADDRESS + PM_S0_SIZE)) { +#else + if (reset_addr >= PM_S1_ADDRESS && reset_addr <= (PM_S1_ADDRESS + PM_S1_SIZE)) { +#endif + if (BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_APPLICATION_IMAGE_NUMBER) { + /* This is not the s0/s1 upgrade image but the application image, pretend + * there is no image so the NSIB update can be loaded + */ + return BOOT_SWAP_TYPE_NONE; + } + + owner_nsib[BOOT_CURR_IMG(state)] = true; +#if (CONFIG_NCS_IS_VARIANT_IMAGE) + } else if (reset_addr >= PM_S1_ADDRESS && reset_addr <= (PM_S1_ADDRESS + PM_S1_SIZE)) { +#else + } else if (reset_addr >= PM_S0_ADDRESS && reset_addr <= (PM_S0_ADDRESS + PM_S0_SIZE)) { +#endif + /* NSIB upgrade but for the wrong slot, must be erased */ + BOOT_LOG_ERR("Image in slot is for wrong s0/s1 image"); + flash_area_erase(secondary_fa, 0, secondary_fa->fa_size); + return BOOT_SWAP_TYPE_FAIL; + } else if (reset_addr < primary_fa->fa_off || reset_addr > (primary_fa->fa_off + primary_fa->fa_size)) { + /* The image in the secondary slot is not intended for any */ + return BOOT_SWAP_TYPE_NONE; + } + + if ((primary_fa->fa_off == PM_S0_ADDRESS) || (primary_fa->fa_off == PM_S1_ADDRESS)) { + owner_nsib[BOOT_CURR_IMG(state)] = true; + } + } +#endif /* PM_S1_ADDRESS */ + sec_slot_mark_assigned(state); + } + +#endif /* PM_S1_ADDRESS || PM_CPUNET_B0N_ADDRESS */ + + swap_type = boot_swap_type_multi(BOOT_CURR_IMG(state)); + if (BOOT_IS_UPGRADE(swap_type)) { + /* Boot loader wants to switch to the secondary slot. + * Ensure image is valid. + */ + FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_SECONDARY_SLOT, bs); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + if (FIH_EQ(fih_rc, FIH_NO_BOOTABLE_IMAGE)) { + swap_type = BOOT_SWAP_TYPE_NONE; + } else { + swap_type = BOOT_SWAP_TYPE_FAIL; + } + } else { + upgrade_valid = true; + } + +#if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(PM_CPUNET_B0N_ADDRESS) \ + && !defined(CONFIG_NRF53_MULTI_IMAGE_UPDATE) && defined(CONFIG_PCD_APP) + /* If the update is valid, and it targets the network core: perform the + * update and indicate to the caller of this function that no update is + * available + */ + if (upgrade_valid && reset_addr >= PM_CPUNET_APP_ADDRESS && + reset_addr < PM_CPUNET_APP_END_ADDRESS) { + struct image_header *hdr = (struct image_header *)secondary_fa->fa_off; + uint32_t vtable_addr = (uint32_t)hdr + hdr->ih_hdr_size; + uint32_t *net_core_fw_addr = (uint32_t *)(vtable_addr); + uint32_t fw_size = hdr->ih_img_size; + BOOT_LOG_INF("Starting network core update"); + rc = pcd_network_core_update(net_core_fw_addr, fw_size); + + if (rc != 0) { + swap_type = BOOT_SWAP_TYPE_FAIL; + } else { + BOOT_LOG_INF("Done updating network core"); +#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE) + /* swap_erase_trailer_sectors is undefined if upgrade only + * method is used. There is no need to erase sectors, because + * the image cannot be reverted. + */ + rc = swap_erase_trailer_sectors(state, + secondary_fa); +#endif + swap_type = BOOT_SWAP_TYPE_NONE; + } + } +#endif /* CONFIG_SOC_NRF5340_CPUAPP && PM_CPUNET_B0N_ADDRESS && + !CONFIG_NRF53_MULTI_IMAGE_UPDATE && CONFIG_PCD_APP */ + } + + return swap_type; +} +#endif + +/** + * Erases a region of flash. + * + * @param flash_area The flash_area containing the region to erase. + * @param off The offset within the flash area to start the + * erase. + * @param sz The number of bytes to erase. + * + * @return 0 on success; nonzero on failure. + */ +int +boot_erase_region(const struct flash_area *fap, uint32_t off, uint32_t sz) +{ + return flash_area_erase(fap, off, sz); +} + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) + +#if defined(MCUBOOT_ENC_IMAGES) || defined(MCUBOOT_SWAP_SAVE_ENCTLV) +/* Replacement for memset(p, 0, sizeof(*p) that does not get + * optimized out. + */ +static void like_mbedtls_zeroize(void *p, size_t n) +{ + volatile unsigned char *v = (unsigned char *)p; + + for (size_t i = 0; i < n; i++) { + v[i] = 0; + } +} +#endif + +/** + * Copies the contents of one flash region to another. You must erase the + * destination region prior to calling this function. + * + * @param flash_area_id_src The ID of the source flash area. + * @param flash_area_id_dst The ID of the destination flash area. + * @param off_src The offset within the source flash area to + * copy from. + * @param off_dst The offset within the destination flash area to + * copy to. + * @param sz The number of bytes to copy. + * + * @return 0 on success; nonzero on failure. + */ +int +boot_copy_region(struct boot_loader_state *state, + const struct flash_area *fap_src, + const struct flash_area *fap_dst, + uint32_t off_src, uint32_t off_dst, uint32_t sz) +{ + uint32_t bytes_copied; + int chunk_sz; + int rc; +#ifdef MCUBOOT_ENC_IMAGES + uint32_t off = off_dst; + uint32_t tlv_off; + size_t blk_off; + struct image_header *hdr; + uint16_t idx; + uint32_t blk_sz; + uint8_t image_index = BOOT_CURR_IMG(state); + bool encrypted_src; + bool encrypted_dst; + /* Assuming the secondary slot is source; note that 0 here not only + * means that primary slot is source, but also that there will be + * encryption happening, if it is 1 then there is decryption from + * secondary slot. + */ + int source_slot = 1; + /* In case of encryption enabled, we may have to do more work than + * just copy bytes */ + bool only_copy = false; +#else + (void)state; +#endif +#ifdef MCUBOOT_DECOMPRESS_IMAGES + struct image_header *hdr; +#endif + + TARGET_STATIC uint8_t buf[BUF_SZ] __attribute__((aligned(4))); + +#ifdef MCUBOOT_ENC_IMAGES + encrypted_src = (flash_area_get_id(fap_src) != FLASH_AREA_IMAGE_PRIMARY(image_index)); + encrypted_dst = (flash_area_get_id(fap_dst) != FLASH_AREA_IMAGE_PRIMARY(image_index)); + + if (encrypted_src != encrypted_dst) { + if (encrypted_dst) { + /* Need encryption, metadata from the primary slot */ + hdr = boot_img_hdr(state, BOOT_PRIMARY_SLOT); + source_slot = 0; + } else { + /* Need decryption, metadata from the secondary slot */ + hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT); + source_slot = 1; + } + } else { + /* In case when source and targe is the same area, this means that we + * only have to copy bytes, no encryption or decryption. + */ + only_copy = true; + } +#endif + +#ifdef MCUBOOT_DECOMPRESS_IMAGES + hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT); + + if (MUST_DECOMPRESS(fap_src, BOOT_CURR_IMG(state), hdr)) { + /* Use alternative function for compressed images */ + return boot_copy_region_decompress(state, fap_src, fap_dst, off_src, off_dst, sz, buf, + BUF_SZ); + } +#endif + + bytes_copied = 0; + while (bytes_copied < sz) { + if (sz - bytes_copied > sizeof buf) { + chunk_sz = sizeof buf; + } else { + chunk_sz = sz - bytes_copied; + } + + rc = flash_area_read(fap_src, off_src + bytes_copied, buf, chunk_sz); + if (rc != 0) { + return BOOT_EFLASH; + } + +#ifdef MCUBOOT_ENC_IMAGES + /* If only copy, then does not matter if header indicates need for + * encryptio/decryptio, we just copy data. */ + if (!only_copy && IS_ENCRYPTED(hdr)) { + uint32_t abs_off = off + bytes_copied; + if (abs_off < hdr->ih_hdr_size) { + /* do not decrypt header */ + if (abs_off + chunk_sz > hdr->ih_hdr_size) { + /* The lower part of the chunk contains header data */ + blk_off = 0; + blk_sz = chunk_sz - (hdr->ih_hdr_size - abs_off); + idx = hdr->ih_hdr_size - abs_off; + } else { + /* The chunk contains exclusively header data */ + blk_sz = 0; /* nothing to decrypt */ + } + } else { + idx = 0; + blk_sz = chunk_sz; + blk_off = (abs_off - hdr->ih_hdr_size) & 0xf; + } + + if (blk_sz > 0) + { + tlv_off = BOOT_TLV_OFF(hdr); + if (abs_off + chunk_sz > tlv_off) { + /* do not decrypt TLVs */ + if (abs_off >= tlv_off) { + blk_sz = 0; + } else { + blk_sz = tlv_off - abs_off; + } + } + if (source_slot == 0) { + boot_enc_encrypt(BOOT_CURR_ENC(state), source_slot, + (abs_off + idx) - hdr->ih_hdr_size, blk_sz, + blk_off, &buf[idx]); + } else { + boot_enc_decrypt(BOOT_CURR_ENC(state), source_slot, + (abs_off + idx) - hdr->ih_hdr_size, blk_sz, + blk_off, &buf[idx]); + } + } + } +#endif + + rc = flash_area_write(fap_dst, off_dst + bytes_copied, buf, chunk_sz); + if (rc != 0) { + return BOOT_EFLASH; + } + + bytes_copied += chunk_sz; + + MCUBOOT_WATCHDOG_FEED(); + } + + return 0; +} + +/** + * Overwrite primary slot with the image contained in the secondary slot. + * If a prior copy operation was interrupted by a system reset, this function + * redos the copy. + * + * @param bs The current boot status. This function reads + * this struct to determine if it is resuming + * an interrupted swap operation. This + * function writes the updated status to this + * function on return. + * + * @return 0 on success; nonzero on failure. + */ +#if defined(MCUBOOT_OVERWRITE_ONLY) || defined(MCUBOOT_BOOTSTRAP) +static int +boot_copy_image(struct boot_loader_state *state, struct boot_status *bs) +{ + size_t sect_count; + size_t sect; + int rc; + size_t size; + size_t this_size; + size_t last_sector; + const struct flash_area *fap_primary_slot; + const struct flash_area *fap_secondary_slot; + uint8_t image_index; + +#if defined(MCUBOOT_OVERWRITE_ONLY_FAST) + uint32_t sector; + uint32_t trailer_sz; + uint32_t off; + uint32_t sz; +#endif + + (void)bs; + +#if defined(MCUBOOT_OVERWRITE_ONLY_FAST) + uint32_t src_size = 0; + rc = boot_read_image_size(state, BOOT_SECONDARY_SLOT, &src_size); + assert(rc == 0); +#endif + + image_index = BOOT_CURR_IMG(state); + + BOOT_LOG_INF("Image %d upgrade secondary slot -> primary slot", image_index); + BOOT_LOG_INF("Erasing the primary slot"); + + rc = flash_area_open(flash_area_get_id(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT)), + &fap_primary_slot); + assert (rc == 0); + + rc = flash_area_open(FLASH_AREA_IMAGE_SECONDARY(image_index), + &fap_secondary_slot); + assert (rc == 0); + + sect_count = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT); + for (sect = 0, size = 0; sect < sect_count; sect++) { + this_size = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, sect); + rc = boot_erase_region(fap_primary_slot, size, this_size); + assert(rc == 0); + +#if defined(MCUBOOT_OVERWRITE_ONLY_FAST) + if ((size + this_size) >= src_size) { + size += src_size - size; + size += BOOT_WRITE_SZ(state) - (size % BOOT_WRITE_SZ(state)); + break; + } +#endif + + size += this_size; + } + +#if defined(MCUBOOT_OVERWRITE_ONLY_FAST) + trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state)); + sector = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT) - 1; + sz = 0; + do { + sz += boot_img_sector_size(state, BOOT_PRIMARY_SLOT, sector); + off = boot_img_sector_off(state, BOOT_PRIMARY_SLOT, sector); + sector--; + } while (sz < trailer_sz); + + rc = boot_erase_region(fap_primary_slot, off, sz); + assert(rc == 0); +#endif + +#ifdef MCUBOOT_ENC_IMAGES + if (IS_ENCRYPTED(boot_img_hdr(state, BOOT_SECONDARY_SLOT))) { + rc = boot_enc_load(BOOT_CURR_ENC(state), BOOT_SECONDARY_SLOT, + boot_img_hdr(state, BOOT_SECONDARY_SLOT), + fap_secondary_slot, bs); + + if (rc < 0) { + return BOOT_EBADIMAGE; + } + if (rc == 0 && boot_enc_set_key(BOOT_CURR_ENC(state), 1, bs)) { + return BOOT_EBADIMAGE; + } + } +#endif + + BOOT_LOG_INF("Image %d copying the secondary slot to the primary slot: 0x%zx bytes", + image_index, size); + rc = boot_copy_region(state, fap_secondary_slot, fap_primary_slot, 0, 0, size); + if (rc != 0) { + return rc; + } + +#if defined(MCUBOOT_OVERWRITE_ONLY_FAST) + rc = boot_write_magic(fap_primary_slot); + if (rc != 0) { + return rc; + } +#endif + + rc = BOOT_HOOK_CALL(boot_copy_region_post_hook, 0, BOOT_CURR_IMG(state), + BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT), size); + if (rc != 0) { + return rc; + } + +#ifdef MCUBOOT_HW_ROLLBACK_PROT + /* Update the stored security counter with the new image's security counter + * value. Both slots hold the new image at this point, but the secondary + * slot's image header must be passed since the image headers in the + * boot_data structure have not been updated yet. + */ + rc = boot_update_security_counter(BOOT_CURR_IMG(state), BOOT_PRIMARY_SLOT, + boot_img_hdr(state, BOOT_SECONDARY_SLOT)); + if (rc != 0) { + BOOT_LOG_ERR("Security counter update failed after image upgrade."); + return rc; + } +#endif /* MCUBOOT_HW_ROLLBACK_PROT */ + +#ifndef MCUBOOT_OVERWRITE_ONLY_KEEP_BACKUP + /* + * Erases header and trailer. The trailer is erased because when a new + * image is written without a trailer as is the case when using newt, the + * trailer that was left might trigger a new upgrade. + */ + BOOT_LOG_DBG("erasing secondary header"); + rc = boot_erase_region(fap_secondary_slot, + boot_img_sector_off(state, BOOT_SECONDARY_SLOT, 0), + boot_img_sector_size(state, BOOT_SECONDARY_SLOT, 0)); + assert(rc == 0); +#endif + + last_sector = boot_img_num_sectors(state, BOOT_SECONDARY_SLOT) - 1; + BOOT_LOG_DBG("erasing secondary trailer"); + rc = boot_erase_region(fap_secondary_slot, + boot_img_sector_off(state, BOOT_SECONDARY_SLOT, + last_sector), + boot_img_sector_size(state, BOOT_SECONDARY_SLOT, + last_sector)); + assert(rc == 0); + + flash_area_close(fap_primary_slot); + flash_area_close(fap_secondary_slot); + + /* TODO: Perhaps verify the primary slot's signature again? */ + + return 0; +} +#endif + +#if !defined(MCUBOOT_OVERWRITE_ONLY) +/** + * Swaps the two images in flash. If a prior copy operation was interrupted + * by a system reset, this function completes that operation. + * + * @param bs The current boot status. This function reads + * this struct to determine if it is resuming + * an interrupted swap operation. This + * function writes the updated status to this + * function on return. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_swap_image(struct boot_loader_state *state, struct boot_status *bs) +{ + struct image_header *hdr; + const struct flash_area *fap; +#ifdef MCUBOOT_ENC_IMAGES + uint8_t slot; + uint8_t i; +#endif + uint32_t size; + uint32_t copy_size; + uint8_t image_index; + int rc; + + /* FIXME: just do this if asked by user? */ + + size = copy_size = 0; + image_index = BOOT_CURR_IMG(state); + + if (boot_status_is_reset(bs)) { + /* + * No swap ever happened, so need to find the largest image which + * will be used to determine the amount of sectors to swap. + */ + hdr = boot_img_hdr(state, BOOT_PRIMARY_SLOT); + if (hdr->ih_magic == IMAGE_MAGIC) { + rc = boot_read_image_size(state, BOOT_PRIMARY_SLOT, ©_size); + assert(rc == 0); + } + +#ifdef MCUBOOT_ENC_IMAGES + if (IS_ENCRYPTED(hdr)) { + fap = BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT); + rc = boot_enc_load(BOOT_CURR_ENC(state), 0, hdr, fap, bs); + assert(rc >= 0); + + if (rc == 0) { + rc = boot_enc_set_key(BOOT_CURR_ENC(state), 0, bs); + assert(rc == 0); + } else { + rc = 0; + } + } else { + memset(bs->enckey[0], 0xff, BOOT_ENC_KEY_ALIGN_SIZE); + } +#endif + + hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT); + if (hdr->ih_magic == IMAGE_MAGIC) { + rc = boot_read_image_size(state, BOOT_SECONDARY_SLOT, &size); + assert(rc == 0); + } + +#ifdef MCUBOOT_ENC_IMAGES + hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT); + if (IS_ENCRYPTED(hdr)) { + fap = BOOT_IMG_AREA(state, BOOT_SECONDARY_SLOT); + rc = boot_enc_load(BOOT_CURR_ENC(state), 1, hdr, fap, bs); + assert(rc >= 0); + + if (rc == 0) { + rc = boot_enc_set_key(BOOT_CURR_ENC(state), 1, bs); + assert(rc == 0); + } else { + rc = 0; + } + } else { + memset(bs->enckey[1], 0xff, BOOT_ENC_KEY_ALIGN_SIZE); + } +#endif + + if (size > copy_size) { + copy_size = size; + } + + bs->swap_size = copy_size; + } else { + /* + * If a swap was under way, the swap_size should already be present + * in the trailer... + */ + + rc = boot_find_status(image_index, &fap); + assert(fap != NULL); + rc = boot_read_swap_size(fap, &bs->swap_size); + assert(rc == 0); + + copy_size = bs->swap_size; + +#ifdef MCUBOOT_ENC_IMAGES + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + rc = boot_read_enc_key(fap, slot, bs); + assert(rc == 0); + + for (i = 0; i < BOOT_ENC_KEY_SIZE; i++) { + if (bs->enckey[slot][i] != 0xff) { + break; + } + } + + boot_enc_init(BOOT_CURR_ENC(state), slot); + + if (i != BOOT_ENC_KEY_SIZE) { + boot_enc_set_key(BOOT_CURR_ENC(state), slot, bs); + } + } +#endif + flash_area_close(fap); + } + +#if defined(PM_S1_ADDRESS) && CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 + if (owner_nsib[BOOT_CURR_IMG(state)]) { + if (BOOT_CURR_IMG(state) == CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER) { + /* For NSIB, move the image instead of swapping it */ + nsib_swap_run(state, bs); + +#if defined(CONFIG_REBOOT) + /* Should also reboot at this point so the new S0/S1 update is applied */ + sys_reboot(SYS_REBOOT_COLD); +#endif + } + } else +#endif + { + swap_run(state, bs, copy_size); + } + +#ifdef MCUBOOT_VALIDATE_PRIMARY_SLOT + extern int boot_status_fails; + if (boot_status_fails > 0) { + BOOT_LOG_WRN("%d status write fails performing the swap", + boot_status_fails); + } +#endif + rc = BOOT_HOOK_CALL(boot_copy_region_post_hook, 0, BOOT_CURR_IMG(state), + BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT), size); + + return 0; +} +#endif + +/** + * Performs a clean (not aborted) image update. + * + * @param bs The current boot status. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_perform_update(struct boot_loader_state *state, struct boot_status *bs) +{ + int rc; +#ifndef MCUBOOT_OVERWRITE_ONLY + uint8_t swap_type; +#endif + + /* At this point there are no aborted swaps. */ +#if defined(MCUBOOT_OVERWRITE_ONLY) + rc = boot_copy_image(state, bs); +#elif defined(MCUBOOT_BOOTSTRAP) + /* Check if the image update was triggered by a bad image in the + * primary slot (the validity of the image in the secondary slot had + * already been checked). + */ + FIH_DECLARE(fih_rc, FIH_FAILURE); + rc = boot_check_header_erased(state, BOOT_PRIMARY_SLOT); + FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_PRIMARY_SLOT, bs); + if (rc == 0 || FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + rc = boot_copy_image(state, bs); + } else { + rc = boot_swap_image(state, bs); + } +#else + rc = boot_swap_image(state, bs); +#endif + assert(rc == 0); + +#ifndef MCUBOOT_OVERWRITE_ONLY + /* The following state needs image_ok be explicitly set after the + * swap was finished to avoid a new revert. + */ + swap_type = BOOT_SWAP_TYPE(state); + if (swap_type == BOOT_SWAP_TYPE_REVERT || + swap_type == BOOT_SWAP_TYPE_PERM) { + rc = swap_set_image_ok(BOOT_CURR_IMG(state)); + if (rc != 0) { + BOOT_SWAP_TYPE(state) = swap_type = BOOT_SWAP_TYPE_PANIC; + } + } + +#ifdef MCUBOOT_HW_ROLLBACK_PROT + if (swap_type == BOOT_SWAP_TYPE_PERM) { + /* Update the stored security counter with the new image's security + * counter value. The primary slot holds the new image at this point, + * but the secondary slot's image header must be passed since image + * headers in the boot_data structure have not been updated yet. + * + * In case of a permanent image swap mcuboot will never attempt to + * revert the images on the next reboot. Therefore, the security + * counter must be increased right after the image upgrade. + */ + rc = boot_update_security_counter( + BOOT_CURR_IMG(state), + BOOT_PRIMARY_SLOT, + boot_img_hdr(state, BOOT_SECONDARY_SLOT)); + if (rc != 0) { + BOOT_LOG_ERR("Security counter update failed after " + "image upgrade."); + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } + } +#endif /* MCUBOOT_HW_ROLLBACK_PROT */ + + if (BOOT_IS_UPGRADE(swap_type)) { + rc = swap_set_copy_done(BOOT_CURR_IMG(state)); + if (rc != 0) { + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } + } +#endif /* !MCUBOOT_OVERWRITE_ONLY */ + + return rc; +} + +/** + * Completes a previously aborted image swap. + * + * @param bs The current boot status. + * + * @return 0 on success; nonzero on failure. + */ +#if !defined(MCUBOOT_OVERWRITE_ONLY) +static int +boot_complete_partial_swap(struct boot_loader_state *state, + struct boot_status *bs) +{ + int rc; + + /* Determine the type of swap operation being resumed from the + * `swap-type` trailer field. + */ + rc = boot_swap_image(state, bs); + assert(rc == 0); + + BOOT_SWAP_TYPE(state) = bs->swap_type; + + /* The following states need image_ok be explicitly set after the + * swap was finished to avoid a new revert. + */ + if (bs->swap_type == BOOT_SWAP_TYPE_REVERT || + bs->swap_type == BOOT_SWAP_TYPE_PERM) { + rc = swap_set_image_ok(BOOT_CURR_IMG(state)); + if (rc != 0) { + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } + } + + if (BOOT_IS_UPGRADE(bs->swap_type)) { + rc = swap_set_copy_done(BOOT_CURR_IMG(state)); + if (rc != 0) { + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } + } + + if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_PANIC) { + BOOT_LOG_ERR("panic!"); + assert(0); + + /* Loop forever... */ + while (1) {} + } + + return rc; +} +#endif /* !MCUBOOT_OVERWRITE_ONLY */ + +#if (BOOT_IMAGE_NUMBER > 1) +/** + * Review the validity of previously determined swap types of other images. + * + * @param aborted_swap The current image upgrade is a + * partial/aborted swap. + */ +static void +boot_review_image_swap_types(struct boot_loader_state *state, + bool aborted_swap) +{ + /* In that case if we rebooted in the middle of an image upgrade process, we + * must review the validity of swap types, that were previously determined + * for other images. The image_ok flag had not been set before the reboot + * for any of the updated images (only the copy_done flag) and thus falsely + * the REVERT swap type has been determined for the previous images that had + * been updated before the reboot. + * + * There are two separate scenarios that we have to deal with: + * + * 1. The reboot has happened during swapping an image: + * The current image upgrade has been determined as a + * partial/aborted swap. + * 2. The reboot has happened between two separate image upgrades: + * In this scenario we must check the swap type of the current image. + * In those cases if it is NONE or REVERT we cannot certainly determine + * the fact of a reboot. In a consistent state images must move in the + * same direction or stay in place, e.g. in practice REVERT and TEST + * swap types cannot be present at the same time. If the swap type of + * the current image is either TEST, PERM or FAIL we must review the + * already determined swap types of other images and set each false + * REVERT swap types to NONE (these images had been successfully + * updated before the system rebooted between two separate image + * upgrades). + */ + + if (BOOT_CURR_IMG(state) == 0) { + /* Nothing to do */ + return; + } + + if (!aborted_swap) { + if ((BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_NONE) || + (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_REVERT)) { + /* Nothing to do */ + return; + } + } + + for (uint8_t i = 0; i < BOOT_CURR_IMG(state); i++) { + if (state->swap_type[i] == BOOT_SWAP_TYPE_REVERT) { + state->swap_type[i] = BOOT_SWAP_TYPE_NONE; + } + } +} +#endif + +/** + * Prepare image to be updated if required. + * + * Prepare image to be updated if required with completing an image swap + * operation if one was aborted and/or determining the type of the + * swap operation. In case of any error set the swap type to NONE. + * + * @param state TODO + * @param bs Pointer where the read and possibly updated + * boot status can be written to. + */ +static void +boot_prepare_image_for_update(struct boot_loader_state *state, + struct boot_status *bs) +{ + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) || defined(MCUBOOT_DATA_SHARING) + int max_size; +#endif + + /* Determine the sector layout of the image slots and scratch area. */ + rc = boot_read_sectors(state); + if (rc != 0) { + BOOT_LOG_WRN("Failed reading sectors; BOOT_MAX_IMG_SECTORS=%d" + " - too small?", BOOT_MAX_IMG_SECTORS); + /* Unable to determine sector layout, continue with next image + * if there is one. + */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + if (rc == BOOT_EFLASH) + { + /* Only return on error from the primary image flash */ + return; + } + } + + /* Attempt to read an image header from each slot. */ + rc = boot_read_image_headers(state, false, NULL); + if (rc != 0) { + /* Continue with next image if there is one. */ + BOOT_LOG_WRN("Failed reading image headers; Image=%u", + BOOT_CURR_IMG(state)); + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + return; + } + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) || defined(MCUBOOT_DATA_SHARING) + /* Fetch information on maximum sizes for later usage, if needed */ + max_size = app_max_size(state); + + if (max_size > 0) { + image_max_sizes[BOOT_CURR_IMG(state)].calculated = true; + image_max_sizes[BOOT_CURR_IMG(state)].max_size = max_size; + } +#endif + + /* If the current image's slots aren't compatible, no swap is possible. + * Just boot into primary slot. + */ + if (boot_slots_compatible(state)) { + boot_status_reset(bs); + +#ifndef MCUBOOT_OVERWRITE_ONLY + rc = swap_read_status(state, bs); + if (rc != 0) { + BOOT_LOG_WRN("Failed reading boot status; Image=%u", + BOOT_CURR_IMG(state)); + /* Continue with next image if there is one. */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + return; + } +#endif + +#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE) + /* + * Must re-read image headers because the boot status might + * have been updated in the previous function call. + */ + rc = boot_read_image_headers(state, !boot_status_is_reset(bs), bs); +#ifdef MCUBOOT_BOOTSTRAP + /* When bootstrapping it's OK to not have image magic in the primary slot */ + if (rc != 0 && (BOOT_CURR_IMG(state) != BOOT_PRIMARY_SLOT || + boot_check_header_erased(state, BOOT_PRIMARY_SLOT) != 0)) { +#else + if (rc != 0) { +#endif + + /* Continue with next image if there is one. */ + BOOT_LOG_WRN("Failed reading image headers; Image=%u", + BOOT_CURR_IMG(state)); + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + return; + } +#endif + + /* Determine if we rebooted in the middle of an image swap + * operation. If a partial swap was detected, complete it. + */ + if (!boot_status_is_reset(bs)) { + +#if (BOOT_IMAGE_NUMBER > 1) + boot_review_image_swap_types(state, true); +#endif + +#ifdef MCUBOOT_OVERWRITE_ONLY + /* Should never arrive here, overwrite-only mode has + * no swap state. + */ + assert(0); +#else + /* Determine the type of swap operation being resumed from the + * `swap-type` trailer field. + */ + rc = boot_complete_partial_swap(state, bs); + assert(rc == 0); +#endif + /* Attempt to read an image header from each slot. Ensure that + * image headers in slots are aligned with headers in boot_data. + */ + rc = boot_read_image_headers(state, false, bs); + assert(rc == 0); + + /* Swap has finished set to NONE */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + } else { + /* There was no partial swap, determine swap type. */ + if (bs->swap_type == BOOT_SWAP_TYPE_NONE) { + BOOT_SWAP_TYPE(state) = boot_validated_swap_type(state, bs); + } else { + FIH_CALL(boot_validate_slot, fih_rc, + state, BOOT_SECONDARY_SLOT, bs); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_FAIL; + } else { + BOOT_SWAP_TYPE(state) = bs->swap_type; + } + } + +#if (BOOT_IMAGE_NUMBER > 1) + boot_review_image_swap_types(state, false); +#endif + +#ifdef MCUBOOT_BOOTSTRAP + if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_NONE) { + /* Header checks are done first because they are + * inexpensive. Since overwrite-only copies starting from + * offset 0, if interrupted, it might leave a valid header + * magic, so also run validation on the primary slot to be + * sure it's not OK. + */ + rc = boot_check_header_erased(state, BOOT_PRIMARY_SLOT); + FIH_CALL(boot_validate_slot, fih_rc, + state, BOOT_PRIMARY_SLOT, bs); + + if (rc == 0 || FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + + rc = (boot_img_hdr(state, BOOT_SECONDARY_SLOT)->ih_magic == IMAGE_MAGIC) ? 1: 0; + FIH_CALL(boot_validate_slot, fih_rc, + state, BOOT_SECONDARY_SLOT, bs); + + if (rc == 1 && FIH_EQ(fih_rc, FIH_SUCCESS)) { + /* Set swap type to REVERT to overwrite the primary + * slot with the image contained in secondary slot + * and to trigger the explicit setting of the + * image_ok flag. + */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_REVERT; + } + } + } +#endif + } + } else { + /* In that case if slots are not compatible. */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + } +} + +/** + * Updates the security counter for the current image. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_update_hw_rollback_protection(struct boot_loader_state *state) +{ +#ifdef MCUBOOT_HW_ROLLBACK_PROT + int rc; + + /* Update the stored security counter with the active image's security + * counter value. It will only be updated if the new security counter is + * greater than the stored value. + * + * In case of a successful image swapping when the swap type is TEST the + * security counter can be increased only after a reset, when the swap + * type is NONE and the image has marked itself "OK" (the image_ok flag + * has been set). This way a "revert" can be performed when it's + * necessary. + */ + if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_NONE) { + rc = boot_update_security_counter( + BOOT_CURR_IMG(state), + BOOT_PRIMARY_SLOT, + boot_img_hdr(state, BOOT_PRIMARY_SLOT)); + if (rc != 0) { + BOOT_LOG_ERR("Security counter update failed after image " + "validation."); + return rc; + } + } + + return 0; + +#else /* MCUBOOT_HW_ROLLBACK_PROT */ + (void) (state); + + return 0; +#endif +} + +/** + * Checks test swap downgrade prevention conditions. + * + * Function called only for swap upgrades test run. It may prevent + * swap if slot 1 image has <= version number or < security counter + * + * @param state Boot loader status information. + * + * @return 0 - image can be swapped, -1 downgrade prevention + */ +static int +check_downgrade_prevention(struct boot_loader_state *state) +{ +#if defined(MCUBOOT_DOWNGRADE_PREVENTION) && \ + (defined(MCUBOOT_SWAP_USING_MOVE) || defined(MCUBOOT_SWAP_USING_SCRATCH)) + uint32_t security_counter[2]; + int rc; + +#if defined(PM_S1_ADDRESS) + if (owner_nsib[BOOT_CURR_IMG(state)]) { + /* Downgrade prevention on S0/S1 image is managed by NSIB */ + return 0; + } +#endif + + if (MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER) { + /* If there was security no counter in slot 0, allow swap */ + rc = bootutil_get_img_security_cnt(&(BOOT_IMG(state, 0).hdr), + BOOT_IMG(state, 0).area, + &security_counter[0]); + if (rc != 0) { + return 0; + } + /* If there is no security counter in slot 1, or it's lower than + * that of slot 0, prevent downgrade */ + rc = bootutil_get_img_security_cnt(&(BOOT_IMG(state, 1).hdr), + BOOT_IMG(state, 1).area, + &security_counter[1]); + if (rc != 0 || security_counter[0] > security_counter[1]) { + rc = -1; + } + } + else { + rc = boot_version_cmp(&boot_img_hdr(state, BOOT_SECONDARY_SLOT)->ih_ver, + &boot_img_hdr(state, BOOT_PRIMARY_SLOT)->ih_ver); + } + if (rc < 0) { + /* Image in slot 0 prevents downgrade, delete image in slot 1 */ + BOOT_LOG_INF("Image %d in slot 1 erased due to downgrade prevention", BOOT_CURR_IMG(state)); + flash_area_erase(BOOT_IMG(state, 1).area, 0, + flash_area_get_size(BOOT_IMG(state, 1).area)); + } else { + rc = 0; + } + return rc; +#else + (void)state; + return 0; +#endif +} + +fih_ret +context_boot_go(struct boot_loader_state *state, struct boot_rsp *rsp) +{ + size_t slot; + struct boot_status bs; + int rc = -1; + FIH_DECLARE(fih_rc, FIH_FAILURE); + int fa_id; + int image_index; + bool has_upgrade; + volatile int fih_cnt; + +#if defined(__BOOTSIM__) + /* The array of slot sectors are defined here (as opposed to file scope) so + * that they don't get allocated for non-boot-loader apps. This is + * necessary because the gcc option "-fdata-sections" doesn't seem to have + * any effect in older gcc versions (e.g., 4.8.4). + */ + TARGET_STATIC boot_sector_t primary_slot_sectors[BOOT_IMAGE_NUMBER][BOOT_MAX_IMG_SECTORS]; + TARGET_STATIC boot_sector_t secondary_slot_sectors[BOOT_IMAGE_NUMBER][BOOT_MAX_IMG_SECTORS]; +#if MCUBOOT_SWAP_USING_SCRATCH + TARGET_STATIC boot_sector_t scratch_sectors[BOOT_MAX_IMG_SECTORS]; +#endif +#endif + + has_upgrade = false; + +#if (BOOT_IMAGE_NUMBER == 1) + (void)has_upgrade; +#endif + + /* Iterate over all the images. By the end of the loop the swap type has + * to be determined for each image and all aborted swaps have to be + * completed. + */ + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif +#if defined(MCUBOOT_ENC_IMAGES) && (BOOT_IMAGE_NUMBER > 1) + /* The keys used for encryption may no longer be valid (could belong to + * another images). Therefore, mark them as invalid to force their reload + * by boot_enc_load(). + */ + boot_enc_zeroize(BOOT_CURR_ENC(state)); +#endif + + image_index = BOOT_CURR_IMG(state); + +#if !defined(__BOOTSIM__) + BOOT_IMG(state, BOOT_PRIMARY_SLOT).sectors = + sector_buffers.primary[image_index]; + BOOT_IMG(state, BOOT_SECONDARY_SLOT).sectors = + sector_buffers.secondary[image_index]; +#if MCUBOOT_SWAP_USING_SCRATCH + state->scratch.sectors = sector_buffers.scratch; +#endif +#else + BOOT_IMG(state, BOOT_PRIMARY_SLOT).sectors = + primary_slot_sectors[image_index]; + BOOT_IMG(state, BOOT_SECONDARY_SLOT).sectors = + secondary_slot_sectors[image_index]; +#if MCUBOOT_SWAP_USING_SCRATCH + state->scratch.sectors = scratch_sectors; +#endif +#endif + + /* Open primary and secondary image areas for the duration + * of this call. + */ + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + fa_id = flash_area_id_from_multi_image_slot(image_index, slot); + rc = flash_area_open(fa_id, &BOOT_IMG_AREA(state, slot)); + assert(rc == 0); + + if (rc != 0) { + BOOT_LOG_ERR("Failed to open flash area ID %d (image %d slot %d): %d, " + "cannot continue", fa_id, image_index, (int8_t)slot, rc); + FIH_PANIC; + } + } +#if MCUBOOT_SWAP_USING_SCRATCH + rc = flash_area_open(FLASH_AREA_IMAGE_SCRATCH, + &BOOT_SCRATCH_AREA(state)); + assert(rc == 0); + + if (rc != 0) { + BOOT_LOG_ERR("Failed to open scratch flash area: %d, cannot continue", rc); + FIH_PANIC; + } +#endif + + /* Determine swap type and complete swap if it has been aborted. */ + boot_prepare_image_for_update(state, &bs); + + if (BOOT_IS_UPGRADE(BOOT_SWAP_TYPE(state))) { + has_upgrade = true; + } + } + + /* cleanup secondary slots which were recognized unusable*/ + sec_slot_cleanup_if_unusable(); + +#if (BOOT_IMAGE_NUMBER > 1) + if (has_upgrade) { + /* Iterate over all the images and verify whether the image dependencies + * are all satisfied and update swap type if necessary. + */ + rc = boot_verify_dependencies(state); + if (rc != 0) { + /* + * It was impossible to upgrade because the expected dependency version + * was not available. Here we already changed the swap_type so that + * instead of asserting the bootloader, we continue and no upgrade is + * performed. + */ + rc = 0; + } + } +#endif + + /* Trigger status change callback with upgrading status */ + mcuboot_status_change(MCUBOOT_STATUS_UPGRADING); + + /* Iterate over all the images. At this point there are no aborted swaps + * and the swap types are determined for each image. By the end of the loop + * all required update operations will have been finished. + */ + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if (BOOT_IMAGE_NUMBER > 1) + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } + +#ifdef MCUBOOT_ENC_IMAGES + /* The keys used for encryption may no longer be valid (could belong to + * another images). Therefore, mark them as invalid to force their reload + * by boot_enc_load(). + */ + boot_enc_zeroize(BOOT_CURR_ENC(state)); +#endif /* MCUBOOT_ENC_IMAGES */ + + /* Indicate that swap is not aborted */ + boot_status_reset(&bs); +#endif /* (BOOT_IMAGE_NUMBER > 1) */ + + /* Set the previously determined swap type */ + bs.swap_type = BOOT_SWAP_TYPE(state); + + switch (BOOT_SWAP_TYPE(state)) { + case BOOT_SWAP_TYPE_NONE: + break; + + case BOOT_SWAP_TYPE_TEST: + /* fallthrough */ + case BOOT_SWAP_TYPE_PERM: + if (check_downgrade_prevention(state) != 0) { + /* Downgrade prevented */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + break; + } + /* fallthrough */ + case BOOT_SWAP_TYPE_REVERT: + rc = BOOT_HOOK_CALL(boot_perform_update_hook, BOOT_HOOK_REGULAR, + BOOT_CURR_IMG(state), &(BOOT_IMG(state, 1).hdr), + BOOT_IMG_AREA(state, BOOT_SECONDARY_SLOT)); + if (rc == BOOT_HOOK_REGULAR) + { + rc = boot_perform_update(state, &bs); + } + assert(rc == 0); + break; + + case BOOT_SWAP_TYPE_FAIL: + /* The image in secondary slot was invalid and is now erased. Ensure + * we don't try to boot into it again on the next reboot. Do this by + * pretending we just reverted back to primary slot. + */ +#ifndef MCUBOOT_OVERWRITE_ONLY + /* image_ok needs to be explicitly set to avoid a new revert. */ + rc = swap_set_image_ok(BOOT_CURR_IMG(state)); + if (rc != 0) { + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } +#endif /* !MCUBOOT_OVERWRITE_ONLY */ + break; + + default: + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } + + if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_PANIC) { + BOOT_LOG_ERR("panic!"); + assert(0); + + /* Loop forever... */ + FIH_PANIC; + } + } + + /* Iterate over all the images. At this point all required update operations + * have finished. By the end of the loop each image in the primary slot will + * have been re-validated. + */ + FIH_SET(fih_cnt, 0); + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + /* Hardenned to prevent from skipping check of a given image, + * tmp_img_mask is declared volatile + */ + volatile bool tmp_img_mask; + FIH_SET(tmp_img_mask, state->img_mask[BOOT_CURR_IMG(state)]); + if (FIH_EQ(tmp_img_mask, true)) { + ++fih_cnt; + continue; + } +#endif + if (BOOT_SWAP_TYPE(state) != BOOT_SWAP_TYPE_NONE) { + /* Attempt to read an image header from each slot. Ensure that image + * headers in slots are aligned with headers in boot_data. + * Note: Quite complicated internal logic of boot_read_image_headers + * uses boot state, the last parm, to figure out in which slot which + * header is located; when boot state is not provided, then it + * is assumed that headers are at proper slots (we are not in + * the middle of moving images, etc). + */ + rc = boot_read_image_headers(state, false, NULL); + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + /* Since headers were reloaded, it can be assumed we just performed + * a swap or overwrite. Now the header info that should be used to + * provide the data for the bootstrap, which previously was at + * secondary slot, was updated to primary slot. + */ + } + +#ifdef MCUBOOT_VALIDATE_PRIMARY_SLOT +#ifdef PM_S1_ADDRESS + /* Patch needed for NCS. Image 1 primary is the currently + * executing MCUBoot image, and is therefore already validated by NSIB and + * does not need to also be validated by MCUBoot. + */ + bool image_validated_by_nsib = BOOT_CURR_IMG(state) == + CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER; + if (!image_validated_by_nsib) +#endif + { + FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_PRIMARY_SLOT, NULL); + /* Check for all possible values is redundant in normal operation it + * is meant to prevent FI attack. + */ + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS) || + FIH_EQ(fih_rc, FIH_FAILURE) || + FIH_EQ(fih_rc, FIH_NO_BOOTABLE_IMAGE)) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + } +#else + /* Even if we're not re-validating the primary slot, we could be booting + * onto an empty flash chip. At least do a basic sanity check that + * the magic number on the image is OK. + */ + if (BOOT_IMG(state, BOOT_PRIMARY_SLOT).hdr.ih_magic != IMAGE_MAGIC) { + BOOT_LOG_ERR("bad image magic 0x%lx; Image=%u", (unsigned long) + BOOT_IMG(state, BOOT_PRIMARY_SLOT).hdr.ih_magic, + BOOT_CURR_IMG(state)); + rc = BOOT_EBADIMAGE; + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } +#endif /* MCUBOOT_VALIDATE_PRIMARY_SLOT */ + +#ifdef PM_S1_ADDRESS + if (!image_validated_by_nsib) +#endif + { + rc = boot_update_hw_rollback_protection(state); + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + } + + rc = boot_add_shared_data(state, BOOT_PRIMARY_SLOT); + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + ++fih_cnt; + } + /* + * fih_cnt should be equal to BOOT_IMAGE_NUMBER now. + * If this is not the case, at least one iteration of the loop + * has been skipped. + */ + if(FIH_NOT_EQ(fih_cnt, BOOT_IMAGE_NUMBER)) { + FIH_PANIC; + } + + fill_rsp(state, rsp); + + fih_rc = FIH_SUCCESS; +out: + /* + * Since the boot_status struct stores plaintext encryption keys, reset + * them here to avoid the possibility of jumping into an image that could + * easily recover them. + */ +#if defined(MCUBOOT_ENC_IMAGES) || defined(MCUBOOT_SWAP_SAVE_ENCTLV) + like_mbedtls_zeroize(&bs, sizeof(bs)); +#else + memset(&bs, 0, sizeof(struct boot_status)); +#endif + + close_all_flash_areas(state); + FIH_RET(fih_rc); +} + +fih_ret +split_go(int loader_slot, int split_slot, void **entry) +{ + boot_sector_t *sectors; + uintptr_t entry_val; + int loader_flash_id; + int split_flash_id; + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + sectors = malloc(BOOT_MAX_IMG_SECTORS * 2 * sizeof *sectors); + if (sectors == NULL) { + FIH_RET(FIH_FAILURE); + } + BOOT_IMG(&boot_data, loader_slot).sectors = sectors + 0; + BOOT_IMG(&boot_data, split_slot).sectors = sectors + BOOT_MAX_IMG_SECTORS; + + loader_flash_id = flash_area_id_from_image_slot(loader_slot); + rc = flash_area_open(loader_flash_id, + &BOOT_IMG_AREA(&boot_data, loader_slot)); + assert(rc == 0); + split_flash_id = flash_area_id_from_image_slot(split_slot); + rc = flash_area_open(split_flash_id, + &BOOT_IMG_AREA(&boot_data, split_slot)); + assert(rc == 0); + + /* Determine the sector layout of the image slots and scratch area. */ + rc = boot_read_sectors(&boot_data); + if (rc != 0) { + rc = SPLIT_GO_ERR; + goto done; + } + + rc = boot_read_image_headers(&boot_data, true, NULL); + if (rc != 0) { + goto done; + } + + /* Don't check the bootable image flag because we could really call a + * bootable or non-bootable image. Just validate that the image check + * passes which is distinct from the normal check. + */ + FIH_CALL(split_image_check, fih_rc, + boot_img_hdr(&boot_data, split_slot), + BOOT_IMG_AREA(&boot_data, split_slot), + boot_img_hdr(&boot_data, loader_slot), + BOOT_IMG_AREA(&boot_data, loader_slot)); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + goto done; + } + + entry_val = boot_img_slot_off(&boot_data, split_slot) + + boot_img_hdr(&boot_data, split_slot)->ih_hdr_size; + *entry = (void *) entry_val; + rc = SPLIT_GO_OK; + +done: + flash_area_close(BOOT_IMG_AREA(&boot_data, split_slot)); + flash_area_close(BOOT_IMG_AREA(&boot_data, loader_slot)); + free(sectors); + + if (rc) { + FIH_SET(fih_rc, FIH_FAILURE); + } + + FIH_RET(fih_rc); +} + +#else /* MCUBOOT_DIRECT_XIP || MCUBOOT_RAM_LOAD */ + +/** + * Opens all flash areas and checks which contain an image with a valid header. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_get_slot_usage(struct boot_loader_state *state) +{ + uint32_t slot; + int fa_id; + int rc; + struct image_header *hdr = NULL; + + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif + /* Open all the slots */ + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + fa_id = flash_area_id_from_multi_image_slot( + BOOT_CURR_IMG(state), slot); + rc = flash_area_open(fa_id, &BOOT_IMG_AREA(state, slot)); + assert(rc == 0); + } + + /* Attempt to read an image header from each slot. */ + rc = boot_read_image_headers(state, false, NULL); + if (rc != 0) { + BOOT_LOG_WRN("Failed reading image headers."); + return rc; + } + + /* Check headers in all slots */ + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + hdr = boot_img_hdr(state, slot); + + if (boot_is_header_valid(hdr, BOOT_IMG_AREA(state, slot), state)) { + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[slot] = true; + BOOT_LOG_IMAGE_INFO(slot, hdr); + } else { + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[slot] = false; + BOOT_LOG_INF("Image %d %s slot: Image not found", + BOOT_CURR_IMG(state), + (slot == BOOT_PRIMARY_SLOT) + ? "Primary" : "Secondary"); + } + } + + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + } + + return 0; +} + +/** + * Finds the slot containing the image with the highest version number for the + * current image. + * + * @param state Boot loader status information. + * + * @return NO_ACTIVE_SLOT if no available slot found, number of + * the found slot otherwise. + */ +static uint32_t +find_slot_with_highest_version(struct boot_loader_state *state) +{ + uint32_t slot; + uint32_t candidate_slot = NO_ACTIVE_SLOT; + int rc; + + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + if (state->slot_usage[BOOT_CURR_IMG(state)].slot_available[slot]) { + if (candidate_slot == NO_ACTIVE_SLOT) { + candidate_slot = slot; + } else { + rc = boot_version_cmp( + &boot_img_hdr(state, slot)->ih_ver, + &boot_img_hdr(state, candidate_slot)->ih_ver); + if (rc == 1) { + /* The version of the image being examined is greater than + * the version of the current candidate. + */ + candidate_slot = slot; + } + } + } + } + + return candidate_slot; +} + +#ifdef MCUBOOT_HAVE_LOGGING +/** + * Prints the state of the loaded images. + * + * @param state Boot loader status information. + */ +static void +print_loaded_images(struct boot_loader_state *state) +{ + uint32_t active_slot; + + (void)state; + + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + + BOOT_LOG_INF("Image %d loaded from the %s slot", + BOOT_CURR_IMG(state), + (active_slot == BOOT_PRIMARY_SLOT) ? + "primary" : "secondary"); + } +} +#endif + +#if defined(MCUBOOT_DIRECT_XIP) && defined(MCUBOOT_DIRECT_XIP_REVERT) +/** + * Checks whether the active slot of the current image was previously selected + * to run. Erases the image if it was selected but its execution failed, + * otherwise marks it as selected if it has not been before. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_select_or_erase(struct boot_loader_state *state) +{ + const struct flash_area *fap; + int fa_id; + int rc; + uint32_t active_slot; + struct boot_swap_state* active_swap_state; + + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + + fa_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), active_slot); + rc = flash_area_open(fa_id, &fap); + assert(rc == 0); + + active_swap_state = &(state->slot_usage[BOOT_CURR_IMG(state)].swap_state); + + memset(active_swap_state, 0, sizeof(struct boot_swap_state)); + rc = boot_read_swap_state(fap, active_swap_state); + assert(rc == 0); + + if (active_swap_state->magic != BOOT_MAGIC_GOOD || + (active_swap_state->copy_done == BOOT_FLAG_SET && + active_swap_state->image_ok != BOOT_FLAG_SET)) { + /* + * A reboot happened without the image being confirmed at + * runtime or its trailer is corrupted/invalid. Erase the image + * to prevent it from being selected again on the next reboot. + */ + BOOT_LOG_DBG("Erasing faulty image in the %s slot.", + (active_slot == BOOT_PRIMARY_SLOT) ? "primary" : "secondary"); + rc = flash_area_erase(fap, 0, flash_area_get_size(fap)); + assert(rc == 0); + + flash_area_close(fap); + rc = -1; + } else { + if (active_swap_state->copy_done != BOOT_FLAG_SET) { + if (active_swap_state->copy_done == BOOT_FLAG_BAD) { + BOOT_LOG_DBG("The copy_done flag had an unexpected value. Its " + "value was neither 'set' nor 'unset', but 'bad'."); + } + /* + * Set the copy_done flag, indicating that the image has been + * selected to boot. It can be set in advance, before even + * validating the image, because in case the validation fails, the + * entire image slot will be erased (including the trailer). + */ + rc = boot_write_copy_done(fap); + if (rc != 0) { + BOOT_LOG_WRN("Failed to set copy_done flag of the image in " + "the %s slot.", (active_slot == BOOT_PRIMARY_SLOT) ? + "primary" : "secondary"); + rc = 0; + } + } + flash_area_close(fap); + } + + return rc; +} +#endif /* MCUBOOT_DIRECT_XIP && MCUBOOT_DIRECT_XIP_REVERT */ + +#ifdef MCUBOOT_RAM_LOAD + +#ifndef MULTIPLE_EXECUTABLE_RAM_REGIONS +#if !defined(IMAGE_EXECUTABLE_RAM_START) || !defined(IMAGE_EXECUTABLE_RAM_SIZE) +#error "Platform MUST define executable RAM bounds in case of RAM_LOAD" +#endif +#endif + +/** + * Verifies that the active slot of the current image can be loaded within the + * predefined bounds that are allowed to be used by executable images. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_verify_ram_load_address(struct boot_loader_state *state) +{ + uint32_t img_dst; + uint32_t img_sz; + uint32_t img_end_addr; + uint32_t exec_ram_start; + uint32_t exec_ram_size; + + (void)state; + +#ifdef MULTIPLE_EXECUTABLE_RAM_REGIONS + int rc; + + rc = boot_get_image_exec_ram_info(BOOT_CURR_IMG(state), &exec_ram_start, + &exec_ram_size); + if (rc != 0) { + return BOOT_EBADSTATUS; + } +#else + exec_ram_start = IMAGE_EXECUTABLE_RAM_START; + exec_ram_size = IMAGE_EXECUTABLE_RAM_SIZE; +#endif + + img_dst = state->slot_usage[BOOT_CURR_IMG(state)].img_dst; + img_sz = state->slot_usage[BOOT_CURR_IMG(state)].img_sz; + + if (img_dst < exec_ram_start) { + return BOOT_EBADIMAGE; + } + + if (!boot_u32_safe_add(&img_end_addr, img_dst, img_sz)) { + return BOOT_EBADIMAGE; + } + + if (img_end_addr > (exec_ram_start + exec_ram_size)) { + return BOOT_EBADIMAGE; + } + + return 0; +} + +#ifdef MCUBOOT_ENC_IMAGES + +/** + * Copies and decrypts an image from a slot in the flash to an SRAM address. + * + * @param state Boot loader status information. + * @param slot The flash slot of the image to be copied to SRAM. + * @param hdr The image header. + * @param src_sz Size of the image. + * @param img_dst Pointer to the address at which the image needs to be + * copied to SRAM. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_decrypt_and_copy_image_to_sram(struct boot_loader_state *state, + uint32_t slot, struct image_header *hdr, + uint32_t src_sz, uint32_t img_dst) +{ + /* The flow for the decryption and copy of the image is as follows : + * 1. The whole image is copied to the RAM (header + payload + TLV). + * 2. The encryption key is loaded from the TLV in flash. + * 3. The image is then decrypted chunk by chunk in RAM (1 chunk + * is 1024 bytes). Only the payload section is decrypted. + * 4. The image is authenticated in RAM. + */ + const struct flash_area *fap_src = NULL; + struct boot_status bs; + uint32_t blk_off; + uint32_t tlv_off; + uint32_t blk_sz; + uint32_t bytes_copied = hdr->ih_hdr_size; + uint32_t chunk_sz; + uint32_t max_sz = 1024; + uint16_t idx; + uint8_t * cur_dst; + int area_id; + int rc; + uint8_t * ram_dst = (void *)(IMAGE_RAM_BASE + img_dst); + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap_src); + if (rc != 0){ + return BOOT_EFLASH; + } + + tlv_off = BOOT_TLV_OFF(hdr); + + /* Copying the whole image in RAM */ + rc = flash_area_read(fap_src, 0, ram_dst, src_sz); + if (rc != 0) { + goto done; + } + + rc = boot_enc_load(BOOT_CURR_ENC(state), slot, hdr, fap_src, &bs); + if (rc < 0) { + goto done; + } + + /* if rc > 0 then the key has already been loaded */ + if (rc == 0 && boot_enc_set_key(BOOT_CURR_ENC(state), slot, &bs)) { + goto done; + } + + /* Starting at the end of the header as the header section is not encrypted */ + while (bytes_copied < tlv_off) { /* TLV section copied previously */ + if (src_sz - bytes_copied > max_sz) { + chunk_sz = max_sz; + } else { + chunk_sz = src_sz - bytes_copied; + } + + cur_dst = ram_dst + bytes_copied; + blk_sz = chunk_sz; + idx = 0; + blk_off = ((bytes_copied) - hdr->ih_hdr_size) & 0xf; + if (bytes_copied + chunk_sz > tlv_off) { + /* Going over TLV section + * Part of the chunk is encrypted payload */ + blk_sz = tlv_off - (bytes_copied); + } + boot_enc_decrypt(BOOT_CURR_ENC(state), slot, + (bytes_copied + idx) - hdr->ih_hdr_size, blk_sz, + blk_off, cur_dst); + bytes_copied += chunk_sz; + } + rc = 0; + +done: + flash_area_close(fap_src); + + return rc; +} + +#endif /* MCUBOOT_ENC_IMAGES */ +/** + * Copies a slot of the current image into SRAM. + * + * @param state Boot loader status information. + * @param slot The flash slot of the image to be copied to SRAM. + * @param img_dst The address at which the image needs to be copied to + * SRAM. + * @param img_sz The size of the image that needs to be copied to SRAM. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_copy_image_to_sram(struct boot_loader_state *state, int slot, + uint32_t img_dst, uint32_t img_sz) +{ + int rc; + const struct flash_area *fap_src = NULL; + int area_id; + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + + rc = flash_area_open(area_id, &fap_src); + if (rc != 0) { + return BOOT_EFLASH; + } + + /* Direct copy from flash to its new location in SRAM. */ + rc = flash_area_read(fap_src, 0, (void *)(IMAGE_RAM_BASE + img_dst), img_sz); + if (rc != 0) { + BOOT_LOG_INF("Error whilst copying image %d from Flash to SRAM: %d", + BOOT_CURR_IMG(state), rc); + } + + flash_area_close(fap_src); + + return rc; +} + +#if (BOOT_IMAGE_NUMBER > 1) +/** + * Checks if two memory regions (A and B) are overlap or not. + * + * @param start_a Start of the A region. + * @param end_a End of the A region. + * @param start_b Start of the B region. + * @param end_b End of the B region. + * + * @return true if there is overlap; false otherwise. + */ +static bool +do_regions_overlap(uint32_t start_a, uint32_t end_a, + uint32_t start_b, uint32_t end_b) +{ + if (start_b > end_a) { + return false; + } else if (start_b >= start_a) { + return true; + } else if (end_b > start_a) { + return true; + } + + return false; +} + +/** + * Checks if the image we want to load to memory overlap with an already + * ramloaded image. + * + * @param state Boot loader status information. + * + * @return 0 if there is no overlap; nonzero otherwise. + */ +static int +boot_check_ram_load_overlapping(struct boot_loader_state *state) +{ + uint32_t i; + + uint32_t start_a; + uint32_t end_a; + uint32_t start_b; + uint32_t end_b; + uint32_t image_id_to_check = BOOT_CURR_IMG(state); + + start_a = state->slot_usage[image_id_to_check].img_dst; + /* Safe to add here, values are already verified in + * boot_verify_ram_load_address() */ + end_a = start_a + state->slot_usage[image_id_to_check].img_sz; + + for (i = 0; i < BOOT_IMAGE_NUMBER; i++) { + if (state->slot_usage[i].active_slot == NO_ACTIVE_SLOT + || i == image_id_to_check) { + continue; + } + + start_b = state->slot_usage[i].img_dst; + /* Safe to add here, values are already verified in + * boot_verify_ram_load_address() */ + end_b = start_b + state->slot_usage[i].img_sz; + + if (do_regions_overlap(start_a, end_a, start_b, end_b)) { + return -1; + } + } + + return 0; +} +#endif + +/** + * Loads the active slot of the current image into SRAM. The load address and + * image size is extracted from the image header. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_load_image_to_sram(struct boot_loader_state *state) +{ + uint32_t active_slot; + struct image_header *hdr = NULL; + uint32_t img_dst; + uint32_t img_sz; + int rc; + + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + hdr = boot_img_hdr(state, active_slot); + + if (hdr->ih_flags & IMAGE_F_RAM_LOAD) { + + img_dst = hdr->ih_load_addr; + + rc = boot_read_image_size(state, active_slot, &img_sz); + if (rc != 0) { + return rc; + } + + state->slot_usage[BOOT_CURR_IMG(state)].img_dst = img_dst; + state->slot_usage[BOOT_CURR_IMG(state)].img_sz = img_sz; + + rc = boot_verify_ram_load_address(state); + if (rc != 0) { + BOOT_LOG_INF("Image %d RAM load address 0x%x is invalid.", BOOT_CURR_IMG(state), img_dst); + return rc; + } + +#if (BOOT_IMAGE_NUMBER > 1) + rc = boot_check_ram_load_overlapping(state); + if (rc != 0) { + BOOT_LOG_INF("Image %d RAM loading to address 0x%x would overlap with\ + another image.", BOOT_CURR_IMG(state), img_dst); + return rc; + } +#endif +#ifdef MCUBOOT_ENC_IMAGES + /* decrypt image if encrypted and copy it to RAM */ + if (IS_ENCRYPTED(hdr)) { + rc = boot_decrypt_and_copy_image_to_sram(state, active_slot, hdr, img_sz, img_dst); + } else { + rc = boot_copy_image_to_sram(state, active_slot, img_dst, img_sz); + } +#else + /* Copy image to the load address from where it currently resides in + * flash. + */ + rc = boot_copy_image_to_sram(state, active_slot, img_dst, img_sz); +#endif + if (rc != 0) { + BOOT_LOG_INF("Image %d RAM loading to 0x%x is failed.", BOOT_CURR_IMG(state), img_dst); + } else { + BOOT_LOG_INF("Image %d RAM loading to 0x%x is succeeded.", BOOT_CURR_IMG(state), img_dst); + } + } else { + /* Only images that support IMAGE_F_RAM_LOAD are allowed if + * MCUBOOT_RAM_LOAD is set. + */ + rc = BOOT_EBADIMAGE; + } + + if (rc != 0) { + state->slot_usage[BOOT_CURR_IMG(state)].img_dst = 0; + state->slot_usage[BOOT_CURR_IMG(state)].img_sz = 0; + } + + return rc; +} + +/** + * Removes an image from SRAM, by overwriting it with zeros. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static inline int +boot_remove_image_from_sram(struct boot_loader_state *state) +{ + (void)state; + + BOOT_LOG_INF("Removing image %d from SRAM at address 0x%x", + BOOT_CURR_IMG(state), + state->slot_usage[BOOT_CURR_IMG(state)].img_dst); + + memset((void*)(IMAGE_RAM_BASE + state->slot_usage[BOOT_CURR_IMG(state)].img_dst), + 0, state->slot_usage[BOOT_CURR_IMG(state)].img_sz); + + state->slot_usage[BOOT_CURR_IMG(state)].img_dst = 0; + state->slot_usage[BOOT_CURR_IMG(state)].img_sz = 0; + + return 0; +} + +/** + * Removes an image from flash by erasing the corresponding flash area + * + * @param state Boot loader status information. + * @param slot The flash slot of the image to be erased. + * + * @return 0 on success; nonzero on failure. + */ +static inline int +boot_remove_image_from_flash(struct boot_loader_state *state, uint32_t slot) +{ + int area_id; + int rc; + const struct flash_area *fap; + + (void)state; + + BOOT_LOG_INF("Removing image %d slot %d from flash", BOOT_CURR_IMG(state), + slot); + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap); + if (rc == 0) { + flash_area_erase(fap, 0, flash_area_get_size(fap)); + flash_area_close(fap); + } + + return rc; +} +#endif /* MCUBOOT_RAM_LOAD */ + + +/** + * Tries to load a slot for all the images with validation. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +fih_ret +boot_load_and_validate_images(struct boot_loader_state *state) +{ + uint32_t active_slot; + int rc; + fih_ret fih_rc; + + /* Go over all the images and try to load one */ + IMAGES_ITER(BOOT_CURR_IMG(state)) { + /* All slots tried until a valid image found. Breaking from this loop + * means that a valid image found or already loaded. If no slot is + * found the function returns with error code. */ + while (true) { + /* Go over all the slots and try to load one */ + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + if (active_slot != NO_ACTIVE_SLOT){ + /* A slot is already active, go to next image. */ + break; + } + + active_slot = find_slot_with_highest_version(state); + if (active_slot == NO_ACTIVE_SLOT) { + BOOT_LOG_INF("No slot to load for image %d", + BOOT_CURR_IMG(state)); + FIH_RET(FIH_FAILURE); + } + + /* Save the number of the active slot. */ + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = active_slot; + +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif + +#ifdef MCUBOOT_DIRECT_XIP + rc = boot_rom_address_check(state); + if (rc != 0) { + /* The image is placed in an unsuitable slot. */ + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[active_slot] = false; + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + continue; + } + +#ifdef MCUBOOT_DIRECT_XIP_REVERT + rc = boot_select_or_erase(state); + if (rc != 0) { + /* The selected image slot has been erased. */ + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[active_slot] = false; + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + continue; + } +#endif /* MCUBOOT_DIRECT_XIP_REVERT */ +#endif /* MCUBOOT_DIRECT_XIP */ + +#ifdef MCUBOOT_RAM_LOAD + /* Image is first loaded to RAM and authenticated there in order to + * prevent TOCTOU attack during image copy. This could be applied + * when loading images from external (untrusted) flash to internal + * (trusted) RAM and image is authenticated before copying. + */ + rc = boot_load_image_to_sram(state); + if (rc != 0 ) { + /* Image cannot be ramloaded. */ + boot_remove_image_from_flash(state, active_slot); + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[active_slot] = false; + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + continue; + } +#endif /* MCUBOOT_RAM_LOAD */ + + FIH_CALL(boot_validate_slot, fih_rc, state, active_slot, NULL); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + /* Image is invalid. */ +#ifdef MCUBOOT_RAM_LOAD + boot_remove_image_from_sram(state); +#endif /* MCUBOOT_RAM_LOAD */ + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[active_slot] = false; + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + continue; + } + + /* Valid image loaded from a slot, go to next image. */ + break; + } + } + + FIH_RET(FIH_SUCCESS); +} + +/** + * Updates the security counter for the current image. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_update_hw_rollback_protection(struct boot_loader_state *state) +{ +#ifdef MCUBOOT_HW_ROLLBACK_PROT + int rc; + + /* Update the stored security counter with the newer (active) image's + * security counter value. + */ +#if defined(MCUBOOT_DIRECT_XIP) && defined(MCUBOOT_DIRECT_XIP_REVERT) + /* When the 'revert' mechanism is enabled in direct-xip mode, the + * security counter can be increased only after reboot, if the image + * has been confirmed at runtime (the image_ok flag has been set). + * This way a 'revert' can be performed when it's necessary. + */ + if (state->slot_usage[BOOT_CURR_IMG(state)].swap_state.image_ok == BOOT_FLAG_SET) { +#endif + rc = boot_update_security_counter(BOOT_CURR_IMG(state), + state->slot_usage[BOOT_CURR_IMG(state)].active_slot, + boot_img_hdr(state, state->slot_usage[BOOT_CURR_IMG(state)].active_slot)); + if (rc != 0) { + BOOT_LOG_ERR("Security counter update failed after image %d validation.", BOOT_CURR_IMG(state)); + return rc; + } +#if defined(MCUBOOT_DIRECT_XIP) && defined(MCUBOOT_DIRECT_XIP_REVERT) + } +#endif + + return 0; + +#else /* MCUBOOT_HW_ROLLBACK_PROT */ + (void) (state); + return 0; +#endif +} + +fih_ret +context_boot_go(struct boot_loader_state *state, struct boot_rsp *rsp) +{ + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + rc = boot_get_slot_usage(state); + if (rc != 0) { + goto out; + } + +#if (BOOT_IMAGE_NUMBER > 1) + while (true) { +#endif + FIH_CALL(boot_load_and_validate_images, fih_rc, state); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + +#if (BOOT_IMAGE_NUMBER > 1) + rc = boot_verify_dependencies(state); + if (rc != 0) { + /* Dependency check failed for an image, it has been removed from + * SRAM in case of MCUBOOT_RAM_LOAD strategy, and set to + * unavailable. Try to load an image from another slot. + */ + continue; + } + /* Dependency check was successful. */ + break; + } +#endif + + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif + rc = boot_update_hw_rollback_protection(state); + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + + rc = boot_add_shared_data(state, (uint8_t)state->slot_usage[BOOT_CURR_IMG(state)].active_slot); + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + } + + /* All image loaded successfully. */ +#ifdef MCUBOOT_HAVE_LOGGING + print_loaded_images(state); +#endif + + fill_rsp(state, rsp); + +out: + close_all_flash_areas(state); + + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + } + + FIH_RET(fih_rc); +} +#endif /* MCUBOOT_DIRECT_XIP || MCUBOOT_RAM_LOAD */ + +/** + * Prepares the booting process. This function moves images around in flash as + * appropriate, and tells you what address to boot from. + * + * @param rsp On success, indicates how booting should occur. + * + * @return FIH_SUCCESS on success; nonzero on failure. + */ +fih_ret +boot_go(struct boot_rsp *rsp) +{ + FIH_DECLARE(fih_rc, FIH_FAILURE); + + boot_state_clear(NULL); + + FIH_CALL(context_boot_go, fih_rc, &boot_data, rsp); + FIH_RET(fih_rc); +} + +/** + * Prepares the booting process, considering only a single image. This function + * moves images around in flash as appropriate, and tells you what address to + * boot from. + * + * @param rsp On success, indicates how booting should occur. + * + * @param image_id The image ID to prepare the boot process for. + * + * @return FIH_SUCCESS on success; nonzero on failure. + */ +fih_ret +boot_go_for_image_id(struct boot_rsp *rsp, uint32_t image_id) +{ + FIH_DECLARE(fih_rc, FIH_FAILURE); + + if (image_id >= BOOT_IMAGE_NUMBER) { + FIH_RET(FIH_FAILURE); + } + +#if BOOT_IMAGE_NUMBER > 1 + memset(&boot_data.img_mask, 1, BOOT_IMAGE_NUMBER); + boot_data.img_mask[image_id] = 0; +#endif + + FIH_CALL(context_boot_go, fih_rc, &boot_data, rsp); + FIH_RET(fih_rc); +} + +/** + * Clears the boot state, so that previous operations have no effect on new + * ones. + * + * @param state The state that should be cleared. If the value + * is NULL, the default bootloader state will be + * cleared. + */ +void boot_state_clear(struct boot_loader_state *state) +{ + if (state != NULL) { + memset(state, 0, sizeof(struct boot_loader_state)); + } else { + memset(&boot_data, 0, sizeof(struct boot_loader_state)); + } +} + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) +/** + * Reads image data to find out the maximum application sizes. Only needs to + * be called in serial recovery mode, as the state information is unpopulated + * at that time + */ +static void boot_fetch_slot_state_sizes(void) +{ + size_t slot; + int rc = -1; + int fa_id; + int image_index; + + IMAGES_ITER(BOOT_CURR_IMG(&boot_data)) { + int max_size = 0; + + image_index = BOOT_CURR_IMG(&boot_data); + + BOOT_IMG(&boot_data, BOOT_PRIMARY_SLOT).sectors = + sector_buffers.primary[image_index]; + BOOT_IMG(&boot_data, BOOT_SECONDARY_SLOT).sectors = + sector_buffers.secondary[image_index]; +#if MCUBOOT_SWAP_USING_SCRATCH + boot_data.scratch.sectors = sector_buffers.scratch; +#endif + + /* Open primary and secondary image areas for the duration + * of this call. + */ + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + fa_id = flash_area_id_from_multi_image_slot(image_index, slot); + rc = flash_area_open(fa_id, &BOOT_IMG_AREA(&boot_data, slot)); + assert(rc == 0); + + if (rc != 0) { + goto finish; + } + } + +#if MCUBOOT_SWAP_USING_SCRATCH + rc = flash_area_open(FLASH_AREA_IMAGE_SCRATCH, + &BOOT_SCRATCH_AREA(&boot_data)); + assert(rc == 0); + + if (rc != 0) { + goto finish; + } +#endif + + /* Determine the sector layout of the image slots and scratch area. */ + rc = boot_read_sectors_recovery(&boot_data); + + if (rc == 0) { + max_size = app_max_size(&boot_data); + + if (max_size > 0) { + image_max_sizes[image_index].calculated = true; + image_max_sizes[image_index].max_size = max_size; + } + } + } + +finish: + close_all_flash_areas(&boot_data); + memset(&boot_data, 0x00, sizeof(boot_data)); +} +#endif + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) || defined(MCUBOOT_DATA_SHARING) +/** + * Fetches the maximum allowed size of the image + */ +const struct image_max_size *boot_get_max_app_size(void) +{ +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) + uint8_t i = 0; + + while (i < BOOT_IMAGE_NUMBER) { + if (image_max_sizes[i].calculated == true) { + break; + } + + ++i; + } + + if (i == BOOT_IMAGE_NUMBER) { + /* Information not available, need to fetch it */ + boot_fetch_slot_state_sizes(); + } +#endif + + return image_max_sizes; +} +#endif diff --git a/bootloader/mcuboot/boot/bootutil/src/loader_legacy_child_parent.c b/bootloader/mcuboot/boot/bootutil/src/loader_legacy_child_parent.c new file mode 100644 index 0000000..53f40c3 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/loader_legacy_child_parent.c @@ -0,0 +1,3896 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2016-2020 Linaro LTD + * Copyright (c) 2016-2019 JUUL Labs + * Copyright (c) 2019-2023 Arm Limited + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * Original license: + * + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +/** + * This file provides an interface to the boot loader. Functions defined in + * this file should only be called while the boot loader is running. + */ + +#include +#include +#include +#include +#include +#include "bootutil/bootutil.h" +#include "bootutil/bootutil_public.h" +#include "bootutil/image.h" +#include "bootutil_priv.h" +#include "swap_priv.h" +#include "bootutil/bootutil_log.h" +#include "bootutil/security_cnt.h" +#include "bootutil/boot_record.h" +#include "bootutil/fault_injection_hardening.h" +#include "bootutil/ramload.h" +#include "bootutil/boot_hooks.h" +#include "bootutil/mcuboot_status.h" + +#if defined(MCUBOOT_DECOMPRESS_IMAGES) +#include +#include +#endif + +#ifdef __ZEPHYR__ +#include +#endif + +#if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(PM_CPUNET_B0N_ADDRESS) +#include +#ifdef CONFIG_PCD_READ_NETCORE_APP_VERSION +#include +int pcd_version_cmp_net(const struct flash_area *fap, struct image_header *hdr); +#endif +#endif + +#ifdef MCUBOOT_ENC_IMAGES +#include "bootutil/enc_key.h" +#endif + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) +#include +#endif + +#include "mcuboot_config/mcuboot_config.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +static struct boot_loader_state boot_data; +#ifdef PM_S1_ADDRESS +static bool owner_nsib[BOOT_IMAGE_NUMBER] = {false}; +#endif + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) || defined(MCUBOOT_DATA_SHARING) +static struct image_max_size image_max_sizes[BOOT_IMAGE_NUMBER] = {0}; +#endif + +#if (!defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD)) || \ +defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) +#if !defined(__BOOTSIM__) +/* Used for holding static buffers in multiple functions to work around issues + * in older versions of gcc (e.g. 4.8.4) + */ +struct sector_buffer_t { + boot_sector_t primary[BOOT_IMAGE_NUMBER][BOOT_MAX_IMG_SECTORS]; + boot_sector_t secondary[BOOT_IMAGE_NUMBER][BOOT_MAX_IMG_SECTORS]; +#if MCUBOOT_SWAP_USING_SCRATCH + boot_sector_t scratch[BOOT_MAX_IMG_SECTORS]; +#endif +}; + +static struct sector_buffer_t sector_buffers; +#endif +#endif + +#if (BOOT_IMAGE_NUMBER > 1) +#define IMAGES_ITER(x) for ((x) = 0; (x) < BOOT_IMAGE_NUMBER; ++(x)) +#else +#define IMAGES_ITER(x) +#endif + +/* + * This macro allows some control on the allocation of local variables. + * When running natively on a target, we don't want to allocated huge + * variables on the stack, so make them global instead. For the simulator + * we want to run as many threads as there are tests, and it's safer + * to just make those variables stack allocated. + */ +#if !defined(__BOOTSIM__) +#define TARGET_STATIC static +#else +#define TARGET_STATIC +#endif + +#if BOOT_MAX_ALIGN > 1024 +#define BUF_SZ BOOT_MAX_ALIGN +#else +#define BUF_SZ 1024 +#endif + +#define NO_ACTIVE_SLOT UINT32_MAX + +static int +boot_read_image_headers(struct boot_loader_state *state, bool require_all, + struct boot_status *bs) +{ + int rc; + int i; + + for (i = 0; i < BOOT_NUM_SLOTS; i++) { + rc = BOOT_HOOK_CALL(boot_read_image_header_hook, BOOT_HOOK_REGULAR, + BOOT_CURR_IMG(state), i, boot_img_hdr(state, i)); + if (rc == BOOT_HOOK_REGULAR) + { + rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs); + } + if (rc != 0) { + /* If `require_all` is set, fail on any single fail, otherwise + * if at least the first slot's header was read successfully, + * then the boot loader can attempt a boot. + * + * Failure to read any headers is a fatal error. + */ +#ifdef PM_S1_ADDRESS + /* Patch needed for NCS. The primary slot of the second image + * (image 1) will not contain a valid image header until an upgrade + * of mcuboot has happened (filling S1 with the new version). + */ + if (BOOT_CURR_IMG(state) == 1 && i == 0) { + continue; + } +#endif /* PM_S1_ADDRESS */ + if (i > 0 && !require_all) { + return 0; + } else { + return rc; + } + } + } + + return 0; +} + +/** + * Saves boot status and shared data for current image. + * + * @param state Boot loader status information. + * @param active_slot Index of the slot will be loaded for current image. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_add_shared_data(struct boot_loader_state *state, + uint8_t active_slot) +{ +#if defined(MCUBOOT_MEASURED_BOOT) || defined(MCUBOOT_DATA_SHARING) + int rc; + +#ifdef MCUBOOT_MEASURED_BOOT + rc = boot_save_boot_status(BOOT_CURR_IMG(state), + boot_img_hdr(state, active_slot), + BOOT_IMG_AREA(state, active_slot)); + if (rc != 0) { + BOOT_LOG_ERR("Failed to add image data to shared area"); + return rc; + } +#endif /* MCUBOOT_MEASURED_BOOT */ + +#ifdef MCUBOOT_DATA_SHARING + rc = boot_save_shared_data(boot_img_hdr(state, active_slot), + BOOT_IMG_AREA(state, active_slot), + active_slot, image_max_sizes); + if (rc != 0) { + BOOT_LOG_ERR("Failed to add data to shared memory area."); + return rc; + } +#endif /* MCUBOOT_DATA_SHARING */ + + return 0; + +#else /* MCUBOOT_MEASURED_BOOT || MCUBOOT_DATA_SHARING */ + (void) (state); + (void) (active_slot); + + return 0; +#endif +} + +/** + * Fills rsp to indicate how booting should occur. + * + * @param state Boot loader status information. + * @param rsp boot_rsp struct to fill. + */ +static void +fill_rsp(struct boot_loader_state *state, struct boot_rsp *rsp) +{ + uint32_t active_slot; + +#if (BOOT_IMAGE_NUMBER > 1) + /* Always boot from the first enabled image. */ + BOOT_CURR_IMG(state) = 0; + IMAGES_ITER(BOOT_CURR_IMG(state)) { + if (!state->img_mask[BOOT_CURR_IMG(state)]) { + break; + } + } + /* At least one image must be active, otherwise skip the execution */ + if (BOOT_CURR_IMG(state) >= BOOT_IMAGE_NUMBER) { + return; + } +#endif + +#if defined(MCUBOOT_DIRECT_XIP) || defined(MCUBOOT_RAM_LOAD) + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; +#else + active_slot = BOOT_PRIMARY_SLOT; +#endif + + rsp->br_flash_dev_id = flash_area_get_device_id(BOOT_IMG_AREA(state, active_slot)); + rsp->br_image_off = boot_img_slot_off(state, active_slot); + rsp->br_hdr = boot_img_hdr(state, active_slot); +} + +/** + * Closes all flash areas. + * + * @param state Boot loader status information. + */ +static void +close_all_flash_areas(struct boot_loader_state *state) +{ + uint32_t slot; + + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif +#if MCUBOOT_SWAP_USING_SCRATCH + flash_area_close(BOOT_SCRATCH_AREA(state)); +#endif + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + flash_area_close(BOOT_IMG_AREA(state, BOOT_NUM_SLOTS - 1 - slot)); + } + } +} + +#if (BOOT_IMAGE_NUMBER > 1) || \ + defined(MCUBOOT_DIRECT_XIP) || \ + defined(MCUBOOT_RAM_LOAD) || \ + defined(MCUBOOT_DOWNGRADE_PREVENTION) +/** + * Compare image version numbers + * + * By default, the comparison does not take build number into account. + * Enable MCUBOOT_VERSION_CMP_USE_BUILD_NUMBER to take the build number into account. + * + * @param ver1 Pointer to the first image version to compare. + * @param ver2 Pointer to the second image version to compare. + * + * @retval -1 If ver1 is less than ver2. + * @retval 0 If the image version numbers are equal. + * @retval 1 If ver1 is greater than ver2. + */ +static int +boot_version_cmp(const struct image_version *ver1, + const struct image_version *ver2) +{ + if (ver1->iv_major > ver2->iv_major) { + return 1; + } + if (ver1->iv_major < ver2->iv_major) { + return -1; + } + /* The major version numbers are equal, continue comparison. */ + if (ver1->iv_minor > ver2->iv_minor) { + return 1; + } + if (ver1->iv_minor < ver2->iv_minor) { + return -1; + } + /* The minor version numbers are equal, continue comparison. */ + if (ver1->iv_revision > ver2->iv_revision) { + return 1; + } + if (ver1->iv_revision < ver2->iv_revision) { + return -1; + } + +#if defined(MCUBOOT_VERSION_CMP_USE_BUILD_NUMBER) + /* The revisions are equal, continue comparison. */ + if (ver1->iv_build_num > ver2->iv_build_num) { + return 1; + } + if (ver1->iv_build_num < ver2->iv_build_num) { + return -1; + } +#endif + + return 0; +} +#endif + +#if (!defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD)) || \ +defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) +static int +boot_initialize_area(struct boot_loader_state *state, int flash_area) +{ + uint32_t num_sectors = BOOT_MAX_IMG_SECTORS; + boot_sector_t *out_sectors; + uint32_t *out_num_sectors; + int rc; + + num_sectors = BOOT_MAX_IMG_SECTORS; + + if (flash_area == FLASH_AREA_IMAGE_PRIMARY(BOOT_CURR_IMG(state))) { + out_sectors = BOOT_IMG(state, BOOT_PRIMARY_SLOT).sectors; + out_num_sectors = &BOOT_IMG(state, BOOT_PRIMARY_SLOT).num_sectors; + } else if (flash_area == FLASH_AREA_IMAGE_SECONDARY(BOOT_CURR_IMG(state))) { + out_sectors = BOOT_IMG(state, BOOT_SECONDARY_SLOT).sectors; + out_num_sectors = &BOOT_IMG(state, BOOT_SECONDARY_SLOT).num_sectors; +#if MCUBOOT_SWAP_USING_SCRATCH + } else if (flash_area == FLASH_AREA_IMAGE_SCRATCH) { + out_sectors = state->scratch.sectors; + out_num_sectors = &state->scratch.num_sectors; +#endif + } else { + return BOOT_EFLASH; + } + +#ifdef MCUBOOT_USE_FLASH_AREA_GET_SECTORS + rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors); +#else + _Static_assert(sizeof(int) <= sizeof(uint32_t), "Fix needed"); + rc = flash_area_to_sectors(flash_area, (int *)&num_sectors, out_sectors); +#endif /* defined(MCUBOOT_USE_FLASH_AREA_GET_SECTORS) */ + if (rc != 0) { + return rc; + } + *out_num_sectors = num_sectors; + return 0; +} +#endif + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) +static int +boot_read_sectors_recovery(struct boot_loader_state *state) +{ + uint8_t image_index; + int rc; + + image_index = BOOT_CURR_IMG(state); + + rc = boot_initialize_area(state, FLASH_AREA_IMAGE_PRIMARY(image_index)); + if (rc != 0) { + return BOOT_EFLASH; + } + + rc = boot_initialize_area(state, FLASH_AREA_IMAGE_SECONDARY(image_index)); + if (rc != 0) { + /* We need to differentiate from the primary image issue */ + return BOOT_EFLASH_SEC; + } + + return 0; +} +#endif + + +#if (BOOT_IMAGE_NUMBER > 1) + +static int +boot_verify_slot_dependencies(struct boot_loader_state *state, uint32_t slot); + +/** + * Check the image dependency whether it is satisfied and modify + * the swap type if necessary. + * + * @param dep Image dependency which has to be verified. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_verify_slot_dependency(struct boot_loader_state *state, + struct image_dependency *dep) +{ + struct image_version *dep_version; + size_t dep_slot; + int rc; + + /* Determine the source of the image which is the subject of + * the dependency and get it's version. */ +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) + uint8_t swap_type = state->swap_type[dep->image_id]; + dep_slot = BOOT_IS_UPGRADE(swap_type) ? BOOT_SECONDARY_SLOT + : BOOT_PRIMARY_SLOT; +#else + dep_slot = state->slot_usage[dep->image_id].active_slot; +#endif + + dep_version = &state->imgs[dep->image_id][dep_slot].hdr.ih_ver; + + rc = boot_version_cmp(dep_version, &dep->image_min_version); +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) + if (rc < 0) { + /* Dependency not satisfied. + * Modify the swap type to decrease the version number of the image + * (which will be located in the primary slot after the boot process), + * consequently the number of unsatisfied dependencies will be + * decreased or remain the same. + */ + switch (BOOT_SWAP_TYPE(state)) { + case BOOT_SWAP_TYPE_TEST: + case BOOT_SWAP_TYPE_PERM: + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + break; + case BOOT_SWAP_TYPE_NONE: + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_REVERT; + break; + default: + break; + } + } else { + /* Dependency satisfied. */ + rc = 0; + } +#else + if (rc >= 0) { + /* Dependency satisfied. */ + rc = 0; + } +#endif + + return rc; +} + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) +/** + * Iterate over all the images and verify whether the image dependencies in the + * TLV area are all satisfied and update the related swap type if necessary. + */ +static int +boot_verify_dependencies(struct boot_loader_state *state) +{ + int rc = -1; + uint8_t slot; + + BOOT_CURR_IMG(state) = 0; + while (BOOT_CURR_IMG(state) < BOOT_IMAGE_NUMBER) { + if (state->img_mask[BOOT_CURR_IMG(state)]) { + BOOT_CURR_IMG(state)++; + continue; + } + if (BOOT_SWAP_TYPE(state) != BOOT_SWAP_TYPE_NONE && + BOOT_SWAP_TYPE(state) != BOOT_SWAP_TYPE_FAIL) { + slot = BOOT_SECONDARY_SLOT; + } else { + slot = BOOT_PRIMARY_SLOT; + } + + rc = boot_verify_slot_dependencies(state, slot); + if (rc == 0) { + /* All dependencies've been satisfied, continue with next image. */ + BOOT_CURR_IMG(state)++; + } else if (rc == BOOT_EBADIMAGE) { + /* Cannot upgrade due to non-met dependencies, so disable all + * image upgrades. + */ + for (int idx = 0; idx < BOOT_IMAGE_NUMBER; idx++) { + BOOT_CURR_IMG(state) = idx; + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + } + break; + } else { + /* Other error happened, images are inconsistent */ + return rc; + } + } + return rc; +} +#else + +#if defined MCUBOOT_RAM_LOAD +static inline int +boot_remove_image_from_sram(struct boot_loader_state *state); +#endif + +/** + * Checks the dependency of all the active slots. If an image found with + * invalid or not satisfied dependencies the image is removed from SRAM (in + * case of MCUBOOT_RAM_LOAD strategy) and its slot is set to unavailable. + * + * @param state Boot loader status information. + * + * @return 0 if dependencies are met; nonzero otherwise. + */ +static int +boot_verify_dependencies(struct boot_loader_state *state) +{ + int rc = -1; + uint32_t active_slot; + + IMAGES_ITER(BOOT_CURR_IMG(state)) { + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + rc = boot_verify_slot_dependencies(state, active_slot); + if (rc != 0) { + /* Dependencies not met or invalid dependencies. */ + +#ifdef MCUBOOT_RAM_LOAD + boot_remove_image_from_sram(state); +#endif /* MCUBOOT_RAM_LOAD */ + + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[active_slot] = false; + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + + return rc; + } + } + + return rc; +} +#endif + +/** + * Read all dependency TLVs of an image from the flash and verify + * one after another to see if they are all satisfied. + * + * @param slot Image slot number. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_verify_slot_dependencies(struct boot_loader_state *state, uint32_t slot) +{ + const struct flash_area *fap; + struct image_tlv_iter it; + struct image_dependency dep; + uint32_t off; + uint16_t len; + int area_id; + int rc; + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + rc = bootutil_tlv_iter_begin(&it, boot_img_hdr(state, slot), fap, + IMAGE_TLV_DEPENDENCY, true); + if (rc != 0) { + goto done; + } + + while (true) { + rc = bootutil_tlv_iter_next(&it, &off, &len, NULL); + if (rc < 0) { + return -1; + } else if (rc > 0) { + rc = 0; + break; + } + + if (len != sizeof(dep)) { + rc = BOOT_EBADIMAGE; + goto done; + } + + rc = LOAD_IMAGE_DATA(boot_img_hdr(state, slot), + fap, off, &dep, len); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + if (dep.image_id >= BOOT_IMAGE_NUMBER) { + rc = BOOT_EBADARGS; + goto done; + } + + /* Verify dependency and modify the swap type if not satisfied. */ + rc = boot_verify_slot_dependency(state, &dep); + if (rc != 0) { + /* Dependency not satisfied */ + goto done; + } + } + +done: + flash_area_close(fap); + return rc; +} + +#endif /* (BOOT_IMAGE_NUMBER > 1) */ + +#if !defined(MCUBOOT_DIRECT_XIP) +/* + * Compute the total size of the given image. Includes the size of + * the TLVs. + */ +#if !defined(MCUBOOT_OVERWRITE_ONLY) || defined(MCUBOOT_OVERWRITE_ONLY_FAST) +static int +boot_read_image_size(struct boot_loader_state *state, int slot, uint32_t *size) +{ + const struct flash_area *fap; + struct image_tlv_info info; + uint32_t off; + uint32_t protect_tlv_size; + int area_id; + int rc; + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + +#ifdef MCUBOOT_DECOMPRESS_IMAGES + if (MUST_DECOMPRESS(fap, BOOT_CURR_IMG(state), boot_img_hdr(state, slot))) { + uint32_t tmp_size = 0; + + rc = bootutil_get_img_decomp_size(boot_img_hdr(state, slot), fap, &tmp_size); + + if (rc) { + rc = BOOT_EBADIMAGE; + goto done; + } + + off = boot_img_hdr(state, slot)->ih_hdr_size + tmp_size; + + rc = boot_size_protected_tlvs(boot_img_hdr(state, slot), fap, &tmp_size); + + if (rc) { + rc = BOOT_EBADIMAGE; + goto done; + } + + off += tmp_size; + + if (flash_area_read(fap, (BOOT_TLV_OFF(boot_img_hdr(state, slot)) + + boot_img_hdr(state, slot)->ih_protect_tlv_size), &info, + sizeof(info))) { + rc = BOOT_EFLASH; + goto done; + } + + if (info.it_magic != IMAGE_TLV_INFO_MAGIC) { + rc = BOOT_EBADIMAGE; + goto done; + } + + *size = off + info.it_tlv_tot; + } else { +#else + if (1) { +#endif + off = BOOT_TLV_OFF(boot_img_hdr(state, slot)); + + if (flash_area_read(fap, off, &info, sizeof(info))) { + rc = BOOT_EFLASH; + goto done; + } + + protect_tlv_size = boot_img_hdr(state, slot)->ih_protect_tlv_size; + if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) { + if (protect_tlv_size != info.it_tlv_tot) { + rc = BOOT_EBADIMAGE; + goto done; + } + + if (flash_area_read(fap, off + info.it_tlv_tot, &info, sizeof(info))) { + rc = BOOT_EFLASH; + goto done; + } + } else if (protect_tlv_size != 0) { + rc = BOOT_EBADIMAGE; + goto done; + } + + if (info.it_magic != IMAGE_TLV_INFO_MAGIC) { + rc = BOOT_EBADIMAGE; + goto done; + } + + *size = off + protect_tlv_size + info.it_tlv_tot; + } + + rc = 0; + +done: + flash_area_close(fap); + return rc; +} +#endif /* !MCUBOOT_OVERWRITE_ONLY */ + +#if !defined(MCUBOOT_RAM_LOAD) +static uint32_t +boot_write_sz(struct boot_loader_state *state) +{ + uint32_t elem_sz; +#if MCUBOOT_SWAP_USING_SCRATCH + uint32_t align; +#endif + + /* Figure out what size to write update status update as. The size depends + * on what the minimum write size is for scratch area, active image slot. + * We need to use the bigger of those 2 values. + */ + elem_sz = flash_area_align(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT)); +#if MCUBOOT_SWAP_USING_SCRATCH + align = flash_area_align(BOOT_SCRATCH_AREA(state)); + if (align > elem_sz) { + elem_sz = align; + } +#endif + + return elem_sz; +} + +/** + * Determines the sector layout of both image slots and the scratch area. + * This information is necessary for calculating the number of bytes to erase + * and copy during an image swap. The information collected during this + * function is used to populate the state. + */ +static int +boot_read_sectors(struct boot_loader_state *state) +{ + uint8_t image_index; + int rc; + + image_index = BOOT_CURR_IMG(state); + + rc = boot_initialize_area(state, FLASH_AREA_IMAGE_PRIMARY(image_index)); + if (rc != 0) { + return BOOT_EFLASH; + } + + rc = boot_initialize_area(state, FLASH_AREA_IMAGE_SECONDARY(image_index)); + if (rc != 0) { + /* We need to differentiate from the primary image issue */ + return BOOT_EFLASH_SEC; + } + +#if MCUBOOT_SWAP_USING_SCRATCH + rc = boot_initialize_area(state, FLASH_AREA_IMAGE_SCRATCH); + if (rc != 0) { + return BOOT_EFLASH; + } +#endif + + BOOT_WRITE_SZ(state) = boot_write_sz(state); + + return 0; +} + +void +boot_status_reset(struct boot_status *bs) +{ +#ifdef MCUBOOT_ENC_IMAGES + memset(&bs->enckey, 0xff, BOOT_NUM_SLOTS * BOOT_ENC_KEY_ALIGN_SIZE); +#if MCUBOOT_SWAP_SAVE_ENCTLV + memset(&bs->enctlv, 0xff, BOOT_NUM_SLOTS * BOOT_ENC_TLV_ALIGN_SIZE); +#endif +#endif /* MCUBOOT_ENC_IMAGES */ + + bs->use_scratch = 0; + bs->swap_size = 0; + bs->source = 0; + + bs->op = BOOT_STATUS_OP_MOVE; + bs->idx = BOOT_STATUS_IDX_0; + bs->state = BOOT_STATUS_STATE_0; + bs->swap_type = BOOT_SWAP_TYPE_NONE; +} + +bool +boot_status_is_reset(const struct boot_status *bs) +{ + return (bs->op == BOOT_STATUS_OP_MOVE && + bs->idx == BOOT_STATUS_IDX_0 && + bs->state == BOOT_STATUS_STATE_0); +} + +/** + * Writes the supplied boot status to the flash file system. The boot status + * contains the current state of an in-progress image copy operation. + * + * @param bs The boot status to write. + * + * @return 0 on success; nonzero on failure. + */ +int +boot_write_status(const struct boot_loader_state *state, struct boot_status *bs) +{ + const struct flash_area *fap; + uint32_t off; + int area_id; + int rc = 0; + uint8_t buf[BOOT_MAX_ALIGN]; + uint32_t align; + uint8_t erased_val; + + /* NOTE: The first sector copied (that is the last sector on slot) contains + * the trailer. Since in the last step the primary slot is erased, the + * first two status writes go to the scratch which will be copied to + * the primary slot! + */ + +#if MCUBOOT_SWAP_USING_SCRATCH + if (bs->use_scratch) { + /* Write to scratch. */ + area_id = FLASH_AREA_IMAGE_SCRATCH; + } else { +#endif + /* Write to the primary slot. */ + area_id = FLASH_AREA_IMAGE_PRIMARY(BOOT_CURR_IMG(state)); +#if MCUBOOT_SWAP_USING_SCRATCH + } +#endif + + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + return BOOT_EFLASH; + } + + off = boot_status_off(fap) + + boot_status_internal_off(bs, BOOT_WRITE_SZ(state)); + align = flash_area_align(fap); + erased_val = flash_area_erased_val(fap); + memset(buf, erased_val, BOOT_MAX_ALIGN); + buf[0] = bs->state; + + BOOT_LOG_DBG("writing swap status; fa_id=%d off=0x%lx (0x%lx)", + flash_area_get_id(fap), (unsigned long)off, + (unsigned long)flash_area_get_off(fap) + off); + + rc = flash_area_write(fap, off, buf, align); + if (rc != 0) { + rc = BOOT_EFLASH; + } + + flash_area_close(fap); + + return rc; +} +#endif /* !MCUBOOT_RAM_LOAD */ +#endif /* !MCUBOOT_DIRECT_XIP */ + +/* + * Validate image hash/signature and optionally the security counter in a slot. + */ +static fih_ret +boot_image_check(struct boot_loader_state *state, struct image_header *hdr, + const struct flash_area *fap, struct boot_status *bs) +{ + TARGET_STATIC uint8_t tmpbuf[BOOT_TMPBUF_SZ]; + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + (void)bs; + (void)rc; + +/* In the case of ram loading the image has already been decrypted as it is + * decrypted when copied in ram */ +#if defined(MCUBOOT_ENC_IMAGES) && !defined(MCUBOOT_RAM_LOAD) + if (MUST_DECRYPT(fap, BOOT_CURR_IMG(state), hdr)) { + rc = boot_enc_load(BOOT_CURR_ENC(state), 1, hdr, fap, bs); + if (rc < 0) { + FIH_RET(fih_rc); + } + if (rc == 0 && boot_enc_set_key(BOOT_CURR_ENC(state), 1, bs)) { + FIH_RET(fih_rc); + } + } +#endif + + FIH_CALL(bootutil_img_validate, fih_rc, BOOT_CURR_ENC(state), + BOOT_CURR_IMG(state), hdr, fap, tmpbuf, BOOT_TMPBUF_SZ, + NULL, 0, NULL); + + FIH_RET(fih_rc); +} + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) +static fih_ret +split_image_check(struct image_header *app_hdr, + const struct flash_area *app_fap, + struct image_header *loader_hdr, + const struct flash_area *loader_fap) +{ + static void *tmpbuf; + uint8_t loader_hash[32]; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + if (!tmpbuf) { + tmpbuf = malloc(BOOT_TMPBUF_SZ); + if (!tmpbuf) { + goto out; + } + } + + FIH_CALL(bootutil_img_validate, fih_rc, NULL, 0, loader_hdr, loader_fap, + tmpbuf, BOOT_TMPBUF_SZ, NULL, 0, loader_hash); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_RET(fih_rc); + } + + FIH_CALL(bootutil_img_validate, fih_rc, NULL, 0, app_hdr, app_fap, + tmpbuf, BOOT_TMPBUF_SZ, loader_hash, 32, NULL); + +out: + FIH_RET(fih_rc); +} +#endif /* !MCUBOOT_DIRECT_XIP && !MCUBOOT_RAM_LOAD */ + +/* + * Check that this is a valid header. Valid means that the magic is + * correct, and that the sizes/offsets are "sane". Sane means that + * there is no overflow on the arithmetic, and that the result fits + * within the flash area we are in. Also check the flags in the image + * and class the image as invalid if flags for encryption/compression + * are present but these features are not enabled. + */ +static bool +boot_is_header_valid(const struct image_header *hdr, const struct flash_area *fap, + struct boot_loader_state *state) +{ + uint32_t size; + + (void)state; + + if (hdr->ih_magic != IMAGE_MAGIC) { + return false; + } + + if (!boot_u32_safe_add(&size, hdr->ih_img_size, hdr->ih_hdr_size)) { + return false; + } + +#ifdef MCUBOOT_DECOMPRESS_IMAGES + if (!MUST_DECOMPRESS(fap, BOOT_CURR_IMG(state), hdr)) { +#else + if (1) { +#endif + if (!boot_u32_safe_add(&size, size, hdr->ih_protect_tlv_size)) { + return false; + } + } + + if (size >= flash_area_get_size(fap)) { + return false; + } + +#if !defined(MCUBOOT_ENC_IMAGES) + if (IS_ENCRYPTED(hdr)) { + return false; + } +#else + if ((hdr->ih_flags & IMAGE_F_ENCRYPTED_AES128) && + (hdr->ih_flags & IMAGE_F_ENCRYPTED_AES256)) + { + return false; + } +#endif + +#if !defined(MCUBOOT_DECOMPRESS_IMAGES) + if (IS_COMPRESSED(hdr)) { + return false; + } +#else + if (MUST_DECOMPRESS(fap, BOOT_CURR_IMG(state), hdr)) { + if (!boot_is_compressed_header_valid(hdr, fap, state)) { + return false; + } + } +#endif + + return true; +} + +/* + * Check that a memory area consists of a given value. + */ +static inline bool +boot_data_is_set_to(uint8_t val, void *data, size_t len) +{ + uint8_t i; + uint8_t *p = (uint8_t *)data; + for (i = 0; i < len; i++) { + if (val != p[i]) { + return false; + } + } + return true; +} + +static int +boot_check_header_erased(struct boot_loader_state *state, int slot) +{ + const struct flash_area *fap; + struct image_header *hdr; + uint8_t erased_val; + int area_id; + int rc; + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + return -1; + } + + erased_val = flash_area_erased_val(fap); + flash_area_close(fap); + + hdr = boot_img_hdr(state, slot); + if (!boot_data_is_set_to(erased_val, &hdr->ih_magic, sizeof(hdr->ih_magic))) { + return -1; + } + + return 0; +} + +#if defined(MCUBOOT_DIRECT_XIP) +/** + * Check if image in slot has been set with specific ROM address to run from + * and whether the slot starts at that address. + * + * @returns 0 if IMAGE_F_ROM_FIXED flag is not set; + * 0 if IMAGE_F_ROM_FIXED flag is set and ROM address specified in + * header matches the slot address; + * 1 if IMF_F_ROM_FIXED flag is set but ROM address specified in header + * does not match the slot address. + */ +static bool +boot_rom_address_check(struct boot_loader_state *state) +{ + uint32_t active_slot; + const struct image_header *hdr; + uint32_t f_off; + + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + hdr = boot_img_hdr(state, active_slot); + f_off = boot_img_slot_off(state, active_slot); + + if (hdr->ih_flags & IMAGE_F_ROM_FIXED && hdr->ih_load_addr != f_off) { + BOOT_LOG_WRN("Image in %s slot at 0x%x has been built for offset 0x%x"\ + ", skipping", + active_slot == 0 ? "primary" : "secondary", f_off, + hdr->ih_load_addr); + + /* If there is address mismatch, the image is not bootable from this + * slot. + */ + return 1; + } + return 0; +} +#endif + +/* + * Check that there is a valid image in a slot + * + * @returns + * FIH_SUCCESS if image was successfully validated + * FIH_NO_BOOTABLE_IMAGE if no bootloable image was found + * FIH_FAILURE on any errors + */ +static fih_ret +boot_validate_slot(struct boot_loader_state *state, int slot, + struct boot_status *bs) +{ + const struct flash_area *fap; + struct image_header *hdr; + int area_id; + FIH_DECLARE(fih_rc, FIH_FAILURE); + int rc; + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + FIH_RET(fih_rc); + } + + hdr = boot_img_hdr(state, slot); + if (boot_check_header_erased(state, slot) == 0 || + (hdr->ih_flags & IMAGE_F_NON_BOOTABLE)) { + +#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE) + /* + * This fixes an issue where an image might be erased, but a trailer + * be left behind. It can happen if the image is in the secondary slot + * and did not pass validation, in which case the whole slot is erased. + * If during the erase operation, a reset occurs, parts of the slot + * might have been erased while some did not. The concerning part is + * the trailer because it might disable a new image from being loaded + * through mcumgr; so we just get rid of the trailer here, if the header + * is erased. + */ + if (slot != BOOT_PRIMARY_SLOT) { + swap_erase_trailer_sectors(state, fap); + } +#endif + + /* No bootable image in slot; continue booting from the primary slot. */ + fih_rc = FIH_NO_BOOTABLE_IMAGE; + goto out; + } + +#if defined(MCUBOOT_OVERWRITE_ONLY) && defined(MCUBOOT_DOWNGRADE_PREVENTION) + if (slot != BOOT_PRIMARY_SLOT) { + /* Check if version of secondary slot is sufficient */ + +#if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(CONFIG_NRF53_MULTI_IMAGE_UPDATE) \ + && defined(CONFIG_PCD_APP) && defined(CONFIG_PCD_READ_NETCORE_APP_VERSION) + if (BOOT_CURR_IMG(state) == 1) { + rc = pcd_version_cmp_net(fap, boot_img_hdr(state, BOOT_SECONDARY_SLOT)); + } else { + rc = boot_version_cmp( + &boot_img_hdr(state, BOOT_SECONDARY_SLOT)->ih_ver, + &boot_img_hdr(state, BOOT_PRIMARY_SLOT)->ih_ver); + } +#else + rc = boot_version_cmp( + &boot_img_hdr(state, BOOT_SECONDARY_SLOT)->ih_ver, + &boot_img_hdr(state, BOOT_PRIMARY_SLOT)->ih_ver); +#endif + if (rc < 0 && boot_check_header_erased(state, BOOT_PRIMARY_SLOT)) { + BOOT_LOG_ERR("insufficient version in secondary slot"); + flash_area_erase(fap, 0, flash_area_get_size(fap)); + /* Image in the secondary slot does not satisfy version requirement. + * Erase the image and continue booting from the primary slot. + */ + fih_rc = FIH_NO_BOOTABLE_IMAGE; + goto out; + } + } +#endif + if (!boot_is_header_valid(hdr, fap, state)) { + fih_rc = FIH_FAILURE; + } else { + BOOT_HOOK_CALL_FIH(boot_image_check_hook, FIH_BOOT_HOOK_REGULAR, + fih_rc, BOOT_CURR_IMG(state), slot); + if (FIH_EQ(fih_rc, FIH_BOOT_HOOK_REGULAR)) { + FIH_CALL(boot_image_check, fih_rc, state, hdr, fap, bs); + } + } + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + if ((slot != BOOT_PRIMARY_SLOT) || ARE_SLOTS_EQUIVALENT()) { + flash_area_erase(fap, 0, flash_area_get_size(fap)); + /* Image is invalid, erase it to prevent further unnecessary + * attempts to validate and boot it. + */ + } + +#if !defined(__BOOTSIM__) + BOOT_LOG_ERR("Image in the %s slot is not valid!", + (slot == BOOT_PRIMARY_SLOT) ? "primary" : "secondary"); +#endif + fih_rc = FIH_NO_BOOTABLE_IMAGE; + goto out; + } + +#if MCUBOOT_IMAGE_NUMBER > 1 && !defined(MCUBOOT_ENC_IMAGES) && defined(MCUBOOT_VERIFY_IMG_ADDRESS) + /* Verify that the image in the secondary slot has a reset address + * located in the primary slot. This is done to avoid users incorrectly + * overwriting an application written to the incorrect slot. + * This feature is only supported by ARM platforms. + */ +#if MCUBOOT_IMAGE_NUMBER >= 3 + /* Currently the MCUboot can be configured for up to 3 image, where image number 2 is + * designated for XIP, where it is the second part of image stored in slots of image + * 0. This part of image is not bootable, as the XIP setup is done by the app in + * image 0 slot, and it does not carry the reset vector. + */ + if (area_id == FLASH_AREA_IMAGE_SECONDARY(2)) { + goto out; + } +#endif + if (area_id == FLASH_AREA_IMAGE_SECONDARY(BOOT_CURR_IMG(state))) { + const struct flash_area *pri_fa = BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT); + struct image_header *secondary_hdr = boot_img_hdr(state, slot); + uint32_t reset_value = 0; + uint32_t reset_addr = secondary_hdr->ih_hdr_size + sizeof(reset_value); + + rc = flash_area_read(fap, reset_addr, &reset_value, sizeof(reset_value)); + if (rc != 0) { + fih_rc = FIH_NO_BOOTABLE_IMAGE; + goto out; + } + + uint32_t min_addr, max_addr; + +#ifdef PM_CPUNET_APP_ADDRESS + /* The primary slot for the network core is emulated in RAM. + * Its flash_area hasn't got relevant boundaries. + * Therfore need to override its boundaries for the check. + */ + if (BOOT_CURR_IMG(state) == 1) { + min_addr = PM_CPUNET_APP_ADDRESS; + max_addr = PM_CPUNET_APP_ADDRESS + PM_CPUNET_APP_SIZE; +#ifdef PM_S1_ADDRESS + } else if (BOOT_CURR_IMG(state) == 0) { + min_addr = PM_S0_ADDRESS; + max_addr = pri_fa->fa_off + pri_fa->fa_size; +#endif + } else +#endif + { + min_addr = pri_fa->fa_off; + max_addr = pri_fa->fa_off + pri_fa->fa_size; + } + + if (reset_value < min_addr || reset_value> (max_addr)) { + BOOT_LOG_ERR("Reset address of image in secondary slot is not in the primary slot"); + BOOT_LOG_ERR("Erasing image from secondary slot"); + + /* The vector table in the image located in the secondary + * slot does not target the primary slot. This might + * indicate that the image was loaded to the wrong slot. + * + * Erase the image and continue booting from the primary slot. + */ + flash_area_erase(fap, 0, fap->fa_size); + fih_rc = FIH_NO_BOOTABLE_IMAGE; + goto out; + } + } +#endif + +out: + flash_area_close(fap); + + FIH_RET(fih_rc); +} + +#ifdef MCUBOOT_HW_ROLLBACK_PROT +/** + * Updates the stored security counter value with the image's security counter + * value which resides in the given slot, only if it's greater than the stored + * value. + * + * @param image_index Index of the image to determine which security + * counter to update. + * @param slot Slot number of the image. + * @param hdr Pointer to the image header structure of the image + * that is currently stored in the given slot. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_update_security_counter(uint8_t image_index, int slot, + struct image_header *hdr) +{ + const struct flash_area *fap = NULL; + uint32_t img_security_cnt; + int rc; + + rc = flash_area_open(flash_area_id_from_multi_image_slot(image_index, slot), + &fap); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + rc = bootutil_get_img_security_cnt(hdr, fap, &img_security_cnt); + if (rc != 0) { + goto done; + } + + rc = boot_nv_security_counter_update(image_index, img_security_cnt); + if (rc != 0) { + goto done; + } + +done: + flash_area_close(fap); + return rc; +} +#endif /* MCUBOOT_HW_ROLLBACK_PROT */ + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) + +#if defined(CONFIG_MCUBOOT_CLEANUP_UNUSABLE_SECONDARY) &&\ +(defined(PM_S1_ADDRESS) || defined(CONFIG_SOC_NRF5340_CPUAPP)) + +#define SEC_SLOT_VIRGIN 0 +#define SEC_SLOT_TOUCHED 1 +#define SEC_SLOT_ASSIGNED 2 + +#if (MCUBOOT_IMAGE_NUMBER == 2) && defined(PM_B0_ADDRESS) && \ + !defined(CONFIG_NRF53_MULTI_IMAGE_UPDATE) +/* This configuration is peculiar - the one physical secondary slot is + * mocking two logical secondary + */ +#define SEC_SLOT_PHYSICAL_CNT 1 +#else +#define SEC_SLOT_PHYSICAL_CNT MCUBOOT_IMAGE_NUMBER +#endif + +static uint8_t sec_slot_assignmnet[SEC_SLOT_PHYSICAL_CNT] = {0}; + +static inline void sec_slot_touch(struct boot_loader_state *state) +{ + uint8_t idx = (SEC_SLOT_PHYSICAL_CNT == 1) ? 0 : BOOT_CURR_IMG(state); + + if (SEC_SLOT_VIRGIN == sec_slot_assignmnet[idx]) { + sec_slot_assignmnet[idx] = SEC_SLOT_TOUCHED; + } +} + +static inline void sec_slot_mark_assigned(struct boot_loader_state *state) +{ + uint8_t idx = (SEC_SLOT_PHYSICAL_CNT == 1) ? 0 : BOOT_CURR_IMG(state); + + sec_slot_assignmnet[idx] = SEC_SLOT_ASSIGNED; +} + +/** + * Cleanu up all secondary slot which couldn't be assigned to any primary slot. + * + * This function erases content of each secondary slot which contains valid + * header but couldn't be assigned to any of supported primary images. + * + * This function is supposed to be called after boot_validated_swap_type() + * iterates over all the images in context_boot_go(). + */ +static void sec_slot_cleanup_if_unusable(void) +{ + uint8_t idx; + + for (idx = 0; idx < SEC_SLOT_PHYSICAL_CNT; idx++) { + if (SEC_SLOT_TOUCHED == sec_slot_assignmnet[idx]) { + const struct flash_area *secondary_fa; + int rc; + + rc = flash_area_open(flash_area_id_from_multi_image_slot(idx, BOOT_SECONDARY_SLOT), + &secondary_fa); + if (!rc) { + rc = flash_area_erase(secondary_fa, 0, secondary_fa->fa_size); + if (!rc) { + BOOT_LOG_ERR("Cleaned-up secondary slot of %d. image.", idx); + } + } + + if (rc) { + BOOT_LOG_ERR("Can not cleanup secondary slot of %d. image.", idx); + } + } + } +} +#else +static inline void sec_slot_touch(struct boot_loader_state *state) +{ +} +static inline void sec_slot_mark_assigned(struct boot_loader_state *state) +{ +} +static inline void sec_slot_cleanup_if_unusable(void) +{ +} +#endif /* defined(CONFIG_MCUBOOT_CLEANUP_UNUSABLE_SECONDARY) &&\ + defined(PM_S1_ADDRESS) || defined(CONFIG_SOC_NRF5340_CPUAPP) */ + +/** + * Determines which swap operation to perform, if any. If it is determined + * that a swap operation is required, the image in the secondary slot is checked + * for validity. If the image in the secondary slot is invalid, it is erased, + * and a swap type of "none" is indicated. + * + * @return The type of swap to perform (BOOT_SWAP_TYPE...) + */ +static int +boot_validated_swap_type(struct boot_loader_state *state, + struct boot_status *bs) +{ + int swap_type; + FIH_DECLARE(fih_rc, FIH_FAILURE); + bool upgrade_valid = false; +#if defined(PM_S1_ADDRESS) + owner_nsib[BOOT_CURR_IMG(state)] = false; +#endif + +#if defined(PM_S1_ADDRESS) || defined(CONFIG_SOC_NRF5340_CPUAPP) + const struct flash_area *secondary_fa = + BOOT_IMG_AREA(state, BOOT_SECONDARY_SLOT); + struct image_header *hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT); + uint32_t reset_addr = 0; + int rc = 0; + /* Patch needed for NCS. Since image 0 (the app) and image 1 (the other + * B1 slot S0 or S1) share the same secondary slot, we need to check + * whether the update candidate in the secondary slot is intended for + * image 0 or image 1 primary by looking at the address of the reset + * vector. Note that there are good reasons for not using img_num from + * the swap info. + */ + + if (hdr->ih_magic == IMAGE_MAGIC) { + rc = flash_area_read(secondary_fa, hdr->ih_hdr_size + + sizeof(uint32_t), &reset_addr, + sizeof(reset_addr)); + if (rc != 0) { + return BOOT_SWAP_TYPE_FAIL; + } + + sec_slot_touch(state); + +#ifdef PM_S1_ADDRESS +#ifdef PM_CPUNET_B0N_ADDRESS + if(!(reset_addr >= PM_CPUNET_APP_ADDRESS && reset_addr < PM_CPUNET_APP_END_ADDRESS)) +#endif + { + const struct flash_area *primary_fa; + rc = flash_area_open(flash_area_id_from_multi_image_slot( + BOOT_CURR_IMG(state), BOOT_PRIMARY_SLOT), + &primary_fa); + if (rc != 0) { + return BOOT_SWAP_TYPE_FAIL; + } + + /* Check start and end of primary slot for current image */ + if (reset_addr < primary_fa->fa_off) { +#if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(CONFIG_NRF53_MULTI_IMAGE_UPDATE) + const struct flash_area *nsib_fa; + + /* NSIB upgrade slot */ + rc = flash_area_open((uint32_t)_image_1_primary_slot_id, + &nsib_fa); + + if (rc != 0) { + return BOOT_SWAP_TYPE_FAIL; + } + + /* Image is placed before Primary and within the NSIB slot */ + if (reset_addr > nsib_fa->fa_off + && reset_addr < (nsib_fa->fa_off + nsib_fa->fa_size)) { + /* Set primary to be NSIB upgrade slot */ + BOOT_IMG_AREA(state, 0) = nsib_fa; + owner_nsib[BOOT_CURR_IMG(state)] = true; + } +#else + return BOOT_SWAP_TYPE_NONE; + +#endif + + } else if (reset_addr > (primary_fa->fa_off + primary_fa->fa_size)) { + /* The image in the secondary slot is not intended for any */ + return BOOT_SWAP_TYPE_NONE; + } + + if ((primary_fa->fa_off == PM_S0_ADDRESS) || (primary_fa->fa_off == PM_S1_ADDRESS)) { + owner_nsib[BOOT_CURR_IMG(state)] = true; + } + } +#endif /* PM_S1_ADDRESS */ + sec_slot_mark_assigned(state); + } + +#endif /* PM_S1_ADDRESS || CONFIG_SOC_NRF5340_CPUAPP */ + + swap_type = boot_swap_type_multi(BOOT_CURR_IMG(state)); + if (BOOT_IS_UPGRADE(swap_type)) { + /* Boot loader wants to switch to the secondary slot. + * Ensure image is valid. + */ + FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_SECONDARY_SLOT, bs); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + if (FIH_EQ(fih_rc, FIH_NO_BOOTABLE_IMAGE)) { + swap_type = BOOT_SWAP_TYPE_NONE; + } else { + swap_type = BOOT_SWAP_TYPE_FAIL; + } + } else { + upgrade_valid = true; + } + +#if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(PM_CPUNET_B0N_ADDRESS) \ + && !defined(CONFIG_NRF53_MULTI_IMAGE_UPDATE) && defined(CONFIG_PCD_APP) + /* If the update is valid, and it targets the network core: perform the + * update and indicate to the caller of this function that no update is + * available + */ + if (upgrade_valid && reset_addr >= PM_CPUNET_APP_ADDRESS && + reset_addr < PM_CPUNET_APP_END_ADDRESS) { + struct image_header *hdr = (struct image_header *)secondary_fa->fa_off; + uint32_t vtable_addr = (uint32_t)hdr + hdr->ih_hdr_size; + uint32_t *net_core_fw_addr = (uint32_t *)(vtable_addr); + uint32_t fw_size = hdr->ih_img_size; + BOOT_LOG_INF("Starting network core update"); + rc = pcd_network_core_update(net_core_fw_addr, fw_size); + + if (rc != 0) { + swap_type = BOOT_SWAP_TYPE_FAIL; + } else { + BOOT_LOG_INF("Done updating network core"); +#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE) + /* swap_erase_trailer_sectors is undefined if upgrade only + * method is used. There is no need to erase sectors, because + * the image cannot be reverted. + */ + rc = swap_erase_trailer_sectors(state, + secondary_fa); +#endif + swap_type = BOOT_SWAP_TYPE_NONE; + } + } +#endif /* CONFIG_SOC_NRF5340_CPUAPP && PM_CPUNET_B0N_ADDRESS && + !CONFIG_NRF53_MULTI_IMAGE_UPDATE && CONFIG_PCD_APP */ + } + + return swap_type; +} +#endif + +/** + * Erases a region of flash. + * + * @param flash_area The flash_area containing the region to erase. + * @param off The offset within the flash area to start the + * erase. + * @param sz The number of bytes to erase. + * + * @return 0 on success; nonzero on failure. + */ +int +boot_erase_region(const struct flash_area *fap, uint32_t off, uint32_t sz) +{ + return flash_area_erase(fap, off, sz); +} + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) + +#if defined(MCUBOOT_ENC_IMAGES) || defined(MCUBOOT_SWAP_SAVE_ENCTLV) +/* Replacement for memset(p, 0, sizeof(*p) that does not get + * optimized out. + */ +static void like_mbedtls_zeroize(void *p, size_t n) +{ + volatile unsigned char *v = (unsigned char *)p; + + for (size_t i = 0; i < n; i++) { + v[i] = 0; + } +} +#endif + +/** + * Copies the contents of one flash region to another. You must erase the + * destination region prior to calling this function. + * + * @param flash_area_id_src The ID of the source flash area. + * @param flash_area_id_dst The ID of the destination flash area. + * @param off_src The offset within the source flash area to + * copy from. + * @param off_dst The offset within the destination flash area to + * copy to. + * @param sz The number of bytes to copy. + * + * @return 0 on success; nonzero on failure. + */ +int +boot_copy_region(struct boot_loader_state *state, + const struct flash_area *fap_src, + const struct flash_area *fap_dst, + uint32_t off_src, uint32_t off_dst, uint32_t sz) +{ + uint32_t bytes_copied; + int chunk_sz; + int rc; +#ifdef MCUBOOT_ENC_IMAGES + uint32_t off = off_dst; + uint32_t tlv_off; + size_t blk_off; + struct image_header *hdr; + uint16_t idx; + uint32_t blk_sz; + uint8_t image_index = BOOT_CURR_IMG(state); + bool encrypted_src; + bool encrypted_dst; + /* Assuming the secondary slot is source; note that 0 here not only + * means that primary slot is source, but also that there will be + * encryption happening, if it is 1 then there is decryption from + * secondary slot. + */ + int source_slot = 1; + /* In case of encryption enabled, we may have to do more work than + * just copy bytes */ + bool only_copy = false; +#else + (void)state; +#endif +#ifdef MCUBOOT_DECOMPRESS_IMAGES + struct image_header *hdr; +#endif + + TARGET_STATIC uint8_t buf[BUF_SZ] __attribute__((aligned(4))); + +#ifdef MCUBOOT_ENC_IMAGES + encrypted_src = (flash_area_get_id(fap_src) != FLASH_AREA_IMAGE_PRIMARY(image_index)); + encrypted_dst = (flash_area_get_id(fap_dst) != FLASH_AREA_IMAGE_PRIMARY(image_index)); + + if (encrypted_src != encrypted_dst) { + if (encrypted_dst) { + /* Need encryption, metadata from the primary slot */ + hdr = boot_img_hdr(state, BOOT_PRIMARY_SLOT); + source_slot = 0; + } else { + /* Need decryption, metadata from the secondary slot */ + hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT); + source_slot = 1; + } + } else { + /* In case when source and targe is the same area, this means that we + * only have to copy bytes, no encryption or decryption. + */ + only_copy = true; + } +#endif + +#ifdef MCUBOOT_DECOMPRESS_IMAGES + hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT); + + if (MUST_DECOMPRESS(fap_src, BOOT_CURR_IMG(state), hdr)) { + /* Use alternative function for compressed images */ + return boot_copy_region_decompress(state, fap_src, fap_dst, off_src, off_dst, sz, buf, + BUF_SZ); + } +#endif + + bytes_copied = 0; + while (bytes_copied < sz) { + if (sz - bytes_copied > sizeof buf) { + chunk_sz = sizeof buf; + } else { + chunk_sz = sz - bytes_copied; + } + + rc = flash_area_read(fap_src, off_src + bytes_copied, buf, chunk_sz); + if (rc != 0) { + return BOOT_EFLASH; + } + +#ifdef MCUBOOT_ENC_IMAGES + /* If only copy, then does not matter if header indicates need for + * encryptio/decryptio, we just copy data. */ + if (!only_copy && IS_ENCRYPTED(hdr)) { + uint32_t abs_off = off + bytes_copied; + if (abs_off < hdr->ih_hdr_size) { + /* do not decrypt header */ + if (abs_off + chunk_sz > hdr->ih_hdr_size) { + /* The lower part of the chunk contains header data */ + blk_off = 0; + blk_sz = chunk_sz - (hdr->ih_hdr_size - abs_off); + idx = hdr->ih_hdr_size - abs_off; + } else { + /* The chunk contains exclusively header data */ + blk_sz = 0; /* nothing to decrypt */ + } + } else { + idx = 0; + blk_sz = chunk_sz; + blk_off = (abs_off - hdr->ih_hdr_size) & 0xf; + } + + if (blk_sz > 0) + { + tlv_off = BOOT_TLV_OFF(hdr); + if (abs_off + chunk_sz > tlv_off) { + /* do not decrypt TLVs */ + if (abs_off >= tlv_off) { + blk_sz = 0; + } else { + blk_sz = tlv_off - abs_off; + } + } + if (source_slot == 0) { + boot_enc_encrypt(BOOT_CURR_ENC(state), source_slot, + (abs_off + idx) - hdr->ih_hdr_size, blk_sz, + blk_off, &buf[idx]); + } else { + boot_enc_decrypt(BOOT_CURR_ENC(state), source_slot, + (abs_off + idx) - hdr->ih_hdr_size, blk_sz, + blk_off, &buf[idx]); + } + } + } +#endif + + rc = flash_area_write(fap_dst, off_dst + bytes_copied, buf, chunk_sz); + if (rc != 0) { + return BOOT_EFLASH; + } + + bytes_copied += chunk_sz; + + MCUBOOT_WATCHDOG_FEED(); + } + + return 0; +} + +/** + * Overwrite primary slot with the image contained in the secondary slot. + * If a prior copy operation was interrupted by a system reset, this function + * redos the copy. + * + * @param bs The current boot status. This function reads + * this struct to determine if it is resuming + * an interrupted swap operation. This + * function writes the updated status to this + * function on return. + * + * @return 0 on success; nonzero on failure. + */ +#if defined(MCUBOOT_OVERWRITE_ONLY) || defined(MCUBOOT_BOOTSTRAP) +static int +boot_copy_image(struct boot_loader_state *state, struct boot_status *bs) +{ + size_t sect_count; + size_t sect; + int rc; + size_t size; + size_t this_size; + size_t last_sector; + const struct flash_area *fap_primary_slot; + const struct flash_area *fap_secondary_slot; + uint8_t image_index; + +#if defined(MCUBOOT_OVERWRITE_ONLY_FAST) + uint32_t sector; + uint32_t trailer_sz; + uint32_t off; + uint32_t sz; +#endif + + (void)bs; + +#if defined(MCUBOOT_OVERWRITE_ONLY_FAST) + uint32_t src_size = 0; + rc = boot_read_image_size(state, BOOT_SECONDARY_SLOT, &src_size); + assert(rc == 0); +#endif + + image_index = BOOT_CURR_IMG(state); + + BOOT_LOG_INF("Image %d upgrade secondary slot -> primary slot", image_index); + BOOT_LOG_INF("Erasing the primary slot"); + + rc = flash_area_open(flash_area_get_id(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT)), + &fap_primary_slot); + assert (rc == 0); + + rc = flash_area_open(FLASH_AREA_IMAGE_SECONDARY(image_index), + &fap_secondary_slot); + assert (rc == 0); + + sect_count = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT); + for (sect = 0, size = 0; sect < sect_count; sect++) { + this_size = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, sect); + rc = boot_erase_region(fap_primary_slot, size, this_size); + assert(rc == 0); + +#if defined(MCUBOOT_OVERWRITE_ONLY_FAST) + if ((size + this_size) >= src_size) { + size += src_size - size; + size += BOOT_WRITE_SZ(state) - (size % BOOT_WRITE_SZ(state)); + break; + } +#endif + + size += this_size; + } + +#if defined(MCUBOOT_OVERWRITE_ONLY_FAST) + trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state)); + sector = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT) - 1; + sz = 0; + do { + sz += boot_img_sector_size(state, BOOT_PRIMARY_SLOT, sector); + off = boot_img_sector_off(state, BOOT_PRIMARY_SLOT, sector); + sector--; + } while (sz < trailer_sz); + + rc = boot_erase_region(fap_primary_slot, off, sz); + assert(rc == 0); +#endif + +#ifdef MCUBOOT_ENC_IMAGES + if (IS_ENCRYPTED(boot_img_hdr(state, BOOT_SECONDARY_SLOT))) { + rc = boot_enc_load(BOOT_CURR_ENC(state), BOOT_SECONDARY_SLOT, + boot_img_hdr(state, BOOT_SECONDARY_SLOT), + fap_secondary_slot, bs); + + if (rc < 0) { + return BOOT_EBADIMAGE; + } + if (rc == 0 && boot_enc_set_key(BOOT_CURR_ENC(state), 1, bs)) { + return BOOT_EBADIMAGE; + } + } +#endif + + BOOT_LOG_INF("Image %d copying the secondary slot to the primary slot: 0x%zx bytes", + image_index, size); + rc = boot_copy_region(state, fap_secondary_slot, fap_primary_slot, 0, 0, size); + if (rc != 0) { + return rc; + } + +#if defined(MCUBOOT_OVERWRITE_ONLY_FAST) + rc = boot_write_magic(fap_primary_slot); + if (rc != 0) { + return rc; + } +#endif + + rc = BOOT_HOOK_CALL(boot_copy_region_post_hook, 0, BOOT_CURR_IMG(state), + BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT), size); + if (rc != 0) { + return rc; + } + +#ifdef MCUBOOT_HW_ROLLBACK_PROT + /* Update the stored security counter with the new image's security counter + * value. Both slots hold the new image at this point, but the secondary + * slot's image header must be passed since the image headers in the + * boot_data structure have not been updated yet. + */ + rc = boot_update_security_counter(BOOT_CURR_IMG(state), BOOT_PRIMARY_SLOT, + boot_img_hdr(state, BOOT_SECONDARY_SLOT)); + if (rc != 0) { + BOOT_LOG_ERR("Security counter update failed after image upgrade."); + return rc; + } +#endif /* MCUBOOT_HW_ROLLBACK_PROT */ + +#ifndef MCUBOOT_OVERWRITE_ONLY_KEEP_BACKUP + /* + * Erases header and trailer. The trailer is erased because when a new + * image is written without a trailer as is the case when using newt, the + * trailer that was left might trigger a new upgrade. + */ + BOOT_LOG_DBG("erasing secondary header"); + rc = boot_erase_region(fap_secondary_slot, + boot_img_sector_off(state, BOOT_SECONDARY_SLOT, 0), + boot_img_sector_size(state, BOOT_SECONDARY_SLOT, 0)); + assert(rc == 0); +#endif + + last_sector = boot_img_num_sectors(state, BOOT_SECONDARY_SLOT) - 1; + BOOT_LOG_DBG("erasing secondary trailer"); + rc = boot_erase_region(fap_secondary_slot, + boot_img_sector_off(state, BOOT_SECONDARY_SLOT, + last_sector), + boot_img_sector_size(state, BOOT_SECONDARY_SLOT, + last_sector)); + assert(rc == 0); + + flash_area_close(fap_primary_slot); + flash_area_close(fap_secondary_slot); + + /* TODO: Perhaps verify the primary slot's signature again? */ + + return 0; +} +#endif + +#if !defined(MCUBOOT_OVERWRITE_ONLY) +/** + * Swaps the two images in flash. If a prior copy operation was interrupted + * by a system reset, this function completes that operation. + * + * @param bs The current boot status. This function reads + * this struct to determine if it is resuming + * an interrupted swap operation. This + * function writes the updated status to this + * function on return. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_swap_image(struct boot_loader_state *state, struct boot_status *bs) +{ + struct image_header *hdr; + const struct flash_area *fap; +#ifdef MCUBOOT_ENC_IMAGES + uint8_t slot; + uint8_t i; +#endif + uint32_t size; + uint32_t copy_size; + uint8_t image_index; + int rc; + + /* FIXME: just do this if asked by user? */ + + size = copy_size = 0; + image_index = BOOT_CURR_IMG(state); + + if (boot_status_is_reset(bs)) { + /* + * No swap ever happened, so need to find the largest image which + * will be used to determine the amount of sectors to swap. + */ + hdr = boot_img_hdr(state, BOOT_PRIMARY_SLOT); + if (hdr->ih_magic == IMAGE_MAGIC) { + rc = boot_read_image_size(state, BOOT_PRIMARY_SLOT, ©_size); + assert(rc == 0); + } + +#ifdef MCUBOOT_ENC_IMAGES + if (IS_ENCRYPTED(hdr)) { + fap = BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT); + rc = boot_enc_load(BOOT_CURR_ENC(state), 0, hdr, fap, bs); + assert(rc >= 0); + + if (rc == 0) { + rc = boot_enc_set_key(BOOT_CURR_ENC(state), 0, bs); + assert(rc == 0); + } else { + rc = 0; + } + } else { + memset(bs->enckey[0], 0xff, BOOT_ENC_KEY_ALIGN_SIZE); + } +#endif + + hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT); + if (hdr->ih_magic == IMAGE_MAGIC) { + rc = boot_read_image_size(state, BOOT_SECONDARY_SLOT, &size); + assert(rc == 0); + } + +#ifdef MCUBOOT_ENC_IMAGES + hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT); + if (IS_ENCRYPTED(hdr)) { + fap = BOOT_IMG_AREA(state, BOOT_SECONDARY_SLOT); + rc = boot_enc_load(BOOT_CURR_ENC(state), 1, hdr, fap, bs); + assert(rc >= 0); + + if (rc == 0) { + rc = boot_enc_set_key(BOOT_CURR_ENC(state), 1, bs); + assert(rc == 0); + } else { + rc = 0; + } + } else { + memset(bs->enckey[1], 0xff, BOOT_ENC_KEY_ALIGN_SIZE); + } +#endif + + if (size > copy_size) { + copy_size = size; + } + + bs->swap_size = copy_size; + } else { + /* + * If a swap was under way, the swap_size should already be present + * in the trailer... + */ + + rc = boot_find_status(image_index, &fap); + assert(fap != NULL); + rc = boot_read_swap_size(fap, &bs->swap_size); + assert(rc == 0); + + copy_size = bs->swap_size; + +#ifdef MCUBOOT_ENC_IMAGES + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + rc = boot_read_enc_key(fap, slot, bs); + assert(rc == 0); + + for (i = 0; i < BOOT_ENC_KEY_SIZE; i++) { + if (bs->enckey[slot][i] != 0xff) { + break; + } + } + + boot_enc_init(BOOT_CURR_ENC(state), slot); + + if (i != BOOT_ENC_KEY_SIZE) { + boot_enc_set_key(BOOT_CURR_ENC(state), slot, bs); + } + } +#endif + flash_area_close(fap); + } + + swap_run(state, bs, copy_size); + +#ifdef MCUBOOT_VALIDATE_PRIMARY_SLOT + extern int boot_status_fails; + if (boot_status_fails > 0) { + BOOT_LOG_WRN("%d status write fails performing the swap", + boot_status_fails); + } +#endif + rc = BOOT_HOOK_CALL(boot_copy_region_post_hook, 0, BOOT_CURR_IMG(state), + BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT), size); + + return 0; +} +#endif + +/** + * Performs a clean (not aborted) image update. + * + * @param bs The current boot status. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_perform_update(struct boot_loader_state *state, struct boot_status *bs) +{ + int rc; +#ifndef MCUBOOT_OVERWRITE_ONLY + uint8_t swap_type; +#endif + + /* At this point there are no aborted swaps. */ +#if defined(MCUBOOT_OVERWRITE_ONLY) + rc = boot_copy_image(state, bs); +#elif defined(MCUBOOT_BOOTSTRAP) + /* Check if the image update was triggered by a bad image in the + * primary slot (the validity of the image in the secondary slot had + * already been checked). + */ + FIH_DECLARE(fih_rc, FIH_FAILURE); + rc = boot_check_header_erased(state, BOOT_PRIMARY_SLOT); + FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_PRIMARY_SLOT, bs); + if (rc == 0 || FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + rc = boot_copy_image(state, bs); + } else { + rc = boot_swap_image(state, bs); + } +#else + rc = boot_swap_image(state, bs); +#endif + assert(rc == 0); + +#ifndef MCUBOOT_OVERWRITE_ONLY + /* The following state needs image_ok be explicitly set after the + * swap was finished to avoid a new revert. + */ + swap_type = BOOT_SWAP_TYPE(state); + if (swap_type == BOOT_SWAP_TYPE_REVERT || + swap_type == BOOT_SWAP_TYPE_PERM) { + rc = swap_set_image_ok(BOOT_CURR_IMG(state)); + if (rc != 0) { + BOOT_SWAP_TYPE(state) = swap_type = BOOT_SWAP_TYPE_PANIC; + } + } + +#ifdef MCUBOOT_HW_ROLLBACK_PROT + if (swap_type == BOOT_SWAP_TYPE_PERM) { + /* Update the stored security counter with the new image's security + * counter value. The primary slot holds the new image at this point, + * but the secondary slot's image header must be passed since image + * headers in the boot_data structure have not been updated yet. + * + * In case of a permanent image swap mcuboot will never attempt to + * revert the images on the next reboot. Therefore, the security + * counter must be increased right after the image upgrade. + */ + rc = boot_update_security_counter( + BOOT_CURR_IMG(state), + BOOT_PRIMARY_SLOT, + boot_img_hdr(state, BOOT_SECONDARY_SLOT)); + if (rc != 0) { + BOOT_LOG_ERR("Security counter update failed after " + "image upgrade."); + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } + } +#endif /* MCUBOOT_HW_ROLLBACK_PROT */ + + if (BOOT_IS_UPGRADE(swap_type)) { + rc = swap_set_copy_done(BOOT_CURR_IMG(state)); + if (rc != 0) { + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } + } +#endif /* !MCUBOOT_OVERWRITE_ONLY */ + + return rc; +} + +/** + * Completes a previously aborted image swap. + * + * @param bs The current boot status. + * + * @return 0 on success; nonzero on failure. + */ +#if !defined(MCUBOOT_OVERWRITE_ONLY) +static int +boot_complete_partial_swap(struct boot_loader_state *state, + struct boot_status *bs) +{ + int rc; + + /* Determine the type of swap operation being resumed from the + * `swap-type` trailer field. + */ + rc = boot_swap_image(state, bs); + assert(rc == 0); + + BOOT_SWAP_TYPE(state) = bs->swap_type; + + /* The following states need image_ok be explicitly set after the + * swap was finished to avoid a new revert. + */ + if (bs->swap_type == BOOT_SWAP_TYPE_REVERT || + bs->swap_type == BOOT_SWAP_TYPE_PERM) { + rc = swap_set_image_ok(BOOT_CURR_IMG(state)); + if (rc != 0) { + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } + } + + if (BOOT_IS_UPGRADE(bs->swap_type)) { + rc = swap_set_copy_done(BOOT_CURR_IMG(state)); + if (rc != 0) { + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } + } + + if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_PANIC) { + BOOT_LOG_ERR("panic!"); + assert(0); + + /* Loop forever... */ + while (1) {} + } + + return rc; +} +#endif /* !MCUBOOT_OVERWRITE_ONLY */ + +#if (BOOT_IMAGE_NUMBER > 1) +/** + * Review the validity of previously determined swap types of other images. + * + * @param aborted_swap The current image upgrade is a + * partial/aborted swap. + */ +static void +boot_review_image_swap_types(struct boot_loader_state *state, + bool aborted_swap) +{ + /* In that case if we rebooted in the middle of an image upgrade process, we + * must review the validity of swap types, that were previously determined + * for other images. The image_ok flag had not been set before the reboot + * for any of the updated images (only the copy_done flag) and thus falsely + * the REVERT swap type has been determined for the previous images that had + * been updated before the reboot. + * + * There are two separate scenarios that we have to deal with: + * + * 1. The reboot has happened during swapping an image: + * The current image upgrade has been determined as a + * partial/aborted swap. + * 2. The reboot has happened between two separate image upgrades: + * In this scenario we must check the swap type of the current image. + * In those cases if it is NONE or REVERT we cannot certainly determine + * the fact of a reboot. In a consistent state images must move in the + * same direction or stay in place, e.g. in practice REVERT and TEST + * swap types cannot be present at the same time. If the swap type of + * the current image is either TEST, PERM or FAIL we must review the + * already determined swap types of other images and set each false + * REVERT swap types to NONE (these images had been successfully + * updated before the system rebooted between two separate image + * upgrades). + */ + + if (BOOT_CURR_IMG(state) == 0) { + /* Nothing to do */ + return; + } + + if (!aborted_swap) { + if ((BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_NONE) || + (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_REVERT)) { + /* Nothing to do */ + return; + } + } + + for (uint8_t i = 0; i < BOOT_CURR_IMG(state); i++) { + if (state->swap_type[i] == BOOT_SWAP_TYPE_REVERT) { + state->swap_type[i] = BOOT_SWAP_TYPE_NONE; + } + } +} +#endif + +/** + * Prepare image to be updated if required. + * + * Prepare image to be updated if required with completing an image swap + * operation if one was aborted and/or determining the type of the + * swap operation. In case of any error set the swap type to NONE. + * + * @param state TODO + * @param bs Pointer where the read and possibly updated + * boot status can be written to. + */ +static void +boot_prepare_image_for_update(struct boot_loader_state *state, + struct boot_status *bs) +{ + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) || defined(MCUBOOT_DATA_SHARING) + int max_size; +#endif + + /* Determine the sector layout of the image slots and scratch area. */ + rc = boot_read_sectors(state); + if (rc != 0) { + BOOT_LOG_WRN("Failed reading sectors; BOOT_MAX_IMG_SECTORS=%d" + " - too small?", BOOT_MAX_IMG_SECTORS); + /* Unable to determine sector layout, continue with next image + * if there is one. + */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + if (rc == BOOT_EFLASH) + { + /* Only return on error from the primary image flash */ + return; + } + } + + /* Attempt to read an image header from each slot. */ + rc = boot_read_image_headers(state, false, NULL); + if (rc != 0) { + /* Continue with next image if there is one. */ + BOOT_LOG_WRN("Failed reading image headers; Image=%u", + BOOT_CURR_IMG(state)); + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + return; + } + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) || defined(MCUBOOT_DATA_SHARING) + /* Fetch information on maximum sizes for later usage, if needed */ + max_size = app_max_size(state); + + if (max_size > 0) { + image_max_sizes[BOOT_CURR_IMG(state)].calculated = true; + image_max_sizes[BOOT_CURR_IMG(state)].max_size = max_size; + } +#endif + + /* If the current image's slots aren't compatible, no swap is possible. + * Just boot into primary slot. + */ + if (boot_slots_compatible(state)) { + boot_status_reset(bs); + +#ifndef MCUBOOT_OVERWRITE_ONLY + rc = swap_read_status(state, bs); + if (rc != 0) { + BOOT_LOG_WRN("Failed reading boot status; Image=%u", + BOOT_CURR_IMG(state)); + /* Continue with next image if there is one. */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + return; + } +#endif + +#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE) + /* + * Must re-read image headers because the boot status might + * have been updated in the previous function call. + */ + rc = boot_read_image_headers(state, !boot_status_is_reset(bs), bs); +#ifdef MCUBOOT_BOOTSTRAP + /* When bootstrapping it's OK to not have image magic in the primary slot */ + if (rc != 0 && (BOOT_CURR_IMG(state) != BOOT_PRIMARY_SLOT || + boot_check_header_erased(state, BOOT_PRIMARY_SLOT) != 0)) { +#else + if (rc != 0) { +#endif + + /* Continue with next image if there is one. */ + BOOT_LOG_WRN("Failed reading image headers; Image=%u", + BOOT_CURR_IMG(state)); + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + return; + } +#endif + + /* Determine if we rebooted in the middle of an image swap + * operation. If a partial swap was detected, complete it. + */ + if (!boot_status_is_reset(bs)) { + +#if (BOOT_IMAGE_NUMBER > 1) + boot_review_image_swap_types(state, true); +#endif + +#ifdef MCUBOOT_OVERWRITE_ONLY + /* Should never arrive here, overwrite-only mode has + * no swap state. + */ + assert(0); +#else + /* Determine the type of swap operation being resumed from the + * `swap-type` trailer field. + */ + rc = boot_complete_partial_swap(state, bs); + assert(rc == 0); +#endif + /* Attempt to read an image header from each slot. Ensure that + * image headers in slots are aligned with headers in boot_data. + */ + rc = boot_read_image_headers(state, false, bs); + assert(rc == 0); + + /* Swap has finished set to NONE */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + } else { + /* There was no partial swap, determine swap type. */ + if (bs->swap_type == BOOT_SWAP_TYPE_NONE) { + BOOT_SWAP_TYPE(state) = boot_validated_swap_type(state, bs); + } else { + FIH_CALL(boot_validate_slot, fih_rc, + state, BOOT_SECONDARY_SLOT, bs); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_FAIL; + } else { + BOOT_SWAP_TYPE(state) = bs->swap_type; + } + } + +#if (BOOT_IMAGE_NUMBER > 1) + boot_review_image_swap_types(state, false); +#endif + +#ifdef MCUBOOT_BOOTSTRAP + if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_NONE) { + /* Header checks are done first because they are + * inexpensive. Since overwrite-only copies starting from + * offset 0, if interrupted, it might leave a valid header + * magic, so also run validation on the primary slot to be + * sure it's not OK. + */ + rc = boot_check_header_erased(state, BOOT_PRIMARY_SLOT); + FIH_CALL(boot_validate_slot, fih_rc, + state, BOOT_PRIMARY_SLOT, bs); + + if (rc == 0 || FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + + rc = (boot_img_hdr(state, BOOT_SECONDARY_SLOT)->ih_magic == IMAGE_MAGIC) ? 1: 0; + FIH_CALL(boot_validate_slot, fih_rc, + state, BOOT_SECONDARY_SLOT, bs); + + if (rc == 1 && FIH_EQ(fih_rc, FIH_SUCCESS)) { + /* Set swap type to REVERT to overwrite the primary + * slot with the image contained in secondary slot + * and to trigger the explicit setting of the + * image_ok flag. + */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_REVERT; + } + } + } +#endif + } + } else { + /* In that case if slots are not compatible. */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + } +} + +/** + * Updates the security counter for the current image. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_update_hw_rollback_protection(struct boot_loader_state *state) +{ +#ifdef MCUBOOT_HW_ROLLBACK_PROT + int rc; + + /* Update the stored security counter with the active image's security + * counter value. It will only be updated if the new security counter is + * greater than the stored value. + * + * In case of a successful image swapping when the swap type is TEST the + * security counter can be increased only after a reset, when the swap + * type is NONE and the image has marked itself "OK" (the image_ok flag + * has been set). This way a "revert" can be performed when it's + * necessary. + */ + if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_NONE) { + rc = boot_update_security_counter( + BOOT_CURR_IMG(state), + BOOT_PRIMARY_SLOT, + boot_img_hdr(state, BOOT_PRIMARY_SLOT)); + if (rc != 0) { + BOOT_LOG_ERR("Security counter update failed after image " + "validation."); + return rc; + } + } + + return 0; + +#else /* MCUBOOT_HW_ROLLBACK_PROT */ + (void) (state); + + return 0; +#endif +} + +/** + * Checks test swap downgrade prevention conditions. + * + * Function called only for swap upgrades test run. It may prevent + * swap if slot 1 image has <= version number or < security counter + * + * @param state Boot loader status information. + * + * @return 0 - image can be swapped, -1 downgrade prevention + */ +static int +check_downgrade_prevention(struct boot_loader_state *state) +{ +#if defined(MCUBOOT_DOWNGRADE_PREVENTION) && \ + (defined(MCUBOOT_SWAP_USING_MOVE) || defined(MCUBOOT_SWAP_USING_SCRATCH)) + uint32_t security_counter[2]; + int rc; + +#if defined(PM_S1_ADDRESS) + if (owner_nsib[BOOT_CURR_IMG(state)]) { + /* Downgrade prevention on S0/S1 image is managed by NSIB */ + return 0; + } +#endif + + if (MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER) { + /* If there was security no counter in slot 0, allow swap */ + rc = bootutil_get_img_security_cnt(&(BOOT_IMG(state, 0).hdr), + BOOT_IMG(state, 0).area, + &security_counter[0]); + if (rc != 0) { + return 0; + } + /* If there is no security counter in slot 1, or it's lower than + * that of slot 0, prevent downgrade */ + rc = bootutil_get_img_security_cnt(&(BOOT_IMG(state, 1).hdr), + BOOT_IMG(state, 1).area, + &security_counter[1]); + if (rc != 0 || security_counter[0] > security_counter[1]) { + rc = -1; + } + } + else { + rc = boot_version_cmp(&boot_img_hdr(state, BOOT_SECONDARY_SLOT)->ih_ver, + &boot_img_hdr(state, BOOT_PRIMARY_SLOT)->ih_ver); + } + if (rc < 0) { + /* Image in slot 0 prevents downgrade, delete image in slot 1 */ + BOOT_LOG_INF("Image %d in slot 1 erased due to downgrade prevention", BOOT_CURR_IMG(state)); + flash_area_erase(BOOT_IMG(state, 1).area, 0, + flash_area_get_size(BOOT_IMG(state, 1).area)); + } else { + rc = 0; + } + return rc; +#else + (void)state; + return 0; +#endif +} + +fih_ret +context_boot_go(struct boot_loader_state *state, struct boot_rsp *rsp) +{ + size_t slot; + struct boot_status bs; + int rc = -1; + FIH_DECLARE(fih_rc, FIH_FAILURE); + int fa_id; + int image_index; + bool has_upgrade; + volatile int fih_cnt; + +#if defined(__BOOTSIM__) + /* The array of slot sectors are defined here (as opposed to file scope) so + * that they don't get allocated for non-boot-loader apps. This is + * necessary because the gcc option "-fdata-sections" doesn't seem to have + * any effect in older gcc versions (e.g., 4.8.4). + */ + TARGET_STATIC boot_sector_t primary_slot_sectors[BOOT_IMAGE_NUMBER][BOOT_MAX_IMG_SECTORS]; + TARGET_STATIC boot_sector_t secondary_slot_sectors[BOOT_IMAGE_NUMBER][BOOT_MAX_IMG_SECTORS]; +#if MCUBOOT_SWAP_USING_SCRATCH + TARGET_STATIC boot_sector_t scratch_sectors[BOOT_MAX_IMG_SECTORS]; +#endif +#endif + + has_upgrade = false; + +#if (BOOT_IMAGE_NUMBER == 1) + (void)has_upgrade; +#endif + + /* Iterate over all the images. By the end of the loop the swap type has + * to be determined for each image and all aborted swaps have to be + * completed. + */ + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif +#if defined(MCUBOOT_ENC_IMAGES) && (BOOT_IMAGE_NUMBER > 1) + /* The keys used for encryption may no longer be valid (could belong to + * another images). Therefore, mark them as invalid to force their reload + * by boot_enc_load(). + */ + boot_enc_zeroize(BOOT_CURR_ENC(state)); +#endif + + image_index = BOOT_CURR_IMG(state); + +#if !defined(__BOOTSIM__) + BOOT_IMG(state, BOOT_PRIMARY_SLOT).sectors = + sector_buffers.primary[image_index]; + BOOT_IMG(state, BOOT_SECONDARY_SLOT).sectors = + sector_buffers.secondary[image_index]; +#if MCUBOOT_SWAP_USING_SCRATCH + state->scratch.sectors = sector_buffers.scratch; +#endif +#else + BOOT_IMG(state, BOOT_PRIMARY_SLOT).sectors = + primary_slot_sectors[image_index]; + BOOT_IMG(state, BOOT_SECONDARY_SLOT).sectors = + secondary_slot_sectors[image_index]; +#if MCUBOOT_SWAP_USING_SCRATCH + state->scratch.sectors = scratch_sectors; +#endif +#endif + + /* Open primary and secondary image areas for the duration + * of this call. + */ + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + fa_id = flash_area_id_from_multi_image_slot(image_index, slot); + rc = flash_area_open(fa_id, &BOOT_IMG_AREA(state, slot)); + assert(rc == 0); + + if (rc != 0) { + BOOT_LOG_ERR("Failed to open flash area ID %d (image %d slot %d): %d, " + "cannot continue", fa_id, image_index, (int8_t)slot, rc); + FIH_PANIC; + } + } +#if MCUBOOT_SWAP_USING_SCRATCH + rc = flash_area_open(FLASH_AREA_IMAGE_SCRATCH, + &BOOT_SCRATCH_AREA(state)); + assert(rc == 0); + + if (rc != 0) { + BOOT_LOG_ERR("Failed to open scratch flash area: %d, cannot continue", rc); + FIH_PANIC; + } +#endif + + /* Determine swap type and complete swap if it has been aborted. */ + boot_prepare_image_for_update(state, &bs); + + if (BOOT_IS_UPGRADE(BOOT_SWAP_TYPE(state))) { + has_upgrade = true; + } + } + + /* cleanup secondary slots which were recognized unusable*/ + sec_slot_cleanup_if_unusable(); + +#if (BOOT_IMAGE_NUMBER > 1) + if (has_upgrade) { + /* Iterate over all the images and verify whether the image dependencies + * are all satisfied and update swap type if necessary. + */ + rc = boot_verify_dependencies(state); + if (rc != 0) { + /* + * It was impossible to upgrade because the expected dependency version + * was not available. Here we already changed the swap_type so that + * instead of asserting the bootloader, we continue and no upgrade is + * performed. + */ + rc = 0; + } + } +#endif + + /* Trigger status change callback with upgrading status */ + mcuboot_status_change(MCUBOOT_STATUS_UPGRADING); + + /* Iterate over all the images. At this point there are no aborted swaps + * and the swap types are determined for each image. By the end of the loop + * all required update operations will have been finished. + */ + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if (BOOT_IMAGE_NUMBER > 1) + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } + +#ifdef MCUBOOT_ENC_IMAGES + /* The keys used for encryption may no longer be valid (could belong to + * another images). Therefore, mark them as invalid to force their reload + * by boot_enc_load(). + */ + boot_enc_zeroize(BOOT_CURR_ENC(state)); +#endif /* MCUBOOT_ENC_IMAGES */ + + /* Indicate that swap is not aborted */ + boot_status_reset(&bs); +#endif /* (BOOT_IMAGE_NUMBER > 1) */ + + /* Set the previously determined swap type */ + bs.swap_type = BOOT_SWAP_TYPE(state); + + switch (BOOT_SWAP_TYPE(state)) { + case BOOT_SWAP_TYPE_NONE: + break; + + case BOOT_SWAP_TYPE_TEST: + /* fallthrough */ + case BOOT_SWAP_TYPE_PERM: + if (check_downgrade_prevention(state) != 0) { + /* Downgrade prevented */ + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE; + break; + } + /* fallthrough */ + case BOOT_SWAP_TYPE_REVERT: + rc = BOOT_HOOK_CALL(boot_perform_update_hook, BOOT_HOOK_REGULAR, + BOOT_CURR_IMG(state), &(BOOT_IMG(state, 1).hdr), + BOOT_IMG_AREA(state, BOOT_SECONDARY_SLOT)); + if (rc == BOOT_HOOK_REGULAR) + { + rc = boot_perform_update(state, &bs); + } + assert(rc == 0); +#if defined(PM_S1_ADDRESS) && defined(CONFIG_REBOOT) + if (owner_nsib[BOOT_CURR_IMG(state)]) { + sys_reboot(SYS_REBOOT_COLD); + + } +#endif + break; + + case BOOT_SWAP_TYPE_FAIL: + /* The image in secondary slot was invalid and is now erased. Ensure + * we don't try to boot into it again on the next reboot. Do this by + * pretending we just reverted back to primary slot. + */ +#ifndef MCUBOOT_OVERWRITE_ONLY + /* image_ok needs to be explicitly set to avoid a new revert. */ + rc = swap_set_image_ok(BOOT_CURR_IMG(state)); + if (rc != 0) { + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } +#endif /* !MCUBOOT_OVERWRITE_ONLY */ + break; + + default: + BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC; + } + + if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_PANIC) { + BOOT_LOG_ERR("panic!"); + assert(0); + + /* Loop forever... */ + FIH_PANIC; + } + } + + /* Iterate over all the images. At this point all required update operations + * have finished. By the end of the loop each image in the primary slot will + * have been re-validated. + */ + FIH_SET(fih_cnt, 0); + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + /* Hardenned to prevent from skipping check of a given image, + * tmp_img_mask is declared volatile + */ + volatile bool tmp_img_mask; + FIH_SET(tmp_img_mask, state->img_mask[BOOT_CURR_IMG(state)]); + if (FIH_EQ(tmp_img_mask, true)) { + ++fih_cnt; + continue; + } +#endif + if (BOOT_SWAP_TYPE(state) != BOOT_SWAP_TYPE_NONE) { + /* Attempt to read an image header from each slot. Ensure that image + * headers in slots are aligned with headers in boot_data. + * Note: Quite complicated internal logic of boot_read_image_headers + * uses boot state, the last parm, to figure out in which slot which + * header is located; when boot state is not provided, then it + * is assumed that headers are at proper slots (we are not in + * the middle of moving images, etc). + */ + rc = boot_read_image_headers(state, false, NULL); + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + /* Since headers were reloaded, it can be assumed we just performed + * a swap or overwrite. Now the header info that should be used to + * provide the data for the bootstrap, which previously was at + * secondary slot, was updated to primary slot. + */ + } + +#ifdef MCUBOOT_VALIDATE_PRIMARY_SLOT +#ifdef PM_S1_ADDRESS + /* Patch needed for NCS. Image 1 primary is the currently + * executing MCUBoot image, and is therefore already validated by NSIB and + * does not need to also be validated by MCUBoot. + */ + bool image_validated_by_nsib = BOOT_CURR_IMG(state) == 1; + if (!image_validated_by_nsib) +#endif + { + FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_PRIMARY_SLOT, NULL); + /* Check for all possible values is redundant in normal operation it + * is meant to prevent FI attack. + */ + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS) || + FIH_EQ(fih_rc, FIH_FAILURE) || + FIH_EQ(fih_rc, FIH_NO_BOOTABLE_IMAGE)) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + } +#else + /* Even if we're not re-validating the primary slot, we could be booting + * onto an empty flash chip. At least do a basic sanity check that + * the magic number on the image is OK. + */ + if (BOOT_IMG(state, BOOT_PRIMARY_SLOT).hdr.ih_magic != IMAGE_MAGIC) { + BOOT_LOG_ERR("bad image magic 0x%lx; Image=%u", (unsigned long) + BOOT_IMG(state, BOOT_PRIMARY_SLOT).hdr.ih_magic, + BOOT_CURR_IMG(state)); + rc = BOOT_EBADIMAGE; + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } +#endif /* MCUBOOT_VALIDATE_PRIMARY_SLOT */ + +#ifdef PM_S1_ADDRESS + if (!image_validated_by_nsib) +#endif + { + rc = boot_update_hw_rollback_protection(state); + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + } + + rc = boot_add_shared_data(state, BOOT_PRIMARY_SLOT); + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + ++fih_cnt; + } + /* + * fih_cnt should be equal to BOOT_IMAGE_NUMBER now. + * If this is not the case, at least one iteration of the loop + * has been skipped. + */ + if(FIH_NOT_EQ(fih_cnt, BOOT_IMAGE_NUMBER)) { + FIH_PANIC; + } + + fill_rsp(state, rsp); + + fih_rc = FIH_SUCCESS; +out: + /* + * Since the boot_status struct stores plaintext encryption keys, reset + * them here to avoid the possibility of jumping into an image that could + * easily recover them. + */ +#if defined(MCUBOOT_ENC_IMAGES) || defined(MCUBOOT_SWAP_SAVE_ENCTLV) + like_mbedtls_zeroize(&bs, sizeof(bs)); +#else + memset(&bs, 0, sizeof(struct boot_status)); +#endif + + close_all_flash_areas(state); + FIH_RET(fih_rc); +} + +fih_ret +split_go(int loader_slot, int split_slot, void **entry) +{ + boot_sector_t *sectors; + uintptr_t entry_val; + int loader_flash_id; + int split_flash_id; + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + sectors = malloc(BOOT_MAX_IMG_SECTORS * 2 * sizeof *sectors); + if (sectors == NULL) { + FIH_RET(FIH_FAILURE); + } + BOOT_IMG(&boot_data, loader_slot).sectors = sectors + 0; + BOOT_IMG(&boot_data, split_slot).sectors = sectors + BOOT_MAX_IMG_SECTORS; + + loader_flash_id = flash_area_id_from_image_slot(loader_slot); + rc = flash_area_open(loader_flash_id, + &BOOT_IMG_AREA(&boot_data, loader_slot)); + assert(rc == 0); + split_flash_id = flash_area_id_from_image_slot(split_slot); + rc = flash_area_open(split_flash_id, + &BOOT_IMG_AREA(&boot_data, split_slot)); + assert(rc == 0); + + /* Determine the sector layout of the image slots and scratch area. */ + rc = boot_read_sectors(&boot_data); + if (rc != 0) { + rc = SPLIT_GO_ERR; + goto done; + } + + rc = boot_read_image_headers(&boot_data, true, NULL); + if (rc != 0) { + goto done; + } + + /* Don't check the bootable image flag because we could really call a + * bootable or non-bootable image. Just validate that the image check + * passes which is distinct from the normal check. + */ + FIH_CALL(split_image_check, fih_rc, + boot_img_hdr(&boot_data, split_slot), + BOOT_IMG_AREA(&boot_data, split_slot), + boot_img_hdr(&boot_data, loader_slot), + BOOT_IMG_AREA(&boot_data, loader_slot)); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + goto done; + } + + entry_val = boot_img_slot_off(&boot_data, split_slot) + + boot_img_hdr(&boot_data, split_slot)->ih_hdr_size; + *entry = (void *) entry_val; + rc = SPLIT_GO_OK; + +done: + flash_area_close(BOOT_IMG_AREA(&boot_data, split_slot)); + flash_area_close(BOOT_IMG_AREA(&boot_data, loader_slot)); + free(sectors); + + if (rc) { + FIH_SET(fih_rc, FIH_FAILURE); + } + + FIH_RET(fih_rc); +} + +#else /* MCUBOOT_DIRECT_XIP || MCUBOOT_RAM_LOAD */ + +/** + * Opens all flash areas and checks which contain an image with a valid header. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_get_slot_usage(struct boot_loader_state *state) +{ + uint32_t slot; + int fa_id; + int rc; + struct image_header *hdr = NULL; + + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif + /* Open all the slots */ + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + fa_id = flash_area_id_from_multi_image_slot( + BOOT_CURR_IMG(state), slot); + rc = flash_area_open(fa_id, &BOOT_IMG_AREA(state, slot)); + assert(rc == 0); + } + + /* Attempt to read an image header from each slot. */ + rc = boot_read_image_headers(state, false, NULL); + if (rc != 0) { + BOOT_LOG_WRN("Failed reading image headers."); + return rc; + } + + /* Check headers in all slots */ + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + hdr = boot_img_hdr(state, slot); + + if (boot_is_header_valid(hdr, BOOT_IMG_AREA(state, slot), state)) { + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[slot] = true; + BOOT_LOG_IMAGE_INFO(slot, hdr); + } else { + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[slot] = false; + BOOT_LOG_INF("Image %d %s slot: Image not found", + BOOT_CURR_IMG(state), + (slot == BOOT_PRIMARY_SLOT) + ? "Primary" : "Secondary"); + } + } + + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + } + + return 0; +} + +/** + * Finds the slot containing the image with the highest version number for the + * current image. + * + * @param state Boot loader status information. + * + * @return NO_ACTIVE_SLOT if no available slot found, number of + * the found slot otherwise. + */ +static uint32_t +find_slot_with_highest_version(struct boot_loader_state *state) +{ + uint32_t slot; + uint32_t candidate_slot = NO_ACTIVE_SLOT; + int rc; + + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + if (state->slot_usage[BOOT_CURR_IMG(state)].slot_available[slot]) { + if (candidate_slot == NO_ACTIVE_SLOT) { + candidate_slot = slot; + } else { + rc = boot_version_cmp( + &boot_img_hdr(state, slot)->ih_ver, + &boot_img_hdr(state, candidate_slot)->ih_ver); + if (rc == 1) { + /* The version of the image being examined is greater than + * the version of the current candidate. + */ + candidate_slot = slot; + } + } + } + } + + return candidate_slot; +} + +#ifdef MCUBOOT_HAVE_LOGGING +/** + * Prints the state of the loaded images. + * + * @param state Boot loader status information. + */ +static void +print_loaded_images(struct boot_loader_state *state) +{ + uint32_t active_slot; + + (void)state; + + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + + BOOT_LOG_INF("Image %d loaded from the %s slot", + BOOT_CURR_IMG(state), + (active_slot == BOOT_PRIMARY_SLOT) ? + "primary" : "secondary"); + } +} +#endif + +#if defined(MCUBOOT_DIRECT_XIP) && defined(MCUBOOT_DIRECT_XIP_REVERT) +/** + * Checks whether the active slot of the current image was previously selected + * to run. Erases the image if it was selected but its execution failed, + * otherwise marks it as selected if it has not been before. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_select_or_erase(struct boot_loader_state *state) +{ + const struct flash_area *fap; + int fa_id; + int rc; + uint32_t active_slot; + struct boot_swap_state* active_swap_state; + + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + + fa_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), active_slot); + rc = flash_area_open(fa_id, &fap); + assert(rc == 0); + + active_swap_state = &(state->slot_usage[BOOT_CURR_IMG(state)].swap_state); + + memset(active_swap_state, 0, sizeof(struct boot_swap_state)); + rc = boot_read_swap_state(fap, active_swap_state); + assert(rc == 0); + + if (active_swap_state->magic != BOOT_MAGIC_GOOD || + (active_swap_state->copy_done == BOOT_FLAG_SET && + active_swap_state->image_ok != BOOT_FLAG_SET)) { + /* + * A reboot happened without the image being confirmed at + * runtime or its trailer is corrupted/invalid. Erase the image + * to prevent it from being selected again on the next reboot. + */ + BOOT_LOG_DBG("Erasing faulty image in the %s slot.", + (active_slot == BOOT_PRIMARY_SLOT) ? "primary" : "secondary"); + rc = flash_area_erase(fap, 0, flash_area_get_size(fap)); + assert(rc == 0); + + flash_area_close(fap); + rc = -1; + } else { + if (active_swap_state->copy_done != BOOT_FLAG_SET) { + if (active_swap_state->copy_done == BOOT_FLAG_BAD) { + BOOT_LOG_DBG("The copy_done flag had an unexpected value. Its " + "value was neither 'set' nor 'unset', but 'bad'."); + } + /* + * Set the copy_done flag, indicating that the image has been + * selected to boot. It can be set in advance, before even + * validating the image, because in case the validation fails, the + * entire image slot will be erased (including the trailer). + */ + rc = boot_write_copy_done(fap); + if (rc != 0) { + BOOT_LOG_WRN("Failed to set copy_done flag of the image in " + "the %s slot.", (active_slot == BOOT_PRIMARY_SLOT) ? + "primary" : "secondary"); + rc = 0; + } + } + flash_area_close(fap); + } + + return rc; +} +#endif /* MCUBOOT_DIRECT_XIP && MCUBOOT_DIRECT_XIP_REVERT */ + +#ifdef MCUBOOT_RAM_LOAD + +#ifndef MULTIPLE_EXECUTABLE_RAM_REGIONS +#if !defined(IMAGE_EXECUTABLE_RAM_START) || !defined(IMAGE_EXECUTABLE_RAM_SIZE) +#error "Platform MUST define executable RAM bounds in case of RAM_LOAD" +#endif +#endif + +/** + * Verifies that the active slot of the current image can be loaded within the + * predefined bounds that are allowed to be used by executable images. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_verify_ram_load_address(struct boot_loader_state *state) +{ + uint32_t img_dst; + uint32_t img_sz; + uint32_t img_end_addr; + uint32_t exec_ram_start; + uint32_t exec_ram_size; + + (void)state; + +#ifdef MULTIPLE_EXECUTABLE_RAM_REGIONS + int rc; + + rc = boot_get_image_exec_ram_info(BOOT_CURR_IMG(state), &exec_ram_start, + &exec_ram_size); + if (rc != 0) { + return BOOT_EBADSTATUS; + } +#else + exec_ram_start = IMAGE_EXECUTABLE_RAM_START; + exec_ram_size = IMAGE_EXECUTABLE_RAM_SIZE; +#endif + + img_dst = state->slot_usage[BOOT_CURR_IMG(state)].img_dst; + img_sz = state->slot_usage[BOOT_CURR_IMG(state)].img_sz; + + if (img_dst < exec_ram_start) { + return BOOT_EBADIMAGE; + } + + if (!boot_u32_safe_add(&img_end_addr, img_dst, img_sz)) { + return BOOT_EBADIMAGE; + } + + if (img_end_addr > (exec_ram_start + exec_ram_size)) { + return BOOT_EBADIMAGE; + } + + return 0; +} + +#ifdef MCUBOOT_ENC_IMAGES + +/** + * Copies and decrypts an image from a slot in the flash to an SRAM address. + * + * @param state Boot loader status information. + * @param slot The flash slot of the image to be copied to SRAM. + * @param hdr The image header. + * @param src_sz Size of the image. + * @param img_dst Pointer to the address at which the image needs to be + * copied to SRAM. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_decrypt_and_copy_image_to_sram(struct boot_loader_state *state, + uint32_t slot, struct image_header *hdr, + uint32_t src_sz, uint32_t img_dst) +{ + /* The flow for the decryption and copy of the image is as follows : + * 1. The whole image is copied to the RAM (header + payload + TLV). + * 2. The encryption key is loaded from the TLV in flash. + * 3. The image is then decrypted chunk by chunk in RAM (1 chunk + * is 1024 bytes). Only the payload section is decrypted. + * 4. The image is authenticated in RAM. + */ + const struct flash_area *fap_src = NULL; + struct boot_status bs; + uint32_t blk_off; + uint32_t tlv_off; + uint32_t blk_sz; + uint32_t bytes_copied = hdr->ih_hdr_size; + uint32_t chunk_sz; + uint32_t max_sz = 1024; + uint16_t idx; + uint8_t * cur_dst; + int area_id; + int rc; + uint8_t * ram_dst = (void *)(IMAGE_RAM_BASE + img_dst); + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap_src); + if (rc != 0){ + return BOOT_EFLASH; + } + + tlv_off = BOOT_TLV_OFF(hdr); + + /* Copying the whole image in RAM */ + rc = flash_area_read(fap_src, 0, ram_dst, src_sz); + if (rc != 0) { + goto done; + } + + rc = boot_enc_load(BOOT_CURR_ENC(state), slot, hdr, fap_src, &bs); + if (rc < 0) { + goto done; + } + + /* if rc > 0 then the key has already been loaded */ + if (rc == 0 && boot_enc_set_key(BOOT_CURR_ENC(state), slot, &bs)) { + goto done; + } + + /* Starting at the end of the header as the header section is not encrypted */ + while (bytes_copied < tlv_off) { /* TLV section copied previously */ + if (src_sz - bytes_copied > max_sz) { + chunk_sz = max_sz; + } else { + chunk_sz = src_sz - bytes_copied; + } + + cur_dst = ram_dst + bytes_copied; + blk_sz = chunk_sz; + idx = 0; + blk_off = ((bytes_copied) - hdr->ih_hdr_size) & 0xf; + if (bytes_copied + chunk_sz > tlv_off) { + /* Going over TLV section + * Part of the chunk is encrypted payload */ + blk_sz = tlv_off - (bytes_copied); + } + boot_enc_decrypt(BOOT_CURR_ENC(state), slot, + (bytes_copied + idx) - hdr->ih_hdr_size, blk_sz, + blk_off, cur_dst); + bytes_copied += chunk_sz; + } + rc = 0; + +done: + flash_area_close(fap_src); + + return rc; +} + +#endif /* MCUBOOT_ENC_IMAGES */ +/** + * Copies a slot of the current image into SRAM. + * + * @param state Boot loader status information. + * @param slot The flash slot of the image to be copied to SRAM. + * @param img_dst The address at which the image needs to be copied to + * SRAM. + * @param img_sz The size of the image that needs to be copied to SRAM. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_copy_image_to_sram(struct boot_loader_state *state, int slot, + uint32_t img_dst, uint32_t img_sz) +{ + int rc; + const struct flash_area *fap_src = NULL; + int area_id; + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + + rc = flash_area_open(area_id, &fap_src); + if (rc != 0) { + return BOOT_EFLASH; + } + + /* Direct copy from flash to its new location in SRAM. */ + rc = flash_area_read(fap_src, 0, (void *)(IMAGE_RAM_BASE + img_dst), img_sz); + if (rc != 0) { + BOOT_LOG_INF("Error whilst copying image %d from Flash to SRAM: %d", + BOOT_CURR_IMG(state), rc); + } + + flash_area_close(fap_src); + + return rc; +} + +#if (BOOT_IMAGE_NUMBER > 1) +/** + * Checks if two memory regions (A and B) are overlap or not. + * + * @param start_a Start of the A region. + * @param end_a End of the A region. + * @param start_b Start of the B region. + * @param end_b End of the B region. + * + * @return true if there is overlap; false otherwise. + */ +static bool +do_regions_overlap(uint32_t start_a, uint32_t end_a, + uint32_t start_b, uint32_t end_b) +{ + if (start_b > end_a) { + return false; + } else if (start_b >= start_a) { + return true; + } else if (end_b > start_a) { + return true; + } + + return false; +} + +/** + * Checks if the image we want to load to memory overlap with an already + * ramloaded image. + * + * @param state Boot loader status information. + * + * @return 0 if there is no overlap; nonzero otherwise. + */ +static int +boot_check_ram_load_overlapping(struct boot_loader_state *state) +{ + uint32_t i; + + uint32_t start_a; + uint32_t end_a; + uint32_t start_b; + uint32_t end_b; + uint32_t image_id_to_check = BOOT_CURR_IMG(state); + + start_a = state->slot_usage[image_id_to_check].img_dst; + /* Safe to add here, values are already verified in + * boot_verify_ram_load_address() */ + end_a = start_a + state->slot_usage[image_id_to_check].img_sz; + + for (i = 0; i < BOOT_IMAGE_NUMBER; i++) { + if (state->slot_usage[i].active_slot == NO_ACTIVE_SLOT + || i == image_id_to_check) { + continue; + } + + start_b = state->slot_usage[i].img_dst; + /* Safe to add here, values are already verified in + * boot_verify_ram_load_address() */ + end_b = start_b + state->slot_usage[i].img_sz; + + if (do_regions_overlap(start_a, end_a, start_b, end_b)) { + return -1; + } + } + + return 0; +} +#endif + +/** + * Loads the active slot of the current image into SRAM. The load address and + * image size is extracted from the image header. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_load_image_to_sram(struct boot_loader_state *state) +{ + uint32_t active_slot; + struct image_header *hdr = NULL; + uint32_t img_dst; + uint32_t img_sz; + int rc; + + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + hdr = boot_img_hdr(state, active_slot); + + if (hdr->ih_flags & IMAGE_F_RAM_LOAD) { + + img_dst = hdr->ih_load_addr; + + rc = boot_read_image_size(state, active_slot, &img_sz); + if (rc != 0) { + return rc; + } + + state->slot_usage[BOOT_CURR_IMG(state)].img_dst = img_dst; + state->slot_usage[BOOT_CURR_IMG(state)].img_sz = img_sz; + + rc = boot_verify_ram_load_address(state); + if (rc != 0) { + BOOT_LOG_INF("Image %d RAM load address 0x%x is invalid.", BOOT_CURR_IMG(state), img_dst); + return rc; + } + +#if (BOOT_IMAGE_NUMBER > 1) + rc = boot_check_ram_load_overlapping(state); + if (rc != 0) { + BOOT_LOG_INF("Image %d RAM loading to address 0x%x would overlap with\ + another image.", BOOT_CURR_IMG(state), img_dst); + return rc; + } +#endif +#ifdef MCUBOOT_ENC_IMAGES + /* decrypt image if encrypted and copy it to RAM */ + if (IS_ENCRYPTED(hdr)) { + rc = boot_decrypt_and_copy_image_to_sram(state, active_slot, hdr, img_sz, img_dst); + } else { + rc = boot_copy_image_to_sram(state, active_slot, img_dst, img_sz); + } +#else + /* Copy image to the load address from where it currently resides in + * flash. + */ + rc = boot_copy_image_to_sram(state, active_slot, img_dst, img_sz); +#endif + if (rc != 0) { + BOOT_LOG_INF("Image %d RAM loading to 0x%x is failed.", BOOT_CURR_IMG(state), img_dst); + } else { + BOOT_LOG_INF("Image %d RAM loading to 0x%x is succeeded.", BOOT_CURR_IMG(state), img_dst); + } + } else { + /* Only images that support IMAGE_F_RAM_LOAD are allowed if + * MCUBOOT_RAM_LOAD is set. + */ + rc = BOOT_EBADIMAGE; + } + + if (rc != 0) { + state->slot_usage[BOOT_CURR_IMG(state)].img_dst = 0; + state->slot_usage[BOOT_CURR_IMG(state)].img_sz = 0; + } + + return rc; +} + +/** + * Removes an image from SRAM, by overwriting it with zeros. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static inline int +boot_remove_image_from_sram(struct boot_loader_state *state) +{ + (void)state; + + BOOT_LOG_INF("Removing image %d from SRAM at address 0x%x", + BOOT_CURR_IMG(state), + state->slot_usage[BOOT_CURR_IMG(state)].img_dst); + + memset((void*)(IMAGE_RAM_BASE + state->slot_usage[BOOT_CURR_IMG(state)].img_dst), + 0, state->slot_usage[BOOT_CURR_IMG(state)].img_sz); + + state->slot_usage[BOOT_CURR_IMG(state)].img_dst = 0; + state->slot_usage[BOOT_CURR_IMG(state)].img_sz = 0; + + return 0; +} + +/** + * Removes an image from flash by erasing the corresponding flash area + * + * @param state Boot loader status information. + * @param slot The flash slot of the image to be erased. + * + * @return 0 on success; nonzero on failure. + */ +static inline int +boot_remove_image_from_flash(struct boot_loader_state *state, uint32_t slot) +{ + int area_id; + int rc; + const struct flash_area *fap; + + (void)state; + + BOOT_LOG_INF("Removing image %d slot %d from flash", BOOT_CURR_IMG(state), + slot); + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap); + if (rc == 0) { + flash_area_erase(fap, 0, flash_area_get_size(fap)); + flash_area_close(fap); + } + + return rc; +} +#endif /* MCUBOOT_RAM_LOAD */ + + +/** + * Tries to load a slot for all the images with validation. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +fih_ret +boot_load_and_validate_images(struct boot_loader_state *state) +{ + uint32_t active_slot; + int rc; + fih_ret fih_rc; + + /* Go over all the images and try to load one */ + IMAGES_ITER(BOOT_CURR_IMG(state)) { + /* All slots tried until a valid image found. Breaking from this loop + * means that a valid image found or already loaded. If no slot is + * found the function returns with error code. */ + while (true) { + /* Go over all the slots and try to load one */ + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + if (active_slot != NO_ACTIVE_SLOT){ + /* A slot is already active, go to next image. */ + break; + } + + active_slot = find_slot_with_highest_version(state); + if (active_slot == NO_ACTIVE_SLOT) { + BOOT_LOG_INF("No slot to load for image %d", + BOOT_CURR_IMG(state)); + FIH_RET(FIH_FAILURE); + } + + /* Save the number of the active slot. */ + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = active_slot; + +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif + +#ifdef MCUBOOT_DIRECT_XIP + rc = boot_rom_address_check(state); + if (rc != 0) { + /* The image is placed in an unsuitable slot. */ + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[active_slot] = false; + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + continue; + } + +#ifdef MCUBOOT_DIRECT_XIP_REVERT + rc = boot_select_or_erase(state); + if (rc != 0) { + /* The selected image slot has been erased. */ + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[active_slot] = false; + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + continue; + } +#endif /* MCUBOOT_DIRECT_XIP_REVERT */ +#endif /* MCUBOOT_DIRECT_XIP */ + +#ifdef MCUBOOT_RAM_LOAD + /* Image is first loaded to RAM and authenticated there in order to + * prevent TOCTOU attack during image copy. This could be applied + * when loading images from external (untrusted) flash to internal + * (trusted) RAM and image is authenticated before copying. + */ + rc = boot_load_image_to_sram(state); + if (rc != 0 ) { + /* Image cannot be ramloaded. */ + boot_remove_image_from_flash(state, active_slot); + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[active_slot] = false; + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + continue; + } +#endif /* MCUBOOT_RAM_LOAD */ + + FIH_CALL(boot_validate_slot, fih_rc, state, active_slot, NULL); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + /* Image is invalid. */ +#ifdef MCUBOOT_RAM_LOAD + boot_remove_image_from_sram(state); +#endif /* MCUBOOT_RAM_LOAD */ + state->slot_usage[BOOT_CURR_IMG(state)].slot_available[active_slot] = false; + state->slot_usage[BOOT_CURR_IMG(state)].active_slot = NO_ACTIVE_SLOT; + continue; + } + + /* Valid image loaded from a slot, go to next image. */ + break; + } + } + + FIH_RET(FIH_SUCCESS); +} + +/** + * Updates the security counter for the current image. + * + * @param state Boot loader status information. + * + * @return 0 on success; nonzero on failure. + */ +static int +boot_update_hw_rollback_protection(struct boot_loader_state *state) +{ +#ifdef MCUBOOT_HW_ROLLBACK_PROT + int rc; + + /* Update the stored security counter with the newer (active) image's + * security counter value. + */ +#if defined(MCUBOOT_DIRECT_XIP) && defined(MCUBOOT_DIRECT_XIP_REVERT) + /* When the 'revert' mechanism is enabled in direct-xip mode, the + * security counter can be increased only after reboot, if the image + * has been confirmed at runtime (the image_ok flag has been set). + * This way a 'revert' can be performed when it's necessary. + */ + if (state->slot_usage[BOOT_CURR_IMG(state)].swap_state.image_ok == BOOT_FLAG_SET) { +#endif + rc = boot_update_security_counter(BOOT_CURR_IMG(state), + state->slot_usage[BOOT_CURR_IMG(state)].active_slot, + boot_img_hdr(state, state->slot_usage[BOOT_CURR_IMG(state)].active_slot)); + if (rc != 0) { + BOOT_LOG_ERR("Security counter update failed after image %d validation.", BOOT_CURR_IMG(state)); + return rc; + } +#if defined(MCUBOOT_DIRECT_XIP) && defined(MCUBOOT_DIRECT_XIP_REVERT) + } +#endif + + return 0; + +#else /* MCUBOOT_HW_ROLLBACK_PROT */ + (void) (state); + return 0; +#endif +} + +fih_ret +context_boot_go(struct boot_loader_state *state, struct boot_rsp *rsp) +{ + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + rc = boot_get_slot_usage(state); + if (rc != 0) { + goto out; + } + +#if (BOOT_IMAGE_NUMBER > 1) + while (true) { +#endif + FIH_CALL(boot_load_and_validate_images, fih_rc, state); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + +#if (BOOT_IMAGE_NUMBER > 1) + rc = boot_verify_dependencies(state); + if (rc != 0) { + /* Dependency check failed for an image, it has been removed from + * SRAM in case of MCUBOOT_RAM_LOAD strategy, and set to + * unavailable. Try to load an image from another slot. + */ + continue; + } + /* Dependency check was successful. */ + break; + } +#endif + + IMAGES_ITER(BOOT_CURR_IMG(state)) { +#if BOOT_IMAGE_NUMBER > 1 + if (state->img_mask[BOOT_CURR_IMG(state)]) { + continue; + } +#endif + rc = boot_update_hw_rollback_protection(state); + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + + rc = boot_add_shared_data(state, (uint8_t)state->slot_usage[BOOT_CURR_IMG(state)].active_slot); + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + goto out; + } + } + + /* All image loaded successfully. */ +#ifdef MCUBOOT_HAVE_LOGGING + print_loaded_images(state); +#endif + + fill_rsp(state, rsp); + +out: + close_all_flash_areas(state); + + if (rc != 0) { + FIH_SET(fih_rc, FIH_FAILURE); + } + + FIH_RET(fih_rc); +} +#endif /* MCUBOOT_DIRECT_XIP || MCUBOOT_RAM_LOAD */ + +/** + * Prepares the booting process. This function moves images around in flash as + * appropriate, and tells you what address to boot from. + * + * @param rsp On success, indicates how booting should occur. + * + * @return FIH_SUCCESS on success; nonzero on failure. + */ +fih_ret +boot_go(struct boot_rsp *rsp) +{ + FIH_DECLARE(fih_rc, FIH_FAILURE); + + boot_state_clear(NULL); + + FIH_CALL(context_boot_go, fih_rc, &boot_data, rsp); + FIH_RET(fih_rc); +} + +/** + * Prepares the booting process, considering only a single image. This function + * moves images around in flash as appropriate, and tells you what address to + * boot from. + * + * @param rsp On success, indicates how booting should occur. + * + * @param image_id The image ID to prepare the boot process for. + * + * @return FIH_SUCCESS on success; nonzero on failure. + */ +fih_ret +boot_go_for_image_id(struct boot_rsp *rsp, uint32_t image_id) +{ + FIH_DECLARE(fih_rc, FIH_FAILURE); + + if (image_id >= BOOT_IMAGE_NUMBER) { + FIH_RET(FIH_FAILURE); + } + +#if BOOT_IMAGE_NUMBER > 1 + memset(&boot_data.img_mask, 1, BOOT_IMAGE_NUMBER); + boot_data.img_mask[image_id] = 0; +#endif + + FIH_CALL(context_boot_go, fih_rc, &boot_data, rsp); + FIH_RET(fih_rc); +} + +/** + * Clears the boot state, so that previous operations have no effect on new + * ones. + * + * @param state The state that should be cleared. If the value + * is NULL, the default bootloader state will be + * cleared. + */ +void boot_state_clear(struct boot_loader_state *state) +{ + if (state != NULL) { + memset(state, 0, sizeof(struct boot_loader_state)); + } else { + memset(&boot_data, 0, sizeof(struct boot_loader_state)); + } +} + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) +/** + * Reads image data to find out the maximum application sizes. Only needs to + * be called in serial recovery mode, as the state information is unpopulated + * at that time + */ +static void boot_fetch_slot_state_sizes(void) +{ + size_t slot; + int rc = -1; + int fa_id; + int image_index; + + IMAGES_ITER(BOOT_CURR_IMG(&boot_data)) { + int max_size = 0; + + image_index = BOOT_CURR_IMG(&boot_data); + + BOOT_IMG(&boot_data, BOOT_PRIMARY_SLOT).sectors = + sector_buffers.primary[image_index]; + BOOT_IMG(&boot_data, BOOT_SECONDARY_SLOT).sectors = + sector_buffers.secondary[image_index]; +#if MCUBOOT_SWAP_USING_SCRATCH + boot_data.scratch.sectors = sector_buffers.scratch; +#endif + + /* Open primary and secondary image areas for the duration + * of this call. + */ + for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) { + fa_id = flash_area_id_from_multi_image_slot(image_index, slot); + rc = flash_area_open(fa_id, &BOOT_IMG_AREA(&boot_data, slot)); + assert(rc == 0); + + if (rc != 0) { + goto finish; + } + } + +#if MCUBOOT_SWAP_USING_SCRATCH + rc = flash_area_open(FLASH_AREA_IMAGE_SCRATCH, + &BOOT_SCRATCH_AREA(&boot_data)); + assert(rc == 0); + + if (rc != 0) { + goto finish; + } +#endif + + /* Determine the sector layout of the image slots and scratch area. */ + rc = boot_read_sectors_recovery(&boot_data); + + if (rc == 0) { + max_size = app_max_size(&boot_data); + + if (max_size > 0) { + image_max_sizes[image_index].calculated = true; + image_max_sizes[image_index].max_size = max_size; + } + } + } + +finish: + close_all_flash_areas(&boot_data); + memset(&boot_data, 0x00, sizeof(boot_data)); +} +#endif + +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) || defined(MCUBOOT_DATA_SHARING) +/** + * Fetches the maximum allowed size of the image + */ +const struct image_max_size *boot_get_max_app_size(void) +{ +#if defined(MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO) + uint8_t i = 0; + + while (i < BOOT_IMAGE_NUMBER) { + if (image_max_sizes[i].calculated == true) { + break; + } + + ++i; + } + + if (i == BOOT_IMAGE_NUMBER) { + /* Information not available, need to fetch it */ + boot_fetch_slot_state_sizes(); + } +#endif + + return image_max_sizes; +} +#endif diff --git a/bootloader/mcuboot/boot/bootutil/src/swap_misc.c b/bootloader/mcuboot/boot/bootutil/src/swap_misc.c new file mode 100644 index 0000000..733a397 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/swap_misc.c @@ -0,0 +1,234 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2019 JUUL Labs + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include "bootutil/bootutil.h" +#include "bootutil_priv.h" +#include "swap_priv.h" +#include "bootutil/bootutil_log.h" + +#include "mcuboot_config/mcuboot_config.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE) +int +swap_erase_trailer_sectors(const struct boot_loader_state *state, + const struct flash_area *fap) +{ + uint8_t slot; + uint32_t sector; + uint32_t trailer_sz; + uint32_t total_sz; + uint32_t off; + uint32_t sz; + int fa_id_primary; + int fa_id_secondary; + uint8_t image_index; + int rc; + + BOOT_LOG_DBG("erasing trailer; fa_id=%d", flash_area_get_id(fap)); + + image_index = BOOT_CURR_IMG(state); + fa_id_primary = flash_area_id_from_multi_image_slot(image_index, + BOOT_PRIMARY_SLOT); + fa_id_secondary = flash_area_id_from_multi_image_slot(image_index, + BOOT_SECONDARY_SLOT); + + if (flash_area_get_id(fap) == fa_id_primary) { + slot = BOOT_PRIMARY_SLOT; + } else if (flash_area_get_id(fap) == fa_id_secondary) { + slot = BOOT_SECONDARY_SLOT; + } else { + return BOOT_EFLASH; + } + + /* delete starting from last sector and moving to beginning */ + sector = boot_img_num_sectors(state, slot) - 1; + trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state)); + total_sz = 0; + do { + sz = boot_img_sector_size(state, slot, sector); + off = boot_img_sector_off(state, slot, sector); + rc = boot_erase_region(fap, off, sz); + assert(rc == 0); + + sector--; + total_sz += sz; + } while (total_sz < trailer_sz); + + return rc; +} + +int +swap_status_init(const struct boot_loader_state *state, + const struct flash_area *fap, + const struct boot_status *bs) +{ + struct boot_swap_state swap_state; + uint8_t image_index; + int rc; + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + image_index = BOOT_CURR_IMG(state); + + BOOT_LOG_DBG("initializing status; fa_id=%d", flash_area_get_id(fap)); + + rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index), + &swap_state); + assert(rc == 0); + + if (bs->swap_type != BOOT_SWAP_TYPE_NONE) { + rc = boot_write_swap_info(fap, bs->swap_type, image_index); + assert(rc == 0); + } + + if (swap_state.image_ok == BOOT_FLAG_SET) { + rc = boot_write_image_ok(fap); + assert(rc == 0); + } + + rc = boot_write_swap_size(fap, bs->swap_size); + assert(rc == 0); + +#ifdef MCUBOOT_ENC_IMAGES + rc = boot_write_enc_key(fap, 0, bs); + assert(rc == 0); + + rc = boot_write_enc_key(fap, 1, bs); + assert(rc == 0); +#endif + + rc = boot_write_magic(fap); + assert(rc == 0); + + return 0; +} + +int +swap_read_status(struct boot_loader_state *state, struct boot_status *bs) +{ + const struct flash_area *fap; + uint32_t off; + uint8_t swap_info; + int area_id; + int rc; + + bs->source = swap_status_source(state); + switch (bs->source) { + case BOOT_STATUS_SOURCE_NONE: + return 0; + +#if MCUBOOT_SWAP_USING_SCRATCH + case BOOT_STATUS_SOURCE_SCRATCH: + area_id = FLASH_AREA_IMAGE_SCRATCH; + break; +#endif + + case BOOT_STATUS_SOURCE_PRIMARY_SLOT: + area_id = FLASH_AREA_IMAGE_PRIMARY(BOOT_CURR_IMG(state)); + break; + + default: + assert(0); + return BOOT_EBADARGS; + } + + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + return BOOT_EFLASH; + } + + rc = swap_read_status_bytes(fap, state, bs); + if (rc == 0) { + off = boot_swap_info_off(fap); + rc = flash_area_read(fap, off, &swap_info, sizeof swap_info); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + if (bootutil_buffer_is_erased(fap, &swap_info, sizeof swap_info)) { + BOOT_SET_SWAP_INFO(swap_info, 0, BOOT_SWAP_TYPE_NONE); + rc = 0; + } + + /* Extract the swap type info */ + bs->swap_type = BOOT_GET_SWAP_TYPE(swap_info); + } + +done: + flash_area_close(fap); + + return rc; +} + +int +swap_set_copy_done(uint8_t image_index) +{ + const struct flash_area *fap; + int rc; + + rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index), + &fap); + if (rc != 0) { + return BOOT_EFLASH; + } + + rc = boot_write_copy_done(fap); + flash_area_close(fap); + return rc; +} + +int +swap_set_image_ok(uint8_t image_index) +{ + const struct flash_area *fap; + struct boot_swap_state state; + int rc; + + rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index), + &fap); + if (rc != 0) { + return BOOT_EFLASH; + } + + rc = boot_read_swap_state(fap, &state); + if (rc != 0) { + rc = BOOT_EFLASH; + goto out; + } + + if (state.image_ok == BOOT_FLAG_UNSET) { + rc = boot_write_image_ok(fap); + } + +out: + flash_area_close(fap); + return rc; +} + + +#endif /* defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE) */ diff --git a/bootloader/mcuboot/boot/bootutil/src/swap_move.c b/bootloader/mcuboot/boot/bootutil/src/swap_move.c new file mode 100644 index 0000000..20caa2b --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/swap_move.c @@ -0,0 +1,608 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2019 JUUL Labs + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include "bootutil/bootutil.h" +#include "bootutil_priv.h" +#include "swap_priv.h" +#include "bootutil/bootutil_log.h" + +#include "mcuboot_config/mcuboot_config.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +#ifdef MCUBOOT_SWAP_USING_MOVE + +#if defined(MCUBOOT_VALIDATE_PRIMARY_SLOT) +/* + * FIXME: this might have to be updated for threaded sim + */ +int boot_status_fails = 0; +#define BOOT_STATUS_ASSERT(x) \ + do { \ + if (!(x)) { \ + boot_status_fails++; \ + } \ + } while (0) +#else +#define BOOT_STATUS_ASSERT(x) ASSERT(x) +#endif + +uint32_t +find_last_idx(struct boot_loader_state *state, uint32_t swap_size) +{ + uint32_t sector_sz; + uint32_t sz; + uint32_t last_idx; + + sector_sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, 0); + sz = 0; + last_idx = 0; + while (1) { + sz += sector_sz; + last_idx++; + if (sz >= swap_size) { + break; + } + } + + return last_idx; +} + +int +boot_read_image_header(struct boot_loader_state *state, int slot, + struct image_header *out_hdr, struct boot_status *bs) +{ + const struct flash_area *fap; + uint32_t off; + uint32_t sz; + uint32_t last_idx; + uint32_t swap_size; + int area_id; + int rc; + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + off = 0; + if (bs && !boot_status_is_reset(bs)) { + boot_find_status(BOOT_CURR_IMG(state), &fap); + if (fap == NULL || boot_read_swap_size(fap, &swap_size)) { + rc = BOOT_EFLASH; + goto done; + } + flash_area_close(fap); + + last_idx = find_last_idx(state, swap_size); + sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, 0); + + /* + * Find the correct offset or slot where the image header is expected to + * be found for the steps where it is moved or swapped. + */ + if (bs->op == BOOT_STATUS_OP_MOVE && slot == 0 && bs->idx > last_idx) { + off = sz; + } else if (bs->op == BOOT_STATUS_OP_SWAP) { + if (bs->idx > 1 && bs->idx <= last_idx) { + slot = (slot == 0) ? 1 : 0; + } else if (bs->idx == 1) { + if (slot == 0) { + off = sz; + } else if (slot == 1 && bs->state == 2) { + slot = 0; + } + } + } + } + + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + rc = flash_area_read(fap, off, out_hdr, sizeof *out_hdr); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + /* We only know where the headers are located when bs is valid */ + if (bs != NULL && out_hdr->ih_magic != IMAGE_MAGIC) { + rc = -1; + goto done; + } + + rc = 0; + +done: + flash_area_close(fap); + return rc; +} + +int +swap_read_status_bytes(const struct flash_area *fap, + struct boot_loader_state *state, struct boot_status *bs) +{ + uint32_t off; + uint8_t status; + int max_entries; + int found_idx; + uint8_t write_sz; + int move_entries; + int rc; + int last_rc; + int erased_sections; + int i; + + max_entries = boot_status_entries(BOOT_CURR_IMG(state), fap); + if (max_entries < 0) { + return BOOT_EBADARGS; + } + + erased_sections = 0; + found_idx = -1; + /* skip erased sectors at the end */ + last_rc = 1; + write_sz = BOOT_WRITE_SZ(state); + off = boot_status_off(fap); + for (i = max_entries; i > 0; i--) { + rc = flash_area_read(fap, off + (i - 1) * write_sz, &status, 1); + if (rc < 0) { + return BOOT_EFLASH; + } + + if (bootutil_buffer_is_erased(fap, &status, 1)) { + if (rc != last_rc) { + erased_sections++; + } + } else { + if (found_idx == -1) { + found_idx = i; + } + } + last_rc = rc; + } + + if (erased_sections > 1) { + /* This means there was an error writing status on the last + * swap. Tell user and move on to validation! + */ +#if !defined(__BOOTSIM__) + BOOT_LOG_ERR("Detected inconsistent status!"); +#endif + +#if !defined(MCUBOOT_VALIDATE_PRIMARY_SLOT) + /* With validation of the primary slot disabled, there is no way + * to be sure the swapped primary slot is OK, so abort! + */ + assert(0); +#endif + } + + move_entries = BOOT_MAX_IMG_SECTORS * BOOT_STATUS_MOVE_STATE_COUNT; + if (found_idx == -1) { + /* no swap status found; nothing to do */ + } else if (found_idx < move_entries) { + bs->op = BOOT_STATUS_OP_MOVE; + bs->idx = (found_idx / BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_IDX_0; + bs->state = (found_idx % BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_STATE_0;; + } else { + bs->op = BOOT_STATUS_OP_SWAP; + bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0; + bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0; + } + + return 0; +} + +uint32_t +boot_status_internal_off(const struct boot_status *bs, int elem_sz) +{ + uint32_t off; + int idx_sz; + + idx_sz = elem_sz * ((bs->op == BOOT_STATUS_OP_MOVE) ? + BOOT_STATUS_MOVE_STATE_COUNT : BOOT_STATUS_SWAP_STATE_COUNT); + + off = ((bs->op == BOOT_STATUS_OP_MOVE) ? + 0 : (BOOT_MAX_IMG_SECTORS * BOOT_STATUS_MOVE_STATE_COUNT * elem_sz)) + + (bs->idx - BOOT_STATUS_IDX_0) * idx_sz + + (bs->state - BOOT_STATUS_STATE_0) * elem_sz; + + return off; +} + +static int app_max_sectors(struct boot_loader_state *state) +{ + uint32_t sz = 0; + uint32_t sector_sz; + uint32_t trailer_sz; + uint32_t first_trailer_idx; + + sector_sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, 0); + trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state)); + first_trailer_idx = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT) - 1; + + while (1) { + sz += sector_sz; + if (sz >= trailer_sz) { + break; + } + first_trailer_idx--; + } + + return first_trailer_idx; +} + +int +boot_slots_compatible(struct boot_loader_state *state) +{ +#ifdef PM_S1_ADDRESS + /* Patch needed for NCS. In this case, image 1 primary points to the other + * B1 slot (ie S0 or S1), and image 0 primary points to the app. + * With this configuration, image 0 and image 1 share the secondary slot. + * Hence, the primary slot of image 1 will be *smaller* than image 1's + * secondary slot. This is not allowed in upstream mcuboot, so we need + * this patch to allow it. Also, all of these checks are redundant when + * partition manager is in use, and since we have the same sector size + * in all of our flash. + */ + return 1; +#else + size_t num_sectors_pri; + size_t num_sectors_sec; + size_t sector_sz_pri = 0; + size_t sector_sz_sec = 0; + size_t i; + size_t num_usable_sectors_pri; + + num_sectors_pri = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT); + num_sectors_sec = boot_img_num_sectors(state, BOOT_SECONDARY_SLOT); + num_usable_sectors_pri = app_max_sectors(state); + + if ((num_sectors_pri != num_sectors_sec) && + (num_sectors_pri != (num_sectors_sec + 1)) && + (num_usable_sectors_pri != (num_sectors_sec + 1))) { + BOOT_LOG_WRN("Cannot upgrade: not a compatible amount of sectors"); + BOOT_LOG_DBG("slot0 sectors: %d, slot1 sectors: %d, usable slot0 sectors: %d", + (int)num_sectors_pri, (int)num_sectors_sec, + (int)(num_usable_sectors_pri - 1)); + return 0; + } else if (num_sectors_pri > BOOT_MAX_IMG_SECTORS) { + BOOT_LOG_WRN("Cannot upgrade: more sectors than allowed"); + return 0; + } + + if (num_usable_sectors_pri != (num_sectors_sec + 1)) { + BOOT_LOG_DBG("Non-optimal sector distribution, slot0 has %d usable sectors (%d assigned) " + "but slot1 has %d assigned", (int)(num_usable_sectors_pri - 1), + (int)num_sectors_pri, (int)num_sectors_sec); + } + + for (i = 0; i < num_sectors_sec; i++) { + sector_sz_pri = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i); + sector_sz_sec = boot_img_sector_size(state, BOOT_SECONDARY_SLOT, i); + if (sector_sz_pri != sector_sz_sec) { + BOOT_LOG_WRN("Cannot upgrade: not same sector layout"); + return 0; + } + } + + if (num_sectors_pri > num_sectors_sec) { + if (sector_sz_pri != boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i)) { + BOOT_LOG_WRN("Cannot upgrade: not same sector layout"); + return 0; + } + } + + return 1; +#endif /* PM_S1_ADDRESS */ +} + +#define BOOT_LOG_SWAP_STATE(area, state) \ + BOOT_LOG_INF("%s: magic=%s, swap_type=0x%x, copy_done=0x%x, " \ + "image_ok=0x%x", \ + (area), \ + ((state)->magic == BOOT_MAGIC_GOOD ? "good" : \ + (state)->magic == BOOT_MAGIC_UNSET ? "unset" : \ + "bad"), \ + (state)->swap_type, \ + (state)->copy_done, \ + (state)->image_ok) + +int +swap_status_source(struct boot_loader_state *state) +{ + struct boot_swap_state state_primary_slot; + struct boot_swap_state state_secondary_slot; + int rc; + uint8_t source; + uint8_t image_index; + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + image_index = BOOT_CURR_IMG(state); + + rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_PRIMARY(image_index), + &state_primary_slot); + assert(rc == 0); + + BOOT_LOG_SWAP_STATE("Primary image", &state_primary_slot); + + rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index), + &state_secondary_slot); + assert(rc == 0); + + BOOT_LOG_SWAP_STATE("Secondary image", &state_secondary_slot); + + if (state_primary_slot.magic == BOOT_MAGIC_GOOD && + state_primary_slot.copy_done == BOOT_FLAG_UNSET && + state_secondary_slot.magic != BOOT_MAGIC_GOOD) { + + source = BOOT_STATUS_SOURCE_PRIMARY_SLOT; + + BOOT_LOG_INF("Boot source: primary slot"); + return source; + } + + BOOT_LOG_INF("Boot source: none"); + return BOOT_STATUS_SOURCE_NONE; +} + +/* + * "Moves" the sector located at idx - 1 to idx. + */ +static void +boot_move_sector_up(int idx, uint32_t sz, struct boot_loader_state *state, + struct boot_status *bs, const struct flash_area *fap_pri, + const struct flash_area *fap_sec) +{ + uint32_t new_off; + uint32_t old_off; + int rc; + + /* + * FIXME: assuming sectors of size == sz, a single off variable + * would be enough + */ + + /* Calculate offset from start of image area. */ + new_off = boot_img_sector_off(state, BOOT_PRIMARY_SLOT, idx); + old_off = boot_img_sector_off(state, BOOT_PRIMARY_SLOT, idx - 1); + + if (bs->idx == BOOT_STATUS_IDX_0) { + if (bs->source != BOOT_STATUS_SOURCE_PRIMARY_SLOT) { + rc = swap_erase_trailer_sectors(state, fap_pri); + assert(rc == 0); + + rc = swap_status_init(state, fap_pri, bs); + assert(rc == 0); + } + + rc = swap_erase_trailer_sectors(state, fap_sec); + assert(rc == 0); + } + + rc = boot_erase_region(fap_pri, new_off, sz); + assert(rc == 0); + + rc = boot_copy_region(state, fap_pri, fap_pri, old_off, new_off, sz); + assert(rc == 0); + + rc = boot_write_status(state, bs); + + bs->idx++; + BOOT_STATUS_ASSERT(rc == 0); +} + +static void +boot_swap_sectors(int idx, uint32_t sz, struct boot_loader_state *state, + struct boot_status *bs, const struct flash_area *fap_pri, + const struct flash_area *fap_sec) +{ + uint32_t pri_off; + uint32_t pri_up_off; + uint32_t sec_off; + int rc; + + pri_up_off = boot_img_sector_off(state, BOOT_PRIMARY_SLOT, idx); + pri_off = boot_img_sector_off(state, BOOT_PRIMARY_SLOT, idx - 1); + sec_off = boot_img_sector_off(state, BOOT_SECONDARY_SLOT, idx - 1); + + if (bs->state == BOOT_STATUS_STATE_0) { + rc = boot_erase_region(fap_pri, pri_off, sz); + assert(rc == 0); + + rc = boot_copy_region(state, fap_sec, fap_pri, sec_off, pri_off, sz); + assert(rc == 0); + + rc = boot_write_status(state, bs); + bs->state = BOOT_STATUS_STATE_1; + BOOT_STATUS_ASSERT(rc == 0); + } + + if (bs->state == BOOT_STATUS_STATE_1) { + rc = boot_erase_region(fap_sec, sec_off, sz); + assert(rc == 0); + + rc = boot_copy_region(state, fap_pri, fap_sec, pri_up_off, sec_off, sz); + assert(rc == 0); + + rc = boot_write_status(state, bs); + bs->idx++; + bs->state = BOOT_STATUS_STATE_0; + BOOT_STATUS_ASSERT(rc == 0); + } +} + +/* + * When starting a revert the swap status exists in the primary slot, and + * the status in the secondary slot is erased. To start the swap, the status + * area in the primary slot must be re-initialized; if during the small + * window of time between re-initializing it and writing the first metadata + * a reset happens, the swap process is broken and cannot be resumed. + * + * This function handles the issue by making the revert look like a permanent + * upgrade (by initializing the secondary slot). + */ +void +fixup_revert(const struct boot_loader_state *state, struct boot_status *bs, + const struct flash_area *fap_sec) +{ + struct boot_swap_state swap_state; + int rc; + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + /* No fixup required */ + if (bs->swap_type != BOOT_SWAP_TYPE_REVERT || + bs->op != BOOT_STATUS_OP_MOVE || + bs->idx != BOOT_STATUS_IDX_0) { + return; + } + + rc = boot_read_swap_state(fap_sec, &swap_state); + assert(rc == 0); + + BOOT_LOG_SWAP_STATE("Secondary image", &swap_state); + + if (swap_state.magic == BOOT_MAGIC_UNSET) { + rc = swap_erase_trailer_sectors(state, fap_sec); + assert(rc == 0); + + rc = boot_write_image_ok(fap_sec); + assert(rc == 0); + + rc = boot_write_swap_size(fap_sec, bs->swap_size); + assert(rc == 0); + + rc = boot_write_magic(fap_sec); + assert(rc == 0); + } +} + +void +swap_run(struct boot_loader_state *state, struct boot_status *bs, + uint32_t copy_size) +{ + uint32_t sz; + uint32_t sector_sz; + uint32_t idx; + uint32_t trailer_sz; + uint32_t first_trailer_idx; + uint32_t last_idx; + uint8_t image_index; + const struct flash_area *fap_pri; + const struct flash_area *fap_sec; + int rc; + + BOOT_LOG_INF("Starting swap using move algorithm."); + + last_idx = find_last_idx(state, copy_size); + sector_sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, 0); + + /* + * When starting a new swap upgrade, check that there is enough space. + */ + if (boot_status_is_reset(bs)) { + sz = 0; + trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state)); + first_trailer_idx = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT) - 1; + + while (1) { + sz += sector_sz; + if (sz >= trailer_sz) { + break; + } + first_trailer_idx--; + } + + if (last_idx >= first_trailer_idx) { + BOOT_LOG_WRN("Not enough free space to run swap upgrade"); + BOOT_LOG_WRN("required %d bytes but only %d are available", + (last_idx + 1) * sector_sz, + first_trailer_idx * sector_sz); + bs->swap_type = BOOT_SWAP_TYPE_NONE; + return; + } + } + + image_index = BOOT_CURR_IMG(state); + + rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index), &fap_pri); + assert (rc == 0); + + rc = flash_area_open(FLASH_AREA_IMAGE_SECONDARY(image_index), &fap_sec); + assert (rc == 0); + + fixup_revert(state, bs, fap_sec); + + if (bs->op == BOOT_STATUS_OP_MOVE) { + idx = last_idx; + while (idx > 0) { + if (idx <= (last_idx - bs->idx + 1)) { + boot_move_sector_up(idx, sector_sz, state, bs, fap_pri, fap_sec); + } + idx--; + } + bs->idx = BOOT_STATUS_IDX_0; + } + + bs->op = BOOT_STATUS_OP_SWAP; + + idx = 1; + while (idx <= last_idx) { + if (idx >= bs->idx) { + boot_swap_sectors(idx, sector_sz, state, bs, fap_pri, fap_sec); + } + idx++; + } + + flash_area_close(fap_pri); + flash_area_close(fap_sec); +} + +int app_max_size(struct boot_loader_state *state) +{ + uint32_t sector_sz_primary; + uint32_t sector_sz_secondary; + uint32_t sz_primary; + uint32_t sz_secondary; + + sector_sz_primary = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, 0); + sector_sz_secondary = boot_img_sector_size(state, BOOT_SECONDARY_SLOT, 0); + + /* Account for image flags and move sector */ + sz_primary = app_max_sectors(state) * sector_sz_primary - sector_sz_primary; + sz_secondary = boot_img_num_sectors(state, BOOT_SECONDARY_SLOT) * sector_sz_secondary; + + return (sz_primary <= sz_secondary ? sz_primary : sz_secondary); +} + +#endif diff --git a/bootloader/mcuboot/boot/bootutil/src/swap_nsib.c b/bootloader/mcuboot/boot/bootutil/src/swap_nsib.c new file mode 100644 index 0000000..39ed4c6 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/swap_nsib.c @@ -0,0 +1,70 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include "bootutil/bootutil.h" +#include "bootutil_priv.h" +#include "swap_priv.h" +#include "bootutil/bootutil_log.h" + +#include "mcuboot_config/mcuboot_config.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +void nsib_swap_run(struct boot_loader_state *state, struct boot_status *bs) +{ + uint32_t sector_sz; + uint8_t image_index; + const struct flash_area *fap_pri; + const struct flash_area *fap_sec; + int rc; + + BOOT_LOG_INF("Starting swap using nsib algorithm."); + + sector_sz = boot_img_sector_size(state, BOOT_SECONDARY_SLOT, 0); + +#if (CONFIG_NCS_IS_VARIANT_IMAGE) + rc = flash_area_open(PM_S0_ID, &fap_pri); +#else + rc = flash_area_open(PM_S1_ID, &fap_pri); +#endif + assert (rc == 0); + image_index = BOOT_CURR_IMG(state); + + rc = flash_area_open(FLASH_AREA_IMAGE_SECONDARY(image_index), &fap_sec); + assert (rc == 0); + + rc = boot_erase_region(fap_pri, 0, fap_pri->fa_size); + assert(rc == 0); + + rc = boot_copy_region(state, fap_sec, fap_pri, 0, 0, fap_pri->fa_size); + assert(rc == 0); + + rc = swap_erase_trailer_sectors(state, fap_sec); + assert(rc == 0); + + rc = boot_erase_region(fap_sec, 0, MIN((fap_pri->fa_size + sector_sz), fap_sec->fa_size)); + assert(rc == 0); + + flash_area_close(fap_pri); + flash_area_close(fap_sec); +} diff --git a/bootloader/mcuboot/boot/bootutil/src/swap_priv.h b/bootloader/mcuboot/boot/bootutil/src/swap_priv.h new file mode 100644 index 0000000..2734d62 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/swap_priv.h @@ -0,0 +1,117 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2019 JUUL Labs + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef H_SWAP_PRIV_ +#define H_SWAP_PRIV_ + +#include "mcuboot_config/mcuboot_config.h" + +#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE) + +/** + * Calculates the amount of space required to store the trailer, and erases + * all sectors required for this storage in the given flash_area. + */ +int swap_erase_trailer_sectors(const struct boot_loader_state *state, + const struct flash_area *fap); + +/** + * Initialize the given flash_area with the metadata required to start a new + * swap upgrade. + */ +int swap_status_init(const struct boot_loader_state *state, + const struct flash_area *fap, + const struct boot_status *bs); + +/** + * Tries to locate an interrupted swap status (metadata). If not metadata + * was found returns BOOT_STATUS_SOURCE_NONE. + * + * Must return one of: + * - BOOT_STATUS_SOURCE_NONE + * - BOOT_STATUS_SOURCE_SCRATCH + * - BOOT_STATUS_SOURCE_PRIMARY_SLOT + */ +int swap_status_source(struct boot_loader_state *state); + +/** + * Reads the boot status from the flash. The boot status contains + * the current state of an interrupted image copy operation. If the boot + * status is not present, or it indicates that previous copy finished, + * there is no operation in progress. + */ +int swap_read_status(struct boot_loader_state *state, struct boot_status *bs); + +/** + * Iterate over the swap status bytes in the given flash_area and populate + * the given boot_status with the calculated index where a swap upgrade was + * interrupted. + */ +int swap_read_status_bytes(const struct flash_area *fap, + struct boot_loader_state *state, + struct boot_status *bs); + +/** + * Marks the image in the primary slot as fully copied. + */ +int swap_set_copy_done(uint8_t image_index); + +/** + * Marks a reverted image in the primary slot as confirmed. This is necessary to + * ensure the status bytes from the image revert operation don't get processed + * on a subsequent boot. + * + * NOTE: image_ok is tested before writing because if there's a valid permanent + * image installed on the primary slot and the new image to be upgrade to has a + * bad sig, image_ok would be overwritten. + */ +int swap_set_image_ok(uint8_t image_index); + +/** + * Start a new or resume an interrupted swap according to the parameters + * found in the given boot_status. + */ +void swap_run(struct boot_loader_state *state, + struct boot_status *bs, + uint32_t copy_size); + +#if MCUBOOT_SWAP_USING_SCRATCH +#define BOOT_SCRATCH_AREA(state) ((state)->scratch.area) + +static inline size_t boot_scratch_area_size(const struct boot_loader_state *state) +{ + return flash_area_get_size(BOOT_SCRATCH_AREA(state)); +} +#endif + +#endif /* defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE) */ + +/** + * Returns the maximum size of an application that can be loaded to a slot. + */ +int app_max_size(struct boot_loader_state *state); + +#if defined(PM_S1_ADDRESS) && !defined(MCUBOOT_OVERWRITE_ONLY) && \ +(CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 || defined(LEGACY_CHILD_PARENT_S0_S1_UPDATE_ENABLED)) +/** + * Performs an NSIB update + */ +void nsib_swap_run(struct boot_loader_state *state, struct boot_status *bs); +#endif + +#endif /* H_SWAP_PRIV_ */ diff --git a/bootloader/mcuboot/boot/bootutil/src/swap_scratch.c b/bootloader/mcuboot/boot/bootutil/src/swap_scratch.c new file mode 100644 index 0000000..66dca83 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/swap_scratch.c @@ -0,0 +1,992 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2019 JUUL Labs + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include "bootutil/bootutil.h" +#include "bootutil_priv.h" +#include "swap_priv.h" +#include "bootutil/bootutil_log.h" + +#include "mcuboot_config/mcuboot_config.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +#if !defined(MCUBOOT_SWAP_USING_MOVE) + +#if defined(MCUBOOT_VALIDATE_PRIMARY_SLOT) +/* + * FIXME: this might have to be updated for threaded sim + */ +int boot_status_fails = 0; +#define BOOT_STATUS_ASSERT(x) \ + do { \ + if (!(x)) { \ + boot_status_fails++; \ + } \ + } while (0) +#else +#define BOOT_STATUS_ASSERT(x) ASSERT(x) +#endif + +#if !defined(MCUBOOT_DIRECT_XIP) && !defined(MCUBOOT_RAM_LOAD) +/** + * Reads the status of a partially-completed swap, if any. This is necessary + * to recover in case the boot lodaer was reset in the middle of a swap + * operation. + */ +int +swap_read_status_bytes(const struct flash_area *fap, + struct boot_loader_state *state, struct boot_status *bs) +{ + uint32_t off; + uint8_t status; + int max_entries; + int found; + int found_idx; + int invalid; + int rc; + int i; + + off = boot_status_off(fap); + max_entries = boot_status_entries(BOOT_CURR_IMG(state), fap); + if (max_entries < 0) { + return BOOT_EBADARGS; + } + + found = 0; + found_idx = 0; + invalid = 0; + for (i = 0; i < max_entries; i++) { + rc = flash_area_read(fap, off + i * BOOT_WRITE_SZ(state), + &status, 1); + if (rc < 0) { + return BOOT_EFLASH; + } + + if (bootutil_buffer_is_erased(fap, &status, 1)) { + if (found && !found_idx) { + found_idx = i; + } + } else if (!found) { + found = 1; + } else if (found_idx) { + invalid = 1; + break; + } + } + + if (invalid) { + /* This means there was an error writing status on the last + * swap. Tell user and move on to validation! + */ +#if !defined(__BOOTSIM__) + BOOT_LOG_ERR("Detected inconsistent status!"); +#endif + +#if !defined(MCUBOOT_VALIDATE_PRIMARY_SLOT) + /* With validation of the primary slot disabled, there is no way + * to be sure the swapped primary slot is OK, so abort! + */ + assert(0); +#endif + } + + if (found) { + if (!found_idx) { + found_idx = i; + } + bs->idx = (found_idx / BOOT_STATUS_STATE_COUNT) + 1; + bs->state = (found_idx % BOOT_STATUS_STATE_COUNT) + 1; + } + + return 0; +} + +uint32_t +boot_status_internal_off(const struct boot_status *bs, int elem_sz) +{ + int idx_sz; + + idx_sz = elem_sz * BOOT_STATUS_STATE_COUNT; + + return (bs->idx - BOOT_STATUS_IDX_0) * idx_sz + + (bs->state - BOOT_STATUS_STATE_0) * elem_sz; +} + +/* + * Slots are compatible when all sectors that store up to to size of the image + * round up to sector size, in both slot's are able to fit in the scratch + * area, and have sizes that are a multiple of each other (powers of two + * presumably!). + */ +int +boot_slots_compatible(struct boot_loader_state *state) +{ +#ifdef PM_S1_ADDRESS + /* Patch needed for NCS. In this case, image 1 primary points to the other + * B1 slot (ie S0 or S1), and image 0 primary points to the app. + * With this configuration, image 0 and image 1 share the secondary slot. + * Hence, the primary slot of image 1 will be *smaller* than image 1's + * secondary slot. This is not allowed in upstream mcuboot, so we need + * this patch to allow it. Also, all of these checks are redundant when + * partition manager is in use, and since we have the same sector size + * in all of our flash. + */ + return 1; +#else + size_t num_sectors_primary; + size_t num_sectors_secondary; + size_t sz0, sz1; + size_t primary_slot_sz, secondary_slot_sz; +#ifndef MCUBOOT_OVERWRITE_ONLY + size_t scratch_sz; +#endif + size_t i, j; + int8_t smaller; + + num_sectors_primary = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT); + num_sectors_secondary = boot_img_num_sectors(state, BOOT_SECONDARY_SLOT); + if ((num_sectors_primary > BOOT_MAX_IMG_SECTORS) || + (num_sectors_secondary > BOOT_MAX_IMG_SECTORS)) { + BOOT_LOG_WRN("Cannot upgrade: more sectors than allowed"); + return 0; + } + +#ifndef MCUBOOT_OVERWRITE_ONLY + scratch_sz = boot_scratch_area_size(state); +#endif + + /* + * The following loop scans all sectors in a linear fashion, assuring that + * for each possible sector in each slot, it is able to fit in the other + * slot's sector or sectors. Slot's should be compatible as long as any + * number of a slot's sectors are able to fit into another, which only + * excludes cases where sector sizes are not a multiple of each other. + */ + i = sz0 = primary_slot_sz = 0; + j = sz1 = secondary_slot_sz = 0; + smaller = 0; + while (i < num_sectors_primary || j < num_sectors_secondary) { + if (sz0 == sz1) { + sz0 += boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i); + sz1 += boot_img_sector_size(state, BOOT_SECONDARY_SLOT, j); + i++; + j++; + } else if (sz0 < sz1) { + sz0 += boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i); + /* Guarantee that multiple sectors of the secondary slot + * fit into the primary slot. + */ + if (smaller == 2) { + BOOT_LOG_WRN("Cannot upgrade: slots have non-compatible sectors"); + return 0; + } + smaller = 1; + i++; + } else { + size_t sector_size = boot_img_sector_size(state, BOOT_SECONDARY_SLOT, j); + +#ifdef MCUBOOT_DECOMPRESS_IMAGES + if (sector_size == 0) { + /* Since this supports decompressed images, we can safely exit if slot1 is + * smaller than slot0. + */ + break; + } +#endif + sz1 += sector_size; + /* Guarantee that multiple sectors of the primary slot + * fit into the secondary slot. + */ + if (smaller == 1) { + BOOT_LOG_WRN("Cannot upgrade: slots have non-compatible sectors"); + return 0; + } + smaller = 2; + j++; + } +#ifndef MCUBOOT_OVERWRITE_ONLY + if (sz0 == sz1) { + primary_slot_sz += sz0; + secondary_slot_sz += sz1; + /* Scratch has to fit each swap operation to the size of the larger + * sector among the primary slot and the secondary slot. + */ + if (sz0 > scratch_sz || sz1 > scratch_sz) { + BOOT_LOG_WRN("Cannot upgrade: not all sectors fit inside scratch"); + return 0; + } + smaller = sz0 = sz1 = 0; + } +#endif + } + +#ifndef MCUBOOT_DECOMPRESS_IMAGES + if ((i != num_sectors_primary) || + (j != num_sectors_secondary) || + (primary_slot_sz != secondary_slot_sz)) { + BOOT_LOG_WRN("Cannot upgrade: slots are not compatible"); + return 0; + } +#endif + + return 1; +#endif /* PM_S1_ADDRESS */ +} + +#define BOOT_LOG_SWAP_STATE(area, state) \ + BOOT_LOG_INF("%s: magic=%s, swap_type=0x%x, copy_done=0x%x, " \ + "image_ok=0x%x", \ + (area), \ + ((state)->magic == BOOT_MAGIC_GOOD ? "good" : \ + (state)->magic == BOOT_MAGIC_UNSET ? "unset" : \ + "bad"), \ + (state)->swap_type, \ + (state)->copy_done, \ + (state)->image_ok) + +struct boot_status_table { + uint8_t bst_magic_primary_slot; + uint8_t bst_magic_scratch; + uint8_t bst_copy_done_primary_slot; + uint8_t bst_status_source; +}; + +/** + * This set of tables maps swap state contents to boot status location. + * When searching for a match, these tables must be iterated in order. + */ +static const struct boot_status_table boot_status_tables[] = { + { + /* | primary slot | scratch | + * ----------+--------------+--------------| + * magic | Good | Any | + * copy-done | Set | N/A | + * ----------+--------------+--------------' + * source: none | + * ----------------------------------------' + */ + .bst_magic_primary_slot = BOOT_MAGIC_GOOD, + .bst_magic_scratch = BOOT_MAGIC_NOTGOOD, + .bst_copy_done_primary_slot = BOOT_FLAG_SET, + .bst_status_source = BOOT_STATUS_SOURCE_NONE, + }, + + { + /* | primary slot | scratch | + * ----------+--------------+--------------| + * magic | Good | Any | + * copy-done | Unset | N/A | + * ----------+--------------+--------------' + * source: primary slot | + * ----------------------------------------' + */ + .bst_magic_primary_slot = BOOT_MAGIC_GOOD, + .bst_magic_scratch = BOOT_MAGIC_NOTGOOD, + .bst_copy_done_primary_slot = BOOT_FLAG_UNSET, + .bst_status_source = BOOT_STATUS_SOURCE_PRIMARY_SLOT, + }, + + { + /* | primary slot | scratch | + * ----------+--------------+--------------| + * magic | Any | Good | + * copy-done | Any | N/A | + * ----------+--------------+--------------' + * source: scratch | + * ----------------------------------------' + */ + .bst_magic_primary_slot = BOOT_MAGIC_ANY, + .bst_magic_scratch = BOOT_MAGIC_GOOD, + .bst_copy_done_primary_slot = BOOT_FLAG_ANY, + .bst_status_source = BOOT_STATUS_SOURCE_SCRATCH, + }, + { + /* | primary slot | scratch | + * ----------+--------------+--------------| + * magic | Unset | Any | + * copy-done | Unset | N/A | + * ----------+--------------+--------------| + * source: varies | + * ----------------------------------------+--------------------------+ + * This represents one of two cases: | + * o No swaps ever (no status to read, so no harm in checking). | + * o Mid-revert; status in primary slot. | + * -------------------------------------------------------------------' + */ + .bst_magic_primary_slot = BOOT_MAGIC_UNSET, + .bst_magic_scratch = BOOT_MAGIC_ANY, + .bst_copy_done_primary_slot = BOOT_FLAG_UNSET, + .bst_status_source = BOOT_STATUS_SOURCE_PRIMARY_SLOT, + }, +}; + +#define BOOT_STATUS_TABLES_COUNT \ + (sizeof boot_status_tables / sizeof boot_status_tables[0]) + +/** + * Determines where in flash the most recent boot status is stored. The boot + * status is necessary for completing a swap that was interrupted by a boot + * loader reset. + * + * @return A BOOT_STATUS_SOURCE_[...] code indicating where status should + * be read from. + */ +int +swap_status_source(struct boot_loader_state *state) +{ + const struct boot_status_table *table; +#if MCUBOOT_SWAP_USING_SCRATCH + struct boot_swap_state state_scratch; +#endif + struct boot_swap_state state_primary_slot; + int rc; + size_t i; + uint8_t source; + uint8_t image_index; + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + image_index = BOOT_CURR_IMG(state); + rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_PRIMARY(image_index), + &state_primary_slot); + assert(rc == 0); + +#if MCUBOOT_SWAP_USING_SCRATCH + rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SCRATCH, &state_scratch); + assert(rc == 0); +#endif + + BOOT_LOG_SWAP_STATE("Primary image", &state_primary_slot); +#if MCUBOOT_SWAP_USING_SCRATCH + BOOT_LOG_SWAP_STATE("Scratch", &state_scratch); +#endif + for (i = 0; i < BOOT_STATUS_TABLES_COUNT; i++) { + table = &boot_status_tables[i]; + + if (boot_magic_compatible_check(table->bst_magic_primary_slot, + state_primary_slot.magic) && +#if MCUBOOT_SWAP_USING_SCRATCH + boot_magic_compatible_check(table->bst_magic_scratch, + state_scratch.magic) && +#endif + (table->bst_copy_done_primary_slot == BOOT_FLAG_ANY || + table->bst_copy_done_primary_slot == state_primary_slot.copy_done)) + { + source = table->bst_status_source; + +#if (BOOT_IMAGE_NUMBER > 1) && MCUBOOT_SWAP_USING_SCRATCH + /* In case of multi-image boot it can happen that if boot status + * info is found on scratch area then it does not belong to the + * currently examined image. + */ + if (source == BOOT_STATUS_SOURCE_SCRATCH && + state_scratch.image_num != BOOT_CURR_IMG(state)) { + source = BOOT_STATUS_SOURCE_NONE; + } +#endif + + BOOT_LOG_INF("Boot source: %s", + source == BOOT_STATUS_SOURCE_NONE ? "none" : + source == BOOT_STATUS_SOURCE_SCRATCH ? "scratch" : + source == BOOT_STATUS_SOURCE_PRIMARY_SLOT ? + "primary slot" : "BUG; can't happen"); + return source; + } + } + + BOOT_LOG_INF("Boot source: none"); + return BOOT_STATUS_SOURCE_NONE; +} + +#ifndef MCUBOOT_OVERWRITE_ONLY +/** + * Calculates the number of sectors the scratch area can contain. A "last" + * source sector is specified because images are copied backwards in flash + * (final index to index number 0). + * + * @param last_sector_idx The index of the last source sector + * (inclusive). + * @param out_first_sector_idx The index of the first source sector + * (inclusive) gets written here. + * + * @return The number of bytes comprised by the + * [first-sector, last-sector] range. + */ +static uint32_t +boot_copy_sz(const struct boot_loader_state *state, int last_sector_idx, + int *out_first_sector_idx) +{ + size_t scratch_sz; + uint32_t new_sz; + uint32_t sz; + int i; + + sz = 0; + + scratch_sz = boot_scratch_area_size(state); + for (i = last_sector_idx; i >= 0; i--) { + new_sz = sz + boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i); + /* + * The secondary slot is not being checked here, because + * `boot_slots_compatible` already provides assurance that the copy size + * will be compatible with the primary slot and scratch. + */ + if (new_sz > scratch_sz) { + break; + } + sz = new_sz; + } + + /* i currently refers to a sector that doesn't fit or it is -1 because all + * sectors have been processed. In both cases, exclude sector i. + */ + *out_first_sector_idx = i + 1; + return sz; +} + +/** + * Finds the index of the last sector in the primary slot that needs swapping. + * + * @param state Current bootloader's state. + * @param copy_size Total number of bytes to swap. + * + * @return Index of the last sector in the primary slot that needs swapping. + */ +static int +find_last_sector_idx(const struct boot_loader_state *state, uint32_t copy_size) +{ + int last_sector_idx; + uint32_t primary_slot_size; + uint32_t secondary_slot_size; + + primary_slot_size = 0; + secondary_slot_size = 0; + last_sector_idx = 0; + + /* + * Knowing the size of the largest image between both slots, here we + * find what is the last sector in the primary slot that needs swapping. + * Since we already know that both slots are compatible, the secondary + * slot's last sector is not really required after this check is finished. + */ + while (1) { + if ((primary_slot_size < copy_size) || + (primary_slot_size < secondary_slot_size)) { + primary_slot_size += boot_img_sector_size(state, + BOOT_PRIMARY_SLOT, + last_sector_idx); + } + if ((secondary_slot_size < copy_size) || + (secondary_slot_size < primary_slot_size)) { + secondary_slot_size += boot_img_sector_size(state, + BOOT_SECONDARY_SLOT, + last_sector_idx); + } + if (primary_slot_size >= copy_size && + secondary_slot_size >= copy_size && + primary_slot_size == secondary_slot_size) { + break; + } + last_sector_idx++; + } + + return last_sector_idx; +} + +/** + * Finds the number of swap operations that have to be performed to swap the two images. + * + * @param state Current bootloader's state. + * @param copy_size Total number of bytes to swap. + * + * @return The number of swap operations that have to be performed. +*/ +static uint32_t +find_swap_count(const struct boot_loader_state *state, uint32_t copy_size) +{ + int first_sector_idx; + int last_sector_idx; + uint32_t swap_count; + + last_sector_idx = find_last_sector_idx(state, copy_size); + + swap_count = 0; + + while (last_sector_idx >= 0) { + boot_copy_sz(state, last_sector_idx, &first_sector_idx); + + last_sector_idx = first_sector_idx - 1; + swap_count++; + } + + return swap_count; +} + +/** + * Swaps the contents of two flash regions within the two image slots. + * + * @param idx The index of the first sector in the range of + * sectors being swapped. + * @param sz The number of bytes to swap. + * @param bs The current boot status. This struct gets + * updated according to the outcome. + * + * @return 0 on success; nonzero on failure. + */ +static void +boot_swap_sectors(int idx, uint32_t sz, struct boot_loader_state *state, + struct boot_status *bs) +{ + const struct flash_area *fap_primary_slot; + const struct flash_area *fap_secondary_slot; + const struct flash_area *fap_scratch; + uint32_t copy_sz; + uint32_t trailer_sz; + uint32_t sector_sz; + uint32_t img_off; + uint32_t scratch_trailer_off; + struct boot_swap_state swap_state; + size_t last_sector; + bool erase_scratch; + uint8_t image_index; + int rc; + + /* Calculate offset from start of image area. */ + img_off = boot_img_sector_off(state, BOOT_PRIMARY_SLOT, idx); + + copy_sz = sz; + trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state)); + + /* sz in this function is always sized on a multiple of the sector size. + * The check against the start offset of the last sector + * is to determine if we're swapping the last sector. The last sector + * needs special handling because it's where the trailer lives. If we're + * copying it, we need to use scratch to write the trailer temporarily. + * + * NOTE: `use_scratch` is a temporary flag (never written to flash) which + * controls if special handling is needed (swapping last sector). + */ + last_sector = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT) - 1; + sector_sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, last_sector); + + if (sector_sz < trailer_sz) { + uint32_t trailer_sector_sz = sector_sz; + + while (trailer_sector_sz < trailer_sz) { + /* Consider that the image trailer may span across sectors of + * different sizes. + */ + sector_sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, --last_sector); + + trailer_sector_sz += sector_sz; + } + } + + if ((img_off + sz) > + boot_img_sector_off(state, BOOT_PRIMARY_SLOT, last_sector)) { + copy_sz -= trailer_sz; + } + + bs->use_scratch = (bs->idx == BOOT_STATUS_IDX_0 && copy_sz != sz); + + image_index = BOOT_CURR_IMG(state); + + rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index), + &fap_primary_slot); + assert (rc == 0); + + rc = flash_area_open(FLASH_AREA_IMAGE_SECONDARY(image_index), + &fap_secondary_slot); + assert (rc == 0); + + rc = flash_area_open(FLASH_AREA_IMAGE_SCRATCH, &fap_scratch); + assert (rc == 0); + + if (bs->state == BOOT_STATUS_STATE_0) { + BOOT_LOG_DBG("erasing scratch area"); + rc = boot_erase_region(fap_scratch, 0, flash_area_get_size(fap_scratch)); + assert(rc == 0); + + if (bs->idx == BOOT_STATUS_IDX_0) { + /* Write a trailer to the scratch area, even if we don't need the + * scratch area for status. We need a temporary place to store the + * `swap-type` while we erase the primary trailer. + */ + rc = swap_status_init(state, fap_scratch, bs); + assert(rc == 0); + + if (!bs->use_scratch) { + /* Prepare the primary status area... here it is known that the + * last sector is not being used by the image data so it's safe + * to erase. + */ + rc = swap_erase_trailer_sectors(state, fap_primary_slot); + assert(rc == 0); + + rc = swap_status_init(state, fap_primary_slot, bs); + assert(rc == 0); + + /* Erase the temporary trailer from the scratch area. */ + rc = boot_erase_region(fap_scratch, 0, + flash_area_get_size(fap_scratch)); + assert(rc == 0); + } + } + + rc = boot_copy_region(state, fap_secondary_slot, fap_scratch, + img_off, 0, copy_sz); + assert(rc == 0); + + rc = boot_write_status(state, bs); + bs->state = BOOT_STATUS_STATE_1; + BOOT_STATUS_ASSERT(rc == 0); + } + + if (bs->state == BOOT_STATUS_STATE_1) { + rc = boot_erase_region(fap_secondary_slot, img_off, sz); + assert(rc == 0); + + rc = boot_copy_region(state, fap_primary_slot, fap_secondary_slot, + img_off, img_off, copy_sz); + assert(rc == 0); + + if (bs->idx == BOOT_STATUS_IDX_0 && !bs->use_scratch) { + /* If not all sectors of the slot are being swapped, + * guarantee here that only the primary slot will have the state. + */ + rc = swap_erase_trailer_sectors(state, fap_secondary_slot); + assert(rc == 0); + } + + rc = boot_write_status(state, bs); + bs->state = BOOT_STATUS_STATE_2; + BOOT_STATUS_ASSERT(rc == 0); + } + + if (bs->state == BOOT_STATUS_STATE_2) { + rc = boot_erase_region(fap_primary_slot, img_off, sz); + assert(rc == 0); + + /* NOTE: If this is the final sector, we exclude the image trailer from + * this copy (copy_sz was truncated earlier). + */ + rc = boot_copy_region(state, fap_scratch, fap_primary_slot, + 0, img_off, copy_sz); + assert(rc == 0); + + if (bs->use_scratch) { + scratch_trailer_off = boot_status_off(fap_scratch); + + /* copy current status that is being maintained in scratch */ + rc = boot_copy_region(state, fap_scratch, fap_primary_slot, + scratch_trailer_off, img_off + copy_sz, + (BOOT_STATUS_STATE_COUNT - 1) * BOOT_WRITE_SZ(state)); + BOOT_STATUS_ASSERT(rc == 0); + + rc = boot_read_swap_state(fap_scratch, &swap_state); + assert(rc == 0); + + if (swap_state.image_ok == BOOT_FLAG_SET) { + rc = boot_write_image_ok(fap_primary_slot); + assert(rc == 0); + } + + if (swap_state.swap_type != BOOT_SWAP_TYPE_NONE) { + rc = boot_write_swap_info(fap_primary_slot, + swap_state.swap_type, image_index); + assert(rc == 0); + } + + rc = boot_write_swap_size(fap_primary_slot, bs->swap_size); + assert(rc == 0); + +#ifdef MCUBOOT_ENC_IMAGES + rc = boot_write_enc_key(fap_primary_slot, 0, bs); + assert(rc == 0); + + rc = boot_write_enc_key(fap_primary_slot, 1, bs); + assert(rc == 0); +#endif + rc = boot_write_magic(fap_primary_slot); + assert(rc == 0); + } + + /* If we wrote a trailer to the scratch area, erase it after we persist + * a trailer to the primary slot. We do this to prevent mcuboot from + * reading a stale status from the scratch area in case of immediate + * reset. + */ + erase_scratch = bs->use_scratch; + bs->use_scratch = 0; + + rc = boot_write_status(state, bs); + bs->idx++; + bs->state = BOOT_STATUS_STATE_0; + BOOT_STATUS_ASSERT(rc == 0); + + if (erase_scratch) { + rc = boot_erase_region(fap_scratch, 0, flash_area_get_size(fap_scratch)); + assert(rc == 0); + } + } + + flash_area_close(fap_primary_slot); + flash_area_close(fap_secondary_slot); + flash_area_close(fap_scratch); +} + +void +swap_run(struct boot_loader_state *state, struct boot_status *bs, + uint32_t copy_size) +{ + uint32_t sz; + int first_sector_idx; + int last_sector_idx; + uint32_t swap_idx; + + BOOT_LOG_INF("Starting swap using scratch algorithm."); + + last_sector_idx = find_last_sector_idx(state, copy_size); + + swap_idx = 0; + while (last_sector_idx >= 0) { + sz = boot_copy_sz(state, last_sector_idx, &first_sector_idx); + if (swap_idx >= (bs->idx - BOOT_STATUS_IDX_0)) { + boot_swap_sectors(first_sector_idx, sz, state, bs); + } + + last_sector_idx = first_sector_idx - 1; + swap_idx++; + } + +} +#endif /* !MCUBOOT_OVERWRITE_ONLY */ + +int app_max_size(struct boot_loader_state *state) +{ + size_t num_sectors_primary; + size_t num_sectors_secondary; + size_t sz0, sz1; + size_t primary_slot_sz, secondary_slot_sz; +#ifndef MCUBOOT_OVERWRITE_ONLY + size_t scratch_sz; +#endif + size_t i, j; + int8_t smaller; + + num_sectors_primary = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT); + num_sectors_secondary = boot_img_num_sectors(state, BOOT_SECONDARY_SLOT); + +#ifndef MCUBOOT_OVERWRITE_ONLY + scratch_sz = boot_scratch_area_size(state); +#endif + + /* + * The following loop scans all sectors in a linear fashion, assuring that + * for each possible sector in each slot, it is able to fit in the other + * slot's sector or sectors. Slot's should be compatible as long as any + * number of a slot's sectors are able to fit into another, which only + * excludes cases where sector sizes are not a multiple of each other. + */ + i = sz0 = primary_slot_sz = 0; + j = sz1 = secondary_slot_sz = 0; + smaller = 0; + while (i < num_sectors_primary || j < num_sectors_secondary) { + if (sz0 == sz1) { + sz0 += boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i); + sz1 += boot_img_sector_size(state, BOOT_SECONDARY_SLOT, j); + i++; + j++; + } else if (sz0 < sz1) { + sz0 += boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i); + /* Guarantee that multiple sectors of the secondary slot + * fit into the primary slot. + */ + if (smaller == 2) { + BOOT_LOG_WRN("Cannot upgrade: slots have non-compatible sectors"); + return 0; + } + smaller = 1; + i++; + } else { + sz1 += boot_img_sector_size(state, BOOT_SECONDARY_SLOT, j); + /* Guarantee that multiple sectors of the primary slot + * fit into the secondary slot. + */ + if (smaller == 1) { + BOOT_LOG_WRN("Cannot upgrade: slots have non-compatible sectors"); + return 0; + } + smaller = 2; + j++; + } +#ifndef MCUBOOT_OVERWRITE_ONLY + if (sz0 == sz1) { + primary_slot_sz += sz0; + secondary_slot_sz += sz1; + /* Scratch has to fit each swap operation to the size of the larger + * sector among the primary slot and the secondary slot. + */ + if (sz0 > scratch_sz || sz1 > scratch_sz) { + BOOT_LOG_WRN("Cannot upgrade: not all sectors fit inside scratch"); + return 0; + } + smaller = sz0 = sz1 = 0; + } +#endif + } + +#ifdef MCUBOOT_OVERWRITE_ONLY + return (sz1 < sz0 ? sz1 : sz0); +#else + return (secondary_slot_sz < primary_slot_sz ? secondary_slot_sz : primary_slot_sz); +#endif +} +#else +int app_max_size(struct boot_loader_state *state) +{ + const struct flash_area *fap; + int fa_id; + int rc; + uint32_t active_slot; + int primary_sz, secondary_sz; + + active_slot = state->slot_usage[BOOT_CURR_IMG(state)].active_slot; + + fa_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), active_slot); + rc = flash_area_open(fa_id, &fap); + assert(rc == 0); + primary_sz = flash_area_get_size(fap); + flash_area_close(fap); + + if (active_slot == BOOT_PRIMARY_SLOT) { + active_slot = BOOT_SECONDARY_SLOT; + } else { + active_slot = BOOT_PRIMARY_SLOT; + } + + fa_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), active_slot); + rc = flash_area_open(fa_id, &fap); + assert(rc == 0); + secondary_sz = flash_area_get_size(fap); + flash_area_close(fap); + + return (secondary_sz < primary_sz ? secondary_sz : primary_sz); +} + +#endif /* !MCUBOOT_DIRECT_XIP && !MCUBOOT_RAM_LOAD */ + +int +boot_read_image_header(struct boot_loader_state *state, int slot, + struct image_header *out_hdr, struct boot_status *bs) +{ + const struct flash_area *fap; +#ifdef MCUBOOT_SWAP_USING_SCRATCH + uint32_t swap_count; + uint32_t swap_size; +#endif + int area_id; + int hdr_slot; + int rc = 0; + +#ifndef MCUBOOT_SWAP_USING_SCRATCH + (void)bs; +#endif + +#if (BOOT_IMAGE_NUMBER == 1) + (void)state; +#endif + + hdr_slot = slot; + +#ifdef MCUBOOT_SWAP_USING_SCRATCH + /* If the slots are being swapped, the headers might have been moved to scratch area or to the + * other slot depending on the progress of the swap process. + */ + if (bs && !boot_status_is_reset(bs)) { + rc = boot_find_status(BOOT_CURR_IMG(state), &fap); + + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + rc = boot_read_swap_size(fap, &swap_size); + flash_area_close(fap); + + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + swap_count = find_swap_count(state, swap_size); + + if (bs->idx - BOOT_STATUS_IDX_0 >= swap_count) { + /* If all segments have been swapped, the header is located in the other slot */ + hdr_slot = (slot == BOOT_PRIMARY_SLOT) ? BOOT_SECONDARY_SLOT : BOOT_PRIMARY_SLOT; + } else if (bs->idx - BOOT_STATUS_IDX_0 == swap_count - 1) { + /* If the last swap operation is in progress, the headers are currently being swapped + * since the first segment of each slot is the last to be processed. + */ + + if (slot == BOOT_SECONDARY_SLOT && bs->state >= BOOT_STATUS_STATE_1) { + /* After BOOT_STATUS_STATE_1, the secondary image's header has been moved to the + * scratch area. + */ + hdr_slot = BOOT_NUM_SLOTS; + } else if (slot == BOOT_PRIMARY_SLOT && bs->state >= BOOT_STATUS_STATE_2) { + /* After BOOT_STATUS_STATE_2, the primary image's header has been moved to the + * secondary slot. + */ + hdr_slot = BOOT_SECONDARY_SLOT; + } + } + } + + if (hdr_slot == BOOT_NUM_SLOTS) { + area_id = FLASH_AREA_IMAGE_SCRATCH; + } else { + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), hdr_slot); + } +#else + area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), hdr_slot); +#endif + + rc = flash_area_open(area_id, &fap); + if (rc == 0) { + rc = flash_area_read(fap, 0, out_hdr, sizeof *out_hdr); + flash_area_close(fap); + } + + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + +done: + return rc; +} + +#endif /* !MCUBOOT_SWAP_USING_MOVE */ diff --git a/bootloader/mcuboot/boot/bootutil/src/tlv.c b/bootloader/mcuboot/boot/bootutil/src/tlv.c new file mode 100644 index 0000000..a763c96 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/src/tlv.c @@ -0,0 +1,154 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2019 JUUL Labs + * Copyright (c) 2020 Arm Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include + +#include "bootutil/bootutil.h" +#include "bootutil/image.h" +#include "bootutil_priv.h" + +/* + * Initialize a TLV iterator. + * + * @param it An iterator struct + * @param hdr image_header of the slot's image + * @param fap flash_area of the slot which is storing the image + * @param type Type of TLV to look for + * @param prot true if TLV has to be stored in the protected area, false otherwise + * + * @returns 0 if the TLV iterator was successfully started + * -1 on errors + */ +int +bootutil_tlv_iter_begin(struct image_tlv_iter *it, const struct image_header *hdr, + const struct flash_area *fap, uint16_t type, bool prot) +{ + uint32_t off_; + struct image_tlv_info info; + + if (it == NULL || hdr == NULL || fap == NULL) { + return -1; + } + + off_ = BOOT_TLV_OFF(hdr); + if (LOAD_IMAGE_DATA(hdr, fap, off_, &info, sizeof(info))) { + return -1; + } + + if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) { + if (hdr->ih_protect_tlv_size != info.it_tlv_tot) { + return -1; + } + + if (LOAD_IMAGE_DATA(hdr, fap, off_ + info.it_tlv_tot, + &info, sizeof(info))) { + return -1; + } + } else if (hdr->ih_protect_tlv_size != 0) { + return -1; + } + + if (info.it_magic != IMAGE_TLV_INFO_MAGIC) { + return -1; + } + + it->hdr = hdr; + it->fap = fap; + it->type = type; + it->prot = prot; + it->prot_end = off_ + it->hdr->ih_protect_tlv_size; + it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot; + // position on first TLV + it->tlv_off = off_ + sizeof(info); + return 0; +} + +/* + * Find next TLV + * + * @param it The image TLV iterator struct + * @param off The offset of the TLV's payload in flash + * @param len The length of the TLV's payload + * @param type If not NULL returns the type of TLV found + * + * @returns 0 if a TLV with with matching type was found + * 1 if no more TLVs with matching type are available + * -1 on errors + */ +int +bootutil_tlv_iter_next(struct image_tlv_iter *it, uint32_t *off, uint16_t *len, + uint16_t *type) +{ + struct image_tlv tlv; + int rc; + + if (it == NULL || it->hdr == NULL || it->fap == NULL) { + return -1; + } + + while (it->tlv_off < it->tlv_end) { + if (it->hdr->ih_protect_tlv_size > 0 && it->tlv_off == it->prot_end) { + it->tlv_off += sizeof(struct image_tlv_info); + } + + rc = LOAD_IMAGE_DATA(it->hdr, it->fap, it->tlv_off, &tlv, sizeof tlv); + if (rc) { + return -1; + } + + /* No more TLVs in the protected area */ + if (it->prot && it->tlv_off >= it->prot_end) { + return 1; + } + + if (it->type == IMAGE_TLV_ANY || tlv.it_type == it->type) { + if (type != NULL) { + *type = tlv.it_type; + } + *off = it->tlv_off + sizeof(tlv); + *len = tlv.it_len; + it->tlv_off += sizeof(tlv) + tlv.it_len; + return 0; + } + + it->tlv_off += sizeof(tlv) + tlv.it_len; + } + + return 1; +} + +/* + * Return if a TLV entry is in the protected area. + * + * @param it The image TLV iterator struct + * @param off The offset of the entry to check. + * + * @return 0 if this TLV iterator entry is not protected. + * 1 if this TLV iterator entry is in the protected region + * -1 if the iterator is invalid. + */ +int +bootutil_tlv_iter_is_prot(struct image_tlv_iter *it, uint32_t off) +{ + if (it == NULL || it->hdr == NULL || it->fap == NULL) { + return -1; + } + + return off < it->prot_end; +} diff --git a/bootloader/mcuboot/boot/bootutil/zephyr/CMakeLists.txt b/bootloader/mcuboot/boot/bootutil/zephyr/CMakeLists.txt new file mode 100644 index 0000000..d5364d0 --- /dev/null +++ b/bootloader/mcuboot/boot/bootutil/zephyr/CMakeLists.txt @@ -0,0 +1,46 @@ +# Copyright (c) 2020 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 + +if(CONFIG_MCUBOOT_BOOTUTIL_LIB) + +zephyr_interface_library_named(MCUBOOT_BOOTUTIL) + +target_include_directories(MCUBOOT_BOOTUTIL INTERFACE + ../ + ../include + ../../zephyr/include +) + +zephyr_library_named(mcuboot_util) +zephyr_library_sources( + ../src/bootutil_public.c + ) + +# Sensitivity to the TEST_BOOT_IMAGE_ACCESS_HOOKS define is implemented for +# allowing the test-build with the hooks feature enabled. +if(TEST_BOOT_IMAGE_ACCESS_HOOKS) + zephyr_library_sources( + ${APPLICATION_SOURCE_DIR}/hooks_sample.c + ) +endif() + +zephyr_library_link_libraries(MCUBOOT_BOOTUTIL) +target_link_libraries(MCUBOOT_BOOTUTIL INTERFACE zephyr_interface) + +if(CONFIG_BOOT_USE_TINYCRYPT) + target_include_directories(MCUBOOT_BOOTUTIL INTERFACE + ../../../ext/tinycrypt/lib/include + ) +endif() + +if(CONFIG_BOOT_USE_PSA_CRYPTO) + target_include_directories(MCUBOOT_BOOTUTIL INTERFACE + ${ZEPHYR_MBEDTLS_MODULE_DIR}/include + ) +endif() + +if(CONFIG_BOOT_USE_MBEDTLS OR CONFIG_BOOT_USE_PSA_CRYPTO AND NOT CONFIG_PSA_CORE_OBERON) + zephyr_link_libraries(mbedTLS) +endif() +endif() diff --git a/bootloader/mcuboot/boot/cypress/.gitignore b/bootloader/mcuboot/boot/cypress/.gitignore new file mode 100644 index 0000000..9a2c99f --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/.gitignore @@ -0,0 +1,41 @@ +outdir/ +.*.swp +target.sh +*.pyc +tags +rusty-tags.* + +# mynewt +/repos/ +/project.state +/bin/ +/targets/ +**/build/**/* + +#Eclipse project files +.cproject +.project + +# Compiled python modules. +*.pyc + +# Setuptools distribution folder. +/scripts/dist/ + +# Python egg metadata, regenerated from source files by setuptools. +/scripts/*.egg-info +/scripts/*.egg + +# Build dirs +*out/*/* +*out/obj/* + +# Build files +*.o +*.d +*.map +*.elf +*.bin +*.hex +*.log +*.lst \ No newline at end of file diff --git a/bootloader/mcuboot/boot/cypress/BlinkyApp/BlinkyApp.mk b/bootloader/mcuboot/boot/cypress/BlinkyApp/BlinkyApp.mk new file mode 100644 index 0000000..5ff2080 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/BlinkyApp/BlinkyApp.mk @@ -0,0 +1,132 @@ +################################################################################ +# \file BlinkyApp.mk +# \version 1.0 +# +# \brief +# Makefile to describe demo application BlinkyApp for Cypress MCUBoot based applications. +# +################################################################################ +# \copyright +# Copyright 2018-2019 Cypress Semiconductor Corporation +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +################################################################################ + +include host.mk + +# Cypress' MCUBoot Application supports GCC ARM only at this moment +# Set defaults to: +# - compiler GCC +# - build configuration to Debug +# - image type to BOOT +COMPILER ?= GCC_ARM +IMG_TYPE ?= BOOT + +# For which core this application is built +CORE ?= CM4 + +# image type can be BOOT or UPGRADE +IMG_TYPES = BOOT UPGRADE + +# possible values are 0 and 0xff +# internal Flash by default +ERASED_VALUE ?= 0 + +ifneq ($(COMPILER), GCC_ARM) +$(error Only GCC ARM is supported at this moment) +endif + +CUR_APP_PATH = $(PRJ_DIR)/$(APP_NAME) + +include $(PRJ_DIR)/platforms.mk +include $(PRJ_DIR)/common_libs.mk +include $(PRJ_DIR)/toolchains.mk + +# Application-specific DEFINES +ifeq ($(IMG_TYPE), BOOT) + DEFINES_APP := -DBOOT_IMG +else + DEFINES_APP := -DUPGRADE_IMG +endif + +# Define start of application, RAM start and size, slot size +ifeq ($(PLATFORM), PSOC_062_2M) + DEFINES_APP += -DRAM_START=0x08040000 + DEFINES_APP += -DRAM_SIZE=0x10000 +else ifeq ($(PLATFORM), PSOC_062_1M) + DEFINES_APP += -DRAM_START=0x08020000 + DEFINES_APP += -DRAM_SIZE=0x10000 +else ifeq ($(PLATFORM), PSOC_062_512K) + DEFINES_APP += -DRAM_START=0x08020000 + DEFINES_APP += -DRAM_SIZE=0x10000 +endif + + +DEFINES_APP += -DRAM_SIZE=0x10000 +DEFINES_APP += -DUSER_APP_START=0x10018000 +SLOT_SIZE ?= 0x10000 + + +# Collect Test Application sources +SOURCES_APP_SRC := $(wildcard $(CUR_APP_PATH)/*.c) +# Collect all the sources +SOURCES_APP += $(SOURCES_APP_SRC) + +# Collect includes for BlinkyApp +INCLUDE_DIRS_APP := $(addprefix -I, $(CURDIR)) +INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH)) + +# Overwite path to linker script if custom is required, otherwise default from BSP is used +ifeq ($(COMPILER), GCC_ARM) +LINKER_SCRIPT := $(subst /cygdrive/c,c:,$(CUR_APP_PATH)/linker/$(APP_NAME).ld) +else +$(error Only GCC ARM is supported at this moment) +endif + +ASM_FILES_APP := +ASM_FILES_APP += $(ASM_FILES_STARTUP) + +# We still need this for MCUBoot apps signing +IMGTOOL_PATH ?= ../../scripts/imgtool.py + +SIGN_ARGS := sign --header-size 1024 --pad-header --align 8 -v "2.0" -S $(SLOT_SIZE) -M 512 --overwrite-only -R $(ERASED_VALUE) -k keys/$(SIGN_KEY_FILE).pem + +# Output folder +OUT := $(APP_NAME)/out +# Output folder to contain build artifacts +OUT_TARGET := $(OUT)/$(PLATFORM) + +OUT_CFG := $(OUT_TARGET)/$(BUILDCFG) + +# Set build directory for BOOT and UPGRADE images +ifeq ($(IMG_TYPE), UPGRADE) + ifeq ($(ENC_IMG), 1) + SIGN_ARGS += --encrypt ../../$(ENC_KEY_FILE).pem + endif + SIGN_ARGS += --pad + UPGRADE_SUFFIX :=_upgrade + OUT_CFG := $(OUT_CFG)/upgrade +else + OUT_CFG := $(OUT_CFG)/boot +endif + +pre_build: + $(info [PRE_BUILD] - Generating linker script for application $(CUR_APP_PATH)/linker/$(APP_NAME).ld) + @$(CC) -E -x c $(CFLAGS) $(INCLUDE_DIRS) $(CUR_APP_PATH)/linker/$(APP_NAME)_template.ld | grep -v '^#' >$(CUR_APP_PATH)/linker/$(APP_NAME).ld + +# Post build action to execute after main build job +post_build: $(OUT_CFG)/$(APP_NAME).hex + $(info [POST_BUILD] - Executing post build script for $(APP_NAME)) + mv -f $(OUT_CFG)/$(APP_NAME).hex $(OUT_CFG)/$(APP_NAME)_unsigned.hex + $(PYTHON_PATH) $(IMGTOOL_PATH) $(SIGN_ARGS) $(OUT_CFG)/$(APP_NAME)_unsigned.hex $(OUT_CFG)/$(APP_NAME)$(UPGRADE_SUFFIX).hex diff --git a/bootloader/mcuboot/boot/cypress/BlinkyApp/BlinkyApp_CM4_Debug.launch b/bootloader/mcuboot/boot/cypress/BlinkyApp/BlinkyApp_CM4_Debug.launch new file mode 100644 index 0000000..34a173b --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/BlinkyApp/BlinkyApp_CM4_Debug.launch @@ -0,0 +1,62 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/bootloader/mcuboot/boot/cypress/BlinkyApp/Readme.md b/bootloader/mcuboot/boot/cypress/BlinkyApp/Readme.md new file mode 100644 index 0000000..ba5340e --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/BlinkyApp/Readme.md @@ -0,0 +1,165 @@ +### Blinking LED test application for MCUboot bootloader + +### Description + +Implements simple Blinky LED CM4 application to demonstrate MCUboot Application operation in terms of BOOT and UPGRADE process. + +It is started by MCUboot Application which is running on CM0p. + +Functionality: + +* Blinks RED led with 2 different rates, depending on type of image - BOOT or UPGRADE. +* Prints debug info and version of itself to terminal at 115200 baud. +* Can be built for BOOT slot or UPGRADE slot of bootloader. + +Currently supported platforms + +* PSOC_062_2M +* PSOC_062_1M +* PSOC_062_512K + +### Hardware limitations + +Since this application is created to demonstrate MCUboot library features and not as reference examples some considerations are taken. + +1. Port/pin `P5_0` and `P5_1` used to configure serial port for debug prints. These pins are the most commonly used for serial port connection among available Cypress PSoC 6 kits. If you try to use custom hardware with this application - change definitions of `CY_DEBUG_UART_TX` and `CY_DEBUG_UART_RX` in `main.c` of BlinkyApp to port/pin pairs corresponding to your design. +2. Port `GPIO_PRT13` pin `7U` used to define user connection LED. This pin is the most commonly used for USER_LED connection among available Cypress PSoC 6 kits. If you try to use custom hardware with this application - change definitions of `LED_PORT` and `LED_PIN` in `main.c` of BlinkyApp to port/pin pairs corresponding to your design. + +### Pre-build action + +Pre-build action is implemented for defining start address and size of flash, as well as RAM start address and size for BlinkyApp. +These values are set by specifing following macros: `-DUSER_APP_SIZE`, `-DUSER_APP_START`, `-DRAM_SIZE`, `-DRAM_START` in makefile. + +Pre-build action calls GCC preprocessor which intantiates defines for particular values in `BlinkyApp_template.ld`. + +Default values set for currently supported targets: +* `BlinkyApp.mk` to `-DUSER_APP_START=0x10018000` + +**Important**: make sure RAM areas of CM4-based BlinkyApp and CM0p-based MCUBootApp bootloader do not overlap. +Memory (stack) corruption of CM0p application can cause failure if SystemCall-served operations invoked from CM4. + +### Building an application + +Root directory for build is **boot/cypress.** + +The following command will build regular HEX file of a BlinkyApp for BOOT slot. Substitute `PLATFORM=` to a paltform name you use in all following commands. + + make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=BOOT + +This have following defaults suggested: + + BUILDCFG=Debug + IMG_TYPE=BOOT + +To build UPGRADE image use following command: + + make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x10000 + + Note: HEADER_OFFSET=%SLOT_SIZE% + +Example command-line for single-image: + + make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=BOOT + +**Building Multi-Image** + +`BlinkyApp` can be built to use in multi-image bootloader configuration. + +To get appropriate artifacts to use with multi image MCUBootApp, makefile flag `HEADER_OFFSET=` can be used. + +Example usage: + +Considering default config: + +* first image BOOT (PRIMARY) slot start `0x10018000` +* slot size `0x10000` +* second image BOOT (PRIMARY) slot start `0x10038000` + +To get appropriate artifact for second image PRIMARY slot run this command: + + make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=BOOT HEADER_OFFSET=0x20000 + +*Note:* only 2 images are supported at the moment. + +**How to build upgrade image for external memory:** + +To prepare MCUBootApp for work with external memory please refer to `MCUBootApp/ExternalMemory.md`. + +For build BlinkyApp upgrade image for external memory use command: + + make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x7FE8000 ERASED_VALUE=0xff + +`HEADER_OFFSET` defines the offset from original boot image address. This one in line above suggests secondary slot will start from `0x18000000`. + +`ERASED_VALUE` defines the memory cell contents in erased state. It is `0x00` for PSoC6's internal Flash and `0xff` for S25FL512S. + +In case of using muti-image configuration, upgrade image for second application can be built using next command: + + make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x8028000 ERASED_VALUE=0xff + + Note: for S25FL512S block address shuld be mutiple by 0x40000 + +**How to build encrypted upgrade image :** + +To prepare MCUBootApp for work with encrypted upgrade image please refer to `MCUBootApp/Readme.md`. + +To obtain encrypted upgrade image of BlinkyApp extra flag `ENC_IMG=1` should be passed in command line, for example: + + make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x20000 ENC_IMG=1 + +This also suggests user already placed corresponing `*.pem` key in `\keys` folder. The key variables are defined in root `Makefile` as `SIGN_KEY_FILE` and `ENC_KEY_FILE` + +### Post-build + +Post build action is executed at compile time for `BlinkyApp`. In case of build for `PSOC_062_2M` platform it calls `imgtool` from `MCUboot` scripts and adds signature to compiled image. + +Flags passed to `imgtool` for signature are defined in `SIGN_ARGS` variable in BlinkyApp.mk. + +### How to program an application + +Use any preferred tool for programming hex files. + +Hex file names to use for programming: + +`BlinkyApp` always produce build artifacts in 2 separate folders - `boot` and `upgrade`. + +`BlinkyApp` built to run with `MCUBootApp` produces files with name BlinkyApp.hex in `boot` directory and `BlinkyApp_upgrade.hex` in `upgrade` folder. These files are ready to be flashed to the board. + +`BlinkyApp_unsigned.hex` hex file is also preserved in both cases for possible troubleshooting. + +Files to use for programming are: + +`BOOT` - boot/BlinkyApp.hex +`UPGRADE` - upgrade/BlinkyApp_upgrade.hex + +**Flags:** +- `BUILDCFG` - configuration **Release** or **Debug** +- `MAKEINFO` - 0 (default) - less build info, 1 - verbose output of compilation. +- `HEADER_OFFSET` - 0 (default) - no offset of output hex file, 0x%VALUE% - offset for output hex file. Value 0x10000 is slot size MCUboot Bootloader in this example. +- `IMG_TYPE` - `BOOT` (default) - build image for BOOT slot of MCUboot Bootloader, `UPGRADE` - build image for UPGRADE slot of MCUboot Bootloader. +- `ENC_IMG` - 0 (default) - build regular upgrade image, `1` - build encrypted upgrade image (MCUBootApp should also be built with this flash set 1) + +**NOTE**: In case of `UPGRADE` image `HEADER_OFFSET` should be set to MCUboot Bootloader slot size. + +### Example terminal output + +When user application programmed in BOOT slot: + + =========================== + [BlinkyApp] BlinkyApp v1.0 [CM4] + =========================== + [BlinkyApp] GPIO initialized + [BlinkyApp] UART initialized + [BlinkyApp] Retarget I/O set to 115200 baudrate + [BlinkyApp] Red led blinks with 1 sec period + +When user application programmed in UPRADE slot and upgrade procedure was successful: + + =========================== + [BlinkyApp] BlinkyApp v2.0 [+] + =========================== + + [BlinkyApp] GPIO initialized + [BlinkyApp] UART initialized + [BlinkyApp] Retarget I/O set to 115200 baudrate + [BlinkyApp] Red led blinks with 0.25 sec period diff --git a/bootloader/mcuboot/boot/cypress/BlinkyApp/libs.mk b/bootloader/mcuboot/boot/cypress/BlinkyApp/libs.mk new file mode 100644 index 0000000..7994d13 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/BlinkyApp/libs.mk @@ -0,0 +1,60 @@ +################################################################################ +# \file libs.mk +# \version 1.0 +# +# \brief +# Makefile to describe libraries needed for Cypress MCUBoot based applications. +# +################################################################################ +# \copyright +# Copyright 2018-2019 Cypress Semiconductor Corporation +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +################################################################################ + +################################################################################ +# PDL library +################################################################################ +PDL_VERSION = 121 +# +CUR_LIBS_PATH = $(PRJ_DIR)/libs + +# Collect source files for Retarget-io +SOURCES_RETARGET_IO := $(wildcard $(CUR_LIBS_PATH)/retarget-io/*.c) +SOURCES_WATCHDOG := $(wildcard $(CUR_LIBS_PATH)/watchdog/*.c) + +# Collect source files for HAL +SOURCES_HAL := $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/*.c) +SOURCES_HAL += $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/triggers/*.c) +SOURCES_HAL += $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/pin_packages/*.c) + +# Retarget-io related include directories +INCLUDE_DIRS_RETARGET_IO := $(CUR_LIBS_PATH)/retarget-io +INCLUDE_DIRS_WATCHDOG := $(CUR_LIBS_PATH)/watchdog + +# Collect dirrectories containing headers for PSOC6 HAL +INCLUDE_DIRS_HAL := $(CUR_LIBS_PATH)/psoc6hal/include +INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include +INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/pin_packages +INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/triggers + +# Collected source files for libraries +SOURCES_LIBS += $(SOURCES_RETARGET_IO) +SOURCES_LIBS += $(SOURCES_WATCHDOG) +SOURCES_LIBS += $(SOURCES_HAL) + +# Collected include directories for libraries +INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_RETARGET_IO)) +INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_WATCHDOG)) +INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL)) diff --git a/bootloader/mcuboot/boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld b/bootloader/mcuboot/boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld new file mode 100644 index 0000000..81fbc22 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld @@ -0,0 +1,425 @@ +/***************************************************************************//** +* \file cy8c6xxa_cm4_dual.ld +* \version 2.60 +* +* Linker file for the GNU C compiler. +* +* The main purpose of the linker script is to describe how the sections in the +* input files should be mapped into the output file, and to control the memory +* layout of the output file. +* +* \note The entry point location is fixed and starts at 0x10000000. The valid +* application image should be placed there. +* +* \note The linker files included with the PDL template projects must be generic +* and handle all common use cases. Your project may not use every section +* defined in the linker files. In that case you may see warnings during the +* build process. In your project, you can simply comment out or remove the +* relevant code in the linker file. +* +******************************************************************************** +* \copyright +* Copyright 2016-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ +#include + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +SEARCH_DIR(.) +GROUP(-lgcc -lc -lnosys) +ENTRY(Reset_Handler) + +/* Size of the stack section at the end of CM4 SRAM */ +STACK_SIZE = 0x1000; + +/* The size of the MCU boot header area at the start of FLASH */ +BOOT_HEADER_SIZE = 0x400; + +/* Force symbol to be entered in the output file as an undefined symbol. Doing +* this may, for example, trigger linking of additional modules from standard +* libraries. You may list several symbols for each EXTERN, and you may use +* EXTERN multiple times. This command has the same effect as the -u command-line +* option. +*/ +EXTERN(Reset_Handler) + +/* The MEMORY section below describes the location and size of blocks of memory in the target. +* Use this section to specify the memory regions available for allocation. +*/ +MEMORY +{ + /* The ram and flash regions control RAM and flash memory allocation for the CM4 core. + * You can change the memory allocation by editing the 'ram' and 'flash' regions. + * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use. + * Using this memory region for other purposes will lead to unexpected behavior. + * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld', + * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'. + */ + ram (rwx) : ORIGIN = RAM_START, LENGTH = RAM_SIZE + flash (rx) : ORIGIN = USER_APP_START, LENGTH = USER_APP_SIZE + + /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash. + * You can assign sections to this memory region for only one of the cores. + * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region. + * Therefore, repurposing this memory region will prevent such middleware from operation. + */ + em_eeprom (rx) : ORIGIN = 0x14000000, LENGTH = 0x8000 /* 32 KB */ + + /* The following regions define device specific memory regions and must not be changed. */ + sflash_user_data (rx) : ORIGIN = 0x16000800, LENGTH = 0x800 /* Supervisory flash: User data */ + sflash_nar (rx) : ORIGIN = 0x16001A00, LENGTH = 0x200 /* Supervisory flash: Normal Access Restrictions (NAR) */ + sflash_public_key (rx) : ORIGIN = 0x16005A00, LENGTH = 0xC00 /* Supervisory flash: Public Key */ + sflash_toc_2 (rx) : ORIGIN = 0x16007C00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 */ + sflash_rtoc_2 (rx) : ORIGIN = 0x16007E00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 Copy */ + xip (rx) : ORIGIN = 0x18000000, LENGTH = 0x8000000 /* 128 MB */ + efuse (r) : ORIGIN = 0x90700000, LENGTH = 0x100000 /* 1 MB */ +} + +/* Library configurations */ +GROUP(libgcc.a libc.a libm.a libnosys.a) + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * __Vectors_End + * __Vectors_Size + */ + + +SECTIONS +{ + /* Cortex-M4 application flash area */ + .text ORIGIN(flash) + BOOT_HEADER_SIZE : + { + . = ALIGN(4); + __Vectors = . ; + KEEP(*(.vectors)) + . = ALIGN(4); + __Vectors_End = .; + __Vectors_Size = __Vectors_End - __Vectors; + __end__ = .; + + . = ALIGN(4); + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + /* Read-only code (constants). */ + *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*) + + KEEP(*(.eh_frame*)) + } > flash + + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + __exidx_start = .; + + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > flash + __exidx_end = .; + + + /* To copy multiple ROM to RAM sections, + * uncomment .copy.table section and, + * define __STARTUP_COPY_MULTIPLE in startup_psoc6_02_cm4.S */ + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + + /* Copy interrupt vectors from flash to RAM */ + LONG (__Vectors) /* From */ + LONG (__ram_vectors_start__) /* To */ + LONG (__Vectors_End - __Vectors) /* Size */ + + /* Copy data section to RAM */ + LONG (__etext) /* From */ + LONG (__data_start__) /* To */ + LONG (__data_end__ - __data_start__) /* Size */ + + __copy_table_end__ = .; + } > flash + + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_02_cm4.S */ + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + __zero_table_end__ = .; + } > flash + + __etext = . ; + + + .ramVectors (NOLOAD) : ALIGN(8) + { + __ram_vectors_start__ = .; + KEEP(*(.ram_vectors)) + __ram_vectors_end__ = .; + } > ram + + + .data __ram_vectors_end__ : AT (__etext) + { + __data_start__ = .; + + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + + KEEP(*(.cy_ramfunc*)) + . = ALIGN(4); + + __data_end__ = .; + + } > ram + + + /* Place variables in the section that should not be initialized during the + * device startup. + */ + .noinit (NOLOAD) : ALIGN(8) + { + KEEP(*(.noinit)) + } > ram + + + /* The uninitialized global or static variables are placed in this section. + * + * The NOLOAD attribute tells linker that .bss section does not consume + * any space in the image. The NOLOAD attribute changes the .bss type to + * NOBITS, and that makes linker to A) not allocate section in memory, and + * A) put information to clear the section with all zeros during application + * loading. + * + * Without the NOLOAD attribute, the .bss section might get PROGBITS type. + * This makes linker to A) allocate zeroed section in memory, and B) copy + * this section to RAM during application loading. + */ + .bss (NOLOAD): + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > ram + + + .heap (NOLOAD): + { + __HeapBase = .; + __end__ = .; + end = __end__; + KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; + __HeapLimit = .; + } > ram + + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (NOLOAD): + { + KEEP(*(.stack*)) + } > ram + + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(ram) + LENGTH(ram); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") + + + /* Used for the digital signature of the secure application and the Bootloader SDK application. + * The size of the section depends on the required data size. */ + .cy_app_signature ORIGIN(flash) + LENGTH(flash) - 256 : + { + KEEP(*(.cy_app_signature)) + } > flash + + + /* Emulated EEPROM Flash area */ + .cy_em_eeprom : + { + KEEP(*(.cy_em_eeprom)) + } > em_eeprom + + + /* Supervisory Flash: User data */ + .cy_sflash_user_data : + { + KEEP(*(.cy_sflash_user_data)) + } > sflash_user_data + + + /* Supervisory Flash: Normal Access Restrictions (NAR) */ + .cy_sflash_nar : + { + KEEP(*(.cy_sflash_nar)) + } > sflash_nar + + + /* Supervisory Flash: Public Key */ + .cy_sflash_public_key : + { + KEEP(*(.cy_sflash_public_key)) + } > sflash_public_key + + + /* Supervisory Flash: Table of Content # 2 */ + .cy_toc_part2 : + { + KEEP(*(.cy_toc_part2)) + } > sflash_toc_2 + + + /* Supervisory Flash: Table of Content # 2 Copy */ + .cy_rtoc_part2 : + { + KEEP(*(.cy_rtoc_part2)) + } > sflash_rtoc_2 + + + /* Places the code in the Execute in Place (XIP) section. See the smif driver + * documentation for details. + */ + .cy_xip : + { + KEEP(*(.cy_xip)) + } > xip + + + /* eFuse */ + .cy_efuse : + { + KEEP(*(.cy_efuse)) + } > efuse + + + /* These sections are used for additional metadata (silicon revision, + * Silicon/JTAG ID, etc.) storage. + */ + .cymeta 0x90500000 : { KEEP(*(.cymeta)) } :NONE +} + + +/* The following symbols used by the cymcuelftool. */ +/* Flash */ +__cy_memory_0_start = 0x10000000; +__cy_memory_0_length = 0x00200000; +__cy_memory_0_row_size = 0x200; + +/* Emulated EEPROM Flash area */ +__cy_memory_1_start = 0x14000000; +__cy_memory_1_length = 0x8000; +__cy_memory_1_row_size = 0x200; + +/* Supervisory Flash */ +__cy_memory_2_start = 0x16000000; +__cy_memory_2_length = 0x8000; +__cy_memory_2_row_size = 0x200; + +/* XIP */ +__cy_memory_3_start = 0x18000000; +__cy_memory_3_length = 0x08000000; +__cy_memory_3_row_size = 0x200; + +/* eFuse */ +__cy_memory_4_start = 0x90700000; +__cy_memory_4_length = 0x100000; +__cy_memory_4_row_size = 1; + +/* EOF */ diff --git a/bootloader/mcuboot/boot/cypress/BlinkyApp/main.c b/bootloader/mcuboot/boot/cypress/BlinkyApp/main.c new file mode 100644 index 0000000..97e1c84 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/BlinkyApp/main.c @@ -0,0 +1,136 @@ +/* + * Copyright (c) 2020 Cypress Semiconductor Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + /* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + /*******************************************************************************/ + +#include "system_psoc6.h" +#include "cy_pdl.h" +#include "cyhal.h" +#include "cy_retarget_io.h" +#include "watchdog.h" + +/* Define pins for UART debug output */ + +#define CY_DEBUG_UART_TX (P5_1) +#define CY_DEBUG_UART_RX (P5_0) + +#if defined(PSOC_062_2M) +#warning "Check if User LED is correct for your target board." +#define LED_PORT GPIO_PRT13 +#define LED_PIN 7U +#elif defined(PSOC_062_1M) +#define LED_PORT GPIO_PRT13 +#define LED_PIN 7U +#elif defined(PSOC_062_512K) +#define LED_PORT GPIO_PRT11 +#define LED_PIN 1U +#endif + +#define LED_NUM 5U +#define LED_DRIVEMODE CY_GPIO_DM_STRONG_IN_OFF +#define LED_INIT_DRIVESTATE 1 + +const cy_stc_gpio_pin_config_t LED_config = +{ + .outVal = 1, + .driveMode = CY_GPIO_DM_STRONG_IN_OFF, + .hsiom = HSIOM_SEL_GPIO, + .intEdge = CY_GPIO_INTR_DISABLE, + .intMask = 0UL, + .vtrip = CY_GPIO_VTRIP_CMOS, + .slewRate = CY_GPIO_SLEW_FAST, + .driveSel = CY_GPIO_DRIVE_FULL, + .vregEn = 0UL, + .ibufMode = 0UL, + .vtripSel = 0UL, + .vrefSel = 0UL, + .vohSel = 0UL, +}; + +#define WATCHDOG_UPD_MESSAGE "[BlinkyApp] Update watchdog timer started in MCUBootApp to mark successful start of user app\r\n" +#define WATCHDOG_FREE_MESSAGE "[BlinkyApp] Turn off watchdog timer\r\n" + +#ifdef BOOT_IMG + #define BLINK_PERIOD (1000u) + #define GREETING_MESSAGE_VER "[BlinkyApp] BlinkyApp v1.0 [CM4]\r\n" + #define GREETING_MESSAGE_INFO "[BlinkyApp] Red led blinks with 1 sec period\r\n" +#elif defined(UPGRADE_IMG) + #define BLINK_PERIOD (250u) + #define GREETING_MESSAGE_VER "[BlinkyApp] BlinkyApp v2.0 [+]\r\n" + #define GREETING_MESSAGE_INFO "[BlinkyApp] Red led blinks with 0.25 sec period\r\n" +#else + #error "[BlinkyApp] Please specify type of image: -DBOOT_IMG or -DUPGRADE_IMG\r\n" +#endif + +void check_result(int res) +{ + if (res != CY_RSLT_SUCCESS) { + CY_ASSERT(0); + } +} + +void test_app_init_hardware(void) +{ + /* enable interrupts */ + __enable_irq(); + + /* Disabling watchdog so it will not interrupt normal flow later */ + Cy_GPIO_Pin_Init(LED_PORT, LED_PIN, &LED_config); + /* Initialize retarget-io to use the debug UART port */ + check_result(cy_retarget_io_init(CY_DEBUG_UART_TX, CY_DEBUG_UART_RX, + CY_RETARGET_IO_BAUDRATE)); + + printf("\n===========================\r\n"); + printf(GREETING_MESSAGE_VER); + printf("===========================\r\n"); + + printf("[BlinkyApp] GPIO initialized \r\n"); + printf("[BlinkyApp] UART initialized \r\n"); + printf("[BlinkyApp] Retarget I/O set to 115200 baudrate \r\n"); + +} + +int main(void) +{ + uint32_t blinky_period = BLINK_PERIOD; + + test_app_init_hardware(); + + printf(GREETING_MESSAGE_INFO); + + /* Update watchdog timer to mark successful start up of application */ + printf(WATCHDOG_UPD_MESSAGE); + cy_wdg_kick(); + printf(WATCHDOG_FREE_MESSAGE); + cy_wdg_free(); + + for (;;) + { + /* Toggle the user LED periodically */ + Cy_SysLib_Delay(blinky_period/2); + + /* Invert the USER LED state */ + Cy_GPIO_Inv(LED_PORT, LED_PIN); + } + return 0; +} diff --git a/bootloader/mcuboot/boot/cypress/BlinkyApp/main.h b/bootloader/mcuboot/boot/cypress/BlinkyApp/main.h new file mode 100644 index 0000000..4fafb4e --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/BlinkyApp/main.h @@ -0,0 +1,25 @@ +/* +\copyright +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +#ifndef USER_APP_START +#define USER_APP_START 0x10000000 +#endif + +#ifndef USER_APP_SIZE +#define USER_APP_SIZE 0x10000 +#endif \ No newline at end of file diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/ExternalMemory.md b/bootloader/mcuboot/boot/cypress/MCUBootApp/ExternalMemory.md new file mode 100644 index 0000000..e1281c8 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/ExternalMemory.md @@ -0,0 +1,100 @@ +### External Memory support for Secondary Slot + +**Description** + +Given document describes the use of external memory module as a secondary (upgrade) slot with Cypress' PSoC6 devices. + +The demonstration device is CY8CPROTO-062-4343W board which is PSoC6 device with 2M of Flash available. +The memory module present on board is S25FL512SAGMFI010 512-Mbit external Quad SPI NOR Flash. + +Using external memory for secondary slot allows to nearly double the size of Boot Image. + +**Operation Design and Flow** + +The design is based on using SFDP command's auto-discovery functionality of memory module IC and Cypress' SMIF PDL driver. + +It is assumed that user's design meets following: +* The memory-module used is SFDP-compliant; +* There only one module is being used for secondary slot; +* Only "OWERWRITE" bootloading scheme is used; +* The address for secondary slot should start from 0x18000000. +This corresponds to PSoC6's SMIF (Serial Memory InterFace) IP block mapping. +* The slot size for upgrade slot is even (or smaller) to erase size (0x40000) of given memory module. +This requirement is accepted for code simplicity. + +The default flash map implemented is the following: + +Single-image mode. + +`[0x10000000, 0x10018000]` - MCUBootApp (bootloader) area; + +`[0x10018000, 0x10028000]` - primary slot for BlinkyApp; + +`[0x18000000, 0x18010000]` - secondary slot for BlinkyApp; + +`[0x10038000, 0x10039000]` - scratch area (not used); + +Multi(dual)-image mode. + +`[0x10000000, 0x10018000]` - MCUBootApp (bootloader) area; + +`[0x10018000, 0x10028000]` - primary1 slot for BlinkyApp; + +`[0x18000000, 0x18010000]` - secondary1 slot for BlinkyApp; + +`[0x10038000, 0x10048000]` - primary2 slot for user app ; + +`[0x18040000, 0x18050000]` - secondary2 slot for user app; + +`[0x10058000, 0x10059000]` - scratch area (not used); + +Size of slots `0x10000` - 64kB + +**Note 1**: make sure primary, secondary slot and bootloader app sizes are appropriate and correspond to flash area size defined in Applications' linker files. + +**Note 2**: make sure secondary slot start address is aligned (or smaller) to erase size (0x40000 - 256kB). + +MCUBootApp's `main.c` contains the call to Init-SFDP API which performs required GPIO configurations, SMIF IP block configurations, SFDP protocol read and memory-config structure initialization. + +After that MCUBootApp is ready to accept upgrade image from external memory module. + +Once valid upgrade image was accepted the image in external memory will be erased. + +**How to enable external memory support:** + +1. Pass `USE_EXTERNAL_FLASH=1` flag to `make` command when building MCUBootApp. +2. Navigate to `cy_flash_map.c` and check if secondary slot start address and size meet the application's needs. +3. Define which slave select is used for external memory on a board by setting `smif_id` value in `main.c`. +4. Build MCUBootApp as described in `Readme.md`. + +**Note 3**: External memory code is developed basing on PDL and can be run on CM0p core only. It may require modifications if used on CM4. + +**How to build upgrade image for external memory:** + + make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x7FE8000 ERASED_VALUE=0xff + +`HEADER_OFFSET` defines the offset from original boot image address. This one in line above suggests secondary slot will start from `0x18000000`. + +`ERASED_VALUE` defines the memory cell contents in erased state. It is `0x00` for PSoC6's internal Flash and `0xff` for S25FL512S. + +**Programming to external memory** + +The MCUBootApp programming can be done similarly to described in `Readme.md`: + + export OPENOCD=/Applications/ModusToolbox/tools_2.1/openocd + + ${OPENOCD}/bin/openocd -s ${OPENOCD}/scripts \ + -f ${OPENOCD}/scripts/interface/kitprog3.cfg \ + -f ${OPENOCD}/scripts/target/psoc6_2m.cfg \ + -c "init; psoc6 sflash_restrictions 1" \ + -c "init; reset init; program PATH_TO_APPLICATION.hex" \ + -c "resume; reset; exit" + +There is a NULL-pointer placed for SMIF configuration pointer in TOC2 (Table Of Contents, `cy_serial_flash_prog.c`). +This is done to force CY8PROTO-062-4343W DAP Link firmware to program external memory with hardcoded values. + +1. Press SW3 Mode button on a board to switch the board into DAP Link mode. +2. Once DAP Link removable disk appeared drop (copy) the upgrade image HEX file to it. +This will invoke firmware to program external memory. + +**Note 3:** the programming of external memory is limited to S25FL512S p/n only at this moment. diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/MCUBootApp.ld b/bootloader/mcuboot/boot/cypress/MCUBootApp/MCUBootApp.ld new file mode 100644 index 0000000..c78c598 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/MCUBootApp.ld @@ -0,0 +1,418 @@ +/***************************************************************************//** +* \file cy8c6xxa_cm0plus.ld +* \version 2.60 +* +* Linker file for the GNU C compiler. +* +* The main purpose of the linker script is to describe how the sections in the +* input files should be mapped into the output file, and to control the memory +* layout of the output file. +* +* \note The entry point location is fixed and starts at 0x10000000. The valid +* application image should be placed there. +* +* \note The linker files included with the PDL template projects must be generic +* and handle all common use cases. Your project may not use every section +* defined in the linker files. In that case you may see warnings during the +* build process. In your project, you can simply comment out or remove the +* relevant code in the linker file. +* +******************************************************************************** +* \copyright +* Copyright 2016-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +SEARCH_DIR(.) +GROUP(-lgcc -lc -lnosys) +ENTRY(Reset_Handler) + +/* Size of the stack section at the end of CM0+ SRAM */ +STACK_SIZE = 0x1000; + +/* Force symbol to be entered in the output file as an undefined symbol. Doing +* this may, for example, trigger linking of additional modules from standard +* libraries. You may list several symbols for each EXTERN, and you may use +* EXTERN multiple times. This command has the same effect as the -u command-line +* option. +*/ +EXTERN(Reset_Handler) + +/* The MEMORY section below describes the location and size of blocks of memory in the target. +* Use this section to specify the memory regions available for allocation. +*/ +MEMORY +{ + /* The ram and flash regions control RAM and flash memory allocation for the CM0+ core. + * You can change the memory allocation by editing the 'ram' and 'flash' regions. + * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use. + * Using this memory region for other purposes will lead to unexpected behavior. + * Your changes must be aligned with the corresponding memory regions for the CM4 core in 'xx_cm4_dual.ld', + * where 'xx' is the device group; for example, 'cy8c6xx7_cm4_dual.ld'. + */ + public_ram (rw) : ORIGIN = 0x08000000, LENGTH = 0x800 + ram (rwx) : ORIGIN = 0x08000800, LENGTH = 0x1F800 + flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x18000 + + /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash. + * You can assign sections to this memory region for only one of the cores. + * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region. + * Therefore, repurposing this memory region will prevent such middleware from operation. + */ + em_eeprom (rx) : ORIGIN = 0x14000000, LENGTH = 0x8000 /* 32 KB */ + + /* The following regions define device specific memory regions and must not be changed. */ + sflash_user_data (rx) : ORIGIN = 0x16000800, LENGTH = 0x800 /* Supervisory flash: User data */ + sflash_nar (rx) : ORIGIN = 0x16001A00, LENGTH = 0x200 /* Supervisory flash: Normal Access Restrictions (NAR) */ + sflash_public_key (rx) : ORIGIN = 0x16005A00, LENGTH = 0xC00 /* Supervisory flash: Public Key */ + sflash_toc_2 (rx) : ORIGIN = 0x16007C00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 */ + sflash_rtoc_2 (rx) : ORIGIN = 0x16007E00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 Copy */ + xip (rx) : ORIGIN = 0x18000000, LENGTH = 0x8000000 /* 128 MB */ + efuse (r) : ORIGIN = 0x90700000, LENGTH = 0x100000 /* 1 MB */ +} + +/* Library configurations */ +GROUP(libgcc.a libc.a libm.a libnosys.a) + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * __Vectors_End + * __Vectors_Size + */ + + +SECTIONS +{ + .cy_app_header : + { + KEEP(*(.cy_app_header)) + } > flash + + /* Cortex-M0+ application flash area */ + .text : + { + . = ALIGN(4); + __Vectors = . ; + KEEP(*(.vectors)) + . = ALIGN(4); + __Vectors_End = .; + __Vectors_Size = __Vectors_End - __Vectors; + __end__ = .; + + . = ALIGN(4); + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + /* Read-only code (constants). */ + *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*) + + KEEP(*(.eh_frame*)) + } > flash + + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + __exidx_start = .; + + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > flash + __exidx_end = .; + + + /* To copy multiple ROM to RAM sections, + * uncomment .copy.table section and, + * define __STARTUP_COPY_MULTIPLE in startup_psoc6_02_cm0plus.S */ + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + + /* Copy interrupt vectors from flash to RAM */ + LONG (__Vectors) /* From */ + LONG (__ram_vectors_start__) /* To */ + LONG (__Vectors_End - __Vectors) /* Size */ + + /* Copy data section to RAM */ + LONG (__etext) /* From */ + LONG (__data_start__) /* To */ + LONG (__data_end__ - __data_start__) /* Size */ + + __copy_table_end__ = .; + } > flash + + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_02_cm0plus.S */ + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + __zero_table_end__ = .; + } > flash + + __etext = . ; + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(ram) + LENGTH(ram); + __StackLimit = __StackTop - STACK_SIZE ; + PROVIDE(__stack = __StackTop); + + .stackSpace (NOLOAD) : ALIGN(8) + { + . = . + STACK_SIZE ; + } > ram + + .ramVectors (NOLOAD) : ALIGN(8) + { + __ram_vectors_start__ = .; + KEEP(*(.ram_vectors)) + __ram_vectors_end__ = .; + } > ram + + /* Unprotected public RAM */ + .cy_sharedmem (NOLOAD): + { + . = ALIGN(4); + __public_ram_start__ = .; + KEEP(*(.cy_sharedmem)) + . = ALIGN(4); + __public_ram_end__ = .; + } > public_ram + + .data __ram_vectors_end__ : AT (__etext) + { + __data_start__ = .; + + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + + KEEP(*(.cy_ramfunc*)) + . = ALIGN(4); + + __data_end__ = .; + + } > ram + + + /* Place variables in the section that should not be initialized during the + * device startup. + */ + .noinit (NOLOAD) : ALIGN(8) + { + KEEP(*(.noinit)) + } > ram + + + /* The uninitialized global or static variables are placed in this section. + * + * The NOLOAD attribute tells linker that .bss section does not consume + * any space in the image. The NOLOAD attribute changes the .bss type to + * NOBITS, and that makes linker to A) not allocate section in memory, and + * A) put information to clear the section with all zeros during application + * loading. + * + * Without the NOLOAD attribute, the .bss section might get PROGBITS type. + * This makes linker to A) allocate zeroed section in memory, and B) copy + * this section to RAM during application loading. + */ + .bss (NOLOAD): + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > ram + + .heap (NOLOAD): + { + __HeapBase = .; + __end__ = .; + end = __end__; + KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram); + __HeapLimit = .; + } > ram + + + /* Emulated EEPROM Flash area */ + .cy_em_eeprom : + { + KEEP(*(.cy_em_eeprom)) + } > em_eeprom + + + /* Supervisory Flash: User data */ + .cy_sflash_user_data : + { + KEEP(*(.cy_sflash_user_data)) + } > sflash_user_data + + + /* Supervisory Flash: Normal Access Restrictions (NAR) */ + .cy_sflash_nar : + { + KEEP(*(.cy_sflash_nar)) + } > sflash_nar + + + /* Supervisory Flash: Public Key */ + .cy_sflash_public_key : + { + KEEP(*(.cy_sflash_public_key)) + } > sflash_public_key + + + /* Supervisory Flash: Table of Content # 2 */ + .cy_toc_part2 : + { + KEEP(*(.cy_toc_part2)) + } > sflash_toc_2 + + + /* Supervisory Flash: Table of Content # 2 Copy */ + .cy_rtoc_part2 : + { + KEEP(*(.cy_rtoc_part2)) + } > sflash_rtoc_2 + + + /* Places the code in the Execute in Place (XIP) section. See the smif driver + * documentation for details. + */ + .cy_xip : + { + KEEP(*(.cy_xip)) + } > xip + + + /* eFuse */ + .cy_efuse : + { + KEEP(*(.cy_efuse)) + } > efuse + + + /* These sections are used for additional metadata (silicon revision, + * Silicon/JTAG ID, etc.) storage. + */ + .cymeta 0x90500000 : { KEEP(*(.cymeta)) } :NONE +} + + +/* The following symbols used by the cymcuelftool. */ +/* Flash */ +__cy_memory_0_start = 0x10000000; +__cy_memory_0_length = 0x00200000; +__cy_memory_0_row_size = 0x200; + +/* Emulated EEPROM Flash area */ +__cy_memory_1_start = 0x14000000; +__cy_memory_1_length = 0x8000; +__cy_memory_1_row_size = 0x200; + +/* Supervisory Flash */ +__cy_memory_2_start = 0x16000000; +__cy_memory_2_length = 0x8000; +__cy_memory_2_row_size = 0x200; + +/* XIP */ +__cy_memory_3_start = 0x18000000; +__cy_memory_3_length = 0x08000000; +__cy_memory_3_row_size = 0x200; + +/* eFuse */ +__cy_memory_4_start = 0x90700000; +__cy_memory_4_length = 0x100000; +__cy_memory_4_row_size = 1; + +/* EOF */ diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/MCUBootApp.mk b/bootloader/mcuboot/boot/cypress/MCUBootApp/MCUBootApp.mk new file mode 100644 index 0000000..bba1160 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/MCUBootApp.mk @@ -0,0 +1,113 @@ +################################################################################ +# \file MCUBootApp.mk +# \version 1.0 +# +# \brief +# Makefile for Cypress MCUBoot-based application. +# +################################################################################ +# \copyright +# Copyright 2018-2019 Cypress Semiconductor Corporation +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +################################################################################ + +include host.mk + +# Cypress' MCUBoot Application supports GCC ARM only at this moment +# Set default compiler to GCC if not specified from command line +COMPILER ?= GCC_ARM + +USE_CRYPTO_HW ?= 0 +USE_EXTERNAL_FLASH ?= 0 +MCUBOOT_IMAGE_NUMBER ?= 1 +ENC_IMG ?= 0 + +# For which core this application is built +CORE ?= CM0P + +ifneq ($(COMPILER), GCC_ARM) +$(error Only GCC ARM is supported at this moment) +endif + +CUR_APP_PATH = $(PRJ_DIR)/$(APP_NAME) + +include $(PRJ_DIR)/platforms.mk +include $(PRJ_DIR)/common_libs.mk +include $(PRJ_DIR)/toolchains.mk + +# default slot size is 0x10000, 512bytes per row/sector, so 128 sectors +MAX_IMG_SECTORS ?= 128 + +# Application-specific DEFINES +DEFINES_APP := -DMBEDTLS_CONFIG_FILE="\"mcuboot_crypto_config.h\"" +DEFINES_APP += -DECC256_KEY_FILE="\"keys/$(SIGN_KEY_FILE).pub\"" +DEFINES_APP += -DCORE=$(CORE) +DEFINES_APP += -DMCUBOOT_IMAGE_NUMBER=$(MCUBOOT_IMAGE_NUMBER) +ifeq ($(USE_EXTERNAL_FLASH), 1) +DEFINES_APP += -DCY_BOOT_USE_EXTERNAL_FLASH +endif +DEFINES_APP += -DMCUBOOT_MAX_IMG_SECTORS=$(MAX_IMG_SECTORS) +# Hardrware acceleration support +ifeq ($(USE_CRYPTO_HW), 1) +DEFINES_APP += -DMBEDTLS_USER_CONFIG_FILE="\"mcuboot_crypto_acc_config.h\"" +DEFINES_APP += -DCY_CRYPTO_HAL_DISABLE +DEFINES_APP += -DCY_MBEDTLS_HW_ACCELERATION +endif +# Encrypted image support +ifeq ($(ENC_IMG), 1) +DEFINES_APP += -DENC_IMG=1 +endif + +# Collect MCUBoot sourses +SOURCES_MCUBOOT := $(wildcard $(CURDIR)/../bootutil/src/*.c) +# Collect MCUBoot Application sources +SOURCES_APP_SRC := $(wildcard $(CUR_APP_PATH)/*.c) + +# Collect Flash Layer port sources +SOURCES_FLASH_PORT := $(wildcard $(CURDIR)/cy_flash_pal/*.c) +SOURCES_FLASH_PORT += $(wildcard $(CURDIR)/cy_flash_pal/flash_qspi/*.c) +# Collect all the sources +SOURCES_APP := $(SOURCES_MCUBOOT) +SOURCES_APP += $(SOURCES_APP_SRC) +SOURCES_APP += $(SOURCES_FLASH_PORT) + +INCLUDE_DIRS_MCUBOOT := $(addprefix -I, $(CURDIR)/../bootutil/include) +INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(CURDIR)/../bootutil/src) +INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(CURDIR)/..) + +INCLUDE_DIRS_APP := $(addprefix -I, $(CURDIR)) +INCLUDE_DIRS_APP += $(addprefix -I, $(CURDIR)/cy_flash_pal/flash_qspi) +INCLUDE_DIRS_APP += $(addprefix -I, $(CURDIR)/cy_flash_pal/include) +INCLUDE_DIRS_APP += $(addprefix -I, $(CURDIR)/cy_flash_pal/include/flash_map_backend) +INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH)) +INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH)/config) +INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH)/os) + +ASM_FILES_APP := +ASM_FILES_APP += $(ASM_FILES_STARTUP) + +# Output folder +OUT := $(APP_NAME)/out +# Output folder to contain build artifacts +OUT_TARGET := $(OUT)/$(PLATFORM) + +OUT_CFG := $(OUT_TARGET)/$(BUILDCFG) + +# Overwite path to linker script if custom is required +ifeq ($(COMPILER), GCC_ARM) +LINKER_SCRIPT := $(subst /cygdrive/c,c:,$(CUR_APP_PATH)/$(APP_NAME).ld) +else +$(error Only GCC ARM is supported at this moment) +endif \ No newline at end of file diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/MCUBootApp_CM0P_Debug.launch b/bootloader/mcuboot/boot/cypress/MCUBootApp/MCUBootApp_CM0P_Debug.launch new file mode 100644 index 0000000..c23487b --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/MCUBootApp_CM0P_Debug.launch @@ -0,0 +1,62 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/README.md b/bootloader/mcuboot/boot/cypress/MCUBootApp/README.md new file mode 100644 index 0000000..798d72d --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/README.md @@ -0,0 +1,221 @@ +### Port of MCUboot library to be used with Cypress targets + +**Solution Description** + +Given solution demonstrates operation of MCUboot on Cypress' PSoC6 device. + +There are two applications implemented: +* MCUBootApp - PSoC6 MCUboot-based bootloading application; +* BlinkyApp - simple PSoC6 blinking LED application which is a target of BOOT/UPGRADE; + +Cypress boards, that can be used with this evaluation example: +- CY8CPROTO-062-4343W - PSoC 6 2M on board +- CY8CKIT-062-WIFI-BT - PSoC 6 1M on board +- CY8CPROTO-062S3-4343W - PSoC 6 512K on board +The default flash map implemented is the following: + +Single-image mode. + +`[0x10000000, 0x10018000]` - MCUBootApp (bootloader) area; + +`[0x10018000, 0x10028000]` - primary slot for BlinkyApp; + +`[0x10028000, 0x10038000]` - secondary slot for BlinkyApp; + +`[0x10038000, 0x10039000]` - scratch area (not used); + +Size of slots `0x10000` - 64kb + +MCUBootApp checks image integrity with SHA256, image authenticity with EC256 digital signature verification and uses completely SW implementation of cryptographic functions based on Mbed TLS Library. + +**Important**: make sure primary, secondary slot and bootloader app sizes are appropriate and correspond to flash area size defined in Applications' linker files. + +**Important**: make sure RAM areas of CM0p-based MCUBootApp bootloader and CM4-based BlinkyApp do not overlap. +Memory (stack) corruption of CM0p application can cause failure if SystemCall-served operations invoked from CM4. + +### Hardware cryptography acceleration + +Cypress PSOC6 MCU family supports hardware acceleration of cryptography based on Mbed TLS Library via shim layer. Implementation of this layer is supplied as separate submodule `cy-mbedtls-acceleration`. HW acceleration of cryptography shortens boot time more then 4 times, comparing to software implementation (observation results). + +To enable hardware acceleration in `MCUBootApp` pass flag `USE_CRYPTO_HW=1` to `make` while build. + +Hardware acceleration of cryptography is enabled for PSOC6 devices by default. + +### How to modify memory map + +__Option 1.__ + +Navigate to `sysflash.h` and modify the flash area(s) / slots sizes to meet your needs. + +__Option 2.__ + +Navigate to `sysflash.h`, uncomment `CY_FLASH_MAP_EXT_DESC` definition. +Now define and initialize `struct flash_area *boot_area_descs[]` with flash memory addresses and sizes you need at the beginning of application, so flash APIs from `cy_flash_map.c` will use it. + +__Note:__ for both options make sure you have updated `MCUBOOT_MAX_IMG_SECTORS` appropriatery with sector size assumed to be 512. + +**How to override the flash map values during build process:** + +Navigate to MCUBootApp.mk, find section `DEFINES_APP +=` +Update this line and or add similar for flash map parameters to override. + +The possible list could be: + +* MCUBOOT_MAX_IMG_SECTORS +* CY_FLASH_MAP_EXT_DESC +* CY_BOOT_SCRATCH_SIZE +* CY_BOOT_BOOTLOADER_SIZE +* CY_BOOT_PRIMARY_1_SIZE +* CY_BOOT_SECONDARY_1_SIZE +* CY_BOOT_PRIMARY_2_SIZE +* CY_BOOT_SECONDARY_2_SIZE + +As an example in a makefile it should look like following: + +`DEFINES_APP +=-DCY_FLASH_MAP_EXT_DESC` + +`DEFINES_APP +=-DMCUBOOT_MAX_IMG_SECTORS=512` + +`DEFINES_APP +=-DCY_BOOT_PRIMARY_1_SIZE=0x15000` + +**Multi-Image Operation** + +Multi-image operation considers upgrading and verification of more then one image on the device. + +To enable multi-image operation define `MCUBOOT_IMAGE_NUMBER` in `MCUBootApp/config/mcuboot_config.h` file should be set to 2 (only dual-image is supported at the moment). This could also be done on build time by passing `MCUBOOT_IMAGE_NUMBER=2` as parameter to `make`. + +Default value of `MCUBOOT_IMAGE_NUMBER` is 1, which corresponds to single image configuratios. + +In multi-image operation (two images are considered for simplicity) MCUboot Bootloader application operates as following: + +* Verifies Primary_1 and Primary_2 images; +* Verifies Secondary_1 and Secondary_2 images; +* Upgrades Secondary to Primary if valid images found; +* Boots image from Primary_1 slot only; +* Boots Primary_1 only if both - Primary_1 and Primary_2 are present and valid; + +This ensures two dependent applications can be accepted by device only in case both images are valid. + +**Default Flash map for Multi-Image operation:** + +`0x10000000 - 0x10018000` - MCUboot Bootloader + +`0x10018000 - 0x10028000` - Primary_1 (BOOT) slot of Bootloader + +`0x10028000 - 0x10038000` - Secondary_1 (UPGRADE) slot of Bootloader + +`0x10038000 - 0x10048000` - Primary_2 (BOOT) slot of Bootloader + +`0x10048000 - 0x10058000` - Secondary_2 (UPGRADE) slot of Bootloader + +`0x10058000 - 0x10059000` - Scratch of Bootloader + +Size of slots `0x10000` - 64kb + +__Note:__ It is also possible to place secondary (upgrade) slots in external memory module so resulting image size can be doubled. +For more details about External Memory usage, please refer to separate guiding document `ExternalMemory.md`. + +### Hardware limitations + +Since this application is created to demonstrate MCUboot library features and not as reference examples some considerations are taken. + +1. `SCB5` used to configure serial port for debug prints. This is the most commonly used Serial Communication Block number among available Cypress PSoC 6 kits. If you try to use custom hardware with this application - change definition of `CYBSP_UART_HW` in `main.c` of MCUBootApp to SCB* that correspond to your design. + +2. `CY_SMIF_SLAVE_SELECT_0` is used as definition SMIF driver API. This configuration is used on evaluation kit for this example CY8CPROTO-062-4343W, CY8PROTO-062S3-4343W, CY8CKIT-062-4343W. If you try to use custom hardware with this application - change value of `smif_id` in `main.c` of MCUBootApp to value that corresponds to your design. + + +### Downloading solution's assets + +There is a set assets required: + +* MCUBooot Library (root repository) +* PSoC6 HAL Library +* PSoC6 Peripheral Drivers Library (PDL) +* Mbed TLS Cryptographic Library + +To get submodules - run the following command: + + git submodule update --init --recursive + +### Building solution + +This folder contains make files infrastructure for building MCUBoot Bootloader. Same approach used in sample BlinkyLedApp application. Example command are provided below for couple different build configurations. + +* Build MCUBootApp in `Debug` for signle image use case. + + make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug MCUBOOT_IMAGE_NUMBER=1 + +* Build MCUBootApp in `Release` for multi image use case. + + make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Release MCUBOOT_IMAGE_NUMBER=2 + +* To Build MCUBootApp with external memory support - pass `USE_EXTERNAL_FLASH=1` flag to `make` command in examples above. In this case UPGRADE image will be located in external memory. Refer to ExternalMemory.md for additional details. + +Root directory for build is **boot/cypress.** + +**Encrypted Image Support** + +To protect user image from unwanted read - Upgrade Image Encryption can be applied. The ECDH/HKDF with EC256 scheme is used in a given solution as well as Mbed TLS as a crypto provider. + +To enable image encryption support use `ENC_IMG=1` build flag (BlinkyApp should also be built with this flash set 1). + +User is also responsible for providing corresponding binary key data in `enc_priv_key[]` (file `\MCUBootApp\keys.c`). The public part will be used by imgtool when signing and encrypting upgrade image. Signing image with encryption is described in `\BlinkyApp\Readme.md`. + +After MCUBootApp is built with these settings unencrypted and encrypted images will be accepted in secondary (upgrade) slot. + +Example command: + + make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug MCUBOOT_IMAGE_NUMBER=1 ENC_IMG=1 + +**Programming solution** + +There are couple ways of programming hex of MCUBootApp and BlinkyApp. Following instructions assume one of Cypress development kits, for example `CY8CPROTO_062_4343W`. + +1. Direct usage of OpenOCD. +OpenOCD package is supplied with ModuToolbox IDE and can be found in installation folder under `./tools_2.1/openocd`. +Open terminal application - and execute following command after substitution `PATH_TO_APPLICATION.hex` and `OPENOCD` paths. + +Connect a board to your computer. Switch Kitprog3 to DAP-BULK mode by pressing `SW3 MODE` button until `LED2 STATUS` constantly shines. + + export OPENOCD=/Applications/ModusToolbox/tools_2.1/openocd + + ${OPENOCD}/bin/openocd -s ${OPENOCD}/scripts \ + -f ${OPENOCD}/scripts/interface/kitprog3.cfg \ + -f ${OPENOCD}/scripts/target/psoc6_2m.cfg \ + -c "init; reset init; program PATH_TO_APPLICATION.hex" \ + -c "resume; reset; exit" + +2. Using GUI tool `Cypress Programmer` - follow [link](https://www.cypress.com/products/psoc-programming-solutions) to download. + Connect board to your computer. Switch Kitprog3 to DAP-BULK mode by pressing `SW3 MODE` button until `LED2 STATUS` constantly shines. Open `Cypress Programmer` and click `Connect`, then choose hex file: `MCUBootApp.hex` or `BlinkyApp.hex` and click `Program`. Check log to ensure programming success. Reset board. + +3. Using `DAPLINK`. + Connect board to your computer. Switch embeded Kitprog3 to `DAPLINK` mode by pressing `SW3 MODE` button until `LED2 STATUS` blinks fast and mass storage device appeared in OS. Drag and drop `hex` files you wish to program to `DAPLINK` drive in your OS. + + + +**Currently supported platforms:** + +* PSOC_062_2M +* PSOC_062_1M +* PSOC_062_512K + +**Build environment troubleshooting:** + +Regular shell/terminal combination on Linux and MacOS. + +On Windows: + +* Cygwin +* Msys2 + +Also IDE may be used: +* Eclipse / ModusToolbox ("makefile project from existing source") + +*Make* - make sure it is added to system's `PATH` variable and correct path is first in the list; + +*Python/Python3* - make sure you have correct path referenced in `PATH`; + +*Msys2* - to use systems PATH navigate to msys2 folder, open `msys2_shell.cmd`, uncomment set `MSYS2_PATH_TYPE=inherit`, restart MSYS2 shell. + +This will iherit system's PATH so should find `python3.7` installed in regular way as well as imgtool and its dependencies. + diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_assert.h b/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_assert.h new file mode 100644 index 0000000..5c07711 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_assert.h @@ -0,0 +1,22 @@ +/* + * mcuboot_assert.h + * + * Cypress-specific assert() macro redefinition + * + */ + +#ifndef MCUBOOT_ASSERT_H +#define MCUBOOT_ASSERT_H + +//#include "cy_bootloader_services.h" + +#define CYBL_ASSERT(...) Cy_BLServ_Assert(__VA_ARGS__) + +#if !defined(NDEBUG) +#undef assert +#define assert(...) CYBL_ASSERT(__VA_ARGS__) +#else +#define assert +#endif + +#endif /* MCUBOOT_ASSERT_H */ diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h b/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h new file mode 100644 index 0000000..7f8472b --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h @@ -0,0 +1,166 @@ +/* Copyright 2019 Cypress Semiconductor Corporation + * + * Copyright (c) 2018 Open Source Foundries Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef MCUBOOT_CONFIG_H +#define MCUBOOT_CONFIG_H + +/* + * Template configuration file for MCUboot. + * + * When porting MCUboot to a new target, copy it somewhere that your + * include path can find it as mcuboot_config/mcuboot_config.h, and + * make adjustments to suit your platform. + * + * For examples, see: + * + * boot/zephyr/include/mcuboot_config/mcuboot_config.h + * boot/mynewt/mcuboot_config/include/mcuboot_config/mcuboot_config.h + */ +/* Default maximum number of flash sectors per image slot; change + * as desirable. */ +#ifndef MCUBOOT_MAX_IMG_SECTORS +#define MCUBOOT_MAX_IMG_SECTORS 2560 +#endif + +/* + * Signature types + * + * You must choose exactly one signature type. + */ + +/* Uncomment for RSA signature support */ +//#define MCUBOOT_SIGN_RSA + +/* Uncomment for ECDSA signatures using curve P-256. */ +#define MCUBOOT_SIGN_EC256 + +/* + * Upgrade mode + * + * The default is to support A/B image swapping with rollback. A + * simpler code path, which only supports overwriting the + * existing image with the update image, is also available. + */ + +/* Uncomment to enable the overwrite-only code path. */ +#define MCUBOOT_OVERWRITE_ONLY + +#ifdef MCUBOOT_OVERWRITE_ONLY +/* Uncomment to only erase and overwrite those slot 0 sectors needed + * to install the new image, rather than the entire image slot. */ +/* #define MCUBOOT_OVERWRITE_ONLY_FAST */ +#endif + +/* + * Cryptographic settings + * + * You must choose between mbedTLS and Tinycrypt as source of + * cryptographic primitives. Other cryptographic settings are also + * available. + */ + +/* Uncomment to use ARM's mbedTLS cryptographic primitives */ +#define MCUBOOT_USE_MBED_TLS +/* Uncomment to use Tinycrypt's. */ +/* #define MCUBOOT_USE_TINYCRYPT */ + +/* + * Always check the signature of the image in slot 0 before booting, + * even if no upgrade was performed. This is recommended if the boot + * time penalty is acceptable. + */ +#define MCUBOOT_VALIDATE_PRIMARY_SLOT + +/* + * Flash abstraction + */ + +/* Uncomment if your flash map API supports flash_area_get_sectors(). + * See the flash APIs for more details. */ +// TODO: FWSECURITY-755 +#define MCUBOOT_USE_FLASH_AREA_GET_SECTORS + +/* Default number of separately updateable images; change in case of + * multiple images. */ +#ifndef MCUBOOT_IMAGE_NUMBER +#define MCUBOOT_IMAGE_NUMBER 1 +#endif + +/* + * Currently there is no configuration option, for this platform, + * that enables the system specific mcumgr commands in mcuboot + */ +#define MCUBOOT_PERUSER_MGMT_GROUP_ENABLED 0 + +/* + * Logging + */ + +/* + * If logging is enabled the following functions must be defined by the + * platform: + * + * MCUBOOT_LOG_ERR(...) + * MCUBOOT_LOG_WRN(...) + * MCUBOOT_LOG_INF(...) + * MCUBOOT_LOG_DBG(...) + * + * The following global logging level configuration macros must also be + * defined, each with a unique value. Those will be used to define a global + * configuration and will allow any source files to override the global + * configuration: + * + * MCUBOOT_LOG_LEVEL_OFF + * MCUBOOT_LOG_LEVEL_ERROR + * MCUBOOT_LOG_LEVEL_WARNING + * MCUBOOT_LOG_LEVEL_INFO + * MCUBOOT_LOG_LEVEL_DEBUG + * + * The global logging level must be defined, with one of the previously defined + * logging levels: + * + * #define MCUBOOT_LOG_LEVEL MCUBOOT_LOG_LEVEL_(OFF|ERROR|WARNING|INFO|DEBUG) + * + * MCUBOOT_LOG_LEVEL sets the minimum level that will be logged. The function + * priority is: + * + * MCUBOOT_LOG_ERR > MCUBOOT_LOG_WRN > MCUBOOT_LOG_INF > MCUBOOT_LOG_DBG + * + * NOTE: Each source file is still able to request its own logging level by + * defining BOOT_LOG_LEVEL before #including `bootutil_log.h` + */ +#define MCUBOOT_HAVE_LOGGING 1 +/* Define this to support native mcuboot logging system */ +#define CONFIG_MCUBOOT 1 +/* + * Assertions + */ + +/* Uncomment if your platform has its own mcuboot_config/mcuboot_assert.h. + * If so, it must provide an ASSERT macro for use by bootutil. Otherwise, + * "assert" is used. */ +//#define MCUBOOT_HAVE_ASSERT_H + +#define MCUBOOT_WATCHDOG_FEED() \ + do { \ + /* TODO: to be implemented */ \ + } while (0) + +/* Uncomment these if support of encrypted upgrade image is needed */ +#ifdef ENC_IMG +#define MCUBOOT_ENC_IMAGES +#define MCUBOOT_ENCRYPT_EC256 +#define NUM_ECC_BYTES (256 / 8) +#endif /* ENC_IMG */ + +/* + * No direct idle call implemented + */ +#define MCUBOOT_CPU_IDLE() \ + do { \ + } while (0) + +#endif /* MCUBOOT_CONFIG_H */ diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_logging.h b/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_logging.h new file mode 100644 index 0000000..0d6f787 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_logging.h @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2018 Nordic Semiconductor ASA + * Copyright (c) 2015 Runtime Inc + * Copyright (c) 2020 Cypress Semiconductor Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + /* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + /*******************************************************************************/ + +#ifndef MCUBOOT_LOGGING_H +#define MCUBOOT_LOGGING_H + +#include + +#define MCUBOOT_LOG_LEVEL_OFF 0 +#define MCUBOOT_LOG_LEVEL_ERROR 1 +#define MCUBOOT_LOG_LEVEL_WARNING 2 +#define MCUBOOT_LOG_LEVEL_INFO 3 +#define MCUBOOT_LOG_LEVEL_DEBUG 4 + +/* + * The compiled log level determines the maximum level that can be + * printed. Messages at or below this level can be printed, provided + * they are also enabled through the Rust logging system, such as by + * setting RUST_LOG to bootsim::api=info. + */ +#ifndef MCUBOOT_LOG_LEVEL +#define MCUBOOT_LOG_LEVEL MCUBOOT_LOG_LEVEL_INFO +#endif + +int sim_log_enabled(int level); + +#define sim_log_enabled(x) 1 + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_ERROR +#define MCUBOOT_LOG_ERR(_fmt, ...) \ + do { \ + if (sim_log_enabled(MCUBOOT_LOG_LEVEL_ERROR)) { \ + fprintf(stderr, "[ERR] " _fmt "\n\r", ##__VA_ARGS__); \ + } \ + } while (0) +#else +#define MCUBOOT_LOG_ERR(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_WARNING +#define MCUBOOT_LOG_WRN(_fmt, ...) \ + do { \ + if (sim_log_enabled(MCUBOOT_LOG_LEVEL_WARNING)) { \ + fprintf(stderr, "[WRN] " _fmt "\n\r", ##__VA_ARGS__); \ + } \ + } while (0) +#else +#define MCUBOOT_LOG_WRN(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_INFO +#define MCUBOOT_LOG_INF(_fmt, ...) \ + do { \ + if (sim_log_enabled(MCUBOOT_LOG_LEVEL_INFO)) { \ + fprintf(stderr, "[INF] " _fmt "\n\r", ##__VA_ARGS__); \ + } \ + } while (0) +#else +#define MCUBOOT_LOG_INF(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_DEBUG +#define MCUBOOT_LOG_DBG(_fmt, ...) \ + do { \ + if (sim_log_enabled(MCUBOOT_LOG_LEVEL_DEBUG)) { \ + fprintf(stderr, "[DBG] " _fmt "\n\r", ##__VA_ARGS__); \ + } \ + } while (0) +#else +#define MCUBOOT_LOG_DBG(...) IGNORE(__VA_ARGS__) +#endif + +#define MCUBOOT_LOG_MODULE_DECLARE(...) + +#endif /* MCUBOOT_LOGGING_H */ diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_crypto_acc_config.h b/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_crypto_acc_config.h new file mode 100644 index 0000000..b172740 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_crypto_acc_config.h @@ -0,0 +1,54 @@ +/* + * mbed Microcontroller Library + * Copyright (c) 2019 Cypress Semiconductor Corporation + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/** + * \file mcuboot_crypto_acc_config.h + * \version 1.1 + */ + +#ifndef MCUBOOT_MBEDTLS_DEVICE_H +#define MCUBOOT_MBEDTLS_DEVICE_H + +/* Currently this target supports SHA1 */ +// #define MBEDTLS_SHA1_C + +#define MBEDTLS_SHA1_ALT +#define MBEDTLS_SHA256_ALT +#define MBEDTLS_SHA512_ALT + +/* Currently this target supports CBC, CFB, OFB, CTR and XTS cipher modes */ +#define MBEDTLS_AES_ALT +// #define MBEDTLS_CIPHER_MODE_CBC +// #define MBEDTLS_CIPHER_MODE_CFB +// #define MBEDTLS_CIPHER_MODE_OFB +#ifdef MCUBOOT_ENC_IMAGES +#define MBEDTLS_CIPHER_MODE_CTR +#endif +// #define MBEDTLS_CIPHER_MODE_XTS + +/* Only NIST-P curves are currently supported */ +#define MBEDTLS_ECP_ALT +// #define MBEDTLS_ECP_DP_SECP192R1_ENABLED +// #define MBEDTLS_ECP_DP_SECP224R1_ENABLED +// #define MBEDTLS_ECP_DP_SECP256R1_ENABLED +// #define MBEDTLS_ECP_DP_SECP384R1_ENABLED +// #define MBEDTLS_ECP_DP_SECP521R1_ENABLED + +#define MBEDTLS_ECDSA_SIGN_ALT +#define MBEDTLS_ECDSA_VERIFY_ALT + +#endif /* MCUBOOT_MBEDTLS_DEVICE_H */ diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_crypto_config.h b/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_crypto_config.h new file mode 100644 index 0000000..e699800 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/config/mcuboot_crypto_config.h @@ -0,0 +1,3604 @@ +/** + * \file config.h + * + * \brief Configuration options (set of defines) + * + * This set of compile-time options may be used to enable + * or disable features selectively, and reduce the global + * memory footprint. + */ +/* + * Copyright (C) 2006-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#ifndef MBEDTLS_CONFIG_H +#define MBEDTLS_CONFIG_H + +#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE) +#define _CRT_SECURE_NO_DEPRECATE 1 +#endif + +/** + * \name SECTION: System support + * + * This section sets system specific settings. + * \{ + */ + +/** + * \def MBEDTLS_HAVE_ASM + * + * The compiler has support for asm(). + * + * Requires support for asm() in compiler. + * + * Used in: + * library/aria.c + * library/timing.c + * include/mbedtls/bn_mul.h + * + * Required by: + * MBEDTLS_AESNI_C + * MBEDTLS_PADLOCK_C + * + * Comment to disable the use of assembly code. + */ +#define MBEDTLS_HAVE_ASM + +/** + * \def MBEDTLS_NO_UDBL_DIVISION + * + * The platform lacks support for double-width integer division (64-bit + * division on a 32-bit platform, 128-bit division on a 64-bit platform). + * + * Used in: + * include/mbedtls/bignum.h + * library/bignum.c + * + * The bignum code uses double-width division to speed up some operations. + * Double-width division is often implemented in software that needs to + * be linked with the program. The presence of a double-width integer + * type is usually detected automatically through preprocessor macros, + * but the automatic detection cannot know whether the code needs to + * and can be linked with an implementation of division for that type. + * By default division is assumed to be usable if the type is present. + * Uncomment this option to prevent the use of double-width division. + * + * Note that division for the native integer type is always required. + * Furthermore, a 64-bit type is always required even on a 32-bit + * platform, but it need not support multiplication or division. In some + * cases it is also desirable to disable some double-width operations. For + * example, if double-width division is implemented in software, disabling + * it can reduce code size in some embedded targets. + */ +//#define MBEDTLS_NO_UDBL_DIVISION + +/** + * \def MBEDTLS_NO_64BIT_MULTIPLICATION + * + * The platform lacks support for 32x32 -> 64-bit multiplication. + * + * Used in: + * library/poly1305.c + * + * Some parts of the library may use multiplication of two unsigned 32-bit + * operands with a 64-bit result in order to speed up computations. On some + * platforms, this is not available in hardware and has to be implemented in + * software, usually in a library provided by the toolchain. + * + * Sometimes it is not desirable to have to link to that library. This option + * removes the dependency of that library on platforms that lack a hardware + * 64-bit multiplier by embedding a software implementation in Mbed TLS. + * + * Note that depending on the compiler, this may decrease performance compared + * to using the library function provided by the toolchain. + */ +//#define MBEDTLS_NO_64BIT_MULTIPLICATION + +/** + * \def MBEDTLS_HAVE_SSE2 + * + * CPU supports SSE2 instruction set. + * + * Uncomment if the CPU supports SSE2 (IA-32 specific). + */ +//#define MBEDTLS_HAVE_SSE2 + +/** + * \def MBEDTLS_HAVE_TIME + * + * System has time.h and time(). + * The time does not need to be correct, only time differences are used, + * by contrast with MBEDTLS_HAVE_TIME_DATE + * + * Defining MBEDTLS_HAVE_TIME allows you to specify MBEDTLS_PLATFORM_TIME_ALT, + * MBEDTLS_PLATFORM_TIME_MACRO, MBEDTLS_PLATFORM_TIME_TYPE_MACRO and + * MBEDTLS_PLATFORM_STD_TIME. + * + * Comment if your system does not support time functions + */ +#define MBEDTLS_HAVE_TIME + +/** + * \def MBEDTLS_HAVE_TIME_DATE + * + * System has time.h, time(), and an implementation for + * mbedtls_platform_gmtime_r() (see below). + * The time needs to be correct (not necessarily very accurate, but at least + * the date should be correct). This is used to verify the validity period of + * X.509 certificates. + * + * Comment if your system does not have a correct clock. + * + * \note mbedtls_platform_gmtime_r() is an abstraction in platform_util.h that + * behaves similarly to the gmtime_r() function from the C standard. Refer to + * the documentation for mbedtls_platform_gmtime_r() for more information. + * + * \note It is possible to configure an implementation for + * mbedtls_platform_gmtime_r() at compile-time by using the macro + * MBEDTLS_PLATFORM_GMTIME_R_ALT. + */ +#define MBEDTLS_HAVE_TIME_DATE + +/** + * \def MBEDTLS_PLATFORM_MEMORY + * + * Enable the memory allocation layer. + * + * By default mbed TLS uses the system-provided calloc() and free(). + * This allows different allocators (self-implemented or provided) to be + * provided to the platform abstraction layer. + * + * Enabling MBEDTLS_PLATFORM_MEMORY without the + * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide + * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and + * free() function pointer at runtime. + * + * Enabling MBEDTLS_PLATFORM_MEMORY and specifying + * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the + * alternate function at compile time. + * + * Requires: MBEDTLS_PLATFORM_C + * + * Enable this layer to allow use of alternative memory allocators. + */ +//#define MBEDTLS_PLATFORM_MEMORY + +/** + * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + * + * Do not assign standard functions in the platform layer (e.g. calloc() to + * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF) + * + * This makes sure there are no linking errors on platforms that do not support + * these functions. You will HAVE to provide alternatives, either at runtime + * via the platform_set_xxx() functions or at compile time by setting + * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a + * MBEDTLS_PLATFORM_XXX_MACRO. + * + * Requires: MBEDTLS_PLATFORM_C + * + * Uncomment to prevent default assignment of standard functions in the + * platform layer. + */ +//#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +/** + * \def MBEDTLS_PLATFORM_EXIT_ALT + * + * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the + * function in the platform abstraction layer. + * + * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will + * provide a function "mbedtls_platform_set_printf()" that allows you to set an + * alternative printf function pointer. + * + * All these define require MBEDTLS_PLATFORM_C to be defined! + * + * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows; + * it will be enabled automatically by check_config.h + * + * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as + * MBEDTLS_PLATFORM_XXX_MACRO! + * + * Requires: MBEDTLS_PLATFORM_TIME_ALT requires MBEDTLS_HAVE_TIME + * + * Uncomment a macro to enable alternate implementation of specific base + * platform function + */ +//#define MBEDTLS_PLATFORM_EXIT_ALT +//#define MBEDTLS_PLATFORM_TIME_ALT +//#define MBEDTLS_PLATFORM_FPRINTF_ALT +//#define MBEDTLS_PLATFORM_PRINTF_ALT +//#define MBEDTLS_PLATFORM_SNPRINTF_ALT +//#define MBEDTLS_PLATFORM_VSNPRINTF_ALT +//#define MBEDTLS_PLATFORM_NV_SEED_ALT +//#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT + +/** + * \def MBEDTLS_DEPRECATED_WARNING + * + * Mark deprecated functions so that they generate a warning if used. + * Functions deprecated in one version will usually be removed in the next + * version. You can enable this to help you prepare the transition to a new + * major version by making sure your code is not using these functions. + * + * This only works with GCC and Clang. With other compilers, you may want to + * use MBEDTLS_DEPRECATED_REMOVED + * + * Uncomment to get warnings on using deprecated functions. + */ +//#define MBEDTLS_DEPRECATED_WARNING + +/** + * \def MBEDTLS_DEPRECATED_REMOVED + * + * Remove deprecated functions so that they generate an error if used. + * Functions deprecated in one version will usually be removed in the next + * version. You can enable this to help you prepare the transition to a new + * major version by making sure your code is not using these functions. + * + * Uncomment to get errors on using deprecated functions. + */ +//#define MBEDTLS_DEPRECATED_REMOVED + +/** + * \def MBEDTLS_CHECK_PARAMS + * + * This configuration option controls whether the library validates more of + * the parameters passed to it. + * + * When this flag is not defined, the library only attempts to validate an + * input parameter if: (1) they may come from the outside world (such as the + * network, the filesystem, etc.) or (2) not validating them could result in + * internal memory errors such as overflowing a buffer controlled by the + * library. On the other hand, it doesn't attempt to validate parameters whose + * values are fully controlled by the application (such as pointers). + * + * When this flag is defined, the library additionally attempts to validate + * parameters that are fully controlled by the application, and should always + * be valid if the application code is fully correct and trusted. + * + * For example, when a function accepts as input a pointer to a buffer that may + * contain untrusted data, and its documentation mentions that this pointer + * must not be NULL: + * - The pointer is checked to be non-NULL only if this option is enabled. + * - The content of the buffer is always validated. + * + * When this flag is defined, if a library function receives a parameter that + * is invalid: + * 1. The function will invoke the macro MBEDTLS_PARAM_FAILED(). + * 2. If MBEDTLS_PARAM_FAILED() did not terminate the program, the function + * will immediately return. If the function returns an Mbed TLS error code, + * the error code in this case is MBEDTLS_ERR_xxx_BAD_INPUT_DATA. + * + * When defining this flag, you also need to arrange a definition for + * MBEDTLS_PARAM_FAILED(). You can do this by any of the following methods: + * - By default, the library defines MBEDTLS_PARAM_FAILED() to call a + * function mbedtls_param_failed(), but the library does not define this + * function. If you do not make any other arrangements, you must provide + * the function mbedtls_param_failed() in your application. + * See `platform_util.h` for its prototype. + * - If you enable the macro #MBEDTLS_CHECK_PARAMS_ASSERT, then the + * library defines MBEDTLS_PARAM_FAILED(\c cond) to be `assert(cond)`. + * You can still supply an alternative definition of + * MBEDTLS_PARAM_FAILED(), which may call `assert`. + * - If you define a macro MBEDTLS_PARAM_FAILED() before including `config.h` + * or you uncomment the definition of MBEDTLS_PARAM_FAILED() in `config.h`, + * the library will call the macro that you defined and will not supply + * its own version. Note that if MBEDTLS_PARAM_FAILED() calls `assert`, + * you need to enable #MBEDTLS_CHECK_PARAMS_ASSERT so that library source + * files include ``. + * + * Uncomment to enable validation of application-controlled parameters. + */ +//#define MBEDTLS_CHECK_PARAMS + +/** + * \def MBEDTLS_CHECK_PARAMS_ASSERT + * + * Allow MBEDTLS_PARAM_FAILED() to call `assert`, and make it default to + * `assert`. This macro is only used if #MBEDTLS_CHECK_PARAMS is defined. + * + * If this macro is not defined, then MBEDTLS_PARAM_FAILED() defaults to + * calling a function mbedtls_param_failed(). See the documentation of + * #MBEDTLS_CHECK_PARAMS for details. + * + * Uncomment to allow MBEDTLS_PARAM_FAILED() to call `assert`. + */ +//#define MBEDTLS_CHECK_PARAMS_ASSERT + +/* \} name SECTION: System support */ + +/** + * \name SECTION: mbed TLS feature support + * + * This section sets support for features that are or are not needed + * within the modules that are enabled. + * \{ + */ + +/** + * \def MBEDTLS_TIMING_ALT + * + * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(), + * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay() + * + * Only works if you have MBEDTLS_TIMING_C enabled. + * + * You will need to provide a header "timing_alt.h" and an implementation at + * compile time. + */ +//#define MBEDTLS_TIMING_ALT + +/** + * \def MBEDTLS_AES_ALT + * + * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your + * alternate core implementation of a symmetric crypto, an arithmetic or hash + * module (e.g. platform specific assembly optimized implementations). Keep + * in mind that the function prototypes should remain the same. + * + * This replaces the whole module. If you only want to replace one of the + * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags. + * + * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer + * provide the "struct mbedtls_aes_context" definition and omit the base + * function declarations and implementations. "aes_alt.h" will be included from + * "aes.h" to include the new function definitions. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * module. + * + * \warning MD2, MD4, MD5, ARC4, DES and SHA-1 are considered weak and their + * use constitutes a security risk. If possible, we recommend + * avoiding dependencies on them, and considering stronger message + * digests and ciphers instead. + * + */ +//#define MBEDTLS_AES_ALT +//#define MBEDTLS_ARC4_ALT +//#define MBEDTLS_ARIA_ALT +//#define MBEDTLS_BLOWFISH_ALT +//#define MBEDTLS_CAMELLIA_ALT +//#define MBEDTLS_CCM_ALT +//#define MBEDTLS_CHACHA20_ALT +//#define MBEDTLS_CHACHAPOLY_ALT +//#define MBEDTLS_CMAC_ALT +//#define MBEDTLS_DES_ALT +//#define MBEDTLS_DHM_ALT +//#define MBEDTLS_ECJPAKE_ALT +//#define MBEDTLS_GCM_ALT +//#define MBEDTLS_NIST_KW_ALT +//#define MBEDTLS_MD2_ALT +//#define MBEDTLS_MD4_ALT +//#define MBEDTLS_MD5_ALT +//#define MBEDTLS_POLY1305_ALT +//#define MBEDTLS_RIPEMD160_ALT +//#define MBEDTLS_RSA_ALT +//#define MBEDTLS_SHA1_ALT +//#define MBEDTLS_SHA256_ALT +//#define MBEDTLS_SHA512_ALT +//#define MBEDTLS_XTEA_ALT + +/* + * When replacing the elliptic curve module, pleace consider, that it is + * implemented with two .c files: + * - ecp.c + * - ecp_curves.c + * You can replace them very much like all the other MBEDTLS__MODULE_NAME__ALT + * macros as described above. The only difference is that you have to make sure + * that you provide functionality for both .c files. + */ +//#define MBEDTLS_ECP_ALT + +/** + * \def MBEDTLS_MD2_PROCESS_ALT + * + * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you + * alternate core implementation of symmetric crypto or hash function. Keep in + * mind that function prototypes should remain the same. + * + * This replaces only one function. The header file from mbed TLS is still + * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags. + * + * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will + * no longer provide the mbedtls_sha1_process() function, but it will still provide + * the other function (using your mbedtls_sha1_process() function) and the definition + * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible + * with this definition. + * + * \note Because of a signature change, the core AES encryption and decryption routines are + * currently named mbedtls_aes_internal_encrypt and mbedtls_aes_internal_decrypt, + * respectively. When setting up alternative implementations, these functions should + * be overridden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt + * must stay untouched. + * + * \note If you use the AES_xxx_ALT macros, then is is recommended to also set + * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES + * tables. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * function. + * + * \warning MD2, MD4, MD5, DES and SHA-1 are considered weak and their use + * constitutes a security risk. If possible, we recommend avoiding + * dependencies on them, and considering stronger message digests + * and ciphers instead. + * + */ +//#define MBEDTLS_MD2_PROCESS_ALT +//#define MBEDTLS_MD4_PROCESS_ALT +//#define MBEDTLS_MD5_PROCESS_ALT +//#define MBEDTLS_RIPEMD160_PROCESS_ALT +//#define MBEDTLS_SHA1_PROCESS_ALT +//#define MBEDTLS_SHA256_PROCESS_ALT +//#define MBEDTLS_SHA512_PROCESS_ALT +//#define MBEDTLS_DES_SETKEY_ALT +//#define MBEDTLS_DES_CRYPT_ECB_ALT +//#define MBEDTLS_DES3_CRYPT_ECB_ALT +//#define MBEDTLS_AES_SETKEY_ENC_ALT +//#define MBEDTLS_AES_SETKEY_DEC_ALT +//#define MBEDTLS_AES_ENCRYPT_ALT +//#define MBEDTLS_AES_DECRYPT_ALT +//#define MBEDTLS_ECDH_GEN_PUBLIC_ALT +//#define MBEDTLS_ECDH_COMPUTE_SHARED_ALT +//#define MBEDTLS_ECDSA_VERIFY_ALT +//#define MBEDTLS_ECDSA_SIGN_ALT +//#define MBEDTLS_ECDSA_GENKEY_ALT + +/** + * \def MBEDTLS_ECP_INTERNAL_ALT + * + * Expose a part of the internal interface of the Elliptic Curve Point module. + * + * MBEDTLS_ECP__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use your + * alternative core implementation of elliptic curve arithmetic. Keep in mind + * that function prototypes should remain the same. + * + * This partially replaces one function. The header file from mbed TLS is still + * used, in contrast to the MBEDTLS_ECP_ALT flag. The original implementation + * is still present and it is used for group structures not supported by the + * alternative. + * + * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT + * and implementing the following functions: + * unsigned char mbedtls_internal_ecp_grp_capable( + * const mbedtls_ecp_group *grp ) + * int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp ) + * void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp ) + * The mbedtls_internal_ecp_grp_capable function should return 1 if the + * replacement functions implement arithmetic for the given group and 0 + * otherwise. + * The functions mbedtls_internal_ecp_init and mbedtls_internal_ecp_free are + * called before and after each point operation and provide an opportunity to + * implement optimized set up and tear down instructions. + * + * Example: In case you uncomment MBEDTLS_ECP_INTERNAL_ALT and + * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac + * function, but will use your mbedtls_internal_ecp_double_jac if the group is + * supported (your mbedtls_internal_ecp_grp_capable function returns 1 when + * receives it as an argument). If the group is not supported then the original + * implementation is used. The other functions and the definition of + * mbedtls_ecp_group and mbedtls_ecp_point will not change, so your + * implementation of mbedtls_internal_ecp_double_jac and + * mbedtls_internal_ecp_grp_capable must be compatible with this definition. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * function. + */ +/* Required for all the functions in this section */ +//#define MBEDTLS_ECP_INTERNAL_ALT +/* Support for Weierstrass curves with Jacobi representation */ +//#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT +//#define MBEDTLS_ECP_ADD_MIXED_ALT +//#define MBEDTLS_ECP_DOUBLE_JAC_ALT +//#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT +//#define MBEDTLS_ECP_NORMALIZE_JAC_ALT +/* Support for curves with Montgomery arithmetic */ +//#define MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT +//#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT +//#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT + +/** + * \def MBEDTLS_TEST_NULL_ENTROPY + * + * Enables testing and use of mbed TLS without any configured entropy sources. + * This permits use of the library on platforms before an entropy source has + * been integrated (see for example the MBEDTLS_ENTROPY_HARDWARE_ALT or the + * MBEDTLS_ENTROPY_NV_SEED switches). + * + * WARNING! This switch MUST be disabled in production builds, and is suitable + * only for development. + * Enabling the switch negates any security provided by the library. + * + * Requires MBEDTLS_ENTROPY_C, MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + * + */ +//#define MBEDTLS_TEST_NULL_ENTROPY + +/** + * \def MBEDTLS_ENTROPY_HARDWARE_ALT + * + * Uncomment this macro to let mbed TLS use your own implementation of a + * hardware entropy collector. + * + * Your function must be called \c mbedtls_hardware_poll(), have the same + * prototype as declared in entropy_poll.h, and accept NULL as first argument. + * + * Uncomment to use your own hardware entropy collector. + */ +//#define MBEDTLS_ENTROPY_HARDWARE_ALT + +/** + * \def MBEDTLS_AES_ROM_TABLES + * + * Use precomputed AES tables stored in ROM. + * + * Uncomment this macro to use precomputed AES tables stored in ROM. + * Comment this macro to generate AES tables in RAM at runtime. + * + * Tradeoff: Using precomputed ROM tables reduces RAM usage by ~8kb + * (or ~2kb if \c MBEDTLS_AES_FEWER_TABLES is used) and reduces the + * initialization time before the first AES operation can be performed. + * It comes at the cost of additional ~8kb ROM use (resp. ~2kb if \c + * MBEDTLS_AES_FEWER_TABLES below is used), and potentially degraded + * performance if ROM access is slower than RAM access. + * + * This option is independent of \c MBEDTLS_AES_FEWER_TABLES. + * + */ +//#define MBEDTLS_AES_ROM_TABLES + +/** + * \def MBEDTLS_AES_FEWER_TABLES + * + * Use less ROM/RAM for AES tables. + * + * Uncommenting this macro omits 75% of the AES tables from + * ROM / RAM (depending on the value of \c MBEDTLS_AES_ROM_TABLES) + * by computing their values on the fly during operations + * (the tables are entry-wise rotations of one another). + * + * Tradeoff: Uncommenting this reduces the RAM / ROM footprint + * by ~6kb but at the cost of more arithmetic operations during + * runtime. Specifically, one has to compare 4 accesses within + * different tables to 4 accesses with additional arithmetic + * operations within the same table. The performance gain/loss + * depends on the system and memory details. + * + * This option is independent of \c MBEDTLS_AES_ROM_TABLES. + * + */ +//#define MBEDTLS_AES_FEWER_TABLES + +/** + * \def MBEDTLS_CAMELLIA_SMALL_MEMORY + * + * Use less ROM for the Camellia implementation (saves about 768 bytes). + * + * Uncomment this macro to use less memory for Camellia. + */ +//#define MBEDTLS_CAMELLIA_SMALL_MEMORY + +/** + * \def MBEDTLS_CIPHER_MODE_CBC + * + * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_CBC + +/** + * \def MBEDTLS_CIPHER_MODE_CFB + * + * Enable Cipher Feedback mode (CFB) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_CFB + +/** + * \def MBEDTLS_CIPHER_MODE_CTR + * + * Enable Counter Block Cipher mode (CTR) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_CTR + +/** + * \def MBEDTLS_CIPHER_MODE_OFB + * + * Enable Output Feedback mode (OFB) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_OFB + +/** + * \def MBEDTLS_CIPHER_MODE_XTS + * + * Enable Xor-encrypt-xor with ciphertext stealing mode (XTS) for AES. + */ +#define MBEDTLS_CIPHER_MODE_XTS + +/** + * \def MBEDTLS_CIPHER_NULL_CIPHER + * + * Enable NULL cipher. + * Warning: Only do so when you know what you are doing. This allows for + * encryption or channels without any security! + * + * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable + * the following ciphersuites: + * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_RSA_WITH_NULL_SHA256 + * MBEDTLS_TLS_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_RSA_WITH_NULL_MD5 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_PSK_WITH_NULL_SHA + * + * Uncomment this macro to enable the NULL cipher and ciphersuites + */ +//#define MBEDTLS_CIPHER_NULL_CIPHER + +/** + * \def MBEDTLS_CIPHER_PADDING_PKCS7 + * + * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for + * specific padding modes in the cipher layer with cipher modes that support + * padding (e.g. CBC) + * + * If you disable all padding modes, only full blocks can be used with CBC. + * + * Enable padding modes in the cipher layer. + */ +#define MBEDTLS_CIPHER_PADDING_PKCS7 +#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS +#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN +#define MBEDTLS_CIPHER_PADDING_ZEROS + +/** + * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES + * + * Enable weak ciphersuites in SSL / TLS. + * Warning: Only do so when you know what you are doing. This allows for + * channels with virtually no security at all! + * + * This enables the following ciphersuites: + * MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA + * + * Uncomment this macro to enable weak ciphersuites + * + * \warning DES is considered a weak cipher and its use constitutes a + * security risk. We recommend considering stronger ciphers instead. + */ +//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES + +/** + * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES + * + * Remove RC4 ciphersuites by default in SSL / TLS. + * This flag removes the ciphersuites based on RC4 from the default list as + * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to + * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them + * explicitly. + * + * Uncomment this macro to remove RC4 ciphersuites by default. + */ +#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES + +/** + * \def MBEDTLS_REMOVE_3DES_CIPHERSUITES + * + * Remove 3DES ciphersuites by default in SSL / TLS. + * This flag removes the ciphersuites based on 3DES from the default list as + * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible + * to enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including + * them explicitly. + * + * A man-in-the-browser attacker can recover authentication tokens sent through + * a TLS connection using a 3DES based cipher suite (see "On the Practical + * (In-)Security of 64-bit Block Ciphers" by Karthikeyan Bhargavan and Gaëtan + * Leurent, see https://sweet32.info/SWEET32_CCS16.pdf). If this attack falls + * in your threat model or you are unsure, then you should keep this option + * enabled to remove 3DES based cipher suites. + * + * Comment this macro to keep 3DES in the default ciphersuite list. + */ +#define MBEDTLS_REMOVE_3DES_CIPHERSUITES + +/** + * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED + * + * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve + * module. By default all supported curves are enabled. + * + * Comment macros to disable the curve and functions for it + */ +// #define MBEDTLS_ECP_DP_SECP192R1_ENABLED +#define MBEDTLS_ECP_DP_SECP224R1_ENABLED +#define MBEDTLS_ECP_DP_SECP256R1_ENABLED +// #define MBEDTLS_ECP_DP_SECP384R1_ENABLED +// #define MBEDTLS_ECP_DP_SECP521R1_ENABLED +// #define MBEDTLS_ECP_DP_SECP192K1_ENABLED +// #define MBEDTLS_ECP_DP_SECP224K1_ENABLED +// #define MBEDTLS_ECP_DP_SECP256K1_ENABLED +// #define MBEDTLS_ECP_DP_BP256R1_ENABLED +// #define MBEDTLS_ECP_DP_BP384R1_ENABLED +// #define MBEDTLS_ECP_DP_BP512R1_ENABLED +// #define MBEDTLS_ECP_DP_CURVE25519_ENABLED +// #define MBEDTLS_ECP_DP_CURVE448_ENABLED + +/** + * \def MBEDTLS_ECP_NIST_OPTIM + * + * Enable specific 'modulo p' routines for each NIST prime. + * Depending on the prime and architecture, makes operations 4 to 8 times + * faster on the corresponding curve. + * + * Comment this macro to disable NIST curves optimisation. + */ +#define MBEDTLS_ECP_NIST_OPTIM + +/** + * \def MBEDTLS_ECP_RESTARTABLE + * + * Enable "non-blocking" ECC operations that can return early and be resumed. + * + * This allows various functions to pause by returning + * #MBEDTLS_ERR_ECP_IN_PROGRESS (or, for functions in the SSL module, + * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS) and then be called later again in + * order to further progress and eventually complete their operation. This is + * controlled through mbedtls_ecp_set_max_ops() which limits the maximum + * number of ECC operations a function may perform before pausing; see + * mbedtls_ecp_set_max_ops() for more information. + * + * This is useful in non-threaded environments if you want to avoid blocking + * for too long on ECC (and, hence, X.509 or SSL/TLS) operations. + * + * Uncomment this macro to enable restartable ECC computations. + * + * \note This option only works with the default software implementation of + * elliptic curve functionality. It is incompatible with + * MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT, MBEDTLS_ECDSA_XXX_ALT + * and MBEDTLS_ECDH_LEGACY_CONTEXT. + */ +//#define MBEDTLS_ECP_RESTARTABLE + +/** + * \def MBEDTLS_ECDH_LEGACY_CONTEXT + * + * Use a backward compatible ECDH context. + * + * Mbed TLS supports two formats for ECDH contexts (#mbedtls_ecdh_context + * defined in `ecdh.h`). For most applications, the choice of format makes + * no difference, since all library functions can work with either format, + * except that the new format is incompatible with MBEDTLS_ECP_RESTARTABLE. + + * The new format used when this option is disabled is smaller + * (56 bytes on a 32-bit platform). In future versions of the library, it + * will support alternative implementations of ECDH operations. + * The new format is incompatible with applications that access + * context fields directly and with restartable ECP operations. + * + * Define this macro if you enable MBEDTLS_ECP_RESTARTABLE or if you + * want to access ECDH context fields directly. Otherwise you should + * comment out this macro definition. + * + * This option has no effect if #MBEDTLS_ECDH_C is not enabled. + * + * \note This configuration option is experimental. Future versions of the + * library may modify the way the ECDH context layout is configured + * and may modify the layout of the new context type. + */ +#define MBEDTLS_ECDH_LEGACY_CONTEXT + +/** + * \def MBEDTLS_ECDSA_DETERMINISTIC + * + * Enable deterministic ECDSA (RFC 6979). + * Standard ECDSA is "fragile" in the sense that lack of entropy when signing + * may result in a compromise of the long-term signing key. This is avoided by + * the deterministic variant. + * + * Requires: MBEDTLS_HMAC_DRBG_C + * + * Comment this macro to disable deterministic ECDSA. + */ +#define MBEDTLS_ECDSA_DETERMINISTIC + +/** + * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED + * + * Enable the PSK based ciphersuite modes in SSL / TLS. + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED + * + * Enable the DHE-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_DHM_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA + * + * \warning Using DHE constitutes a security risk as it + * is not possible to validate custom DH parameters. + * If possible, it is recommended users should consider + * preferring other methods of key exchange. + * See dhm.h for more details. + * + */ +#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED + * + * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED + * + * Enable the RSA-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED + * + * Enable the RSA-only based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5 + */ +#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED + * + * Enable the DHE-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA + * + * \warning Using DHE constitutes a security risk as it + * is not possible to validate custom DH parameters. + * If possible, it is recommended users should consider + * preferring other methods of key exchange. + * See dhm.h for more details. + * + */ +#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED + * + * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED + * + * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C, + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED + * + * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + */ +#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED + * + * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 + */ +#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED + * + * Enable the ECJPAKE based ciphersuite modes in SSL / TLS. + * + * \warning This is currently experimental. EC J-PAKE support is based on the + * Thread v1.0.0 specification; incompatible changes to the specification + * might still happen. For this reason, this is disabled by default. + * + * Requires: MBEDTLS_ECJPAKE_C + * MBEDTLS_SHA256_C + * MBEDTLS_ECP_DP_SECP256R1_ENABLED + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + */ +//#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED + +/** + * \def MBEDTLS_PK_PARSE_EC_EXTENDED + * + * Enhance support for reading EC keys using variants of SEC1 not allowed by + * RFC 5915 and RFC 5480. + * + * Currently this means parsing the SpecifiedECDomain choice of EC + * parameters (only known groups are supported, not arbitrary domains, to + * avoid validation issues). + * + * Disable if you only need to support RFC 5915 + 5480 key formats. + */ +#define MBEDTLS_PK_PARSE_EC_EXTENDED + +/** + * \def MBEDTLS_ERROR_STRERROR_DUMMY + * + * Enable a dummy error function to make use of mbedtls_strerror() in + * third party libraries easier when MBEDTLS_ERROR_C is disabled + * (no effect when MBEDTLS_ERROR_C is enabled). + * + * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're + * not using mbedtls_strerror() or error_strerror() in your application. + * + * Disable if you run into name conflicts and want to really remove the + * mbedtls_strerror() + */ +// #define MBEDTLS_ERROR_STRERROR_DUMMY + +/** + * \def MBEDTLS_GENPRIME + * + * Enable the prime-number generation code. + * + * Requires: MBEDTLS_BIGNUM_C + */ +#define MBEDTLS_GENPRIME + +/** + * \def MBEDTLS_FS_IO + * + * Enable functions that use the filesystem. + */ +// #define MBEDTLS_FS_IO + +/** + * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + * + * Do not add default entropy sources. These are the platform specific, + * mbedtls_timing_hardclock and HAVEGE based poll functions. + * + * This is useful to have more control over the added entropy sources in an + * application. + * + * Uncomment this macro to prevent loading of default entropy functions. + */ +//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/** + * \def MBEDTLS_NO_PLATFORM_ENTROPY + * + * Do not use built-in platform entropy functions. + * This is useful if your platform does not support + * standards like the /dev/urandom or Windows CryptoAPI. + * + * Uncomment this macro to disable the built-in platform entropy functions. + */ +#define MBEDTLS_NO_PLATFORM_ENTROPY + +/** + * \def MBEDTLS_ENTROPY_FORCE_SHA256 + * + * Force the entropy accumulator to use a SHA-256 accumulator instead of the + * default SHA-512 based one (if both are available). + * + * Requires: MBEDTLS_SHA256_C + * + * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option + * if you have performance concerns. + * + * This option is only useful if both MBEDTLS_SHA256_C and + * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used. + */ +//#define MBEDTLS_ENTROPY_FORCE_SHA256 + +/** + * \def MBEDTLS_ENTROPY_NV_SEED + * + * Enable the non-volatile (NV) seed file-based entropy source. + * (Also enables the NV seed read/write functions in the platform layer) + * + * This is crucial (if not required) on systems that do not have a + * cryptographic entropy source (in hardware or kernel) available. + * + * Requires: MBEDTLS_ENTROPY_C, MBEDTLS_PLATFORM_C + * + * \note The read/write functions that are used by the entropy source are + * determined in the platform layer, and can be modified at runtime and/or + * compile-time depending on the flags (MBEDTLS_PLATFORM_NV_SEED_*) used. + * + * \note If you use the default implementation functions that read a seedfile + * with regular fopen(), please make sure you make a seedfile with the + * proper name (defined in MBEDTLS_PLATFORM_STD_NV_SEED_FILE) and at + * least MBEDTLS_ENTROPY_BLOCK_SIZE bytes in size that can be read from + * and written to or you will get an entropy source error! The default + * implementation will only use the first MBEDTLS_ENTROPY_BLOCK_SIZE + * bytes from the file. + * + * \note The entropy collector will write to the seed file before entropy is + * given to an external source, to update it. + */ +//#define MBEDTLS_ENTROPY_NV_SEED + +/** + * \def MBEDTLS_MEMORY_DEBUG + * + * Enable debugging of buffer allocator memory issues. Automatically prints + * (to stderr) all (fatal) messages on memory allocation issues. Enables + * function for 'debug output' of allocated memory. + * + * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C + * + * Uncomment this macro to let the buffer allocator print out error messages. + */ +//#define MBEDTLS_MEMORY_DEBUG + +/** + * \def MBEDTLS_MEMORY_BACKTRACE + * + * Include backtrace information with each allocated block. + * + * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C + * GLIBC-compatible backtrace() an backtrace_symbols() support + * + * Uncomment this macro to include backtrace information + */ +//#define MBEDTLS_MEMORY_BACKTRACE + +/** + * \def MBEDTLS_PK_RSA_ALT_SUPPORT + * + * Support external private RSA keys (eg from a HSM) in the PK layer. + * + * Comment this macro to disable support for external private RSA keys. + */ +// #define MBEDTLS_PK_RSA_ALT_SUPPORT + +/** + * \def MBEDTLS_PKCS1_V15 + * + * Enable support for PKCS#1 v1.5 encoding. + * + * Requires: MBEDTLS_RSA_C + * + * This enables support for PKCS#1 v1.5 operations. + */ +#define MBEDTLS_PKCS1_V15 + +/** + * \def MBEDTLS_PKCS1_V21 + * + * Enable support for PKCS#1 v2.1 encoding. + * + * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C + * + * This enables support for RSAES-OAEP and RSASSA-PSS operations. + */ +#define MBEDTLS_PKCS1_V21 + +/** + * \def MBEDTLS_PSA_CRYPTO_SPM + * + * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is built for SPM (Secure + * Partition Manager) integration which separates the code into two parts: a + * NSPE (Non-Secure Process Environment) and an SPE (Secure Process + * Environment). + * + * Module: library/psa_crypto.c + * Requires: MBEDTLS_PSA_CRYPTO_C + * + */ +//#define MBEDTLS_PSA_CRYPTO_SPM + +/** + * \def MBEDTLS_PSA_INJECT_ENTROPY + * + * Enable support for entropy injection at first boot. This feature is + * required on systems that do not have a built-in entropy source (TRNG). + * This feature is currently not supported on systems that have a built-in + * entropy source. + * + * Requires: MBEDTLS_PSA_CRYPTO_STORAGE_C, MBEDTLS_ENTROPY_NV_SEED + * + */ +//#define MBEDTLS_PSA_INJECT_ENTROPY + +/** + * \def MBEDTLS_RSA_NO_CRT + * + * Do not use the Chinese Remainder Theorem + * for the RSA private operation. + * + * Uncomment this macro to disable the use of CRT in RSA. + * + */ +//#define MBEDTLS_RSA_NO_CRT + +/** + * \def MBEDTLS_SELF_TEST + * + * Enable the checkup functions (*_self_test). + */ +#define MBEDTLS_SELF_TEST + +/** + * \def MBEDTLS_SHA256_SMALLER + * + * Enable an implementation of SHA-256 that has lower ROM footprint but also + * lower performance. + * + * The default implementation is meant to be a reasonnable compromise between + * performance and size. This version optimizes more aggressively for size at + * the expense of performance. Eg on Cortex-M4 it reduces the size of + * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about + * 30%. + * + * Uncomment to enable the smaller implementation of SHA256. + */ +//#define MBEDTLS_SHA256_SMALLER + +/** + * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES + * + * Enable sending of alert messages in case of encountered errors as per RFC. + * If you choose not to send the alert messages, mbed TLS can still communicate + * with other servers, only debugging of failures is harder. + * + * The advantage of not sending alert messages, is that no information is given + * about reasons for failures thus preventing adversaries of gaining intel. + * + * Enable sending of all alert messages + */ +#define MBEDTLS_SSL_ALL_ALERT_MESSAGES + +/** + * \def MBEDTLS_SSL_RECORD_CHECKING + * + * Enable the function mbedtls_ssl_check_record() which can be used to check + * the validity and authenticity of an incoming record, to verify that it has + * not been seen before. These checks are performed without modifying the + * externally visible state of the SSL context. + * + * See mbedtls_ssl_check_record() for more information. + * + * Uncomment to enable support for record checking. + */ +#define MBEDTLS_SSL_RECORD_CHECKING + +/** + * \def MBEDTLS_SSL_DTLS_CONNECTION_ID + * + * Enable support for the DTLS Connection ID extension + * (version draft-ietf-tls-dtls-connection-id-05, + * https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05) + * which allows to identify DTLS connections across changes + * in the underlying transport. + * + * Setting this option enables the SSL APIs `mbedtls_ssl_set_cid()`, + * `mbedtls_ssl_get_peer_cid()` and `mbedtls_ssl_conf_cid()`. + * See the corresponding documentation for more information. + * + * \warning The Connection ID extension is still in draft state. + * We make no stability promises for the availability + * or the shape of the API controlled by this option. + * + * The maximum lengths of outgoing and incoming CIDs can be configured + * through the options + * - MBEDTLS_SSL_CID_OUT_LEN_MAX + * - MBEDTLS_SSL_CID_IN_LEN_MAX. + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + * + * Uncomment to enable the Connection ID extension. + */ +//#define MBEDTLS_SSL_DTLS_CONNECTION_ID + +/** + * \def MBEDTLS_SSL_ASYNC_PRIVATE + * + * Enable asynchronous external private key operations in SSL. This allows + * you to configure an SSL connection to call an external cryptographic + * module to perform private key operations instead of performing the + * operation inside the library. + * + */ +//#define MBEDTLS_SSL_ASYNC_PRIVATE + +/** + * \def MBEDTLS_SSL_CONTEXT_SERIALIZATION + * + * Enable serialization of the TLS context structures, through use of the + * functions mbedtls_ssl_context_save() and mbedtls_ssl_context_load(). + * + * This pair of functions allows one side of a connection to serialize the + * context associated with the connection, then free or re-use that context + * while the serialized state is persisted elsewhere, and finally deserialize + * that state to a live context for resuming read/write operations on the + * connection. From a protocol perspective, the state of the connection is + * unaffected, in particular this is entirely transparent to the peer. + * + * Note: this is distinct from TLS session resumption, which is part of the + * protocol and fully visible by the peer. TLS session resumption enables + * establishing new connections associated to a saved session with shorter, + * lighter handshakes, while context serialization is a local optimization in + * handling a single, potentially long-lived connection. + * + * Enabling these APIs makes some SSL structures larger, as 64 extra bytes are + * saved after the handshake to allow for more efficient serialization, so if + * you don't need this feature you'll save RAM by disabling it. + * + * Comment to disable the context serialization APIs. + */ +#define MBEDTLS_SSL_CONTEXT_SERIALIZATION + +/** + * \def MBEDTLS_SSL_DEBUG_ALL + * + * Enable the debug messages in SSL module for all issues. + * Debug messages have been disabled in some places to prevent timing + * attacks due to (unbalanced) debugging function calls. + * + * If you need all error reporting you should enable this during debugging, + * but remove this for production servers that should log as well. + * + * Uncomment this macro to report all debug messages on errors introducing + * a timing side-channel. + * + */ +//#define MBEDTLS_SSL_DEBUG_ALL + +/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC + * + * Enable support for Encrypt-then-MAC, RFC 7366. + * + * This allows peers that both support it to use a more robust protection for + * ciphersuites using CBC, providing deep resistance against timing attacks + * on the padding or underlying cipher. + * + * This only affects CBC ciphersuites, and is useless if none is defined. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1 or + * MBEDTLS_SSL_PROTO_TLS1_1 or + * MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for Encrypt-then-MAC + */ +#define MBEDTLS_SSL_ENCRYPT_THEN_MAC + +/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET + * + * Enable support for Extended Master Secret, aka Session Hash + * (draft-ietf-tls-session-hash-02). + * + * This was introduced as "the proper fix" to the Triple Handshake familiy of + * attacks, but it is recommended to always use it (even if you disable + * renegotiation), since it actually fixes a more fundamental issue in the + * original SSL/TLS design, and has implications beyond Triple Handshake. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1 or + * MBEDTLS_SSL_PROTO_TLS1_1 or + * MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for Extended Master Secret. + */ +#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET + +/** + * \def MBEDTLS_SSL_FALLBACK_SCSV + * + * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00). + * + * For servers, it is recommended to always enable this, unless you support + * only one version of TLS, or know for sure that none of your clients + * implements a fallback strategy. + * + * For clients, you only need this if you're using a fallback strategy, which + * is not recommended in the first place, unless you absolutely need it to + * interoperate with buggy (version-intolerant) servers. + * + * Comment this macro to disable support for FALLBACK_SCSV + */ +#define MBEDTLS_SSL_FALLBACK_SCSV + +/** + * \def MBEDTLS_SSL_KEEP_PEER_CERTIFICATE + * + * This option controls the availability of the API mbedtls_ssl_get_peer_cert() + * giving access to the peer's certificate after completion of the handshake. + * + * Unless you need mbedtls_ssl_peer_cert() in your application, it is + * recommended to disable this option for reduced RAM usage. + * + * \note If this option is disabled, mbedtls_ssl_get_peer_cert() is still + * defined, but always returns \c NULL. + * + * \note This option has no influence on the protection against the + * triple handshake attack. Even if it is disabled, Mbed TLS will + * still ensure that certificates do not change during renegotiation, + * for exaple by keeping a hash of the peer's certificate. + * + * Comment this macro to disable storing the peer's certificate + * after the handshake. + */ +#define MBEDTLS_SSL_KEEP_PEER_CERTIFICATE + +/** + * \def MBEDTLS_SSL_HW_RECORD_ACCEL + * + * Enable hooking functions in SSL module for hardware acceleration of + * individual records. + * + * Uncomment this macro to enable hooking functions. + */ +//#define MBEDTLS_SSL_HW_RECORD_ACCEL + +/** + * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING + * + * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0. + * + * This is a countermeasure to the BEAST attack, which also minimizes the risk + * of interoperability issues compared to sending 0-length records. + * + * Comment this macro to disable 1/n-1 record splitting. + */ +#define MBEDTLS_SSL_CBC_RECORD_SPLITTING + +/** + * \def MBEDTLS_SSL_RENEGOTIATION + * + * Enable support for TLS renegotiation. + * + * The two main uses of renegotiation are (1) refresh keys on long-lived + * connections and (2) client authentication after the initial handshake. + * If you don't need renegotiation, it's probably better to disable it, since + * it has been associated with security issues in the past and is easy to + * misuse/misunderstand. + * + * Comment this to disable support for renegotiation. + * + * \note Even if this option is disabled, both client and server are aware + * of the Renegotiation Indication Extension (RFC 5746) used to + * prevent the SSL renegotiation attack (see RFC 5746 Sect. 1). + * (See \c mbedtls_ssl_conf_legacy_renegotiation for the + * configuration of this extension). + * + */ +#define MBEDTLS_SSL_RENEGOTIATION + +/** + * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO + * + * Enable support for receiving and parsing SSLv2 Client Hello messages for the + * SSL Server module (MBEDTLS_SSL_SRV_C). + * + * Uncomment this macro to enable support for SSLv2 Client Hello messages. + */ +//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO + +/** + * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE + * + * Pick the ciphersuite according to the client's preferences rather than ours + * in the SSL Server module (MBEDTLS_SSL_SRV_C). + * + * Uncomment this macro to respect client's ciphersuite order + */ +//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE + +/** + * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH + * + * Enable support for RFC 6066 max_fragment_length extension in SSL. + * + * Comment this macro to disable support for the max_fragment_length extension + */ +#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH + +/** + * \def MBEDTLS_SSL_PROTO_SSL3 + * + * Enable support for SSL 3.0. + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for SSL 3.0 + */ +//#define MBEDTLS_SSL_PROTO_SSL3 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1 + * + * Enable support for TLS 1.0. + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for TLS 1.0 + */ +#define MBEDTLS_SSL_PROTO_TLS1 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1_1 + * + * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled). + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for TLS 1.1 / DTLS 1.0 + */ +#define MBEDTLS_SSL_PROTO_TLS1_1 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1_2 + * + * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled). + * + * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C + * (Depends on ciphersuites) + * + * Comment this macro to disable support for TLS 1.2 / DTLS 1.2 + */ +#define MBEDTLS_SSL_PROTO_TLS1_2 + +/** + * \def MBEDTLS_SSL_PROTO_DTLS + * + * Enable support for DTLS (all available versions). + * + * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0, + * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1_1 + * or MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for DTLS + */ +#define MBEDTLS_SSL_PROTO_DTLS + +/** + * \def MBEDTLS_SSL_ALPN + * + * Enable support for RFC 7301 Application Layer Protocol Negotiation. + * + * Comment this macro to disable support for ALPN. + */ +#define MBEDTLS_SSL_ALPN + +/** + * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY + * + * Enable support for the anti-replay mechanism in DTLS. + * + * Requires: MBEDTLS_SSL_TLS_C + * MBEDTLS_SSL_PROTO_DTLS + * + * \warning Disabling this is often a security risk! + * See mbedtls_ssl_conf_dtls_anti_replay() for details. + * + * Comment this to disable anti-replay in DTLS. + */ +#define MBEDTLS_SSL_DTLS_ANTI_REPLAY + +/** + * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY + * + * Enable support for HelloVerifyRequest on DTLS servers. + * + * This feature is highly recommended to prevent DTLS servers being used as + * amplifiers in DoS attacks against other hosts. It should always be enabled + * unless you know for sure amplification cannot be a problem in the + * environment in which your server operates. + * + * \warning Disabling this can ba a security risk! (see above) + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + * + * Comment this to disable support for HelloVerifyRequest. + */ +#define MBEDTLS_SSL_DTLS_HELLO_VERIFY + +/** + * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE + * + * Enable server-side support for clients that reconnect from the same port. + * + * Some clients unexpectedly close the connection and try to reconnect using the + * same source port. This needs special support from the server to handle the + * new connection securely, as described in section 4.2.8 of RFC 6347. This + * flag enables that support. + * + * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY + * + * Comment this to disable support for clients reusing the source port. + */ +#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE + +/** + * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT + * + * Enable support for a limit of records with bad MAC. + * + * See mbedtls_ssl_conf_dtls_badmac_limit(). + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + */ +#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT + +/** + * \def MBEDTLS_SSL_SESSION_TICKETS + * + * Enable support for RFC 5077 session tickets in SSL. + * Client-side, provides full support for session tickets (maintenance of a + * session store remains the responsibility of the application, though). + * Server-side, you also need to provide callbacks for writing and parsing + * tickets, including authenticated encryption and key management. Example + * callbacks are provided by MBEDTLS_SSL_TICKET_C. + * + * Comment this macro to disable support for SSL session tickets + */ +#define MBEDTLS_SSL_SESSION_TICKETS + +/** + * \def MBEDTLS_SSL_EXPORT_KEYS + * + * Enable support for exporting key block and master secret. + * This is required for certain users of TLS, e.g. EAP-TLS. + * + * Comment this macro to disable support for key export + */ +#define MBEDTLS_SSL_EXPORT_KEYS + +/** + * \def MBEDTLS_SSL_SERVER_NAME_INDICATION + * + * Enable support for RFC 6066 server name indication (SNI) in SSL. + * + * Requires: MBEDTLS_X509_CRT_PARSE_C + * + * Comment this macro to disable support for server name indication in SSL + */ +#define MBEDTLS_SSL_SERVER_NAME_INDICATION + +/** + * \def MBEDTLS_SSL_TRUNCATED_HMAC + * + * Enable support for RFC 6066 truncated HMAC in SSL. + * + * Comment this macro to disable support for truncated HMAC in SSL + */ +#define MBEDTLS_SSL_TRUNCATED_HMAC + +/** + * \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT + * + * Fallback to old (pre-2.7), non-conforming implementation of the truncated + * HMAC extension which also truncates the HMAC key. Note that this option is + * only meant for a transitory upgrade period and is likely to be removed in + * a future version of the library. + * + * \warning The old implementation is non-compliant and has a security weakness + * (2^80 brute force attack on the HMAC key used for a single, + * uninterrupted connection). This should only be enabled temporarily + * when (1) the use of truncated HMAC is essential in order to save + * bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use + * the fixed implementation yet (pre-2.7). + * + * \deprecated This option is deprecated and will likely be removed in a + * future version of Mbed TLS. + * + * Uncomment to fallback to old, non-compliant truncated HMAC implementation. + * + * Requires: MBEDTLS_SSL_TRUNCATED_HMAC + */ +//#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT + +/** + * \def MBEDTLS_THREADING_ALT + * + * Provide your own alternate threading implementation. + * + * Requires: MBEDTLS_THREADING_C + * + * Uncomment this to allow your own alternate threading implementation. + */ +//#define MBEDTLS_THREADING_ALT + +/** + * \def MBEDTLS_THREADING_PTHREAD + * + * Enable the pthread wrapper layer for the threading layer. + * + * Requires: MBEDTLS_THREADING_C + * + * Uncomment this to enable pthread mutexes. + */ +//#define MBEDTLS_THREADING_PTHREAD + +/** + * \def MBEDTLS_USE_PSA_CRYPTO + * + * Make the X.509 and TLS library use PSA for cryptographic operations, and + * enable new APIs for using keys handled by PSA Crypto. + * + * \note Development of this option is currently in progress, and parts + * of the X.509 and TLS modules are not ported to PSA yet. However, these parts + * will still continue to work as usual, so enabling this option should not + * break backwards compatibility. + * + * \warning The PSA Crypto API is in beta stage. While you're welcome to + * experiment using it, incompatible API changes are still possible, and some + * parts may not have reached the same quality as the rest of Mbed TLS yet. + * + * \warning This option enables new Mbed TLS APIs that are dependent on the + * PSA Crypto API, so can't come with the same stability guarantees as the + * rest of the Mbed TLS APIs. You're welcome to experiment with them, but for + * now, access to these APIs is opt-in (via enabling the present option), in + * order to clearly differentiate them from the stable Mbed TLS APIs. + * + * Requires: MBEDTLS_PSA_CRYPTO_C. + * + * Uncomment this to enable internal use of PSA Crypto and new associated APIs. + */ +//#define MBEDTLS_USE_PSA_CRYPTO + +/** + * \def MBEDTLS_VERSION_FEATURES + * + * Allow run-time checking of compile-time enabled features. Thus allowing users + * to check at run-time if the library is for instance compiled with threading + * support via mbedtls_version_check_feature(). + * + * Requires: MBEDTLS_VERSION_C + * + * Comment this to disable run-time checking and save ROM space + */ +// #define MBEDTLS_VERSION_FEATURES + +/** + * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 + * + * If set, the X509 parser will not break-off when parsing an X509 certificate + * and encountering an extension in a v1 or v2 certificate. + * + * Uncomment to prevent an error. + */ +//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 + +/** + * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION + * + * If set, the X509 parser will not break-off when parsing an X509 certificate + * and encountering an unknown critical extension. + * + * \warning Depending on your PKI use, enabling this can be a security risk! + * + * Uncomment to prevent an error. + */ +//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION + +/** + * \def MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK + * + * If set, this enables the X.509 API `mbedtls_x509_crt_verify_with_ca_cb()` + * and the SSL API `mbedtls_ssl_conf_ca_cb()` which allow users to configure + * the set of trusted certificates through a callback instead of a linked + * list. + * + * This is useful for example in environments where a large number of trusted + * certificates is present and storing them in a linked list isn't efficient + * enough, or when the set of trusted certificates changes frequently. + * + * See the documentation of `mbedtls_x509_crt_verify_with_ca_cb()` and + * `mbedtls_ssl_conf_ca_cb()` for more information. + * + * Uncomment to enable trusted certificate callbacks. + */ +//#define MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK + +/** + * \def MBEDTLS_X509_CHECK_KEY_USAGE + * + * Enable verification of the keyUsage extension (CA and leaf certificates). + * + * Disabling this avoids problems with mis-issued and/or misused + * (intermediate) CA and leaf certificates. + * + * \warning Depending on your PKI use, disabling this can be a security risk! + * + * Comment to skip keyUsage checking for both CA and leaf certificates. + */ +#define MBEDTLS_X509_CHECK_KEY_USAGE + +/** + * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE + * + * Enable verification of the extendedKeyUsage extension (leaf certificates). + * + * Disabling this avoids problems with mis-issued and/or misused certificates. + * + * \warning Depending on your PKI use, disabling this can be a security risk! + * + * Comment to skip extendedKeyUsage checking for certificates. + */ +#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE + +/** + * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT + * + * Enable parsing and verification of X.509 certificates, CRLs and CSRS + * signed with RSASSA-PSS (aka PKCS#1 v2.1). + * + * Comment this macro to disallow using RSASSA-PSS in certificates. + */ +#define MBEDTLS_X509_RSASSA_PSS_SUPPORT + +/** + * \def MBEDTLS_ZLIB_SUPPORT + * + * If set, the SSL/TLS module uses ZLIB to support compression and + * decompression of packet data. + * + * \warning TLS-level compression MAY REDUCE SECURITY! See for example the + * CRIME attack. Before enabling this option, you should examine with care if + * CRIME or similar exploits may be applicable to your use case. + * + * \note Currently compression can't be used with DTLS. + * + * \deprecated This feature is deprecated and will be removed + * in the next major revision of the library. + * + * Used in: library/ssl_tls.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * This feature requires zlib library and headers to be present. + * + * Uncomment to enable use of ZLIB + */ +//#define MBEDTLS_ZLIB_SUPPORT +/* \} name SECTION: mbed TLS feature support */ + +/** + * \name SECTION: mbed TLS modules + * + * This section enables or disables entire modules in mbed TLS + * \{ + */ + +/** + * \def MBEDTLS_AESNI_C + * + * Enable AES-NI support on x86-64. + * + * Module: library/aesni.c + * Caller: library/aes.c + * + * Requires: MBEDTLS_HAVE_ASM + * + * This modules adds support for the AES-NI instructions on x86-64 + */ +#define MBEDTLS_AESNI_C + +/** + * \def MBEDTLS_AES_C + * + * Enable the AES block cipher. + * + * Module: library/aes.c + * Caller: library/cipher.c + * library/pem.c + * library/ctr_drbg.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA + * + * PEM_PARSE uses AES for decrypting encrypted keys. + */ +#define MBEDTLS_AES_C + +/** + * \def MBEDTLS_ARC4_C + * + * Enable the ARCFOUR stream cipher. + * + * Module: library/arc4.c + * Caller: library/cipher.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5 + * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA + * + * \warning ARC4 is considered a weak cipher and its use constitutes a + * security risk. If possible, we recommend avoidng dependencies on + * it, and considering stronger ciphers instead. + * + */ +#define MBEDTLS_ARC4_C + +/** + * \def MBEDTLS_ASN1_PARSE_C + * + * Enable the generic ASN1 parser. + * + * Module: library/asn1.c + * Caller: library/x509.c + * library/dhm.c + * library/pkcs12.c + * library/pkcs5.c + * library/pkparse.c + */ +#define MBEDTLS_ASN1_PARSE_C + +/** + * \def MBEDTLS_ASN1_WRITE_C + * + * Enable the generic ASN1 writer. + * + * Module: library/asn1write.c + * Caller: library/ecdsa.c + * library/pkwrite.c + * library/x509_create.c + * library/x509write_crt.c + * library/x509write_csr.c + */ +#define MBEDTLS_ASN1_WRITE_C + +/** + * \def MBEDTLS_BASE64_C + * + * Enable the Base64 module. + * + * Module: library/base64.c + * Caller: library/pem.c + * + * This module is required for PEM support (required by X.509). + */ +#define MBEDTLS_BASE64_C + +/** + * \def MBEDTLS_BIGNUM_C + * + * Enable the multi-precision integer library. + * + * Module: library/bignum.c + * Caller: library/dhm.c + * library/ecp.c + * library/ecdsa.c + * library/rsa.c + * library/rsa_internal.c + * library/ssl_tls.c + * + * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support. + */ +#define MBEDTLS_BIGNUM_C + +/** + * \def MBEDTLS_BLOWFISH_C + * + * Enable the Blowfish block cipher. + * + * Module: library/blowfish.c + */ +#define MBEDTLS_BLOWFISH_C + +/** + * \def MBEDTLS_CAMELLIA_C + * + * Enable the Camellia block cipher. + * + * Module: library/camellia.c + * Caller: library/cipher.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 + */ +#define MBEDTLS_CAMELLIA_C + +/** + * \def MBEDTLS_ARIA_C + * + * Enable the ARIA block cipher. + * + * Module: library/aria.c + * Caller: library/cipher.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * + * MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384 + */ +//#define MBEDTLS_ARIA_C + +/** + * \def MBEDTLS_CCM_C + * + * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher. + * + * Module: library/ccm.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C + * + * This module enables the AES-CCM ciphersuites, if other requisites are + * enabled as well. + */ +#define MBEDTLS_CCM_C + +/** + * \def MBEDTLS_CERTS_C + * + * Enable the test certificates. + * + * Module: library/certs.c + * Caller: + * + * This module is used for testing (ssl_client/server). + */ +#define MBEDTLS_CERTS_C + +/** + * \def MBEDTLS_CHACHA20_C + * + * Enable the ChaCha20 stream cipher. + * + * Module: library/chacha20.c + */ +#define MBEDTLS_CHACHA20_C + +/** + * \def MBEDTLS_CHACHAPOLY_C + * + * Enable the ChaCha20-Poly1305 AEAD algorithm. + * + * Module: library/chachapoly.c + * + * This module requires: MBEDTLS_CHACHA20_C, MBEDTLS_POLY1305_C + */ +#define MBEDTLS_CHACHAPOLY_C + +/** + * \def MBEDTLS_CIPHER_C + * + * Enable the generic cipher layer. + * + * Module: library/cipher.c + * Caller: library/ssl_tls.c + * + * Uncomment to enable generic cipher wrappers. + */ +#define MBEDTLS_CIPHER_C + +/** + * \def MBEDTLS_CMAC_C + * + * Enable the CMAC (Cipher-based Message Authentication Code) mode for block + * ciphers. + * + * Module: library/cmac.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C + * + */ +//#define MBEDTLS_CMAC_C + +/** + * \def MBEDTLS_CTR_DRBG_C + * + * Enable the CTR_DRBG AES-based random generator. + * The CTR_DRBG generator uses AES-256 by default. + * To use AES-128 instead, enable MBEDTLS_CTR_DRBG_USE_128_BIT_KEY below. + * + * Module: library/ctr_drbg.c + * Caller: + * + * Requires: MBEDTLS_AES_C + * + * This module provides the CTR_DRBG AES random number generator. + */ +#define MBEDTLS_CTR_DRBG_C + +/** + * \def MBEDTLS_DEBUG_C + * + * Enable the debug functions. + * + * Module: library/debug.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module provides debugging functions. + */ +#define MBEDTLS_DEBUG_C + +/** + * \def MBEDTLS_DES_C + * + * Enable the DES block cipher. + * + * Module: library/des.c + * Caller: library/pem.c + * library/cipher.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA + * + * PEM_PARSE uses DES/3DES for decrypting encrypted keys. + * + * \warning DES is considered a weak cipher and its use constitutes a + * security risk. We recommend considering stronger ciphers instead. + */ +#define MBEDTLS_DES_C + +/** + * \def MBEDTLS_DHM_C + * + * Enable the Diffie-Hellman-Merkle module. + * + * Module: library/dhm.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module is used by the following key exchanges: + * DHE-RSA, DHE-PSK + * + * \warning Using DHE constitutes a security risk as it + * is not possible to validate custom DH parameters. + * If possible, it is recommended users should consider + * preferring other methods of key exchange. + * See dhm.h for more details. + * + */ +#define MBEDTLS_DHM_C + +/** + * \def MBEDTLS_ECDH_C + * + * Enable the elliptic curve Diffie-Hellman library. + * + * Module: library/ecdh.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module is used by the following key exchanges: + * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK + * + * Requires: MBEDTLS_ECP_C + */ +#define MBEDTLS_ECDH_C + +/** + * \def MBEDTLS_ECDSA_C + * + * Enable the elliptic curve DSA library. + * + * Module: library/ecdsa.c + * Caller: + * + * This module is used by the following key exchanges: + * ECDHE-ECDSA + * + * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C + */ +#define MBEDTLS_ECDSA_C + +/** + * \def MBEDTLS_ECJPAKE_C + * + * Enable the elliptic curve J-PAKE library. + * + * \warning This is currently experimental. EC J-PAKE support is based on the + * Thread v1.0.0 specification; incompatible changes to the specification + * might still happen. For this reason, this is disabled by default. + * + * Module: library/ecjpake.c + * Caller: + * + * This module is used by the following key exchanges: + * ECJPAKE + * + * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C + */ +//#define MBEDTLS_ECJPAKE_C + +/** + * \def MBEDTLS_ECP_C + * + * Enable the elliptic curve over GF(p) library. + * + * Module: library/ecp.c + * Caller: library/ecdh.c + * library/ecdsa.c + * library/ecjpake.c + * + * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED + */ +#define MBEDTLS_ECP_C + +/** + * \def MBEDTLS_ENTROPY_C + * + * Enable the platform-specific entropy code. + * + * Module: library/entropy.c + * Caller: + * + * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C + * + * This module provides a generic entropy pool + */ +#define MBEDTLS_ENTROPY_C + +/** + * \def MBEDTLS_ERROR_C + * + * Enable error code to error string conversion. + * + * Module: library/error.c + * Caller: + * + * This module enables mbedtls_strerror(). + */ +// #define MBEDTLS_ERROR_C + +/** + * \def MBEDTLS_GCM_C + * + * Enable the Galois/Counter Mode (GCM) for AES. + * + * Module: library/gcm.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C + * + * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other + * requisites are enabled as well. + */ +#define MBEDTLS_GCM_C + +/** + * \def MBEDTLS_HAVEGE_C + * + * Enable the HAVEGE random generator. + * + * Warning: the HAVEGE random generator is not suitable for virtualized + * environments + * + * Warning: the HAVEGE random generator is dependent on timing and specific + * processor traits. It is therefore not advised to use HAVEGE as + * your applications primary random generator or primary entropy pool + * input. As a secondary input to your entropy pool, it IS able add + * the (limited) extra entropy it provides. + * + * Module: library/havege.c + * Caller: + * + * Requires: MBEDTLS_TIMING_C + * + * Uncomment to enable the HAVEGE random generator. + */ +//#define MBEDTLS_HAVEGE_C + +/** + * \def MBEDTLS_HKDF_C + * + * Enable the HKDF algorithm (RFC 5869). + * + * Module: library/hkdf.c + * Caller: + * + * Requires: MBEDTLS_MD_C + * + * This module adds support for the Hashed Message Authentication Code + * (HMAC)-based key derivation function (HKDF). + */ +#define MBEDTLS_HKDF_C + +/** + * \def MBEDTLS_HMAC_DRBG_C + * + * Enable the HMAC_DRBG random generator. + * + * Module: library/hmac_drbg.c + * Caller: + * + * Requires: MBEDTLS_MD_C + * + * Uncomment to enable the HMAC_DRBG random number geerator. + */ +#define MBEDTLS_HMAC_DRBG_C + +/** + * \def MBEDTLS_NIST_KW_C + * + * Enable the Key Wrapping mode for 128-bit block ciphers, + * as defined in NIST SP 800-38F. Only KW and KWP modes + * are supported. At the moment, only AES is approved by NIST. + * + * Module: library/nist_kw.c + * + * Requires: MBEDTLS_AES_C and MBEDTLS_CIPHER_C + */ +//#define MBEDTLS_NIST_KW_C + +/** + * \def MBEDTLS_MD_C + * + * Enable the generic message digest layer. + * + * Module: library/md.c + * Caller: + * + * Uncomment to enable generic message digest wrappers. + */ +#define MBEDTLS_MD_C + +/** + * \def MBEDTLS_MD2_C + * + * Enable the MD2 hash algorithm. + * + * Module: library/md2.c + * Caller: + * + * Uncomment to enable support for (rare) MD2-signed X.509 certs. + * + * \warning MD2 is considered a weak message digest and its use constitutes a + * security risk. If possible, we recommend avoiding dependencies on + * it, and considering stronger message digests instead. + * + */ +//#define MBEDTLS_MD2_C + +/** + * \def MBEDTLS_MD4_C + * + * Enable the MD4 hash algorithm. + * + * Module: library/md4.c + * Caller: + * + * Uncomment to enable support for (rare) MD4-signed X.509 certs. + * + * \warning MD4 is considered a weak message digest and its use constitutes a + * security risk. If possible, we recommend avoiding dependencies on + * it, and considering stronger message digests instead. + * + */ +//#define MBEDTLS_MD4_C + +/** + * \def MBEDTLS_MD5_C + * + * Enable the MD5 hash algorithm. + * + * Module: library/md5.c + * Caller: library/md.c + * library/pem.c + * library/ssl_tls.c + * + * This module is required for SSL/TLS up to version 1.1, and for TLS 1.2 + * depending on the handshake parameters. Further, it is used for checking + * MD5-signed certificates, and for PBKDF1 when decrypting PEM-encoded + * encrypted keys. + * + * \warning MD5 is considered a weak message digest and its use constitutes a + * security risk. If possible, we recommend avoiding dependencies on + * it, and considering stronger message digests instead. + * + */ +#define MBEDTLS_MD5_C + +/** + * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C + * + * Enable the buffer allocator implementation that makes use of a (stack) + * based buffer to 'allocate' dynamic memory. (replaces calloc() and free() + * calls) + * + * Module: library/memory_buffer_alloc.c + * + * Requires: MBEDTLS_PLATFORM_C + * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS) + * + * Enable this module to enable the buffer memory allocator. + */ +//#define MBEDTLS_MEMORY_BUFFER_ALLOC_C + +/** + * \def MBEDTLS_NET_C + * + * Enable the TCP and UDP over IPv6/IPv4 networking routines. + * + * \note This module only works on POSIX/Unix (including Linux, BSD and OS X) + * and Windows. For other platforms, you'll want to disable it, and write your + * own networking callbacks to be passed to \c mbedtls_ssl_set_bio(). + * + * \note See also our Knowledge Base article about porting to a new + * environment: + * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS + * + * Module: library/net_sockets.c + * + * This module provides networking routines. + */ +// #define MBEDTLS_NET_C + +/** + * \def MBEDTLS_OID_C + * + * Enable the OID database. + * + * Module: library/oid.c + * Caller: library/asn1write.c + * library/pkcs5.c + * library/pkparse.c + * library/pkwrite.c + * library/rsa.c + * library/x509.c + * library/x509_create.c + * library/x509_crl.c + * library/x509_crt.c + * library/x509_csr.c + * library/x509write_crt.c + * library/x509write_csr.c + * + * This modules translates between OIDs and internal values. + */ +#define MBEDTLS_OID_C + +/** + * \def MBEDTLS_PADLOCK_C + * + * Enable VIA Padlock support on x86. + * + * Module: library/padlock.c + * Caller: library/aes.c + * + * Requires: MBEDTLS_HAVE_ASM + * + * This modules adds support for the VIA PadLock on x86. + */ +#define MBEDTLS_PADLOCK_C + +/** + * \def MBEDTLS_PEM_PARSE_C + * + * Enable PEM decoding / parsing. + * + * Module: library/pem.c + * Caller: library/dhm.c + * library/pkparse.c + * library/x509_crl.c + * library/x509_crt.c + * library/x509_csr.c + * + * Requires: MBEDTLS_BASE64_C + * + * This modules adds support for decoding / parsing PEM files. + */ +#define MBEDTLS_PEM_PARSE_C + +/** + * \def MBEDTLS_PEM_WRITE_C + * + * Enable PEM encoding / writing. + * + * Module: library/pem.c + * Caller: library/pkwrite.c + * library/x509write_crt.c + * library/x509write_csr.c + * + * Requires: MBEDTLS_BASE64_C + * + * This modules adds support for encoding / writing PEM files. + */ +#define MBEDTLS_PEM_WRITE_C + +/** + * \def MBEDTLS_PK_C + * + * Enable the generic public (asymetric) key layer. + * + * Module: library/pk.c + * Caller: library/ssl_tls.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C + * + * Uncomment to enable generic public key wrappers. + */ +#define MBEDTLS_PK_C + +/** + * \def MBEDTLS_PK_PARSE_C + * + * Enable the generic public (asymetric) key parser. + * + * Module: library/pkparse.c + * Caller: library/x509_crt.c + * library/x509_csr.c + * + * Requires: MBEDTLS_PK_C + * + * Uncomment to enable generic public key parse functions. + */ +#define MBEDTLS_PK_PARSE_C + +/** + * \def MBEDTLS_PK_WRITE_C + * + * Enable the generic public (asymetric) key writer. + * + * Module: library/pkwrite.c + * Caller: library/x509write.c + * + * Requires: MBEDTLS_PK_C + * + * Uncomment to enable generic public key write functions. + */ +#define MBEDTLS_PK_WRITE_C + +/** + * \def MBEDTLS_PKCS5_C + * + * Enable PKCS#5 functions. + * + * Module: library/pkcs5.c + * + * Requires: MBEDTLS_MD_C + * + * This module adds support for the PKCS#5 functions. + */ +#define MBEDTLS_PKCS5_C + +/** + * \def MBEDTLS_PKCS11_C + * + * Enable wrapper for PKCS#11 smartcard support. + * + * Module: library/pkcs11.c + * Caller: library/pk.c + * + * Requires: MBEDTLS_PK_C + * + * This module enables SSL/TLS PKCS #11 smartcard support. + * Requires the presence of the PKCS#11 helper library (libpkcs11-helper) + */ +//#define MBEDTLS_PKCS11_C + +/** + * \def MBEDTLS_PKCS12_C + * + * Enable PKCS#12 PBE functions. + * Adds algorithms for parsing PKCS#8 encrypted private keys + * + * Module: library/pkcs12.c + * Caller: library/pkparse.c + * + * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C + * Can use: MBEDTLS_ARC4_C + * + * This module enables PKCS#12 functions. + */ +#define MBEDTLS_PKCS12_C + +/** + * \def MBEDTLS_PLATFORM_C + * + * Enable the platform abstraction layer that allows you to re-assign + * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit(). + * + * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT + * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned + * above to be specified at runtime or compile time respectively. + * + * \note This abstraction layer must be enabled on Windows (including MSYS2) + * as other module rely on it for a fixed snprintf implementation. + * + * Module: library/platform.c + * Caller: Most other .c files + * + * This module enables abstraction of common (libc) functions. + */ +#define MBEDTLS_PLATFORM_C + +/** + * \def MBEDTLS_POLY1305_C + * + * Enable the Poly1305 MAC algorithm. + * + * Module: library/poly1305.c + * Caller: library/chachapoly.c + */ +#define MBEDTLS_POLY1305_C + +/** + * \def MBEDTLS_PSA_CRYPTO_C + * + * Enable the Platform Security Architecture cryptography API. + * + * \warning The PSA Crypto API is still beta status. While you're welcome to + * experiment using it, incompatible API changes are still possible, and some + * parts may not have reached the same quality as the rest of Mbed TLS yet. + * + * Module: crypto/library/psa_crypto.c + * + * Requires: MBEDTLS_CTR_DRBG_C, MBEDTLS_ENTROPY_C + * + */ +#define MBEDTLS_PSA_CRYPTO_C + +/** + * \def MBEDTLS_PSA_CRYPTO_STORAGE_C + * + * Enable the Platform Security Architecture persistent key storage. + * + * Module: crypto/library/psa_crypto_storage.c + * + * Requires: MBEDTLS_PSA_CRYPTO_C, + * either MBEDTLS_PSA_ITS_FILE_C or a native implementation of + * the PSA ITS interface + */ +//#define MBEDTLS_PSA_CRYPTO_STORAGE_C + +/** + * \def MBEDTLS_PSA_ITS_FILE_C + * + * Enable the emulation of the Platform Security Architecture + * Internal Trusted Storage (PSA ITS) over files. + * + * Module: crypto/library/psa_its_file.c + * + * Requires: MBEDTLS_FS_IO + * + */ +//#define MBEDTLS_PSA_ITS_FILE_C + +/** + * \def MBEDTLS_RIPEMD160_C + * + * Enable the RIPEMD-160 hash algorithm. + * + * Module: library/ripemd160.c + * Caller: library/md.c + * + */ +#define MBEDTLS_RIPEMD160_C + +/** + * \def MBEDTLS_RSA_C + * + * Enable the RSA public-key cryptosystem. + * + * Module: library/rsa.c + * library/rsa_internal.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509.c + * + * This module is used by the following key exchanges: + * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK + * + * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C + */ +#define MBEDTLS_RSA_C + +/** + * \def MBEDTLS_SHA1_C + * + * Enable the SHA1 cryptographic hash algorithm. + * + * Module: library/sha1.c + * Caller: library/md.c + * library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509write_crt.c + * + * This module is required for SSL/TLS up to version 1.1, for TLS 1.2 + * depending on the handshake parameters, and for SHA1-signed certificates. + * + * \warning SHA-1 is considered a weak message digest and its use constitutes + * a security risk. If possible, we recommend avoiding dependencies + * on it, and considering stronger message digests instead. + * + */ +#define MBEDTLS_SHA1_C + +/** + * \def MBEDTLS_SHA256_C + * + * Enable the SHA-224 and SHA-256 cryptographic hash algorithms. + * + * Module: library/sha256.c + * Caller: library/entropy.c + * library/md.c + * library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module adds support for SHA-224 and SHA-256. + * This module is required for the SSL/TLS 1.2 PRF function. + */ +#define MBEDTLS_SHA256_C + +/** + * \def MBEDTLS_SHA512_C + * + * Enable the SHA-384 and SHA-512 cryptographic hash algorithms. + * + * Module: library/sha512.c + * Caller: library/entropy.c + * library/md.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * This module adds support for SHA-384 and SHA-512. + */ +#define MBEDTLS_SHA512_C + +/** + * \def MBEDTLS_SSL_CACHE_C + * + * Enable simple SSL cache implementation. + * + * Module: library/ssl_cache.c + * Caller: + * + * Requires: MBEDTLS_SSL_CACHE_C + */ +#define MBEDTLS_SSL_CACHE_C + +/** + * \def MBEDTLS_SSL_COOKIE_C + * + * Enable basic implementation of DTLS cookies for hello verification. + * + * Module: library/ssl_cookie.c + * Caller: + */ +#define MBEDTLS_SSL_COOKIE_C + +/** + * \def MBEDTLS_SSL_TICKET_C + * + * Enable an implementation of TLS server-side callbacks for session tickets. + * + * Module: library/ssl_ticket.c + * Caller: + * + * Requires: MBEDTLS_CIPHER_C + */ +#define MBEDTLS_SSL_TICKET_C + +/** + * \def MBEDTLS_SSL_CLI_C + * + * Enable the SSL/TLS client code. + * + * Module: library/ssl_cli.c + * Caller: + * + * Requires: MBEDTLS_SSL_TLS_C + * + * This module is required for SSL/TLS client support. + */ +#define MBEDTLS_SSL_CLI_C + +/** + * \def MBEDTLS_SSL_SRV_C + * + * Enable the SSL/TLS server code. + * + * Module: library/ssl_srv.c + * Caller: + * + * Requires: MBEDTLS_SSL_TLS_C + * + * This module is required for SSL/TLS server support. + */ +#define MBEDTLS_SSL_SRV_C + +/** + * \def MBEDTLS_SSL_TLS_C + * + * Enable the generic SSL/TLS code. + * + * Module: library/ssl_tls.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C + * and at least one of the MBEDTLS_SSL_PROTO_XXX defines + * + * This module is required for SSL/TLS. + */ +#define MBEDTLS_SSL_TLS_C + +/** + * \def MBEDTLS_THREADING_C + * + * Enable the threading abstraction layer. + * By default mbed TLS assumes it is used in a non-threaded environment or that + * contexts are not shared between threads. If you do intend to use contexts + * between threads, you will need to enable this layer to prevent race + * conditions. See also our Knowledge Base article about threading: + * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading + * + * Module: library/threading.c + * + * This allows different threading implementations (self-implemented or + * provided). + * + * You will have to enable either MBEDTLS_THREADING_ALT or + * MBEDTLS_THREADING_PTHREAD. + * + * Enable this layer to allow use of mutexes within mbed TLS + */ +//#define MBEDTLS_THREADING_C + +/** + * \def MBEDTLS_TIMING_C + * + * Enable the semi-portable timing interface. + * + * \note The provided implementation only works on POSIX/Unix (including Linux, + * BSD and OS X) and Windows. On other platforms, you can either disable that + * module and provide your own implementations of the callbacks needed by + * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide + * your own implementation of the whole module by setting + * \c MBEDTLS_TIMING_ALT in the current file. + * + * \note See also our Knowledge Base article about porting to a new + * environment: + * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS + * + * Module: library/timing.c + * Caller: library/havege.c + * + * This module is used by the HAVEGE random number generator. + */ +// #define MBEDTLS_TIMING_C + +/** + * \def MBEDTLS_VERSION_C + * + * Enable run-time version information. + * + * Module: library/version.c + * + * This module provides run-time version information. + */ +// #define MBEDTLS_VERSION_C + +/** + * \def MBEDTLS_X509_USE_C + * + * Enable X.509 core for using certificates. + * + * Module: library/x509.c + * Caller: library/x509_crl.c + * library/x509_crt.c + * library/x509_csr.c + * + * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, + * MBEDTLS_PK_PARSE_C + * + * This module is required for the X.509 parsing modules. + */ +#define MBEDTLS_X509_USE_C + +/** + * \def MBEDTLS_X509_CRT_PARSE_C + * + * Enable X.509 certificate parsing. + * + * Module: library/x509_crt.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is required for X.509 certificate parsing. + */ +#define MBEDTLS_X509_CRT_PARSE_C + +/** + * \def MBEDTLS_X509_CRL_PARSE_C + * + * Enable X.509 CRL parsing. + * + * Module: library/x509_crl.c + * Caller: library/x509_crt.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is required for X.509 CRL parsing. + */ +#define MBEDTLS_X509_CRL_PARSE_C + +/** + * \def MBEDTLS_X509_CSR_PARSE_C + * + * Enable X.509 Certificate Signing Request (CSR) parsing. + * + * Module: library/x509_csr.c + * Caller: library/x509_crt_write.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is used for reading X.509 certificate request. + */ +#define MBEDTLS_X509_CSR_PARSE_C + +/** + * \def MBEDTLS_X509_CREATE_C + * + * Enable X.509 core for creating certificates. + * + * Module: library/x509_create.c + * + * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C + * + * This module is the basis for creating X.509 certificates and CSRs. + */ +#define MBEDTLS_X509_CREATE_C + +/** + * \def MBEDTLS_X509_CRT_WRITE_C + * + * Enable creating X.509 certificates. + * + * Module: library/x509_crt_write.c + * + * Requires: MBEDTLS_X509_CREATE_C + * + * This module is required for X.509 certificate creation. + */ +#define MBEDTLS_X509_CRT_WRITE_C + +/** + * \def MBEDTLS_X509_CSR_WRITE_C + * + * Enable creating X.509 Certificate Signing Requests (CSR). + * + * Module: library/x509_csr_write.c + * + * Requires: MBEDTLS_X509_CREATE_C + * + * This module is required for X.509 certificate request writing. + */ +#define MBEDTLS_X509_CSR_WRITE_C + +/** + * \def MBEDTLS_XTEA_C + * + * Enable the XTEA block cipher. + * + * Module: library/xtea.c + * Caller: + */ +#define MBEDTLS_XTEA_C + +/* \} name SECTION: mbed TLS modules */ + +/** + * \name SECTION: Module configuration options + * + * This section allows for the setting of module specific sizes and + * configuration options. The default values are already present in the + * relevant header files and should suffice for the regular use cases. + * + * Our advice is to enable options and change their values here + * only if you have a good reason and know the consequences. + * + * Please check the respective header file for documentation on these + * parameters (to prevent duplicate documentation). + * \{ + */ + +/* MPI / BIGNUM options */ +//#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */ +//#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */ + +/* CTR_DRBG options */ +//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */ +//#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +//#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +//#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ +//#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY /**< Use 128-bit key for CTR_DRBG - may reduce security (see ctr_drbg.h) */ + +/* HMAC_DRBG options */ +//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ + +/* ECP options */ +//#define MBEDTLS_ECP_MAX_BITS 521 /**< Maximum bit size of groups */ +//#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< Maximum window size used */ +//#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */ + +/* Entropy options */ +//#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */ +//#define MBEDTLS_ENTROPY_MAX_GATHER 128 /**< Maximum amount requested from entropy sources */ +//#define MBEDTLS_ENTROPY_MIN_HARDWARE 32 /**< Default minimum number of bytes required for the hardware entropy source mbedtls_hardware_poll() before entropy is released */ + +/* Memory buffer allocator options */ +//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */ + +/* Platform options */ +//#define MBEDTLS_PLATFORM_STD_MEM_HDR /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */ +//#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_TIME time /**< Default time to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */ +//#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can be undefined */ +/* Note: your snprintf must correctly zero-terminate the buffer! */ +//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS 0 /**< Default exit value to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE 1 /**< Default exit value to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_NV_SEED_READ mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE "seedfile" /**< Seed file to read/write with default implementation */ + +/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */ +/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */ +//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_TIME_MACRO time /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */ +//#define MBEDTLS_PLATFORM_TIME_TYPE_MACRO time_t /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */ +//#define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_PRINTF_MACRO printf /**< Default printf macro to use, can be undefined */ +/* Note: your snprintf must correctly zero-terminate the buffer! */ +//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_VSNPRINTF_MACRO vsnprintf /**< Default vsnprintf macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */ +//#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */ + +/** + * \brief This macro is invoked by the library when an invalid parameter + * is detected that is only checked with #MBEDTLS_CHECK_PARAMS + * (see the documentation of that option for context). + * + * When you leave this undefined here, the library provides + * a default definition. If the macro #MBEDTLS_CHECK_PARAMS_ASSERT + * is defined, the default definition is `assert(cond)`, + * otherwise the default definition calls a function + * mbedtls_param_failed(). This function is declared in + * `platform_util.h` for the benefit of the library, but + * you need to define in your application. + * + * When you define this here, this replaces the default + * definition in platform_util.h (which no longer declares the + * function mbedtls_param_failed()) and it is your responsibility + * to make sure this macro expands to something suitable (in + * particular, that all the necessary declarations are visible + * from within the library - you can ensure that by providing + * them in this file next to the macro definition). + * If you define this macro to call `assert`, also define + * #MBEDTLS_CHECK_PARAMS_ASSERT so that library source files + * include ``. + * + * Note that you may define this macro to expand to nothing, in + * which case you don't have to worry about declarations or + * definitions. However, you will then be notified about invalid + * parameters only in non-void functions, and void function will + * just silently return early on invalid parameters, which + * partially negates the benefits of enabling + * #MBEDTLS_CHECK_PARAMS in the first place, so is discouraged. + * + * \param cond The expression that should evaluate to true, but doesn't. + */ +//#define MBEDTLS_PARAM_FAILED( cond ) assert( cond ) + +/* SSL Cache options */ +//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */ +//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */ + +/* SSL options */ + +/** \def MBEDTLS_SSL_MAX_CONTENT_LEN + * + * Maximum length (in bytes) of incoming and outgoing plaintext fragments. + * + * This determines the size of both the incoming and outgoing TLS I/O buffers + * in such a way that both are capable of holding the specified amount of + * plaintext data, regardless of the protection mechanism used. + * + * To configure incoming and outgoing I/O buffers separately, use + * #MBEDTLS_SSL_IN_CONTENT_LEN and #MBEDTLS_SSL_OUT_CONTENT_LEN, + * which overwrite the value set by this option. + * + * \note When using a value less than the default of 16KB on the client, it is + * recommended to use the Maximum Fragment Length (MFL) extension to + * inform the server about this limitation. On the server, there + * is no supported, standardized way of informing the client about + * restriction on the maximum size of incoming messages, and unless + * the limitation has been communicated by other means, it is recommended + * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN + * while keeping the default value of 16KB for the incoming buffer. + * + * Uncomment to set the maximum plaintext size of both + * incoming and outgoing I/O buffers. + */ +//#define MBEDTLS_SSL_MAX_CONTENT_LEN 16384 + +/** \def MBEDTLS_SSL_IN_CONTENT_LEN + * + * Maximum length (in bytes) of incoming plaintext fragments. + * + * This determines the size of the incoming TLS I/O buffer in such a way + * that it is capable of holding the specified amount of plaintext data, + * regardless of the protection mechanism used. + * + * If this option is undefined, it inherits its value from + * #MBEDTLS_SSL_MAX_CONTENT_LEN. + * + * \note When using a value less than the default of 16KB on the client, it is + * recommended to use the Maximum Fragment Length (MFL) extension to + * inform the server about this limitation. On the server, there + * is no supported, standardized way of informing the client about + * restriction on the maximum size of incoming messages, and unless + * the limitation has been communicated by other means, it is recommended + * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN + * while keeping the default value of 16KB for the incoming buffer. + * + * Uncomment to set the maximum plaintext size of the incoming I/O buffer + * independently of the outgoing I/O buffer. + */ +//#define MBEDTLS_SSL_IN_CONTENT_LEN 16384 + +/** \def MBEDTLS_SSL_CID_IN_LEN_MAX + * + * The maximum length of CIDs used for incoming DTLS messages. + * + */ +//#define MBEDTLS_SSL_CID_IN_LEN_MAX 32 + +/** \def MBEDTLS_SSL_CID_OUT_LEN_MAX + * + * The maximum length of CIDs used for outgoing DTLS messages. + * + */ +//#define MBEDTLS_SSL_CID_OUT_LEN_MAX 32 + +/** \def MBEDTLS_SSL_CID_PADDING_GRANULARITY + * + * This option controls the use of record plaintext padding + * when using the Connection ID extension in DTLS 1.2. + * + * The padding will always be chosen so that the length of the + * padded plaintext is a multiple of the value of this option. + * + * Note: A value of \c 1 means that no padding will be used + * for outgoing records. + * + * Note: On systems lacking division instructions, + * a power of two should be preferred. + * + */ +//#define MBEDTLS_SSL_CID_PADDING_GRANULARITY 16 + +/** \def MBEDTLS_SSL_OUT_CONTENT_LEN + * + * Maximum length (in bytes) of outgoing plaintext fragments. + * + * This determines the size of the outgoing TLS I/O buffer in such a way + * that it is capable of holding the specified amount of plaintext data, + * regardless of the protection mechanism used. + * + * If this option undefined, it inherits its value from + * #MBEDTLS_SSL_MAX_CONTENT_LEN. + * + * It is possible to save RAM by setting a smaller outward buffer, while keeping + * the default inward 16384 byte buffer to conform to the TLS specification. + * + * The minimum required outward buffer size is determined by the handshake + * protocol's usage. Handshaking will fail if the outward buffer is too small. + * The specific size requirement depends on the configured ciphers and any + * certificate data which is sent during the handshake. + * + * Uncomment to set the maximum plaintext size of the outgoing I/O buffer + * independently of the incoming I/O buffer. + */ +//#define MBEDTLS_SSL_OUT_CONTENT_LEN 16384 + +/** \def MBEDTLS_SSL_DTLS_MAX_BUFFERING + * + * Maximum number of heap-allocated bytes for the purpose of + * DTLS handshake message reassembly and future message buffering. + * + * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN + * to account for a reassembled handshake message of maximum size, + * together with its reassembly bitmap. + * + * A value of 2 * MBEDTLS_SSL_IN_CONTENT_LEN (32768 by default) + * should be sufficient for all practical situations as it allows + * to reassembly a large handshake message (such as a certificate) + * while buffering multiple smaller handshake messages. + * + */ +//#define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768 + +//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */ +//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */ +//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */ + +/** + * Complete list of ciphersuites to use, in order of preference. + * + * \warning No dependency checking is done on that field! This option can only + * be used to restrict the set of available ciphersuites. It is your + * responsibility to make sure the needed modules are active. + * + * Use this to save a few hundred bytes of ROM (default ordering of all + * available ciphersuites) and a few to a few hundred bytes of RAM. + * + * The value below is only an example, not the default. + */ +//#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + +/* X509 options */ +//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */ +//#define MBEDTLS_X509_MAX_FILE_PATH_LEN 512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */ + +/** + * Allow SHA-1 in the default TLS configuration for certificate signing. + * Without this build-time option, SHA-1 support must be activated explicitly + * through mbedtls_ssl_conf_cert_profile. Turning on this option is not + * recommended because of it is possible to generate SHA-1 collisions, however + * this may be safe for legacy infrastructure where additional controls apply. + * + * \warning SHA-1 is considered a weak message digest and its use constitutes + * a security risk. If possible, we recommend avoiding dependencies + * on it, and considering stronger message digests instead. + * + */ +//#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES + +/** + * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake + * signature and ciphersuite selection. Without this build-time option, SHA-1 + * support must be activated explicitly through mbedtls_ssl_conf_sig_hashes. + * The use of SHA-1 in TLS <= 1.1 and in HMAC-SHA-1 is always allowed by + * default. At the time of writing, there is no practical attack on the use + * of SHA-1 in handshake signatures, hence this option is turned on by default + * to preserve compatibility with existing peers, but the general + * warning applies nonetheless: + * + * \warning SHA-1 is considered a weak message digest and its use constitutes + * a security risk. If possible, we recommend avoiding dependencies + * on it, and considering stronger message digests instead. + * + */ +#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE + +/** + * Uncomment the macro to let mbed TLS use your alternate implementation of + * mbedtls_platform_zeroize(). This replaces the default implementation in + * platform_util.c. + * + * mbedtls_platform_zeroize() is a widely used function across the library to + * zero a block of memory. The implementation is expected to be secure in the + * sense that it has been written to prevent the compiler from removing calls + * to mbedtls_platform_zeroize() as part of redundant code elimination + * optimizations. However, it is difficult to guarantee that calls to + * mbedtls_platform_zeroize() will not be optimized by the compiler as older + * versions of the C language standards do not provide a secure implementation + * of memset(). Therefore, MBEDTLS_PLATFORM_ZEROIZE_ALT enables users to + * configure their own implementation of mbedtls_platform_zeroize(), for + * example by using directives specific to their compiler, features from newer + * C standards (e.g using memset_s() in C11) or calling a secure memset() from + * their system (e.g explicit_bzero() in BSD). + */ +//#define MBEDTLS_PLATFORM_ZEROIZE_ALT + +/** + * Uncomment the macro to let Mbed TLS use your alternate implementation of + * mbedtls_platform_gmtime_r(). This replaces the default implementation in + * platform_util.c. + * + * gmtime() is not a thread-safe function as defined in the C standard. The + * library will try to use safer implementations of this function, such as + * gmtime_r() when available. However, if Mbed TLS cannot identify the target + * system, the implementation of mbedtls_platform_gmtime_r() will default to + * using the standard gmtime(). In this case, calls from the library to + * gmtime() will be guarded by the global mutex mbedtls_threading_gmtime_mutex + * if MBEDTLS_THREADING_C is enabled. We recommend that calls from outside the + * library are also guarded with this mutex to avoid race conditions. However, + * if the macro MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, Mbed TLS will + * unconditionally use the implementation for mbedtls_platform_gmtime_r() + * supplied at compile time. + */ +//#define MBEDTLS_PLATFORM_GMTIME_R_ALT + +/** + * Enable the verified implementations of ECDH primitives from Project Everest + * (currently only Curve25519). This feature changes the layout of ECDH + * contexts and therefore is a compatibility break for applications that access + * fields of a mbedtls_ecdh_context structure directly. See also + * MBEDTLS_ECDH_LEGACY_CONTEXT in include/mbedtls/ecdh.h. + */ +//#define MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED + +/* \} name SECTION: Customisation configuration options */ + +/* Target and application specific configurations + * + * Allow user to override any previous default. + * + */ +#if defined(MBEDTLS_USER_CONFIG_FILE) +#include MBEDTLS_USER_CONFIG_FILE +#endif + +#ifdef MCUBOOT_ENC_IMAGES +#define MBEDTLS_SHA256_DIGEST_SIZE (32) +#define MBEDTLS_AES_KEY_SIZE 16 +#endif + +#endif /* MBEDTLS_CONFIG_H */ diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/cy_security_cnt.c b/bootloader/mcuboot/boot/cypress/MCUBootApp/cy_security_cnt.c new file mode 100644 index 0000000..3c3b2ec --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/cy_security_cnt.c @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2020 Arm Limited. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "bootutil/security_cnt.h" +#include + +fih_ret +boot_nv_security_counter_init(void) +{ + /* Do nothing. */ + return FIH_SUCCESS; +} + +fih_ret +boot_nv_security_counter_get(uint32_t image_id, fih_int *security_cnt) +{ + (void)image_id; + *security_cnt = 30; + + return FIH_SUCCESS; +} + +int32_t +boot_nv_security_counter_update(uint32_t image_id, uint32_t img_security_cnt) +{ + (void)image_id; + (void)img_security_cnt; + + /* Do nothing. */ + return 0; +} diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/cy_serial_flash_prog.c b/bootloader/mcuboot/boot/cypress/MCUBootApp/cy_serial_flash_prog.c new file mode 100644 index 0000000..512df93 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/cy_serial_flash_prog.c @@ -0,0 +1,100 @@ +/***************************************************************************//** +* \file cy_serial_flash_prog.c +* +* \brief +* Provides variables necessary to inform programming tools how to program the +* attached serial flash memory. The variables used here must be placed at +* specific locations in order to be detected and used by programming tools +* to know that there is an attached memory and its characteristics. Uses the +* configuration provided as part of BSP. +* +******************************************************************************** +* \copyright +* Copyright 2018-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +/** +* \addtogroup group_serial_flash Serial Flash +* \{ +* Variables for informing programming tools that there is an attached memory device and what +* its characteristics are so it can be programmed just like the on-chip memory. +* +* \defgroup group_serial_flash_variables Variables +*/ + +#include +#include "flash_qspi.h" + +#if defined(__cplusplus) +extern "C" { +#endif + +typedef struct +{ + const cy_stc_smif_block_config_t * smifCfg; /* Pointer to SMIF top-level configuration */ + const uint32_t null_t; /* NULL termination */ +} stc_smif_ipblocks_arr_t; + +/** +* \addtogroup group_serial_flash_variables +* \{ +*/ + +/** + * This data can be placed anywhere in the internal memory, but it must be at a location that + * can be determined and used for the calculation of the CRC16 checksum in the cyToc below. There + * are multiple ways this can be accomplished including: + * 1) Placing it in a dedicated memory block with a known address. (as done here) + * 2) Placing it at an absolute location via a the linker script + * 3) Using 'cymcuelftool -S' to recompute the checksum and patch the elf file after linking + */ +CY_SECTION(".cy_sflash_user_data") __attribute__( (used) ) +/* const stc_smif_ipblocks_arr_t smifIpBlocksArr = {&smifBlockConfig_sfdp, 0x00000000}; */ +/* if used zero-pointer to config, DAP link will use hardcoded config for CY8CPROTO-062-4343W */ +const stc_smif_ipblocks_arr_t smifIpBlocksArr = {0x00000000, 0x00000000}; + +/** + * This data is used to populate the table of contents part 2. When present, it is used by the boot + * process and programming tools to determine key characteristics about the memory usage including + * where the boot process should start the application from and what external memories are connected + * (if any). This must consume a full row of flash memory row. The last entry is a checksum of the + * other values in the ToC which must be updated if any other value changes. This can be done manually + * or by running 'cymcuelftool -S' to recompute the checksum. + */ +CY_SECTION(".cy_toc_part2") __attribute__( (used) ) +const uint32_t cyToc[128] = +{ + 0x200-4, /* Offset=0x0000: Object Size, bytes */ + 0x01211220, /* Offset=0x0004: Magic Number (TOC Part 2, ID) */ + 0, /* Offset=0x0008: Key Storage Address */ + (int)&smifIpBlocksArr, /* Offset=0x000C: This points to a null terminated array of SMIF structures. */ + 0x10000000u, /* Offset=0x0010: App image start address */ + /* Offset=0x0014-0x01F7: Reserved */ + [126] = 0x000002C2, /* Offset=0x01F8: Bits[ 1: 0] CLOCK_CONFIG (0=8MHz, 1=25MHz, 2=50MHz, 3=100MHz) + Bits[ 4: 2] LISTEN_WINDOW (0=20ms, 1=10ms, 2=1ms, 3=0ms, 4=100ms) + Bits[ 6: 5] SWJ_PINS_CTL (0/1/3=Disable SWJ, 2=Enable SWJ) + Bits[ 8: 7] APP_AUTHENTICATION (0/2/3=Enable, 1=Disable) + Bits[10: 9] FB_BOOTLOADER_CTL: UNUSED */ + [127] = 0x3BB30000 /* Offset=0x01FC: CRC16-CCITT (the upper 2 bytes contain the CRC and the lower 2 bytes are 0) */ +}; + +/** \} group_serial_flash_variables */ + +#if defined(__cplusplus) +} +#endif + +/** \} group_serial_flash */ diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/keys.c b/bootloader/mcuboot/boot/cypress/MCUBootApp/keys.c new file mode 100644 index 0000000..20c0332 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/keys.c @@ -0,0 +1,169 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + /******************************************************************************* +* +* This software is a port of the open source MCUBoot project. +* +* This file was modified to fit PSoC6-based MCUBoot applications. +* +* Portions of this software, including source code, documentation and related +* materials ("Software"), are owned by Cypress Semiconductor +* Corporation or one of its subsidiaries ("Cypress") and is protected by +* and subject to worldwide patent protection (United States and foreign), +* United States copyright laws and international treaty provisions. +* Therefore, you may use this Software only as provided in the license +* agreement accompanying the software package from which you +* obtained this Software ("EULA"). +* +* If no EULA applies, Cypress hereby grants you a personal, non- +* exclusive, non-transferable license to copy, modify, and compile the +* Software source code solely for use in connection with Cypress's +* integrated circuit products. Any reproduction, modification, translation, +* compilation, or representation of this Software except as specified +* above is prohibited without the express written permission of Cypress. +* +* Disclaimer: THIS SOFTWARE IS PROVIDED AS-IS, WITH NO +* WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING, +* BUT NOT LIMITED TO, NONINFRINGEMENT, IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A +* PARTICULAR PURPOSE. Cypress reserves the right to make +* changes to the Software without notice. Cypress does not assume any +* liability arising out of the application or use of the Software or any +* product or circuit described in the Software. Cypress does not +* authorize its products for use in any products where a malfunction or +* failure of the Cypress product may reasonably be expected to result in +* significant property damage, injury or death ("High Risk Product"). By +* including Cypress's product in a High Risk Product, the manufacturer +* of such system or application assumes all risk of such use and in doing +* so agrees to indemnify Cypress against all liability. +* +********************************************************************************/ +#include +#include + +#if !defined(MCUBOOT_HW_KEY) +#if defined(MCUBOOT_SIGN_RSA) +const unsigned char rsa_pub_key[] = { + 0x30, 0x82, 0x01, 0x0a, 0x02, 0x82, 0x01, 0x01, 0x00, 0xd1, 0x06, 0x08, + 0x1a, 0x18, 0x44, 0x2c, 0x18, 0xe8, 0xfb, 0xfd, 0xf7, 0x0d, 0xa3, 0x4f, + 0x1f, 0xbb, 0xee, 0x5e, 0xf9, 0xaa, 0xd2, 0x4b, 0x18, 0xd3, 0x5a, 0xe9, + 0x6d, 0x18, 0x80, 0x19, 0xf9, 0xf0, 0x9c, 0x34, 0x1b, 0xcb, 0xf3, 0xbc, + 0x74, 0xdb, 0x42, 0xe7, 0x8c, 0x7f, 0x10, 0x53, 0x7e, 0x43, 0x5e, 0x0d, + 0x57, 0x2c, 0x44, 0xd1, 0x67, 0x08, 0x0f, 0x0d, 0xbb, 0x5c, 0xee, 0xec, + 0xb3, 0x99, 0xdf, 0xe0, 0x4d, 0x84, 0x0b, 0xaa, 0x77, 0x41, 0x60, 0xed, + 0x15, 0x28, 0x49, 0xa7, 0x01, 0xb4, 0x3c, 0x10, 0xe6, 0x69, 0x8c, 0x2f, + 0x5f, 0xac, 0x41, 0x4d, 0x9e, 0x5c, 0x14, 0xdf, 0xf2, 0xf8, 0xcf, 0x3d, + 0x1e, 0x6f, 0xe7, 0x5b, 0xba, 0xb4, 0xa9, 0xc8, 0x88, 0x7e, 0x47, 0x3c, + 0x94, 0xc3, 0x77, 0x67, 0x54, 0x4b, 0xaa, 0x8d, 0x38, 0x35, 0xca, 0x62, + 0x61, 0x7e, 0xb7, 0xe1, 0x15, 0xdb, 0x77, 0x73, 0xd4, 0xbe, 0x7b, 0x72, + 0x21, 0x89, 0x69, 0x24, 0xfb, 0xf8, 0x65, 0x6e, 0x64, 0x3e, 0xc8, 0x0e, + 0xd7, 0x85, 0xd5, 0x5c, 0x4a, 0xe4, 0x53, 0x0d, 0x2f, 0xff, 0xb7, 0xfd, + 0xf3, 0x13, 0x39, 0x83, 0x3f, 0xa3, 0xae, 0xd2, 0x0f, 0xa7, 0x6a, 0x9d, + 0xf9, 0xfe, 0xb8, 0xce, 0xfa, 0x2a, 0xbe, 0xaf, 0xb8, 0xe0, 0xfa, 0x82, + 0x37, 0x54, 0xf4, 0x3e, 0xe1, 0x2b, 0xd0, 0xd3, 0x08, 0x58, 0x18, 0xf6, + 0x5e, 0x4c, 0xc8, 0x88, 0x81, 0x31, 0xad, 0x5f, 0xb0, 0x82, 0x17, 0xf2, + 0x8a, 0x69, 0x27, 0x23, 0xf3, 0xab, 0x87, 0x3e, 0x93, 0x1a, 0x1d, 0xfe, + 0xe8, 0xf8, 0x1a, 0x24, 0x66, 0x59, 0xf8, 0x1c, 0xab, 0xdc, 0xce, 0x68, + 0x1b, 0x66, 0x64, 0x35, 0xec, 0xfa, 0x0d, 0x11, 0x9d, 0xaf, 0x5c, 0x3a, + 0xa7, 0xd1, 0x67, 0xc6, 0x47, 0xef, 0xb1, 0x4b, 0x2c, 0x62, 0xe1, 0xd1, + 0xc9, 0x02, 0x03, 0x01, 0x00, 0x01 +}; +const unsigned int rsa_pub_key_len = 270; +#elif defined(MCUBOOT_SIGN_EC256) +/* Format of PEM : + * -----BEGIN PUBLIC KEY----- + * base64encode(DER) + * -----END PUBLIC KEY----- */ +#if defined(ECC256_KEY_FILE) +#include ECC256_KEY_FILE +#else +#warning "Used default ECC256 ecdsa_pub_key" +/* It is OEM_PUB_KEY at this moment for debug purposes */ +const unsigned char ecdsa_pub_key[] = { + 0x30, 0x59, 0x30, 0x13, 0x06, 0x07, 0x2a, 0x86, + 0x48, 0xce, 0x3d, 0x02, 0x01, 0x06, 0x08, 0x2a, + 0x86, 0x48, 0xce, 0x3d, 0x03, 0x01, 0x07, 0x03, + 0x42, 0x00, 0x04, 0xbd, 0x59, 0x9d, 0x15, 0xe0, + 0xff, 0x66, 0x12, 0x37, 0x28, 0xdf, 0x50, 0x38, + 0xb1, 0x9a, 0x73, 0x9b, 0xbd, 0xd1, 0xb3, 0x8a, + 0x6f, 0xd2, 0x70, 0xed, 0x7f, 0xdb, 0x57, 0x53, + 0xde, 0x9e, 0x77, 0x0f, 0x9c, 0x17, 0x22, 0x69, + 0xa6, 0x75, 0x48, 0x1f, 0xa4, 0xbc, 0x49, 0xe2, + 0x01, 0xe0, 0x5e, 0x3d, 0xec, 0xa8, 0xc1, 0xca, + 0xc5, 0x5c, 0xa2, 0xc6, 0xfd, 0xb0, 0x24, 0xb1, + 0x0a, 0x46, 0xf5, +}; +const unsigned int ecdsa_pub_key_len = 91; +#endif +#else +#warning "No public key available for given signing algorithm." +#endif + +#if defined(MCUBOOT_SIGN_RSA) || \ + defined(MCUBOOT_SIGN_EC256) +const struct bootutil_key bootutil_keys[] = { +#if defined(MCUBOOT_SIGN_RSA) + { + .key = rsa_pub_key, + .len = &rsa_pub_key_len, + }, +#elif defined(MCUBOOT_SIGN_EC256) + { + .key = ecdsa_pub_key, + .len = &ecdsa_pub_key_len, + }, +#else + { + .key = NULL, + .len = 0x00, + }, +#endif +}; +const int bootutil_key_cnt = 1; +#endif +#else +unsigned int pub_key_len; +struct bootutil_key bootutil_keys[1] = { + { + .key = 0, + .len = &pub_key_len, + } +}; +const int bootutil_key_cnt = 1; +#endif /* !MCUBOOT_HW_KEY */ + +unsigned char enc_priv_key[] = { + 0x30, 0x81, 0x87, 0x02, 0x01, 0x00, 0x30, 0x13, 0x06, 0x07, 0x2a, 0x86, + 0x48, 0xce, 0x3d, 0x02, 0x01, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, + 0x03, 0x01, 0x07, 0x04, 0x6d, 0x30, 0x6b, 0x02, 0x01, 0x01, 0x04, 0x20, + 0xf6, 0x1e, 0x51, 0x9d, 0xf8, 0xfa, 0xdd, 0xa1, 0xb7, 0xd9, 0xa9, 0x64, + 0x64, 0x3b, 0x54, 0xd0, 0x3d, 0xd0, 0x1f, 0xe5, 0x78, 0xd9, 0x17, 0x98, + 0xa5, 0x28, 0xca, 0xcc, 0x6b, 0x67, 0x9e, 0x06, 0xa1, 0x44, 0x03, 0x42, + 0x00, 0x04, 0x8a, 0x44, 0x73, 0x00, 0x94, 0xc9, 0x80, 0x27, 0x31, 0x0d, + 0x23, 0x36, 0x6b, 0xe9, 0x69, 0x9f, 0xcb, 0xc5, 0x7c, 0xc8, 0x44, 0x1a, + 0x93, 0xe6, 0xee, 0x7d, 0x86, 0xa6, 0xae, 0x5e, 0x93, 0x72, 0x74, 0xd9, + 0xe1, 0x5a, 0x1c, 0x9b, 0x65, 0x1a, 0x2b, 0x61, 0x41, 0x28, 0x02, 0x73, + 0x84, 0x12, 0x97, 0x3a, 0x2d, 0xa2, 0xa0, 0x67, 0x77, 0x02, 0xda, 0x67, + 0x1a, 0x4b, 0xdd, 0xd7, 0x71, 0xcc, +}; +static unsigned int enc_priv_key_len = 138; +const struct bootutil_key bootutil_enc_key = { + .key = enc_priv_key, + .len = &enc_priv_key_len, +}; diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/libs.mk b/bootloader/mcuboot/boot/cypress/MCUBootApp/libs.mk new file mode 100644 index 0000000..1f22674 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/libs.mk @@ -0,0 +1,95 @@ +################################################################################ +# \file libs.mk +# \version 1.0 +# +# \brief +# Makefile to describe libraries needed for Cypress MCUBoot based applications. +# +################################################################################ +# \copyright +# Copyright 2018-2019 Cypress Semiconductor Corporation +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +################################################################################ + +################################################################################ +# PDL library +################################################################################ +PDL_VERSION = 121 + +THIS_APP_PATH = $(PRJ_DIR)/libs +MBEDTLS_PATH = $(PRJ_DIR)/../../ext + +# Add platform folder to build +SOURCES_PLATFORM += $(wildcard $(PRJ_DIR)/platforms/*.c) +SOURCES_WATCHDOG := $(wildcard $(THIS_APP_PATH)/watchdog/*.c) + +# Add retartget IO implementation using pdl +SOURCES_RETARGET_IO_PDL += $(wildcard $(THIS_APP_PATH)/retarget_io_pdl/*.c) + +# Collect dirrectories containing headers for PLATFORM +INCLUDE_RETARGET_IO_PDL += $(THIS_APP_PATH)/retarget_io_pdl + +# PSOC6HAL source files +SOURCES_HAL += $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/cyhal_crypto_common.c +SOURCES_HAL += $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/cyhal_hwmgr.c + +# MbedTLS source files +SOURCES_MBEDTLS := $(wildcard $(MBEDTLS_PATH)/mbedtls/library/*.c) + +# Collected source files for libraries +SOURCES_LIBS += $(SOURCES_HAL) +SOURCES_LIBS += $(SOURCES_MBEDTLS) +SOURCES_LIBS += $(SOURCES_WATCHDOG) +SOURCES_LIBS += $(SOURCES_PLATFORM) +SOURCES_LIBS += $(SOURCES_RETARGET_IO_PDL) + +# Include platforms folder +INCLUDE_DIRS_PLATFORM := $(PRJ_DIR)/platforms + +# needed for Crypto HW Acceleration and headers inclusion, do not use for peripherals +# peripherals should be accessed +INCLUDE_DIRS_HAL := $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include +INCLUDE_DIRS_HAL += $(THIS_APP_PATH)/psoc6hal/include +INCLUDE_DIRS_HAL += $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/pin_packages + +# MbedTLS related include directories +INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/include +INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/include/mbedtls +INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/include/psa +INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/library + +# Watchdog related includes +INCLUDE_DIRS_WATCHDOG := $(THIS_APP_PATH)/watchdog + +# Collected include directories for libraries +INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL)) +INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_WATCHDOG)) +INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_MBEDTLS)) +INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_RETARGET_IO_PDL)) +INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_PLATFORM)) + +################################################################################ +# mbedTLS hardware acceleration settings +################################################################################ +ifeq ($(USE_CRYPTO_HW), 1) +# cy-mbedtls-acceleration related include directories +INCLUDE_DIRS_MBEDTLS_MXCRYPTO := $(THIS_APP_PATH)/cy-mbedtls-acceleration/mbedtls_MXCRYPTO +# Collect source files for MbedTLS acceleration +SOURCES_MBEDTLS_MXCRYPTO := $(wildcard $(THIS_APP_PATH)/cy-mbedtls-acceleration/mbedtls_MXCRYPTO/*.c) +# +INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_MBEDTLS_MXCRYPTO)) +# Collected source files for libraries +SOURCES_LIBS += $(SOURCES_MBEDTLS_MXCRYPTO) +endif diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/main.c b/bootloader/mcuboot/boot/cypress/MCUBootApp/main.c new file mode 100644 index 0000000..a87d981 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/main.c @@ -0,0 +1,181 @@ +/***************************************************************************//** +* \file main.c +* \version 1.0 +******************************************************************************** +* \copyright +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ +/* Cypress pdl headers */ +#include "cy_pdl.h" +#include "cy_retarget_io_pdl.h" +#include "cy_result.h" + +#include "cycfg_clocks.h" +#include "cycfg_peripherals.h" +#include "cycfg_pins.h" + +#include "flash_qspi.h" +#include "sysflash/sysflash.h" +#include "flash_map_backend/flash_map_backend.h" + +#include "bootutil/image.h" +#include "bootutil/bootutil.h" +#include "bootutil/sign_key.h" + +#include "bootutil/bootutil_log.h" + +#include "bootutil/fault_injection_hardening.h" + +#include "watchdog.h" + +/* WDT time out for reset mode, in milliseconds. */ +#define WDT_TIME_OUT_MS 4000 + +/* Define pins for UART debug output */ +#define CYBSP_UART_ENABLED 1U +#define CYBSP_UART_HW SCB5 +#define CYBSP_UART_IRQ scb_5_interrupt_IRQn + +#ifdef CY_BOOT_USE_EXTERNAL_FLASH +/* Choose SMIF slot number (slave select). + * Acceptable values are: + * 0 - SMIF disabled (no external memory); + * 1, 2, 3 or 4 - slave select line memory module is connected to. + */ +uint32_t smif_id = 1; /* Assume SlaveSelect_0 is used for External Memory */ +#endif + + +void hw_deinit(void); + +static void do_boot(struct boot_rsp *rsp) +{ + uint32_t app_addr = 0; + + app_addr = (rsp->br_image_off + rsp->br_hdr->ih_hdr_size); + + BOOT_LOG_INF("Starting User Application on CM4 (wait)..."); + BOOT_LOG_INF("Start Address: 0x%08lx", app_addr); + BOOT_LOG_INF("Deinitializing hardware..."); + + cy_retarget_io_wait_tx_complete(CYBSP_UART_HW, 10); + + hw_deinit(); + + Cy_SysEnableCM4(app_addr); +} + +int main(void) +{ + struct boot_rsp rsp; + cy_rslt_t rc = CY_RSLT_TYPE_ERROR; + bool boot_succeeded = false; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + SystemInit(); + //init_cycfg_clocks(); + init_cycfg_peripherals(); + init_cycfg_pins(); + + /* Certain PSoC 6 devices enable CM4 by default at startup. It must be + * either disabled or enabled & running a valid application for flash write + * to work from CM0+. Since flash write may happen in boot_go() for updating + * the image before this bootloader app can enable CM4 in do_boot(), we need + * to keep CM4 disabled. Note that debugging of CM4 is not supported when it + * is disabled. + */ + #if defined(CY_DEVICE_PSOC6ABLE2) + if (CY_SYS_CM4_STATUS_ENABLED == Cy_SysGetCM4Status()) + { + Cy_SysDisableCM4(); + } + #endif /* #if defined(CY_DEVICE_PSOC6ABLE2) */ + + /* enable interrupts */ + __enable_irq(); + + /* Initialize retarget-io to use the debug UART port (CYBSP_UART_HW) */ + rc = cy_retarget_io_pdl_init(115200u); + + if (rc != CY_RSLT_SUCCESS) + { + CY_ASSERT(0); + } + + BOOT_LOG_INF("MCUBoot Bootloader Started"); + +#ifdef CY_BOOT_USE_EXTERNAL_FLASH + rc = CY_SMIF_CMD_NOT_FOUND; + + #undef MCUBOOT_MAX_IMG_SECTORS + /* redefine number of sectors as there 2MB will be + * available on PSoC062-2M in case of external + * memory usage */ + #define MCUBOOT_MAX_IMG_SECTORS 4096 + rc = qspi_init_sfdp(smif_id); + if (rc == CY_SMIF_SUCCESS) + { + BOOT_LOG_INF("External Memory initialized w/ SFDP."); + } + else + { + BOOT_LOG_ERR("External Memory initialization w/ SFDP FAILED: 0x%02x", (int)rc); + } + if (CY_SMIF_SUCCESS == rc) +#endif + { + + FIH_CALL(boot_go, fih_rc, &rsp); + if (FIH_EQ(fih_rc, FIH_SUCCESS)) + { + BOOT_LOG_INF("User Application validated successfully"); + /* initialize watchdog timer. it should be updated from user app + * to mark successful start up of this app. if the watchdog is not updated, + * reset will be initiated by watchdog timer and swap revert operation started + * to roll back to operable image. + */ + cy_wdg_init(WDT_TIME_OUT_MS); + do_boot(&rsp); + boot_succeeded = true; + } + else + { + BOOT_LOG_INF("MCUBoot Bootloader found none of bootable images"); + } + } + + while (1) + { + if (boot_succeeded) { + Cy_SysPm_CpuEnterDeepSleep(CY_SYSPM_WAIT_FOR_INTERRUPT); + } + else { + __WFI(); + } + } + + return 0; +} + +void hw_deinit(void) +{ + cy_retarget_io_pdl_deinit(); + Cy_GPIO_Port_Deinit(CYBSP_UART_RX_PORT); + Cy_GPIO_Port_Deinit(CYBSP_UART_TX_PORT); + +#ifdef CY_BOOT_USE_EXTERNAL_FLASH + qspi_deinit(smif_id); +#endif +} diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/os/os.h b/bootloader/mcuboot/boot/cypress/MCUBootApp/os/os.h new file mode 100644 index 0000000..8d581ca --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/os/os.h @@ -0,0 +1,18 @@ +/***************************************************************************//** +* \file os.h +* \version 1.0 +* +* \brief +* Objective: +* Heap init prototype +* +******************************************************************************** +* \copyright +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* You may use this file only in accordance with the license, terms, conditions, +* disclaimers, and limitations in the end user license agreement accompanying +* the software package with which this file was provided. +*******************************************************************************/ + + +void os_heap_init(void); diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/os/os_heap.h b/bootloader/mcuboot/boot/cypress/MCUBootApp/os/os_heap.h new file mode 100644 index 0000000..0ea954c --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/os/os_heap.h @@ -0,0 +1,37 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_OS_HEAP_ +#define H_OS_HEAP_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +void *os_malloc(size_t size); +void os_free(void *mem); +void *os_realloc(void *ptr, size_t size); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/os/os_malloc.h b/bootloader/mcuboot/boot/cypress/MCUBootApp/os/os_malloc.h new file mode 100644 index 0000000..249b12c --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/os/os_malloc.h @@ -0,0 +1,42 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_OS_MALLOC_ +#define H_OS_MALLOC_ + +#include "os/os_heap.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#undef malloc +#define malloc os_malloc + +#undef free +#define free os_free + +#undef realloc +#define realloc os_realloc + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/cypress/MCUBootApp/sysflash/sysflash.h b/bootloader/mcuboot/boot/cypress/MCUBootApp/sysflash/sysflash.h new file mode 100644 index 0000000..f1fc841 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/MCUBootApp/sysflash/sysflash.h @@ -0,0 +1,81 @@ +/* Manual version of auto-generated version. */ + +#ifndef __SYSFLASH_H__ +#define __SYSFLASH_H__ + +#define FLASH_DEVICE_INTERNAL_FLASH (0x7F) + +#define FLASH_AREA_BOOTLOADER 0 +#define FLASH_AREA_IMAGE_0 1 +#define FLASH_AREA_IMAGE_1 2 +#define FLASH_AREA_IMAGE_SCRATCH 3 +#define FLASH_AREA_IMAGE_2 5 +#define FLASH_AREA_IMAGE_3 6 + +/* Uncomment if external flash is being used */ +/* #define CY_BOOT_USE_EXTERNAL_FLASH */ + +/* use PDL-defined offset or one from SMFI config */ +#define CY_SMIF_BASE_MEM_OFFSET (0x18000000) + +#define CY_FLASH_ALIGN (CY_FLASH_SIZEOF_ROW) +#define CY_FLASH_DEVICE_BASE (CY_FLASH_BASE) + +#ifndef CY_BOOT_SCRATCH_SIZE +#define CY_BOOT_SCRATCH_SIZE (0x1000) +#endif + +#ifndef CY_BOOT_BOOTLOADER_SIZE +#define CY_BOOT_BOOTLOADER_SIZE (0x18000) +#endif + +#ifndef CY_BOOT_PRIMARY_1_SIZE +#define CY_BOOT_PRIMARY_1_SIZE (0x10000) +#endif + +#ifndef CY_BOOT_SECONDARY_1_SIZE +#define CY_BOOT_SECONDARY_1_SIZE (0x10000) +#endif + +#if (MCUBOOT_IMAGE_NUMBER == 2) /* if dual-image */ +#ifndef CY_BOOT_PRIMARY_2_SIZE +#define CY_BOOT_PRIMARY_2_SIZE (0x10000) +#endif + +#ifndef CY_BOOT_SECONDARY_2_SIZE +#define CY_BOOT_SECONDARY_2_SIZE (0x10000) +#endif +#endif + +#if (MCUBOOT_IMAGE_NUMBER == 1) +#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_0 : \ + FLASH_AREA_IMAGE_0) +#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_1 : \ + FLASH_AREA_IMAGE_1) + +#elif (MCUBOOT_IMAGE_NUMBER == 2) + +#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_0 : \ + ((x) == 1) ? \ + FLASH_AREA_IMAGE_2 : \ + 255) +#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_1 : \ + ((x) == 1) ? \ + FLASH_AREA_IMAGE_3 : \ + 255) + +#else +#warning "Image slot and flash area mapping is not defined" +#endif +#define CY_IMG_HDR_SIZE 0x400 + +#ifndef CY_FLASH_MAP_EXT_DESC +/* Uncomment in case you want to use separately defined table of flash area descriptors */ +/* #define CY_FLASH_MAP_EXT_DESC */ +#endif + +#endif /* __SYSFLASH_H__ */ diff --git a/bootloader/mcuboot/boot/cypress/Makefile b/bootloader/mcuboot/boot/cypress/Makefile new file mode 100644 index 0000000..78ac445 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/Makefile @@ -0,0 +1,212 @@ +################################################################################ +# \file Makefile +# \version 1.0 +# +# \brief +# Main Makefile for building MCUBoot application for Cypress target. +# +################################################################################ +# \copyright +# Copyright 2018-2021 Cypress Semiconductor Corporation +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +################################################################################ + +# minimum Python 3.7 is required +# Python path definition +ifeq ($(OS),Windows_NT) +PYTHON_PATH?=python +else +PYTHON_PATH?=python3 +endif + +################################################################################ +# Main settings +################################################################################ + +# Defines whether or not show verbose build output +MAKEINFO ?= 1 +# Application name by default +APP_NAME ?= MCUBootApp +# Weather or now execute post build script after build - set to 0 for CI +POST_BUILD ?= 1 + +SIGN_KEY_FILE ?= cypress-test-ec-p256 +ENC_KEY_FILE ?= enc-ec256-pub +ENC_IMG ?= 0 + +# set this variable to a path, where cysecuretools python package is installed +# use command `python -m pip show cysecuretools` to find out this path +# or rely on scripts that automates this action, bit not work for virtual envs +CY_SEC_TOOLS_PATH ?= $(shell $(PYTHON_PATH) $(CURDIR)/scripts/find_cysectools.py) + +BUILDCFG ?= Debug + +# Set of supported applications +APPS := MCUBootApp BlinkyApp + +HEADER_OFFSET ?= 0 + +ifneq ($(filter $(APP_NAME), $(APPS)),) +include ./$(APP_NAME)/$(APP_NAME).mk +include ./$(APP_NAME)/libs.mk +else +$(error Not supported application: '$(APP_NAME)') +endif + +ASM_FILES := $(ASM_FILES_APP) +ASM_FILES += $(ASM_FILES_LIBS) + +C_FILES := $(SOURCES_APP) +C_FILES += $(SOURCES_LIBS) + +INCLUDE_DIRS := $(INCLUDE_DIRS_APP) +INCLUDE_DIRS += $(INCLUDE_DIRS_MCUBOOT) +INCLUDE_DIRS += $(INCLUDE_DIRS_LIBS) + +#INCLUDE_FILES := $(INCLUDE_FILES_APP) + +#INCLUDES := $(addprefix -include , $(INCLUDE_FILES)) + +O_FILES := $(notdir $(C_FILES:.c=.o)) $(addsuffix .o, $(notdir $(basename $(ASM_FILES)))) + +DEFINES := $(DEFINES_APP) +DEFINES += $(DEFINES_LIBS) +AS_FLAGS += $(DEFINES) + +ifeq ($(MAKEINFO), 1) +$(info ==============================================================================) +$(info = Directories to look for header files: =) +$(info ==============================================================================) +$(info $(INCLUDE_DIRS)) + +$(info ==============================================================================) +$(info = Collected Defines string: =) +$(info ==============================================================================) +$(info $(DEFINES)) +endif + +# updating CFLAGS at this point as DEFINES are completed +CFLAGS += $(DEFINES) + +VPATH = $(dir $(C_FILES) $(ASM_FILES)) + +# +# STDE: For cygwin, adjust paths for compiler +# +MY_FILES := $(subst /cygdrive/c,c:,$(C_FILES)) +#$(info MY_FILES $(MY_FILES)) +C_FILES=$(MY_FILES) + +MY_DIRS := $(subst /cygdrive/c,c:,$(INCLUDE_DIRS)) +#$(info MY_DIRS $(MY_DIRS)) +INCLUDE_DIRS=$(MY_DIRS) + +MY_ASM_FILES := $(subst /cygdrive/c,c:,$(ASM_FILES)) +#$(info MY_ASM_FILES $(MY_ASM_FILES)) +ASM_FILES=$(MY_ASM_FILES) + +MY_LDFLAGS := $(subst /cygdrive/c,c:,$(LDFLAGS)) +#$(info MY_LDFLAGS $(MY_LDFLAGS)) +LDFLAGS=$(MY_LDFLAGS) + +# Default name pattern for output files +# may be modified in %Application%.mk file +OUT_FILE_NAME ?= $(OUT_APP)/$(APP_NAME) + +OUT_OBJ := $(OUT_CFG)/obj +OUT_APP := $(OUT_CFG) + +.PHONY: all app build clean pre_build post_build + +all: clean app + +app: + @`mkdir -p ./$(OUT)` + @`mkdir -p ./$(OUT_TARGET)` + @`mkdir -p ./$(OUT_CFG)` + @`mkdir -p ./$(OUT_OBJ)` + $(MAKE) pre_build + $(MAKE) build -j8 + $(MAKE) post_build + +build: $(OUT_APP)/$(APP_NAME).hex + $(GCC_PATH)/bin/arm-none-eabi-objdump $(OUT_APP)/$(APP_NAME).elf -S --disassemble > $(OUT_APP)/$(APP_NAME).lst + $(GCC_PATH)/bin/arm-none-eabi-objdump -h $(OUT_APP)/$(APP_NAME).elf + $(GCC_PATH)/bin/arm-none-eabi-size --format=SysV $(OUT_APP)/$(APP_NAME).elf + +$(OUT_APP)/$(APP_NAME).hex: $(OUT_APP)/$(APP_NAME).elf + $(GCC_PATH)/bin/arm-none-eabi-objcopy --change-addresses=$(HEADER_OFFSET) -O ihex $(OUT_APP)/$(APP_NAME).elf $(OUT_APP)/$(APP_NAME).hex + +$(OUT_APP)/$(APP_NAME).elf: $(addprefix $(OUT_OBJ)/, $(O_FILES)) + @echo "LD $@" +ifeq ($(MAKEINFO), 1) + @echo $(LD) $(O_FILES) $(CC_DEPEND) $(@:.o=.d) -o $@ $(LDFLAGS) -T $(LINKER_SCRIPT) -Wl,-Map,$(OUT_FILE_NAME).map +endif + @$(LD) $(addprefix $(OUT_OBJ)/, $(O_FILES)) $(CC_DEPEND) $(@:.o=.d) -o $@ $(LDFLAGS) -T $(LINKER_SCRIPT) -Wl,-Map,$(OUT_FILE_NAME).map + + +$(OUT_OBJ)/%.o: %.c + @echo "CC $<" +ifeq ($(MAKEINFO), 1) + @echo $(CC) $(CFLAGS) $(INCLUDE_DIRS) $(CC_DEPEND) $(@:.o=.d) -c $< -o $@ +endif + @$(CC) $(CFLAGS) $(INCLUDE_DIRS) $(CC_DEPEND) $(@:.o=.d) -c $< -o $@ +ifeq ($(MAKEINFO), 1) + @echo +endif + +$(OUT_OBJ)/%.o: %.S + @echo "AS $<" +ifeq ($(COMPILER), GCC_ARM) +ifeq ($(MAKEINFO), 1) + @echo @$(CC) $(CFLAGS) $(INCLUDE_DIRS) $(CC_DEPEND) $(@:.o=.d) -c $< -o $@ +endif + @$(CC) $(CFLAGS) $(INCLUDE_DIRS) $(CC_DEPEND) $(@:.o=.d) -c $< -o $@ +else + @echo $(AS) $< -o $@ $(AS_FLAGS) + @$(AS) $< -o $@ $(AS_FLAGS) +endif +ifeq ($(MAKEINFO), 1) + @echo +endif + +clean: + @echo "Cleanup out directory..." + rm -rf $(OUT_TARGET)/$(BUILDCFG) + +clean_boot: + @echo "Cleanup out BOOT directory of $(APP_NAME)..." + rm -rf $(OUT_TARGET)/$(BUILDCFG)/boot + +clean_upgrade: + @echo "Cleanup out UPGRADE directory of $(APP_NAME)..." + rm -rf $(OUT_TARGET)/$(BUILDCFG)/upgrade + +run_cppcheck: + @echo "Performing static code analysis with Cppcheck tool..." + cppcheck/cppcheck.sh $(APP_NAME) $(PLATFORM) "$(DEFINES)" "$(INCLUDE_DIRS)" "$(C_FILES)" $(CPP_CHECK_SCOPE) $(BUILDCFG) + +gen_key_ecc256: + @echo Generate ECC256 keys: $(SIGN_KEY_FILE).pem and $(SIGN_KEY_FILE).pub + ../../scripts/imgtool.py keygen -k keys/$(SIGN_KEY_FILE).pem -t ecdsa-p256 + ../../scripts/imgtool.py getpub -k keys/$(SIGN_KEY_FILE).pem > keys/$(SIGN_KEY_FILE).pub + +ifeq ($(MAKEINFO) , 1) +$(info ASM_FILES: $(ASM_FILES)) +$(info C_FILES: $(C_FILES)) +$(info INCLUDE_DIRS: $(INCLUDE_DIRS)) +$(info DEFINES: $(DEFINES)) +$(info CC: $(CC)) +endif diff --git a/bootloader/mcuboot/boot/cypress/README.md b/bootloader/mcuboot/boot/cypress/README.md new file mode 100644 index 0000000..2b3e46b --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/README.md @@ -0,0 +1,84 @@ +### Port of MCUBoot library for evaluation with Cypress PSoC 6 chips + +### Disclaimer + +Given solution is included in `MCUboot` repository with purpose to demonstrate basic consepts and features of MCUboot library on Cypress PSoC 6 device. Applications are created per MCUboot library maintainers requirements. Implemetation differs from conventional and recomended by Cypress Semiconductors development flow for PSoC 6 devices. These applications are not recomended as a starting point for development and should not be considered as supported examples for PSoC 6 devices. + +Examples provided to use with **ModusToolbox® Software Environment** are a recommended reference point to start development of MCUboot based bootloaders for PSoC 6 devices. + +Refer to **Cypress Semiconductors** [github](https://github.com/cypresssemiconductorco) page to find examples. + +1. MCUboot-Based Basic Bootloader [mtb-example-psoc6-mcuboot-basic](https://github.com/cypresssemiconductorco/mtb-example-psoc6-mcuboot-basic) +2. MCUboot-Based Bootloader with Rollback to Factory App in External Flash [mtb-example-anycloud-mcuboot-rollback](https://github.com/cypresssemiconductorco/mtb-example-anycloud-mcuboot-rollback) + +### Solution description + +There are two applications implemented: +* MCUBootApp - PSoC6 MCUboot-based bootloading application; +* BlinkyApp - simple PSoC6 blinking LED application which is a target of BOOT/UPGRADE; + +The default flash map for MCUBootApp implemented is next: + +* [0x10000000, 0x10018000] - MCUBootApp (bootloader) area; +* [0x10018000, 0x10028000] - primary slot for BlinkyApp; +* [0x10028000, 0x10038000] - secondary slot for BlinkyApp; +* [0x10038000, 0x10039000] - scratch area; + +The flash map is defined through sysflash.h and cy_flash_map.c. + +It is also possible to place secondary (upgrade) slots in external memory module. In this case primary slot can be doubled in size. +For more details about External Memory usage, please refer to separate guiding document `MCUBootApp/ExternalMemory.md`. + +MCUBootApp checks image integrity with SHA256, image authenticity with EC256 digital signature verification and uses either completely software implementation of cryptographic functions or accelerated by hardware - both based on Mbed TLS Library. + +### Downloading solution's assets + +There is a set assets required: + +* MCUBooot Library (root repository) +* PSoC6 Peripheral Drivers Library (PDL) +* Mbed TLS Cryptographic Library + +Those are represented as submodules. + +To retrieve source code with subsequent submodules pull: + + git clone --recursive https://github.com/mcu-tools/mcuboot.git + +Submodules can also be updated and initialized separately: + + cd mcuboot + git submodule update --init --recursive + + + +### Building solution + +Root directory for build is **boot/cypress.** + +This folder contains make files infrastructure for building both MCUboot Bootloader and sample BlinkyApp application used for Bootloader demo functionality. + +Instructions on how to build and upload MCUBootApp bootloader application and sample user applocation are located in `Readme.md` files in corresponding folders. + +Supported platforms for `MCUboot`, `BlinkyApp`: + +* PSOC_062_2M +* PSOC_062_1M +* PSOC_062_512K + +### Build environment troubleshooting + +Following CLI / IDE are supported for project build: + +* Cygwin on Windows systems +* unix style shells on *nix systems +* Eclipse / ModusToolbox ("makefile project from existing source") + +*Make* - make sure it is added to system's `PATH` variable and correct path is first in the list; + +*Python/Python3* - make sure you have correct path referenced in `PATH`; + +*Msys2* - to use systems PATH navigate to msys2 folder, open `msys2_shell.cmd`, uncomment set `MSYS2_PATH_TYPE=inherit`, restart MSYS2 shell. + +This will inherit system's PATH so should find `python3.7` installed in regular way as well as imgtool and its dependencies. + diff --git a/bootloader/mcuboot/boot/cypress/common_libs.mk b/bootloader/mcuboot/boot/cypress/common_libs.mk new file mode 100644 index 0000000..f5d11f8 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/common_libs.mk @@ -0,0 +1,89 @@ +################################################################################ +# \file common_libs.mk +# \version 1.0 +# +# \brief +# Makefile to describe libraries needed for Cypress MCUBoot based applications. +# +################################################################################ +# \copyright +# Copyright 2018-2021 Cypress Semiconductor Corporation +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +################################################################################ + +include host.mk + +################################################################################ +# PDL library +################################################################################ +PSOC6_LIBS_PATH = $(PRJ_DIR)/libs + +ifeq ($(CORE),CM0P) +CORE_SIFFX=m0plus +else +CORE_SIFFX=m4 +endif + +# Collect source files for PDL +SOURCES_PDL := $(wildcard $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/drivers/source/*.c) +SOURCES_PDL += $(wildcard $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/source/*.c) + +# PDL startup related files +SOURCES_PDL_STARTUP := $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_$(CORE)/system_psoc6_c$(CORE_SIFFX).c + +# PDL related include directories +INCLUDE_DIRS_PDL := $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/drivers/include +INCLUDE_DIRS_PDL += $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip +INCLUDE_DIRS_PDL += $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include +INCLUDE_DIRS_PDL += $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/cmsis/include + +# PDL startup related files +INCLUDE_DIRS_PDL_STARTUP := $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB + +# core-libs related include directories +INCLUDE_DIRS_CORE_LIB := $(PSOC6_LIBS_PATH)/core-lib/include + +STARTUP_FILE := $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_$(CORE)/TOOLCHAIN_$(COMPILER)/startup_psoc6_$(PLATFORM_SUFFIX)_c$(CORE_SIFFX) + +ifeq ($(COMPILER), GCC_ARM) + ASM_FILES_STARTUP := $(STARTUP_FILE).S +else +$(error Only GCC ARM is supported at this moment) +endif + + +# Collected source files for libraries +SOURCES_LIBS := $(SOURCES_PDL) +SOURCES_LIBS += $(SOURCES_PDL_STARTUP) + +# Collected include directories for libraries +INCLUDE_DIRS_LIBS := $(addprefix -I,$(INCLUDE_DIRS_PDL)) +INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_PDL_STARTUP)) +INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_CORE_LIB)) + +ASM_FILES_PDL := +ifeq ($(COMPILER), GCC_ARM) +ASM_FILES_PDL += $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S +else +$(error Only GCC ARM is supported at this moment) +endif + +ASM_FILES_LIBS := $(ASM_FILES_PDL) + +# Add define for PDL version +DEFINES_PDL += -DPDL_VERSION=$(PDL_VERSION) + +DEFINES_LIBS := $(DEFINES_PLATFORM) +DEFINES_LIBS += $(DEFINES_PDL) diff --git a/bootloader/mcuboot/boot/cypress/cy_flash_pal/cy_flash_map.c b/bootloader/mcuboot/boot/cypress/cy_flash_pal/cy_flash_map.c new file mode 100644 index 0000000..af52bab --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/cy_flash_pal/cy_flash_map.c @@ -0,0 +1,547 @@ +/* + * Copyright (c) 2018 Nordic Semiconductor ASA + * Copyright (c) 2020 Cypress Semiconductor Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + /* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + /*******************************************************************************/ + +#ifdef MCUBOOT_HAVE_ASSERT_H +#include "mcuboot_config/mcuboot_assert.h" +#else +#include +#endif + +#include +#include +#include + +#include "mcuboot_config/mcuboot_config.h" +#include "flash_map_backend/flash_map_backend.h" +#include + +#include "bootutil/bootutil_log.h" + +#include "cy_pdl.h" + +#ifdef CY_BOOT_USE_EXTERNAL_FLASH +#include "cy_smif_psoc6.h" +#endif +/* + * For now, we only support one flash device. + * + * Pick a random device ID for it that's unlikely to collide with + * anything "real". + */ +#define FLASH_DEVICE_ID 111 +#define FLASH_MAP_ENTRY_MAGIC 0xd00dbeef + +#define FLASH_AREA_IMAGE_SECTOR_SIZE FLASH_AREA_IMAGE_SCRATCH_SIZE + +#ifndef CY_BOOTLOADER_START_ADDRESS +#define CY_BOOTLOADER_START_ADDRESS (0x10000000) +#endif + +#ifndef CY_BOOT_INTERNAL_FLASH_ERASE_VALUE +/* This is the value of internal flash bytes after an erase */ +#define CY_BOOT_INTERNAL_FLASH_ERASE_VALUE (0x00) +#endif + +#ifndef CY_BOOT_EXTERNAL_FLASH_ERASE_VALUE +/* This is the value of external flash bytes after an erase */ +#define CY_BOOT_EXTERNAL_FLASH_ERASE_VALUE (0xff) +#endif + +#ifdef CY_FLASH_MAP_EXT_DESC +/* Nothing to be there when external FlashMap Descriptors are used */ +#else +static struct flash_area bootloader = +{ + .fa_id = FLASH_AREA_BOOTLOADER, + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, + .fa_off = CY_BOOTLOADER_START_ADDRESS, + .fa_size = CY_BOOT_BOOTLOADER_SIZE +}; + +static struct flash_area primary_1 = +{ + .fa_id = FLASH_AREA_IMAGE_PRIMARY(0), + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, + .fa_off = CY_FLASH_BASE + CY_BOOT_BOOTLOADER_SIZE, + .fa_size = CY_BOOT_PRIMARY_1_SIZE +}; + +#ifndef CY_BOOT_USE_EXTERNAL_FLASH +static struct flash_area secondary_1 = +{ + .fa_id = FLASH_AREA_IMAGE_SECONDARY(0), + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, + .fa_off = CY_FLASH_BASE +\ + CY_BOOT_BOOTLOADER_SIZE +\ + CY_BOOT_PRIMARY_1_SIZE, + .fa_size = CY_BOOT_SECONDARY_1_SIZE +}; +#else +static struct flash_area secondary_1 = +{ + .fa_id = FLASH_AREA_IMAGE_SECONDARY(0), + .fa_device_id = FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX), + .fa_off = CY_SMIF_BASE_MEM_OFFSET, + .fa_size = CY_BOOT_SECONDARY_1_SIZE +}; +#endif +#if (MCUBOOT_IMAGE_NUMBER == 2) /* if dual-image */ +static struct flash_area primary_2 = +{ + .fa_id = FLASH_AREA_IMAGE_PRIMARY(1), + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, + .fa_off = CY_FLASH_BASE +\ + CY_BOOT_BOOTLOADER_SIZE +\ + CY_BOOT_PRIMARY_1_SIZE +\ + CY_BOOT_SECONDARY_1_SIZE, + .fa_size = CY_BOOT_PRIMARY_2_SIZE +}; + +static struct flash_area secondary_2 = +{ + .fa_id = FLASH_AREA_IMAGE_SECONDARY(1), + /* it is for external flash memory + .fa_device_id = FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX), */ +#ifndef CY_BOOT_USE_EXTERNAL_FLASH + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, + .fa_off = CY_FLASH_BASE +\ + CY_BOOT_BOOTLOADER_SIZE +\ + CY_BOOT_PRIMARY_1_SIZE +\ + CY_BOOT_SECONDARY_1_SIZE +\ + CY_BOOT_PRIMARY_2_SIZE, +#else + .fa_device_id = FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX), + .fa_off = CY_SMIF_BASE_MEM_OFFSET + 0x40000, +#endif + .fa_size = CY_BOOT_SECONDARY_2_SIZE +}; +#endif +#endif + +#ifdef MCUBOOT_SWAP_USING_SCRATCH +static struct flash_area scratch = +{ + .fa_id = FLASH_AREA_IMAGE_SCRATCH, + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, +#if (MCUBOOT_IMAGE_NUMBER == 1) /* if single-image */ + .fa_off = CY_FLASH_BASE +\ + CY_BOOT_BOOTLOADER_SIZE +\ + CY_BOOT_PRIMARY_1_SIZE +\ + CY_BOOT_SECONDARY_1_SIZE, +#elif (MCUBOOT_IMAGE_NUMBER == 2) /* if dual-image */ + .fa_off = CY_FLASH_BASE +\ + CY_BOOT_BOOTLOADER_SIZE +\ + CY_BOOT_PRIMARY_1_SIZE +\ + CY_BOOT_SECONDARY_1_SIZE +\ + CY_BOOT_PRIMARY_2_SIZE +\ + CY_BOOT_SECONDARY_2_SIZE, +#endif + .fa_size = CY_BOOT_SCRATCH_SIZE +}; +#endif + +#ifdef CY_FLASH_MAP_EXT_DESC +/* Use external Flash Map Descriptors */ +extern struct flash_area *boot_area_descs[]; +#else +struct flash_area *boot_area_descs[] = +{ + &bootloader, + &primary_1, + &secondary_1, +#if (MCUBOOT_IMAGE_NUMBER == 2) /* if dual-image */ + &primary_2, + &secondary_2, +#endif +#ifdef MCUBOOT_SWAP_USING_SCRATCH + &scratch, +#endif + NULL +}; +#endif + +/* Returns device flash start based on supported fa_id */ +int flash_device_base(uint8_t fd_id, uintptr_t *ret) +{ + if (fd_id != FLASH_DEVICE_INTERNAL_FLASH) { + BOOT_LOG_ERR("invalid flash ID %d; expected %d", + fd_id, FLASH_DEVICE_INTERNAL_FLASH); + return -1; + } + *ret = CY_FLASH_BASE; + return 0; +} + +/* Opens the area for use. id is one of the `fa_id`s */ +int flash_area_open(uint8_t id, const struct flash_area **fa) +{ + int ret = -1; + uint32_t i = 0; + + while(NULL != boot_area_descs[i]) + { + if(id == boot_area_descs[i]->fa_id) + { + *fa = boot_area_descs[i]; + ret = 0; + break; + } + i++; + } + return ret; +} + +void flash_area_close(const struct flash_area *fa) +{ + (void)fa;/* Nothing to do there */ +} + +/* +* Reads `len` bytes of flash memory at `off` to the buffer at `dst` +*/ +int flash_area_read(const struct flash_area *fa, uint32_t off, void *dst, + uint32_t len) +{ + int rc = 0; + size_t addr; + + /* check if requested offset not less then flash area (fa) start */ + assert(off < fa->fa_off); + assert(off + len < fa->fa_off); + /* convert to absolute address inside a device*/ + addr = fa->fa_off + off; + + if (fa->fa_device_id == FLASH_DEVICE_INTERNAL_FLASH) + { + /* flash read by simple memory copying */ + memcpy((void *)dst, (const void*)addr, (size_t)len); + } +#ifdef CY_BOOT_USE_EXTERNAL_FLASH + else if ((fa->fa_device_id & FLASH_DEVICE_EXTERNAL_FLAG) == FLASH_DEVICE_EXTERNAL_FLAG) + { + rc = psoc6_smif_read(fa, addr, dst, len); + } +#endif + else + { + /* incorrect/non-existing flash device id */ + rc = -1; + } + + if (rc != 0) { + BOOT_LOG_ERR("Flash area read error, rc = %d", (int)rc); + } + return rc; +} + +/* +* Writes `len` bytes of flash memory at `off` from the buffer at `src` + */ +int flash_area_write(const struct flash_area *fa, uint32_t off, + const void *src, uint32_t len) +{ + cy_en_flashdrv_status_t rc = CY_FLASH_DRV_SUCCESS; + size_t write_start_addr; + size_t write_end_addr; + const uint32_t * row_ptr = NULL; + + assert(off < fa->fa_off); + assert(off + len < fa->fa_off); + + /* convert to absolute address inside a device */ + write_start_addr = fa->fa_off + off; + write_end_addr = fa->fa_off + off + len; + + if (fa->fa_device_id == FLASH_DEVICE_INTERNAL_FLASH) + { + uint32_t row_number = 0; + uint32_t row_addr = 0; + + assert(!(len % CY_FLASH_SIZEOF_ROW)); + assert(!(write_start_addr % CY_FLASH_SIZEOF_ROW)); + + row_number = (write_end_addr - write_start_addr) / CY_FLASH_SIZEOF_ROW; + row_addr = write_start_addr; + + row_ptr = (uint32_t *) src; + + for (uint32_t i = 0; i < row_number; i++) + { + rc = Cy_Flash_WriteRow(row_addr, row_ptr); + + row_addr += (uint32_t) CY_FLASH_SIZEOF_ROW; + row_ptr = row_ptr + CY_FLASH_SIZEOF_ROW / 4; + } + } +#ifdef CY_BOOT_USE_EXTERNAL_FLASH + else if ((fa->fa_device_id & FLASH_DEVICE_EXTERNAL_FLAG) == FLASH_DEVICE_EXTERNAL_FLAG) + { + rc = psoc6_smif_write(fa, write_start_addr, src, len); + } +#endif + else + { + /* incorrect/non-existing flash device id */ + rc = -1; + } + + return (int) rc; +} + +/*< Erases `len` bytes of flash memory at `off` */ +int flash_area_erase(const struct flash_area *fa, uint32_t off, uint32_t len) +{ + cy_en_flashdrv_status_t rc = CY_FLASH_DRV_SUCCESS; + size_t erase_start_addr; + size_t erase_end_addr; + + assert(off < fa->fa_off); + assert(off + len < fa->fa_off); + assert(!(len % CY_FLASH_SIZEOF_ROW)); + + /* convert to absolute address inside a device*/ + erase_start_addr = fa->fa_off + off; + erase_end_addr = fa->fa_off + off + len; + + if (fa->fa_device_id == FLASH_DEVICE_INTERNAL_FLASH) + { + int row_number = 0; + uint32_t row_addr = 0; + + row_number = (erase_end_addr - erase_start_addr) / CY_FLASH_SIZEOF_ROW; + + while (row_number != 0) + { + row_number--; + row_addr = erase_start_addr + row_number * (uint32_t) CY_FLASH_SIZEOF_ROW; + rc = Cy_Flash_EraseRow(row_addr); + } + } +#ifdef CY_BOOT_USE_EXTERNAL_FLASH + else if ((fa->fa_device_id & FLASH_DEVICE_EXTERNAL_FLAG) == FLASH_DEVICE_EXTERNAL_FLAG) + { + rc = psoc6_smif_erase(erase_start_addr, len); + } +#endif + else + { + /* incorrect/non-existing flash device id */ + rc = -1; + } + return (int) rc; +} + +/*< Returns this `flash_area`s alignment */ +uint32_t flash_area_align(const struct flash_area *fa) +{ + int ret = -1; + if (fa->fa_device_id == FLASH_DEVICE_INTERNAL_FLASH) + { + ret = CY_FLASH_ALIGN; + } +#ifdef CY_BOOT_USE_EXTERNAL_FLASH + else if ((fa->fa_device_id & FLASH_DEVICE_EXTERNAL_FLAG) == FLASH_DEVICE_EXTERNAL_FLAG) + { + return qspi_get_prog_size(); + } +#endif + else + { + /* incorrect/non-existing flash device id */ + ret = -1; + } + return ret; +} + +#ifdef MCUBOOT_USE_FLASH_AREA_GET_SECTORS +/*< Initializes an array of flash_area elements for the slot's sectors */ +int flash_area_to_sectors(int idx, int *cnt, struct flash_area *fa) +{ + int rc = 0; + + if (fa->fa_device_id == FLASH_DEVICE_INTERNAL_FLASH) + { + (void)idx; + (void)cnt; + rc = 0; + } +#ifdef CY_BOOT_USE_EXTERNAL_FLASH + else if ((fa->fa_device_id & FLASH_DEVICE_EXTERNAL_FLAG) == FLASH_DEVICE_EXTERNAL_FLAG) + { + (void)idx; + (void)cnt; + rc = 0; + } +#endif + else + { + /* incorrect/non-existing flash device id */ + rc = -1; + } + return rc; +} +#endif + +/* + * This depends on the mappings defined in sysflash.h. + * MCUBoot uses continuous numbering for the primary slot, the secondary slot, + * and the scratch while zephyr might number it differently. + */ +int flash_area_id_from_multi_image_slot(int image_index, int slot) +{ + switch (slot) { + case 0: return FLASH_AREA_IMAGE_PRIMARY(image_index); + case 1: return FLASH_AREA_IMAGE_SECONDARY(image_index); + case 2: return FLASH_AREA_IMAGE_SCRATCH; + } + + return -1; /* flash_area_open will fail on that */ +} + +int flash_area_id_from_image_slot(int slot) +{ + return flash_area_id_from_multi_image_slot(0, slot); +} + +int flash_area_id_to_multi_image_slot(int image_index, int area_id) +{ + if (area_id == FLASH_AREA_IMAGE_PRIMARY(image_index)) { + return 0; + } + if (area_id == FLASH_AREA_IMAGE_SECONDARY(image_index)) { + return 1; + } + + return -1; +} + +uint8_t flash_area_erased_val(const struct flash_area *fap) +{ + int ret = 0; + + if (fap->fa_device_id == FLASH_DEVICE_INTERNAL_FLASH) + { + ret = CY_BOOT_INTERNAL_FLASH_ERASE_VALUE; + } +#ifdef CY_BOOT_USE_EXTERNAL_FLASH + else if ((fap->fa_device_id & FLASH_DEVICE_EXTERNAL_FLAG) == FLASH_DEVICE_EXTERNAL_FLAG) + { + ret = CY_BOOT_EXTERNAL_FLASH_ERASE_VALUE; + } +#endif + else + { + assert(false) ; + } + + return ret ; +} + +int flash_area_read_is_empty(const struct flash_area *fa, uint32_t off, + void *dst, uint32_t len) +{ + uint8_t *mem_dest; + int rc; + + mem_dest = (uint8_t *)dst; + rc = flash_area_read(fa, off, dst, len); + if (rc) { + return -1; + } + + for (uint8_t i = 0; i < len; i++) { + if (mem_dest[i] != flash_area_erased_val(fa)) { + return 0; + } + } + return 1; +} + +#ifdef MCUBOOT_USE_FLASH_AREA_GET_SECTORS +int flash_area_get_sectors(int idx, uint32_t *cnt, struct flash_sector *ret) +{ + int rc = 0; + uint32_t i = 0; + struct flash_area *fa = NULL; + + while(NULL != boot_area_descs[i]) + { + if(idx == boot_area_descs[i]->fa_id) + { + fa = boot_area_descs[i]; + break; + } + i++; + } + + if(NULL != boot_area_descs[i]) + { + size_t sector_size = 0; + + if(fa->fa_device_id == FLASH_DEVICE_INTERNAL_FLASH) + { + sector_size = CY_FLASH_SIZEOF_ROW; + } +#ifdef CY_BOOT_USE_EXTERNAL_FLASH + else if((fa->fa_device_id & FLASH_DEVICE_EXTERNAL_FLAG) == FLASH_DEVICE_EXTERNAL_FLAG) + { + /* implement for SMIF */ + /* lets assume they are equal */ + sector_size = CY_FLASH_SIZEOF_ROW; + } +#endif + else + { + rc = -1; + } + + if(0 == rc) + { + uint32_t addr = 0; + size_t sectors_n = 0; + + sectors_n = (fa->fa_size + (sector_size - 1)) / sector_size; + assert(sectors_n <= *cnt); + + addr = fa->fa_off; + for(i = 0; i < sectors_n; i++) + { + ret[i].fs_size = sector_size ; + ret[i].fs_off = addr ; + addr += sector_size ; + } + + *cnt = sectors_n; + } + } + else + { + rc = -1; + } + + return rc; +} +#endif diff --git a/bootloader/mcuboot/boot/cypress/cy_flash_pal/cy_smif_psoc6.c b/bootloader/mcuboot/boot/cypress/cy_flash_pal/cy_smif_psoc6.c new file mode 100644 index 0000000..62f7137 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/cy_flash_pal/cy_smif_psoc6.c @@ -0,0 +1,143 @@ +/***************************************************************************//** +* \file cy_smif_psoc6.c +* \version 1.0 +* +* \brief +* This is the source file of external flash driver adoption layer between PSoC6 +* and standard MCUBoot code. +* +******************************************************************************** +* \copyright +* +* (c) 2020, Cypress Semiconductor Corporation +* or a subsidiary of Cypress Semiconductor Corporation. All rights +* reserved. +* +* This software, including source code, documentation and related +* materials ("Software"), is owned by Cypress Semiconductor +* Corporation or one of its subsidiaries ("Cypress") and is protected by +* and subject to worldwide patent protection (United States and foreign), +* United States copyright laws and international treaty provisions. +* Therefore, you may use this Software only as provided in the license +* agreement accompanying the software package from which you +* obtained this Software ("EULA"). +* +* If no EULA applies, Cypress hereby grants you a personal, non- +* exclusive, non-transferable license to copy, modify, and compile the +* Software source code solely for use in connection with Cypress?s +* integrated circuit products. Any reproduction, modification, translation, +* compilation, or representation of this Software except as specified +* above is prohibited without the express written permission of Cypress. +* +* Disclaimer: THIS SOFTWARE IS PROVIDED AS-IS, WITH NO +* WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING, +* BUT NOT LIMITED TO, NONINFRINGEMENT, IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A +* PARTICULAR PURPOSE. Cypress reserves the right to make +* changes to the Software without notice. Cypress does not assume any +* liability arising out of the application or use of the Software or any +* product or circuit described in the Software. Cypress does not +* authorize its products for use in any products where a malfunction or +* failure of the Cypress product may reasonably be expected to result in +* significant property damage, injury or death ("High Risk Product"). By +* including Cypress's product in a High Risk Product, the manufacturer +* of such system or application assumes all risk of such use and in doing +* so agrees to indemnify Cypress against all liability. +* +******************************************************************************/ +#include "string.h" +#include "stdlib.h" +#include "stdbool.h" + +#ifdef MCUBOOT_HAVE_ASSERT_H +#include "mcuboot_config/mcuboot_assert.h" +#else +#include +#endif + +#include "flash_map_backend/flash_map_backend.h" +#include + +#include "cy_device_headers.h" +#include "cy_smif_psoc6.h" +#include "cy_flash.h" +#include "cy_syspm.h" + +#include "flash_qspi.h" + +#define PSOC6_WR_SUCCESS (0) +#define PSOC6_WR_ERROR_INVALID_PARAMETER (1) +#define PSOC6_WR_ERROR_FLASH_WRITE (2) + +#define PSOC6_FLASH_ERASE_BLOCK_SIZE CY_FLASH_SIZEOF_ROW /* PSoC6 Flash erases by Row */ + +int psoc6_smif_read(const struct flash_area *fap, + off_t addr, + void *data, + size_t len) +{ + int rc = -1; + cy_stc_smif_mem_config_t *cfg; + cy_en_smif_status_t st; + uint32_t address; + + cfg = qspi_get_memory_config(FLASH_DEVICE_GET_EXT_INDEX(fap->fa_device_id)); + + address = addr - CY_SMIF_BASE_MEM_OFFSET; + + st = Cy_SMIF_MemRead(qspi_get_device(), cfg, address, data, len, qspi_get_context()); + if (st == CY_SMIF_SUCCESS) { + rc = 0; + } + return rc; +} + +int psoc6_smif_write(const struct flash_area *fap, + off_t addr, + const void *data, + size_t len) +{ + int rc = -1; + cy_en_smif_status_t st; + cy_stc_smif_mem_config_t *cfg; + uint32_t address; + + cfg = qspi_get_memory_config(FLASH_DEVICE_GET_EXT_INDEX(fap->fa_device_id)); + + address = addr - CY_SMIF_BASE_MEM_OFFSET; + + st = Cy_SMIF_MemWrite(qspi_get_device(), cfg, address, data, len, qspi_get_context()); + if (st == CY_SMIF_SUCCESS) { + rc = 0; + } + return rc; +} + +int psoc6_smif_erase(off_t addr, size_t size) +{ + int rc = -1; + cy_en_smif_status_t st; + uint32_t address; + + /* It is erase sector-only + * + * There is no power-safe way to erase flash partially + * this leads upgrade slots have to be at least + * eraseSectorSize far from each other; + */ + cy_stc_smif_mem_config_t *memCfg = qspi_get_memory_config(0); + + address = (addr - CY_SMIF_BASE_MEM_OFFSET ) & ~((uint32_t)(memCfg->deviceCfg->eraseSize - 1u)); + + (void)size; + + st = Cy_SMIF_MemEraseSector(qspi_get_device(), + memCfg, + address, + memCfg->deviceCfg->eraseSize, + qspi_get_context()); + if (st == CY_SMIF_SUCCESS) { + rc = 0; + } + return rc; +} diff --git a/bootloader/mcuboot/boot/cypress/cy_flash_pal/flash_qspi/flash_qspi.c b/bootloader/mcuboot/boot/cypress/cy_flash_pal/flash_qspi/flash_qspi.c new file mode 100644 index 0000000..e1f6c27 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/cy_flash_pal/flash_qspi/flash_qspi.c @@ -0,0 +1,494 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +/***************************************************************************//** +* \file flash_qspi.c +* \version 1.0 +* +* \brief +* This is the source file of external flash driver adaptation layer between PSoC6 +* and standard MCUBoot code. +* +******************************************************************************** +* \copyright +* +* (c) 2020, Cypress Semiconductor Corporation +* or a subsidiary of Cypress Semiconductor Corporation. All rights +* reserved. +* +* This software, including source code, documentation and related +* materials ("Software"), is owned by Cypress Semiconductor +* Corporation or one of its subsidiaries ("Cypress") and is protected by +* and subject to worldwide patent protection (United States and foreign), +* United States copyright laws and international treaty provisions. +* Therefore, you may use this Software only as provided in the license +* agreement accompanying the software package from which you +* obtained this Software ("EULA"). +* +* If no EULA applies, Cypress hereby grants you a personal, non- +* exclusive, non-transferable license to copy, modify, and compile the +* Software source code solely for use in connection with Cypress?s +* integrated circuit products. Any reproduction, modification, translation, +* compilation, or representation of this Software except as specified +* above is prohibited without the express written permission of Cypress. +* +* Disclaimer: THIS SOFTWARE IS PROVIDED AS-IS, WITH NO +* WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING, +* BUT NOT LIMITED TO, NONINFRINGEMENT, IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A +* PARTICULAR PURPOSE. Cypress reserves the right to make +* changes to the Software without notice. Cypress does not assume any +* liability arising out of the application or use of the Software or any +* product or circuit described in the Software. Cypress does not +* authorize its products for use in any products where a malfunction or +* failure of the Cypress product may reasonably be expected to result in +* significant property damage, injury or death ("High Risk Product"). By +* including Cypress's product in a High Risk Product, the manufacturer +* of such system or application assumes all risk of such use and in doing +* so agrees to indemnify Cypress against all liability. +* +******************************************************************************/ +#include "cy_pdl.h" +#include +#include "flash_qspi.h" + +#define CY_SMIF_SYSCLK_HFCLK_DIVIDER CY_SYSCLK_CLKHF_DIVIDE_BY_4 + +/* This is the board specific stuff that should align with your board. + * + * QSPI resources: + * + * SS0 - P11_2 + * SS1 - P11_1 + * SS2 - P11_0 + * SS3 - P12_4 + * + * D3 - P11_3 + * D2 - P11_4 + * D1 - P11_5 + * D0 - P11_6 + * + * SCK - P11_7 + * + * SMIF Block - SMIF0 + * + */ + +/* SMIF SlaveSelect Configurations */ +struct qspi_ss_config +{ + GPIO_PRT_Type* SS_Port; + int SS_Pin; + en_hsiom_sel_t SS_Mux; +}; + +#if (defined(PSOC_064_2M) || \ + defined(PSOC_064_1M) || \ + defined(PSOC_062_2M) || \ + defined(PSOC_062_1M)) + #define CY_BOOTLOADER_SMIF_SS_CFG_NUM 4 +#elif defined(PSOC_064_512K) || defined(PSOC_062_512K) + #define CY_BOOTLOADER_SMIF_SS_CFG_NUM 3 +#else +#error "Platform device name is unsupported." +#endif +struct qspi_ss_config qspi_SS_Configuration[CY_BOOTLOADER_SMIF_SS_CFG_NUM] = +{ + { + .SS_Port = GPIO_PRT11, + .SS_Pin = 2, + .SS_Mux = P11_2_SMIF_SPI_SELECT0 + }, + { + .SS_Port = GPIO_PRT11, + .SS_Pin = 1, + .SS_Mux = P11_1_SMIF_SPI_SELECT1 + }, + { + .SS_Port = GPIO_PRT11, + .SS_Pin = 0, + .SS_Mux = P11_0_SMIF_SPI_SELECT2 + }, +#if(CY_BOOTLOADER_SMIF_SS_CFG_NUM > 3) + { + .SS_Port = GPIO_PRT12, + .SS_Pin = 4, + .SS_Mux = P12_4_SMIF_SPI_SELECT3 + } +#endif +}; + +static GPIO_PRT_Type *D3Port = GPIO_PRT11; +static int D3Pin = 3; +static en_hsiom_sel_t D3MuxPort = P11_3_SMIF_SPI_DATA3; + +static GPIO_PRT_Type *D2Port = GPIO_PRT11; +static int D2Pin = 4; +static en_hsiom_sel_t D2MuxPort = P11_4_SMIF_SPI_DATA2; + +static GPIO_PRT_Type *D1Port = GPIO_PRT11; +static int D1Pin = 5; +static en_hsiom_sel_t D1MuxPort = P11_5_SMIF_SPI_DATA1; + +static GPIO_PRT_Type *D0Port = GPIO_PRT11; +static int D0Pin = 6; +static en_hsiom_sel_t D0MuxPort = P11_6_SMIF_SPI_DATA0; + +static GPIO_PRT_Type *SCKPort = GPIO_PRT11; +static int SCKPin = 7; +static en_hsiom_sel_t SCKMuxPort = P11_7_SMIF_SPI_CLK; + +static SMIF_Type *QSPIPort = SMIF0; + +cy_stc_smif_mem_cmd_t sfdpcmd = +{ + .command = 0x5A, + .cmdWidth = CY_SMIF_WIDTH_SINGLE, + .addrWidth = CY_SMIF_WIDTH_SINGLE, + .mode = 0xFFFFFFFFU, + .dummyCycles = 8, + .dataWidth = CY_SMIF_WIDTH_SINGLE, +}; + +static cy_stc_smif_mem_cmd_t rdcmd0; +static cy_stc_smif_mem_cmd_t wrencmd0; +static cy_stc_smif_mem_cmd_t wrdiscmd0; +static cy_stc_smif_mem_cmd_t erasecmd0; +static cy_stc_smif_mem_cmd_t chiperasecmd0; +static cy_stc_smif_mem_cmd_t pgmcmd0; +static cy_stc_smif_mem_cmd_t readsts0; +static cy_stc_smif_mem_cmd_t readstsqecmd0; +static cy_stc_smif_mem_cmd_t writestseqcmd0; + +static cy_stc_smif_mem_device_cfg_t dev_sfdp_0 = +{ + .numOfAddrBytes = 4, + .readSfdpCmd = &sfdpcmd, + .readCmd = &rdcmd0, + .writeEnCmd = &wrencmd0, + .writeDisCmd = &wrdiscmd0, + .programCmd = &pgmcmd0, + .eraseCmd = &erasecmd0, + .chipEraseCmd = &chiperasecmd0, + .readStsRegWipCmd = &readsts0, + .readStsRegQeCmd = &readstsqecmd0, + .writeStsRegQeCmd = &writestseqcmd0, +}; + +static cy_stc_smif_mem_config_t mem_sfdp_0 = +{ + /* The base address the memory slave is mapped to in the PSoC memory map. + Valid when the memory-mapped mode is enabled. */ + .baseAddress = 0x18000000U, + /* The size allocated in the PSoC memory map, for the memory slave device. + The size is allocated from the base address. Valid when the memory mapped mode is enabled. */ +/* .memMappedSize = 0x4000000U, */ + .flags = CY_SMIF_FLAG_DETECT_SFDP, + .slaveSelect = CY_SMIF_SLAVE_SELECT_0, + .dataSelect = CY_SMIF_DATA_SEL0, + .deviceCfg = &dev_sfdp_0 +}; + +cy_stc_smif_mem_config_t *mems_sfdp[1] = +{ + &mem_sfdp_0 +}; + +/* make it exported if used in TOC (cy_serial_flash_prog.c) */ +/* cy_stc_smif_block_config_t smifBlockConfig_sfdp = */ +static cy_stc_smif_block_config_t smifBlockConfig_sfdp = +{ + .memCount = 1, + .memConfig = mems_sfdp, +}; + +static cy_stc_smif_block_config_t *smif_blk_config; + +static cy_stc_smif_context_t QSPI_context; + +cy_stc_smif_config_t const QSPI_config = +{ + .mode = CY_SMIF_NORMAL, + .deselectDelay = 1, + .rxClockSel = CY_SMIF_SEL_INV_INTERNAL_CLK, + .blockEvent = CY_SMIF_BUS_ERROR +}; + +cy_stc_sysint_t smifIntConfig = +{/* ATTENTION: make sure proper Interrupts configured for CM0p or M4 cores */ + .intrSrc = NvicMux7_IRQn, + .cm0pSrc = smif_interrupt_IRQn, + .intrPriority = 1 +}; + +/* SMIF pinouts configurations */ +static cy_stc_gpio_pin_config_t QSPI_SS_config = +{ + .outVal = 1, + .driveMode = CY_GPIO_DM_STRONG_IN_OFF, + .hsiom = P11_2_SMIF_SPI_SELECT0, /* lets use SS0 by default */ + .intEdge = CY_GPIO_INTR_DISABLE, + .intMask = 0UL, + .vtrip = CY_GPIO_VTRIP_CMOS, + .slewRate = CY_GPIO_SLEW_FAST, + .driveSel = CY_GPIO_DRIVE_1_2, + .vregEn = 0UL, + .ibufMode = 0UL, + .vtripSel = 0UL, + .vrefSel = 0UL, + .vohSel = 0UL, +}; +const cy_stc_gpio_pin_config_t QSPI_DATA3_config = +{ + .outVal = 1, + .driveMode = CY_GPIO_DM_STRONG, + .hsiom = P11_3_SMIF_SPI_DATA3, + .intEdge = CY_GPIO_INTR_DISABLE, + .intMask = 0UL, + .vtrip = CY_GPIO_VTRIP_CMOS, + .slewRate = CY_GPIO_SLEW_FAST, + .driveSel = CY_GPIO_DRIVE_1_2, + .vregEn = 0UL, + .ibufMode = 0UL, + .vtripSel = 0UL, + .vrefSel = 0UL, + .vohSel = 0UL, +}; +const cy_stc_gpio_pin_config_t QSPI_DATA2_config = +{ + .outVal = 1, + .driveMode = CY_GPIO_DM_STRONG, + .hsiom = P11_4_SMIF_SPI_DATA2, + .intEdge = CY_GPIO_INTR_DISABLE, + .intMask = 0UL, + .vtrip = CY_GPIO_VTRIP_CMOS, + .slewRate = CY_GPIO_SLEW_FAST, + .driveSel = CY_GPIO_DRIVE_1_2, + .vregEn = 0UL, + .ibufMode = 0UL, + .vtripSel = 0UL, + .vrefSel = 0UL, + .vohSel = 0UL, +}; +const cy_stc_gpio_pin_config_t QSPI_DATA1_config = +{ + .outVal = 1, + .driveMode = CY_GPIO_DM_STRONG, + .hsiom = P11_5_SMIF_SPI_DATA1, + .intEdge = CY_GPIO_INTR_DISABLE, + .intMask = 0UL, + .vtrip = CY_GPIO_VTRIP_CMOS, + .slewRate = CY_GPIO_SLEW_FAST, + .driveSel = CY_GPIO_DRIVE_1_2, + .vregEn = 0UL, + .ibufMode = 0UL, + .vtripSel = 0UL, + .vrefSel = 0UL, + .vohSel = 0UL, +}; +const cy_stc_gpio_pin_config_t QSPI_DATA0_config = +{ + .outVal = 1, + .driveMode = CY_GPIO_DM_STRONG, + .hsiom = P11_6_SMIF_SPI_DATA0, + .intEdge = CY_GPIO_INTR_DISABLE, + .intMask = 0UL, + .vtrip = CY_GPIO_VTRIP_CMOS, + .slewRate = CY_GPIO_SLEW_FAST, + .driveSel = CY_GPIO_DRIVE_1_2, + .vregEn = 0UL, + .ibufMode = 0UL, + .vtripSel = 0UL, + .vrefSel = 0UL, + .vohSel = 0UL, +}; +const cy_stc_gpio_pin_config_t QSPI_SCK_config = +{ + .outVal = 1, + .driveMode = CY_GPIO_DM_STRONG_IN_OFF, + .hsiom = P11_7_SMIF_SPI_CLK, + .intEdge = CY_GPIO_INTR_DISABLE, + .intMask = 0UL, + .vtrip = CY_GPIO_VTRIP_CMOS, + .slewRate = CY_GPIO_SLEW_FAST, + .driveSel = CY_GPIO_DRIVE_1_2, + .vregEn = 0UL, + .ibufMode = 0UL, + .vtripSel = 0UL, + .vrefSel = 0UL, + .vohSel = 0UL, +}; + +void Isr_SMIF(void) +{ + Cy_SMIF_Interrupt(QSPIPort, &QSPI_context); +} + +cy_en_smif_status_t qspi_init_hardware() +{ + cy_en_smif_status_t st; + + + Cy_GPIO_Pin_Init(D3Port, D3Pin, &QSPI_DATA3_config); + Cy_GPIO_SetHSIOM(D3Port, D3Pin, D3MuxPort); + + Cy_GPIO_Pin_Init(D2Port, D2Pin, &QSPI_DATA2_config); + Cy_GPIO_SetHSIOM(D2Port, D2Pin, D2MuxPort); + + Cy_GPIO_Pin_Init(D1Port, D1Pin, &QSPI_DATA1_config); + Cy_GPIO_SetHSIOM(D1Port, D1Pin, D1MuxPort); + + Cy_GPIO_Pin_Init(D0Port, D0Pin, &QSPI_DATA0_config); + Cy_GPIO_SetHSIOM(D0Port, D0Pin, D0MuxPort); + + Cy_GPIO_Pin_Init(SCKPort, SCKPin, &QSPI_SCK_config); + Cy_GPIO_SetHSIOM(SCKPort, SCKPin, SCKMuxPort); + + Cy_SysClk_ClkHfSetSource(CY_SYSCLK_CLKHF_IN_CLKPATH2, CY_SYSCLK_CLKHF_IN_CLKPATH0); + Cy_SysClk_ClkHfSetDivider(CY_SYSCLK_CLKHF_IN_CLKPATH2, CY_SMIF_SYSCLK_HFCLK_DIVIDER); + Cy_SysClk_ClkHfEnable(CY_SYSCLK_CLKHF_IN_CLKPATH2); + + /* + * Setup the interrupt for the SMIF block. For the CM0 there + * is a two stage process to setup the interrupts. + */ + Cy_SysInt_Init(&smifIntConfig, Isr_SMIF); + + st = Cy_SMIF_Init(QSPIPort, &QSPI_config, 1000, &QSPI_context); + if (st != CY_SMIF_SUCCESS) + { + return st; + } + NVIC_EnableIRQ(smifIntConfig.intrSrc); /* Finally, Enable the SMIF interrupt */ + + Cy_SMIF_Enable(QSPIPort, &QSPI_context); + + return CY_SMIF_SUCCESS; +} + +cy_stc_smif_mem_config_t *qspi_get_memory_config(int index) +{ + return smif_blk_config->memConfig[index]; +} + +SMIF_Type *qspi_get_device() +{ + return QSPIPort; +} + +cy_stc_smif_context_t *qspi_get_context() +{ + return &QSPI_context; +} + +cy_en_smif_status_t qspi_init(cy_stc_smif_block_config_t *blk_config) +{ + cy_en_smif_status_t st; + + st = qspi_init_hardware(); + if (st == CY_SMIF_SUCCESS) + { + smif_blk_config = blk_config; + st = Cy_SMIF_MemInit(QSPIPort, smif_blk_config, &QSPI_context); + } + return st; +} + +cy_en_smif_status_t qspi_init_sfdp(uint32_t smif_id) +{ + cy_en_smif_status_t stat = CY_SMIF_SUCCESS; + + cy_stc_smif_mem_config_t **memCfg = smifBlockConfig_sfdp.memConfig; + + GPIO_PRT_Type *SS_Port; + int SS_Pin; + en_hsiom_sel_t SS_MuxPort; + + switch(smif_id) + { + case 1: + (*memCfg)->slaveSelect = CY_SMIF_SLAVE_SELECT_0; + break; + case 2: + (*memCfg)->slaveSelect = CY_SMIF_SLAVE_SELECT_1; + break; + case 3: + (*memCfg)->slaveSelect = CY_SMIF_SLAVE_SELECT_2; + break; +#if(CY_BOOTLOADER_SMIF_SS_CFG_NUM > 3) + case 4: + (*memCfg)->slaveSelect = CY_SMIF_SLAVE_SELECT_3; + break; +#endif + default: + stat = -1; + break; + } + + if(CY_SMIF_SUCCESS == stat) + { + SS_Port = qspi_SS_Configuration[smif_id-1].SS_Port; + SS_Pin = qspi_SS_Configuration[smif_id-1].SS_Pin; + SS_MuxPort = qspi_SS_Configuration[smif_id-1].SS_Mux; + + QSPI_SS_config.hsiom = SS_MuxPort; + + Cy_GPIO_Pin_Init(SS_Port, SS_Pin, &QSPI_SS_config); + Cy_GPIO_SetHSIOM(SS_Port, SS_Pin, SS_MuxPort); + + stat = qspi_init(&smifBlockConfig_sfdp); + } + return stat; +} + +uint32_t qspi_get_prog_size(void) +{ + cy_stc_smif_mem_config_t **memCfg = smifBlockConfig_sfdp.memConfig; + return (*memCfg)->deviceCfg->programSize; +} + +uint32_t qspi_get_erase_size(void) +{ + cy_stc_smif_mem_config_t **memCfg = smifBlockConfig_sfdp.memConfig; + return (*memCfg)->deviceCfg->eraseSize; +} + +uint32_t qspi_get_mem_size(void) +{ + cy_stc_smif_mem_config_t **memCfg = smifBlockConfig_sfdp.memConfig; + return (*memCfg)->deviceCfg->memSize; +} + +void qspi_deinit(uint32_t smif_id) +{ + Cy_SMIF_MemDeInit(QSPIPort); + + Cy_SMIF_Disable(QSPIPort); + + Cy_SysClk_ClkHfDisable(CY_SYSCLK_CLKHF_IN_CLKPATH2); + + NVIC_DisableIRQ(smifIntConfig.intrSrc); + Cy_SysInt_DisconnectInterruptSource(smifIntConfig.intrSrc, smifIntConfig.cm0pSrc); + + Cy_GPIO_Port_Deinit(qspi_SS_Configuration[smif_id-1].SS_Port); + Cy_GPIO_Port_Deinit(SCKPort); + Cy_GPIO_Port_Deinit(D0Port); + Cy_GPIO_Port_Deinit(D1Port); + Cy_GPIO_Port_Deinit(D2Port); + Cy_GPIO_Port_Deinit(D3Port); +} diff --git a/bootloader/mcuboot/boot/cypress/cy_flash_pal/flash_qspi/flash_qspi.h b/bootloader/mcuboot/boot/cypress/cy_flash_pal/flash_qspi/flash_qspi.h new file mode 100644 index 0000000..80e0d51 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/cy_flash_pal/flash_qspi/flash_qspi.h @@ -0,0 +1,70 @@ +/***************************************************************************//** +* \file flash_qspi.h +* \version 1.0 +* +* \brief +* This is the header file for PSoC6 external flash driver adoption layer. +* +******************************************************************************** +* \copyright +* +* © 2020, Cypress Semiconductor Corporation +* or a subsidiary of Cypress Semiconductor Corporation. All rights +* reserved. +* +* This software, including source code, documentation and related +* materials ("Software"), is owned by Cypress Semiconductor +* Corporation or one of its subsidiaries ("Cypress") and is protected by +* and subject to worldwide patent protection (United States and foreign), +* United States copyright laws and international treaty provisions. +* Therefore, you may use this Software only as provided in the license +* agreement accompanying the software package from which you +* obtained this Software ("EULA"). +* +* If no EULA applies, Cypress hereby grants you a personal, non- +* exclusive, non-transferable license to copy, modify, and compile the +* Software source code solely for use in connection with Cypress?s +* integrated circuit products. Any reproduction, modification, translation, +* compilation, or representation of this Software except as specified +* above is prohibited without the express written permission of Cypress. +* +* Disclaimer: THIS SOFTWARE IS PROVIDED AS-IS, WITH NO +* WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING, +* BUT NOT LIMITED TO, NONINFRINGEMENT, IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A +* PARTICULAR PURPOSE. Cypress reserves the right to make +* changes to the Software without notice. Cypress does not assume any +* liability arising out of the application or use of the Software or any +* product or circuit described in the Software. Cypress does not +* authorize its products for use in any products where a malfunction or +* failure of the Cypress product may reasonably be expected to result in +* significant property damage, injury or death ("High Risk Product"). By +* including Cypress's product in a High Risk Product, the manufacturer +* of such system or application assumes all risk of such use and in doing +* so agrees to indemnify Cypress against all liability. +* +******************************************************************************/ +#ifndef __FLASH_QSPI_H__ +#define __FLASH_QSPI_H__ + +#include +#include "cy_pdl.h" + +/* make it exported if used in TOC (cy_serial_flash_prog.c) */ +/* cy_stc_smif_block_config_t smifBlockConfig_sfdp; */ + +cy_en_smif_status_t qspi_init_sfdp(uint32_t smif_id); +cy_en_smif_status_t qspi_init(cy_stc_smif_block_config_t *blk_config); +cy_en_smif_status_t qspi_init_hardware(void); +uint32_t qspi_get_prog_size(void); +uint32_t qspi_get_erase_size(void); +uint32_t qspi_get_mem_size(void); + +SMIF_Type *qspi_get_device(void); +cy_stc_smif_context_t *qspi_get_context(void); +cy_stc_smif_mem_config_t *qspi_get_memory_config(int index); +void qspi_dump_device(cy_stc_smif_mem_device_cfg_t *dev); + +void qspi_deinit(uint32_t smif_id); + +#endif /* __FLASH_QSPI_H__ */ diff --git a/bootloader/mcuboot/boot/cypress/cy_flash_pal/include/cy_smif_psoc6.h b/bootloader/mcuboot/boot/cypress/cy_flash_pal/include/cy_smif_psoc6.h new file mode 100644 index 0000000..fe1150d --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/cy_flash_pal/include/cy_smif_psoc6.h @@ -0,0 +1,64 @@ +/***************************************************************************//** +* \file cy_smif_psoc6.h +* \version 1.0 +* +* \brief +* This is the header file for PSoC6 SMIF driver adoption layer. +* +******************************************************************************** +* \copyright +* +* © 2019, Cypress Semiconductor Corporation +* or a subsidiary of Cypress Semiconductor Corporation. All rights +* reserved. +* +* This software, including source code, documentation and related +* materials ("Software"), is owned by Cypress Semiconductor +* Corporation or one of its subsidiaries ("Cypress") and is protected by +* and subject to worldwide patent protection (United States and foreign), +* United States copyright laws and international treaty provisions. +* Therefore, you may use this Software only as provided in the license +* agreement accompanying the software package from which you +* obtained this Software ("EULA"). +* +* If no EULA applies, Cypress hereby grants you a personal, non- +* exclusive, non-transferable license to copy, modify, and compile the +* Software source code solely for use in connection with Cypress?s +* integrated circuit products. Any reproduction, modification, translation, +* compilation, or representation of this Software except as specified +* above is prohibited without the express written permission of Cypress. +* +* Disclaimer: THIS SOFTWARE IS PROVIDED AS-IS, WITH NO +* WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING, +* BUT NOT LIMITED TO, NONINFRINGEMENT, IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A +* PARTICULAR PURPOSE. Cypress reserves the right to make +* changes to the Software without notice. Cypress does not assume any +* liability arising out of the application or use of the Software or any +* product or circuit described in the Software. Cypress does not +* authorize its products for use in any products where a malfunction or +* failure of the Cypress product may reasonably be expected to result in +* significant property damage, injury or death ("High Risk Product"). By +* including Cypress's product in a High Risk Product, the manufacturer +* of such system or application assumes all risk of such use and in doing +* so agrees to indemnify Cypress against all liability. +* +******************************************************************************/ + +#ifndef CY_SMIF_PSOC6_H_ +#define CY_SMIF_PSOC6_H_ + +#include "stddef.h" +#include "stdbool.h" + +#include "flash_qspi.h" + +#ifndef off_t +typedef long int off_t; +#endif + +int psoc6_smif_read(const struct flash_area *fap, off_t addr, void *data, size_t len); +int psoc6_smif_write(const struct flash_area *fap, off_t addr, const void *data, size_t len); +int psoc6_smif_erase(off_t addr, size_t size); + +#endif /* CY_SMIF_PSOC6_H_ */ diff --git a/bootloader/mcuboot/boot/cypress/cy_flash_pal/include/flash_map_backend/flash_map_backend.h b/bootloader/mcuboot/boot/cypress/cy_flash_pal/include/flash_map_backend/flash_map_backend.h new file mode 100644 index 0000000..6330934 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/cy_flash_pal/include/flash_map_backend/flash_map_backend.h @@ -0,0 +1,195 @@ +/* + * Copyright (c) 2018 Nordic Semiconductor ASA + * Copyright (c) 2015 Runtime Inc + * Copyright (c) 2020 Cypress Semiconductor Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + /* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + /*******************************************************************************/ + +#ifndef __FLASH_MAP_BACKEND_H__ +#define __FLASH_MAP_BACKEND_H__ + +#include +#include "cy_flash.h" +#define FLASH_DEVICE_INDEX_MASK (0x7F) +#define FLASH_DEVICE_GET_EXT_INDEX(n) ((n) & FLASH_DEVICE_INDEX_MASK) +#define FLASH_DEVICE_EXTERNAL_FLAG (0x80) +#define FLASH_DEVICE_INTERNAL_FLASH (0x7F) +#define FLASH_DEVICE_EXTERNAL_FLASH(index) (FLASH_DEVICE_EXTERNAL_FLAG | index) + +#ifndef CY_BOOT_EXTERNAL_DEVICE_INDEX +/* assume first(one) SMIF device is used */ +#define CY_BOOT_EXTERNAL_DEVICE_INDEX (0) +#endif + +/** + * + * Provides abstraction of flash regions for type of use. + * I.e. dude where's my image? + * + * System will contain a map which contains flash areas. Every + * region will contain flash identifier, offset within flash and length. + * + * 1. This system map could be in a file within filesystem (Initializer + * must know/figure out where the filesystem is at). + * 2. Map could be at fixed location for project (compiled to code) + * 3. Map could be at specific place in flash (put in place at mfg time). + * + * Note that the map you use must be valid for BSP it's for, + * match the linker scripts when platform executes from flash, + * and match the target offset specified in download script. + */ +#include + +/** + * @brief Structure describing an area on a flash device. + * + * Multiple flash devices may be available in the system, each of + * which may have its own areas. For this reason, flash areas track + * which flash device they are part of. + */ +struct flash_area { + /** + * This flash area's ID; unique in the system. + */ + uint8_t fa_id; + + /** + * ID of the flash device this area is a part of. + */ + uint8_t fa_device_id; + + uint16_t pad16; + + /** + * This area's offset, relative to the beginning of its flash + * device's storage. + */ + uint32_t fa_off; + + /** + * This area's size, in bytes. + */ + uint32_t fa_size; +}; + +static inline uint8_t flash_area_get_id(const struct flash_area *fa) +{ + return fa->fa_id; +} + +static inline uint8_t flash_area_get_device_id(const struct flash_area *fa) +{ + return fa->fa_device_id; +} + +static inline uint32_t flash_area_get_off(const struct flash_area *fa) +{ + return fa->fa_off; +} + +static inline uint32_t flash_area_get_size(const struct flash_area *fa) +{ + return fa->fa_size; +} + +/** + * @brief Structure describing a sector within a flash area. + * + * Each sector has an offset relative to the start of its flash area + * (NOT relative to the start of its flash device), and a size. A + * flash area may contain sectors with different sizes. + */ +struct flash_sector { + /** + * Offset of this sector, from the start of its flash area (not device). + */ + uint32_t fs_off; + + /** + * Size of this sector, in bytes. + */ + uint32_t fs_size; +}; + +static inline uint32_t flash_sector_get_off(const struct flash_sector *fs) +{ + return fs->fs_off; +} + +static inline uint32_t flash_sector_get_size(const struct flash_sector *fs) +{ + return fs->fs_size; +} + +struct flash_map_entry { + uint32_t magic; + struct flash_area area; + unsigned int ref_count; +}; + +/* + * Retrieve a memory-mapped flash device's base address. + * On success, the address will be stored in the value pointed to by + * ret. + * Returns 0 on success, or an error code on failure. + */ +int flash_device_base(uint8_t fd_id, uintptr_t *ret); + +/*< Opens the area for use. id is one of the `fa_id`s */ +int flash_area_open(uint8_t id, const struct flash_area **); +void flash_area_close(const struct flash_area *); +/*< Reads `len` bytes of flash memory at `off` to the buffer at `dst` */ +int flash_area_read(const struct flash_area *, uint32_t off, void *dst, + uint32_t len); +/*< Writes `len` bytes of flash memory at `off` from the buffer at `src` */ +int flash_area_write(const struct flash_area *, uint32_t off, + const void *src, uint32_t len); +/*< Erases `len` bytes of flash memory at `off` */ +int flash_area_erase(const struct flash_area *, uint32_t off, uint32_t len); +/*< Returns this `flash_area`s alignment */ +uint32_t flash_area_align(const struct flash_area *); +/*< Initializes an array of flash_area elements for the slot's sectors */ +int flash_area_to_sectors(int idx, int *cnt, struct flash_area *ret); +/*< Returns the `fa_id` for slot, where slot is 0 (primary) or 1 (secondary) */ +int flash_area_id_from_image_slot(int slot); + +int flash_area_id_from_multi_image_slot(int image_index, int slot); +int flash_area_id_to_multi_image_slot(int image_index, int area_id); +#ifdef MCUBOOT_USE_FLASH_AREA_GET_SECTORS +int flash_area_get_sectors(int idx, uint32_t *cnt, struct flash_sector *ret); +#endif +/* + * Returns the value expected to be read when accesing any erased + * flash byte. + */ +uint8_t flash_area_erased_val(const struct flash_area *fap); + +/* + * Reads len bytes from off, and checks if the read data is erased. + * + * Returns 1 if erased, 0 if non-erased, and -1 on failure. + */ +int flash_area_read_is_empty(const struct flash_area *fa, uint32_t off, + void *dst, uint32_t len); + +#endif /* __FLASH_MAP_BACKEND_H__ */ diff --git a/bootloader/mcuboot/boot/cypress/host.mk b/bootloader/mcuboot/boot/cypress/host.mk new file mode 100644 index 0000000..6b6851e --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/host.mk @@ -0,0 +1,48 @@ +################################################################################ +# \file host.mk +# \version 1.0 +# +# \brief +# Makefile to describe host environment for Cypress MCUBoot based applications. +# +################################################################################ +# \copyright +# Copyright 2018-2021 Cypress Semiconductor Corporation +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +################################################################################ + +# Detect host OS to make resolving compiler pathes easier +UNAME_S := $(shell uname -s) +ifeq ($(UNAME_S), Darwin) + HOST_OS = osx +else + ifeq ($(UNAME_S), Linux) + HOST_OS = linux + else + HOST_OS = win + endif +endif + +ifeq ($(HOST_OS), win) + define get_os_path +$(shell cygpath -m $(1)) + endef +else + define get_os_path +$(1) + endef +endif + +PRJ_DIR=$(call get_os_path, $(CURDIR)) diff --git a/bootloader/mcuboot/boot/cypress/keys/cypress-test-ec-p256.pem b/bootloader/mcuboot/boot/cypress/keys/cypress-test-ec-p256.pem new file mode 100644 index 0000000..e1f8e15 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/keys/cypress-test-ec-p256.pem @@ -0,0 +1,5 @@ +-----BEGIN PRIVATE KEY----- +MIGHAgEAMBMGByqGSM49AgEGCCqGSM49AwEHBG0wawIBAQQguR/Jq6LjMgp8DVtE +7pKguttNo6L239aEcijzGOr5C72hRANCAAT/NroNASdTGo6bS8r0+C+30YcG0WLV +chWs+99DnOr3SZoalv6/pCNIVrwFv3KkJsmsZUbNNmxeMPr+IlfGGPg0 +-----END PRIVATE KEY----- diff --git a/bootloader/mcuboot/boot/cypress/keys/cypress-test-ec-p256.pub b/bootloader/mcuboot/boot/cypress/keys/cypress-test-ec-p256.pub new file mode 100644 index 0000000..8174b5d --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/keys/cypress-test-ec-p256.pub @@ -0,0 +1,16 @@ +/* Autogenerated by imgtool.py, do not edit. */ +const unsigned char ecdsa_pub_key[] = { + 0x30, 0x59, 0x30, 0x13, 0x06, 0x07, 0x2a, 0x86, + 0x48, 0xce, 0x3d, 0x02, 0x01, 0x06, 0x08, 0x2a, + 0x86, 0x48, 0xce, 0x3d, 0x03, 0x01, 0x07, 0x03, + 0x42, 0x00, 0x04, 0xff, 0x36, 0xba, 0x0d, 0x01, + 0x27, 0x53, 0x1a, 0x8e, 0x9b, 0x4b, 0xca, 0xf4, + 0xf8, 0x2f, 0xb7, 0xd1, 0x87, 0x06, 0xd1, 0x62, + 0xd5, 0x72, 0x15, 0xac, 0xfb, 0xdf, 0x43, 0x9c, + 0xea, 0xf7, 0x49, 0x9a, 0x1a, 0x96, 0xfe, 0xbf, + 0xa4, 0x23, 0x48, 0x56, 0xbc, 0x05, 0xbf, 0x72, + 0xa4, 0x26, 0xc9, 0xac, 0x65, 0x46, 0xcd, 0x36, + 0x6c, 0x5e, 0x30, 0xfa, 0xfe, 0x22, 0x57, 0xc6, + 0x18, 0xf8, 0x34, +}; +const unsigned int ecdsa_pub_key_len = 91; diff --git a/bootloader/mcuboot/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.c b/bootloader/mcuboot/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.c new file mode 100644 index 0000000..0472f3e --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.c @@ -0,0 +1,270 @@ +/***************************************************************************//** +* \file cy_retarget_io.c +* +* \brief +* Provides APIs for retargeting stdio to UART hardware contained on the Cypress +* kits. +* +******************************************************************************** +* \copyright +* Copyright 2018-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +#include "cy_retarget_io_pdl.h" + +#include "cycfg_peripherals.h" + +#include "cy_sysint.h" +#include "cy_scb_uart.h" + +#if defined(__cplusplus) +extern "C" { +#endif + +/* Tracks the previous character sent to output stream */ +#ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF +static char cy_retarget_io_stdout_prev_char = 0; +#endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */ + +cy_stc_scb_uart_context_t CYBSP_UART_context; + +static uint8_t cy_retarget_io_getchar(void); +static void cy_retarget_io_putchar(char c); + +#if defined(__ARMCC_VERSION) /* ARM-MDK */ + /*************************************************************************** + * Function Name: fputc + ***************************************************************************/ + __attribute__((weak)) int fputc(int ch, FILE *f) + { + (void)f; + #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF + if ((char)ch == '\n' && cy_retarget_io_stdout_prev_char != '\r') + { + cy_retarget_io_putchar('\r'); + } + + cy_retarget_io_stdout_prev_char = (char)ch; + #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */ + cy_retarget_io_putchar(ch); + return (ch); + } +#elif defined (__ICCARM__) /* IAR */ + #include + + /*************************************************************************** + * Function Name: __write + ***************************************************************************/ + __weak size_t __write(int handle, const unsigned char * buffer, size_t size) + { + size_t nChars = 0; + /* This template only writes to "standard out", for all other file + * handles it returns failure. */ + if (handle != _LLIO_STDOUT) + { + return (_LLIO_ERROR); + } + if (buffer != NULL) + { + for (/* Empty */; nChars < size; ++nChars) + { + #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF + if (*buffer == '\n' && cy_retarget_io_stdout_prev_char != '\r') + { + cy_retarget_io_putchar('\r'); + } + + cy_retarget_io_stdout_prev_char = *buffer; + #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */ + cy_retarget_io_putchar(*buffer); + ++buffer; + } + } + return (nChars); + } +#else /* (__GNUC__) GCC */ + /* Add an explicit reference to the floating point printf library to allow + the usage of floating point conversion specifier. */ + __asm (".global _printf_float"); + /*************************************************************************** + * Function Name: _write + ***************************************************************************/ + __attribute__((weak)) int _write (int fd, const char *ptr, int len) + { + int nChars = 0; + (void)fd; + if (ptr != NULL) + { + for (/* Empty */; nChars < len; ++nChars) + { + #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF + if (*ptr == '\n' && cy_retarget_io_stdout_prev_char != '\r') + { + cy_retarget_io_putchar('\r'); + } + + cy_retarget_io_stdout_prev_char = *ptr; + #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */ + cy_retarget_io_putchar((uint32_t)*ptr); + ++ptr; + } + } + return (nChars); + } +#endif + + +#if defined(__ARMCC_VERSION) /* ARM-MDK */ + /*************************************************************************** + * Function Name: fgetc + ***************************************************************************/ + __attribute__((weak)) int fgetc(FILE *f) + { + (void)f; + return (cy_retarget_io_getchar()); + } +#elif defined (__ICCARM__) /* IAR */ + __weak size_t __read(int handle, unsigned char * buffer, size_t size) + { + /* This template only reads from "standard in", for all other file + handles it returns failure. */ + if ((handle != _LLIO_STDIN) || (buffer == NULL)) + { + return (_LLIO_ERROR); + } + else + { + *buffer = cy_retarget_io_getchar(); + return (1); + } + } +#else /* (__GNUC__) GCC */ + /* Add an explicit reference to the floating point scanf library to allow + the usage of floating point conversion specifier. */ + __asm (".global _scanf_float"); + __attribute__((weak)) int _read (int fd, char *ptr, int len) + { + int nChars = 0; + (void)fd; + if (ptr != NULL) + { + for(/* Empty */;nChars < len;++ptr) + { + *ptr = (char)cy_retarget_io_getchar(); + ++nChars; + if((*ptr == '\n') || (*ptr == '\r')) + { + break; + } + } + } + return (nChars); + } +#endif + +static uint8_t cy_retarget_io_getchar(void) +{ + uint32_t read_value = Cy_SCB_UART_Get(CYBSP_UART_HW); + while (read_value == CY_SCB_UART_RX_NO_DATA) + { + read_value = Cy_SCB_UART_Get(CYBSP_UART_HW); + } + + return (uint8_t)read_value; +} + +static void cy_retarget_io_putchar(char c) +{ + uint32_t count = 0; + while (count == 0) + { + count = Cy_SCB_UART_Put(CYBSP_UART_HW, c); + } +} + +static cy_rslt_t cy_retarget_io_pdl_setbaud(CySCB_Type *base, uint32_t baudrate) +{ + cy_rslt_t result = CY_RSLT_TYPE_ERROR; + + uint8_t oversample_value = 8u; + uint8_t frac_bits = 0u; + uint32_t divider; + + Cy_SCB_UART_Disable(base, NULL); + + result = (cy_rslt_t) Cy_SysClk_PeriphDisableDivider(CY_SYSCLK_DIV_16_BIT, 0); + + divider = ((Cy_SysClk_ClkPeriGetFrequency() * (1 << frac_bits)) + ((baudrate * oversample_value) / 2)) / (baudrate * oversample_value) - 1; + + if (result == CY_RSLT_SUCCESS) + { + result = (cy_rslt_t) Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, 0u, divider); + } + + if (result == CY_RSLT_SUCCESS) + { + result = Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, 0u); + } + + Cy_SCB_UART_Enable(base); + + return result; +} + +cy_rslt_t cy_retarget_io_pdl_init(uint32_t baudrate) +{ + cy_rslt_t result = CY_RSLT_TYPE_ERROR; + + result = (cy_rslt_t)Cy_SCB_UART_Init(CYBSP_UART_HW, &CYBSP_UART_config, &CYBSP_UART_context); + + if (result == CY_RSLT_SUCCESS) + { + result = cy_retarget_io_pdl_setbaud(CYBSP_UART_HW, baudrate); + } + + if (result == CY_RSLT_SUCCESS) + { + Cy_SCB_UART_Enable(CYBSP_UART_HW); + } + + return result; +} + +/** + * @brief Wait while UART completes transfer. Try for tries_count times - + * once each 10 millisecons. + */ +void cy_retarget_io_wait_tx_complete(CySCB_Type *base, uint32_t tries_count) +{ + while(tries_count > 0) + { + if (!Cy_SCB_UART_IsTxComplete(base)) { + Cy_SysLib_DelayCycles(10 * cy_delayFreqKhz); + tries_count -= 1; + } else { + return; + } + } +} + +void cy_retarget_io_pdl_deinit() +{ + Cy_SCB_UART_DeInit(CYBSP_UART_HW); +} + +#if defined(__cplusplus) +} +#endif diff --git a/bootloader/mcuboot/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.h b/bootloader/mcuboot/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.h new file mode 100644 index 0000000..f0c8733 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.h @@ -0,0 +1,62 @@ +/***************************************************************************//** +* \file cy_retarget_io.h +* +* \brief +* Provides APIs for transmitting messages to or from the board via standard +* printf/scanf functions. Messages are transmitted over a UART connection which +* is generally connected to a host machine. Transmission is done at 115200 baud +* using the tx and rx pins provided by the user of this library. The UART +* instance is made available via cy_retarget_io_uart_obj in case any changes +* to the default configuration are desired. +* NOTE: If the application is built using newlib-nano, by default, floating +* point format strings (%f) are not supported. To enable this support you must +* add '-u _printf_float' to the linker command line. +* +******************************************************************************** +* \copyright +* Copyright 2018-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +#pragma once + +#include +#include "cy_result.h" +#include "cy_pdl.h" + +#if defined(__cplusplus) +extern "C" { +#endif + +/** UART baud rate */ +#define CY_RETARGET_IO_BAUDRATE (115200) + +/** Defining this macro enables conversion of line feed (LF) into carriage + * return followed by line feed (CR & LF) on the output direction (STDOUT). You + * can define this macro through the DEFINES variable in the application + * Makefile. + */ +#define CY_RETARGET_IO_CONVERT_LF_TO_CRLF + +cy_rslt_t cy_retarget_io_pdl_init(uint32_t baudrate); + +void cy_retarget_io_wait_tx_complete(CySCB_Type *base, uint32_t tries_count); + +void cy_retarget_io_pdl_deinit(void); + +#if defined(__cplusplus) +} +#endif + diff --git a/bootloader/mcuboot/boot/cypress/libs/watchdog/watchdog.c b/bootloader/mcuboot/boot/cypress/libs/watchdog/watchdog.c new file mode 100644 index 0000000..286e9c3 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/libs/watchdog/watchdog.c @@ -0,0 +1,183 @@ +/***************************************************************************//** +* \file cy_wdg.c +* +* \brief +* Provides a high level interface for interacting with the Cypress Watchdog Timer. +* This interface abstracts out the chip specific details. If any chip specific +* functionality is necessary, or performance is critical the low level functions +* can be used directly. +* +* +******************************************************************************** +* \copyright +* Copyright 2019-2020 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +#include +#include "watchdog.h" +#include "cy_wdt.h" +#include "cy_utils.h" + +#if defined(__cplusplus) +extern "C" { +#endif + +#if defined(COMPONENT_PSOC6) +#define _cy_wdg_lock() Cy_WDT_Lock() +#define _cy_wdg_unlock() Cy_WDT_Unlock() +#else +#define _cy_wdg_lock() +#define _cy_wdg_unlock() +#endif + +// ((2^16 * 2) + (2^16 - 1)) * .030518 ms +/** Maximum WDT timeout in milliseconds */ +#define _cy_wdg_MAX_TIMEOUT_MS 6000 + +/** Maximum number of ignore bits */ +#define _cy_wdg_MAX_IGNORE_BITS 12 + +typedef struct { + uint16_t min_period_ms; // Minimum period in milliseconds that can be represented with this many ignored bits + uint16_t round_threshold_ms; // Timeout threshold in milliseconds from which to round up to the minimum period +} _cy_wdg_ignore_bits_data_t; + +// ILO Frequency = 32768 Hz +// ILO Period = 1 / 32768 Hz = .030518 ms +// WDT Reset Period (timeout_ms) = .030518 ms * (2 * 2^(16 - ignore_bits) + match) +// ignore_bits range: 0 - 12 +// match range: 0 - (2^(16 - ignore_bits) - 1) +static const _cy_wdg_ignore_bits_data_t _cy_wdg_ignore_data[] = { + {4001, 3001}, // 0 bits: min period: 4001ms, max period: 6000ms, round up from 3001+ms + {2001, 1500}, // 1 bit: min period: 2001ms, max period: 3000ms, round up from 1500+ms + {1001, 750}, // 2 bits: min period: 1001ms, max period: 1499ms, round up from 750+ms + {501, 375}, // 3 bits: min period: 501ms, max period: 749ms, round up from 375+ms + {251, 188}, // 4 bits: min period: 251ms, max period: 374ms, round up from 188+ms + {126, 94}, // 5 bits: min period: 126ms, max period: 187ms, round up from 94+ms + {63, 47}, // 6 bits: min period: 63ms, max period: 93ms, round up from 47+ms + {32, 24}, // 7 bits: min period: 32ms, max period: 46ms, round up from 24+ms + {16, 12}, // 8 bits: min period: 16ms, max period: 23ms, round up from 12+ms + {8, 6}, // 9 bits: min period: 8ms, max period: 11ms, round up from 6+ms + {4, 3}, // 10 bits: min period: 4ms, max period: 5ms, round up from 3+ms + {2, 2}, // 11 bits: min period: 2ms, max period: 2ms + {1, 1} // 12 bits: min period: 1ms, max period: 1ms +}; + +static bool _cy_wdg_initialized = false; +static bool _cy_wdg_pdl_initialized = false; +static uint16_t _cy_wdg_initial_timeout_ms = 0; +static uint8_t _cy_wdg_initial_ignore_bits = 0; + +static __INLINE uint32_t _cy_wdg_timeout_to_ignore_bits(uint32_t *timeout_ms) { + for (uint32_t i = 0; i <= _cy_wdg_MAX_IGNORE_BITS; i++) + { + if (*timeout_ms >= _cy_wdg_ignore_data[i].round_threshold_ms) + { + if (*timeout_ms < _cy_wdg_ignore_data[i].min_period_ms) + *timeout_ms = _cy_wdg_ignore_data[i].min_period_ms; + return i; + } + } + return _cy_wdg_MAX_IGNORE_BITS; // Should never reach this +} + +static __INLINE uint16_t _cy_wdg_timeout_to_match(uint16_t timeout_ms, uint16_t ignore_bits) +{ + // match = (timeout_ms / .030518 ms) - (2 * 2^(16 - ignore_bits)) + return (uint16_t)(timeout_ms / .030518) - (1UL << (17 - ignore_bits)) + Cy_WDT_GetCount(); +} + +/* Start API implementing */ + +cy_rslt_t cy_wdg_init(uint32_t timeout_ms) +{ + if (timeout_ms == 0 || timeout_ms > _cy_wdg_MAX_TIMEOUT_MS) + { + return -1; + } + + if (_cy_wdg_initialized) + { + return -1; + } + + _cy_wdg_initialized = true; + + if (!_cy_wdg_pdl_initialized) + { + Cy_WDT_Enable(); + Cy_WDT_MaskInterrupt(); + _cy_wdg_pdl_initialized = true; + } + + cy_wdg_stop(); + + _cy_wdg_initial_timeout_ms = timeout_ms; + uint8_t ignore_bits = _cy_wdg_timeout_to_ignore_bits(&timeout_ms); + _cy_wdg_initial_ignore_bits = ignore_bits; + + Cy_WDT_SetIgnoreBits(ignore_bits); + + Cy_WDT_SetMatch(_cy_wdg_timeout_to_match(timeout_ms, ignore_bits)); + + cy_wdg_start(); + + return CY_RSLT_SUCCESS; +} + +void cy_wdg_free() +{ + cy_wdg_stop(); + + _cy_wdg_initialized = false; +} + +void cy_wdg_kick() +{ + /* Clear to prevent reset from WDT */ + Cy_WDT_ClearWatchdog(); + + _cy_wdg_unlock(); + Cy_WDT_SetMatch(_cy_wdg_timeout_to_match(_cy_wdg_initial_timeout_ms, _cy_wdg_initial_ignore_bits)); + _cy_wdg_lock(); +} + +void cy_wdg_start() +{ + _cy_wdg_unlock(); + Cy_WDT_Enable(); + _cy_wdg_lock(); +} + +void cy_wdg_stop() +{ + _cy_wdg_unlock(); + Cy_WDT_Disable(); +} + +uint32_t cy_wdg_get_timeout_ms() +{ + return _cy_wdg_initial_timeout_ms; +} + +uint32_t cy_wdg_get_max_timeout_ms(void) +{ + return _cy_wdg_MAX_TIMEOUT_MS; +} + +#if defined(__cplusplus) +} +#endif diff --git a/bootloader/mcuboot/boot/cypress/libs/watchdog/watchdog.h b/bootloader/mcuboot/boot/cypress/libs/watchdog/watchdog.h new file mode 100644 index 0000000..0d45f82 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/libs/watchdog/watchdog.h @@ -0,0 +1,90 @@ +/***************************************************************************//** +* \file cy_wdg.h +* +* \brief +* Provides a high level interface for interacting with the Watchdog Timer. +* This interface abstracts out the chip specific details. If any chip specific +* functionality is necessary, or performance is critical the low level functions +* can be used directly. +* +******************************************************************************** +* \copyright +* Copyright 2019-2020 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +#pragma once + +#if defined(__cplusplus) +extern "C" { +#endif + +#include +#include +#include "cy_result.h" + +/** Initialize and start the WDT +* +* The specified timeout must be at least 1ms and at most the WDT's maximum timeout (see cy_wdg_get_max_timeout_ms()). +* @param[inout] timeout_ms The time in milliseconds before the WDT times out (1ms - max) (see cy_wdg_get_max_timeout_ms()) +* @return The status of the init request +* +* Returns CY_RSLT_SUCCESS if the operation was successfull. +*/ +cy_rslt_t cy_wdg_init(uint32_t timeout_ms); + +/** Free the WDT +* +* Powers down the WDT. +* After calling this function no other WDT functions should be called except +* cy_wdg_init(). +*/ + +void cy_wdg_free(); + +/** Resets the WDT +* +* This function should be called periodically to prevent the WDT from timing out and resetting the device. +*/ +void cy_wdg_kick(); + +/** Start (enable) the WDT +* +* @return The status of the start request +*/ +void cy_wdg_start(); + +/** Stop (disable) the WDT +* +* @return The status of the stop request +*/ +void cy_wdg_stop(); + +/** Get the WDT timeout +* +* Gets the time in milliseconds before the WDT times out. +* @return The time in milliseconds before the WDT times out +*/ +uint32_t cy_wdg_get_timeout_ms(); + +/** Gets the maximum WDT timeout in milliseconds +* +* @return The maximum timeout for the WDT +*/ +uint32_t cy_wdg_get_max_timeout_ms(void); + +#if defined(__cplusplus) +} +#endif diff --git a/bootloader/mcuboot/boot/cypress/platforms.mk b/bootloader/mcuboot/boot/cypress/platforms.mk new file mode 100644 index 0000000..39fd34a --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms.mk @@ -0,0 +1,78 @@ +################################################################################ +# \file platforms.mk +# \version 1.0 +# +# \brief +# Makefile to describe supported boards and platforms for Cypress MCUBoot based applications. +# +################################################################################ +# \copyright +# Copyright 2018-2019 Cypress Semiconductor Corporation +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +################################################################################ + +include host.mk + +# Target platform is built for. PSOC_062_2M is set by default +# Supported: +# - PSOC_062_2M +# - PSOC_062_1M +# - PSOC_062_512K + +# default PLATFORM +PLATFORM ?= PSOC_062_2M + +# supported platforms +PLATFORMS := PSOC_062_2M PSOC_062_1M PSOC_062_512K + +ifneq ($(filter $(PLATFORM), $(PLATFORMS)),) +else +$(error Not supported platform: '$(PLATFORM)') +endif + +# For which core this application is built +CORE ?= CM0P + +# MCU device selection, based on target device. +# Default chips are used for supported platforms +# This can be redefined in case of other chip usage +ifeq ($(PLATFORM), PSOC_062_2M) +# base kit CY8CPROTO-062-4343W +DEVICE ?= CY8C624ABZI-D44 +PLATFORM_SUFFIX := 02 +else ifeq ($(PLATFORM), PSOC_062_1M) +# base kit CY8CKIT-062-WIFI-BT +DEVICE ?= CY8C6247BZI-D54 +PLATFORM_SUFFIX := 01 +else ifeq ($(PLATFORM), PSOC_062_512K) +# base kit CY8CPROTO-062S3-4343W +DEVICE ?= CY8C6245LQI-S3D72 +PLATFORM_SUFFIX := 03 +endif + +# Add device name to defines +DEFINES += $(DEVICE) +DEFINES += $(PLATFORM) + +# Convert defines to regular -DMY_NAME style +ifneq ($(DEFINES),) + DEFINES_PLATFORM :=$(addprefix -D, $(subst -,_,$(DEFINES))) +endif + +ifeq ($(MAKEINFO) , 1) +$(info $(PLATFORM_SUFFIX)) +$(info $(DEVICE)) +$(info $(DEFINES_PLATFORM)) +endif diff --git a/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM0P/GCC_ARM/cy8c6xxa_cm0plus.ld b/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM0P/GCC_ARM/cy8c6xxa_cm0plus.ld new file mode 100644 index 0000000..1f3a5a9 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM0P/GCC_ARM/cy8c6xxa_cm0plus.ld @@ -0,0 +1,418 @@ +/***************************************************************************//** +* \file cy8c6xxa_cm0plus.ld +* \version 2.70 +* +* Linker file for the GNU C compiler. +* +* The main purpose of the linker script is to describe how the sections in the +* input files should be mapped into the output file, and to control the memory +* layout of the output file. +* +* \note The entry point location is fixed and starts at 0x10000000. The valid +* application image should be placed there. +* +* \note The linker files included with the PDL template projects must be generic +* and handle all common use cases. Your project may not use every section +* defined in the linker files. In that case you may see warnings during the +* build process. In your project, you can simply comment out or remove the +* relevant code in the linker file. +* +******************************************************************************** +* \copyright +* Copyright 2016-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +SEARCH_DIR(.) +GROUP(-lgcc -lc -lnosys) +ENTRY(Reset_Handler) + +/* The size of the stack section at the end of CM0+ SRAM */ +STACK_SIZE = 0x1000; + +/* Force symbol to be entered in the output file as an undefined symbol. Doing +* this may, for example, trigger linking of additional modules from standard +* libraries. You may list several symbols for each EXTERN, and you may use +* EXTERN multiple times. This command has the same effect as the -u command-line +* option. +*/ +EXTERN(Reset_Handler) + +/* The MEMORY section below describes the location and size of blocks of memory in the target. +* Use this section to specify the memory regions available for allocation. +*/ +MEMORY +{ + /* The ram and flash regions control RAM and flash memory allocation for the CM0+ core. + * You can change the memory allocation by editing the 'ram' and 'flash' regions. + * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use. + * Using this memory region for other purposes will lead to unexpected behavior. + * Your changes must be aligned with the corresponding memory regions for the CM4 core in 'xx_cm4_dual.ld', + * where 'xx' is the device group; for example, 'cy8c6xx7_cm4_dual.ld'. + */ + ram (rwx) : ORIGIN = 0x08000000, LENGTH = 0x2000 + flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x2000 + + /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash. + * You can assign sections to this memory region for only one of the cores. + * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region. + * Therefore, repurposing this memory region will prevent such middleware from operation. + */ + em_eeprom (rx) : ORIGIN = 0x14000000, LENGTH = 0x8000 /* 32 KB */ + + /* The following regions define device specific memory regions and must not be changed. */ + sflash_user_data (rx) : ORIGIN = 0x16000800, LENGTH = 0x800 /* Supervisory flash: User data */ + sflash_nar (rx) : ORIGIN = 0x16001A00, LENGTH = 0x200 /* Supervisory flash: Normal Access Restrictions (NAR) */ + sflash_public_key (rx) : ORIGIN = 0x16005A00, LENGTH = 0xC00 /* Supervisory flash: Public Key */ + sflash_toc_2 (rx) : ORIGIN = 0x16007C00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 */ + sflash_rtoc_2 (rx) : ORIGIN = 0x16007E00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 Copy */ + xip (rx) : ORIGIN = 0x18000000, LENGTH = 0x8000000 /* 128 MB */ + efuse (r) : ORIGIN = 0x90700000, LENGTH = 0x100000 /* 1 MB */ +} + +/* Library configurations */ +GROUP(libgcc.a libc.a libm.a libnosys.a) + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * __Vectors_End + * __Vectors_Size + */ + + +SECTIONS +{ + .cy_app_header : + { + KEEP(*(.cy_app_header)) + } > flash + + /* Cortex-M0+ application flash area */ + .text : + { + . = ALIGN(4); + __Vectors = . ; + KEEP(*(.vectors)) + . = ALIGN(4); + __Vectors_End = .; + __Vectors_Size = __Vectors_End - __Vectors; + __end__ = .; + + . = ALIGN(4); + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + /* Read-only code (constants). */ + *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*) + + KEEP(*(.eh_frame*)) + } > flash + + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + __exidx_start = .; + + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > flash + __exidx_end = .; + + + /* To copy multiple ROM to RAM sections, + * uncomment .copy.table section and, + * define __STARTUP_COPY_MULTIPLE in startup_psoc6_02_cm0plus.S */ + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + + /* Copy interrupt vectors from flash to RAM */ + LONG (__Vectors) /* From */ + LONG (__ram_vectors_start__) /* To */ + LONG (__Vectors_End - __Vectors) /* Size */ + + /* Copy data section to RAM */ + LONG (__etext) /* From */ + LONG (__data_start__) /* To */ + LONG (__data_end__ - __data_start__) /* Size */ + + __copy_table_end__ = .; + } > flash + + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_02_cm0plus.S */ + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + __zero_table_end__ = .; + } > flash + + __etext = . ; + + + .ramVectors (NOLOAD) : ALIGN(8) + { + __ram_vectors_start__ = .; + KEEP(*(.ram_vectors)) + __ram_vectors_end__ = .; + } > ram + + + .data __ram_vectors_end__ : AT (__etext) + { + __data_start__ = .; + + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + + KEEP(*(.cy_ramfunc*)) + . = ALIGN(4); + + __data_end__ = .; + + } > ram + + + /* Place variables in the section that should not be initialized during the + * device startup. + */ + .noinit (NOLOAD) : ALIGN(8) + { + KEEP(*(.noinit)) + } > ram + + + /* The uninitialized global or static variables are placed in this section. + * + * The NOLOAD attribute tells linker that .bss section does not consume + * any space in the image. The NOLOAD attribute changes the .bss type to + * NOBITS, and that makes linker to A) not allocate section in memory, and + * A) put information to clear the section with all zeros during application + * loading. + * + * Without the NOLOAD attribute, the .bss section might get PROGBITS type. + * This makes linker to A) allocate zeroed section in memory, and B) copy + * this section to RAM during application loading. + */ + .bss (NOLOAD): + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > ram + + + .heap (NOLOAD): + { + __HeapBase = .; + __end__ = .; + end = __end__; + KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; + __HeapLimit = .; + } > ram + + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (NOLOAD): + { + KEEP(*(.stack*)) + } > ram + + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(ram) + LENGTH(ram); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") + + + /* Emulated EEPROM Flash area */ + .cy_em_eeprom : + { + KEEP(*(.cy_em_eeprom)) + } > em_eeprom + + + /* Supervisory Flash: User data */ + .cy_sflash_user_data : + { + KEEP(*(.cy_sflash_user_data)) + } > sflash_user_data + + + /* Supervisory Flash: Normal Access Restrictions (NAR) */ + .cy_sflash_nar : + { + KEEP(*(.cy_sflash_nar)) + } > sflash_nar + + + /* Supervisory Flash: Public Key */ + .cy_sflash_public_key : + { + KEEP(*(.cy_sflash_public_key)) + } > sflash_public_key + + + /* Supervisory Flash: Table of Content # 2 */ + .cy_toc_part2 : + { + KEEP(*(.cy_toc_part2)) + } > sflash_toc_2 + + + /* Supervisory Flash: Table of Content # 2 Copy */ + .cy_rtoc_part2 : + { + KEEP(*(.cy_rtoc_part2)) + } > sflash_rtoc_2 + + + /* Places the code in the Execute in Place (XIP) section. See the smif driver + * documentation for details. + */ + .cy_xip : + { + KEEP(*(.cy_xip)) + } > xip + + + /* eFuse */ + .cy_efuse : + { + KEEP(*(.cy_efuse)) + } > efuse + + + /* These sections are used for additional metadata (silicon revision, + * Silicon/JTAG ID, etc.) storage. + */ + .cymeta 0x90500000 : { KEEP(*(.cymeta)) } :NONE +} + + +/* The following symbols used by the cymcuelftool. */ +/* Flash */ +__cy_memory_0_start = 0x10000000; +__cy_memory_0_length = 0x00200000; +__cy_memory_0_row_size = 0x200; + +/* Emulated EEPROM Flash area */ +__cy_memory_1_start = 0x14000000; +__cy_memory_1_length = 0x8000; +__cy_memory_1_row_size = 0x200; + +/* Supervisory Flash */ +__cy_memory_2_start = 0x16000000; +__cy_memory_2_length = 0x8000; +__cy_memory_2_row_size = 0x200; + +/* XIP */ +__cy_memory_3_start = 0x18000000; +__cy_memory_3_length = 0x08000000; +__cy_memory_3_row_size = 0x200; + +/* eFuse */ +__cy_memory_4_start = 0x90700000; +__cy_memory_4_length = 0x100000; +__cy_memory_4_row_size = 1; + +/* EOF */ diff --git a/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM0P/GCC_ARM/startup_psoc6_02_cm0plus.S b/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM0P/GCC_ARM/startup_psoc6_02_cm0plus.S new file mode 100644 index 0000000..2641f62 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM0P/GCC_ARM/startup_psoc6_02_cm0plus.S @@ -0,0 +1,372 @@ +/**************************************************************************//** + * @file startup_psoc6_02_cm0plus.S + * @brief CMSIS Core Device Startup File for + * ARMCM0plus Device Series + * @version V5.00 + * @date 02. March 2016 + ******************************************************************************/ +/* + * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + /* Address of the NMI handler */ + #define CY_NMI_HANLDER_ADDR 0x0000000D + + /* The CPU VTOR register */ + #define CY_CPU_VTOR_ADDR 0xE000ED08 + + /* Copy flash vectors and data section to RAM */ + #define __STARTUP_COPY_MULTIPLE + + /* Clear single BSS section */ + #define __STARTUP_CLEAR_BSS + + .syntax unified + .arch armv6-m + + .section .stack + .align 3 +#ifdef __STACK_SIZE + .equ Stack_Size, __STACK_SIZE +#else + .equ Stack_Size, 0x00001000 +#endif + .globl __StackTop + .globl __StackLimit +__StackLimit: + .space Stack_Size + .size __StackLimit, . - __StackLimit +__StackTop: + .size __StackTop, . - __StackTop + + .section .heap + .align 3 +#ifdef __HEAP_SIZE + .equ Heap_Size, __HEAP_SIZE +#else + .equ Heap_Size, 0x00000400 +#endif + .globl __HeapBase + .globl __HeapLimit +__HeapBase: + .if Heap_Size + .space Heap_Size + .endif + .size __HeapBase, . - __HeapBase +__HeapLimit: + .size __HeapLimit, . - __HeapLimit + + .section .vectors + .align 2 + .globl __Vectors +__Vectors: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long CY_NMI_HANLDER_ADDR /* NMI Handler */ + .long HardFault_Handler /* Hard Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long SVC_Handler /* SVCall Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long PendSV_Handler /* PendSV Handler */ + .long SysTick_Handler /* SysTick Handler */ + + /* External interrupts Description */ + .long NvicMux0_IRQHandler /* CPU User Interrupt #0 */ + .long NvicMux1_IRQHandler /* CPU User Interrupt #1 */ + .long NvicMux2_IRQHandler /* CPU User Interrupt #2 */ + .long NvicMux3_IRQHandler /* CPU User Interrupt #3 */ + .long NvicMux4_IRQHandler /* CPU User Interrupt #4 */ + .long NvicMux5_IRQHandler /* CPU User Interrupt #5 */ + .long NvicMux6_IRQHandler /* CPU User Interrupt #6 */ + .long NvicMux7_IRQHandler /* CPU User Interrupt #7 */ + .long Internal0_IRQHandler /* Internal SW Interrupt #0 */ + .long Internal1_IRQHandler /* Internal SW Interrupt #1 */ + .long Internal2_IRQHandler /* Internal SW Interrupt #2 */ + .long Internal3_IRQHandler /* Internal SW Interrupt #3 */ + .long Internal4_IRQHandler /* Internal SW Interrupt #4 */ + .long Internal5_IRQHandler /* Internal SW Interrupt #5 */ + .long Internal6_IRQHandler /* Internal SW Interrupt #6 */ + .long Internal7_IRQHandler /* Internal SW Interrupt #7 */ + + .size __Vectors, . - __Vectors + .equ __VectorsSize, . - __Vectors + + .section .ram_vectors + .align 2 + .globl __ramVectors +__ramVectors: + .space __VectorsSize + .size __ramVectors, . - __ramVectors + + + .text + .thumb + .thumb_func + .align 2 + + /* + * Device startup customization + * + * Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) + * because this function is executed as the first instruction in the ResetHandler. + * The PDL is also not initialized to use the proper register offsets. + * The user of this function is responsible for initializing the PDL and resources before using them. + */ + .weak Cy_OnResetUser + .func Cy_OnResetUser, Cy_OnResetUser + .type Cy_OnResetUser, %function + +Cy_OnResetUser: + bx lr + .size Cy_OnResetUser, . - Cy_OnResetUser + .endfunc + + /* Reset handler */ + .weak Reset_Handler + .type Reset_Handler, %function + +Reset_Handler: + bl Cy_OnResetUser + cpsid i + +/* Firstly it copies data from read only memory to RAM. There are two schemes + * to copy. One can copy more than one sections. Another can only copy + * one section. The former scheme needs more instructions and read-only + * data to implement than the latter. + * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */ + +#ifdef __STARTUP_COPY_MULTIPLE +/* Multiple sections scheme. + * + * Between symbol address __copy_table_start__ and __copy_table_end__, + * there are array of triplets, each of which specify: + * offset 0: LMA of start of a section to copy from + * offset 4: VMA of start of a section to copy to + * offset 8: size of the section to copy. Must be multiply of 4 + * + * All addresses must be aligned to 4 bytes boundary. + */ + ldr r4, =__copy_table_start__ + ldr r5, =__copy_table_end__ + +.L_loop0: + cmp r4, r5 + bge .L_loop0_done + ldr r1, [r4] + ldr r2, [r4, #4] + ldr r3, [r4, #8] + +.L_loop0_0: + subs r3, #4 + blt .L_loop0_0_done + ldr r0, [r1, r3] + str r0, [r2, r3] + b .L_loop0_0 + +.L_loop0_0_done: + adds r4, #12 + b .L_loop0 + +.L_loop0_done: +#else +/* Single section scheme. + * + * The ranges of copy from/to are specified by following symbols + * __etext: LMA of start of the section to copy from. Usually end of text + * __data_start__: VMA of start of the section to copy to + * __data_end__: VMA of end of the section to copy to + * + * All addresses must be aligned to 4 bytes boundary. + */ + ldr r1, =__etext + ldr r2, =__data_start__ + ldr r3, =__data_end__ + + subs r3, r2 + ble .L_loop1_done + +.L_loop1: + subs r3, #4 + ldr r0, [r1,r3] + str r0, [r2,r3] + bgt .L_loop1 + +.L_loop1_done: +#endif /*__STARTUP_COPY_MULTIPLE */ + +/* This part of work usually is done in C library startup code. Otherwise, + * define this macro to enable it in this startup. + * + * There are two schemes too. One can clear multiple BSS sections. Another + * can only clear one section. The former is more size expensive than the + * latter. + * + * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former. + * Otherwise define macro __STARTUP_CLEAR_BSS to choose the later. + */ +#ifdef __STARTUP_CLEAR_BSS_MULTIPLE +/* Multiple sections scheme. + * + * Between symbol address __copy_table_start__ and __copy_table_end__, + * there are array of tuples specifying: + * offset 0: Start of a BSS section + * offset 4: Size of this BSS section. Must be multiply of 4 + */ + ldr r3, =__zero_table_start__ + ldr r4, =__zero_table_end__ + +.L_loop2: + cmp r3, r4 + bge .L_loop2_done + ldr r1, [r3] + ldr r2, [r3, #4] + movs r0, 0 + +.L_loop2_0: + subs r2, #4 + blt .L_loop2_0_done + str r0, [r1, r2] + b .L_loop2_0 +.L_loop2_0_done: + + adds r3, #8 + b .L_loop2 +.L_loop2_done: +#elif defined (__STARTUP_CLEAR_BSS) +/* Single BSS section scheme. + * + * The BSS section is specified by following symbols + * __bss_start__: start of the BSS section. + * __bss_end__: end of the BSS section. + * + * Both addresses must be aligned to 4 bytes boundary. + */ + ldr r1, =__bss_start__ + ldr r2, =__bss_end__ + + movs r0, 0 + + subs r2, r1 + ble .L_loop3_done + +.L_loop3: + subs r2, #4 + str r0, [r1, r2] + bgt .L_loop3 +.L_loop3_done: +#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */ + + /* Update Vector Table Offset Register. */ + ldr r0, =__ramVectors + ldr r1, =CY_CPU_VTOR_ADDR + str r0, [r1] + dsb 0xF + +#ifndef __NO_SYSTEM_INIT + bl SystemInit +#endif + + bl main + + /* Should never get here */ + b . + + .pool + .size Reset_Handler, . - Reset_Handler + + .align 1 + .thumb_func + .weak Default_Handler + .type Default_Handler, %function +Default_Handler: + b . + .size Default_Handler, . - Default_Handler + .weak Cy_SysLib_FaultHandler + .type Cy_SysLib_FaultHandler, %function + +Cy_SysLib_FaultHandler: + b . + .size Cy_SysLib_FaultHandler, . - Cy_SysLib_FaultHandler + .type Fault_Handler, %function + +Fault_Handler: + /* Storing LR content for Creator call stack trace */ + push {LR} + movs r0, #4 + mov r1, LR + tst r0, r1 + beq .L_MSP + mrs r0, PSP + b .L_API_call +.L_MSP: + mrs r0, MSP +.L_API_call: + /* Compensation of stack pointer address due to pushing 4 bytes of LR */ + adds r0, r0, #4 + bl Cy_SysLib_FaultHandler + b . + .size Fault_Handler, . - Fault_Handler + +.macro def_fault_Handler fault_handler_name + .weak \fault_handler_name + .set \fault_handler_name, Fault_Handler + .endm + +/* Macro to define default handlers. Default handler + * will be weak symbol and just dead loops. They can be + * overwritten by other handlers */ + .macro def_irq_handler handler_name + .weak \handler_name + .set \handler_name, Default_Handler + .endm + + def_irq_handler NMI_Handler + + def_fault_Handler HardFault_Handler + + def_irq_handler SVC_Handler + def_irq_handler PendSV_Handler + def_irq_handler SysTick_Handler + + def_irq_handler NvicMux0_IRQHandler /* CPU User Interrupt #0 */ + def_irq_handler NvicMux1_IRQHandler /* CPU User Interrupt #1 */ + def_irq_handler NvicMux2_IRQHandler /* CPU User Interrupt #2 */ + def_irq_handler NvicMux3_IRQHandler /* CPU User Interrupt #3 */ + def_irq_handler NvicMux4_IRQHandler /* CPU User Interrupt #4 */ + def_irq_handler NvicMux5_IRQHandler /* CPU User Interrupt #5 */ + def_irq_handler NvicMux6_IRQHandler /* CPU User Interrupt #6 */ + def_irq_handler NvicMux7_IRQHandler /* CPU User Interrupt #7 */ + def_irq_handler Internal0_IRQHandler /* Internal SW Interrupt #0 */ + def_irq_handler Internal1_IRQHandler /* Internal SW Interrupt #1 */ + def_irq_handler Internal2_IRQHandler /* Internal SW Interrupt #2 */ + def_irq_handler Internal3_IRQHandler /* Internal SW Interrupt #3 */ + def_irq_handler Internal4_IRQHandler /* Internal SW Interrupt #4 */ + def_irq_handler Internal5_IRQHandler /* Internal SW Interrupt #5 */ + def_irq_handler Internal6_IRQHandler /* Internal SW Interrupt #6 */ + def_irq_handler Internal7_IRQHandler /* Internal SW Interrupt #7 */ + + .end + + +/* [] END OF FILE */ diff --git a/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM4/GCC_ARM/cy8c6xxa_cm4_dual.ld b/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM4/GCC_ARM/cy8c6xxa_cm4_dual.ld new file mode 100644 index 0000000..ec70309 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM4/GCC_ARM/cy8c6xxa_cm4_dual.ld @@ -0,0 +1,436 @@ +/***************************************************************************//** +* \file cy8c6xxa_cm4_dual.ld +* \version 2.70 +* +* Linker file for the GNU C compiler. +* +* The main purpose of the linker script is to describe how the sections in the +* input files should be mapped into the output file, and to control the memory +* layout of the output file. +* +* \note The entry point location is fixed and starts at 0x10000000. The valid +* application image should be placed there. +* +* \note The linker files included with the PDL template projects must be generic +* and handle all common use cases. Your project may not use every section +* defined in the linker files. In that case you may see warnings during the +* build process. In your project, you can simply comment out or remove the +* relevant code in the linker file. +* +******************************************************************************** +* \copyright +* Copyright 2016-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +SEARCH_DIR(.) +GROUP(-lgcc -lc -lnosys) +ENTRY(Reset_Handler) + +/* The size of the stack section at the end of CM4 SRAM */ +STACK_SIZE = 0x1000; + +/* The size of the Cortex-M0+ application image at the start of FLASH */ +FLASH_CM0P_SIZE = 0x2000; + +/* Force symbol to be entered in the output file as an undefined symbol. Doing +* this may, for example, trigger linking of additional modules from standard +* libraries. You may list several symbols for each EXTERN, and you may use +* EXTERN multiple times. This command has the same effect as the -u command-line +* option. +*/ +EXTERN(Reset_Handler) + +/* The MEMORY section below describes the location and size of blocks of memory in the target. +* Use this section to specify the memory regions available for allocation. +*/ +MEMORY +{ + /* The ram and flash regions control RAM and flash memory allocation for the CM4 core. + * You can change the memory allocation by editing the 'ram' and 'flash' regions. + * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use. + * Using this memory region for other purposes will lead to unexpected behavior. + * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld', + * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'. + */ + ram (rwx) : ORIGIN = 0x08002000, LENGTH = 0xFD800 + flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x200000 + + /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash. + * You can assign sections to this memory region for only one of the cores. + * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region. + * Therefore, repurposing this memory region will prevent such middleware from operation. + */ + em_eeprom (rx) : ORIGIN = 0x14000000, LENGTH = 0x8000 /* 32 KB */ + + /* The following regions define device specific memory regions and must not be changed. */ + sflash_user_data (rx) : ORIGIN = 0x16000800, LENGTH = 0x800 /* Supervisory flash: User data */ + sflash_nar (rx) : ORIGIN = 0x16001A00, LENGTH = 0x200 /* Supervisory flash: Normal Access Restrictions (NAR) */ + sflash_public_key (rx) : ORIGIN = 0x16005A00, LENGTH = 0xC00 /* Supervisory flash: Public Key */ + sflash_toc_2 (rx) : ORIGIN = 0x16007C00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 */ + sflash_rtoc_2 (rx) : ORIGIN = 0x16007E00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 Copy */ + xip (rx) : ORIGIN = 0x18000000, LENGTH = 0x8000000 /* 128 MB */ + efuse (r) : ORIGIN = 0x90700000, LENGTH = 0x100000 /* 1 MB */ +} + +/* Library configurations */ +GROUP(libgcc.a libc.a libm.a libnosys.a) + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * __Vectors_End + * __Vectors_Size + */ + + +SECTIONS +{ + /* Cortex-M0+ application flash image area */ + .cy_m0p_image ORIGIN(flash) : + { + . = ALIGN(4); + __cy_m0p_code_start = . ; + KEEP(*(.cy_m0p_image)) + __cy_m0p_code_end = . ; + } > flash + + /* Check if .cy_m0p_image size exceeds FLASH_CM0P_SIZE */ + ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4, increase FLASH_CM0P_SIZE") + + /* Cortex-M4 application flash area */ + .text ORIGIN(flash) + FLASH_CM0P_SIZE : + { + . = ALIGN(4); + __Vectors = . ; + KEEP(*(.vectors)) + . = ALIGN(4); + __Vectors_End = .; + __Vectors_Size = __Vectors_End - __Vectors; + __end__ = .; + + . = ALIGN(4); + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + /* Read-only code (constants). */ + *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*) + + KEEP(*(.eh_frame*)) + } > flash + + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + __exidx_start = .; + + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > flash + __exidx_end = .; + + + /* To copy multiple ROM to RAM sections, + * uncomment .copy.table section and, + * define __STARTUP_COPY_MULTIPLE in startup_psoc6_02_cm4.S */ + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + + /* Copy interrupt vectors from flash to RAM */ + LONG (__Vectors) /* From */ + LONG (__ram_vectors_start__) /* To */ + LONG (__Vectors_End - __Vectors) /* Size */ + + /* Copy data section to RAM */ + LONG (__etext) /* From */ + LONG (__data_start__) /* To */ + LONG (__data_end__ - __data_start__) /* Size */ + + __copy_table_end__ = .; + } > flash + + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_02_cm4.S */ + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + __zero_table_end__ = .; + } > flash + + __etext = . ; + + + .ramVectors (NOLOAD) : ALIGN(8) + { + __ram_vectors_start__ = .; + KEEP(*(.ram_vectors)) + __ram_vectors_end__ = .; + } > ram + + + .data __ram_vectors_end__ : AT (__etext) + { + __data_start__ = .; + + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + + KEEP(*(.cy_ramfunc*)) + . = ALIGN(4); + + __data_end__ = .; + + } > ram + + + /* Place variables in the section that should not be initialized during the + * device startup. + */ + .noinit (NOLOAD) : ALIGN(8) + { + KEEP(*(.noinit)) + } > ram + + + /* The uninitialized global or static variables are placed in this section. + * + * The NOLOAD attribute tells linker that .bss section does not consume + * any space in the image. The NOLOAD attribute changes the .bss type to + * NOBITS, and that makes linker to A) not allocate section in memory, and + * A) put information to clear the section with all zeros during application + * loading. + * + * Without the NOLOAD attribute, the .bss section might get PROGBITS type. + * This makes linker to A) allocate zeroed section in memory, and B) copy + * this section to RAM during application loading. + */ + .bss (NOLOAD): + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > ram + + + .heap (NOLOAD): + { + __HeapBase = .; + __end__ = .; + end = __end__; + KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; + __HeapLimit = .; + } > ram + + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (NOLOAD): + { + KEEP(*(.stack*)) + } > ram + + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(ram) + LENGTH(ram); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") + + + /* Used for the digital signature of the secure application and the Bootloader SDK application. + * The size of the section depends on the required data size. */ + .cy_app_signature ORIGIN(flash) + LENGTH(flash) - 256 : + { + KEEP(*(.cy_app_signature)) + } > flash + + + /* Emulated EEPROM Flash area */ + .cy_em_eeprom : + { + KEEP(*(.cy_em_eeprom)) + } > em_eeprom + + + /* Supervisory Flash: User data */ + .cy_sflash_user_data : + { + KEEP(*(.cy_sflash_user_data)) + } > sflash_user_data + + + /* Supervisory Flash: Normal Access Restrictions (NAR) */ + .cy_sflash_nar : + { + KEEP(*(.cy_sflash_nar)) + } > sflash_nar + + + /* Supervisory Flash: Public Key */ + .cy_sflash_public_key : + { + KEEP(*(.cy_sflash_public_key)) + } > sflash_public_key + + + /* Supervisory Flash: Table of Content # 2 */ + .cy_toc_part2 : + { + KEEP(*(.cy_toc_part2)) + } > sflash_toc_2 + + + /* Supervisory Flash: Table of Content # 2 Copy */ + .cy_rtoc_part2 : + { + KEEP(*(.cy_rtoc_part2)) + } > sflash_rtoc_2 + + + /* Places the code in the Execute in Place (XIP) section. See the smif driver + * documentation for details. + */ + .cy_xip : + { + KEEP(*(.cy_xip)) + } > xip + + + /* eFuse */ + .cy_efuse : + { + KEEP(*(.cy_efuse)) + } > efuse + + + /* These sections are used for additional metadata (silicon revision, + * Silicon/JTAG ID, etc.) storage. + */ + .cymeta 0x90500000 : { KEEP(*(.cymeta)) } :NONE +} + + +/* The following symbols used by the cymcuelftool. */ +/* Flash */ +__cy_memory_0_start = 0x10000000; +__cy_memory_0_length = 0x00200000; +__cy_memory_0_row_size = 0x200; + +/* Emulated EEPROM Flash area */ +__cy_memory_1_start = 0x14000000; +__cy_memory_1_length = 0x8000; +__cy_memory_1_row_size = 0x200; + +/* Supervisory Flash */ +__cy_memory_2_start = 0x16000000; +__cy_memory_2_length = 0x8000; +__cy_memory_2_row_size = 0x200; + +/* XIP */ +__cy_memory_3_start = 0x18000000; +__cy_memory_3_length = 0x08000000; +__cy_memory_3_row_size = 0x200; + +/* eFuse */ +__cy_memory_4_start = 0x90700000; +__cy_memory_4_length = 0x100000; +__cy_memory_4_row_size = 1; + +/* EOF */ diff --git a/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM4/GCC_ARM/startup_psoc6_02_cm4.S b/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM4/GCC_ARM/startup_psoc6_02_cm4.S new file mode 100644 index 0000000..3eb9dab --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/PSOC_062_2M/CM4/GCC_ARM/startup_psoc6_02_cm4.S @@ -0,0 +1,697 @@ +/**************************************************************************//** + * @file startup_psoc6_02_cm4.S + * @brief CMSIS Core Device Startup File for + * ARMCM4 Device Series + * @version V5.00 + * @date 02. March 2016 + ******************************************************************************/ +/* + * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + /* Address of the NMI handler */ + #define CY_NMI_HANLDER_ADDR 0x0000000D + + /* The CPU VTOR register */ + #define CY_CPU_VTOR_ADDR 0xE000ED08 + + /* Copy flash vectors and data section to RAM */ + #define __STARTUP_COPY_MULTIPLE + + /* Clear single BSS section */ + #define __STARTUP_CLEAR_BSS + + .syntax unified + .arch armv7-m + + .section .stack + .align 3 +#ifdef __STACK_SIZE + .equ Stack_Size, __STACK_SIZE +#else + .equ Stack_Size, 0x00001000 +#endif + .globl __StackTop + .globl __StackLimit +__StackLimit: + .space Stack_Size + .size __StackLimit, . - __StackLimit +__StackTop: + .size __StackTop, . - __StackTop + + .section .heap + .align 3 +#ifdef __HEAP_SIZE + .equ Heap_Size, __HEAP_SIZE +#else + .equ Heap_Size, 0x00000400 +#endif + .globl __HeapBase + .globl __HeapLimit +__HeapBase: + .if Heap_Size + .space Heap_Size + .endif + .size __HeapBase, . - __HeapBase +__HeapLimit: + .size __HeapLimit, . - __HeapLimit + + .section .vectors + .align 2 + .globl __Vectors +__Vectors: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long CY_NMI_HANLDER_ADDR /* NMI Handler */ + .long HardFault_Handler /* Hard Fault Handler */ + .long MemManage_Handler /* MPU Fault Handler */ + .long BusFault_Handler /* Bus Fault Handler */ + .long UsageFault_Handler /* Usage Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long SVC_Handler /* SVCall Handler */ + .long DebugMon_Handler /* Debug Monitor Handler */ + .long 0 /* Reserved */ + .long PendSV_Handler /* PendSV Handler */ + .long SysTick_Handler /* SysTick Handler */ + + /* External interrupts Description */ + .long ioss_interrupts_gpio_0_IRQHandler /* GPIO Port Interrupt #0 */ + .long ioss_interrupts_gpio_1_IRQHandler /* GPIO Port Interrupt #1 */ + .long ioss_interrupts_gpio_2_IRQHandler /* GPIO Port Interrupt #2 */ + .long ioss_interrupts_gpio_3_IRQHandler /* GPIO Port Interrupt #3 */ + .long ioss_interrupts_gpio_4_IRQHandler /* GPIO Port Interrupt #4 */ + .long ioss_interrupts_gpio_5_IRQHandler /* GPIO Port Interrupt #5 */ + .long ioss_interrupts_gpio_6_IRQHandler /* GPIO Port Interrupt #6 */ + .long ioss_interrupts_gpio_7_IRQHandler /* GPIO Port Interrupt #7 */ + .long ioss_interrupts_gpio_8_IRQHandler /* GPIO Port Interrupt #8 */ + .long ioss_interrupts_gpio_9_IRQHandler /* GPIO Port Interrupt #9 */ + .long ioss_interrupts_gpio_10_IRQHandler /* GPIO Port Interrupt #10 */ + .long ioss_interrupts_gpio_11_IRQHandler /* GPIO Port Interrupt #11 */ + .long ioss_interrupts_gpio_12_IRQHandler /* GPIO Port Interrupt #12 */ + .long ioss_interrupts_gpio_13_IRQHandler /* GPIO Port Interrupt #13 */ + .long ioss_interrupts_gpio_14_IRQHandler /* GPIO Port Interrupt #14 */ + .long ioss_interrupt_gpio_IRQHandler /* GPIO All Ports */ + .long ioss_interrupt_vdd_IRQHandler /* GPIO Supply Detect Interrupt */ + .long lpcomp_interrupt_IRQHandler /* Low Power Comparator Interrupt */ + .long scb_8_interrupt_IRQHandler /* Serial Communication Block #8 (DeepSleep capable) */ + .long srss_interrupt_mcwdt_0_IRQHandler /* Multi Counter Watchdog Timer interrupt */ + .long srss_interrupt_mcwdt_1_IRQHandler /* Multi Counter Watchdog Timer interrupt */ + .long srss_interrupt_backup_IRQHandler /* Backup domain interrupt */ + .long srss_interrupt_IRQHandler /* Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) */ + .long cpuss_interrupts_ipc_0_IRQHandler /* CPUSS Inter Process Communication Interrupt #0 */ + .long cpuss_interrupts_ipc_1_IRQHandler /* CPUSS Inter Process Communication Interrupt #1 */ + .long cpuss_interrupts_ipc_2_IRQHandler /* CPUSS Inter Process Communication Interrupt #2 */ + .long cpuss_interrupts_ipc_3_IRQHandler /* CPUSS Inter Process Communication Interrupt #3 */ + .long cpuss_interrupts_ipc_4_IRQHandler /* CPUSS Inter Process Communication Interrupt #4 */ + .long cpuss_interrupts_ipc_5_IRQHandler /* CPUSS Inter Process Communication Interrupt #5 */ + .long cpuss_interrupts_ipc_6_IRQHandler /* CPUSS Inter Process Communication Interrupt #6 */ + .long cpuss_interrupts_ipc_7_IRQHandler /* CPUSS Inter Process Communication Interrupt #7 */ + .long cpuss_interrupts_ipc_8_IRQHandler /* CPUSS Inter Process Communication Interrupt #8 */ + .long cpuss_interrupts_ipc_9_IRQHandler /* CPUSS Inter Process Communication Interrupt #9 */ + .long cpuss_interrupts_ipc_10_IRQHandler /* CPUSS Inter Process Communication Interrupt #10 */ + .long cpuss_interrupts_ipc_11_IRQHandler /* CPUSS Inter Process Communication Interrupt #11 */ + .long cpuss_interrupts_ipc_12_IRQHandler /* CPUSS Inter Process Communication Interrupt #12 */ + .long cpuss_interrupts_ipc_13_IRQHandler /* CPUSS Inter Process Communication Interrupt #13 */ + .long cpuss_interrupts_ipc_14_IRQHandler /* CPUSS Inter Process Communication Interrupt #14 */ + .long cpuss_interrupts_ipc_15_IRQHandler /* CPUSS Inter Process Communication Interrupt #15 */ + .long scb_0_interrupt_IRQHandler /* Serial Communication Block #0 */ + .long scb_1_interrupt_IRQHandler /* Serial Communication Block #1 */ + .long scb_2_interrupt_IRQHandler /* Serial Communication Block #2 */ + .long scb_3_interrupt_IRQHandler /* Serial Communication Block #3 */ + .long scb_4_interrupt_IRQHandler /* Serial Communication Block #4 */ + .long scb_5_interrupt_IRQHandler /* Serial Communication Block #5 */ + .long scb_6_interrupt_IRQHandler /* Serial Communication Block #6 */ + .long scb_7_interrupt_IRQHandler /* Serial Communication Block #7 */ + .long scb_9_interrupt_IRQHandler /* Serial Communication Block #9 */ + .long scb_10_interrupt_IRQHandler /* Serial Communication Block #10 */ + .long scb_11_interrupt_IRQHandler /* Serial Communication Block #11 */ + .long scb_12_interrupt_IRQHandler /* Serial Communication Block #12 */ + .long csd_interrupt_IRQHandler /* CSD (Capsense) interrupt */ + .long cpuss_interrupts_dmac_0_IRQHandler /* CPUSS DMAC, Channel #0 */ + .long cpuss_interrupts_dmac_1_IRQHandler /* CPUSS DMAC, Channel #1 */ + .long cpuss_interrupts_dmac_2_IRQHandler /* CPUSS DMAC, Channel #2 */ + .long cpuss_interrupts_dmac_3_IRQHandler /* CPUSS DMAC, Channel #3 */ + .long cpuss_interrupts_dw0_0_IRQHandler /* CPUSS DataWire #0, Channel #0 */ + .long cpuss_interrupts_dw0_1_IRQHandler /* CPUSS DataWire #0, Channel #1 */ + .long cpuss_interrupts_dw0_2_IRQHandler /* CPUSS DataWire #0, Channel #2 */ + .long cpuss_interrupts_dw0_3_IRQHandler /* CPUSS DataWire #0, Channel #3 */ + .long cpuss_interrupts_dw0_4_IRQHandler /* CPUSS DataWire #0, Channel #4 */ + .long cpuss_interrupts_dw0_5_IRQHandler /* CPUSS DataWire #0, Channel #5 */ + .long cpuss_interrupts_dw0_6_IRQHandler /* CPUSS DataWire #0, Channel #6 */ + .long cpuss_interrupts_dw0_7_IRQHandler /* CPUSS DataWire #0, Channel #7 */ + .long cpuss_interrupts_dw0_8_IRQHandler /* CPUSS DataWire #0, Channel #8 */ + .long cpuss_interrupts_dw0_9_IRQHandler /* CPUSS DataWire #0, Channel #9 */ + .long cpuss_interrupts_dw0_10_IRQHandler /* CPUSS DataWire #0, Channel #10 */ + .long cpuss_interrupts_dw0_11_IRQHandler /* CPUSS DataWire #0, Channel #11 */ + .long cpuss_interrupts_dw0_12_IRQHandler /* CPUSS DataWire #0, Channel #12 */ + .long cpuss_interrupts_dw0_13_IRQHandler /* CPUSS DataWire #0, Channel #13 */ + .long cpuss_interrupts_dw0_14_IRQHandler /* CPUSS DataWire #0, Channel #14 */ + .long cpuss_interrupts_dw0_15_IRQHandler /* CPUSS DataWire #0, Channel #15 */ + .long cpuss_interrupts_dw0_16_IRQHandler /* CPUSS DataWire #0, Channel #16 */ + .long cpuss_interrupts_dw0_17_IRQHandler /* CPUSS DataWire #0, Channel #17 */ + .long cpuss_interrupts_dw0_18_IRQHandler /* CPUSS DataWire #0, Channel #18 */ + .long cpuss_interrupts_dw0_19_IRQHandler /* CPUSS DataWire #0, Channel #19 */ + .long cpuss_interrupts_dw0_20_IRQHandler /* CPUSS DataWire #0, Channel #20 */ + .long cpuss_interrupts_dw0_21_IRQHandler /* CPUSS DataWire #0, Channel #21 */ + .long cpuss_interrupts_dw0_22_IRQHandler /* CPUSS DataWire #0, Channel #22 */ + .long cpuss_interrupts_dw0_23_IRQHandler /* CPUSS DataWire #0, Channel #23 */ + .long cpuss_interrupts_dw0_24_IRQHandler /* CPUSS DataWire #0, Channel #24 */ + .long cpuss_interrupts_dw0_25_IRQHandler /* CPUSS DataWire #0, Channel #25 */ + .long cpuss_interrupts_dw0_26_IRQHandler /* CPUSS DataWire #0, Channel #26 */ + .long cpuss_interrupts_dw0_27_IRQHandler /* CPUSS DataWire #0, Channel #27 */ + .long cpuss_interrupts_dw0_28_IRQHandler /* CPUSS DataWire #0, Channel #28 */ + .long cpuss_interrupts_dw1_0_IRQHandler /* CPUSS DataWire #1, Channel #0 */ + .long cpuss_interrupts_dw1_1_IRQHandler /* CPUSS DataWire #1, Channel #1 */ + .long cpuss_interrupts_dw1_2_IRQHandler /* CPUSS DataWire #1, Channel #2 */ + .long cpuss_interrupts_dw1_3_IRQHandler /* CPUSS DataWire #1, Channel #3 */ + .long cpuss_interrupts_dw1_4_IRQHandler /* CPUSS DataWire #1, Channel #4 */ + .long cpuss_interrupts_dw1_5_IRQHandler /* CPUSS DataWire #1, Channel #5 */ + .long cpuss_interrupts_dw1_6_IRQHandler /* CPUSS DataWire #1, Channel #6 */ + .long cpuss_interrupts_dw1_7_IRQHandler /* CPUSS DataWire #1, Channel #7 */ + .long cpuss_interrupts_dw1_8_IRQHandler /* CPUSS DataWire #1, Channel #8 */ + .long cpuss_interrupts_dw1_9_IRQHandler /* CPUSS DataWire #1, Channel #9 */ + .long cpuss_interrupts_dw1_10_IRQHandler /* CPUSS DataWire #1, Channel #10 */ + .long cpuss_interrupts_dw1_11_IRQHandler /* CPUSS DataWire #1, Channel #11 */ + .long cpuss_interrupts_dw1_12_IRQHandler /* CPUSS DataWire #1, Channel #12 */ + .long cpuss_interrupts_dw1_13_IRQHandler /* CPUSS DataWire #1, Channel #13 */ + .long cpuss_interrupts_dw1_14_IRQHandler /* CPUSS DataWire #1, Channel #14 */ + .long cpuss_interrupts_dw1_15_IRQHandler /* CPUSS DataWire #1, Channel #15 */ + .long cpuss_interrupts_dw1_16_IRQHandler /* CPUSS DataWire #1, Channel #16 */ + .long cpuss_interrupts_dw1_17_IRQHandler /* CPUSS DataWire #1, Channel #17 */ + .long cpuss_interrupts_dw1_18_IRQHandler /* CPUSS DataWire #1, Channel #18 */ + .long cpuss_interrupts_dw1_19_IRQHandler /* CPUSS DataWire #1, Channel #19 */ + .long cpuss_interrupts_dw1_20_IRQHandler /* CPUSS DataWire #1, Channel #20 */ + .long cpuss_interrupts_dw1_21_IRQHandler /* CPUSS DataWire #1, Channel #21 */ + .long cpuss_interrupts_dw1_22_IRQHandler /* CPUSS DataWire #1, Channel #22 */ + .long cpuss_interrupts_dw1_23_IRQHandler /* CPUSS DataWire #1, Channel #23 */ + .long cpuss_interrupts_dw1_24_IRQHandler /* CPUSS DataWire #1, Channel #24 */ + .long cpuss_interrupts_dw1_25_IRQHandler /* CPUSS DataWire #1, Channel #25 */ + .long cpuss_interrupts_dw1_26_IRQHandler /* CPUSS DataWire #1, Channel #26 */ + .long cpuss_interrupts_dw1_27_IRQHandler /* CPUSS DataWire #1, Channel #27 */ + .long cpuss_interrupts_dw1_28_IRQHandler /* CPUSS DataWire #1, Channel #28 */ + .long cpuss_interrupts_fault_0_IRQHandler /* CPUSS Fault Structure Interrupt #0 */ + .long cpuss_interrupts_fault_1_IRQHandler /* CPUSS Fault Structure Interrupt #1 */ + .long cpuss_interrupt_crypto_IRQHandler /* CRYPTO Accelerator Interrupt */ + .long cpuss_interrupt_fm_IRQHandler /* FLASH Macro Interrupt */ + .long cpuss_interrupts_cm4_fp_IRQHandler /* Floating Point operation fault */ + .long cpuss_interrupts_cm0_cti_0_IRQHandler /* CM0+ CTI #0 */ + .long cpuss_interrupts_cm0_cti_1_IRQHandler /* CM0+ CTI #1 */ + .long cpuss_interrupts_cm4_cti_0_IRQHandler /* CM4 CTI #0 */ + .long cpuss_interrupts_cm4_cti_1_IRQHandler /* CM4 CTI #1 */ + .long tcpwm_0_interrupts_0_IRQHandler /* TCPWM #0, Counter #0 */ + .long tcpwm_0_interrupts_1_IRQHandler /* TCPWM #0, Counter #1 */ + .long tcpwm_0_interrupts_2_IRQHandler /* TCPWM #0, Counter #2 */ + .long tcpwm_0_interrupts_3_IRQHandler /* TCPWM #0, Counter #3 */ + .long tcpwm_0_interrupts_4_IRQHandler /* TCPWM #0, Counter #4 */ + .long tcpwm_0_interrupts_5_IRQHandler /* TCPWM #0, Counter #5 */ + .long tcpwm_0_interrupts_6_IRQHandler /* TCPWM #0, Counter #6 */ + .long tcpwm_0_interrupts_7_IRQHandler /* TCPWM #0, Counter #7 */ + .long tcpwm_1_interrupts_0_IRQHandler /* TCPWM #1, Counter #0 */ + .long tcpwm_1_interrupts_1_IRQHandler /* TCPWM #1, Counter #1 */ + .long tcpwm_1_interrupts_2_IRQHandler /* TCPWM #1, Counter #2 */ + .long tcpwm_1_interrupts_3_IRQHandler /* TCPWM #1, Counter #3 */ + .long tcpwm_1_interrupts_4_IRQHandler /* TCPWM #1, Counter #4 */ + .long tcpwm_1_interrupts_5_IRQHandler /* TCPWM #1, Counter #5 */ + .long tcpwm_1_interrupts_6_IRQHandler /* TCPWM #1, Counter #6 */ + .long tcpwm_1_interrupts_7_IRQHandler /* TCPWM #1, Counter #7 */ + .long tcpwm_1_interrupts_8_IRQHandler /* TCPWM #1, Counter #8 */ + .long tcpwm_1_interrupts_9_IRQHandler /* TCPWM #1, Counter #9 */ + .long tcpwm_1_interrupts_10_IRQHandler /* TCPWM #1, Counter #10 */ + .long tcpwm_1_interrupts_11_IRQHandler /* TCPWM #1, Counter #11 */ + .long tcpwm_1_interrupts_12_IRQHandler /* TCPWM #1, Counter #12 */ + .long tcpwm_1_interrupts_13_IRQHandler /* TCPWM #1, Counter #13 */ + .long tcpwm_1_interrupts_14_IRQHandler /* TCPWM #1, Counter #14 */ + .long tcpwm_1_interrupts_15_IRQHandler /* TCPWM #1, Counter #15 */ + .long tcpwm_1_interrupts_16_IRQHandler /* TCPWM #1, Counter #16 */ + .long tcpwm_1_interrupts_17_IRQHandler /* TCPWM #1, Counter #17 */ + .long tcpwm_1_interrupts_18_IRQHandler /* TCPWM #1, Counter #18 */ + .long tcpwm_1_interrupts_19_IRQHandler /* TCPWM #1, Counter #19 */ + .long tcpwm_1_interrupts_20_IRQHandler /* TCPWM #1, Counter #20 */ + .long tcpwm_1_interrupts_21_IRQHandler /* TCPWM #1, Counter #21 */ + .long tcpwm_1_interrupts_22_IRQHandler /* TCPWM #1, Counter #22 */ + .long tcpwm_1_interrupts_23_IRQHandler /* TCPWM #1, Counter #23 */ + .long pass_interrupt_sar_IRQHandler /* SAR ADC interrupt */ + .long audioss_0_interrupt_i2s_IRQHandler /* I2S0 Audio interrupt */ + .long audioss_0_interrupt_pdm_IRQHandler /* PDM0/PCM0 Audio interrupt */ + .long audioss_1_interrupt_i2s_IRQHandler /* I2S1 Audio interrupt */ + .long profile_interrupt_IRQHandler /* Energy Profiler interrupt */ + .long smif_interrupt_IRQHandler /* Serial Memory Interface interrupt */ + .long usb_interrupt_hi_IRQHandler /* USB Interrupt */ + .long usb_interrupt_med_IRQHandler /* USB Interrupt */ + .long usb_interrupt_lo_IRQHandler /* USB Interrupt */ + .long sdhc_0_interrupt_wakeup_IRQHandler /* SDIO wakeup interrupt for mxsdhc */ + .long sdhc_0_interrupt_general_IRQHandler /* Consolidated interrupt for mxsdhc for everything else */ + .long sdhc_1_interrupt_wakeup_IRQHandler /* EEMC wakeup interrupt for mxsdhc, not used */ + .long sdhc_1_interrupt_general_IRQHandler /* Consolidated interrupt for mxsdhc for everything else */ + + + .size __Vectors, . - __Vectors + .equ __VectorsSize, . - __Vectors + + .section .ram_vectors + .align 2 + .globl __ramVectors +__ramVectors: + .space __VectorsSize + .size __ramVectors, . - __ramVectors + + + .text + .thumb + .thumb_func + .align 2 + + /* + * Device startup customization + * + * Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) + * because this function is executed as the first instruction in the ResetHandler. + * The PDL is also not initialized to use the proper register offsets. + * The user of this function is responsible for initializing the PDL and resources before using them. + */ + .weak Cy_OnResetUser + .func Cy_OnResetUser, Cy_OnResetUser + .type Cy_OnResetUser, %function + +Cy_OnResetUser: + bx lr + .size Cy_OnResetUser, . - Cy_OnResetUser + .endfunc + + /* OS-specific low-level initialization */ + .weak cy_toolchain_init + .func cy_toolchain_init, cy_toolchain_init + .type cy_toolchain_init, %function + +cy_toolchain_init: + bx lr + .size cy_toolchain_init, . - cy_toolchain_init + .endfunc + + /* Reset handler */ + .weak Reset_Handler + .type Reset_Handler, %function + +Reset_Handler: + bl Cy_OnResetUser + cpsid i + +/* Firstly it copies data from read only memory to RAM. There are two schemes + * to copy. One can copy more than one sections. Another can only copy + * one section. The former scheme needs more instructions and read-only + * data to implement than the latter. + * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */ + +#ifdef __STARTUP_COPY_MULTIPLE +/* Multiple sections scheme. + * + * Between symbol address __copy_table_start__ and __copy_table_end__, + * there are array of triplets, each of which specify: + * offset 0: LMA of start of a section to copy from + * offset 4: VMA of start of a section to copy to + * offset 8: size of the section to copy. Must be multiply of 4 + * + * All addresses must be aligned to 4 bytes boundary. + */ + ldr r4, =__copy_table_start__ + ldr r5, =__copy_table_end__ + +.L_loop0: + cmp r4, r5 + bge .L_loop0_done + ldr r1, [r4] + ldr r2, [r4, #4] + ldr r3, [r4, #8] + +.L_loop0_0: + subs r3, #4 + ittt ge + ldrge r0, [r1, r3] + strge r0, [r2, r3] + bge .L_loop0_0 + + adds r4, #12 + b .L_loop0 + +.L_loop0_done: +#else +/* Single section scheme. + * + * The ranges of copy from/to are specified by following symbols + * __etext: LMA of start of the section to copy from. Usually end of text + * __data_start__: VMA of start of the section to copy to + * __data_end__: VMA of end of the section to copy to + * + * All addresses must be aligned to 4 bytes boundary. + */ + ldr r1, =__etext + ldr r2, =__data_start__ + ldr r3, =__data_end__ + +.L_loop1: + cmp r2, r3 + ittt lt + ldrlt r0, [r1], #4 + strlt r0, [r2], #4 + blt .L_loop1 +#endif /*__STARTUP_COPY_MULTIPLE */ + +/* This part of work usually is done in C library startup code. Otherwise, + * define this macro to enable it in this startup. + * + * There are two schemes too. One can clear multiple BSS sections. Another + * can only clear one section. The former is more size expensive than the + * latter. + * + * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former. + * Otherwise define macro __STARTUP_CLEAR_BSS to choose the later. + */ +#ifdef __STARTUP_CLEAR_BSS_MULTIPLE +/* Multiple sections scheme. + * + * Between symbol address __copy_table_start__ and __copy_table_end__, + * there are array of tuples specifying: + * offset 0: Start of a BSS section + * offset 4: Size of this BSS section. Must be multiply of 4 + */ + ldr r3, =__zero_table_start__ + ldr r4, =__zero_table_end__ + +.L_loop2: + cmp r3, r4 + bge .L_loop2_done + ldr r1, [r3] + ldr r2, [r3, #4] + movs r0, 0 + +.L_loop2_0: + subs r2, #4 + itt ge + strge r0, [r1, r2] + bge .L_loop2_0 + + adds r3, #8 + b .L_loop2 +.L_loop2_done: +#elif defined (__STARTUP_CLEAR_BSS) +/* Single BSS section scheme. + * + * The BSS section is specified by following symbols + * __bss_start__: start of the BSS section. + * __bss_end__: end of the BSS section. + * + * Both addresses must be aligned to 4 bytes boundary. + */ + ldr r1, =__bss_start__ + ldr r2, =__bss_end__ + + movs r0, 0 +.L_loop3: + cmp r1, r2 + itt lt + strlt r0, [r1], #4 + blt .L_loop3 +#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */ + + /* Update Vector Table Offset Register. */ + ldr r0, =__ramVectors + ldr r1, =CY_CPU_VTOR_ADDR + str r0, [r1] + dsb 0xF + + /* Enable the FPU if used */ + bl Cy_SystemInitFpuEnable + +#ifndef __NO_SYSTEM_INIT + bl SystemInit +#endif + + /* OS-specific low-level initialization */ + bl cy_toolchain_init + + /* Call C/C++ static constructors */ + bl __libc_init_array + + /* Execute main application */ + bl main + + /* Call C/C++ static destructors */ + bl __libc_fini_array + + /* Should never get here */ + b . + + .pool + .size Reset_Handler, . - Reset_Handler + + .align 1 + .thumb_func + .weak Default_Handler + .type Default_Handler, %function + +Default_Handler: + b . + .size Default_Handler, . - Default_Handler + + + .weak Cy_SysLib_FaultHandler + .type Cy_SysLib_FaultHandler, %function + +Cy_SysLib_FaultHandler: + b . + .size Cy_SysLib_FaultHandler, . - Cy_SysLib_FaultHandler + .type Fault_Handler, %function + +Fault_Handler: + /* Storing LR content for Creator call stack trace */ + push {LR} + movs r0, #4 + mov r1, LR + tst r0, r1 + beq .L_MSP + mrs r0, PSP + b .L_API_call +.L_MSP: + mrs r0, MSP +.L_API_call: + /* Compensation of stack pointer address due to pushing 4 bytes of LR */ + adds r0, r0, #4 + bl Cy_SysLib_FaultHandler + b . + .size Fault_Handler, . - Fault_Handler + +.macro def_fault_Handler fault_handler_name + .weak \fault_handler_name + .set \fault_handler_name, Fault_Handler + .endm + +/* Macro to define default handlers. Default handler + * will be weak symbol and just dead loops. They can be + * overwritten by other handlers */ + .macro def_irq_handler handler_name + .weak \handler_name + .set \handler_name, Default_Handler + .endm + + def_irq_handler NMI_Handler + + def_fault_Handler HardFault_Handler + def_fault_Handler MemManage_Handler + def_fault_Handler BusFault_Handler + def_fault_Handler UsageFault_Handler + + def_irq_handler SVC_Handler + def_irq_handler DebugMon_Handler + def_irq_handler PendSV_Handler + def_irq_handler SysTick_Handler + + def_irq_handler ioss_interrupts_gpio_0_IRQHandler /* GPIO Port Interrupt #0 */ + def_irq_handler ioss_interrupts_gpio_1_IRQHandler /* GPIO Port Interrupt #1 */ + def_irq_handler ioss_interrupts_gpio_2_IRQHandler /* GPIO Port Interrupt #2 */ + def_irq_handler ioss_interrupts_gpio_3_IRQHandler /* GPIO Port Interrupt #3 */ + def_irq_handler ioss_interrupts_gpio_4_IRQHandler /* GPIO Port Interrupt #4 */ + def_irq_handler ioss_interrupts_gpio_5_IRQHandler /* GPIO Port Interrupt #5 */ + def_irq_handler ioss_interrupts_gpio_6_IRQHandler /* GPIO Port Interrupt #6 */ + def_irq_handler ioss_interrupts_gpio_7_IRQHandler /* GPIO Port Interrupt #7 */ + def_irq_handler ioss_interrupts_gpio_8_IRQHandler /* GPIO Port Interrupt #8 */ + def_irq_handler ioss_interrupts_gpio_9_IRQHandler /* GPIO Port Interrupt #9 */ + def_irq_handler ioss_interrupts_gpio_10_IRQHandler /* GPIO Port Interrupt #10 */ + def_irq_handler ioss_interrupts_gpio_11_IRQHandler /* GPIO Port Interrupt #11 */ + def_irq_handler ioss_interrupts_gpio_12_IRQHandler /* GPIO Port Interrupt #12 */ + def_irq_handler ioss_interrupts_gpio_13_IRQHandler /* GPIO Port Interrupt #13 */ + def_irq_handler ioss_interrupts_gpio_14_IRQHandler /* GPIO Port Interrupt #14 */ + def_irq_handler ioss_interrupt_gpio_IRQHandler /* GPIO All Ports */ + def_irq_handler ioss_interrupt_vdd_IRQHandler /* GPIO Supply Detect Interrupt */ + def_irq_handler lpcomp_interrupt_IRQHandler /* Low Power Comparator Interrupt */ + def_irq_handler scb_8_interrupt_IRQHandler /* Serial Communication Block #8 (DeepSleep capable) */ + def_irq_handler srss_interrupt_mcwdt_0_IRQHandler /* Multi Counter Watchdog Timer interrupt */ + def_irq_handler srss_interrupt_mcwdt_1_IRQHandler /* Multi Counter Watchdog Timer interrupt */ + def_irq_handler srss_interrupt_backup_IRQHandler /* Backup domain interrupt */ + def_irq_handler srss_interrupt_IRQHandler /* Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) */ + def_irq_handler cpuss_interrupts_ipc_0_IRQHandler /* CPUSS Inter Process Communication Interrupt #0 */ + def_irq_handler cpuss_interrupts_ipc_1_IRQHandler /* CPUSS Inter Process Communication Interrupt #1 */ + def_irq_handler cpuss_interrupts_ipc_2_IRQHandler /* CPUSS Inter Process Communication Interrupt #2 */ + def_irq_handler cpuss_interrupts_ipc_3_IRQHandler /* CPUSS Inter Process Communication Interrupt #3 */ + def_irq_handler cpuss_interrupts_ipc_4_IRQHandler /* CPUSS Inter Process Communication Interrupt #4 */ + def_irq_handler cpuss_interrupts_ipc_5_IRQHandler /* CPUSS Inter Process Communication Interrupt #5 */ + def_irq_handler cpuss_interrupts_ipc_6_IRQHandler /* CPUSS Inter Process Communication Interrupt #6 */ + def_irq_handler cpuss_interrupts_ipc_7_IRQHandler /* CPUSS Inter Process Communication Interrupt #7 */ + def_irq_handler cpuss_interrupts_ipc_8_IRQHandler /* CPUSS Inter Process Communication Interrupt #8 */ + def_irq_handler cpuss_interrupts_ipc_9_IRQHandler /* CPUSS Inter Process Communication Interrupt #9 */ + def_irq_handler cpuss_interrupts_ipc_10_IRQHandler /* CPUSS Inter Process Communication Interrupt #10 */ + def_irq_handler cpuss_interrupts_ipc_11_IRQHandler /* CPUSS Inter Process Communication Interrupt #11 */ + def_irq_handler cpuss_interrupts_ipc_12_IRQHandler /* CPUSS Inter Process Communication Interrupt #12 */ + def_irq_handler cpuss_interrupts_ipc_13_IRQHandler /* CPUSS Inter Process Communication Interrupt #13 */ + def_irq_handler cpuss_interrupts_ipc_14_IRQHandler /* CPUSS Inter Process Communication Interrupt #14 */ + def_irq_handler cpuss_interrupts_ipc_15_IRQHandler /* CPUSS Inter Process Communication Interrupt #15 */ + def_irq_handler scb_0_interrupt_IRQHandler /* Serial Communication Block #0 */ + def_irq_handler scb_1_interrupt_IRQHandler /* Serial Communication Block #1 */ + def_irq_handler scb_2_interrupt_IRQHandler /* Serial Communication Block #2 */ + def_irq_handler scb_3_interrupt_IRQHandler /* Serial Communication Block #3 */ + def_irq_handler scb_4_interrupt_IRQHandler /* Serial Communication Block #4 */ + def_irq_handler scb_5_interrupt_IRQHandler /* Serial Communication Block #5 */ + def_irq_handler scb_6_interrupt_IRQHandler /* Serial Communication Block #6 */ + def_irq_handler scb_7_interrupt_IRQHandler /* Serial Communication Block #7 */ + def_irq_handler scb_9_interrupt_IRQHandler /* Serial Communication Block #9 */ + def_irq_handler scb_10_interrupt_IRQHandler /* Serial Communication Block #10 */ + def_irq_handler scb_11_interrupt_IRQHandler /* Serial Communication Block #11 */ + def_irq_handler scb_12_interrupt_IRQHandler /* Serial Communication Block #12 */ + def_irq_handler csd_interrupt_IRQHandler /* CSD (Capsense) interrupt */ + def_irq_handler cpuss_interrupts_dmac_0_IRQHandler /* CPUSS DMAC, Channel #0 */ + def_irq_handler cpuss_interrupts_dmac_1_IRQHandler /* CPUSS DMAC, Channel #1 */ + def_irq_handler cpuss_interrupts_dmac_2_IRQHandler /* CPUSS DMAC, Channel #2 */ + def_irq_handler cpuss_interrupts_dmac_3_IRQHandler /* CPUSS DMAC, Channel #3 */ + def_irq_handler cpuss_interrupts_dw0_0_IRQHandler /* CPUSS DataWire #0, Channel #0 */ + def_irq_handler cpuss_interrupts_dw0_1_IRQHandler /* CPUSS DataWire #0, Channel #1 */ + def_irq_handler cpuss_interrupts_dw0_2_IRQHandler /* CPUSS DataWire #0, Channel #2 */ + def_irq_handler cpuss_interrupts_dw0_3_IRQHandler /* CPUSS DataWire #0, Channel #3 */ + def_irq_handler cpuss_interrupts_dw0_4_IRQHandler /* CPUSS DataWire #0, Channel #4 */ + def_irq_handler cpuss_interrupts_dw0_5_IRQHandler /* CPUSS DataWire #0, Channel #5 */ + def_irq_handler cpuss_interrupts_dw0_6_IRQHandler /* CPUSS DataWire #0, Channel #6 */ + def_irq_handler cpuss_interrupts_dw0_7_IRQHandler /* CPUSS DataWire #0, Channel #7 */ + def_irq_handler cpuss_interrupts_dw0_8_IRQHandler /* CPUSS DataWire #0, Channel #8 */ + def_irq_handler cpuss_interrupts_dw0_9_IRQHandler /* CPUSS DataWire #0, Channel #9 */ + def_irq_handler cpuss_interrupts_dw0_10_IRQHandler /* CPUSS DataWire #0, Channel #10 */ + def_irq_handler cpuss_interrupts_dw0_11_IRQHandler /* CPUSS DataWire #0, Channel #11 */ + def_irq_handler cpuss_interrupts_dw0_12_IRQHandler /* CPUSS DataWire #0, Channel #12 */ + def_irq_handler cpuss_interrupts_dw0_13_IRQHandler /* CPUSS DataWire #0, Channel #13 */ + def_irq_handler cpuss_interrupts_dw0_14_IRQHandler /* CPUSS DataWire #0, Channel #14 */ + def_irq_handler cpuss_interrupts_dw0_15_IRQHandler /* CPUSS DataWire #0, Channel #15 */ + def_irq_handler cpuss_interrupts_dw0_16_IRQHandler /* CPUSS DataWire #0, Channel #16 */ + def_irq_handler cpuss_interrupts_dw0_17_IRQHandler /* CPUSS DataWire #0, Channel #17 */ + def_irq_handler cpuss_interrupts_dw0_18_IRQHandler /* CPUSS DataWire #0, Channel #18 */ + def_irq_handler cpuss_interrupts_dw0_19_IRQHandler /* CPUSS DataWire #0, Channel #19 */ + def_irq_handler cpuss_interrupts_dw0_20_IRQHandler /* CPUSS DataWire #0, Channel #20 */ + def_irq_handler cpuss_interrupts_dw0_21_IRQHandler /* CPUSS DataWire #0, Channel #21 */ + def_irq_handler cpuss_interrupts_dw0_22_IRQHandler /* CPUSS DataWire #0, Channel #22 */ + def_irq_handler cpuss_interrupts_dw0_23_IRQHandler /* CPUSS DataWire #0, Channel #23 */ + def_irq_handler cpuss_interrupts_dw0_24_IRQHandler /* CPUSS DataWire #0, Channel #24 */ + def_irq_handler cpuss_interrupts_dw0_25_IRQHandler /* CPUSS DataWire #0, Channel #25 */ + def_irq_handler cpuss_interrupts_dw0_26_IRQHandler /* CPUSS DataWire #0, Channel #26 */ + def_irq_handler cpuss_interrupts_dw0_27_IRQHandler /* CPUSS DataWire #0, Channel #27 */ + def_irq_handler cpuss_interrupts_dw0_28_IRQHandler /* CPUSS DataWire #0, Channel #28 */ + def_irq_handler cpuss_interrupts_dw1_0_IRQHandler /* CPUSS DataWire #1, Channel #0 */ + def_irq_handler cpuss_interrupts_dw1_1_IRQHandler /* CPUSS DataWire #1, Channel #1 */ + def_irq_handler cpuss_interrupts_dw1_2_IRQHandler /* CPUSS DataWire #1, Channel #2 */ + def_irq_handler cpuss_interrupts_dw1_3_IRQHandler /* CPUSS DataWire #1, Channel #3 */ + def_irq_handler cpuss_interrupts_dw1_4_IRQHandler /* CPUSS DataWire #1, Channel #4 */ + def_irq_handler cpuss_interrupts_dw1_5_IRQHandler /* CPUSS DataWire #1, Channel #5 */ + def_irq_handler cpuss_interrupts_dw1_6_IRQHandler /* CPUSS DataWire #1, Channel #6 */ + def_irq_handler cpuss_interrupts_dw1_7_IRQHandler /* CPUSS DataWire #1, Channel #7 */ + def_irq_handler cpuss_interrupts_dw1_8_IRQHandler /* CPUSS DataWire #1, Channel #8 */ + def_irq_handler cpuss_interrupts_dw1_9_IRQHandler /* CPUSS DataWire #1, Channel #9 */ + def_irq_handler cpuss_interrupts_dw1_10_IRQHandler /* CPUSS DataWire #1, Channel #10 */ + def_irq_handler cpuss_interrupts_dw1_11_IRQHandler /* CPUSS DataWire #1, Channel #11 */ + def_irq_handler cpuss_interrupts_dw1_12_IRQHandler /* CPUSS DataWire #1, Channel #12 */ + def_irq_handler cpuss_interrupts_dw1_13_IRQHandler /* CPUSS DataWire #1, Channel #13 */ + def_irq_handler cpuss_interrupts_dw1_14_IRQHandler /* CPUSS DataWire #1, Channel #14 */ + def_irq_handler cpuss_interrupts_dw1_15_IRQHandler /* CPUSS DataWire #1, Channel #15 */ + def_irq_handler cpuss_interrupts_dw1_16_IRQHandler /* CPUSS DataWire #1, Channel #16 */ + def_irq_handler cpuss_interrupts_dw1_17_IRQHandler /* CPUSS DataWire #1, Channel #17 */ + def_irq_handler cpuss_interrupts_dw1_18_IRQHandler /* CPUSS DataWire #1, Channel #18 */ + def_irq_handler cpuss_interrupts_dw1_19_IRQHandler /* CPUSS DataWire #1, Channel #19 */ + def_irq_handler cpuss_interrupts_dw1_20_IRQHandler /* CPUSS DataWire #1, Channel #20 */ + def_irq_handler cpuss_interrupts_dw1_21_IRQHandler /* CPUSS DataWire #1, Channel #21 */ + def_irq_handler cpuss_interrupts_dw1_22_IRQHandler /* CPUSS DataWire #1, Channel #22 */ + def_irq_handler cpuss_interrupts_dw1_23_IRQHandler /* CPUSS DataWire #1, Channel #23 */ + def_irq_handler cpuss_interrupts_dw1_24_IRQHandler /* CPUSS DataWire #1, Channel #24 */ + def_irq_handler cpuss_interrupts_dw1_25_IRQHandler /* CPUSS DataWire #1, Channel #25 */ + def_irq_handler cpuss_interrupts_dw1_26_IRQHandler /* CPUSS DataWire #1, Channel #26 */ + def_irq_handler cpuss_interrupts_dw1_27_IRQHandler /* CPUSS DataWire #1, Channel #27 */ + def_irq_handler cpuss_interrupts_dw1_28_IRQHandler /* CPUSS DataWire #1, Channel #28 */ + def_irq_handler cpuss_interrupts_fault_0_IRQHandler /* CPUSS Fault Structure Interrupt #0 */ + def_irq_handler cpuss_interrupts_fault_1_IRQHandler /* CPUSS Fault Structure Interrupt #1 */ + def_irq_handler cpuss_interrupt_crypto_IRQHandler /* CRYPTO Accelerator Interrupt */ + def_irq_handler cpuss_interrupt_fm_IRQHandler /* FLASH Macro Interrupt */ + def_irq_handler cpuss_interrupts_cm4_fp_IRQHandler /* Floating Point operation fault */ + def_irq_handler cpuss_interrupts_cm0_cti_0_IRQHandler /* CM0+ CTI #0 */ + def_irq_handler cpuss_interrupts_cm0_cti_1_IRQHandler /* CM0+ CTI #1 */ + def_irq_handler cpuss_interrupts_cm4_cti_0_IRQHandler /* CM4 CTI #0 */ + def_irq_handler cpuss_interrupts_cm4_cti_1_IRQHandler /* CM4 CTI #1 */ + def_irq_handler tcpwm_0_interrupts_0_IRQHandler /* TCPWM #0, Counter #0 */ + def_irq_handler tcpwm_0_interrupts_1_IRQHandler /* TCPWM #0, Counter #1 */ + def_irq_handler tcpwm_0_interrupts_2_IRQHandler /* TCPWM #0, Counter #2 */ + def_irq_handler tcpwm_0_interrupts_3_IRQHandler /* TCPWM #0, Counter #3 */ + def_irq_handler tcpwm_0_interrupts_4_IRQHandler /* TCPWM #0, Counter #4 */ + def_irq_handler tcpwm_0_interrupts_5_IRQHandler /* TCPWM #0, Counter #5 */ + def_irq_handler tcpwm_0_interrupts_6_IRQHandler /* TCPWM #0, Counter #6 */ + def_irq_handler tcpwm_0_interrupts_7_IRQHandler /* TCPWM #0, Counter #7 */ + def_irq_handler tcpwm_1_interrupts_0_IRQHandler /* TCPWM #1, Counter #0 */ + def_irq_handler tcpwm_1_interrupts_1_IRQHandler /* TCPWM #1, Counter #1 */ + def_irq_handler tcpwm_1_interrupts_2_IRQHandler /* TCPWM #1, Counter #2 */ + def_irq_handler tcpwm_1_interrupts_3_IRQHandler /* TCPWM #1, Counter #3 */ + def_irq_handler tcpwm_1_interrupts_4_IRQHandler /* TCPWM #1, Counter #4 */ + def_irq_handler tcpwm_1_interrupts_5_IRQHandler /* TCPWM #1, Counter #5 */ + def_irq_handler tcpwm_1_interrupts_6_IRQHandler /* TCPWM #1, Counter #6 */ + def_irq_handler tcpwm_1_interrupts_7_IRQHandler /* TCPWM #1, Counter #7 */ + def_irq_handler tcpwm_1_interrupts_8_IRQHandler /* TCPWM #1, Counter #8 */ + def_irq_handler tcpwm_1_interrupts_9_IRQHandler /* TCPWM #1, Counter #9 */ + def_irq_handler tcpwm_1_interrupts_10_IRQHandler /* TCPWM #1, Counter #10 */ + def_irq_handler tcpwm_1_interrupts_11_IRQHandler /* TCPWM #1, Counter #11 */ + def_irq_handler tcpwm_1_interrupts_12_IRQHandler /* TCPWM #1, Counter #12 */ + def_irq_handler tcpwm_1_interrupts_13_IRQHandler /* TCPWM #1, Counter #13 */ + def_irq_handler tcpwm_1_interrupts_14_IRQHandler /* TCPWM #1, Counter #14 */ + def_irq_handler tcpwm_1_interrupts_15_IRQHandler /* TCPWM #1, Counter #15 */ + def_irq_handler tcpwm_1_interrupts_16_IRQHandler /* TCPWM #1, Counter #16 */ + def_irq_handler tcpwm_1_interrupts_17_IRQHandler /* TCPWM #1, Counter #17 */ + def_irq_handler tcpwm_1_interrupts_18_IRQHandler /* TCPWM #1, Counter #18 */ + def_irq_handler tcpwm_1_interrupts_19_IRQHandler /* TCPWM #1, Counter #19 */ + def_irq_handler tcpwm_1_interrupts_20_IRQHandler /* TCPWM #1, Counter #20 */ + def_irq_handler tcpwm_1_interrupts_21_IRQHandler /* TCPWM #1, Counter #21 */ + def_irq_handler tcpwm_1_interrupts_22_IRQHandler /* TCPWM #1, Counter #22 */ + def_irq_handler tcpwm_1_interrupts_23_IRQHandler /* TCPWM #1, Counter #23 */ + def_irq_handler pass_interrupt_sar_IRQHandler /* SAR ADC interrupt */ + def_irq_handler audioss_0_interrupt_i2s_IRQHandler /* I2S0 Audio interrupt */ + def_irq_handler audioss_0_interrupt_pdm_IRQHandler /* PDM0/PCM0 Audio interrupt */ + def_irq_handler audioss_1_interrupt_i2s_IRQHandler /* I2S1 Audio interrupt */ + def_irq_handler profile_interrupt_IRQHandler /* Energy Profiler interrupt */ + def_irq_handler smif_interrupt_IRQHandler /* Serial Memory Interface interrupt */ + def_irq_handler usb_interrupt_hi_IRQHandler /* USB Interrupt */ + def_irq_handler usb_interrupt_med_IRQHandler /* USB Interrupt */ + def_irq_handler usb_interrupt_lo_IRQHandler /* USB Interrupt */ + def_irq_handler sdhc_0_interrupt_wakeup_IRQHandler /* SDIO wakeup interrupt for mxsdhc */ + def_irq_handler sdhc_0_interrupt_general_IRQHandler /* Consolidated interrupt for mxsdhc for everything else */ + def_irq_handler sdhc_1_interrupt_wakeup_IRQHandler /* EEMC wakeup interrupt for mxsdhc, not used */ + def_irq_handler sdhc_1_interrupt_general_IRQHandler /* Consolidated interrupt for mxsdhc for everything else */ + + .end + + +/* [] END OF FILE */ diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg.c b/bootloader/mcuboot/boot/cypress/platforms/cycfg.c new file mode 100644 index 0000000..ede3da0 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg.c @@ -0,0 +1,33 @@ +/******************************************************************************* +* File Name: cycfg.c +* +* Description: +* Wrapper function to initialize all generated code. +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../../output/libs/COMPONENT_PSOC6/psoc6pdl): 1.5.0.1837 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#include "cycfg.h" + +void init_cycfg_all(void) +{ + init_cycfg_system(); + init_cycfg_clocks(); +} diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg.h b/bootloader/mcuboot/boot/cypress/platforms/cycfg.h new file mode 100644 index 0000000..9b74187 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg.h @@ -0,0 +1,45 @@ +/******************************************************************************* +* File Name: cycfg.h +* +* Description: +* Simple wrapper header containing all generated files. +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../../output/libs/COMPONENT_PSOC6/psoc6pdl): 1.5.0.1837 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#if !defined(CYCFG_H) +#define CYCFG_H + +#if defined(__cplusplus) +extern "C" { +#endif + +#include "cycfg_system.h" +#include "cycfg_clocks.h" + +void init_cycfg_all(void); + + +#if defined(__cplusplus) +} +#endif + + +#endif /* CYCFG_H */ diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg_clocks.c b/bootloader/mcuboot/boot/cypress/platforms/cycfg_clocks.c new file mode 100644 index 0000000..7f720f7 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg_clocks.c @@ -0,0 +1,47 @@ +/******************************************************************************* +* File Name: cycfg_clocks.c +* +* Description: +* Clock configuration +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../../output/libs/COMPONENT_PSOC6/psoc6pdl): 1.5.0.1837 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#include "cycfg_clocks.h" + +#if defined (CY_USING_HAL) + const cyhal_resource_inst_t CYBSP_CSD_CLK_DIV_obj = + { + .type = CYHAL_RSC_CLOCK, + .block_num = CYBSP_CSD_CLK_DIV_HW, + .channel_num = CYBSP_CSD_CLK_DIV_NUM, + }; +#endif //defined (CY_USING_HAL) + + +void init_cycfg_clocks(void) +{ + Cy_SysClk_PeriphDisableDivider(CY_SYSCLK_DIV_8_BIT, 0U); + Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_8_BIT, 0U, 0U); + Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_8_BIT, 0U); +#if defined (CY_USING_HAL) + cyhal_hwmgr_reserve(&CYBSP_CSD_CLK_DIV_obj); +#endif //defined (CY_USING_HAL) +} diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg_clocks.h b/bootloader/mcuboot/boot/cypress/platforms/cycfg_clocks.h new file mode 100644 index 0000000..5766ab5 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg_clocks.h @@ -0,0 +1,54 @@ +/******************************************************************************* +* File Name: cycfg_clocks.h +* +* Description: +* Clock configuration +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../../output/libs/COMPONENT_PSOC6/psoc6pdl): 1.5.0.1837 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#if !defined(CYCFG_CLOCKS_H) +#define CYCFG_CLOCKS_H + +#include "cy_sysclk.h" +#if defined (CY_USING_HAL) + #include "cyhal_hwmgr.h" +#endif //defined (CY_USING_HAL) + +#if defined(__cplusplus) +extern "C" { +#endif + +#define CYBSP_CSD_CLK_DIV_ENABLED 1U +#define CYBSP_CSD_CLK_DIV_HW CY_SYSCLK_DIV_8_BIT +#define CYBSP_CSD_CLK_DIV_NUM 0U + +#if defined (CY_USING_HAL) + extern const cyhal_resource_inst_t CYBSP_CSD_CLK_DIV_obj; +#endif //defined (CY_USING_HAL) + +void init_cycfg_clocks(void); + +#if defined(__cplusplus) +} +#endif + + +#endif /* CYCFG_CLOCKS_H */ diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg_peripherals.c b/bootloader/mcuboot/boot/cypress/platforms/cycfg_peripherals.c new file mode 100644 index 0000000..1c55938 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg_peripherals.c @@ -0,0 +1,73 @@ +/******************************************************************************* +* File Name: cycfg_peripherals.c +* +* Description: +* Peripheral Hardware Block configuration +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../psoc6pdl): 1.3.1.1499 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#include "cycfg_peripherals.h" + +const cy_stc_scb_uart_config_t CYBSP_UART_config = +{ + .uartMode = CY_SCB_UART_STANDARD, + .enableMutliProcessorMode = false, + .smartCardRetryOnNack = false, + .irdaInvertRx = false, + .irdaEnableLowPowerReceiver = false, + .oversample = 8, + .enableMsbFirst = false, + .dataWidth = 8UL, + .parity = CY_SCB_UART_PARITY_NONE, + .stopBits = CY_SCB_UART_STOP_BITS_1, + .enableInputFilter = false, + .breakWidth = 11UL, + .dropOnFrameError = false, + .dropOnParityError = false, + .receiverAddress = 0x0UL, + .receiverAddressMask = 0x0UL, + .acceptAddrInFifo = false, + .enableCts = false, + .ctsPolarity = CY_SCB_UART_ACTIVE_LOW, + .rtsRxFifoLevel = 0UL, + .rtsPolarity = CY_SCB_UART_ACTIVE_LOW, + .rxFifoTriggerLevel = 0UL, + .rxFifoIntEnableMask = 0UL, + .txFifoTriggerLevel = 63UL, + .txFifoIntEnableMask = 0UL, +}; +#if defined (CY_USING_HAL) + const cyhal_resource_inst_t CYBSP_UART_obj = + { + .type = CYHAL_RSC_SCB, + .block_num = 5U, + .channel_num = 0U, + }; +#endif //defined (CY_USING_HAL) + + +void init_cycfg_peripherals(void) +{ + Cy_SysClk_PeriphAssignDivider(PCLK_SCB5_CLOCK, CY_SYSCLK_DIV_16_BIT, 0U); +#if defined (CY_USING_HAL) + cyhal_hwmgr_reserve(&CYBSP_UART_obj); +#endif //defined (CY_USING_HAL) +} diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg_peripherals.h b/bootloader/mcuboot/boot/cypress/platforms/cycfg_peripherals.h new file mode 100644 index 0000000..41a0383 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg_peripherals.h @@ -0,0 +1,57 @@ +/******************************************************************************* +* File Name: cycfg_peripherals.h +* +* Description: +* Peripheral Hardware Block configuration +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../psoc6pdl): 1.3.1.1499 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#if !defined(CYCFG_PERIPHERALS_H) +#define CYCFG_PERIPHERALS_H + +// #include "cycfg_notices.h" +#include "cy_scb_uart.h" +#include "cy_sysclk.h" +#if defined (CY_USING_HAL) + #include "cyhal_hwmgr.h" +#endif //defined (CY_USING_HAL) + +#if defined(__cplusplus) +extern "C" { +#endif + +#define CYBSP_UART_ENABLED 1U +#define CYBSP_UART_HW SCB5 +#define CYBSP_UART_IRQ scb_5_interrupt_IRQn + +extern const cy_stc_scb_uart_config_t CYBSP_UART_config; +#if defined (CY_USING_HAL) + extern const cyhal_resource_inst_t CYBSP_UART_obj; +#endif //defined (CY_USING_HAL) + +void init_cycfg_peripherals(void); + +#if defined(__cplusplus) +} +#endif + + +#endif /* CYCFG_PERIPHERALS_H */ diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg_pins.c b/bootloader/mcuboot/boot/cypress/platforms/cycfg_pins.c new file mode 100644 index 0000000..771d772 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg_pins.c @@ -0,0 +1,89 @@ +/******************************************************************************* +* File Name: cycfg_pins.c +* +* Description: +* Pin configuration +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../psoc6pdl): 1.3.1.1499 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#include "cycfg_pins.h" + +const cy_stc_gpio_pin_config_t CYBSP_UART_RX_config = +{ + .outVal = 1, + .driveMode = CY_GPIO_DM_HIGHZ, + .hsiom = CYBSP_UART_RX_HSIOM, + .intEdge = CY_GPIO_INTR_DISABLE, + .intMask = 0UL, + .vtrip = CY_GPIO_VTRIP_CMOS, + .slewRate = CY_GPIO_SLEW_FAST, + .driveSel = CY_GPIO_DRIVE_1_2, + .vregEn = 0UL, + .ibufMode = 0UL, + .vtripSel = 0UL, + .vrefSel = 0UL, + .vohSel = 0UL, +}; +#if defined (CY_USING_HAL) + const cyhal_resource_inst_t CYBSP_UART_RX_obj = + { + .type = CYHAL_RSC_GPIO, + .block_num = CYBSP_UART_RX_PORT_NUM, + .channel_num = CYBSP_UART_RX_PIN, + }; +#endif //defined (CY_USING_HAL) +const cy_stc_gpio_pin_config_t CYBSP_UART_TX_config = +{ + .outVal = 1, + .driveMode = CY_GPIO_DM_STRONG_IN_OFF, + .hsiom = CYBSP_UART_TX_HSIOM, + .intEdge = CY_GPIO_INTR_DISABLE, + .intMask = 0UL, + .vtrip = CY_GPIO_VTRIP_CMOS, + .slewRate = CY_GPIO_SLEW_FAST, + .driveSel = CY_GPIO_DRIVE_1_2, + .vregEn = 0UL, + .ibufMode = 0UL, + .vtripSel = 0UL, + .vrefSel = 0UL, + .vohSel = 0UL, +}; +#if defined (CY_USING_HAL) + const cyhal_resource_inst_t CYBSP_UART_TX_obj = + { + .type = CYHAL_RSC_GPIO, + .block_num = CYBSP_UART_TX_PORT_NUM, + .channel_num = CYBSP_UART_TX_PIN, + }; +#endif //defined (CY_USING_HAL) + +void init_cycfg_pins(void) +{ + Cy_GPIO_Pin_Init(CYBSP_UART_RX_PORT, CYBSP_UART_RX_PIN, &CYBSP_UART_RX_config); +#if defined (CY_USING_HAL) + cyhal_hwmgr_reserve(&CYBSP_UART_RX_obj); +#endif //defined (CY_USING_HAL) + + Cy_GPIO_Pin_Init(CYBSP_UART_TX_PORT, CYBSP_UART_TX_PIN, &CYBSP_UART_TX_config); +#if defined (CY_USING_HAL) + cyhal_hwmgr_reserve(&CYBSP_UART_TX_obj); +#endif //defined (CY_USING_HAL) +} diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg_pins.h b/bootloader/mcuboot/boot/cypress/platforms/cycfg_pins.h new file mode 100644 index 0000000..c214826 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg_pins.h @@ -0,0 +1,113 @@ +/******************************************************************************* +* File Name: cycfg_pins.h +* +* Description: +* Pin configuration +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../psoc6pdl): 1.3.1.1499 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#if !defined(CYCFG_PINS_H) +#define CYCFG_PINS_H + +#include "cy_gpio.h" +#if defined (CY_USING_HAL) + #include "cyhal_hwmgr.h" +#endif //defined (CY_USING_HAL) +#include "cycfg_routing.h" + +#if defined(__cplusplus) +extern "C" { +#endif + +#define CYBSP_UART_RX_ENABLED 1U +#define CYBSP_UART_RX_PORT GPIO_PRT5 +#define CYBSP_UART_RX_PORT_NUM 5U +#define CYBSP_UART_RX_PIN 0U +#define CYBSP_UART_RX_NUM 0U +#define CYBSP_UART_RX_DRIVEMODE CY_GPIO_DM_HIGHZ +#define CYBSP_UART_RX_INIT_DRIVESTATE 1 +#ifndef ioss_0_port_5_pin_0_HSIOM + #define ioss_0_port_5_pin_0_HSIOM HSIOM_SEL_GPIO +#endif +#define CYBSP_UART_RX_HSIOM ioss_0_port_5_pin_0_HSIOM +#define CYBSP_UART_RX_IRQ ioss_interrupts_gpio_5_IRQn +#if defined (CY_USING_HAL) + #define CYBSP_UART_RX_HAL_PORT_PIN P5_0 +#endif //defined (CY_USING_HAL) +#if defined (CY_USING_HAL) + #define CYBSP_UART_RX_HAL_IRQ CYHAL_GPIO_IRQ_NONE +#endif //defined (CY_USING_HAL) +#if defined (CY_USING_HAL) + #define CYBSP_UART_RX_HAL_DIR CYHAL_GPIO_DIR_INPUT +#endif //defined (CY_USING_HAL) +#if defined (CY_USING_HAL) + #define CYBSP_UART_RX_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_NONE +#endif //defined (CY_USING_HAL) +#define CYBSP_UART_TX_ENABLED 1U +#define CYBSP_UART_TX_PORT GPIO_PRT5 +#define CYBSP_UART_TX_PORT_NUM 5U +#define CYBSP_UART_TX_PIN 1U +#define CYBSP_UART_TX_NUM 1U +#define CYBSP_UART_TX_DRIVEMODE CY_GPIO_DM_STRONG_IN_OFF +#define CYBSP_UART_TX_INIT_DRIVESTATE 1 +#ifndef ioss_0_port_5_pin_1_HSIOM + #define ioss_0_port_5_pin_1_HSIOM HSIOM_SEL_GPIO +#endif +#define CYBSP_UART_TX_HSIOM ioss_0_port_5_pin_1_HSIOM +#define CYBSP_UART_TX_IRQ ioss_interrupts_gpio_5_IRQn +#if defined (CY_USING_HAL) + #define CYBSP_UART_TX_HAL_PORT_PIN P5_1 +#endif //defined (CY_USING_HAL) +#if defined (CY_USING_HAL) + #define CYBSP_UART_TX_HAL_IRQ CYHAL_GPIO_IRQ_NONE +#endif //defined (CY_USING_HAL) +#if defined (CY_USING_HAL) + #define CYBSP_UART_TX_HAL_DIR CYHAL_GPIO_DIR_OUTPUT +#endif //defined (CY_USING_HAL) +#if defined (CY_USING_HAL) + #define CYBSP_UART_TX_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_STRONG +#endif //defined (CY_USING_HAL) + +extern const cy_stc_gpio_pin_config_t CYBSP_WCO_IN_config; +#if defined (CY_USING_HAL) + extern const cyhal_resource_inst_t CYBSP_WCO_IN_obj; +#endif //defined (CY_USING_HAL) +extern const cy_stc_gpio_pin_config_t CYBSP_WCO_OUT_config; +#if defined (CY_USING_HAL) + extern const cyhal_resource_inst_t CYBSP_WCO_OUT_obj; +#endif //defined (CY_USING_HAL) +extern const cy_stc_gpio_pin_config_t CYBSP_UART_RX_config; +#if defined (CY_USING_HAL) + extern const cyhal_resource_inst_t CYBSP_UART_RX_obj; +#endif //defined (CY_USING_HAL) +extern const cy_stc_gpio_pin_config_t CYBSP_UART_TX_config; +#if defined (CY_USING_HAL) + extern const cyhal_resource_inst_t CYBSP_UART_TX_obj; +#endif //defined (CY_USING_HAL) + +void init_cycfg_pins(void); + +#if defined(__cplusplus) +} +#endif + + +#endif /* CYCFG_PINS_H */ diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg_routing.c b/bootloader/mcuboot/boot/cypress/platforms/cycfg_routing.c new file mode 100644 index 0000000..063e736 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg_routing.c @@ -0,0 +1,31 @@ +/******************************************************************************* +* File Name: cycfg_routing.c +* +* Description: +* Establishes all necessary connections between hardware elements. +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../psoc6pdl): 1.4.0.1889 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#include "cycfg_routing.h" + +void init_cycfg_routing(void) +{ +} diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg_routing.h b/bootloader/mcuboot/boot/cypress/platforms/cycfg_routing.h new file mode 100644 index 0000000..bfb2998 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg_routing.h @@ -0,0 +1,46 @@ +/******************************************************************************* +* File Name: cycfg_routing.h +* +* Description: +* Establishes all necessary connections between hardware elements. +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../psoc6pdl): 1.4.0.1889 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#if !defined(CYCFG_ROUTING_H) +#define CYCFG_ROUTING_H + +#if defined(__cplusplus) +extern "C" { +#endif + +void init_cycfg_routing(void); + +#define init_cycfg_connectivity() init_cycfg_routing() + +#define ioss_0_port_5_pin_0_HSIOM P5_0_SCB5_UART_RX +#define ioss_0_port_5_pin_1_HSIOM P5_1_SCB5_UART_TX + +#if defined(__cplusplus) +} +#endif + + +#endif /* CYCFG_ROUTING_H */ diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg_system.c b/bootloader/mcuboot/boot/cypress/platforms/cycfg_system.c new file mode 100644 index 0000000..57ab013 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg_system.c @@ -0,0 +1,537 @@ +/******************************************************************************* +* File Name: cycfg_system.c +* +* Description: +* System configuration +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../../output/libs/COMPONENT_PSOC6/psoc6pdl): 1.5.0.1837 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#include "cycfg_system.h" + +#define CY_CFG_SYSCLK_ECO_ERROR 1 +#define CY_CFG_SYSCLK_ALTHF_ERROR 2 +#define CY_CFG_SYSCLK_PLL_ERROR 3 +#define CY_CFG_SYSCLK_FLL_ERROR 4 +#define CY_CFG_SYSCLK_WCO_ERROR 5 +#define CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED 1 +#define CY_CFG_SYSCLK_CLKBAK_ENABLED 1 +#define CY_CFG_SYSCLK_CLKFAST_ENABLED 1 +#define CY_CFG_SYSCLK_FLL_ENABLED 1 +#define CY_CFG_SYSCLK_CLKHF0_ENABLED 1 +#define CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ 100UL +#define CY_CFG_SYSCLK_CLKHF0_CLKPATH CY_SYSCLK_CLKHF_IN_CLKPATH0 +#define CY_CFG_SYSCLK_CLKHF2_ENABLED 1 +#define CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ 50UL +#define CY_CFG_SYSCLK_CLKHF2_CLKPATH CY_SYSCLK_CLKHF_IN_CLKPATH0 +#define CY_CFG_SYSCLK_CLKHF3_ENABLED 1 +#define CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ 100UL +#define CY_CFG_SYSCLK_CLKHF3_CLKPATH CY_SYSCLK_CLKHF_IN_CLKPATH0 +#define CY_CFG_SYSCLK_CLKHF4_ENABLED 1 +#define CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ 100UL +#define CY_CFG_SYSCLK_CLKHF4_CLKPATH CY_SYSCLK_CLKHF_IN_CLKPATH0 +#define CY_CFG_SYSCLK_ILO_ENABLED 1 +#define CY_CFG_SYSCLK_IMO_ENABLED 1 +#define CY_CFG_SYSCLK_CLKLF_ENABLED 1 +#define CY_CFG_SYSCLK_CLKPATH0_ENABLED 1 +#define CY_CFG_SYSCLK_CLKPATH0_SOURCE CY_SYSCLK_CLKPATH_IN_IMO +#define CY_CFG_SYSCLK_CLKPATH1_ENABLED 1 +#define CY_CFG_SYSCLK_CLKPATH1_SOURCE CY_SYSCLK_CLKPATH_IN_IMO +#define CY_CFG_SYSCLK_CLKPATH2_ENABLED 1 +#define CY_CFG_SYSCLK_CLKPATH2_SOURCE CY_SYSCLK_CLKPATH_IN_IMO +#define CY_CFG_SYSCLK_CLKPERI_ENABLED 1 +#define CY_CFG_SYSCLK_PLL0_ENABLED 1 +#define CY_CFG_SYSCLK_PLL1_ENABLED 1 +#define CY_CFG_SYSCLK_CLKSLOW_ENABLED 1 +#define CY_CFG_SYSCLK_CLKTIMER_ENABLED 1 +#define CY_CFG_SYSCLK_WCO_ENABLED 1 + +static const cy_stc_fll_manual_config_t srss_0_clock_0_fll_0_fllConfig = +{ + .fllMult = 500U, + .refDiv = 20U, + .ccoRange = CY_SYSCLK_FLL_CCO_RANGE4, + .enableOutputDiv = true, + .lockTolerance = 10U, + .igain = 9U, + .pgain = 5U, + .settlingCount = 8U, + .outputMode = CY_SYSCLK_FLLPLL_OUTPUT_OUTPUT, + .cco_Freq = 355U, +}; +#if defined (CY_USING_HAL) + const cyhal_resource_inst_t srss_0_clock_0_pathmux_0_obj = + { + .type = CYHAL_RSC_CLKPATH, + .block_num = 0U, + .channel_num = 0U, + }; +#endif //defined (CY_USING_HAL) +#if defined (CY_USING_HAL) + const cyhal_resource_inst_t srss_0_clock_0_pathmux_1_obj = + { + .type = CYHAL_RSC_CLKPATH, + .block_num = 1U, + .channel_num = 0U, + }; +#endif //defined (CY_USING_HAL) +#if defined (CY_USING_HAL) + const cyhal_resource_inst_t srss_0_clock_0_pathmux_2_obj = + { + .type = CYHAL_RSC_CLKPATH, + .block_num = 2U, + .channel_num = 0U, + }; +#endif //defined (CY_USING_HAL) +static const cy_stc_pll_manual_config_t srss_0_clock_0_pll_0_pllConfig = +{ + .feedbackDiv = 36, + .referenceDiv = 1, + .outputDiv = 2, + .lfMode = false, + .outputMode = CY_SYSCLK_FLLPLL_OUTPUT_AUTO, +}; +static const cy_stc_pll_manual_config_t srss_0_clock_0_pll_1_pllConfig = +{ + .feedbackDiv = 30, + .referenceDiv = 1, + .outputDiv = 5, + .lfMode = false, + .outputMode = CY_SYSCLK_FLLPLL_OUTPUT_AUTO, +}; + +__WEAK void cycfg_ClockStartupError(uint32_t error) +{ + (void)error; /* Suppress the compiler warning */ + while(1); +} +__STATIC_INLINE void Cy_SysClk_ClkAltSysTickInit() +{ + Cy_SysTick_SetClockSource(CY_SYSTICK_CLOCK_SOURCE_CLK_LF); +} +__STATIC_INLINE void Cy_SysClk_ClkBakInit() +{ + Cy_SysClk_ClkBakSetSource(CY_SYSCLK_BAK_IN_CLKLF); +} +__STATIC_INLINE void Cy_SysClk_ClkFastInit() +{ + Cy_SysClk_ClkFastSetDivider(0U); +} +__STATIC_INLINE void Cy_SysClk_FllInit() +{ + if (CY_SYSCLK_SUCCESS != Cy_SysClk_FllManualConfigure(&srss_0_clock_0_fll_0_fllConfig)) + { + cycfg_ClockStartupError(CY_CFG_SYSCLK_FLL_ERROR); + } + if (CY_SYSCLK_SUCCESS != Cy_SysClk_FllEnable(200000UL)) + { + cycfg_ClockStartupError(CY_CFG_SYSCLK_FLL_ERROR); + } +} +__STATIC_INLINE void Cy_SysClk_ClkHf0Init() +{ + Cy_SysClk_ClkHfSetSource(0U, CY_CFG_SYSCLK_CLKHF0_CLKPATH); + Cy_SysClk_ClkHfSetDivider(0U, CY_SYSCLK_CLKHF_NO_DIVIDE); +} +__STATIC_INLINE void Cy_SysClk_ClkHf2Init() +{ + Cy_SysClk_ClkHfSetSource(CY_CFG_SYSCLK_CLKHF2, CY_CFG_SYSCLK_CLKHF2_CLKPATH); + Cy_SysClk_ClkHfSetDivider(CY_CFG_SYSCLK_CLKHF2, CY_SYSCLK_CLKHF_DIVIDE_BY_2); + Cy_SysClk_ClkHfEnable(CY_CFG_SYSCLK_CLKHF2); +} +__STATIC_INLINE void Cy_SysClk_ClkHf3Init() +{ + Cy_SysClk_ClkHfSetSource(CY_CFG_SYSCLK_CLKHF3, CY_CFG_SYSCLK_CLKHF3_CLKPATH); + Cy_SysClk_ClkHfSetDivider(CY_CFG_SYSCLK_CLKHF3, CY_SYSCLK_CLKHF_NO_DIVIDE); + Cy_SysClk_ClkHfEnable(CY_CFG_SYSCLK_CLKHF3); +} +__STATIC_INLINE void Cy_SysClk_ClkHf4Init() +{ + Cy_SysClk_ClkHfSetSource(CY_CFG_SYSCLK_CLKHF4, CY_CFG_SYSCLK_CLKHF4_CLKPATH); + Cy_SysClk_ClkHfSetDivider(CY_CFG_SYSCLK_CLKHF4, CY_SYSCLK_CLKHF_NO_DIVIDE); + Cy_SysClk_ClkHfEnable(CY_CFG_SYSCLK_CLKHF4); +} +__STATIC_INLINE void Cy_SysClk_IloInit() +{ + /* The WDT is unlocked in the default startup code */ + Cy_SysClk_IloEnable(); + Cy_SysClk_IloHibernateOn(true); +} +__STATIC_INLINE void Cy_SysClk_ClkLfInit() +{ + /* The WDT is unlocked in the default startup code */ + Cy_SysClk_ClkLfSetSource(CY_SYSCLK_CLKLF_IN_WCO); +} +__STATIC_INLINE void Cy_SysClk_ClkPath0Init() +{ + Cy_SysClk_ClkPathSetSource(0U, CY_CFG_SYSCLK_CLKPATH0_SOURCE); +} +__STATIC_INLINE void Cy_SysClk_ClkPath1Init() +{ + Cy_SysClk_ClkPathSetSource(1U, CY_CFG_SYSCLK_CLKPATH1_SOURCE); +} +__STATIC_INLINE void Cy_SysClk_ClkPath2Init() +{ + Cy_SysClk_ClkPathSetSource(2U, CY_CFG_SYSCLK_CLKPATH2_SOURCE); +} +__STATIC_INLINE void Cy_SysClk_ClkPeriInit() +{ + Cy_SysClk_ClkPeriSetDivider(1U); +} +__STATIC_INLINE void Cy_SysClk_Pll0Init() +{ + if (CY_SYSCLK_SUCCESS != Cy_SysClk_PllManualConfigure(1U, &srss_0_clock_0_pll_0_pllConfig)) + { + cycfg_ClockStartupError(CY_CFG_SYSCLK_PLL_ERROR); + } + if (CY_SYSCLK_SUCCESS != Cy_SysClk_PllEnable(1U, 10000u)) + { + cycfg_ClockStartupError(CY_CFG_SYSCLK_PLL_ERROR); + } +} +__STATIC_INLINE void Cy_SysClk_Pll1Init() +{ + if (CY_SYSCLK_SUCCESS != Cy_SysClk_PllManualConfigure(2U, &srss_0_clock_0_pll_1_pllConfig)) + { + cycfg_ClockStartupError(CY_CFG_SYSCLK_PLL_ERROR); + } + if (CY_SYSCLK_SUCCESS != Cy_SysClk_PllEnable(2U, 10000u)) + { + cycfg_ClockStartupError(CY_CFG_SYSCLK_PLL_ERROR); + } +} +__STATIC_INLINE void Cy_SysClk_ClkSlowInit() +{ + Cy_SysClk_ClkSlowSetDivider(0U); +} +__STATIC_INLINE void Cy_SysClk_ClkTimerInit() +{ + Cy_SysClk_ClkTimerDisable(); + Cy_SysClk_ClkTimerSetSource(CY_SYSCLK_CLKTIMER_IN_IMO); + Cy_SysClk_ClkTimerSetDivider(0U); + Cy_SysClk_ClkTimerEnable(); +} +__STATIC_INLINE void Cy_SysClk_WcoInit() +{ + (void)Cy_GPIO_Pin_FastInit(GPIO_PRT0, 0U, 0x00U, 0x00U, HSIOM_SEL_GPIO); + (void)Cy_GPIO_Pin_FastInit(GPIO_PRT0, 1U, 0x00U, 0x00U, HSIOM_SEL_GPIO); + if (CY_SYSCLK_SUCCESS != Cy_SysClk_WcoEnable(1000000UL)) + { + cycfg_ClockStartupError(CY_CFG_SYSCLK_WCO_ERROR); + } +} + + +void init_cycfg_system(void) +{ + /* Set worst case memory wait states (! ultra low power, 150 MHz), will update at the end */ + Cy_SysLib_SetWaitStates(false, 150UL); + #ifdef CY_CFG_PWR_ENABLED + #ifdef CY_CFG_PWR_INIT + init_cycfg_power(); + #else + #warning Power system will not be configured. Update power personality to v1.20 or later. + #endif /* CY_CFG_PWR_INIT */ + #endif /* CY_CFG_PWR_ENABLED */ + + /* Reset the core clock path to default and disable all the FLLs/PLLs */ + Cy_SysClk_ClkHfSetDivider(0U, CY_SYSCLK_CLKHF_NO_DIVIDE); + Cy_SysClk_ClkFastSetDivider(0U); + Cy_SysClk_ClkPeriSetDivider(1U); + Cy_SysClk_ClkSlowSetDivider(0U); + for (uint32_t pll = CY_SRSS_NUM_PLL; pll > 0UL; --pll) /* PLL 1 is the first PLL. 0 is invalid. */ + { + (void)Cy_SysClk_PllDisable(pll); + } + Cy_SysClk_ClkPathSetSource(CY_SYSCLK_CLKHF_IN_CLKPATH1, CY_SYSCLK_CLKPATH_IN_IMO); + + if ((CY_SYSCLK_CLKHF_IN_CLKPATH0 == Cy_SysClk_ClkHfGetSource(0UL)) && + (CY_SYSCLK_CLKPATH_IN_WCO == Cy_SysClk_ClkPathGetSource(CY_SYSCLK_CLKHF_IN_CLKPATH0))) + { + Cy_SysClk_ClkHfSetSource(0U, CY_SYSCLK_CLKHF_IN_CLKPATH1); + } + + Cy_SysClk_FllDisable(); + Cy_SysClk_ClkPathSetSource(CY_SYSCLK_CLKHF_IN_CLKPATH0, CY_SYSCLK_CLKPATH_IN_IMO); + Cy_SysClk_ClkHfSetSource(0UL, CY_SYSCLK_CLKHF_IN_CLKPATH0); + #ifdef CY_IP_MXBLESS + (void)Cy_BLE_EcoReset(); + #endif + + + /* Enable all source clocks */ + #ifdef CY_CFG_SYSCLK_PILO_ENABLED + Cy_SysClk_PiloInit(); + #endif + + #ifdef CY_CFG_SYSCLK_WCO_ENABLED + Cy_SysClk_WcoInit(); + #endif + + #ifdef CY_CFG_SYSCLK_CLKLF_ENABLED + Cy_SysClk_ClkLfInit(); + #endif + + #ifdef CY_CFG_SYSCLK_ALTHF_ENABLED + Cy_SysClk_AltHfInit(); + #endif + + #ifdef CY_CFG_SYSCLK_ECO_ENABLED + Cy_SysClk_EcoInit(); + #endif + + #ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED + Cy_SysClk_ExtClkInit(); + #endif + + /* Configure CPU clock dividers */ + #ifdef CY_CFG_SYSCLK_CLKFAST_ENABLED + Cy_SysClk_ClkFastInit(); + #endif + + #ifdef CY_CFG_SYSCLK_CLKPERI_ENABLED + Cy_SysClk_ClkPeriInit(); + #endif + + #ifdef CY_CFG_SYSCLK_CLKSLOW_ENABLED + Cy_SysClk_ClkSlowInit(); + #endif + + #if ((CY_CFG_SYSCLK_CLKPATH0_SOURCE == CY_SYSCLK_CLKPATH_IN_WCO) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH == CY_SYSCLK_CLKHF_IN_CLKPATH0)) + /* Configure HFCLK0 to temporarily run from IMO to initialize other clocks */ + Cy_SysClk_ClkPathSetSource(1UL, CY_SYSCLK_CLKPATH_IN_IMO); + Cy_SysClk_ClkHfSetSource(0UL, CY_SYSCLK_CLKHF_IN_CLKPATH1); + #else + #ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED + Cy_SysClk_ClkPath1Init(); + #endif + #endif + + /* Configure Path Clocks */ + #ifdef CY_CFG_SYSCLK_CLKPATH0_ENABLED + Cy_SysClk_ClkPath0Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH2_ENABLED + Cy_SysClk_ClkPath2Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH3_ENABLED + Cy_SysClk_ClkPath3Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH4_ENABLED + Cy_SysClk_ClkPath4Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH5_ENABLED + Cy_SysClk_ClkPath5Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH6_ENABLED + Cy_SysClk_ClkPath6Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH7_ENABLED + Cy_SysClk_ClkPath7Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH8_ENABLED + Cy_SysClk_ClkPath8Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH9_ENABLED + Cy_SysClk_ClkPath9Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH10_ENABLED + Cy_SysClk_ClkPath10Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH11_ENABLED + Cy_SysClk_ClkPath11Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH12_ENABLED + Cy_SysClk_ClkPath12Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH13_ENABLED + Cy_SysClk_ClkPath13Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH14_ENABLED + Cy_SysClk_ClkPath14Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKPATH15_ENABLED + Cy_SysClk_ClkPath15Init(); + #endif + + /* Configure and enable FLL */ + #ifdef CY_CFG_SYSCLK_FLL_ENABLED + Cy_SysClk_FllInit(); + #endif + + Cy_SysClk_ClkHf0Init(); + + #if ((CY_CFG_SYSCLK_CLKPATH0_SOURCE == CY_SYSCLK_CLKPATH_IN_WCO) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH == CY_SYSCLK_CLKHF_IN_CLKPATH0)) + #ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED + /* Apply the ClkPath1 user setting */ + Cy_SysClk_ClkPath1Init(); + #endif + #endif + + /* Configure and enable PLLs */ + #ifdef CY_CFG_SYSCLK_PLL0_ENABLED + Cy_SysClk_Pll0Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL1_ENABLED + Cy_SysClk_Pll1Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL2_ENABLED + Cy_SysClk_Pll2Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL3_ENABLED + Cy_SysClk_Pll3Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL4_ENABLED + Cy_SysClk_Pll4Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL5_ENABLED + Cy_SysClk_Pll5Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL6_ENABLED + Cy_SysClk_Pll6Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL7_ENABLED + Cy_SysClk_Pll7Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL8_ENABLED + Cy_SysClk_Pll8Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL9_ENABLED + Cy_SysClk_Pll9Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL10_ENABLED + Cy_SysClk_Pll10Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL11_ENABLED + Cy_SysClk_Pll11Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL12_ENABLED + Cy_SysClk_Pll12Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL13_ENABLED + Cy_SysClk_Pll13Init(); + #endif + #ifdef CY_CFG_SYSCLK_PLL14_ENABLED + Cy_SysClk_Pll14Init(); + #endif + + /* Configure HF clocks */ + #ifdef CY_CFG_SYSCLK_CLKHF1_ENABLED + Cy_SysClk_ClkHf1Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF2_ENABLED + Cy_SysClk_ClkHf2Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF3_ENABLED + Cy_SysClk_ClkHf3Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF4_ENABLED + Cy_SysClk_ClkHf4Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF5_ENABLED + Cy_SysClk_ClkHf5Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF6_ENABLED + Cy_SysClk_ClkHf6Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF7_ENABLED + Cy_SysClk_ClkHf7Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF8_ENABLED + Cy_SysClk_ClkHf8Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF9_ENABLED + Cy_SysClk_ClkHf9Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF10_ENABLED + Cy_SysClk_ClkHf10Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF11_ENABLED + Cy_SysClk_ClkHf11Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF12_ENABLED + Cy_SysClk_ClkHf12Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF13_ENABLED + Cy_SysClk_ClkHf13Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF14_ENABLED + Cy_SysClk_ClkHf14Init(); + #endif + #ifdef CY_CFG_SYSCLK_CLKHF15_ENABLED + Cy_SysClk_ClkHf15Init(); + #endif + + /* Configure miscellaneous clocks */ + #ifdef CY_CFG_SYSCLK_CLKTIMER_ENABLED + Cy_SysClk_ClkTimerInit(); + #endif + + #ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED + Cy_SysClk_ClkAltSysTickInit(); + #endif + + #ifdef CY_CFG_SYSCLK_CLKPUMP_ENABLED + Cy_SysClk_ClkPumpInit(); + #endif + + #ifdef CY_CFG_SYSCLK_CLKBAK_ENABLED + Cy_SysClk_ClkBakInit(); + #endif + + /* Configure default enabled clocks */ + #ifdef CY_CFG_SYSCLK_ILO_ENABLED + Cy_SysClk_IloInit(); + #else + Cy_SysClk_IloDisable(); + #endif + + #ifndef CY_CFG_SYSCLK_IMO_ENABLED + #error the IMO must be enabled for proper chip operation + #endif + + #ifdef CY_CFG_SYSCLK_MFO_ENABLED + Cy_SysClk_MfoInit(); + #endif + + #ifdef CY_CFG_SYSCLK_CLKMF_ENABLED + Cy_SysClk_ClkMfInit(); + #endif + + /* Set accurate flash wait states */ + #if (defined (CY_CFG_PWR_ENABLED) && defined (CY_CFG_SYSCLK_CLKHF0_ENABLED)) + Cy_SysLib_SetWaitStates(CY_CFG_PWR_USING_ULP != 0, CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ); + #endif + + /* Update System Core Clock values for correct Cy_SysLib_Delay functioning */ + SystemCoreClockUpdate(); + +#if defined (CY_USING_HAL) + cyhal_hwmgr_reserve(&srss_0_clock_0_pathmux_0_obj); +#endif //defined (CY_USING_HAL) + +#if defined (CY_USING_HAL) + cyhal_hwmgr_reserve(&srss_0_clock_0_pathmux_1_obj); +#endif //defined (CY_USING_HAL) + +#if defined (CY_USING_HAL) + cyhal_hwmgr_reserve(&srss_0_clock_0_pathmux_2_obj); +#endif //defined (CY_USING_HAL) +} diff --git a/bootloader/mcuboot/boot/cypress/platforms/cycfg_system.h b/bootloader/mcuboot/boot/cypress/platforms/cycfg_system.h new file mode 100644 index 0000000..581aeda --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/cycfg_system.h @@ -0,0 +1,86 @@ +/******************************************************************************* +* File Name: cycfg_system.h +* +* Description: +* System configuration +* This file was automatically generated and should not be modified. +* Device Configurator: 2.0.0.1483 +* Device Support Library (../../../../output/libs/COMPONENT_PSOC6/psoc6pdl): 1.5.0.1837 +* +******************************************************************************** +* Copyright 2017-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +********************************************************************************/ + +#if !defined(CYCFG_SYSTEM_H) +#define CYCFG_SYSTEM_H + +#include "cy_sysclk.h" +#include "cy_systick.h" +#if defined (CY_USING_HAL) + #include "cyhal_hwmgr.h" +#endif //defined (CY_USING_HAL) +#include "cy_gpio.h" + +#if defined(__cplusplus) +extern "C" { +#endif + +#define cpuss_0_dap_0_ENABLED 1U +#define srss_0_clock_0_ENABLED 1U +#define srss_0_clock_0_altsystickclk_0_ENABLED 1U +#define srss_0_clock_0_bakclk_0_ENABLED 1U +#define srss_0_clock_0_fastclk_0_ENABLED 1U +#define srss_0_clock_0_fll_0_ENABLED 1U +#define srss_0_clock_0_hfclk_0_ENABLED 1U +#define CY_CFG_SYSCLK_CLKHF0 0UL +#define srss_0_clock_0_hfclk_2_ENABLED 1U +#define CY_CFG_SYSCLK_CLKHF2 2UL +#define srss_0_clock_0_hfclk_3_ENABLED 1U +#define CY_CFG_SYSCLK_CLKHF3 3UL +#define srss_0_clock_0_hfclk_4_ENABLED 1U +#define CY_CFG_SYSCLK_CLKHF4 4UL +#define srss_0_clock_0_ilo_0_ENABLED 1U +#define srss_0_clock_0_imo_0_ENABLED 1U +#define srss_0_clock_0_lfclk_0_ENABLED 1U +#define CY_CFG_SYSCLK_CLKLF_FREQ_HZ 32768 +#define srss_0_clock_0_pathmux_0_ENABLED 1U +#define srss_0_clock_0_pathmux_1_ENABLED 1U +#define srss_0_clock_0_pathmux_2_ENABLED 1U +#define srss_0_clock_0_periclk_0_ENABLED 1U +#define srss_0_clock_0_pll_0_ENABLED 1U +#define srss_0_clock_0_pll_1_ENABLED 1U +#define srss_0_clock_0_slowclk_0_ENABLED 1U +#define srss_0_clock_0_timerclk_0_ENABLED 1U +#define srss_0_clock_0_wco_0_ENABLED 1U + +#if defined (CY_USING_HAL) + extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_0_obj; +#endif //defined (CY_USING_HAL) +#if defined (CY_USING_HAL) + extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_1_obj; +#endif //defined (CY_USING_HAL) +#if defined (CY_USING_HAL) + extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_2_obj; +#endif //defined (CY_USING_HAL) + +void init_cycfg_system(void); + +#if defined(__cplusplus) +} +#endif + + +#endif /* CYCFG_SYSTEM_H */ diff --git a/bootloader/mcuboot/boot/cypress/platforms/retarget_io_pdl/cy_retarget_io_pdl.c b/bootloader/mcuboot/boot/cypress/platforms/retarget_io_pdl/cy_retarget_io_pdl.c new file mode 100644 index 0000000..0472f3e --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/retarget_io_pdl/cy_retarget_io_pdl.c @@ -0,0 +1,270 @@ +/***************************************************************************//** +* \file cy_retarget_io.c +* +* \brief +* Provides APIs for retargeting stdio to UART hardware contained on the Cypress +* kits. +* +******************************************************************************** +* \copyright +* Copyright 2018-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +#include "cy_retarget_io_pdl.h" + +#include "cycfg_peripherals.h" + +#include "cy_sysint.h" +#include "cy_scb_uart.h" + +#if defined(__cplusplus) +extern "C" { +#endif + +/* Tracks the previous character sent to output stream */ +#ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF +static char cy_retarget_io_stdout_prev_char = 0; +#endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */ + +cy_stc_scb_uart_context_t CYBSP_UART_context; + +static uint8_t cy_retarget_io_getchar(void); +static void cy_retarget_io_putchar(char c); + +#if defined(__ARMCC_VERSION) /* ARM-MDK */ + /*************************************************************************** + * Function Name: fputc + ***************************************************************************/ + __attribute__((weak)) int fputc(int ch, FILE *f) + { + (void)f; + #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF + if ((char)ch == '\n' && cy_retarget_io_stdout_prev_char != '\r') + { + cy_retarget_io_putchar('\r'); + } + + cy_retarget_io_stdout_prev_char = (char)ch; + #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */ + cy_retarget_io_putchar(ch); + return (ch); + } +#elif defined (__ICCARM__) /* IAR */ + #include + + /*************************************************************************** + * Function Name: __write + ***************************************************************************/ + __weak size_t __write(int handle, const unsigned char * buffer, size_t size) + { + size_t nChars = 0; + /* This template only writes to "standard out", for all other file + * handles it returns failure. */ + if (handle != _LLIO_STDOUT) + { + return (_LLIO_ERROR); + } + if (buffer != NULL) + { + for (/* Empty */; nChars < size; ++nChars) + { + #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF + if (*buffer == '\n' && cy_retarget_io_stdout_prev_char != '\r') + { + cy_retarget_io_putchar('\r'); + } + + cy_retarget_io_stdout_prev_char = *buffer; + #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */ + cy_retarget_io_putchar(*buffer); + ++buffer; + } + } + return (nChars); + } +#else /* (__GNUC__) GCC */ + /* Add an explicit reference to the floating point printf library to allow + the usage of floating point conversion specifier. */ + __asm (".global _printf_float"); + /*************************************************************************** + * Function Name: _write + ***************************************************************************/ + __attribute__((weak)) int _write (int fd, const char *ptr, int len) + { + int nChars = 0; + (void)fd; + if (ptr != NULL) + { + for (/* Empty */; nChars < len; ++nChars) + { + #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF + if (*ptr == '\n' && cy_retarget_io_stdout_prev_char != '\r') + { + cy_retarget_io_putchar('\r'); + } + + cy_retarget_io_stdout_prev_char = *ptr; + #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */ + cy_retarget_io_putchar((uint32_t)*ptr); + ++ptr; + } + } + return (nChars); + } +#endif + + +#if defined(__ARMCC_VERSION) /* ARM-MDK */ + /*************************************************************************** + * Function Name: fgetc + ***************************************************************************/ + __attribute__((weak)) int fgetc(FILE *f) + { + (void)f; + return (cy_retarget_io_getchar()); + } +#elif defined (__ICCARM__) /* IAR */ + __weak size_t __read(int handle, unsigned char * buffer, size_t size) + { + /* This template only reads from "standard in", for all other file + handles it returns failure. */ + if ((handle != _LLIO_STDIN) || (buffer == NULL)) + { + return (_LLIO_ERROR); + } + else + { + *buffer = cy_retarget_io_getchar(); + return (1); + } + } +#else /* (__GNUC__) GCC */ + /* Add an explicit reference to the floating point scanf library to allow + the usage of floating point conversion specifier. */ + __asm (".global _scanf_float"); + __attribute__((weak)) int _read (int fd, char *ptr, int len) + { + int nChars = 0; + (void)fd; + if (ptr != NULL) + { + for(/* Empty */;nChars < len;++ptr) + { + *ptr = (char)cy_retarget_io_getchar(); + ++nChars; + if((*ptr == '\n') || (*ptr == '\r')) + { + break; + } + } + } + return (nChars); + } +#endif + +static uint8_t cy_retarget_io_getchar(void) +{ + uint32_t read_value = Cy_SCB_UART_Get(CYBSP_UART_HW); + while (read_value == CY_SCB_UART_RX_NO_DATA) + { + read_value = Cy_SCB_UART_Get(CYBSP_UART_HW); + } + + return (uint8_t)read_value; +} + +static void cy_retarget_io_putchar(char c) +{ + uint32_t count = 0; + while (count == 0) + { + count = Cy_SCB_UART_Put(CYBSP_UART_HW, c); + } +} + +static cy_rslt_t cy_retarget_io_pdl_setbaud(CySCB_Type *base, uint32_t baudrate) +{ + cy_rslt_t result = CY_RSLT_TYPE_ERROR; + + uint8_t oversample_value = 8u; + uint8_t frac_bits = 0u; + uint32_t divider; + + Cy_SCB_UART_Disable(base, NULL); + + result = (cy_rslt_t) Cy_SysClk_PeriphDisableDivider(CY_SYSCLK_DIV_16_BIT, 0); + + divider = ((Cy_SysClk_ClkPeriGetFrequency() * (1 << frac_bits)) + ((baudrate * oversample_value) / 2)) / (baudrate * oversample_value) - 1; + + if (result == CY_RSLT_SUCCESS) + { + result = (cy_rslt_t) Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, 0u, divider); + } + + if (result == CY_RSLT_SUCCESS) + { + result = Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, 0u); + } + + Cy_SCB_UART_Enable(base); + + return result; +} + +cy_rslt_t cy_retarget_io_pdl_init(uint32_t baudrate) +{ + cy_rslt_t result = CY_RSLT_TYPE_ERROR; + + result = (cy_rslt_t)Cy_SCB_UART_Init(CYBSP_UART_HW, &CYBSP_UART_config, &CYBSP_UART_context); + + if (result == CY_RSLT_SUCCESS) + { + result = cy_retarget_io_pdl_setbaud(CYBSP_UART_HW, baudrate); + } + + if (result == CY_RSLT_SUCCESS) + { + Cy_SCB_UART_Enable(CYBSP_UART_HW); + } + + return result; +} + +/** + * @brief Wait while UART completes transfer. Try for tries_count times - + * once each 10 millisecons. + */ +void cy_retarget_io_wait_tx_complete(CySCB_Type *base, uint32_t tries_count) +{ + while(tries_count > 0) + { + if (!Cy_SCB_UART_IsTxComplete(base)) { + Cy_SysLib_DelayCycles(10 * cy_delayFreqKhz); + tries_count -= 1; + } else { + return; + } + } +} + +void cy_retarget_io_pdl_deinit() +{ + Cy_SCB_UART_DeInit(CYBSP_UART_HW); +} + +#if defined(__cplusplus) +} +#endif diff --git a/bootloader/mcuboot/boot/cypress/platforms/retarget_io_pdl/cy_retarget_io_pdl.h b/bootloader/mcuboot/boot/cypress/platforms/retarget_io_pdl/cy_retarget_io_pdl.h new file mode 100644 index 0000000..f0c8733 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/platforms/retarget_io_pdl/cy_retarget_io_pdl.h @@ -0,0 +1,62 @@ +/***************************************************************************//** +* \file cy_retarget_io.h +* +* \brief +* Provides APIs for transmitting messages to or from the board via standard +* printf/scanf functions. Messages are transmitted over a UART connection which +* is generally connected to a host machine. Transmission is done at 115200 baud +* using the tx and rx pins provided by the user of this library. The UART +* instance is made available via cy_retarget_io_uart_obj in case any changes +* to the default configuration are desired. +* NOTE: If the application is built using newlib-nano, by default, floating +* point format strings (%f) are not supported. To enable this support you must +* add '-u _printf_float' to the linker command line. +* +******************************************************************************** +* \copyright +* Copyright 2018-2019 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +#pragma once + +#include +#include "cy_result.h" +#include "cy_pdl.h" + +#if defined(__cplusplus) +extern "C" { +#endif + +/** UART baud rate */ +#define CY_RETARGET_IO_BAUDRATE (115200) + +/** Defining this macro enables conversion of line feed (LF) into carriage + * return followed by line feed (CR & LF) on the output direction (STDOUT). You + * can define this macro through the DEFINES variable in the application + * Makefile. + */ +#define CY_RETARGET_IO_CONVERT_LF_TO_CRLF + +cy_rslt_t cy_retarget_io_pdl_init(uint32_t baudrate); + +void cy_retarget_io_wait_tx_complete(CySCB_Type *base, uint32_t tries_count); + +void cy_retarget_io_pdl_deinit(void); + +#if defined(__cplusplus) +} +#endif + diff --git a/bootloader/mcuboot/boot/cypress/toolchains.mk b/bootloader/mcuboot/boot/cypress/toolchains.mk new file mode 100644 index 0000000..11c1413 --- /dev/null +++ b/bootloader/mcuboot/boot/cypress/toolchains.mk @@ -0,0 +1,107 @@ +################################################################################ +# \file toolchains.mk +# \version 1.0 +# +# \brief +# Makefile to describe supported toolchains for Cypress MCUBoot based applications. +# +################################################################################ +# \copyright +# Copyright 2018-2019 Cypress Semiconductor Corporation +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +################################################################################ + +include common_libs.mk + +# Compilers +GCC_ARM := 1 +IAR := 2 +ARM := 3 +OTHER := 4 + +ifeq ($(MAKEINFO), 1) +$(info $(COMPILER)) +endif +# Detect host OS to make resolving compiler pathes easier +UNAME_S := $(shell uname -s) +ifeq ($(UNAME_S), Darwin) + HOST_OS = osx +else + ifeq ($(UNAME_S), Linux) + HOST_OS = linux + else + HOST_OS = win + endif +endif + +# Path to the compiler installation +# NOTE: Absolute pathes for now for the sake of development +ifeq ($(HOST_OS), win) + ifeq ($(COMPILER), GCC_ARM) + TOOLCHAIN_PATH ?= c:/Users/$(USERNAME)/ModusToolbox/tools_2.2/gcc + MY_TOOLCHAIN_PATH:=$(subst \,/,$(TOOLCHAIN_PATH)) + TOOLCHAIN_PATH := $(MY_TOOLCHAIN_PATH) + GCC_PATH := $(TOOLCHAIN_PATH) + # executables + CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc" + LD := $(CC) + endif + +else ifeq ($(HOST_OS), osx) + TOOLCHAIN_PATH ?= /opt/gcc-arm-none-eabi + GCC_PATH := $(TOOLCHAIN_PATH) + + CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc" + LD := $(CC) + +else ifeq ($(HOST_OS), linux) + TOOLCHAIN_PATH ?= /opt/gcc-arm-none-eabi + GCC_PATH := $(TOOLCHAIN_PATH) + # executables + CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc" + LD := $(CC) +endif + +PDL_ELFTOOL := "hal/tools/$(HOST_OS)/elf/cymcuelftool" + +OBJDUMP := "$(GCC_PATH)/bin/arm-none-eabi-objdump" +OBJCOPY := "$(GCC_PATH)/bin/arm-none-eabi-objcopy" + +# Set flags for toolchain executables +ifeq ($(COMPILER), GCC_ARM) + # set build-in compiler flags + CFLAGS_COMMON := -mcpu=cortex-$(CORE_SIFFX) -mthumb -mfloat-abi=soft -fno-stack-protector -ffunction-sections -fdata-sections -ffat-lto-objects -fstrict-aliasing -g -Wall -Wextra + ifeq ($(BUILDCFG), Debug) + CFLAGS_COMMON += -Og -g3 + else ifeq ($(BUILDCFG), Release) + CFLAGS_COMMON += -Os -g + else +$(error BUILDCFG : '$(BUILDCFG)' is not supported) + endif + # add defines and includes + CFLAGS := $(CFLAGS_COMMON) $(INCLUDES) + CC_DEPEND = -MD -MP -MF + + LDFLAGS_COMMON := -mcpu=cortex-$(CORE_SIFFX) -mthumb -specs=nano.specs -ffunction-sections -fdata-sections -Wl,--gc-sections -L "$(GCC_PATH)/lib/gcc/arm-none-eabi/7.2.1/thumb/v6-m" -ffat-lto-objects -g --enable-objc-gc + ifeq ($(BUILDCFG), Debug) + LDFLAGS_COMMON += -Og + else ifeq ($(BUILDCFG), Release) + LDFLAGS_COMMON += -Os + else +$(error BUILDCFG : '$(BUILDCFG)' is not supported) + endif + LDFLAGS_NANO := -L "$(GCC_PATH)/arm-none-eabi/lib/thumb/v6-m" + LDFLAGS := $(LDFLAGS_COMMON) $(LDFLAGS_NANO) +endif diff --git a/bootloader/mcuboot/boot/espressif/CMakeLists.txt b/bootloader/mcuboot/boot/espressif/CMakeLists.txt new file mode 100644 index 0000000..bc703fc --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/CMakeLists.txt @@ -0,0 +1,409 @@ +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +cmake_minimum_required(VERSION 3.13) +cmake_policy(SET CMP0109 NEW) + +include(${CMAKE_CURRENT_LIST_DIR}/tools/utils.cmake) + +if (NOT DEFINED MCUBOOT_TARGET) + message(FATAL_ERROR "MCUBOOT_TARGET not defined. Please pass -DMCUBOOT_TARGET flag.") +endif() + +add_definitions(-DMCUBOOT_TARGET=${MCUBOOT_TARGET}) +add_definitions(-D__ESPRESSIF__=1) + +if ("${MCUBOOT_TARGET}" STREQUAL "esp32" OR + "${MCUBOOT_TARGET}" STREQUAL "esp32s2" OR + "${MCUBOOT_TARGET}" STREQUAL "esp32s3") + set(MCUBOOT_ARCH "xtensa") +elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c3" OR + "${MCUBOOT_TARGET}" STREQUAL "esp32c6" OR + "${MCUBOOT_TARGET}" STREQUAL "esp32c2" OR + "${MCUBOOT_TARGET}" STREQUAL "esp32h2") + set(MCUBOOT_ARCH "riscv") +endif() + +if (NOT DEFINED CMAKE_TOOLCHAIN_FILE) + if (DEFINED TOOLCHAIN_BIN_DIR) + message("CMAKE_TOOLCHAIN_FILE not defined, searching for toolchain compiler in TOOLCHAIN_BIN_DIR: ${TOOLCHAIN_BIN_DIR}") + set(CMAKE_SYSTEM_NAME Generic) + + file(GLOB C_COMPILER_BIN "${TOOLCHAIN_BIN_DIR}/*${MCUBOOT_ARCH}*elf-gcc") + if (NOT C_COMPILER_BIN) + message(FATAL_ERROR "No C compiler found. Please ensure that TOOLCHAIN_BIN_DIR directory contains a set of C compiling tools compatible with the target") + endif() + set(CMAKE_C_COMPILER ${C_COMPILER_BIN}) + set(CMAKE_ASM_COMPILER ${C_COMPILER_BIN}) + message("C compiler found: ${CMAKE_C_COMPILER}") + + file(GLOB CXX_COMPILER_BIN "${TOOLCHAIN_BIN_DIR}/*${MCUBOOT_ARCH}*elf-g++") + if (NOT CXX_COMPILER_BIN) + message(FATAL_ERROR "No C++ compiler found. Please ensure that TOOLCHAIN_BIN_DIR directory contains a set of C++ compiling tools compatible with the target") + endif() + set(CMAKE_CXX_COMPILER ${CXX_COMPILER_BIN}) + message("CXX compiler found: ${CMAKE_CXX_COMPILER}") + else() + # Set toolchain file that expect the same toolchain as IDF sets on PATH + set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/tools/toolchain-${MCUBOOT_TARGET}.cmake) + message("No user-defined toolchain, setting default toolchain file: ${CMAKE_TOOLCHAIN_FILE}") + endif() + + # This flag is needed when redefining a different compiler toolchain at this point + # on CMakeLists, the reason is that CMake does a compiler testing prior to building + # that may fail due to cross-compilation + set(CMAKE_TRY_COMPILE_TARGET_TYPE "STATIC_LIBRARY") +else() + message("CMAKE_TOOLCHAIN_FILE: ${CMAKE_TOOLCHAIN_FILE}") +endif() + +project(mcuboot_${MCUBOOT_TARGET}) + +# Set the minimum revision for each supported chip +if ("${MCUBOOT_TARGET}" STREQUAL "esp32") + set(ESP_MIN_REVISION 3) +elseif("${MCUBOOT_TARGET}" STREQUAL "esp32s2") + set(ESP_MIN_REVISION 0) +elseif("${MCUBOOT_TARGET}" STREQUAL "esp32s3") + set(ESP_MIN_REVISION 0) +elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c3") + set(ESP_MIN_REVISION 3) +elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c6") + set(ESP_MIN_REVISION 0) +elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c2") + set(ESP_MIN_REVISION 0) +elseif("${MCUBOOT_TARGET}" STREQUAL "esp32h2") + set(ESP_MIN_REVISION 0) +else() + message(FATAL_ERROR "Unsupported target ${MCUBOOT_TARGET}") +endif() + +if (NOT DEFINED ESP_HAL_PATH) + if (DEFINED ENV{ESP_HAL_PATH}) + set(ESP_HAL_PATH $ENV{ESP_HAL_PATH}) + else() + message(WARNING "ESP_HAL_PATH not defined, checking if IDF_PATH exists.") + if (DEFINED ENV{IDF_PATH}) + set(ESP_HAL_PATH $ENV{IDF_PATH}) + message("IDF installation found in the system, using IDF_PATH as ESP_HAL_PATH.") + else () + message(FATAL_ERROR "Please set -DESP_HAL_PATH parameter or define ESP_HAL_PATH environment variable.") + endif() + endif() +endif() + +execute_process( + COMMAND git describe --tags + WORKING_DIRECTORY ${CMAKE_CURRENT_LIST_DIR} + OUTPUT_VARIABLE MCUBOOT_VER + OUTPUT_STRIP_TRAILING_WHITESPACE + ) +add_definitions(-DMCUBOOT_VER=\"${MCUBOOT_VER}\") + +if (NOT DEFINED MCUBOOT_CONFIG_FILE) + set(MCUBOOT_CONFIG_FILE "${CMAKE_CURRENT_LIST_DIR}/port/${MCUBOOT_TARGET}/bootloader.conf") +endif() + +string(REPLACE " " ";" MCUBOOT_CONFIG_FILE_LIST "${MCUBOOT_CONFIG_FILE}") +foreach(CONFIG_FILE ${MCUBOOT_CONFIG_FILE_LIST}) + if (NOT EXISTS "${CONFIG_FILE}") + message(FATAL_ERROR "MCUboot configuration file does not exist at ${CONFIG_FILE}") + endif() + parse_and_set_config_file(${CONFIG_FILE}) +endforeach() + +set(APP_NAME mcuboot_${MCUBOOT_TARGET}) +set(APP_EXECUTABLE ${APP_NAME}.elf) + +set(MCUBOOT_ROOT_DIR ${CMAKE_CURRENT_LIST_DIR}/../..) +set(BOOTUTIL_DIR ${MCUBOOT_ROOT_DIR}/boot/bootutil) +set(BOOT_SERIAL_DIR ${MCUBOOT_ROOT_DIR}/boot/boot_serial) +set(ZCBOR_DIR ${MCUBOOT_ROOT_DIR}/boot/zcbor) +set(ESPRESSIF_PORT_DIR ${CMAKE_CURRENT_LIST_DIR}) + +# Find imgtool. +# Go with an explicitly installed imgtool first, falling +# back to mcuboot/scripts/imgtool.py. +find_program(IMGTOOL_COMMAND + NAMES imgtool imgtool.py + ) +if ("${IMGTOOL_COMMAND}" MATCHES "IMGTOOL_COMMAND-NOTFOUND") + set(imgtool_path "${MCUBOOT_ROOT_DIR}/scripts/imgtool.py") +else() + set(imgtool_path "${IMGTOOL_COMMAND}") +endif() + +# Find installed esptool, if not found falls to IDF's +find_program(ESPTOOL_COMMAND + NAMES esptool esptool.py + ) +if ("${ESPTOOL_COMMAND}" MATCHES "ESPTOOL_COMMAND-NOTFOUND") + if (DEFINED ENV{IDF_PATH}) + set(esptool_path "${IDF_PATH}/components/esptool_py/esptool/esptool.py") + else() + message(FATAL_ERROR "esptool.py not found. Please install it using \'pip install esptool\'.") + endif() +else() + set(esptool_path "${ESPTOOL_COMMAND}") +endif() + +# Flash frequency parameter for esptool.py, for more information, check `esptool.py -h` +if (NOT DEFINED ESP_FLASH_FREQ) + if ("${MCUBOOT_TARGET}" STREQUAL "esp32" OR + "${MCUBOOT_TARGET}" STREQUAL "esp32s2" OR + "${MCUBOOT_TARGET}" STREQUAL "esp32s3" OR + "${MCUBOOT_TARGET}" STREQUAL "esp32c3" OR + "${MCUBOOT_TARGET}" STREQUAL "esp32c6") + set(ESP_FLASH_FREQ "40m") + elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c2") + set(ESP_FLASH_FREQ "60m") + elseif("${MCUBOOT_TARGET}" STREQUAL "esp32h2") + set(ESP_FLASH_FREQ "24m") + endif() +endif() + +# Flash mode parameter for esptool.py, for more information, check `esptool.py -h` +if (NOT DEFINED ESP_FLASH_MODE) + set(ESP_FLASH_MODE "dio") +endif() + +# Serial baud rate parameter for esptool.py flash use, for more information, check `esptool.py -h` +if (NOT DEFINED ESP_BAUD_RATE) + set(ESP_BAUD_RATE 115200) +endif() + +if (DEFINED CONFIG_ESP_SIGN_RSA) + include(${CMAKE_CURRENT_LIST_DIR}/include/crypto_config/rsa.cmake) +elseif (DEFINED CONFIG_ESP_SIGN_EC256) + include(${CMAKE_CURRENT_LIST_DIR}/include/crypto_config/ec256.cmake) +elseif (DEFINED CONFIG_ESP_SIGN_ED25519) + include(${CMAKE_CURRENT_LIST_DIR}/include/crypto_config/ed25519.cmake) +else() + # No signature verification + set(TINYCRYPT_DIR ${MCUBOOT_ROOT_DIR}/ext/tinycrypt/lib) + set(CRYPTO_INC + ${TINYCRYPT_DIR}/include + ) + set(crypto_srcs + ${TINYCRYPT_DIR}/source/sha256.c + ${TINYCRYPT_DIR}/source/utils.c + ) +endif() + +if(DEFINED CONFIG_ESP_SIGN_KEY_FILE) + if(IS_ABSOLUTE ${CONFIG_ESP_SIGN_KEY_FILE}) + set(KEY_FILE ${CONFIG_ESP_SIGN_KEY_FILE}) + else() + set(KEY_FILE ${MCUBOOT_ROOT_DIR}/${CONFIG_ESP_SIGN_KEY_FILE}) + endif() + message("MCUBoot bootloader key file: ${KEY_FILE}") + + set(GENERATED_PUBKEY ${CMAKE_CURRENT_BINARY_DIR}/autogen-pubkey.c) + add_custom_command( + OUTPUT ${GENERATED_PUBKEY} + COMMAND + ${imgtool_path} + getpub + -k + ${KEY_FILE} + > ${GENERATED_PUBKEY} + DEPENDS ${KEY_FILE} + ) + list(APPEND crypto_srcs ${GENERATED_PUBKEY}) +endif() + +set(bootutil_srcs + ${BOOTUTIL_DIR}/src/boot_record.c + ${BOOTUTIL_DIR}/src/bootutil_misc.c + ${BOOTUTIL_DIR}/src/bootutil_public.c + ${BOOTUTIL_DIR}/src/caps.c + ${BOOTUTIL_DIR}/src/encrypted.c + ${BOOTUTIL_DIR}/src/fault_injection_hardening.c + ${BOOTUTIL_DIR}/src/fault_injection_hardening_delay_rng_mbedtls.c + ${BOOTUTIL_DIR}/src/image_ecdsa.c + ${BOOTUTIL_DIR}/src/image_ed25519.c + ${BOOTUTIL_DIR}/src/image_rsa.c + ${BOOTUTIL_DIR}/src/image_validate.c + ${BOOTUTIL_DIR}/src/loader.c + ${BOOTUTIL_DIR}/src/swap_misc.c + ${BOOTUTIL_DIR}/src/swap_move.c + ${BOOTUTIL_DIR}/src/swap_scratch.c + ${BOOTUTIL_DIR}/src/tlv.c + ) +set(bootutil_paths) + +set(CFLAGS + "-Wno-frame-address" + "-Wall" + "-Wextra" + "-W" + "-Wdeclaration-after-statement" + "-Wwrite-strings" + "-Wlogical-op" + "-Wshadow" + "-ffunction-sections" + "-fdata-sections" + "-fstrict-volatile-bitfields" + "-Werror=all" + "-Wno-error=unused-function" + "-Wno-error=unused-but-set-variable" + "-Wno-error=unused-variable" + "-Wno-error=deprecated-declarations" + "-Wno-unused-parameter" + "-Wno-sign-compare" + "-ggdb" + "-Os" + "-D_GNU_SOURCE" + "-std=gnu17" + "-Wno-old-style-declaration" + "-Wno-implicit-int" + "-Wno-declaration-after-statement" + ) + +set(LDFLAGS + "-nostdlib" + "-Wno-frame-address" + "-Wl,--cref" + "-Wl,--Map=${APP_NAME}.map" + "-fno-rtti" + "-fno-lto" + "-Wl,--gc-sections" + "-Wl,--undefined=uxTopUsedPriority" + "-lm" + "-lgcc" + "-lgcov" + ) + +if ("${MCUBOOT_ARCH}" STREQUAL "xtensa") + list(APPEND CFLAGS + "-mlongcalls" + ) + list(APPEND LDFLAGS + "-mlongcalls" + ) +endif() + +add_subdirectory(hal) +add_executable( + ${APP_EXECUTABLE} + ${CMAKE_CURRENT_LIST_DIR}/main.c + ) + +target_compile_options( + ${APP_EXECUTABLE} + PUBLIC + ${CFLAGS} + ) + +set(port_srcs + ${CMAKE_CURRENT_LIST_DIR}/port/esp_mcuboot.c + ${CMAKE_CURRENT_LIST_DIR}/port/esp_loader.c + ${CMAKE_CURRENT_LIST_DIR}/os.c + ) + +if(CONFIG_ESP_MCUBOOT_SERIAL) + set(MBEDTLS_DIR "${MCUBOOT_ROOT_DIR}/ext/mbedtls") + + list(APPEND bootutil_srcs + ${BOOT_SERIAL_DIR}/src/boot_serial.c + ${BOOT_SERIAL_DIR}/src/zcbor_bulk.c + ${ZCBOR_DIR}/src/zcbor_decode.c + ${ZCBOR_DIR}/src/zcbor_encode.c + ${ZCBOR_DIR}/src/zcbor_common.c + ) + list(APPEND bootutil_paths + ${ZCBOR_DIR}/include + ) + list(APPEND port_srcs + ${CMAKE_CURRENT_LIST_DIR}/port/${MCUBOOT_TARGET}/serial_adapter.c + ${MBEDTLS_DIR}/library/base64.c + ) + list(APPEND CRYPTO_INC + ${MBEDTLS_DIR}/include + ) +endif() + +target_sources( + ${APP_EXECUTABLE} + PUBLIC + ${bootutil_srcs} + ${crypto_srcs} + ${port_srcs} + ) + +target_include_directories( + ${APP_EXECUTABLE} + PUBLIC + ${BOOTUTIL_DIR}/include + ${BOOTUTIL_DIR}/src + ${BOOT_SERIAL_DIR}/include + ${CRYPTO_INC} + ${CMAKE_CURRENT_LIST_DIR}/include + ${bootutil_paths} + ) + +set(ld_input ${CMAKE_CURRENT_LIST_DIR}/port/${MCUBOOT_TARGET}/ld/bootloader.ld) +set(ld_output ${CMAKE_CURRENT_BINARY_DIR}/ld/bootloader.ld) + +file(MAKE_DIRECTORY "${CMAKE_CURRENT_BINARY_DIR}/ld") + +get_directory_property(configs COMPILE_DEFINITIONS) +foreach(c ${configs}) + list(APPEND conf_defines "-D${c}") +endforeach() + +# Preprocess linker script +add_custom_command( + TARGET ${APP_EXECUTABLE} PRE_LINK + COMMAND ${CMAKE_C_COMPILER} -x c -E -P -o ${ld_output} ${conf_defines} ${ld_input} + MAIN_DEPENDENCY ${ld_input} + COMMENT "Preprocessing bootloader.ld linker script..." + ) + +target_link_libraries( + ${APP_EXECUTABLE} + PUBLIC + -T${ld_output} + ${LDFLAGS} + ) + +target_link_libraries( + ${APP_EXECUTABLE} + PUBLIC + hal + ) + +# This step uses esptool.py for generating the final bootloader binary in +# Espressif compatible format. +# Note: Both binary generation and flash steps still have some default arguments +add_custom_command(TARGET ${APP_EXECUTABLE} POST_BUILD + COMMAND + ${esptool_path} + --chip ${MCUBOOT_TARGET} elf2image --min-rev ${ESP_MIN_REVISION} + --flash_mode ${ESP_FLASH_MODE} --flash_freq ${ESP_FLASH_FREQ} --flash_size ${CONFIG_ESP_FLASH_SIZE} + -o ${APP_NAME}.bin ${APP_NAME}.elf + ) + +if (DEFINED MCUBOOT_FLASH_PORT) + set(FLASH_PORT ${MCUBOOT_FLASH_PORT}) +else() + # Defaults to the first USB serial port + set(FLASH_PORT "/dev/ttyUSB0") +endif() + +if (NOT EXISTS "${FLASH_PORT}") + message(WARNING "Could not open ${FLASH_PORT}, serial port does not exist") +endif() + +add_custom_target(flash DEPENDS ${APP_NAME}.bin) +add_custom_command(TARGET flash + USES_TERMINAL + COMMAND + ${esptool_path} + -p ${FLASH_PORT} -b ${ESP_BAUD_RATE} --before default_reset --after no_reset + --chip ${MCUBOOT_TARGET} write_flash + --flash_mode ${ESP_FLASH_MODE} --flash_size ${CONFIG_ESP_FLASH_SIZE} + --flash_freq ${ESP_FLASH_FREQ} ${CONFIG_ESP_BOOTLOADER_OFFSET} + ${APP_NAME}.bin + ) diff --git a/bootloader/mcuboot/boot/espressif/ci_configs/multi-boot.conf b/bootloader/mcuboot/boot/espressif/ci_configs/multi-boot.conf new file mode 100644 index 0000000..4adf253 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/ci_configs/multi-boot.conf @@ -0,0 +1,10 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +# ATTENTION: +# This configuration file targets the building for CI environment and contains +# a set of definitions to resemble a bootloader image for RELEASE environment. + +CONFIG_ESP_IMAGE_NUMBER=2 +CONFIG_ESP_MULTI_PROCESSOR_BOOT=y diff --git a/bootloader/mcuboot/boot/espressif/ci_configs/multi-image.conf b/bootloader/mcuboot/boot/espressif/ci_configs/multi-image.conf new file mode 100644 index 0000000..895a865 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/ci_configs/multi-image.conf @@ -0,0 +1,9 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +# ATTENTION: +# This configuration file targets the building for CI environment and contains +# a set of definitions to resemble a bootloader image for RELEASE environment. + +CONFIG_ESP_IMAGE_NUMBER=2 diff --git a/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-ec256.conf b/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-ec256.conf new file mode 100644 index 0000000..17b032b --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-ec256.conf @@ -0,0 +1,22 @@ +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +# ATTENTION: +# This configuration file targets the building for CI environment and contains +# a set of definitions to resemble a bootloader image for RELEASE environment. +# Running the generated firmware image may result in irreversible operations +# to the chip! + +CONFIG_SECURE_SIGNED_ON_BOOT=1 +CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 +CONFIG_SECURE_BOOT=1 +CONFIG_SECURE_BOOT_V2_ENABLED=1 +CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 +CONFIG_SECURE_FLASH_ENC_ENABLED=1 +CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE=1 +CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem +CONFIG_ESP_USE_TINYCRYPT=1 +CONFIG_ESP_SIGN_EC256=1 +CONFIG_ESP_DOWNGRADE_PREVENTION=1 +CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=1 diff --git a/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-ed25519.conf b/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-ed25519.conf new file mode 100644 index 0000000..9cbdcd6 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-ed25519.conf @@ -0,0 +1,22 @@ +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +# ATTENTION: +# This configuration file targets the building for CI environment and contains +# a set of definitions to resemble a bootloader image for RELEASE environment. +# Running the generated firmware image may result in irreversible operations +# to the chip! + +CONFIG_SECURE_SIGNED_ON_BOOT=1 +CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 +CONFIG_SECURE_BOOT=1 +CONFIG_SECURE_BOOT_V2_ENABLED=1 +CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 +CONFIG_SECURE_FLASH_ENC_ENABLED=1 +CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE=1 +CONFIG_ESP_SIGN_KEY_FILE=root-ed25519.pem +CONFIG_ESP_USE_TINYCRYPT=1 +CONFIG_ESP_SIGN_ED25519=1 +CONFIG_ESP_DOWNGRADE_PREVENTION=1 +CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=1 diff --git a/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-rsa2048.conf b/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-rsa2048.conf new file mode 100644 index 0000000..2b22150 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-rsa2048.conf @@ -0,0 +1,23 @@ +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +# ATTENTION: +# This configuration file targets the building for CI environment and contains +# a set of definitions to resemble a bootloader image for RELEASE environment. +# Running the generated firmware image may result in irreversible operations +# to the chip! + +CONFIG_SECURE_SIGNED_ON_BOOT=1 +CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 +CONFIG_SECURE_BOOT=1 +CONFIG_SECURE_BOOT_V2_ENABLED=1 +CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 +CONFIG_SECURE_FLASH_ENC_ENABLED=1 +CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE=1 +CONFIG_ESP_SIGN_KEY_FILE=root-rsa-2048.pem +CONFIG_ESP_USE_MBEDTLS=1 +CONFIG_ESP_SIGN_RSA=1 +CONFIG_ESP_SIGN_RSA_LEN=2048 +CONFIG_ESP_DOWNGRADE_PREVENTION=1 +CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=1 diff --git a/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-rsa3072.conf b/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-rsa3072.conf new file mode 100644 index 0000000..9f13785 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/ci_configs/secureboot-sign-rsa3072.conf @@ -0,0 +1,23 @@ +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +# ATTENTION: +# This configuration file targets the building for CI environment and contains +# a set of definitions to resemble a bootloader image for RELEASE environment. +# Running the generated firmware image may result in irreversible operations +# to the chip! + +CONFIG_SECURE_SIGNED_ON_BOOT=1 +CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 +CONFIG_SECURE_BOOT=1 +CONFIG_SECURE_BOOT_V2_ENABLED=1 +CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 +CONFIG_SECURE_FLASH_ENC_ENABLED=1 +CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE=1 +CONFIG_ESP_SIGN_KEY_FILE=root-rsa-3072.pem +CONFIG_ESP_USE_MBEDTLS=1 +CONFIG_ESP_SIGN_RSA=1 +CONFIG_ESP_SIGN_RSA_LEN=3072 +CONFIG_ESP_DOWNGRADE_PREVENTION=1 +CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=1 diff --git a/bootloader/mcuboot/boot/espressif/ci_configs/serialrecovery.conf b/bootloader/mcuboot/boot/espressif/ci_configs/serialrecovery.conf new file mode 100644 index 0000000..7e81bde --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/ci_configs/serialrecovery.conf @@ -0,0 +1,10 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +# ATTENTION: +# This configuration file targets the building for CI environment and contains +# a set of definitions to resemble a bootloader image for RELEASE environment. + +CONFIG_ESP_MCUBOOT_SERIAL=y +CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y diff --git a/bootloader/mcuboot/boot/espressif/hal/CMakeLists.txt b/bootloader/mcuboot/boot/espressif/hal/CMakeLists.txt new file mode 100644 index 0000000..d248c26 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/CMakeLists.txt @@ -0,0 +1,213 @@ +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +cmake_minimum_required(VERSION 3.13) + +project(hal) + +set(esp_hal_dir ${ESP_HAL_PATH}) +set(src_dir ${CMAKE_CURRENT_LIST_DIR}/src) +set(include_dirs + ${CMAKE_CURRENT_LIST_DIR}/include + ${CMAKE_CURRENT_LIST_DIR}/include/${MCUBOOT_TARGET} + ) + +list(APPEND include_dirs + ${esp_hal_dir}/components/bootloader_support/include + ${esp_hal_dir}/components/bootloader_support/private_include + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/include + ${esp_hal_dir}/components/spi_flash/include + ${esp_hal_dir}/components/spi_flash/include/spi_flash + ${esp_hal_dir}/components/esp_app_format/include + ${esp_hal_dir}/components/newlib/platform_include + ${esp_hal_dir}/components/esp_common/include + ${esp_hal_dir}/components/${MCUBOOT_ARCH}/include + ${esp_hal_dir}/components/esp_rom/include + ${esp_hal_dir}/components/esp_rom/include/${MCUBOOT_TARGET} + ${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET} + ${esp_hal_dir}/components/soc/include + ${esp_hal_dir}/components/soc/${MCUBOOT_TARGET} + ${esp_hal_dir}/components/soc/${MCUBOOT_TARGET}/include + ${esp_hal_dir}/components/efuse/include + ${esp_hal_dir}/components/efuse/${MCUBOOT_TARGET}/include + ${esp_hal_dir}/components/efuse/private_include + ${esp_hal_dir}/components/efuse/${MCUBOOT_TARGET}/private_include + ${esp_hal_dir}/components/esp_hw_support/include + ${esp_hal_dir}/components/esp_hw_support/include/soc + ${esp_hal_dir}/components/esp_hw_support/include/soc/${MCUBOOT_TARGET} + ${esp_hal_dir}/components/esp_hw_support/port/include + ${esp_hal_dir}/components/esp_hw_support/include/esp_private + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET} + ${esp_hal_dir}/components/hal/${MCUBOOT_TARGET}/include + ${esp_hal_dir}/components/hal/include + ${esp_hal_dir}/components/hal/platform_port/include + ${esp_hal_dir}/components/esp_system/include + ${esp_hal_dir}/components/log/include + ) + +if("${MCUBOOT_ARCH}" STREQUAL "xtensa") + list(APPEND include_dirs + ${esp_hal_dir}/components/${MCUBOOT_ARCH}/${MCUBOOT_TARGET}/include + ${esp_hal_dir}/components/${MCUBOOT_ARCH}/include + ) +endif() + +set(hal_srcs + ${esp_hal_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/bootloader_${MCUBOOT_TARGET}.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_init.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_common.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_common_loader.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_console.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_console_loader.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${MCUBOOT_TARGET}.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_clock_init.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_clock_loader.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_efuse.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_panic.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_mem.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_random.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_random_${MCUBOOT_TARGET}.c + ${esp_hal_dir}/components/bootloader_support/src/bootloader_utility.c + ${esp_hal_dir}/components/bootloader_support/src/esp_image_format.c + ${esp_hal_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/bootloader_soc.c + ${esp_hal_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/bootloader_sha.c + ${esp_hal_dir}/components/hal/mpu_hal.c + ${esp_hal_dir}/components/hal/efuse_hal.c + ${esp_hal_dir}/components/hal/mmu_hal.c + ${esp_hal_dir}/components/hal/wdt_hal_iram.c + ${esp_hal_dir}/components/hal/${MCUBOOT_TARGET}/efuse_hal.c + ${esp_hal_dir}/components/soc/${MCUBOOT_TARGET}/uart_periph.c + ${esp_hal_dir}/components/soc/${MCUBOOT_TARGET}/gpio_periph.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_time.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_clk.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_clk_init.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_uart.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_sys.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_spiflash.c + ${esp_hal_dir}/components/efuse/${MCUBOOT_TARGET}/esp_efuse_table.c + ${esp_hal_dir}/components/efuse/src/esp_efuse_fields.c + ${esp_hal_dir}/components/efuse/${MCUBOOT_TARGET}/esp_efuse_fields.c + ${esp_hal_dir}/components/efuse/src/esp_efuse_api.c + ${esp_hal_dir}/components/efuse/src/esp_efuse_utility.c + ${esp_hal_dir}/components/efuse/${MCUBOOT_TARGET}/esp_efuse_utility.c + ${esp_hal_dir}/components/log/log_noos.c + ${src_dir}/bootloader_banner.c + ${src_dir}/bootloader_wdt.c + ) + +if(DEFINED CONFIG_SECURE_BOOT_V2_ENABLED) + list(APPEND hal_srcs + ${src_dir}/secure_boot.c + ${esp_hal_dir}/components/bootloader_support/src/secure_boot_v2/secure_boot_signatures_bootloader.c + ${esp_hal_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/secure_boot_secure_features.c + ) + list(APPEND include_dirs + ${esp_hal_dir}/components/bootloader_support/src/secure_boot_v2 + ) +endif() + +if(DEFINED CONFIG_SECURE_FLASH_ENC_ENABLED) + list(APPEND hal_srcs + ${src_dir}/flash_encrypt.c + ${esp_hal_dir}/components/bootloader_support/src/${MCUBOOT_TARGET}/flash_encryption_secure_features.c + ) + set_source_files_properties( + ${src_dir}/flash_encrypt.c + PROPERTIES COMPILE_FLAGS + "-Wno-unused-variable" + ) +endif() + +if("${MCUBOOT_ARCH}" STREQUAL "xtensa") + list(APPEND hal_srcs + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_longjmp.S + ) +endif() + +set(CFLAGS + "-nostdlib" + "-Wno-frame-address" + "-Wall" + "-Wextra" + "-W" + "-Wwrite-strings" + "-Wlogical-op" + "-Wshadow" + "-ffunction-sections" + "-fdata-sections" + "-fstrict-volatile-bitfields" + "-Werror=all" + "-Wno-error=unused-function" + "-Wno-error=unused-but-set-variable" + "-Wno-error=unused-variable" + "-Wno-error=deprecated-declarations" + "-Wno-unused-parameter" + "-Wno-sign-compare" + "-ggdb" + "-Os" + "-D_GNU_SOURCE" + "-std=gnu17" + "-Wno-old-style-declaration" + "-Wno-implicit-int" + ) + +set(LDFLAGS + "-Wno-frame-address" + "-Wl,--cref" + "-Wl,--Map=${APP_NAME}.map" + "-fno-rtti" + "-fno-lto" + "-Wl,--gc-sections" + "-Wl,--undefined=uxTopUsedPriority" + "-lm" + "-lgcc" + "-lgcov" + ) + +if("${MCUBOOT_ARCH}" STREQUAL "xtensa") + list(APPEND CFLAGS + "-mlongcalls" + ) + list(APPEND LDFLAGS + "-mlongcalls" + ) +endif() + +set(LINKER_SCRIPTS + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.libgcc.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.api.ld + -T${esp_hal_dir}/components/soc/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.peripherals.ld + ) + +include(${CMAKE_CURRENT_LIST_DIR}/include/${MCUBOOT_TARGET}/${MCUBOOT_TARGET}.cmake) + +add_library(hal STATIC ${hal_srcs} ${include_dirs}) + +# Wrap for overriding the print banner function from bootloader_support +add_definitions(-DIDF_VER=0) +target_link_libraries( + hal + INTERFACE + "-Wl,--wrap=bootloader_print_banner") + +target_include_directories( + hal + PUBLIC + ${include_dirs} + ) + +target_compile_options( + hal + PUBLIC + ${CFLAGS} + ) + +target_link_libraries( + hal + PUBLIC + ${LDFLAGS} + ${LINKER_SCRIPTS} + ) diff --git a/bootloader/mcuboot/boot/espressif/hal/include/app_cpu_start.h b/bootloader/mcuboot/boot/espressif/hal/include/app_cpu_start.h new file mode 100644 index 0000000..03c5c77 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/app_cpu_start.h @@ -0,0 +1,11 @@ +/* + * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include + +void appcpu_start(uint32_t entry_addr); diff --git a/bootloader/mcuboot/boot/espressif/hal/include/bootloader_wdt.h b/bootloader/mcuboot/boot/espressif/hal/include/bootloader_wdt.h new file mode 100644 index 0000000..e5ac551 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/bootloader_wdt.h @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +void bootloader_wdt_feed(void); diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32/esp32.cmake b/bootloader/mcuboot/boot/espressif/hal/include/esp32/esp32.cmake new file mode 100644 index 0000000..6e72ced --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32/esp32.cmake @@ -0,0 +1,32 @@ +# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +list(APPEND hal_srcs + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_init.c + ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/without_key_purposes/three_key_blocks/esp_efuse_api_key.c + ) + +if (DEFINED CONFIG_ESP_MULTI_PROCESSOR_BOOT) + list(APPEND hal_srcs + ${src_dir}/${MCUBOOT_TARGET}/app_cpu_start.c + ${esp_hal_dir}/components/esp_hw_support/cpu.c + ) +endif() + +if (DEFINED CONFIG_ESP_CONSOLE_UART_CUSTOM) + list(APPEND hal_srcs + ${src_dir}/${MCUBOOT_TARGET}/console_uart_custom.c + ) +endif() + +list(APPEND LINKER_SCRIPTS + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib-funcs.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.eco3.ld + ) + +set_source_files_properties( + ${esp_hal_dir}/components/bootloader_support/src/esp32/bootloader_esp32.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c + PROPERTIES COMPILE_FLAGS + "-Wno-unused-variable -Wno-unused-but-set-variable") diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32/sdkconfig.h b/bootloader/mcuboot/boot/espressif/hal/include/esp32/sdkconfig.h new file mode 100644 index 0000000..7431e9b --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32/sdkconfig.h @@ -0,0 +1,31 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define BOOTLOADER_BUILD 1 +#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0000 +#define CONFIG_IDF_TARGET_ESP32 1 +#define CONFIG_ESP32_REV_MIN_3 1 +#define CONFIG_ESP32_REV_MIN_FULL 300 +#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32_REV_MIN_FULL +#define CONFIG_ESP32_REV_MIN 3 +#define CONFIG_ESP32_REV_MAX_FULL 399 +#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32_REV_MAX_FULL +#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 +#define CONFIG_MMU_PAGE_SIZE 0x10000 +#define CONFIG_ESP32_XTAL_FREQ 40 +#define CONFIG_XTAL_FREQ 40 +#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160 1 +#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160 +#define CONFIG_MCUBOOT 1 +#define NDEBUG 1 +#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000 +#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200 +#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x1000 +#define CONFIG_PARTITION_TABLE_OFFSET 0x10000 +#define CONFIG_EFUSE_VIRTUAL_OFFSET 0x250000 +#define CONFIG_EFUSE_VIRTUAL_SIZE 0x2000 +#define CONFIG_EFUSE_MAX_BLK_LEN 192 +#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1 diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32c2/esp32c2.cmake b/bootloader/mcuboot/boot/espressif/hal/include/esp32c2/esp32c2.cmake new file mode 100644 index 0000000..b859f9f --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32c2/esp32c2.cmake @@ -0,0 +1,29 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +list(APPEND hal_srcs + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_init.c + ${esp_hal_dir}/components/hal/cache_hal.c + ${esp_hal_dir}/components/efuse/${MCUBOOT_TARGET}/esp_efuse_table.c + ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/without_key_purposes/one_key_block/esp_efuse_api_key.c +) + +if (DEFINED CONFIG_ESP_CONSOLE_UART_CUSTOM) + list(APPEND hal_srcs + ${src_dir}/${MCUBOOT_TARGET}/console_uart_custom.c + ) +endif() + +list(APPEND LINKER_SCRIPTS + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld +) + +set_source_files_properties( + ${esp_hal_dir}/components/bootloader_support/src/esp_image_format.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${MCUBOOT_TARGET}.c + ${esp_hal_dir}/components/hal/mmu_hal.c + ${esp_hal_dir}/components/hal/cache_hal.c + PROPERTIES COMPILE_FLAGS + "-Wno-logical-op") diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32c2/sdkconfig.h b/bootloader/mcuboot/boot/espressif/hal/include/esp32c2/sdkconfig.h new file mode 100644 index 0000000..f71490b --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32c2/sdkconfig.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define BOOTLOADER_BUILD 1 +#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x000C +#define CONFIG_IDF_TARGET_ESP32C2 1 +#define CONFIG_ESP32C2_REV_MIN_0 1 +#define CONFIG_ESP32C2_REV_MIN_FULL 3 +#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32C2_REV_MIN_FULL +#define CONFIG_ESP32C2_REV_MIN 3 +#define CONFIG_ESP32C2_REV_MAX_FULL 99 +#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32C2_REV_MAX_FULL +#define CONFIG_IDF_TARGET_ARCH_RISCV 1 +#define CONFIG_MMU_PAGE_SIZE 0x10000 +#define CONFIG_XTAL_FREQ_26 1 +#define CONFIG_XTAL_FREQ 26 +#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 +#define CONFIG_MCUBOOT 1 +#define NDEBUG 1 +#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000 +#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200 +#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0000 +#define CONFIG_PARTITION_TABLE_OFFSET 0x10000 +#define CONFIG_EFUSE_VIRTUAL_OFFSET 0x250000 +#define CONFIG_EFUSE_VIRTUAL_SIZE 0x2000 +#define CONFIG_EFUSE_MAX_BLK_LEN 256 +#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1 diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32c3/esp32c3.cmake b/bootloader/mcuboot/boot/espressif/hal/include/esp32c3/esp32c3.cmake new file mode 100644 index 0000000..3d4525a --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32c3/esp32c3.cmake @@ -0,0 +1,20 @@ +# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +list(APPEND hal_srcs + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_init.c + ${esp_hal_dir}/components/hal/cache_hal.c + ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c +) + +if (DEFINED CONFIG_ESP_CONSOLE_UART_CUSTOM) + list(APPEND hal_srcs + ${src_dir}/${MCUBOOT_TARGET}/console_uart_custom.c + ) +endif() + +list(APPEND LINKER_SCRIPTS + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.eco3.ld +) diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32c3/sdkconfig.h b/bootloader/mcuboot/boot/espressif/hal/include/esp32c3/sdkconfig.h new file mode 100644 index 0000000..08c616a --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32c3/sdkconfig.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define BOOTLOADER_BUILD 1 +#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0005 +#define CONFIG_IDF_TARGET_ESP32C3 1 +#define CONFIG_ESP32C3_REV_MIN_3 1 +#define CONFIG_ESP32C3_REV_MIN_FULL 3 +#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32C3_REV_MIN_FULL +#define CONFIG_ESP32C3_REV_MIN 3 +#define CONFIG_ESP32C3_REV_MAX_FULL 99 +#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32C3_REV_MAX_FULL +#define CONFIG_IDF_TARGET_ARCH_RISCV 1 +#define CONFIG_MMU_PAGE_SIZE 0x10000 +#define CONFIG_XTAL_FREQ 40 +#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 +#define CONFIG_MCUBOOT 1 +#define NDEBUG 1 +#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000 +#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200 +#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0000 +#define CONFIG_PARTITION_TABLE_OFFSET 0x10000 +#define CONFIG_EFUSE_VIRTUAL_OFFSET 0x250000 +#define CONFIG_EFUSE_VIRTUAL_SIZE 0x2000 +#define CONFIG_EFUSE_MAX_BLK_LEN 256 +#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1 diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32c6/esp32c6.cmake b/bootloader/mcuboot/boot/espressif/hal/include/esp32c6/esp32c6.cmake new file mode 100644 index 0000000..f1b0a49 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32c6/esp32c6.cmake @@ -0,0 +1,34 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +list(APPEND include_dirs + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/private_include +) + +list(APPEND hal_srcs + ${esp_hal_dir}/components/hal/cache_hal.c + ${esp_hal_dir}/components/hal/lp_timer_hal.c + ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_hp_regi2c_${MCUBOOT_TARGET}.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/pmu_param.c +) + +if (DEFINED CONFIG_ESP_CONSOLE_UART_CUSTOM) + list(APPEND hal_srcs + ${src_dir}/${MCUBOOT_TARGET}/console_uart_custom.c + ) +endif() + +list(APPEND LINKER_SCRIPTS + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld +) + +set_source_files_properties( + ${esp_hal_dir}/components/bootloader_support/src/esp_image_format.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${MCUBOOT_TARGET}.c + ${esp_hal_dir}/components/hal/mmu_hal.c + ${esp_hal_dir}/components/hal/cache_hal.c + PROPERTIES COMPILE_FLAGS + "-Wno-logical-op") diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32c6/sdkconfig.h b/bootloader/mcuboot/boot/espressif/hal/include/esp32c6/sdkconfig.h new file mode 100644 index 0000000..2d79f57 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32c6/sdkconfig.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define BOOTLOADER_BUILD 1 +#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x000D +#define CONFIG_IDF_TARGET_ESP32C6 1 +#define CONFIG_ESP32C6_REV_MIN_0 1 +#define CONFIG_ESP32C6_REV_MIN_FULL 0 +#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32C6_REV_MIN_FULL +#define CONFIG_ESP32C6_REV_MIN 0 +#define CONFIG_ESP32C6_REV_MAX_FULL 99 +#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32C6_REV_MAX_FULL +#define CONFIG_IDF_TARGET_ARCH_RISCV 1 +#define CONFIG_MMU_PAGE_SIZE 0x10000 +#define SOC_MMU_PAGE_SIZE CONFIG_MMU_PAGE_SIZE /* from soc/CMakeLists */ +#define CONFIG_XTAL_FREQ 40 +#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 +#define CONFIG_MCUBOOT 1 +#define NDEBUG 1 +#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000 +#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200 +#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0000 +#define CONFIG_PARTITION_TABLE_OFFSET 0x10000 +#define CONFIG_EFUSE_VIRTUAL_OFFSET 0x250000 +#define CONFIG_EFUSE_VIRTUAL_SIZE 0x2000 +#define CONFIG_EFUSE_MAX_BLK_LEN 256 +#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1 diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32h2/esp32h2.cmake b/bootloader/mcuboot/boot/espressif/hal/include/esp32h2/esp32h2.cmake new file mode 100644 index 0000000..2507e65 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32h2/esp32h2.cmake @@ -0,0 +1,34 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +list(APPEND include_dirs + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/private_include +) + +list(APPEND hal_srcs + ${esp_hal_dir}/components/hal/cache_hal.c + ${esp_hal_dir}/components/hal/lp_timer_hal.c + ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_regi2c_${MCUBOOT_TARGET}.c + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/pmu_param.c +) + +if (DEFINED CONFIG_ESP_CONSOLE_UART_CUSTOM) + list(APPEND hal_srcs + ${src_dir}/${MCUBOOT_TARGET}/console_uart_custom.c + ) +endif() + +list(APPEND LINKER_SCRIPTS + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld +) + +set_source_files_properties( + ${esp_hal_dir}/components/bootloader_support/src/esp_image_format.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c + ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${MCUBOOT_TARGET}.c + ${esp_hal_dir}/components/hal/mmu_hal.c + ${esp_hal_dir}/components/hal/cache_hal.c + PROPERTIES COMPILE_FLAGS + "-Wno-logical-op") diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32h2/sdkconfig.h b/bootloader/mcuboot/boot/espressif/hal/include/esp32h2/sdkconfig.h new file mode 100644 index 0000000..84cbc5b --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32h2/sdkconfig.h @@ -0,0 +1,31 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define BOOTLOADER_BUILD 1 +#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0010 +#define CONFIG_IDF_TARGET_ESP32H2 1 +#define CONFIG_ESP32H2_REV_MIN_0 1 +#define CONFIG_ESP32H2_REV_MIN_FULL 0 +#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32H2_REV_MIN_FULL +#define CONFIG_ESP32H2_REV_MIN 0 +#define CONFIG_ESP32H2_REV_MAX_FULL 99 +#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32H2_REV_MAX_FULL +#define CONFIG_IDF_TARGET_ARCH_RISCV 1 +#define CONFIG_MMU_PAGE_SIZE 0x10000 +#define SOC_MMU_PAGE_SIZE CONFIG_MMU_PAGE_SIZE /* from soc/CMakeLists */ +#define CONFIG_XTAL_FREQ_32 1 +#define CONFIG_XTAL_FREQ 32 +#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 +#define CONFIG_MCUBOOT 1 +#define NDEBUG 1 +#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000 +#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200 +#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0000 +#define CONFIG_PARTITION_TABLE_OFFSET 0x10000 +#define CONFIG_EFUSE_VIRTUAL_OFFSET 0x250000 +#define CONFIG_EFUSE_VIRTUAL_SIZE 0x2000 +#define CONFIG_EFUSE_MAX_BLK_LEN 256 +#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1 diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32s2/esp32s2.cmake b/bootloader/mcuboot/boot/espressif/hal/include/esp32s2/esp32s2.cmake new file mode 100644 index 0000000..4f78e42 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32s2/esp32s2.cmake @@ -0,0 +1,22 @@ +# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +list(APPEND hal_srcs + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_init.c + ${esp_hal_dir}/components/hal/cache_hal.c + ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_crc.c + ${esp_hal_dir}/components/esp_rom/patches/esp_rom_regi2c_esp32s2.c + + ) + +list(APPEND LINKER_SCRIPTS + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib-funcs.ld + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.spiflash.ld + ) + +set_source_files_properties( + ${esp_hal_dir}/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c + PROPERTIES COMPILE_FLAGS + "-Wno-unused-but-set-variable") diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32s2/sdkconfig.h b/bootloader/mcuboot/boot/espressif/hal/include/esp32s2/sdkconfig.h new file mode 100644 index 0000000..d041f96 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32s2/sdkconfig.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define BOOTLOADER_BUILD 1 +#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0002 +#define CONFIG_IDF_TARGET_ESP32S2 1 +#define CONFIG_ESP32S2_REV_MIN_0 1 +#define CONFIG_ESP32S2_REV_MIN_FULL 0 +#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32S2_REV_MIN_FULL +#define CONFIG_ESP32S2_REV_MIN 0 +#define CONFIG_ESP32S2_REV_MAX_FULL 99 +#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32S2_REV_MAX_FULL +#define CONFIG_MMU_PAGE_SIZE 0x10000 +#define CONFIG_XTAL_FREQ 40 +#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 +#define CONFIG_ESP32S2_XTAL_FREQ 40 +#define CONFIG_MCUBOOT 1 +#define NDEBUG 1 +#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000 +#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200 +#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x1000 +#define CONFIG_PARTITION_TABLE_OFFSET 0x10000 +#define CONFIG_EFUSE_VIRTUAL_OFFSET 0x250000 +#define CONFIG_EFUSE_VIRTUAL_SIZE 0x2000 +#define CONFIG_EFUSE_MAX_BLK_LEN 256 +#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1 diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32s3/esp32s3.cmake b/bootloader/mcuboot/boot/espressif/hal/include/esp32s3/esp32s3.cmake new file mode 100644 index 0000000..b894c07 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32s3/esp32s3.cmake @@ -0,0 +1,25 @@ +# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +list(APPEND hal_srcs + ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/rtc_init.c + ${esp_hal_dir}/components/hal/cache_hal.c + ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c +) + +if (DEFINED CONFIG_ESP_MULTI_PROCESSOR_BOOT) + list(APPEND hal_srcs + ${src_dir}/${MCUBOOT_TARGET}/app_cpu_start.c + ${esp_hal_dir}/components/esp_hw_support/cpu.c + ) +endif() + +list(APPEND LINKER_SCRIPTS + -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld + ) + +set_source_files_properties( + ${esp_hal_dir}/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c + PROPERTIES COMPILE_FLAGS + "-Wno-unused-variable -Wno-unused-but-set-variable") diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp32s3/sdkconfig.h b/bootloader/mcuboot/boot/espressif/hal/include/esp32s3/sdkconfig.h new file mode 100644 index 0000000..25581c8 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp32s3/sdkconfig.h @@ -0,0 +1,27 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define BOOTLOADER_BUILD 1 +#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0009 +#define CONFIG_IDF_TARGET_ESP32S3 1 +#define CONFIG_ESP32S3_REV_MIN_0 1 +#define CONFIG_ESP32S3_REV_MIN_FULL 0 +#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32S3_REV_MIN_FULL +#define CONFIG_ESP32S3_REV_MIN 0 +#define CONFIG_ESP32S3_REV_MAX_FULL 99 +#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32S3_REV_MAX_FULL +#define CONFIG_MMU_PAGE_SIZE 0x10000 +#define CONFIG_XTAL_FREQ 40 +#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 +#define CONFIG_MCUBOOT 1 +#define NDEBUG 1 +#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000 +#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200 +#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0000 +#define CONFIG_PARTITION_TABLE_OFFSET 0x10000 +#define CONFIG_EFUSE_VIRTUAL_OFFSET 0x250000 +#define CONFIG_EFUSE_VIRTUAL_SIZE 0x2000 +#define CONFIG_EFUSE_MAX_BLK_LEN 256 diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp_log.h b/bootloader/mcuboot/boot/espressif/hal/include/esp_log.h new file mode 100644 index 0000000..ad6270d --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp_log.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once +#include +#include + +/* Log levels from IDF are similar to MCUboot's */ + +#ifndef CONFIG_BOOTLOADER_LOG_LEVEL +#define CONFIG_BOOTLOADER_LOG_LEVEL MCUBOOT_LOG_LEVEL +#endif + +#define ESP_LOGE(tag, fmt, ...) MCUBOOT_LOG_ERR("[%s] " fmt, tag, ##__VA_ARGS__) +#define ESP_LOGW(tag, fmt, ...) MCUBOOT_LOG_WRN("[%s] " fmt, tag, ##__VA_ARGS__) +#define ESP_LOGI(tag, fmt, ...) MCUBOOT_LOG_INF("[%s] " fmt, tag, ##__VA_ARGS__) +#define ESP_LOGD(tag, fmt, ...) MCUBOOT_LOG_DBG("[%s] " fmt, tag, ##__VA_ARGS__) +#define ESP_LOGV(tag, fmt, ...) MCUBOOT_LOG_DBG("[%s] " fmt, tag, ##__VA_ARGS__) + +#define ESP_EARLY_LOGE(tag, fmt, ...) MCUBOOT_LOG_ERR("[%s] " fmt, tag, ##__VA_ARGS__) +#define ESP_EARLY_LOGW(tag, fmt, ...) MCUBOOT_LOG_WRN("[%s] " fmt, tag, ##__VA_ARGS__) +#define ESP_EARLY_LOGI(tag, fmt, ...) MCUBOOT_LOG_INF("[%s] " fmt, tag, ##__VA_ARGS__) +#define ESP_EARLY_LOGD(tag, fmt, ...) MCUBOOT_LOG_DBG("[%s] " fmt, tag, ##__VA_ARGS__) +#define ESP_EARLY_LOGV(tag, fmt, ...) MCUBOOT_LOG_DBG("[%s] " fmt, tag, ##__VA_ARGS__) + +uint32_t esp_log_early_timestamp(void); diff --git a/bootloader/mcuboot/boot/espressif/hal/include/esp_mcuboot_image.h b/bootloader/mcuboot/boot/espressif/hal/include/esp_mcuboot_image.h new file mode 100644 index 0000000..baccf08 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/esp_mcuboot_image.h @@ -0,0 +1,26 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +/* Magic is derived from sha256sum of the string "espmcuboot" + * The application header magic must match this number + */ +#define ESP_LOAD_HEADER_MAGIC 0xace637d3 + +/* Load header that should be a part of application image + * for MCUboot-Espressif port booting. + */ +typedef struct esp_image_load_header { + uint32_t header_magic; /* Magic for load header */ + uint32_t entry_addr; /* Application entry address */ + uint32_t iram_dest_addr; /* Destination address(VMA) for IRAM region */ + uint32_t iram_flash_offset; /* Flash offset(LMA) for start of IRAM region */ + uint32_t iram_size; /* Size of IRAM region */ + uint32_t dram_dest_addr; /* Destination address(VMA) for DRAM region */ + uint32_t dram_flash_offset; /* Flash offset(LMA) for start of DRAM region */ + uint32_t dram_size; /* Size of DRAM region */ +} esp_image_load_header_t; diff --git a/bootloader/mcuboot/boot/espressif/hal/include/mcuboot_config/mcuboot_assert.h b/bootloader/mcuboot/boot/espressif/hal/include/mcuboot_config/mcuboot_assert.h new file mode 100644 index 0000000..fc59909 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/mcuboot_config/mcuboot_assert.h @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +extern void mcuboot_assert_handler(const char *file, int line, const char *func); + +#ifdef assert +#undef assert +#endif +#define assert(arg) \ + do { \ + if (!(arg)) { \ + mcuboot_assert_handler(__FILE__, __LINE__, __func__); \ + } \ + } while(0) diff --git a/bootloader/mcuboot/boot/espressif/hal/include/mcuboot_config/mcuboot_config.h b/bootloader/mcuboot/boot/espressif/hal/include/mcuboot_config/mcuboot_config.h new file mode 100644 index 0000000..a7058e7 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/mcuboot_config/mcuboot_config.h @@ -0,0 +1,193 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __MCUBOOT_CONFIG_H__ +#define __MCUBOOT_CONFIG_H__ + +/* + * Signature types + * + * You must choose exactly one signature type - check bootloader.conf + * configuration file + */ + +/* Uncomment for RSA signature support */ +#if defined(CONFIG_ESP_SIGN_RSA) +#define MCUBOOT_SIGN_RSA +# if (CONFIG_ESP_SIGN_RSA_LEN != 2048 && \ + CONFIG_ESP_SIGN_RSA_LEN != 3072) +# error "Invalid RSA key size (must be 2048 or 3072)" +# else +# define MCUBOOT_SIGN_RSA_LEN CONFIG_ESP_SIGN_RSA_LEN +# endif +#elif defined(CONFIG_ESP_SIGN_EC256) +#define MCUBOOT_SIGN_EC256 +#elif defined(CONFIG_ESP_SIGN_ED25519) +#define MCUBOOT_SIGN_ED25519 +#endif + +#if defined(CONFIG_SECURE_FLASH_ENC_ENABLED) +#define MCUBOOT_BOOT_MAX_ALIGN 32 +#endif + +/* + * Upgrade mode + * + * The default is to support A/B image swapping with rollback. Other modes + * with simpler code path, which only supports overwriting the existing image + * with the update image or running the newest image directly from its flash + * partition, are also available. + * + * You can enable only one mode at a time from the list below to override + * the default upgrade mode. + */ + +/* Uncomment to enable the overwrite-only code path. */ +/* #define MCUBOOT_OVERWRITE_ONLY */ + +#ifdef MCUBOOT_OVERWRITE_ONLY +/* Uncomment to only erase and overwrite those primary slot sectors needed + * to install the new image, rather than the entire image slot. */ +/* #define MCUBOOT_OVERWRITE_ONLY_FAST */ +#endif + +/* Uncomment to enable the direct-xip code path. */ +/* #define MCUBOOT_DIRECT_XIP */ + +/* Uncomment to enable the ram-load code path. */ +/* #define MCUBOOT_RAM_LOAD */ + +/* + * Cryptographic settings + * + * You must choose between Mbed TLS and Tinycrypt as source of + * cryptographic primitives. Other cryptographic settings are also + * available. + */ + +/* Uncomment to use Mbed TLS cryptographic primitives */ +#if defined(CONFIG_ESP_USE_MBEDTLS) +#define MCUBOOT_USE_MBED_TLS +#else +/* MCUboot requires the definition of a crypto lib, + * using Tinycrypt as default */ +#define MCUBOOT_USE_TINYCRYPT +#endif + +/* + * Always check the signature of the image in the primary slot before booting, + * even if no upgrade was performed. This is recommended if the boot + * time penalty is acceptable. + */ +#define MCUBOOT_VALIDATE_PRIMARY_SLOT + +#ifdef CONFIG_ESP_DOWNGRADE_PREVENTION +#define MCUBOOT_DOWNGRADE_PREVENTION 1 +/* MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER is used later as bool value so it is + * always defined, (unlike MCUBOOT_DOWNGRADE_PREVENTION which is only used in + * preprocessor condition and my be not defined) */ +# ifdef CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER +# define MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER 1 +# else +# define MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER 0 +# endif +#endif + +/* + * Flash abstraction + */ + +/* Uncomment if your flash map API supports flash_area_get_sectors(). + * See the flash APIs for more details. */ +#define MCUBOOT_USE_FLASH_AREA_GET_SECTORS + +/* Default maximum number of flash sectors per image slot; change + * as desirable. */ +#define MCUBOOT_MAX_IMG_SECTORS 512 + +/* Default number of separately updateable images; change in case of + * multiple images. */ +#if defined(CONFIG_ESP_IMAGE_NUMBER) +#define MCUBOOT_IMAGE_NUMBER CONFIG_ESP_IMAGE_NUMBER +#else +#define MCUBOOT_IMAGE_NUMBER 1 +#endif + +/* + * Logging + */ + +/* + * If logging is enabled the following functions must be defined by the + * platform: + * + * MCUBOOT_LOG_MODULE_REGISTER(domain) + * Register a new log module and add the current C file to it. + * + * MCUBOOT_LOG_MODULE_DECLARE(domain) + * Add the current C file to an existing log module. + * + * MCUBOOT_LOG_ERR(...) + * MCUBOOT_LOG_WRN(...) + * MCUBOOT_LOG_INF(...) + * MCUBOOT_LOG_DBG(...) + * + * The function priority is: + * + * MCUBOOT_LOG_ERR > MCUBOOT_LOG_WRN > MCUBOOT_LOG_INF > MCUBOOT_LOG_DBG + */ +#define MCUBOOT_HAVE_LOGGING 1 +/* #define MCUBOOT_LOG_LEVEL MCUBOOT_LOG_LEVEL_INFO */ + +/* + * Assertions + */ + +/* Uncomment if your platform has its own mcuboot_config/mcuboot_assert.h. + * If so, it must provide an ASSERT macro for use by bootutil. Otherwise, + * "assert" is used. */ +#define MCUBOOT_HAVE_ASSERT_H 1 + +#ifdef CONFIG_ESP_MCUBOOT_SERIAL +#define CONFIG_MCUBOOT_SERIAL +#endif + +/* + * When a serial recovery process is receiving the image data, this option + * enables it to erase flash progressively (by sectors) instead of the + * default behavior that is erasing whole image size of flash area after + * receiving first frame. + * Enabling this options prevents stalling the beginning of transfer + * for the time needed to erase large chunk of flash. + */ +#ifdef CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY +#define MCUBOOT_ERASE_PROGRESSIVELY +#endif + +/* Serial extensions are not implemented + */ +#define MCUBOOT_PERUSER_MGMT_GROUP_ENABLED 0 + +/* + * Watchdog feeding + */ + +/* This macro might be implemented if the OS / HW watchdog is enabled while + * doing a swap upgrade and the time it takes for a swapping is long enough + * to cause an unwanted reset. If implementing this, the OS main.c must also + * enable the watchdog (if required)! + */ +#include + #define MCUBOOT_WATCHDOG_FEED() \ + do { \ + bootloader_wdt_feed(); \ + } while (0) + +#define MCUBOOT_CPU_IDLE() \ + do { \ + } while (0) + +#endif /* __MCUBOOT_CONFIG_H__ */ diff --git a/bootloader/mcuboot/boot/espressif/hal/include/mcuboot_config/mcuboot_logging.h b/bootloader/mcuboot/boot/espressif/hal/include/mcuboot_config/mcuboot_logging.h new file mode 100644 index 0000000..d619772 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/mcuboot_config/mcuboot_logging.h @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include "sdkconfig.h" +#include "mcuboot_config.h" + +extern int ets_printf(const char *fmt, ...); + +#define MCUBOOT_LOG_LEVEL_OFF 0 +#define MCUBOOT_LOG_LEVEL_ERROR 1 +#define MCUBOOT_LOG_LEVEL_WARNING 2 +#define MCUBOOT_LOG_LEVEL_INFO 3 +#define MCUBOOT_LOG_LEVEL_DEBUG 4 + +#if CONFIG_IDF_TARGET_ESP32 +#define TARGET "[esp32]" +#elif CONFIG_IDF_TARGET_ESP32S2 +#define TARGET "[esp32s2]" +#elif CONFIG_IDF_TARGET_ESP32S3 +#define TARGET "[esp32s3]" +#elif CONFIG_IDF_TARGET_ESP32C3 +#define TARGET "[esp32c3]" +#elif CONFIG_IDF_TARGET_ESP32C6 +#define TARGET "[esp32c6]" +#elif CONFIG_IDF_TARGET_ESP32C2 +#define TARGET "[esp32c2]" +#elif CONFIG_IDF_TARGET_ESP32H2 +#define TARGET "[esp32h2]" +#else +#error "Selected target not supported." +#endif + +#ifndef MCUBOOT_LOG_LEVEL +#define MCUBOOT_LOG_LEVEL MCUBOOT_LOG_LEVEL_INFO +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_ERROR +#define MCUBOOT_LOG_ERR(_fmt, ...) \ + do { \ + ets_printf(TARGET " [ERR] " _fmt "\n\r", ##__VA_ARGS__); \ + } while (0) +#else +#define MCUBOOT_LOG_ERR(_fmt, ...) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_WARNING +#define MCUBOOT_LOG_WRN(_fmt, ...) \ + do { \ + ets_printf(TARGET " [WRN] " _fmt "\n\r", ##__VA_ARGS__); \ + } while (0) +#else +#define MCUBOOT_LOG_WRN(_fmt, ...) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_INFO +#define MCUBOOT_LOG_INF(_fmt, ...) \ + do { \ + ets_printf(TARGET " [INF] " _fmt "\n\r", ##__VA_ARGS__); \ + } while (0) +#else +#define MCUBOOT_LOG_INF(_fmt, ...) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_DEBUG +#define MCUBOOT_LOG_DBG(_fmt, ...) \ + do { \ + ets_printf(TARGET " [DBG] " _fmt "\n\r", ##__VA_ARGS__); \ + } while (0) +#else +#define MCUBOOT_LOG_DBG(_fmt, ...) +#endif + +#define MCUBOOT_LOG_MODULE_DECLARE(...) +#define MCUBOOT_LOG_MODULE_REGISTER(...) diff --git a/bootloader/mcuboot/boot/espressif/hal/include/soc_log.h b/bootloader/mcuboot/boot/espressif/hal/include/soc_log.h new file mode 100644 index 0000000..3e8f231 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/include/soc_log.h @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include +#include + +#define SOC_LOGE(tag, fmt, ...) MCUBOOT_LOG_ERR("[%s] " fmt, tag, ##__VA_ARGS__) +#define SOC_LOGW(tag, fmt, ...) MCUBOOT_LOG_WRN("[%s] " fmt, tag, ##__VA_ARGS__) +#define SOC_LOGI(tag, fmt, ...) MCUBOOT_LOG_INF("[%s] " fmt, tag, ##__VA_ARGS__) +#define SOC_LOGD(tag, fmt, ...) MCUBOOT_LOG_DBG("[%s] " fmt, tag, ##__VA_ARGS__) diff --git a/bootloader/mcuboot/boot/espressif/hal/src/bootloader_banner.c b/bootloader/mcuboot/boot/espressif/hal/src/bootloader_banner.c new file mode 100644 index 0000000..8e7d7fc --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/src/bootloader_banner.c @@ -0,0 +1,15 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/** + * Override the bootloader's print banner function from IDF. + */ +void __wrap_bootloader_print_banner(void) +{ + MCUBOOT_LOG_INF("*** Booting MCUboot build %s ***", MCUBOOT_VER); +} diff --git a/bootloader/mcuboot/boot/espressif/hal/src/bootloader_wdt.c b/bootloader/mcuboot/boot/espressif/hal/src/bootloader_wdt.c new file mode 100644 index 0000000..b9bcc6e --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/src/bootloader_wdt.c @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include "soc/rtc.h" + +void bootloader_wdt_feed(void) +{ + wdt_hal_context_t rtc_wdt_ctx = RWDT_HAL_CONTEXT_DEFAULT(); + wdt_hal_write_protect_disable(&rtc_wdt_ctx); + wdt_hal_feed(&rtc_wdt_ctx); + wdt_hal_write_protect_enable(&rtc_wdt_ctx); +} diff --git a/bootloader/mcuboot/boot/espressif/hal/src/esp32/app_cpu_start.c b/bootloader/mcuboot/boot/espressif/hal/src/esp32/app_cpu_start.c new file mode 100644 index 0000000..c465f7d --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/src/esp32/app_cpu_start.c @@ -0,0 +1,38 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "app_cpu_start.h" + +#include "soc/dport_reg.h" +#include "soc/gpio_periph.h" +#include "soc/rtc_periph.h" +#include "soc/rtc_cntl_reg.h" +#include "esp32/rom/cache.h" +#include "esp32/rom/uart.h" +#include "esp_cpu.h" +#include "esp_log.h" + +static const char *TAG = "app_cpu_start"; + +void appcpu_start(uint32_t entry_addr) +{ + ESP_LOGI(TAG, "Starting APPCPU"); + + Cache_Flush(1); + Cache_Read_Enable(1); + + esp_cpu_unstall(1); + + DPORT_SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN); + DPORT_CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_C_REG, DPORT_APPCPU_RUNSTALL); + DPORT_SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING); + DPORT_CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING); + + ets_set_appcpu_boot_addr(entry_addr); + ets_delay_us(10000); + uart_tx_wait_idle(0); + ESP_LOGI(TAG, "APPCPU start sequence complete"); +} diff --git a/bootloader/mcuboot/boot/espressif/hal/src/esp32/console_uart_custom.c b/bootloader/mcuboot/boot/espressif/hal/src/esp32/console_uart_custom.c new file mode 100644 index 0000000..f004be9 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/src/esp32/console_uart_custom.c @@ -0,0 +1,24 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +#if CONFIG_ESP_CONSOLE_UART_CUSTOM +static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ? + &UART0 : + (CONFIG_ESP_CONSOLE_UART_NUM == 1) ? + &UART1 : + &UART2; + +void IRAM_ATTR esp_rom_uart_putc(char c) +{ + while (uart_ll_get_txfifo_len(alt_console_uart_dev) == 0); + uart_ll_write_txfifo(alt_console_uart_dev, (const uint8_t *) &c, 1); +} +#endif + diff --git a/bootloader/mcuboot/boot/espressif/hal/src/esp32c2/console_uart_custom.c b/bootloader/mcuboot/boot/espressif/hal/src/esp32c2/console_uart_custom.c new file mode 100644 index 0000000..e006709 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/src/esp32c2/console_uart_custom.c @@ -0,0 +1,21 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +#if CONFIG_ESP_CONSOLE_UART_CUSTOM +static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ? + &UART0 : + &UART1; + +void IRAM_ATTR esp_rom_uart_putc(char c) +{ + while (uart_ll_get_txfifo_len(alt_console_uart_dev) == 0); + uart_ll_write_txfifo(alt_console_uart_dev, (const uint8_t *) &c, 1); +} +#endif diff --git a/bootloader/mcuboot/boot/espressif/hal/src/esp32c3/console_uart_custom.c b/bootloader/mcuboot/boot/espressif/hal/src/esp32c3/console_uart_custom.c new file mode 100644 index 0000000..214c60f --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/src/esp32c3/console_uart_custom.c @@ -0,0 +1,22 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +#if CONFIG_ESP_CONSOLE_UART_CUSTOM +static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ? + &UART0 : + &UART1; + +void IRAM_ATTR esp_rom_uart_putc(char c) +{ + while (uart_ll_get_txfifo_len(alt_console_uart_dev) == 0); + uart_ll_write_txfifo(alt_console_uart_dev, (const uint8_t *) &c, 1); +} +#endif + diff --git a/bootloader/mcuboot/boot/espressif/hal/src/esp32c6/console_uart_custom.c b/bootloader/mcuboot/boot/espressif/hal/src/esp32c6/console_uart_custom.c new file mode 100644 index 0000000..da5c1ab --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/src/esp32c6/console_uart_custom.c @@ -0,0 +1,23 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +#if CONFIG_ESP_CONSOLE_UART_CUSTOM +static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ? + &UART0 : + &UART1; + +void IRAM_ATTR esp_rom_uart_putc(char c) +{ + while (uart_ll_get_txfifo_len(alt_console_uart_dev) == 0); + uart_ll_write_txfifo(alt_console_uart_dev, (const uint8_t *) &c, 1); +} +#endif + diff --git a/bootloader/mcuboot/boot/espressif/hal/src/esp32h2/console_uart_custom.c b/bootloader/mcuboot/boot/espressif/hal/src/esp32h2/console_uart_custom.c new file mode 100644 index 0000000..ee80d6b --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/src/esp32h2/console_uart_custom.c @@ -0,0 +1,22 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +#if CONFIG_ESP_CONSOLE_UART_CUSTOM +static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ? + &UART0 : + &UART1; + +void IRAM_ATTR esp_rom_uart_putc(char c) +{ + while (uart_ll_get_txfifo_len(alt_console_uart_dev) == 0); + uart_ll_write_txfifo(alt_console_uart_dev, (const uint8_t *) &c, 1); +} +#endif diff --git a/bootloader/mcuboot/boot/espressif/hal/src/esp32s3/app_cpu_start.c b/bootloader/mcuboot/boot/espressif/hal/src/esp32s3/app_cpu_start.c new file mode 100644 index 0000000..2241457 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/src/esp32s3/app_cpu_start.c @@ -0,0 +1,42 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "app_cpu_start.h" + +#include "esp_rom_sys.h" +#include "soc/dport_reg.h" +#include "soc/gpio_periph.h" +#include "soc/rtc_periph.h" +#include "soc/rtc_cntl_reg.h" +#include "esp32s3/rom/cache.h" +#include "esp32s3/rom/uart.h" +#include "esp_cpu.h" +#include "esp_log.h" + +static const char *TAG = "app_cpu_start"; + +void appcpu_start(uint32_t entry_addr) +{ + ESP_LOGI(TAG, "Starting APPCPU"); + + esp_cpu_unstall(1); + + // Enable clock and reset APP CPU. Note that OpenOCD may have already + // enabled clock and taken APP CPU out of reset. In this case don't reset + // APP CPU again, as that will clear the breakpoints which may have already + // been set. + if (!REG_GET_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_CLKGATE_EN)) { + REG_SET_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_CLKGATE_EN); + REG_CLR_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_RUNSTALL); + REG_SET_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_RESETING); + REG_CLR_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_RESETING); + } + + ets_set_appcpu_boot_addr(entry_addr); + esp_rom_delay_us(10000); + uart_tx_wait_idle(0); + ESP_LOGI(TAG, "APPCPU start sequence complete"); +} diff --git a/bootloader/mcuboot/boot/espressif/hal/src/flash_encrypt.c b/bootloader/mcuboot/boot/espressif/hal/src/flash_encrypt.c new file mode 100644 index 0000000..d064d8b --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/src/flash_encrypt.c @@ -0,0 +1,482 @@ +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "bootloader_flash_priv.h" +#include "bootloader_random.h" +#include "esp_image_format.h" +#include "esp_flash_encrypt.h" +#include "esp_flash_partitions.h" +#include "esp_secure_boot.h" +#include "esp_efuse.h" +#include "esp_efuse_table.h" +#include "esp_log.h" +#include "hal/wdt_hal.h" +#include "hal/efuse_hal.h" +#include "soc/soc_caps.h" +#ifdef CONFIG_SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK +#include "soc/sensitive_reg.h" +#endif + +#include "esp_mcuboot_image.h" + +#if CONFIG_IDF_TARGET_ESP32 +#define CRYPT_CNT ESP_EFUSE_FLASH_CRYPT_CNT +#define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT +#else +#define CRYPT_CNT ESP_EFUSE_SPI_BOOT_CRYPT_CNT +#define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT +#endif + +#define FLASH_ENC_CNT_MAX (CRYPT_CNT[0]->bit_count) + +/* This file implements FLASH ENCRYPTION related APIs to perform + * various operations such as programming necessary flash encryption + * eFuses, detect whether flash encryption is enabled (by reading eFuse) + * and if required encrypt the partitions in flash memory + */ + +static const char *TAG = "flash_encrypt"; + +/* Static functions for stages of flash encryption */ +static esp_err_t encrypt_bootloader(void); +static esp_err_t encrypt_primary_slot(void); +static size_t get_flash_encrypt_cnt_value(void); + +/** + * This former inlined function must not be defined in the header file anymore. + * As it depends on efuse component, any use of it outside of `bootloader_support`, + * would require the caller component to include `efuse` as part of its `REQUIRES` or + * `PRIV_REQUIRES` entries. + * Attribute IRAM_ATTR must be specified for the app build. + */ +bool IRAM_ATTR esp_flash_encryption_enabled(void) +{ +#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH + return efuse_hal_flash_encryption_enabled(); +#else + uint32_t flash_crypt_cnt = 0; +#if CONFIG_IDF_TARGET_ESP32 + esp_efuse_read_field_blob(ESP_EFUSE_FLASH_CRYPT_CNT, &flash_crypt_cnt, ESP_EFUSE_FLASH_CRYPT_CNT[0]->bit_count); +#else + esp_efuse_read_field_blob(ESP_EFUSE_SPI_BOOT_CRYPT_CNT, &flash_crypt_cnt, ESP_EFUSE_SPI_BOOT_CRYPT_CNT[0]->bit_count); +#endif + /* __builtin_parity is in flash, so we calculate parity inline */ + bool enabled = false; + while (flash_crypt_cnt) { + if (flash_crypt_cnt & 1) { + enabled = !enabled; + } + flash_crypt_cnt >>= 1; + } + return enabled; +#endif // CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH +} + +static size_t get_flash_encrypt_cnt_value(void) +{ + size_t flash_crypt_cnt = 0; + esp_efuse_read_field_cnt(CRYPT_CNT, &flash_crypt_cnt); + return flash_crypt_cnt; +} + +bool esp_flash_encrypt_initialized_once(void) +{ + return get_flash_encrypt_cnt_value() != 0; +} + +bool esp_flash_encrypt_is_write_protected(bool print_error) +{ + if (esp_efuse_read_field_bit(WR_DIS_CRYPT_CNT)) { + if (print_error) { + ESP_LOGE(TAG, "Flash Encryption cannot be enabled (CRYPT_CNT (%d) is write protected)", get_flash_encrypt_cnt_value()); + } + return true; + } + return false; +} + +bool esp_flash_encrypt_state(void) +{ + size_t flash_crypt_cnt = get_flash_encrypt_cnt_value(); + bool flash_crypt_wr_dis = esp_flash_encrypt_is_write_protected(false); + + ESP_LOGV(TAG, "CRYPT_CNT %d, write protection %d", flash_crypt_cnt, flash_crypt_wr_dis); + + if (flash_crypt_cnt % 2 == 1) { + /* Flash is already encrypted */ + int left = (FLASH_ENC_CNT_MAX - flash_crypt_cnt) / 2; + if (flash_crypt_wr_dis) { + left = 0; /* can't update FLASH_CRYPT_CNT, no more flashes */ + } + ESP_LOGI(TAG, "flash encryption is enabled (%d plaintext flashes left)", left); + return true; + } + return false; +} + +esp_err_t esp_flash_encrypt_check_and_update(void) +{ + bool flash_encryption_enabled = esp_flash_encrypt_state(); + if (!flash_encryption_enabled) { +#ifndef CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED + if (esp_flash_encrypt_is_write_protected(true)) { + return ESP_FAIL; + } + + esp_err_t err = esp_flash_encrypt_init(); + if (err != ESP_OK) { + ESP_LOGE(TAG, "Initialization of Flash encryption key failed (%d)", err); + return err; + } + + err = esp_flash_encrypt_contents(); + if (err != ESP_OK) { + ESP_LOGE(TAG, "Encryption flash contents failed (%d)", err); + return err; + } + + err = esp_flash_encrypt_enable(); + if (err != ESP_OK) { + ESP_LOGE(TAG, "Enabling of Flash encryption failed (%d)", err); + return err; + } +#else + ESP_LOGE(TAG, "flash encryption is not enabled, and SECURE_FLASH_REQUIRE_ALREADY_ENABLED " + "is set, refusing to boot."); + return ESP_ERR_INVALID_STATE; +#endif // CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED + } + return ESP_OK; +} + +static esp_err_t check_and_generate_encryption_keys(void) +{ + size_t key_size = 32; +#ifdef CONFIG_IDF_TARGET_ESP32 + enum { BLOCKS_NEEDED = 1 }; + esp_efuse_purpose_t purposes[BLOCKS_NEEDED] = { + ESP_EFUSE_KEY_PURPOSE_FLASH_ENCRYPTION, + }; + esp_efuse_coding_scheme_t coding_scheme = esp_efuse_get_coding_scheme(EFUSE_BLK_ENCRYPT_FLASH); + if (coding_scheme != EFUSE_CODING_SCHEME_NONE && coding_scheme != EFUSE_CODING_SCHEME_3_4) { + ESP_LOGE(TAG, "Unknown/unsupported CODING_SCHEME value 0x%x", coding_scheme); + return ESP_ERR_NOT_SUPPORTED; + } + if (coding_scheme == EFUSE_CODING_SCHEME_3_4) { + key_size = 24; + } +#else +#ifdef CONFIG_SECURE_FLASH_ENCRYPTION_AES256 + enum { BLOCKS_NEEDED = 2 }; + esp_efuse_purpose_t purposes[BLOCKS_NEEDED] = { + ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1, + ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2, + }; + if (esp_efuse_find_purpose(ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY, NULL)) { + ESP_LOGE(TAG, "XTS_AES_128_KEY is already in use, XTS_AES_256_KEY_1/2 can not be used"); + return ESP_ERR_INVALID_STATE; + } +#else +#ifdef CONFIG_SECURE_FLASH_ENCRYPTION_AES128_DERIVED + enum { BLOCKS_NEEDED = 1 }; + esp_efuse_purpose_t purposes[BLOCKS_NEEDED] = { + ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY_DERIVED_FROM_128_EFUSE_BITS, + }; + key_size = 16; +#else + enum { BLOCKS_NEEDED = 1 }; + esp_efuse_purpose_t purposes[BLOCKS_NEEDED] = { + ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY, + }; +#endif // CONFIG_SECURE_FLASH_ENCRYPTION_AES128_DERIVED +#endif // CONFIG_SECURE_FLASH_ENCRYPTION_AES256 +#endif // CONFIG_IDF_TARGET_ESP32 + + /* Initialize all efuse block entries to invalid (max) value */ + esp_efuse_block_t blocks[BLOCKS_NEEDED] = {[0 ... BLOCKS_NEEDED-1] = EFUSE_BLK_KEY_MAX}; + bool has_key = true; + for (unsigned i = 0; i < BLOCKS_NEEDED; i++) { + bool tmp_has_key = esp_efuse_find_purpose(purposes[i], &blocks[i]); + if (tmp_has_key) { // For ESP32: esp_efuse_find_purpose() always returns True, need to check whether the key block is used or not. + tmp_has_key &= !esp_efuse_key_block_unused(blocks[i]); + } + if (i == 1 && tmp_has_key != has_key) { + ESP_LOGE(TAG, "Invalid efuse key blocks: Both AES-256 key blocks must be set."); + return ESP_ERR_INVALID_STATE; + } + has_key &= tmp_has_key; + } + + if (!has_key) { + /* Generate key */ + uint8_t keys[BLOCKS_NEEDED][32] = { 0 }; + ESP_LOGI(TAG, "Generating new flash encryption key..."); + for (unsigned i = 0; i < BLOCKS_NEEDED; ++i) { + bootloader_fill_random(keys[i], key_size); + } + ESP_LOGD(TAG, "Key generation complete"); + + esp_err_t err = esp_efuse_write_keys(purposes, keys, BLOCKS_NEEDED); + if (err != ESP_OK) { + if (err == ESP_ERR_NOT_ENOUGH_UNUSED_KEY_BLOCKS) { + ESP_LOGE(TAG, "Not enough free efuse key blocks (need %d) to continue", BLOCKS_NEEDED); + } else { + ESP_LOGE(TAG, "Failed to write efuse block with purpose (err=0x%x). Can't continue.", err); + } + return err; + } + } else { + for (unsigned i = 0; i < BLOCKS_NEEDED; i++) { + if (!esp_efuse_get_key_dis_write(blocks[i]) + || !esp_efuse_get_key_dis_read(blocks[i]) + || !esp_efuse_get_keypurpose_dis_write(blocks[i])) { // For ESP32: no keypurpose, it returns always True. + ESP_LOGE(TAG, "Invalid key state, check read&write protection for key and keypurpose(if exists)"); + return ESP_ERR_INVALID_STATE; + } + } + ESP_LOGI(TAG, "Using pre-loaded flash encryption key in efuse"); + } + return ESP_OK; +} + +esp_err_t esp_flash_encrypt_init(void) +{ + if (esp_flash_encryption_enabled() || esp_flash_encrypt_initialized_once()) { + return ESP_OK; + } + + /* Very first flash encryption pass: generate keys, etc. */ + + esp_efuse_batch_write_begin(); /* Batch all efuse writes at the end of this function */ + + /* Before first flash encryption pass, need to initialise key & crypto config */ + esp_err_t err = check_and_generate_encryption_keys(); + if (err != ESP_OK) { + esp_efuse_batch_write_cancel(); + return err; + } + + err = esp_flash_encryption_enable_secure_features(); + if (err != ESP_OK) { + esp_efuse_batch_write_cancel(); + return err; + } + + err = esp_efuse_batch_write_commit(); + if (err != ESP_OK) { + ESP_LOGE(TAG, "Error programming security eFuses (err=0x%x).", err); + return err; + } + + return ESP_OK; +} + +/* Encrypt all flash data that should be encrypted */ +esp_err_t esp_flash_encrypt_contents(void) +{ + esp_err_t err; + +#ifdef CONFIG_SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK + REG_WRITE(SENSITIVE_XTS_AES_KEY_UPDATE_REG, 1); +#endif + + err = encrypt_bootloader(); + if (err != ESP_OK) { + return err; + } + + /* If the primary slot executable application is not encrypted, + * then encrypt it + */ + err = encrypt_primary_slot(); + if (err != ESP_OK) { + return err; + } + + /* Unconditionally encrypts remaining regions + * This will need changes when implementing multi-slot support + */ + ESP_LOGI(TAG, "Encrypting remaining flash..."); + uint32_t region_addr = CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS; + size_t region_size = CONFIG_ESP_APPLICATION_SIZE; + err = esp_flash_encrypt_region(region_addr, region_size); + if (err != ESP_OK) { + return err; + } + region_addr = CONFIG_ESP_SCRATCH_OFFSET; + region_size = CONFIG_ESP_SCRATCH_SIZE; + err = esp_flash_encrypt_region(region_addr, region_size); + if (err != ESP_OK) { + return err; + } + +#if defined(CONFIG_ESP_IMAGE_NUMBER) && (CONFIG_ESP_IMAGE_NUMBER == 2) + region_addr = CONFIG_ESP_IMAGE1_PRIMARY_START_ADDRESS; + region_size = CONFIG_ESP_APPLICATION_SIZE; + err = esp_flash_encrypt_region(region_addr, region_size); + if (err != ESP_OK) { + return err; + } + region_addr = CONFIG_ESP_IMAGE1_SECONDARY_START_ADDRESS; + region_size = CONFIG_ESP_APPLICATION_SIZE; + err = esp_flash_encrypt_region(region_addr, region_size); + if (err != ESP_OK) { + return err; + } +#endif + + ESP_LOGI(TAG, "Flash encryption completed"); + + return ESP_OK; +} + +esp_err_t esp_flash_encrypt_enable(void) +{ + esp_err_t err = ESP_OK; + if (!esp_flash_encryption_enabled()) { + + if (esp_flash_encrypt_is_write_protected(true)) { + return ESP_FAIL; + } + + size_t flash_crypt_cnt = get_flash_encrypt_cnt_value(); + +#ifdef CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE + // Go straight to max, permanently enabled + ESP_LOGI(TAG, "Setting CRYPT_CNT for permanent encryption"); + size_t new_flash_crypt_cnt = FLASH_ENC_CNT_MAX - flash_crypt_cnt; +#else + /* Set least significant 0-bit in flash_crypt_cnt */ + size_t new_flash_crypt_cnt = 1; +#endif + ESP_LOGD(TAG, "CRYPT_CNT %d -> %d", flash_crypt_cnt, new_flash_crypt_cnt); + err = esp_efuse_write_field_cnt(CRYPT_CNT, new_flash_crypt_cnt); + +#if defined(CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE) && defined(CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128_DERIVED) + // For AES128_DERIVED, FE key is 16 bytes and XTS_KEY_LENGTH_256 is 0. + // It is important to protect XTS_KEY_LENGTH_256 from further changing it to 1. Set write protection for this bit. + // Burning WR_DIS_CRYPT_CNT, blocks further changing of eFuses: DOWNLOAD_DIS_MANUAL_ENCRYPT, SPI_BOOT_CRYPT_CNT, [XTS_KEY_LENGTH_256], SECURE_BOOT_EN. + esp_efuse_write_field_bit(WR_DIS_CRYPT_CNT); +#endif + } + + ESP_LOGI(TAG, "Flash encryption completed"); + +#ifdef CONFIG_EFUSE_VIRTUAL + ESP_LOGW(TAG, "Flash encryption not really completed. Must disable virtual efuses"); +#endif + + return err; +} + +static esp_err_t encrypt_bootloader(void) +{ + esp_err_t err; + uint32_t image_length; + /* Check for plaintext bootloader (verification will fail if it's already encrypted) */ + if (esp_image_verify_bootloader(&image_length) == ESP_OK) { + ESP_LOGI(TAG, "Encrypting bootloader..."); + + err = esp_flash_encrypt_region(ESP_BOOTLOADER_OFFSET, CONFIG_ESP_BOOTLOADER_SIZE); + if (err != ESP_OK) { + ESP_LOGE(TAG, "Failed to encrypt bootloader in place: 0x%x", err); + return err; + } + ESP_LOGI(TAG, "Bootloader encrypted successfully"); + } else { + ESP_LOGW(TAG, "No valid bootloader was found"); + return ESP_ERR_NOT_FOUND; + } + + return ESP_OK; +} + +static esp_err_t verify_img_header(uint32_t addr, const esp_image_load_header_t *image, bool silent) +{ + esp_err_t err = ESP_OK; + + if (image->header_magic != ESP_LOAD_HEADER_MAGIC) { + if (!silent) { + ESP_LOGE(TAG, "image at 0x%x has invalid magic byte", + addr); + } + err = ESP_ERR_IMAGE_INVALID; + } + + return err; +} + +static esp_err_t encrypt_primary_slot(void) +{ + esp_err_t err; + + esp_image_load_header_t img_header; + + /* Check if the slot is plaintext or encrypted, 0x20 offset is for skipping + * MCUboot header + */ + err = bootloader_flash_read(CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS + 0x20, + &img_header, sizeof(esp_image_load_header_t), true); + if (err != ESP_OK) { + ESP_LOGE(TAG, "Failed to read slot img header"); + return err; + } else { + err = verify_img_header(CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS, + &img_header, true); + } + + if (err == ESP_OK) { + ESP_LOGI(TAG, "Encrypting primary slot..."); + + err = esp_flash_encrypt_region(CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS, + CONFIG_ESP_APPLICATION_SIZE); + if (err != ESP_OK) { + ESP_LOGE(TAG, "Failed to encrypt slot in place: 0x%x", err); + return err; + } + } else { + ESP_LOGW(TAG, "Slot already encrypted or no valid image was found"); + } + + return ESP_OK; +} + +esp_err_t esp_flash_encrypt_region(uint32_t src_addr, size_t data_length) +{ + esp_err_t err; + uint32_t buf[FLASH_SECTOR_SIZE / sizeof(uint32_t)]; + + if (src_addr % FLASH_SECTOR_SIZE != 0) { + ESP_LOGE(TAG, "esp_flash_encrypt_region bad src_addr 0x%x", src_addr); + return ESP_FAIL; + } + + wdt_hal_context_t rtc_wdt_ctx = RWDT_HAL_CONTEXT_DEFAULT(); + for (size_t i = 0; i < data_length; i += FLASH_SECTOR_SIZE) { + wdt_hal_write_protect_disable(&rtc_wdt_ctx); + wdt_hal_feed(&rtc_wdt_ctx); + wdt_hal_write_protect_enable(&rtc_wdt_ctx); + uint32_t sec_start = i + src_addr; + err = bootloader_flash_read(sec_start, buf, FLASH_SECTOR_SIZE, true); + if (err != ESP_OK) { + goto flash_failed; + } + err = bootloader_flash_erase_sector(sec_start / FLASH_SECTOR_SIZE); + if (err != ESP_OK) { + goto flash_failed; + } + err = bootloader_flash_write(sec_start, buf, FLASH_SECTOR_SIZE, true); + if (err != ESP_OK) { + goto flash_failed; + } + } + return ESP_OK; + +flash_failed: + ESP_LOGE(TAG, "flash operation failed: 0x%x", err); + return err; +} diff --git a/bootloader/mcuboot/boot/espressif/hal/src/secure_boot.c b/bootloader/mcuboot/boot/espressif/hal/src/secure_boot.c new file mode 100644 index 0000000..8ad29ae --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/hal/src/secure_boot.c @@ -0,0 +1,266 @@ +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "sdkconfig.h" +#include "esp_log.h" +#include "esp_secure_boot.h" +#include "bootloader_flash_priv.h" +#include "bootloader_sha.h" +#include "bootloader_utility.h" +#include "esp_image_format.h" +#include "esp_efuse.h" +#include "esp_efuse_table.h" +#include "secure_boot_signature_priv.h" + + +/* The following API implementations are used only when called + * from the bootloader code. + */ + +#ifdef CONFIG_SECURE_BOOT_V2_ENABLED + +#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1)) +static const char *TAG = "secure_boot_v2"; + +/* A signature block is valid when it has correct magic byte, crc and image digest. */ +static esp_err_t validate_signature_block(const ets_secure_boot_sig_block_t *block, int block_num, const uint8_t *image_digest) +{ + if (block->magic_byte != ETS_SECURE_BOOT_V2_SIGNATURE_MAGIC) { + // All signature blocks have been parsed, no new signature block present. + ESP_LOGD(TAG, "Signature block(%d) invalid/absent.", block_num); + return ESP_FAIL; + } + if (block->block_crc != esp_rom_crc32_le(0, (uint8_t *)block, CRC_SIGN_BLOCK_LEN)) { + ESP_LOGE(TAG, "Magic byte correct but incorrect crc."); + return ESP_FAIL; + } + if (memcmp(image_digest, block->image_digest, ESP_SECURE_BOOT_DIGEST_LEN)) { + ESP_LOGE(TAG, "Magic byte & CRC correct but incorrect image digest."); + return ESP_FAIL; + } else { + ESP_LOGD(TAG, "valid signature block(%d) found", block_num); + return ESP_OK; + } + return ESP_FAIL; +} + +/* Generates the public key digests of the valid public keys in an image's + signature block, verifies each signature, and stores the key digests in the + public_key_digests structure. + + @param flash_offset Image offset in flash + @param flash_size Image size in flash (not including signature block) + @param[out] public_key_digests Pointer to structure to hold the key digests for valid sig blocks + + + Note that this function doesn't read any eFuses, so it doesn't know if the + keys are ultimately trusted by the hardware or not + + @return - ESP_OK if no signatures failed to verify, or if no valid signature blocks are found at all. + - ESP_FAIL if there's a valid signature block that doesn't verify using the included public key (unexpected!) +*/ +static esp_err_t s_calculate_image_public_key_digests(uint32_t flash_offset, uint32_t flash_size, esp_image_sig_public_key_digests_t *public_key_digests) +{ + esp_err_t ret; + uint8_t image_digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0}; + uint8_t __attribute__((aligned(4))) key_digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0}; + size_t sig_block_addr = flash_offset + ALIGN_UP(flash_size, FLASH_SECTOR_SIZE); + + ESP_LOGD(TAG, "calculating public key digests for sig blocks of image offset 0x%x (sig block offset 0x%x)", flash_offset, sig_block_addr); + + bzero(public_key_digests, sizeof(esp_image_sig_public_key_digests_t)); + + ret = bootloader_sha256_flash_contents(flash_offset, sig_block_addr - flash_offset, image_digest); + if (ret != ESP_OK) { + ESP_LOGE(TAG, "error generating image digest, %d", ret); + return ret; + } + + ESP_LOGD(TAG, "reading signature(s)"); + const ets_secure_boot_signature_t *signatures = bootloader_mmap(sig_block_addr, sizeof(ets_secure_boot_signature_t)); + if (signatures == NULL) { + ESP_LOGE(TAG, "bootloader_mmap(0x%x, 0x%x) failed", sig_block_addr, sizeof(ets_secure_boot_signature_t)); + return ESP_FAIL; + } + + /* Validating Signature block */ + for (unsigned i = 0; i < SECURE_BOOT_NUM_BLOCKS; i++) { + const ets_secure_boot_sig_block_t *block = &signatures->block[i]; + + ret = validate_signature_block(block, i, image_digest); + if (ret != ESP_OK) { + ret = ESP_OK; // past the last valid signature block + break; + } + + /* Generating the SHA of the public key components in the signature block */ + bootloader_sha256_handle_t sig_block_sha; + sig_block_sha = bootloader_sha256_start(); +#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME + bootloader_sha256_data(sig_block_sha, &block->key, sizeof(block->key)); +#elif CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME + bootloader_sha256_data(sig_block_sha, &block->ecdsa.key, sizeof(block->ecdsa.key)); +#endif + bootloader_sha256_finish(sig_block_sha, key_digest); + + // Check we can verify the image using this signature and this key + uint8_t temp_verified_digest[ESP_SECURE_BOOT_DIGEST_LEN]; +#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME + bool verified = ets_rsa_pss_verify(&block->key, block->signature, image_digest, temp_verified_digest); +#elif CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME + bool verified = ets_ecdsa_verify(&block->ecdsa.key.point[0], block->ecdsa.signature, block->ecdsa.key.curve_id, image_digest, temp_verified_digest); +#endif + + if (!verified) { + /* We don't expect this: the signature blocks before we enable secure boot should all be verifiable or invalid, + so this is a fatal error + */ + ret = ESP_FAIL; + ESP_LOGE(TAG, "Secure boot key (%d) verification failed.", i); + break; + } + ESP_LOGD(TAG, "Signature block (%d) is verified", i); + /* Copy the key digest to the buffer provided by the caller */ + memcpy((void *)public_key_digests->key_digests[i], key_digest, ESP_SECURE_BOOT_DIGEST_LEN); + public_key_digests->num_digests++; + } + + if (ret == ESP_OK && public_key_digests->num_digests > 0) { + ESP_LOGI(TAG, "Digests successfully calculated, %d valid signatures (image offset 0x%x)", + public_key_digests->num_digests, flash_offset); + } + + bootloader_munmap(signatures); + return ret; +} + +esp_err_t check_and_generate_secure_boot_keys(void) +{ + esp_err_t ret; +#ifdef CONFIG_IDF_TARGET_ESP32 + esp_efuse_coding_scheme_t coding_scheme = esp_efuse_get_coding_scheme(EFUSE_BLK_SECURE_BOOT); + if (coding_scheme != EFUSE_CODING_SCHEME_NONE) { + ESP_LOGE(TAG, "No coding schemes are supported in secure boot v2.(Detected scheme: 0x%x)", coding_scheme); + return ESP_ERR_NOT_SUPPORTED; + } +#endif // CONFIG_IDF_TARGET_ESP32 + + esp_efuse_purpose_t secure_boot_key_purpose[SECURE_BOOT_NUM_BLOCKS] = { +#if SECURE_BOOT_NUM_BLOCKS == 1 + ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_V2, +#else + ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0, + ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1, + ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2, +#endif + }; + + /* Verify the bootloader */ + esp_image_metadata_t bootloader_data = { 0 }; + ret = esp_image_verify_bootloader_data(&bootloader_data); + if (ret != ESP_OK) { + ESP_LOGE(TAG, "bootloader image appears invalid! error %d", ret); + return ret; + } + + /* Initialize all efuse block entries to invalid (max) value */ + esp_efuse_block_t blocks[SECURE_BOOT_NUM_BLOCKS] = {[0 ... SECURE_BOOT_NUM_BLOCKS-1] = EFUSE_BLK_KEY_MAX}; + /* Check if secure boot digests are present */ + bool has_secure_boot_digest = false; + for (unsigned i = 0; i < SECURE_BOOT_NUM_BLOCKS; i++) { + bool tmp_has_key = esp_efuse_find_purpose(secure_boot_key_purpose[i], &blocks[i]); + if (tmp_has_key) { // For ESP32: esp_efuse_find_purpose() always returns True, need to check whether the key block is used or not. + tmp_has_key &= !esp_efuse_key_block_unused(blocks[i]); + } + has_secure_boot_digest |= tmp_has_key; + } + + esp_image_sig_public_key_digests_t boot_key_digests = {0}; + ESP_LOGI(TAG, "Secure boot digests %s", has_secure_boot_digest ? "already present":"absent, generating.."); + + if (!has_secure_boot_digest) { + /* Generate the bootloader public key digests */ + ret = s_calculate_image_public_key_digests(bootloader_data.start_addr, bootloader_data.image_len - SIG_BLOCK_PADDING, &boot_key_digests); + if (ret != ESP_OK) { + ESP_LOGE(TAG, "Bootloader signature block is invalid"); + return ret; + } + + if (boot_key_digests.num_digests == 0) { + ESP_LOGE(TAG, "No valid bootloader signature blocks found."); + return ESP_FAIL; + } + ESP_LOGI(TAG, "%d signature block(s) found appended to the bootloader.", boot_key_digests.num_digests); + + ESP_LOGI(TAG, "Burning public key hash to eFuse"); + ret = esp_efuse_write_keys(secure_boot_key_purpose, boot_key_digests.key_digests, boot_key_digests.num_digests); + if (ret != ESP_OK) { + if (ret == ESP_ERR_NOT_ENOUGH_UNUSED_KEY_BLOCKS) { + ESP_LOGE(TAG, "Bootloader signatures(%d) more than available key slots.", boot_key_digests.num_digests); + } else { + ESP_LOGE(TAG, "Failed to write efuse block with purpose (err=0x%x). Can't continue.", ret); + } + return ret; + } + } else { + for (unsigned i = 0; i < SECURE_BOOT_NUM_BLOCKS; i++) { + /* Check if corresponding digest slot is used or not */ + if (blocks[i] == EFUSE_BLK_KEY_MAX) { + ESP_LOGD(TAG, "SECURE_BOOT_DIGEST%d slot is not used", i); + continue; + } + +#if SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS + if (esp_efuse_get_digest_revoke(i)) { + continue; + } +#endif +#ifndef CONFIG_SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK + if (esp_efuse_get_key_dis_read(blocks[i])) { + ESP_LOGE(TAG, "Key digest (BLK%d) read protected, aborting...", blocks[i]); + return ESP_FAIL; + } +#endif + if (esp_efuse_block_is_empty(blocks[i])) { + ESP_LOGE(TAG, "%d eFuse block is empty, aborting...", blocks[i]); + return ESP_FAIL; + } + esp_efuse_set_key_dis_write(blocks[i]); +#ifdef CONFIG_SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK + size_t offset = 128; +#else + size_t offset = 0; +#endif + ret = esp_efuse_read_block(blocks[i], boot_key_digests.key_digests[boot_key_digests.num_digests], offset, + ESP_SECURE_BOOT_KEY_DIGEST_LEN * 8); + if (ret) { + ESP_LOGE(TAG, "Error during reading %d eFuse block (err=0x%x)", blocks[i], ret); + return ret; + } + boot_key_digests.num_digests++; + } + if (boot_key_digests.num_digests == 0) { + ESP_LOGE(TAG, "No valid pre-loaded public key digest in eFuse"); + return ESP_FAIL; + } + ESP_LOGW(TAG, "Using pre-loaded public key digest in eFuse"); + } + +#if SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS + /* Revoke the empty signature blocks */ + if (boot_key_digests.num_digests < SECURE_BOOT_NUM_BLOCKS) { + /* The revocation index can be 0, 1, 2. Bootloader count can be 1,2,3. */ + for (unsigned i = boot_key_digests.num_digests; i < SECURE_BOOT_NUM_BLOCKS; i++) { + ESP_LOGI(TAG, "Revoking empty key digest slot (%d)...", i); + esp_efuse_set_digest_revoke(i); + } + } +#endif // SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS + return ESP_OK; +} + +#endif // CONFIG_SECURE_BOOT_V2_ENABLED diff --git a/bootloader/mcuboot/boot/espressif/include/crypto_config/ec256.cmake b/bootloader/mcuboot/boot/espressif/include/crypto_config/ec256.cmake new file mode 100644 index 0000000..36e3e01 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/include/crypto_config/ec256.cmake @@ -0,0 +1,29 @@ +# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. +# +# SPDX-License-Identifier: Apache-2.0 + +set(MBEDTLS_ASN1_DIR "${MCUBOOT_ROOT_DIR}/ext/mbedtls-asn1") +set(CRYPTO_INC + ${MBEDTLS_ASN1_DIR}/include + ) +set(crypto_srcs + # Additionally pull in just the ASN.1 parser from Mbed TLS. + ${MBEDTLS_ASN1_DIR}/src/asn1parse.c + ${MBEDTLS_ASN1_DIR}/src/platform_util.c + ) + +if (DEFINED CONFIG_ESP_USE_MBEDTLS) + message(FATAL_ERROR "EC256 signature verification using Mbed TLS lib is not supported") +elseif (DEFINED CONFIG_ESP_USE_TINYCRYPT) + set(TINYCRYPT_DIR ${MCUBOOT_ROOT_DIR}/ext/tinycrypt/lib) + list(APPEND CRYPTO_INC + ${TINYCRYPT_DIR}/include + ) + list(APPEND crypto_srcs + ${ESPRESSIF_PORT_DIR}/keys.c + ${TINYCRYPT_DIR}/source/utils.c + ${TINYCRYPT_DIR}/source/sha256.c + ${TINYCRYPT_DIR}/source/ecc.c + ${TINYCRYPT_DIR}/source/ecc_dsa.c + ) +endif() \ No newline at end of file diff --git a/bootloader/mcuboot/boot/espressif/include/crypto_config/ed25519.cmake b/bootloader/mcuboot/boot/espressif/include/crypto_config/ed25519.cmake new file mode 100644 index 0000000..011aca6 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/include/crypto_config/ed25519.cmake @@ -0,0 +1,31 @@ +# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. +# +# SPDX-License-Identifier: Apache-2.0 + +set(MBEDTLS_ASN1_DIR "${MCUBOOT_ROOT_DIR}/ext/mbedtls-asn1") +set(CRYPTO_INC + ${MBEDTLS_ASN1_DIR}/include + ) +set(crypto_srcs + # Additionally pull in just the ASN.1 parser from Mbed TLS. + ${MBEDTLS_ASN1_DIR}/src/asn1parse.c + ${MBEDTLS_ASN1_DIR}/src/platform_util.c + ) + +if (DEFINED CONFIG_ESP_USE_MBEDTLS) + message(FATAL_ERROR "ED25519 image signing using Mbed TLS lib is not supported") +elseif (DEFINED CONFIG_ESP_USE_TINYCRYPT) + set(TINYCRYPT_DIR ${MCUBOOT_ROOT_DIR}/ext/tinycrypt/lib) + set(TINYCRYPT512_DIR ${MCUBOOT_ROOT_DIR}/ext/tinycrypt-sha512/lib) + list(APPEND CRYPTO_INC + ${TINYCRYPT_DIR}/include + ${TINYCRYPT512_DIR}/include + ) + list(APPEND crypto_srcs + ${ESPRESSIF_PORT_DIR}/keys.c + ${TINYCRYPT_DIR}/source/utils.c + ${TINYCRYPT_DIR}/source/sha256.c + ${TINYCRYPT512_DIR}/source/sha512.c + ${MCUBOOT_ROOT_DIR}/ext/fiat/src/curve25519.c + ) +endif() \ No newline at end of file diff --git a/bootloader/mcuboot/boot/espressif/include/crypto_config/mbedtls_custom_config.h b/bootloader/mcuboot/boot/espressif/include/crypto_config/mbedtls_custom_config.h new file mode 100644 index 0000000..ed3c0ef --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/include/crypto_config/mbedtls_custom_config.h @@ -0,0 +1,3265 @@ +/** + * \file mbedtls_config.h + * + * \brief Configuration options (set of defines) + * + * This set of compile-time options may be used to enable + * or disable features selectively, and reduce the global + * memory footprint. + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include + +/** + * This is an optional version symbol that enables comatibility handling of + * config files. + * + * It is equal to the #MBEDTLS_VERSION_NUMBER of the Mbed TLS version that + * introduced the config format we want to be compatible with. + */ +//#define MBEDTLS_CONFIG_VERSION 0x03000000 + +/** + * \name SECTION: System support + * + * This section sets system specific settings. + * \{ + */ + +/** + * \def MBEDTLS_HAVE_ASM + * + * The compiler has support for asm(). + * + * Requires support for asm() in compiler. + * + * Used in: + * library/aria.c + * library/bn_mul.h + * + * Required by: + * MBEDTLS_AESNI_C + * MBEDTLS_PADLOCK_C + * + * Comment to disable the use of assembly code. + */ +#define MBEDTLS_HAVE_ASM + +/** + * \def MBEDTLS_NO_UDBL_DIVISION + * + * The platform lacks support for double-width integer division (64-bit + * division on a 32-bit platform, 128-bit division on a 64-bit platform). + * + * Used in: + * include/mbedtls/bignum.h + * library/bignum.c + * + * The bignum code uses double-width division to speed up some operations. + * Double-width division is often implemented in software that needs to + * be linked with the program. The presence of a double-width integer + * type is usually detected automatically through preprocessor macros, + * but the automatic detection cannot know whether the code needs to + * and can be linked with an implementation of division for that type. + * By default division is assumed to be usable if the type is present. + * Uncomment this option to prevent the use of double-width division. + * + * Note that division for the native integer type is always required. + * Furthermore, a 64-bit type is always required even on a 32-bit + * platform, but it need not support multiplication or division. In some + * cases it is also desirable to disable some double-width operations. For + * example, if double-width division is implemented in software, disabling + * it can reduce code size in some embedded targets. + */ +//#define MBEDTLS_NO_UDBL_DIVISION + +/** + * \def MBEDTLS_NO_64BIT_MULTIPLICATION + * + * The platform lacks support for 32x32 -> 64-bit multiplication. + * + * Used in: + * library/poly1305.c + * + * Some parts of the library may use multiplication of two unsigned 32-bit + * operands with a 64-bit result in order to speed up computations. On some + * platforms, this is not available in hardware and has to be implemented in + * software, usually in a library provided by the toolchain. + * + * Sometimes it is not desirable to have to link to that library. This option + * removes the dependency of that library on platforms that lack a hardware + * 64-bit multiplier by embedding a software implementation in Mbed TLS. + * + * Note that depending on the compiler, this may decrease performance compared + * to using the library function provided by the toolchain. + */ +//#define MBEDTLS_NO_64BIT_MULTIPLICATION + +/** + * \def MBEDTLS_HAVE_SSE2 + * + * CPU supports SSE2 instruction set. + * + * Uncomment if the CPU supports SSE2 (IA-32 specific). + */ +//#define MBEDTLS_HAVE_SSE2 + +/** + * \def MBEDTLS_HAVE_TIME + * + * System has time.h and time(). + * The time does not need to be correct, only time differences are used, + * by contrast with MBEDTLS_HAVE_TIME_DATE + * + * Defining MBEDTLS_HAVE_TIME allows you to specify MBEDTLS_PLATFORM_TIME_ALT, + * MBEDTLS_PLATFORM_TIME_MACRO, MBEDTLS_PLATFORM_TIME_TYPE_MACRO and + * MBEDTLS_PLATFORM_STD_TIME. + * + * Comment if your system does not support time functions + */ +#define MBEDTLS_HAVE_TIME + +/** + * \def MBEDTLS_HAVE_TIME_DATE + * + * System has time.h, time(), and an implementation for + * mbedtls_platform_gmtime_r() (see below). + * The time needs to be correct (not necessarily very accurate, but at least + * the date should be correct). This is used to verify the validity period of + * X.509 certificates. + * + * Comment if your system does not have a correct clock. + * + * \note mbedtls_platform_gmtime_r() is an abstraction in platform_util.h that + * behaves similarly to the gmtime_r() function from the C standard. Refer to + * the documentation for mbedtls_platform_gmtime_r() for more information. + * + * \note It is possible to configure an implementation for + * mbedtls_platform_gmtime_r() at compile-time by using the macro + * MBEDTLS_PLATFORM_GMTIME_R_ALT. + */ +#define MBEDTLS_HAVE_TIME_DATE + +/** + * \def MBEDTLS_PLATFORM_MEMORY + * + * Enable the memory allocation layer. + * + * By default mbed TLS uses the system-provided calloc() and free(). + * This allows different allocators (self-implemented or provided) to be + * provided to the platform abstraction layer. + * + * Enabling MBEDTLS_PLATFORM_MEMORY without the + * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide + * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and + * free() function pointer at runtime. + * + * Enabling MBEDTLS_PLATFORM_MEMORY and specifying + * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the + * alternate function at compile time. + * + * Requires: MBEDTLS_PLATFORM_C + * + * Enable this layer to allow use of alternative memory allocators. + */ +#define MBEDTLS_PLATFORM_MEMORY + +/** + * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + * + * Do not assign standard functions in the platform layer (e.g. calloc() to + * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF) + * + * This makes sure there are no linking errors on platforms that do not support + * these functions. You will HAVE to provide alternatives, either at runtime + * via the platform_set_xxx() functions or at compile time by setting + * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a + * MBEDTLS_PLATFORM_XXX_MACRO. + * + * Requires: MBEDTLS_PLATFORM_C + * + * Uncomment to prevent default assignment of standard functions in the + * platform layer. + */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +/** + * \def MBEDTLS_PLATFORM_EXIT_ALT + * + * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the + * function in the platform abstraction layer. + * + * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will + * provide a function "mbedtls_platform_set_printf()" that allows you to set an + * alternative printf function pointer. + * + * All these define require MBEDTLS_PLATFORM_C to be defined! + * + * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows; + * it will be enabled automatically by check_config.h + * + * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as + * MBEDTLS_PLATFORM_XXX_MACRO! + * + * Requires: MBEDTLS_PLATFORM_TIME_ALT requires MBEDTLS_HAVE_TIME + * + * Uncomment a macro to enable alternate implementation of specific base + * platform function + */ +#define MBEDTLS_PLATFORM_EXIT_ALT +//#define MBEDTLS_PLATFORM_TIME_ALT +//#define MBEDTLS_PLATFORM_FPRINTF_ALT +//#define MBEDTLS_PLATFORM_PRINTF_ALT +//#define MBEDTLS_PLATFORM_SNPRINTF_ALT +//#define MBEDTLS_PLATFORM_VSNPRINTF_ALT +//#define MBEDTLS_PLATFORM_NV_SEED_ALT +//#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT + +/** + * \def MBEDTLS_DEPRECATED_WARNING + * + * Mark deprecated functions and features so that they generate a warning if + * used. Functionality deprecated in one version will usually be removed in the + * next version. You can enable this to help you prepare the transition to a + * new major version by making sure your code is not using this functionality. + * + * This only works with GCC and Clang. With other compilers, you may want to + * use MBEDTLS_DEPRECATED_REMOVED + * + * Uncomment to get warnings on using deprecated functions and features. + */ +//#define MBEDTLS_DEPRECATED_WARNING + +/** + * \def MBEDTLS_DEPRECATED_REMOVED + * + * Remove deprecated functions and features so that they generate an error if + * used. Functionality deprecated in one version will usually be removed in the + * next version. You can enable this to help you prepare the transition to a + * new major version by making sure your code is not using this functionality. + * + * Uncomment to get errors on using deprecated functions and features. + */ +//#define MBEDTLS_DEPRECATED_REMOVED + +/* \} name SECTION: System support */ + +/** + * \name SECTION: mbed TLS feature support + * + * This section sets support for features that are or are not needed + * within the modules that are enabled. + * \{ + */ + +/** + * \def MBEDTLS_TIMING_ALT + * + * Uncomment to provide your own alternate implementation for + * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay() + * + * Only works if you have MBEDTLS_TIMING_C enabled. + * + * You will need to provide a header "timing_alt.h" and an implementation at + * compile time. + */ +//#define MBEDTLS_TIMING_ALT + +/** + * \def MBEDTLS_AES_ALT + * + * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your + * alternate core implementation of a symmetric crypto, an arithmetic or hash + * module (e.g. platform specific assembly optimized implementations). Keep + * in mind that the function prototypes should remain the same. + * + * This replaces the whole module. If you only want to replace one of the + * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags. + * + * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer + * provide the "struct mbedtls_aes_context" definition and omit the base + * function declarations and implementations. "aes_alt.h" will be included from + * "aes.h" to include the new function definitions. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * module. + * + * \warning MD5, DES and SHA-1 are considered weak and their + * use constitutes a security risk. If possible, we recommend + * avoiding dependencies on them, and considering stronger message + * digests and ciphers instead. + * + */ +//#define MBEDTLS_AES_ALT +//#define MBEDTLS_ARIA_ALT +//#define MBEDTLS_CAMELLIA_ALT +//#define MBEDTLS_CCM_ALT +//#define MBEDTLS_CHACHA20_ALT +//#define MBEDTLS_CHACHAPOLY_ALT +//#define MBEDTLS_CMAC_ALT +//#define MBEDTLS_DES_ALT +//#define MBEDTLS_DHM_ALT +//#define MBEDTLS_ECJPAKE_ALT +//#define MBEDTLS_GCM_ALT +//#define MBEDTLS_NIST_KW_ALT +//#define MBEDTLS_MD5_ALT +//#define MBEDTLS_POLY1305_ALT +//#define MBEDTLS_RIPEMD160_ALT +//#define MBEDTLS_RSA_ALT +//#define MBEDTLS_SHA1_ALT +//#define MBEDTLS_SHA256_ALT +//#define MBEDTLS_SHA512_ALT + +/* + * When replacing the elliptic curve module, pleace consider, that it is + * implemented with two .c files: + * - ecp.c + * - ecp_curves.c + * You can replace them very much like all the other MBEDTLS__MODULE_NAME__ALT + * macros as described above. The only difference is that you have to make sure + * that you provide functionality for both .c files. + */ +//#define MBEDTLS_ECP_ALT + +/** + * \def MBEDTLS_SHA256_PROCESS_ALT + * + * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you + * alternate core implementation of symmetric crypto or hash function. Keep in + * mind that function prototypes should remain the same. + * + * This replaces only one function. The header file from mbed TLS is still + * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags. + * + * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will + * no longer provide the mbedtls_sha1_process() function, but it will still provide + * the other function (using your mbedtls_sha1_process() function) and the definition + * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible + * with this definition. + * + * \note If you use the AES_xxx_ALT macros, then it is recommended to also set + * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES + * tables. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * function. + * + * \warning MD5, DES and SHA-1 are considered weak and their use + * constitutes a security risk. If possible, we recommend avoiding + * dependencies on them, and considering stronger message digests + * and ciphers instead. + * + * \warning If both MBEDTLS_ECDSA_SIGN_ALT and MBEDTLS_ECDSA_DETERMINISTIC are + * enabled, then the deterministic ECDH signature functions pass the + * the static HMAC-DRBG as RNG to mbedtls_ecdsa_sign(). Therefore + * alternative implementations should use the RNG only for generating + * the ephemeral key and nothing else. If this is not possible, then + * MBEDTLS_ECDSA_DETERMINISTIC should be disabled and an alternative + * implementation should be provided for mbedtls_ecdsa_sign_det_ext(). + * + */ +//#define MBEDTLS_MD5_PROCESS_ALT +//#define MBEDTLS_RIPEMD160_PROCESS_ALT +//#define MBEDTLS_SHA1_PROCESS_ALT +//#define MBEDTLS_SHA256_PROCESS_ALT +//#define MBEDTLS_SHA512_PROCESS_ALT +//#define MBEDTLS_DES_SETKEY_ALT +//#define MBEDTLS_DES_CRYPT_ECB_ALT +//#define MBEDTLS_DES3_CRYPT_ECB_ALT +//#define MBEDTLS_AES_SETKEY_ENC_ALT +//#define MBEDTLS_AES_SETKEY_DEC_ALT +//#define MBEDTLS_AES_ENCRYPT_ALT +//#define MBEDTLS_AES_DECRYPT_ALT +//#define MBEDTLS_ECDH_GEN_PUBLIC_ALT +//#define MBEDTLS_ECDH_COMPUTE_SHARED_ALT +//#define MBEDTLS_ECDSA_VERIFY_ALT +//#define MBEDTLS_ECDSA_SIGN_ALT +//#define MBEDTLS_ECDSA_GENKEY_ALT + +/** + * \def MBEDTLS_ECP_INTERNAL_ALT + * + * Expose a part of the internal interface of the Elliptic Curve Point module. + * + * MBEDTLS_ECP__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use your + * alternative core implementation of elliptic curve arithmetic. Keep in mind + * that function prototypes should remain the same. + * + * This partially replaces one function. The header file from mbed TLS is still + * used, in contrast to the MBEDTLS_ECP_ALT flag. The original implementation + * is still present and it is used for group structures not supported by the + * alternative. + * + * The original implementation can in addition be removed by setting the + * MBEDTLS_ECP_NO_FALLBACK option, in which case any function for which the + * corresponding MBEDTLS_ECP__FUNCTION_NAME__ALT macro is defined will not be + * able to fallback to curves not supported by the alternative implementation. + * + * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT + * and implementing the following functions: + * unsigned char mbedtls_internal_ecp_grp_capable( + * const mbedtls_ecp_group *grp ) + * int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp ) + * void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp ) + * The mbedtls_internal_ecp_grp_capable function should return 1 if the + * replacement functions implement arithmetic for the given group and 0 + * otherwise. + * The functions mbedtls_internal_ecp_init and mbedtls_internal_ecp_free are + * called before and after each point operation and provide an opportunity to + * implement optimized set up and tear down instructions. + * + * Example: In case you set MBEDTLS_ECP_INTERNAL_ALT and + * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac() + * function, but will use your mbedtls_internal_ecp_double_jac() if the group + * for the operation is supported by your implementation (i.e. your + * mbedtls_internal_ecp_grp_capable() function returns 1 for this group). If the + * group is not supported by your implementation, then the original mbed TLS + * implementation of ecp_double_jac() is used instead, unless this fallback + * behaviour is disabled by setting MBEDTLS_ECP_NO_FALLBACK (in which case + * ecp_double_jac() will return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE). + * + * The function prototypes and the definition of mbedtls_ecp_group and + * mbedtls_ecp_point will not change based on MBEDTLS_ECP_INTERNAL_ALT, so your + * implementation of mbedtls_internal_ecp__function_name__ must be compatible + * with their definitions. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * function. + */ +/* Required for all the functions in this section */ +//#define MBEDTLS_ECP_INTERNAL_ALT +/* Turn off software fallback for curves not supported in hardware */ +//#define MBEDTLS_ECP_NO_FALLBACK +/* Support for Weierstrass curves with Jacobi representation */ +//#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT +//#define MBEDTLS_ECP_ADD_MIXED_ALT +//#define MBEDTLS_ECP_DOUBLE_JAC_ALT +//#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT +//#define MBEDTLS_ECP_NORMALIZE_JAC_ALT +/* Support for curves with Montgomery arithmetic */ +//#define MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT +//#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT +//#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT + +/** + * \def MBEDTLS_ENTROPY_HARDWARE_ALT + * + * Uncomment this macro to let mbed TLS use your own implementation of a + * hardware entropy collector. + * + * Your function must be called \c mbedtls_hardware_poll(), have the same + * prototype as declared in library/entropy_poll.h, and accept NULL as first + * argument. + * + * Uncomment to use your own hardware entropy collector. + */ +//#define MBEDTLS_ENTROPY_HARDWARE_ALT + +/** + * \def MBEDTLS_AES_ROM_TABLES + * + * Use precomputed AES tables stored in ROM. + * + * Uncomment this macro to use precomputed AES tables stored in ROM. + * Comment this macro to generate AES tables in RAM at runtime. + * + * Tradeoff: Using precomputed ROM tables reduces RAM usage by ~8kb + * (or ~2kb if \c MBEDTLS_AES_FEWER_TABLES is used) and reduces the + * initialization time before the first AES operation can be performed. + * It comes at the cost of additional ~8kb ROM use (resp. ~2kb if \c + * MBEDTLS_AES_FEWER_TABLES below is used), and potentially degraded + * performance if ROM access is slower than RAM access. + * + * This option is independent of \c MBEDTLS_AES_FEWER_TABLES. + * + */ +//#define MBEDTLS_AES_ROM_TABLES + +/** + * \def MBEDTLS_AES_FEWER_TABLES + * + * Use less ROM/RAM for AES tables. + * + * Uncommenting this macro omits 75% of the AES tables from + * ROM / RAM (depending on the value of \c MBEDTLS_AES_ROM_TABLES) + * by computing their values on the fly during operations + * (the tables are entry-wise rotations of one another). + * + * Tradeoff: Uncommenting this reduces the RAM / ROM footprint + * by ~6kb but at the cost of more arithmetic operations during + * runtime. Specifically, one has to compare 4 accesses within + * different tables to 4 accesses with additional arithmetic + * operations within the same table. The performance gain/loss + * depends on the system and memory details. + * + * This option is independent of \c MBEDTLS_AES_ROM_TABLES. + * + */ +//#define MBEDTLS_AES_FEWER_TABLES + +/** + * \def MBEDTLS_CAMELLIA_SMALL_MEMORY + * + * Use less ROM for the Camellia implementation (saves about 768 bytes). + * + * Uncomment this macro to use less memory for Camellia. + */ +//#define MBEDTLS_CAMELLIA_SMALL_MEMORY + +/** + * \def MBEDTLS_CIPHER_MODE_CBC + * + * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_CBC + +/** + * \def MBEDTLS_CIPHER_MODE_CFB + * + * Enable Cipher Feedback mode (CFB) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_CFB + +/** + * \def MBEDTLS_CIPHER_MODE_CTR + * + * Enable Counter Block Cipher mode (CTR) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_CTR + +/** + * \def MBEDTLS_CIPHER_MODE_OFB + * + * Enable Output Feedback mode (OFB) for symmetric ciphers. + */ +#define MBEDTLS_CIPHER_MODE_OFB + +/** + * \def MBEDTLS_CIPHER_MODE_XTS + * + * Enable Xor-encrypt-xor with ciphertext stealing mode (XTS) for AES. + */ +#define MBEDTLS_CIPHER_MODE_XTS + +/** + * \def MBEDTLS_CIPHER_NULL_CIPHER + * + * Enable NULL cipher. + * Warning: Only do so when you know what you are doing. This allows for + * encryption or channels without any security! + * + * To enable the following ciphersuites: + * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_RSA_WITH_NULL_SHA256 + * MBEDTLS_TLS_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_RSA_WITH_NULL_MD5 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_PSK_WITH_NULL_SHA + * + * Uncomment this macro to enable the NULL cipher and ciphersuites + */ +//#define MBEDTLS_CIPHER_NULL_CIPHER + +/** + * \def MBEDTLS_CIPHER_PADDING_PKCS7 + * + * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for + * specific padding modes in the cipher layer with cipher modes that support + * padding (e.g. CBC) + * + * If you disable all padding modes, only full blocks can be used with CBC. + * + * Enable padding modes in the cipher layer. + */ +#define MBEDTLS_CIPHER_PADDING_PKCS7 +#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS +#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN +#define MBEDTLS_CIPHER_PADDING_ZEROS + +/** \def MBEDTLS_CTR_DRBG_USE_128_BIT_KEY + * + * Uncomment this macro to use a 128-bit key in the CTR_DRBG module. + * By default, CTR_DRBG uses a 256-bit key. + */ +//#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY + +/** + * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED + * + * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve + * module. By default all supported curves are enabled. + * + * Comment macros to disable the curve and functions for it + */ +/* Short Weierstrass curves (supporting ECP, ECDH, ECDSA) */ +#define MBEDTLS_ECP_DP_SECP192R1_ENABLED +#define MBEDTLS_ECP_DP_SECP224R1_ENABLED +#define MBEDTLS_ECP_DP_SECP256R1_ENABLED +#define MBEDTLS_ECP_DP_SECP384R1_ENABLED +#define MBEDTLS_ECP_DP_SECP521R1_ENABLED +#define MBEDTLS_ECP_DP_SECP192K1_ENABLED +#define MBEDTLS_ECP_DP_SECP224K1_ENABLED +#define MBEDTLS_ECP_DP_SECP256K1_ENABLED +#define MBEDTLS_ECP_DP_BP256R1_ENABLED +#define MBEDTLS_ECP_DP_BP384R1_ENABLED +#define MBEDTLS_ECP_DP_BP512R1_ENABLED +/* Montgomery curves (supporting ECP) */ +#define MBEDTLS_ECP_DP_CURVE25519_ENABLED +#define MBEDTLS_ECP_DP_CURVE448_ENABLED + +/** + * \def MBEDTLS_ECP_NIST_OPTIM + * + * Enable specific 'modulo p' routines for each NIST prime. + * Depending on the prime and architecture, makes operations 4 to 8 times + * faster on the corresponding curve. + * + * Comment this macro to disable NIST curves optimisation. + */ +#define MBEDTLS_ECP_NIST_OPTIM + +/** + * \def MBEDTLS_ECP_RESTARTABLE + * + * Enable "non-blocking" ECC operations that can return early and be resumed. + * + * This allows various functions to pause by returning + * #MBEDTLS_ERR_ECP_IN_PROGRESS (or, for functions in the SSL module, + * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS) and then be called later again in + * order to further progress and eventually complete their operation. This is + * controlled through mbedtls_ecp_set_max_ops() which limits the maximum + * number of ECC operations a function may perform before pausing; see + * mbedtls_ecp_set_max_ops() for more information. + * + * This is useful in non-threaded environments if you want to avoid blocking + * for too long on ECC (and, hence, X.509 or SSL/TLS) operations. + * + * Uncomment this macro to enable restartable ECC computations. + * + * \note This option only works with the default software implementation of + * elliptic curve functionality. It is incompatible with + * MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT, MBEDTLS_ECDSA_XXX_ALT. + */ +//#define MBEDTLS_ECP_RESTARTABLE + +/** + * \def MBEDTLS_ECDSA_DETERMINISTIC + * + * Enable deterministic ECDSA (RFC 6979). + * Standard ECDSA is "fragile" in the sense that lack of entropy when signing + * may result in a compromise of the long-term signing key. This is avoided by + * the deterministic variant. + * + * Requires: MBEDTLS_HMAC_DRBG_C, MBEDTLS_ECDSA_C + * + * Comment this macro to disable deterministic ECDSA. + */ +#define MBEDTLS_ECDSA_DETERMINISTIC + +/** + * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED + * + * Enable the PSK based ciphersuite modes in SSL / TLS. + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 + */ +#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED + * + * Enable the DHE-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_DHM_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * + * \warning Using DHE constitutes a security risk as it + * is not possible to validate custom DH parameters. + * If possible, it is recommended users should consider + * preferring other methods of key exchange. + * See dhm.h for more details. + * + */ +#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED + * + * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + */ +#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED + * + * Enable the RSA-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 + */ +#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED + * + * Enable the RSA-only based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA + */ +#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED + * + * Enable the DHE-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA + * + * \warning Using DHE constitutes a security risk as it + * is not possible to validate custom DH parameters. + * If possible, it is recommended users should consider + * preferring other methods of key exchange. + * See dhm.h for more details. + * + */ +#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED + * + * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + */ +#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED + * + * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C, + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + */ +#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED + * + * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + */ +#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED + * + * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 + */ +#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED + * + * Enable the ECJPAKE based ciphersuite modes in SSL / TLS. + * + * \warning This is currently experimental. EC J-PAKE support is based on the + * Thread v1.0.0 specification; incompatible changes to the specification + * might still happen. For this reason, this is disabled by default. + * + * Requires: MBEDTLS_ECJPAKE_C + * MBEDTLS_SHA256_C + * MBEDTLS_ECP_DP_SECP256R1_ENABLED + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + */ +//#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED + +/** + * \def MBEDTLS_PK_PARSE_EC_EXTENDED + * + * Enhance support for reading EC keys using variants of SEC1 not allowed by + * RFC 5915 and RFC 5480. + * + * Currently this means parsing the SpecifiedECDomain choice of EC + * parameters (only known groups are supported, not arbitrary domains, to + * avoid validation issues). + * + * Disable if you only need to support RFC 5915 + 5480 key formats. + */ +#define MBEDTLS_PK_PARSE_EC_EXTENDED + +/** + * \def MBEDTLS_ERROR_STRERROR_DUMMY + * + * Enable a dummy error function to make use of mbedtls_strerror() in + * third party libraries easier when MBEDTLS_ERROR_C is disabled + * (no effect when MBEDTLS_ERROR_C is enabled). + * + * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're + * not using mbedtls_strerror() or error_strerror() in your application. + * + * Disable if you run into name conflicts and want to really remove the + * mbedtls_strerror() + */ +#define MBEDTLS_ERROR_STRERROR_DUMMY + +/** + * \def MBEDTLS_GENPRIME + * + * Enable the prime-number generation code. + * + * Requires: MBEDTLS_BIGNUM_C + */ +#define MBEDTLS_GENPRIME + +/** + * \def MBEDTLS_FS_IO + * + * Enable functions that use the filesystem. + */ +#define MBEDTLS_FS_IO + +/** + * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + * + * Do not add default entropy sources in mbedtls_entropy_init(). + * + * This is useful to have more control over the added entropy sources in an + * application. + * + * Uncomment this macro to prevent loading of default entropy functions. + */ +//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/** + * \def MBEDTLS_NO_PLATFORM_ENTROPY + * + * Do not use built-in platform entropy functions. + * This is useful if your platform does not support + * standards like the /dev/urandom or Windows CryptoAPI. + * + * Uncomment this macro to disable the built-in platform entropy functions. + */ +//#define MBEDTLS_NO_PLATFORM_ENTROPY + +/** + * \def MBEDTLS_ENTROPY_FORCE_SHA256 + * + * Force the entropy accumulator to use a SHA-256 accumulator instead of the + * default SHA-512 based one (if both are available). + * + * Requires: MBEDTLS_SHA256_C + * + * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option + * if you have performance concerns. + * + * This option is only useful if both MBEDTLS_SHA256_C and + * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used. + */ +//#define MBEDTLS_ENTROPY_FORCE_SHA256 + +/** + * \def MBEDTLS_ENTROPY_NV_SEED + * + * Enable the non-volatile (NV) seed file-based entropy source. + * (Also enables the NV seed read/write functions in the platform layer) + * + * This is crucial (if not required) on systems that do not have a + * cryptographic entropy source (in hardware or kernel) available. + * + * Requires: MBEDTLS_ENTROPY_C, MBEDTLS_PLATFORM_C + * + * \note The read/write functions that are used by the entropy source are + * determined in the platform layer, and can be modified at runtime and/or + * compile-time depending on the flags (MBEDTLS_PLATFORM_NV_SEED_*) used. + * + * \note If you use the default implementation functions that read a seedfile + * with regular fopen(), please make sure you make a seedfile with the + * proper name (defined in MBEDTLS_PLATFORM_STD_NV_SEED_FILE) and at + * least MBEDTLS_ENTROPY_BLOCK_SIZE bytes in size that can be read from + * and written to or you will get an entropy source error! The default + * implementation will only use the first MBEDTLS_ENTROPY_BLOCK_SIZE + * bytes from the file. + * + * \note The entropy collector will write to the seed file before entropy is + * given to an external source, to update it. + */ +//#define MBEDTLS_ENTROPY_NV_SEED + +/* MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER + * + * Enable key identifiers that encode a key owner identifier. + * + * The owner of a key is identified by a value of type ::mbedtls_key_owner_id_t + * which is currently hard-coded to be int32_t. + * + * Note that this option is meant for internal use only and may be removed + * without notice. It is incompatible with MBEDTLS_USE_PSA_CRYPTO. + */ +//#define MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER + +/** + * \def MBEDTLS_MEMORY_DEBUG + * + * Enable debugging of buffer allocator memory issues. Automatically prints + * (to stderr) all (fatal) messages on memory allocation issues. Enables + * function for 'debug output' of allocated memory. + * + * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C + * + * Uncomment this macro to let the buffer allocator print out error messages. + */ +//#define MBEDTLS_MEMORY_DEBUG + +/** + * \def MBEDTLS_MEMORY_BACKTRACE + * + * Include backtrace information with each allocated block. + * + * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C + * GLIBC-compatible backtrace() an backtrace_symbols() support + * + * Uncomment this macro to include backtrace information + */ +//#define MBEDTLS_MEMORY_BACKTRACE + +/** + * \def MBEDTLS_PK_RSA_ALT_SUPPORT + * + * Support external private RSA keys (eg from a HSM) in the PK layer. + * + * Comment this macro to disable support for external private RSA keys. + */ +#define MBEDTLS_PK_RSA_ALT_SUPPORT + +/** + * \def MBEDTLS_PKCS1_V15 + * + * Enable support for PKCS#1 v1.5 encoding. + * + * Requires: MBEDTLS_RSA_C + * + * This enables support for PKCS#1 v1.5 operations. + */ +#define MBEDTLS_PKCS1_V15 + +/** + * \def MBEDTLS_PKCS1_V21 + * + * Enable support for PKCS#1 v2.1 encoding. + * + * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C + * + * This enables support for RSAES-OAEP and RSASSA-PSS operations. + */ +#define MBEDTLS_PKCS1_V21 + +/** \def MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS + * + * Enable support for platform built-in keys. If you enable this feature, + * you must implement the function mbedtls_psa_platform_get_builtin_key(). + * See the documentation of that function for more information. + * + * Built-in keys are typically derived from a hardware unique key or + * stored in a secure element. + * + * Requires: MBEDTLS_PSA_CRYPTO_C. + * + * \warning This interface is experimental and may change or be removed + * without notice. + */ +//#define MBEDTLS_PSA_CRYPTO_BUILTIN_KEYS + +/** \def MBEDTLS_PSA_CRYPTO_CLIENT + * + * Enable support for PSA crypto client. + * + * \note This option allows to include the code necessary for a PSA + * crypto client when the PSA crypto implementation is not included in + * the library (MBEDTLS_PSA_CRYPTO_C disabled). The code included is the + * code to set and get PSA key attributes. + * The development of PSA drivers partially relying on the library to + * fulfill the hardware gaps is another possible usage of this option. + * + * \warning This interface is experimental and may change or be removed + * without notice. + */ +//#define MBEDTLS_PSA_CRYPTO_CLIENT + +/** \def MBEDTLS_PSA_CRYPTO_DRIVERS + * + * Enable support for the experimental PSA crypto driver interface. + * + * Requires: MBEDTLS_PSA_CRYPTO_C + * + * \warning This interface is experimental and may change or be removed + * without notice. + */ +//#define MBEDTLS_PSA_CRYPTO_DRIVERS + +/** \def MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG + * + * Make the PSA Crypto module use an external random generator provided + * by a driver, instead of Mbed TLS's entropy and DRBG modules. + * + * \note This random generator must deliver random numbers with cryptographic + * quality and high performance. It must supply unpredictable numbers + * with a uniform distribution. The implementation of this function + * is responsible for ensuring that the random generator is seeded + * with sufficient entropy. If you have a hardware TRNG which is slow + * or delivers non-uniform output, declare it as an entropy source + * with mbedtls_entropy_add_source() instead of enabling this option. + * + * If you enable this option, you must configure the type + * ::mbedtls_psa_external_random_context_t in psa/crypto_platform.h + * and define a function called mbedtls_psa_external_get_random() + * with the following prototype: + * ``` + * psa_status_t mbedtls_psa_external_get_random( + * mbedtls_psa_external_random_context_t *context, + * uint8_t *output, size_t output_size, size_t *output_length); + * ); + * ``` + * The \c context value is initialized to 0 before the first call. + * The function must fill the \c output buffer with \p output_size bytes + * of random data and set \c *output_length to \p output_size. + * + * Requires: MBEDTLS_PSA_CRYPTO_C + * + * \warning If you enable this option, code that uses the PSA cryptography + * interface will not use any of the entropy sources set up for + * the entropy module, nor the NV seed that MBEDTLS_ENTROPY_NV_SEED + * enables. + * + * \note This option is experimental and may be removed without notice. + */ +//#define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG + +/** + * \def MBEDTLS_PSA_CRYPTO_SPM + * + * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is built for SPM (Secure + * Partition Manager) integration which separates the code into two parts: a + * NSPE (Non-Secure Process Environment) and an SPE (Secure Process + * Environment). + * + * Module: library/psa_crypto.c + * Requires: MBEDTLS_PSA_CRYPTO_C + * + */ +//#define MBEDTLS_PSA_CRYPTO_SPM + +/** + * \def MBEDTLS_PSA_INJECT_ENTROPY + * + * Enable support for entropy injection at first boot. This feature is + * required on systems that do not have a built-in entropy source (TRNG). + * This feature is currently not supported on systems that have a built-in + * entropy source. + * + * Requires: MBEDTLS_PSA_CRYPTO_STORAGE_C, MBEDTLS_ENTROPY_NV_SEED + * + */ +//#define MBEDTLS_PSA_INJECT_ENTROPY + +/** + * \def MBEDTLS_RSA_NO_CRT + * + * Do not use the Chinese Remainder Theorem + * for the RSA private operation. + * + * Uncomment this macro to disable the use of CRT in RSA. + * + */ +//#define MBEDTLS_RSA_NO_CRT + +/** + * \def MBEDTLS_SELF_TEST + * + * Enable the checkup functions (*_self_test). + */ +#define MBEDTLS_SELF_TEST + +/** + * \def MBEDTLS_SHA256_SMALLER + * + * Enable an implementation of SHA-256 that has lower ROM footprint but also + * lower performance. + * + * The default implementation is meant to be a reasonnable compromise between + * performance and size. This version optimizes more aggressively for size at + * the expense of performance. Eg on Cortex-M4 it reduces the size of + * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about + * 30%. + * + * Uncomment to enable the smaller implementation of SHA256. + */ +//#define MBEDTLS_SHA256_SMALLER + +/** + * \def MBEDTLS_SHA512_SMALLER + * + * Enable an implementation of SHA-512 that has lower ROM footprint but also + * lower performance. + * + * Uncomment to enable the smaller implementation of SHA512. + */ +//#define MBEDTLS_SHA512_SMALLER + +/** + * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES + * + * Enable sending of alert messages in case of encountered errors as per RFC. + * If you choose not to send the alert messages, mbed TLS can still communicate + * with other servers, only debugging of failures is harder. + * + * The advantage of not sending alert messages, is that no information is given + * about reasons for failures thus preventing adversaries of gaining intel. + * + * Enable sending of all alert messages + */ +#define MBEDTLS_SSL_ALL_ALERT_MESSAGES + +/** + * \def MBEDTLS_SSL_DTLS_CONNECTION_ID + * + * Enable support for the DTLS Connection ID extension + * (version draft-ietf-tls-dtls-connection-id-05, + * https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05) + * which allows to identify DTLS connections across changes + * in the underlying transport. + * + * Setting this option enables the SSL APIs `mbedtls_ssl_set_cid()`, + * `mbedtls_ssl_get_peer_cid()` and `mbedtls_ssl_conf_cid()`. + * See the corresponding documentation for more information. + * + * \warning The Connection ID extension is still in draft state. + * We make no stability promises for the availability + * or the shape of the API controlled by this option. + * + * The maximum lengths of outgoing and incoming CIDs can be configured + * through the options + * - MBEDTLS_SSL_CID_OUT_LEN_MAX + * - MBEDTLS_SSL_CID_IN_LEN_MAX. + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + * + * Uncomment to enable the Connection ID extension. + */ +//#define MBEDTLS_SSL_DTLS_CONNECTION_ID + +/** + * \def MBEDTLS_SSL_ASYNC_PRIVATE + * + * Enable asynchronous external private key operations in SSL. This allows + * you to configure an SSL connection to call an external cryptographic + * module to perform private key operations instead of performing the + * operation inside the library. + * + */ +//#define MBEDTLS_SSL_ASYNC_PRIVATE + +/** + * \def MBEDTLS_SSL_CONTEXT_SERIALIZATION + * + * Enable serialization of the TLS context structures, through use of the + * functions mbedtls_ssl_context_save() and mbedtls_ssl_context_load(). + * + * This pair of functions allows one side of a connection to serialize the + * context associated with the connection, then free or re-use that context + * while the serialized state is persisted elsewhere, and finally deserialize + * that state to a live context for resuming read/write operations on the + * connection. From a protocol perspective, the state of the connection is + * unaffected, in particular this is entirely transparent to the peer. + * + * Note: this is distinct from TLS session resumption, which is part of the + * protocol and fully visible by the peer. TLS session resumption enables + * establishing new connections associated to a saved session with shorter, + * lighter handshakes, while context serialization is a local optimization in + * handling a single, potentially long-lived connection. + * + * Enabling these APIs makes some SSL structures larger, as 64 extra bytes are + * saved after the handshake to allow for more efficient serialization, so if + * you don't need this feature you'll save RAM by disabling it. + * + * Comment to disable the context serialization APIs. + */ +#define MBEDTLS_SSL_CONTEXT_SERIALIZATION + +/** + * \def MBEDTLS_SSL_DEBUG_ALL + * + * Enable the debug messages in SSL module for all issues. + * Debug messages have been disabled in some places to prevent timing + * attacks due to (unbalanced) debugging function calls. + * + * If you need all error reporting you should enable this during debugging, + * but remove this for production servers that should log as well. + * + * Uncomment this macro to report all debug messages on errors introducing + * a timing side-channel. + * + */ +//#define MBEDTLS_SSL_DEBUG_ALL + +/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC + * + * Enable support for Encrypt-then-MAC, RFC 7366. + * + * This allows peers that both support it to use a more robust protection for + * ciphersuites using CBC, providing deep resistance against timing attacks + * on the padding or underlying cipher. + * + * This only affects CBC ciphersuites, and is useless if none is defined. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for Encrypt-then-MAC + */ +#define MBEDTLS_SSL_ENCRYPT_THEN_MAC + +/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET + * + * Enable support for RFC 7627: Session Hash and Extended Master Secret + * Extension. + * + * This was introduced as "the proper fix" to the Triple Handshake familiy of + * attacks, but it is recommended to always use it (even if you disable + * renegotiation), since it actually fixes a more fundamental issue in the + * original SSL/TLS design, and has implications beyond Triple Handshake. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for Extended Master Secret. + */ +#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET + +/** + * \def MBEDTLS_SSL_KEEP_PEER_CERTIFICATE + * + * This option controls the availability of the API mbedtls_ssl_get_peer_cert() + * giving access to the peer's certificate after completion of the handshake. + * + * Unless you need mbedtls_ssl_peer_cert() in your application, it is + * recommended to disable this option for reduced RAM usage. + * + * \note If this option is disabled, mbedtls_ssl_get_peer_cert() is still + * defined, but always returns \c NULL. + * + * \note This option has no influence on the protection against the + * triple handshake attack. Even if it is disabled, Mbed TLS will + * still ensure that certificates do not change during renegotiation, + * for exaple by keeping a hash of the peer's certificate. + * + * Comment this macro to disable storing the peer's certificate + * after the handshake. + */ +#define MBEDTLS_SSL_KEEP_PEER_CERTIFICATE + +/** + * \def MBEDTLS_SSL_RENEGOTIATION + * + * Enable support for TLS renegotiation. + * + * The two main uses of renegotiation are (1) refresh keys on long-lived + * connections and (2) client authentication after the initial handshake. + * If you don't need renegotiation, it's probably better to disable it, since + * it has been associated with security issues in the past and is easy to + * misuse/misunderstand. + * + * Comment this to disable support for renegotiation. + * + * \note Even if this option is disabled, both client and server are aware + * of the Renegotiation Indication Extension (RFC 5746) used to + * prevent the SSL renegotiation attack (see RFC 5746 Sect. 1). + * (See \c mbedtls_ssl_conf_legacy_renegotiation for the + * configuration of this extension). + * + */ +#define MBEDTLS_SSL_RENEGOTIATION + +/** + * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH + * + * Enable support for RFC 6066 max_fragment_length extension in SSL. + * + * Comment this macro to disable support for the max_fragment_length extension + */ +#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH + +/** + * \def MBEDTLS_SSL_PROTO_TLS1_2 + * + * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled). + * + * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C + * (Depends on ciphersuites) + * + * Comment this macro to disable support for TLS 1.2 / DTLS 1.2 + */ +#define MBEDTLS_SSL_PROTO_TLS1_2 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL + * + * This macro is used to selectively enable experimental parts + * of the code that contribute to the ongoing development of + * the prototype TLS 1.3 and DTLS 1.3 implementation, and provide + * no other purpose. + * + * \warning TLS 1.3 and DTLS 1.3 aren't yet supported in Mbed TLS, + * and no feature exposed through this macro is part of the + * public API. In particular, features under the control + * of this macro are experimental and don't come with any + * stability guarantees. + * + * Uncomment this macro to enable experimental and partial + * functionality specific to TLS 1.3. + */ +//#define MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL + +/** + * \def MBEDTLS_SSL_PROTO_DTLS + * + * Enable support for DTLS (all available versions). + * + * Enable this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for DTLS + */ +#define MBEDTLS_SSL_PROTO_DTLS + +/** + * \def MBEDTLS_SSL_ALPN + * + * Enable support for RFC 7301 Application Layer Protocol Negotiation. + * + * Comment this macro to disable support for ALPN. + */ +#define MBEDTLS_SSL_ALPN + +/** + * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY + * + * Enable support for the anti-replay mechanism in DTLS. + * + * Requires: MBEDTLS_SSL_TLS_C + * MBEDTLS_SSL_PROTO_DTLS + * + * \warning Disabling this is often a security risk! + * See mbedtls_ssl_conf_dtls_anti_replay() for details. + * + * Comment this to disable anti-replay in DTLS. + */ +#define MBEDTLS_SSL_DTLS_ANTI_REPLAY + +/** + * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY + * + * Enable support for HelloVerifyRequest on DTLS servers. + * + * This feature is highly recommended to prevent DTLS servers being used as + * amplifiers in DoS attacks against other hosts. It should always be enabled + * unless you know for sure amplification cannot be a problem in the + * environment in which your server operates. + * + * \warning Disabling this can ba a security risk! (see above) + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + * + * Comment this to disable support for HelloVerifyRequest. + */ +#define MBEDTLS_SSL_DTLS_HELLO_VERIFY + +/** + * \def MBEDTLS_SSL_DTLS_SRTP + * + * Enable support for negotiation of DTLS-SRTP (RFC 5764) + * through the use_srtp extension. + * + * \note This feature provides the minimum functionality required + * to negotiate the use of DTLS-SRTP and to allow the derivation of + * the associated SRTP packet protection key material. + * In particular, the SRTP packet protection itself, as well as the + * demultiplexing of RTP and DTLS packets at the datagram layer + * (see Section 5 of RFC 5764), are not handled by this feature. + * Instead, after successful completion of a handshake negotiating + * the use of DTLS-SRTP, the extended key exporter API + * mbedtls_ssl_conf_export_keys_cb() should be used to implement + * the key exporter described in Section 4.2 of RFC 5764 and RFC 5705 + * (this is implemented in the SSL example programs). + * The resulting key should then be passed to an SRTP stack. + * + * Setting this option enables the runtime API + * mbedtls_ssl_conf_dtls_srtp_protection_profiles() + * through which the supported DTLS-SRTP protection + * profiles can be configured. You must call this API at + * runtime if you wish to negotiate the use of DTLS-SRTP. + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + * + * Uncomment this to enable support for use_srtp extension. + */ +//#define MBEDTLS_SSL_DTLS_SRTP + +/** + * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE + * + * Enable server-side support for clients that reconnect from the same port. + * + * Some clients unexpectedly close the connection and try to reconnect using the + * same source port. This needs special support from the server to handle the + * new connection securely, as described in section 4.2.8 of RFC 6347. This + * flag enables that support. + * + * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY + * + * Comment this to disable support for clients reusing the source port. + */ +#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE + +/** + * \def MBEDTLS_SSL_SESSION_TICKETS + * + * Enable support for RFC 5077 session tickets in SSL. + * Client-side, provides full support for session tickets (maintenance of a + * session store remains the responsibility of the application, though). + * Server-side, you also need to provide callbacks for writing and parsing + * tickets, including authenticated encryption and key management. Example + * callbacks are provided by MBEDTLS_SSL_TICKET_C. + * + * Comment this macro to disable support for SSL session tickets + */ +#define MBEDTLS_SSL_SESSION_TICKETS + +/** + * \def MBEDTLS_SSL_EXPORT_KEYS + * + * Enable support for exporting key block and master secret. + * This is required for certain users of TLS, e.g. EAP-TLS. + * + * Comment this macro to disable support for key export + */ +#define MBEDTLS_SSL_EXPORT_KEYS + +/** + * \def MBEDTLS_SSL_SERVER_NAME_INDICATION + * + * Enable support for RFC 6066 server name indication (SNI) in SSL. + * + * Requires: MBEDTLS_X509_CRT_PARSE_C + * + * Comment this macro to disable support for server name indication in SSL + */ +#define MBEDTLS_SSL_SERVER_NAME_INDICATION + +/** + * \def MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH + * + * When this option is enabled, the SSL buffer will be resized automatically + * based on the negotiated maximum fragment length in each direction. + * + * Requires: MBEDTLS_SSL_MAX_FRAGMENT_LENGTH + */ +//#define MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH + +/** + * \def MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN + * + * Enable testing of the constant-flow nature of some sensitive functions with + * clang's MemorySanitizer. This causes some existing tests to also test + * this non-functional property of the code under test. + * + * This setting requires compiling with clang -fsanitize=memory. The test + * suites can then be run normally. + * + * \warning This macro is only used for extended testing; it is not considered + * part of the library's API, so it may change or disappear at any time. + * + * Uncomment to enable testing of the constant-flow nature of selected code. + */ +//#define MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN + +/** + * \def MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND + * + * Enable testing of the constant-flow nature of some sensitive functions with + * valgrind's memcheck tool. This causes some existing tests to also test + * this non-functional property of the code under test. + * + * This setting requires valgrind headers for building, and is only useful for + * testing if the tests suites are run with valgrind's memcheck. This can be + * done for an individual test suite with 'valgrind ./test_suite_xxx', or when + * using CMake, this can be done for all test suites with 'make memcheck'. + * + * \warning This macro is only used for extended testing; it is not considered + * part of the library's API, so it may change or disappear at any time. + * + * Uncomment to enable testing of the constant-flow nature of selected code. + */ +//#define MBEDTLS_TEST_CONSTANT_FLOW_VALGRIND + +/** + * \def MBEDTLS_TEST_HOOKS + * + * Enable features for invasive testing such as introspection functions and + * hooks for fault injection. This enables additional unit tests. + * + * Merely enabling this feature should not change the behavior of the product. + * It only adds new code, and new branching points where the default behavior + * is the same as when this feature is disabled. + * However, this feature increases the attack surface: there is an added + * risk of vulnerabilities, and more gadgets that can make exploits easier. + * Therefore this feature must never be enabled in production. + * + * See `docs/architecture/testing/mbed-crypto-invasive-testing.md` for more + * information. + * + * Uncomment to enable invasive tests. + */ +//#define MBEDTLS_TEST_HOOKS + +/** + * \def MBEDTLS_THREADING_ALT + * + * Provide your own alternate threading implementation. + * + * Requires: MBEDTLS_THREADING_C + * + * Uncomment this to allow your own alternate threading implementation. + */ +//#define MBEDTLS_THREADING_ALT + +/** + * \def MBEDTLS_THREADING_PTHREAD + * + * Enable the pthread wrapper layer for the threading layer. + * + * Requires: MBEDTLS_THREADING_C + * + * Uncomment this to enable pthread mutexes. + */ +//#define MBEDTLS_THREADING_PTHREAD + +/** + * \def MBEDTLS_USE_PSA_CRYPTO + * + * Make the X.509 and TLS library use PSA for cryptographic operations, and + * enable new APIs for using keys handled by PSA Crypto. + * + * \note Development of this option is currently in progress, and parts of Mbed + * TLS's X.509 and TLS modules are not ported to PSA yet. However, these parts + * will still continue to work as usual, so enabling this option should not + * break backwards compatibility. + * + * \warning The PSA Crypto API is in beta stage. While you're welcome to + * experiment using it, incompatible API changes are still possible, and some + * parts may not have reached the same quality as the rest of Mbed TLS yet. + * + * \warning This option enables new Mbed TLS APIs that are dependent on the + * PSA Crypto API, so can't come with the same stability guarantees as the + * rest of the Mbed TLS APIs. You're welcome to experiment with them, but for + * now, access to these APIs is opt-in (via enabling the present option), in + * order to clearly differentiate them from the stable Mbed TLS APIs. + * + * Requires: MBEDTLS_PSA_CRYPTO_C. + * + * Uncomment this to enable internal use of PSA Crypto and new associated APIs. + */ +//#define MBEDTLS_USE_PSA_CRYPTO + +/** + * \def MBEDTLS_PSA_CRYPTO_CONFIG + * + * This setting allows support for cryptographic mechanisms through the PSA + * API to be configured separately from support through the mbedtls API. + * + * Uncomment this to enable use of PSA Crypto configuration settings which + * can be found in include/psa/crypto_config.h. + * + * This feature is still experimental and is not ready for production since + * it is not completed. + */ +//#define MBEDTLS_PSA_CRYPTO_CONFIG + +/** + * \def MBEDTLS_VERSION_FEATURES + * + * Allow run-time checking of compile-time enabled features. Thus allowing users + * to check at run-time if the library is for instance compiled with threading + * support via mbedtls_version_check_feature(). + * + * Requires: MBEDTLS_VERSION_C + * + * Comment this to disable run-time checking and save ROM space + */ +#define MBEDTLS_VERSION_FEATURES + +/** + * \def MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK + * + * If set, this enables the X.509 API `mbedtls_x509_crt_verify_with_ca_cb()` + * and the SSL API `mbedtls_ssl_conf_ca_cb()` which allow users to configure + * the set of trusted certificates through a callback instead of a linked + * list. + * + * This is useful for example in environments where a large number of trusted + * certificates is present and storing them in a linked list isn't efficient + * enough, or when the set of trusted certificates changes frequently. + * + * See the documentation of `mbedtls_x509_crt_verify_with_ca_cb()` and + * `mbedtls_ssl_conf_ca_cb()` for more information. + * + * Uncomment to enable trusted certificate callbacks. + */ +//#define MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK + +/** + * \def MBEDTLS_X509_REMOVE_INFO + * + * Disable mbedtls_x509_*_info() and related APIs. + * + * Uncomment to omit mbedtls_x509_*_info(), as well as mbedtls_debug_print_crt() + * and other functions/constants only used by these functions, thus reducing + * the code footprint by several KB. + */ +//#define MBEDTLS_X509_REMOVE_INFO + +/** + * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT + * + * Enable parsing and verification of X.509 certificates, CRLs and CSRS + * signed with RSASSA-PSS (aka PKCS#1 v2.1). + * + * Comment this macro to disallow using RSASSA-PSS in certificates. + */ +#define MBEDTLS_X509_RSASSA_PSS_SUPPORT +/* \} name SECTION: mbed TLS feature support */ + +/** + * \name SECTION: mbed TLS modules + * + * This section enables or disables entire modules in mbed TLS + * \{ + */ + +/** + * \def MBEDTLS_AESNI_C + * + * Enable AES-NI support on x86-64. + * + * Module: library/aesni.c + * Caller: library/aes.c + * + * Requires: MBEDTLS_HAVE_ASM + * + * This modules adds support for the AES-NI instructions on x86-64 + */ +#define MBEDTLS_AESNI_C + +/** + * \def MBEDTLS_AES_C + * + * Enable the AES block cipher. + * + * Module: library/aes.c + * Caller: library/cipher.c + * library/pem.c + * library/ctr_drbg.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA + * + * PEM_PARSE uses AES for decrypting encrypted keys. + */ +#define MBEDTLS_AES_C + +/** + * \def MBEDTLS_ASN1_PARSE_C + * + * Enable the generic ASN1 parser. + * + * Module: library/asn1.c + * Caller: library/x509.c + * library/dhm.c + * library/pkcs12.c + * library/pkcs5.c + * library/pkparse.c + */ +#define MBEDTLS_ASN1_PARSE_C + +/** + * \def MBEDTLS_ASN1_WRITE_C + * + * Enable the generic ASN1 writer. + * + * Module: library/asn1write.c + * Caller: library/ecdsa.c + * library/pkwrite.c + * library/x509_create.c + * library/x509write_crt.c + * library/x509write_csr.c + */ +#define MBEDTLS_ASN1_WRITE_C + +/** + * \def MBEDTLS_BASE64_C + * + * Enable the Base64 module. + * + * Module: library/base64.c + * Caller: library/pem.c + * + * This module is required for PEM support (required by X.509). + */ +#define MBEDTLS_BASE64_C + +/** + * \def MBEDTLS_BIGNUM_C + * + * Enable the multi-precision integer library. + * + * Module: library/bignum.c + * Caller: library/dhm.c + * library/ecp.c + * library/ecdsa.c + * library/rsa.c + * library/rsa_alt_helpers.c + * library/ssl_tls.c + * + * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support. + */ +#define MBEDTLS_BIGNUM_C + +/** + * \def MBEDTLS_CAMELLIA_C + * + * Enable the Camellia block cipher. + * + * Module: library/camellia.c + * Caller: library/cipher.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 + */ +#define MBEDTLS_CAMELLIA_C + +/** + * \def MBEDTLS_ARIA_C + * + * Enable the ARIA block cipher. + * + * Module: library/aria.c + * Caller: library/cipher.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * + * MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384 + */ +#define MBEDTLS_ARIA_C + +/** + * \def MBEDTLS_CCM_C + * + * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher. + * + * Module: library/ccm.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C + * + * This module enables the AES-CCM ciphersuites, if other requisites are + * enabled as well. + */ +#define MBEDTLS_CCM_C + +/** + * \def MBEDTLS_CHACHA20_C + * + * Enable the ChaCha20 stream cipher. + * + * Module: library/chacha20.c + */ +#define MBEDTLS_CHACHA20_C + +/** + * \def MBEDTLS_CHACHAPOLY_C + * + * Enable the ChaCha20-Poly1305 AEAD algorithm. + * + * Module: library/chachapoly.c + * + * This module requires: MBEDTLS_CHACHA20_C, MBEDTLS_POLY1305_C + */ +#define MBEDTLS_CHACHAPOLY_C + +/** + * \def MBEDTLS_CIPHER_C + * + * Enable the generic cipher layer. + * + * Module: library/cipher.c + * Caller: library/ssl_tls.c + * + * Uncomment to enable generic cipher wrappers. + */ +#define MBEDTLS_CIPHER_C + +/** + * \def MBEDTLS_CMAC_C + * + * Enable the CMAC (Cipher-based Message Authentication Code) mode for block + * ciphers. + * + * \note When #MBEDTLS_CMAC_ALT is active, meaning that the underlying + * implementation of the CMAC algorithm is provided by an alternate + * implementation, that alternate implementation may opt to not support + * AES-192 or 3DES as underlying block ciphers for the CMAC operation. + * + * Module: library/cmac.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C + * + */ +#define MBEDTLS_CMAC_C + +/** + * \def MBEDTLS_CTR_DRBG_C + * + * Enable the CTR_DRBG AES-based random generator. + * The CTR_DRBG generator uses AES-256 by default. + * To use AES-128 instead, enable \c MBEDTLS_CTR_DRBG_USE_128_BIT_KEY above. + * + * \note To achieve a 256-bit security strength with CTR_DRBG, + * you must use AES-256 *and* use sufficient entropy. + * See ctr_drbg.h for more details. + * + * Module: library/ctr_drbg.c + * Caller: + * + * Requires: MBEDTLS_AES_C + * + * This module provides the CTR_DRBG AES random number generator. + */ +#define MBEDTLS_CTR_DRBG_C + +/** + * \def MBEDTLS_DEBUG_C + * + * Enable the debug functions. + * + * Module: library/debug.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module provides debugging functions. + */ +#define MBEDTLS_DEBUG_C + +/** + * \def MBEDTLS_DES_C + * + * Enable the DES block cipher. + * + * Module: library/des.c + * Caller: library/pem.c + * library/cipher.c + * + * PEM_PARSE uses DES/3DES for decrypting encrypted keys. + * + * \warning DES is considered a weak cipher and its use constitutes a + * security risk. We recommend considering stronger ciphers instead. + */ +#define MBEDTLS_DES_C + +/** + * \def MBEDTLS_DHM_C + * + * Enable the Diffie-Hellman-Merkle module. + * + * Module: library/dhm.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module is used by the following key exchanges: + * DHE-RSA, DHE-PSK + * + * \warning Using DHE constitutes a security risk as it + * is not possible to validate custom DH parameters. + * If possible, it is recommended users should consider + * preferring other methods of key exchange. + * See dhm.h for more details. + * + */ +#define MBEDTLS_DHM_C + +/** + * \def MBEDTLS_ECDH_C + * + * Enable the elliptic curve Diffie-Hellman library. + * + * Module: library/ecdh.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module is used by the following key exchanges: + * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK + * + * Requires: MBEDTLS_ECP_C + */ +#define MBEDTLS_ECDH_C + +/** + * \def MBEDTLS_ECDSA_C + * + * Enable the elliptic curve DSA library. + * + * Module: library/ecdsa.c + * Caller: + * + * This module is used by the following key exchanges: + * ECDHE-ECDSA + * + * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C, + * and at least one MBEDTLS_ECP_DP_XXX_ENABLED for a + * short Weierstrass curve. + */ +#define MBEDTLS_ECDSA_C + +/** + * \def MBEDTLS_ECJPAKE_C + * + * Enable the elliptic curve J-PAKE library. + * + * \note EC J-PAKE support is based on the Thread v1.0.0 specification. + * It has not been reviewed for compliance with newer standards such as + * Thread v1.1 or RFC 8236. + * + * Module: library/ecjpake.c + * Caller: + * + * This module is used by the following key exchanges: + * ECJPAKE + * + * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C + */ +#define MBEDTLS_ECJPAKE_C + +/** + * \def MBEDTLS_ECP_C + * + * Enable the elliptic curve over GF(p) library. + * + * Module: library/ecp.c + * Caller: library/ecdh.c + * library/ecdsa.c + * library/ecjpake.c + * + * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED + */ +#define MBEDTLS_ECP_C + +/** + * \def MBEDTLS_ENTROPY_C + * + * Enable the platform-specific entropy code. + * + * Module: library/entropy.c + * Caller: + * + * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C + * + * This module provides a generic entropy pool + */ +#define MBEDTLS_ENTROPY_C + +/** + * \def MBEDTLS_ERROR_C + * + * Enable error code to error string conversion. + * + * Module: library/error.c + * Caller: + * + * This module enables mbedtls_strerror(). + */ +#define MBEDTLS_ERROR_C + +/** + * \def MBEDTLS_GCM_C + * + * Enable the Galois/Counter Mode (GCM). + * + * Module: library/gcm.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C or MBEDTLS_ARIA_C + * + * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other + * requisites are enabled as well. + */ +#define MBEDTLS_GCM_C + +/** + * \def MBEDTLS_HKDF_C + * + * Enable the HKDF algorithm (RFC 5869). + * + * Module: library/hkdf.c + * Caller: + * + * Requires: MBEDTLS_MD_C + * + * This module adds support for the Hashed Message Authentication Code + * (HMAC)-based key derivation function (HKDF). + */ +#define MBEDTLS_HKDF_C + +/** + * \def MBEDTLS_HMAC_DRBG_C + * + * Enable the HMAC_DRBG random generator. + * + * Module: library/hmac_drbg.c + * Caller: + * + * Requires: MBEDTLS_MD_C + * + * Uncomment to enable the HMAC_DRBG random number geerator. + */ +#define MBEDTLS_HMAC_DRBG_C + +/** + * \def MBEDTLS_NIST_KW_C + * + * Enable the Key Wrapping mode for 128-bit block ciphers, + * as defined in NIST SP 800-38F. Only KW and KWP modes + * are supported. At the moment, only AES is approved by NIST. + * + * Module: library/nist_kw.c + * + * Requires: MBEDTLS_AES_C and MBEDTLS_CIPHER_C + */ +#define MBEDTLS_NIST_KW_C + +/** + * \def MBEDTLS_MD_C + * + * Enable the generic message digest layer. + * + * Module: library/md.c + * Caller: + * + * Uncomment to enable generic message digest wrappers. + */ +#define MBEDTLS_MD_C + +/** + * \def MBEDTLS_MD5_C + * + * Enable the MD5 hash algorithm. + * + * Module: library/md5.c + * Caller: library/md.c + * library/pem.c + * library/ssl_tls.c + * + * This module is required for TLS 1.2 depending on the handshake parameters. + * Further, it is used for checking MD5-signed certificates, and for PBKDF1 + * when decrypting PEM-encoded encrypted keys. + * + * \warning MD5 is considered a weak message digest and its use constitutes a + * security risk. If possible, we recommend avoiding dependencies on + * it, and considering stronger message digests instead. + * + */ +#define MBEDTLS_MD5_C + +/** + * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C + * + * Enable the buffer allocator implementation that makes use of a (stack) + * based buffer to 'allocate' dynamic memory. (replaces calloc() and free() + * calls) + * + * Module: library/memory_buffer_alloc.c + * + * Requires: MBEDTLS_PLATFORM_C + * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS) + * + * Enable this module to enable the buffer memory allocator. + */ +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C + +/** + * \def MBEDTLS_NET_C + * + * Enable the TCP and UDP over IPv6/IPv4 networking routines. + * + * \note This module only works on POSIX/Unix (including Linux, BSD and OS X) + * and Windows. For other platforms, you'll want to disable it, and write your + * own networking callbacks to be passed to \c mbedtls_ssl_set_bio(). + * + * \note See also our Knowledge Base article about porting to a new + * environment: + * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS + * + * Module: library/net_sockets.c + * + * This module provides networking routines. + */ +#define MBEDTLS_NET_C + +/** + * \def MBEDTLS_OID_C + * + * Enable the OID database. + * + * Module: library/oid.c + * Caller: library/asn1write.c + * library/pkcs5.c + * library/pkparse.c + * library/pkwrite.c + * library/rsa.c + * library/x509.c + * library/x509_create.c + * library/x509_crl.c + * library/x509_crt.c + * library/x509_csr.c + * library/x509write_crt.c + * library/x509write_csr.c + * + * This modules translates between OIDs and internal values. + */ +#define MBEDTLS_OID_C + +/** + * \def MBEDTLS_PADLOCK_C + * + * Enable VIA Padlock support on x86. + * + * Module: library/padlock.c + * Caller: library/aes.c + * + * Requires: MBEDTLS_HAVE_ASM + * + * This modules adds support for the VIA PadLock on x86. + */ +#define MBEDTLS_PADLOCK_C + +/** + * \def MBEDTLS_PEM_PARSE_C + * + * Enable PEM decoding / parsing. + * + * Module: library/pem.c + * Caller: library/dhm.c + * library/pkparse.c + * library/x509_crl.c + * library/x509_crt.c + * library/x509_csr.c + * + * Requires: MBEDTLS_BASE64_C + * + * This modules adds support for decoding / parsing PEM files. + */ +#define MBEDTLS_PEM_PARSE_C + +/** + * \def MBEDTLS_PEM_WRITE_C + * + * Enable PEM encoding / writing. + * + * Module: library/pem.c + * Caller: library/pkwrite.c + * library/x509write_crt.c + * library/x509write_csr.c + * + * Requires: MBEDTLS_BASE64_C + * + * This modules adds support for encoding / writing PEM files. + */ +#define MBEDTLS_PEM_WRITE_C + +/** + * \def MBEDTLS_PK_C + * + * Enable the generic public (asymetric) key layer. + * + * Module: library/pk.c + * Caller: library/ssl_tls.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C + * + * Uncomment to enable generic public key wrappers. + */ +#define MBEDTLS_PK_C + +/** + * \def MBEDTLS_PK_PARSE_C + * + * Enable the generic public (asymetric) key parser. + * + * Module: library/pkparse.c + * Caller: library/x509_crt.c + * library/x509_csr.c + * + * Requires: MBEDTLS_PK_C + * + * Uncomment to enable generic public key parse functions. + */ +#define MBEDTLS_PK_PARSE_C + +/** + * \def MBEDTLS_PK_WRITE_C + * + * Enable the generic public (asymetric) key writer. + * + * Module: library/pkwrite.c + * Caller: library/x509write.c + * + * Requires: MBEDTLS_PK_C + * + * Uncomment to enable generic public key write functions. + */ +#define MBEDTLS_PK_WRITE_C + +/** + * \def MBEDTLS_PKCS5_C + * + * Enable PKCS#5 functions. + * + * Module: library/pkcs5.c + * + * Requires: MBEDTLS_MD_C + * + * This module adds support for the PKCS#5 functions. + */ +#define MBEDTLS_PKCS5_C + +/** + * \def MBEDTLS_PKCS12_C + * + * Enable PKCS#12 PBE functions. + * Adds algorithms for parsing PKCS#8 encrypted private keys + * + * Module: library/pkcs12.c + * Caller: library/pkparse.c + * + * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C + * + * This module enables PKCS#12 functions. + */ +#define MBEDTLS_PKCS12_C + +/** + * \def MBEDTLS_PLATFORM_C + * + * Enable the platform abstraction layer that allows you to re-assign + * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit(). + * + * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT + * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned + * above to be specified at runtime or compile time respectively. + * + * \note This abstraction layer must be enabled on Windows (including MSYS2) + * as other module rely on it for a fixed snprintf implementation. + * + * Module: library/platform.c + * Caller: Most other .c files + * + * This module enables abstraction of common (libc) functions. + */ +#define MBEDTLS_PLATFORM_C + +/** + * \def MBEDTLS_POLY1305_C + * + * Enable the Poly1305 MAC algorithm. + * + * Module: library/poly1305.c + * Caller: library/chachapoly.c + */ +#define MBEDTLS_POLY1305_C + +/** + * \def MBEDTLS_PSA_CRYPTO_C + * + * Enable the Platform Security Architecture cryptography API. + * + * \warning The PSA Crypto API is still beta status. While you're welcome to + * experiment using it, incompatible API changes are still possible, and some + * parts may not have reached the same quality as the rest of Mbed TLS yet. + * + * Module: library/psa_crypto.c + * + * Requires: either MBEDTLS_CTR_DRBG_C and MBEDTLS_ENTROPY_C, + * or MBEDTLS_HMAC_DRBG_C and MBEDTLS_ENTROPY_C, + * or MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG. + * + */ +#define MBEDTLS_PSA_CRYPTO_C + +/** + * \def MBEDTLS_PSA_CRYPTO_SE_C + * + * Enable secure element support in the Platform Security Architecture + * cryptography API. + * + * \warning This feature is not yet suitable for production. It is provided + * for API evaluation and testing purposes only. + * + * Module: library/psa_crypto_se.c + * + * Requires: MBEDTLS_PSA_CRYPTO_C, MBEDTLS_PSA_CRYPTO_STORAGE_C + * + */ +//#define MBEDTLS_PSA_CRYPTO_SE_C + +/** + * \def MBEDTLS_PSA_CRYPTO_STORAGE_C + * + * Enable the Platform Security Architecture persistent key storage. + * + * Module: library/psa_crypto_storage.c + * + * Requires: MBEDTLS_PSA_CRYPTO_C, + * either MBEDTLS_PSA_ITS_FILE_C or a native implementation of + * the PSA ITS interface + */ +#define MBEDTLS_PSA_CRYPTO_STORAGE_C + +/** + * \def MBEDTLS_PSA_ITS_FILE_C + * + * Enable the emulation of the Platform Security Architecture + * Internal Trusted Storage (PSA ITS) over files. + * + * Module: library/psa_its_file.c + * + * Requires: MBEDTLS_FS_IO + */ +#define MBEDTLS_PSA_ITS_FILE_C + +/** + * \def MBEDTLS_RIPEMD160_C + * + * Enable the RIPEMD-160 hash algorithm. + * + * Module: library/ripemd160.c + * Caller: library/md.c + * + */ +#define MBEDTLS_RIPEMD160_C + +/** + * \def MBEDTLS_RSA_C + * + * Enable the RSA public-key cryptosystem. + * + * Module: library/rsa.c + * library/rsa_alt_helpers.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509.c + * + * This module is used by the following key exchanges: + * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK + * + * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C + */ +#define MBEDTLS_RSA_C + +/** + * \def MBEDTLS_SHA1_C + * + * Enable the SHA1 cryptographic hash algorithm. + * + * Module: library/sha1.c + * Caller: library/md.c + * library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509write_crt.c + * + * This module is required for TLS 1.2 depending on the handshake parameters, + * and for SHA1-signed certificates. + * + * \warning SHA-1 is considered a weak message digest and its use constitutes + * a security risk. If possible, we recommend avoiding dependencies + * on it, and considering stronger message digests instead. + * + */ +#define MBEDTLS_SHA1_C + +/** + * \def MBEDTLS_SHA224_C + * + * Enable the SHA-224 cryptographic hash algorithm. + * + * Requires: MBEDTLS_SHA256_C. The library does not currently support enabling + * SHA-224 without SHA-256. + * + * Module: library/sha256.c + * Caller: library/md.c + * library/ssl_cookie.c + * + * This module adds support for SHA-224. + */ +#define MBEDTLS_SHA224_C + +/** + * \def MBEDTLS_SHA256_C + * + * Enable the SHA-256 cryptographic hash algorithm. + * + * Requires: MBEDTLS_SHA224_C. The library does not currently support enabling + * SHA-256 without SHA-224. + * + * Module: library/sha256.c + * Caller: library/entropy.c + * library/md.c + * library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module adds support for SHA-256. + * This module is required for the SSL/TLS 1.2 PRF function. + */ +#define MBEDTLS_SHA256_C + +/** + * \def MBEDTLS_SHA384_C + * + * Enable the SHA-384 cryptographic hash algorithm. + * + * Requires: MBEDTLS_SHA512_C + * + * Module: library/sha512.c + * Caller: library/md.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * Comment to disable SHA-384 + */ +#define MBEDTLS_SHA384_C + +/** + * \def MBEDTLS_SHA512_C + * + * Enable SHA-512 cryptographic hash algorithms. + * + * Module: library/sha512.c + * Caller: library/entropy.c + * library/md.c + * library/ssl_tls.c + * library/ssl_cookie.c + * + * This module adds support for SHA-512. + */ +#define MBEDTLS_SHA512_C + +/** + * \def MBEDTLS_SSL_CACHE_C + * + * Enable simple SSL cache implementation. + * + * Module: library/ssl_cache.c + * Caller: + * + * Requires: MBEDTLS_SSL_CACHE_C + */ +#define MBEDTLS_SSL_CACHE_C + +/** + * \def MBEDTLS_SSL_COOKIE_C + * + * Enable basic implementation of DTLS cookies for hello verification. + * + * Module: library/ssl_cookie.c + * Caller: + */ +#define MBEDTLS_SSL_COOKIE_C + +/** + * \def MBEDTLS_SSL_TICKET_C + * + * Enable an implementation of TLS server-side callbacks for session tickets. + * + * Module: library/ssl_ticket.c + * Caller: + * + * Requires: MBEDTLS_CIPHER_C + */ +#define MBEDTLS_SSL_TICKET_C + +/** + * \def MBEDTLS_SSL_CLI_C + * + * Enable the SSL/TLS client code. + * + * Module: library/ssl_cli.c + * Caller: + * + * Requires: MBEDTLS_SSL_TLS_C + * + * This module is required for SSL/TLS client support. + */ +#define MBEDTLS_SSL_CLI_C + +/** + * \def MBEDTLS_SSL_SRV_C + * + * Enable the SSL/TLS server code. + * + * Module: library/ssl_srv.c + * Caller: + * + * Requires: MBEDTLS_SSL_TLS_C + * + * This module is required for SSL/TLS server support. + */ +#define MBEDTLS_SSL_SRV_C + +/** + * \def MBEDTLS_SSL_TLS_C + * + * Enable the generic SSL/TLS code. + * + * Module: library/ssl_tls.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C + * and at least one of the MBEDTLS_SSL_PROTO_XXX defines + * + * This module is required for SSL/TLS. + */ +#define MBEDTLS_SSL_TLS_C + +/** + * \def MBEDTLS_THREADING_C + * + * Enable the threading abstraction layer. + * By default mbed TLS assumes it is used in a non-threaded environment or that + * contexts are not shared between threads. If you do intend to use contexts + * between threads, you will need to enable this layer to prevent race + * conditions. See also our Knowledge Base article about threading: + * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading + * + * Module: library/threading.c + * + * This allows different threading implementations (self-implemented or + * provided). + * + * You will have to enable either MBEDTLS_THREADING_ALT or + * MBEDTLS_THREADING_PTHREAD. + * + * Enable this layer to allow use of mutexes within mbed TLS + */ +//#define MBEDTLS_THREADING_C + +/** + * \def MBEDTLS_TIMING_C + * + * Enable the semi-portable timing interface. + * + * \note The provided implementation only works on POSIX/Unix (including Linux, + * BSD and OS X) and Windows. On other platforms, you can either disable that + * module and provide your own implementations of the callbacks needed by + * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide + * your own implementation of the whole module by setting + * \c MBEDTLS_TIMING_ALT in the current file. + * + * \note See also our Knowledge Base article about porting to a new + * environment: + * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS + * + * Module: library/timing.c + */ +#define MBEDTLS_TIMING_C + +/** + * \def MBEDTLS_VERSION_C + * + * Enable run-time version information. + * + * Module: library/version.c + * + * This module provides run-time version information. + */ +#define MBEDTLS_VERSION_C + +/** + * \def MBEDTLS_X509_USE_C + * + * Enable X.509 core for using certificates. + * + * Module: library/x509.c + * Caller: library/x509_crl.c + * library/x509_crt.c + * library/x509_csr.c + * + * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, + * MBEDTLS_PK_PARSE_C + * + * This module is required for the X.509 parsing modules. + */ +#define MBEDTLS_X509_USE_C + +/** + * \def MBEDTLS_X509_CRT_PARSE_C + * + * Enable X.509 certificate parsing. + * + * Module: library/x509_crt.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is required for X.509 certificate parsing. + */ +#define MBEDTLS_X509_CRT_PARSE_C + +/** + * \def MBEDTLS_X509_CRL_PARSE_C + * + * Enable X.509 CRL parsing. + * + * Module: library/x509_crl.c + * Caller: library/x509_crt.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is required for X.509 CRL parsing. + */ +#define MBEDTLS_X509_CRL_PARSE_C + +/** + * \def MBEDTLS_X509_CSR_PARSE_C + * + * Enable X.509 Certificate Signing Request (CSR) parsing. + * + * Module: library/x509_csr.c + * Caller: library/x509_crt_write.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is used for reading X.509 certificate request. + */ +#define MBEDTLS_X509_CSR_PARSE_C + +/** + * \def MBEDTLS_X509_CREATE_C + * + * Enable X.509 core for creating certificates. + * + * Module: library/x509_create.c + * + * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C + * + * This module is the basis for creating X.509 certificates and CSRs. + */ +#define MBEDTLS_X509_CREATE_C + +/** + * \def MBEDTLS_X509_CRT_WRITE_C + * + * Enable creating X.509 certificates. + * + * Module: library/x509_crt_write.c + * + * Requires: MBEDTLS_X509_CREATE_C + * + * This module is required for X.509 certificate creation. + */ +#define MBEDTLS_X509_CRT_WRITE_C + +/** + * \def MBEDTLS_X509_CSR_WRITE_C + * + * Enable creating X.509 Certificate Signing Requests (CSR). + * + * Module: library/x509_csr_write.c + * + * Requires: MBEDTLS_X509_CREATE_C + * + * This module is required for X.509 certificate request writing. + */ +#define MBEDTLS_X509_CSR_WRITE_C + +/* \} name SECTION: mbed TLS modules */ + +/** + * \name SECTION: Module configuration options + * + * This section allows for the setting of module specific sizes and + * configuration options. The default values are already present in the + * relevant header files and should suffice for the regular use cases. + * + * Our advice is to enable options and change their values here + * only if you have a good reason and know the consequences. + * + * Please check the respective header file for documentation on these + * parameters (to prevent duplicate documentation). + * \{ + */ + +/* MPI / BIGNUM options */ +//#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum window size used. */ +//#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */ + +/* CTR_DRBG options */ +//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */ +//#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +//#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +//#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ + +/* HMAC_DRBG options */ +//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ + +/* ECP options */ +//#define MBEDTLS_ECP_WINDOW_SIZE 4 /**< Maximum window size used */ +//#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */ + +/* Entropy options */ +//#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */ +//#define MBEDTLS_ENTROPY_MAX_GATHER 128 /**< Maximum amount requested from entropy sources */ +//#define MBEDTLS_ENTROPY_MIN_HARDWARE 32 /**< Default minimum number of bytes required for the hardware entropy source mbedtls_hardware_poll() before entropy is released */ + +/* Memory buffer allocator options */ +//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */ + +/* Platform options */ +//#define MBEDTLS_PLATFORM_STD_MEM_HDR /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */ +//#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_TIME time /**< Default time to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */ +//#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can be undefined */ +/* Note: your snprintf must correctly zero-terminate the buffer! */ +//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS 0 /**< Default exit value to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE 1 /**< Default exit value to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_NV_SEED_READ mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE "seedfile" /**< Seed file to read/write with default implementation */ + +/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */ +/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */ +//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_TIME_MACRO time /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */ +//#define MBEDTLS_PLATFORM_TIME_TYPE_MACRO time_t /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */ +//#define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can be undefined */ +#define MBEDTLS_PLATFORM_PRINTF_MACRO ets_printf /**< Default printf macro to use, can be undefined */ +/* Note: your snprintf must correctly zero-terminate the buffer! */ +//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_VSNPRINTF_MACRO vsnprintf /**< Default vsnprintf macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */ +//#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */ + +/* PSA options */ +/** + * Use HMAC_DRBG with the specified hash algorithm for HMAC_DRBG for the + * PSA crypto subsystem. + * + * If this option is unset: + * - If CTR_DRBG is available, the PSA subsystem uses it rather than HMAC_DRBG. + * - Otherwise, the PSA subsystem uses HMAC_DRBG with either + * #MBEDTLS_MD_SHA512 or #MBEDTLS_MD_SHA256 based on availability and + * on unspecified heuristics. + */ +//#define MBEDTLS_PSA_HMAC_DRBG_MD_TYPE MBEDTLS_MD_SHA256 + +/** \def MBEDTLS_PSA_KEY_SLOT_COUNT + * Restrict the PSA library to supporting a maximum amount of simultaneously + * loaded keys. A loaded key is a key stored by the PSA Crypto core as a + * volatile key, or a persistent key which is loaded temporarily by the + * library as part of a crypto operation in flight. + * + * If this option is unset, the library will fall back to a default value of + * 32 keys. + */ +//#define MBEDTLS_PSA_KEY_SLOT_COUNT 32 + +/* SSL Cache options */ +//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */ +//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */ + +/* SSL options */ + +/** \def MBEDTLS_SSL_IN_CONTENT_LEN + * + * Maximum length (in bytes) of incoming plaintext fragments. + * + * This determines the size of the incoming TLS I/O buffer in such a way + * that it is capable of holding the specified amount of plaintext data, + * regardless of the protection mechanism used. + * + * \note When using a value less than the default of 16KB on the client, it is + * recommended to use the Maximum Fragment Length (MFL) extension to + * inform the server about this limitation. On the server, there + * is no supported, standardized way of informing the client about + * restriction on the maximum size of incoming messages, and unless + * the limitation has been communicated by other means, it is recommended + * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN + * while keeping the default value of 16KB for the incoming buffer. + * + * Uncomment to set the maximum plaintext size of the incoming I/O buffer. + */ +//#define MBEDTLS_SSL_IN_CONTENT_LEN 16384 + +/** \def MBEDTLS_SSL_CID_IN_LEN_MAX + * + * The maximum length of CIDs used for incoming DTLS messages. + * + */ +//#define MBEDTLS_SSL_CID_IN_LEN_MAX 32 + +/** \def MBEDTLS_SSL_CID_OUT_LEN_MAX + * + * The maximum length of CIDs used for outgoing DTLS messages. + * + */ +//#define MBEDTLS_SSL_CID_OUT_LEN_MAX 32 + +/** \def MBEDTLS_SSL_CID_TLS1_3_PADDING_GRANULARITY + * + * This option controls the use of record plaintext padding + * in TLS 1.3 and when using the Connection ID extension in DTLS 1.2. + * + * The padding will always be chosen so that the length of the + * padded plaintext is a multiple of the value of this option. + * + * Note: A value of \c 1 means that no padding will be used + * for outgoing records. + * + * Note: On systems lacking division instructions, + * a power of two should be preferred. + */ +//#define MBEDTLS_SSL_CID_TLS1_3_PADDING_GRANULARITY 16 + +/** \def MBEDTLS_SSL_OUT_CONTENT_LEN + * + * Maximum length (in bytes) of outgoing plaintext fragments. + * + * This determines the size of the outgoing TLS I/O buffer in such a way + * that it is capable of holding the specified amount of plaintext data, + * regardless of the protection mechanism used. + * + * It is possible to save RAM by setting a smaller outward buffer, while keeping + * the default inward 16384 byte buffer to conform to the TLS specification. + * + * The minimum required outward buffer size is determined by the handshake + * protocol's usage. Handshaking will fail if the outward buffer is too small. + * The specific size requirement depends on the configured ciphers and any + * certificate data which is sent during the handshake. + * + * Uncomment to set the maximum plaintext size of the outgoing I/O buffer. + */ +//#define MBEDTLS_SSL_OUT_CONTENT_LEN 16384 + +/** \def MBEDTLS_SSL_DTLS_MAX_BUFFERING + * + * Maximum number of heap-allocated bytes for the purpose of + * DTLS handshake message reassembly and future message buffering. + * + * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN + * to account for a reassembled handshake message of maximum size, + * together with its reassembly bitmap. + * + * A value of 2 * MBEDTLS_SSL_IN_CONTENT_LEN (32768 by default) + * should be sufficient for all practical situations as it allows + * to reassembly a large handshake message (such as a certificate) + * while buffering multiple smaller handshake messages. + * + */ +//#define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768 + +//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */ +//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */ + +/** + * Complete list of ciphersuites to use, in order of preference. + * + * \warning No dependency checking is done on that field! This option can only + * be used to restrict the set of available ciphersuites. It is your + * responsibility to make sure the needed modules are active. + * + * Use this to save a few hundred bytes of ROM (default ordering of all + * available ciphersuites) and a few to a few hundred bytes of RAM. + * + * The value below is only an example, not the default. + */ +//#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + +/* X509 options */ +//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */ +//#define MBEDTLS_X509_MAX_FILE_PATH_LEN 512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */ + +/** + * Uncomment the macro to let mbed TLS use your alternate implementation of + * mbedtls_platform_zeroize(). This replaces the default implementation in + * platform_util.c. + * + * mbedtls_platform_zeroize() is a widely used function across the library to + * zero a block of memory. The implementation is expected to be secure in the + * sense that it has been written to prevent the compiler from removing calls + * to mbedtls_platform_zeroize() as part of redundant code elimination + * optimizations. However, it is difficult to guarantee that calls to + * mbedtls_platform_zeroize() will not be optimized by the compiler as older + * versions of the C language standards do not provide a secure implementation + * of memset(). Therefore, MBEDTLS_PLATFORM_ZEROIZE_ALT enables users to + * configure their own implementation of mbedtls_platform_zeroize(), for + * example by using directives specific to their compiler, features from newer + * C standards (e.g using memset_s() in C11) or calling a secure memset() from + * their system (e.g explicit_bzero() in BSD). + */ +//#define MBEDTLS_PLATFORM_ZEROIZE_ALT + +/** + * Uncomment the macro to let Mbed TLS use your alternate implementation of + * mbedtls_platform_gmtime_r(). This replaces the default implementation in + * platform_util.c. + * + * gmtime() is not a thread-safe function as defined in the C standard. The + * library will try to use safer implementations of this function, such as + * gmtime_r() when available. However, if Mbed TLS cannot identify the target + * system, the implementation of mbedtls_platform_gmtime_r() will default to + * using the standard gmtime(). In this case, calls from the library to + * gmtime() will be guarded by the global mutex mbedtls_threading_gmtime_mutex + * if MBEDTLS_THREADING_C is enabled. We recommend that calls from outside the + * library are also guarded with this mutex to avoid race conditions. However, + * if the macro MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, Mbed TLS will + * unconditionally use the implementation for mbedtls_platform_gmtime_r() + * supplied at compile time. + */ +//#define MBEDTLS_PLATFORM_GMTIME_R_ALT + +/** + * Enable the verified implementations of ECDH primitives from Project Everest + * (currently only Curve25519). This feature changes the layout of ECDH + * contexts and therefore is a compatibility break for applications that access + * fields of a mbedtls_ecdh_context structure directly. See also + * MBEDTLS_ECDH_LEGACY_CONTEXT in include/mbedtls/ecdh.h. + */ +//#define MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED + +/* \} name SECTION: Customisation configuration options */ diff --git a/bootloader/mcuboot/boot/espressif/include/crypto_config/rsa.cmake b/bootloader/mcuboot/boot/espressif/include/crypto_config/rsa.cmake new file mode 100644 index 0000000..ee146cd --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/include/crypto_config/rsa.cmake @@ -0,0 +1,28 @@ +# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. +# +# SPDX-License-Identifier: Apache-2.0 + +if (DEFINED CONFIG_ESP_USE_MBEDTLS) + set(MBEDTLS_DIR ${MCUBOOT_ROOT_DIR}/ext/mbedtls) + set(CRYPTO_INC + ${MBEDTLS_DIR}/include + ) + set(crypto_srcs + ${ESPRESSIF_PORT_DIR}/keys.c + ${MBEDTLS_DIR}/library/platform.c + ${MBEDTLS_DIR}/library/platform_util.c + ${MBEDTLS_DIR}/library/sha256.c + ${MBEDTLS_DIR}/library/rsa.c + ${MBEDTLS_DIR}/library/bignum.c + ${MBEDTLS_DIR}/library/asn1parse.c + ${MBEDTLS_DIR}/library/md.c + ${MBEDTLS_DIR}/library/memory_buffer_alloc.c + ) + if (DEFINED MBEDTLS_CONFIG_FILE) + add_definitions(-DMBEDTLS_CONFIG_FILE=\"${MBEDTLS_CONFIG_FILE}\") + else() + add_definitions(-DMBEDTLS_CONFIG_FILE=\"${ESPRESSIF_PORT_DIR}/include/crypto_config/mbedtls_custom_config.h\") + endif() +elseif (DEFINED CONFIG_ESP_USE_TINYCRYPT) + message(FATAL_ERROR "RSA signature verification using Tinycrypt lib is not supported") +endif() \ No newline at end of file diff --git a/bootloader/mcuboot/boot/espressif/include/esp_loader.h b/bootloader/mcuboot/boot/espressif/include/esp_loader.h new file mode 100644 index 0000000..480022c --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/include/esp_loader.h @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +void start_cpu0_image(int image_index, int slot, unsigned int hdr_offset); +#ifdef CONFIG_ESP_MULTI_PROCESSOR_BOOT +void start_cpu1_image(int image_index, int slot, unsigned int hdr_offset); +#endif + +void esp_app_image_load(int image_index, int slot, unsigned int hdr_offset, unsigned int *entry_addr); diff --git a/bootloader/mcuboot/boot/espressif/include/flash_map_backend/flash_map_backend.h b/bootloader/mcuboot/boot/espressif/include/flash_map_backend/flash_map_backend.h new file mode 100644 index 0000000..4bd3d2e --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/include/flash_map_backend/flash_map_backend.h @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include + +struct flash_area { + uint8_t fa_id; /** The slot/scratch identification */ + uint8_t fa_device_id; /** The device id (usually there's only one) */ + uint16_t pad16; + uint32_t fa_off; /** The flash offset from the beginning */ + uint32_t fa_size; /** The size of this sector */ +}; + +//! Structure describing a sector within a flash area. +struct flash_sector { + //! Offset of this sector, from the start of its flash area (not device). + uint32_t fs_off; + + //! Size of this sector, in bytes. + uint32_t fs_size; +}; + +static inline uint8_t flash_area_get_device_id(const struct flash_area *fa) +{ + return (uint8_t)fa->fa_device_id; +} +static inline uint32_t flash_area_get_off(const struct flash_area *fa) +{ + return (uint32_t)fa->fa_off; +} + +static inline uint32_t flash_area_get_size(const struct flash_area *fa) +{ + return (uint32_t)fa->fa_size; +} + +static inline uint8_t flash_area_get_id(const struct flash_area *fa) +{ + return fa->fa_id; +} + +static inline uint32_t flash_sector_get_off(const struct flash_sector *fs) +{ + return fs->fs_off; +} + +static inline uint32_t flash_sector_get_size(const struct flash_sector *fs) +{ + return fs->fs_size; +} + +//! Opens the area for use. id is one of the `fa_id`s */ +int flash_area_open(uint8_t id, const struct flash_area **area_outp); +void flash_area_close(const struct flash_area *fa); + +//! Reads `len` bytes of flash memory at `off` to the buffer at `dst` +int flash_area_read(const struct flash_area *fa, uint32_t off, + void *dst, uint32_t len); +//! Writes `len` bytes of flash memory at `off` from the buffer at `src` +int flash_area_write(const struct flash_area *fa, uint32_t off, + const void *src, uint32_t len); +//! Erases `len` bytes of flash memory at `off` +int flash_area_erase(const struct flash_area *fa, + uint32_t off, uint32_t len); + +//! Returns this `flash_area`s alignment +uint32_t flash_area_align(const struct flash_area *area); +//! Returns the value read from an erased flash area byte +uint8_t flash_area_erased_val(const struct flash_area *area); + +//! Given flash area ID, return info about sectors within the area +int flash_area_get_sectors(int fa_id, uint32_t *count, + struct flash_sector *sectors); + +//! Retrieve the flash sector a given offset belongs to. +int flash_area_sector_from_off(uint32_t off, struct flash_sector *sector); + +//! Retrieve the flash sector a given offset belongs to. +int flash_area_get_sector(const struct flash_area *area, uint32_t off, + struct flash_sector *sector); + +//! Returns the `fa_id` for slot, where slot is 0 (primary) or 1 (secondary). +//! +//! `image_index` (0 or 1) is the index of the image. Image index is +//! relevant only when multi-image support support is enabled +int flash_area_id_from_multi_image_slot(int image_index, int slot); +int flash_area_id_from_image_slot(int slot); +int flash_area_to_sectors(int idx, int *cnt, struct flash_area *fa); diff --git a/bootloader/mcuboot/boot/espressif/include/os/os.h b/bootloader/mcuboot/boot/espressif/include/os/os.h new file mode 100644 index 0000000..e69de29 diff --git a/bootloader/mcuboot/boot/espressif/include/os/os_malloc.h b/bootloader/mcuboot/boot/espressif/include/os/os_malloc.h new file mode 100644 index 0000000..6ca5c46 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/include/os/os_malloc.h @@ -0,0 +1,11 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include + +void os_heap_init(void); diff --git a/bootloader/mcuboot/boot/espressif/include/serial_adapter/serial_adapter.h b/bootloader/mcuboot/boot/espressif/include/serial_adapter/serial_adapter.h new file mode 100644 index 0000000..1502ec3 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/include/serial_adapter/serial_adapter.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +/** + * Serial write implementation used by MCUboot boot serial structure + * in boot_serial.h + */ +void console_write(const char *str, int cnt); + +/** + * Serial read implementation used by MCUboot boot serial structure + * in boot_serial.h + */ +int console_read(char *str, int str_cnt, int *newline); + +/** + * Initialize GPIOs used by console serial read/write + */ +void boot_console_init(void); + +/** + * Check if serial recovery detection pin is active + */ +bool boot_serial_detect_pin(void); diff --git a/bootloader/mcuboot/boot/espressif/include/sysflash/sysflash.h b/bootloader/mcuboot/boot/espressif/include/sysflash/sysflash.h new file mode 100644 index 0000000..5419853 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/include/sysflash/sysflash.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include + +//! A user-defined identifier for different storage mediums +//! (i.e internal flash, external NOR flash, eMMC, etc) +#define FLASH_DEVICE_INTERNAL_FLASH 0 + +//! An arbitrarily high slot ID we will use to indicate that +//! there is not slot +#define FLASH_SLOT_DOES_NOT_EXIST 255 + +//! The slot we will use to track the bootloader allocation +#define FLASH_AREA_BOOTLOADER 0 + +#define FLASH_AREA_IMAGE_0_PRIMARY 1 +#define FLASH_AREA_IMAGE_0_SECONDARY 2 +#define FLASH_AREA_IMAGE_SCRATCH 3 +#define FLASH_AREA_IMAGE_1_PRIMARY 4 +#define FLASH_AREA_IMAGE_1_SECONDARY 5 + +#if (MCUBOOT_IMAGE_NUMBER == 1) +#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_0_PRIMARY : \ + FLASH_SLOT_DOES_NOT_EXIST) +#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_0_SECONDARY : \ + FLASH_SLOT_DOES_NOT_EXIST) + +#elif (MCUBOOT_IMAGE_NUMBER == 2) +#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_0_PRIMARY : \ + ((x) == 1) ? \ + FLASH_AREA_IMAGE_1_PRIMARY : \ + FLASH_SLOT_DOES_NOT_EXIST) +#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_0_SECONDARY : \ + ((x) == 1) ? \ + FLASH_AREA_IMAGE_1_SECONDARY : \ + FLASH_SLOT_DOES_NOT_EXIST) + +#else +#warning "Image slot and flash area mapping is not defined" +#endif diff --git a/bootloader/mcuboot/boot/espressif/keys.c b/bootloader/mcuboot/boot/espressif/keys.c new file mode 100644 index 0000000..1b62a6b --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/keys.c @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#if !defined(MCUBOOT_HW_KEY) +#if defined(MCUBOOT_SIGN_RSA) +#define HAVE_KEYS +extern const unsigned char rsa_pub_key[]; +extern const unsigned int rsa_pub_key_len; +#elif defined(MCUBOOT_SIGN_EC256) +#define HAVE_KEYS +extern const unsigned char ecdsa_pub_key[]; +extern const unsigned int ecdsa_pub_key_len; +#elif defined(MCUBOOT_SIGN_ED25519) +#define HAVE_KEYS +extern const unsigned char ed25519_pub_key[]; +extern const unsigned int ed25519_pub_key_len; +#endif + +/* + * NOTE: *_pub_key and *_pub_key_len are autogenerated based on the provided + * key file. If no key file was configured, the array and length must be + * provided and added to the build manually. + */ +#if defined(HAVE_KEYS) +const struct bootutil_key bootutil_keys[] = { + { +#if defined(MCUBOOT_SIGN_RSA) + .key = rsa_pub_key, + .len = &rsa_pub_key_len, +#elif defined(MCUBOOT_SIGN_EC256) + .key = ecdsa_pub_key, + .len = &ecdsa_pub_key_len, +#elif defined(MCUBOOT_SIGN_ED25519) + .key = ed25519_pub_key, + .len = &ed25519_pub_key_len, +#endif + }, +}; +const int bootutil_key_cnt = 1; +#endif /* HAVE_KEYS */ +#else +unsigned int pub_key_len; +struct bootutil_key bootutil_keys[1] = { + { + .key = 0, + .len = &pub_key_len, + } +}; +const int bootutil_key_cnt = 1; +#endif /* !MCUBOOT_HW_KEY */ diff --git a/bootloader/mcuboot/boot/espressif/main.c b/bootloader/mcuboot/boot/espressif/main.c new file mode 100644 index 0000000..3f4d5a0 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/main.c @@ -0,0 +1,298 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +#include "bootloader_init.h" +#include "bootloader_utility.h" +#include "bootloader_random.h" +#include "bootloader_soc.h" + +#include "esp_assert.h" + +#ifdef CONFIG_MCUBOOT_SERIAL +#include "boot_serial/boot_serial.h" +#include "serial_adapter/serial_adapter.h" + +const struct boot_uart_funcs boot_funcs = { + .read = console_read, + .write = console_write +}; +#endif + +#if defined(CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH) || defined(CONFIG_SECURE_BOOT) +#include "esp_efuse.h" +#endif +#ifdef CONFIG_SECURE_BOOT +#include "esp_secure_boot.h" +#endif +#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED +#include "esp_flash_encrypt.h" +#endif + +#include "esp_loader.h" +#include "os/os_malloc.h" + +#define IMAGE_INDEX_0 0 +#define IMAGE_INDEX_1 1 + +#define PRIMARY_SLOT 0 +#define SECONDARY_SLOT 1 + +#ifdef CONFIG_SECURE_BOOT +extern esp_err_t check_and_generate_secure_boot_keys(void); +#endif + +void do_boot(struct boot_rsp *rsp) +{ + BOOT_LOG_INF("br_image_off = 0x%x", rsp->br_image_off); + BOOT_LOG_INF("ih_hdr_size = 0x%x", rsp->br_hdr->ih_hdr_size); + int slot = (rsp->br_image_off == CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS) ? PRIMARY_SLOT : SECONDARY_SLOT; + start_cpu0_image(IMAGE_INDEX_0, slot, rsp->br_hdr->ih_hdr_size); +} + +#ifdef CONFIG_ESP_MULTI_PROCESSOR_BOOT +int read_image_header(uint32_t img_index, uint32_t slot, struct image_header *img_header) +{ + const struct flash_area *fap; + int area_id; + int rc = 0; + + area_id = flash_area_id_from_multi_image_slot(img_index, slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + rc = BOOT_EFLASH; + goto done; + } + + if (flash_area_read(fap, 0, img_header, sizeof(struct image_header))) { + rc = BOOT_EFLASH; + goto done; + } + + BOOT_LOG_INF("Image offset = 0x%x", fap->fa_off); + BOOT_LOG_INF("Image header size = 0x%x", img_header->ih_hdr_size); + +done: + flash_area_close(fap); + return rc; +} + +void do_boot_appcpu(uint32_t img_index, uint32_t slot) +{ + struct image_header img_header; + + if (read_image_header(img_index, slot, &img_header) != 0) { + FIH_PANIC; + } + + start_cpu1_image(img_index, slot, img_header.ih_hdr_size); +} +#endif + +int main() +{ + if (bootloader_init() != ESP_OK) { + FIH_PANIC; + } + + /* Rough steps for a first boot when Secure Boot and/or Flash Encryption are still disabled on device: + * Secure Boot: + * 1) Calculate the SHA-256 hash digest of the public key and write to EFUSE. + * 2) Validate the application images and prepare the booting process. + * 3) Burn EFUSE to enable Secure Boot V2 (ABS_DONE_0). + * Flash Encryption: + * 4) Generate Flash Encryption key and write to EFUSE. + * 5) Encrypt flash in-place including bootloader, image primary/secondary slot and scratch. + * 6) Burn EFUSE to enable Flash Encryption. + * 7) Reset system to ensure Flash Encryption cache resets properly. + */ + +#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH + BOOT_LOG_WRN("eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!"); + esp_efuse_init_virtual_mode_in_flash(CONFIG_EFUSE_VIRTUAL_OFFSET, CONFIG_EFUSE_VIRTUAL_SIZE); +#endif + +#if defined(CONFIG_SECURE_BOOT) || defined(CONFIG_SECURE_FLASH_ENC_ENABLED) + esp_err_t err; +#endif + +#ifdef CONFIG_SECURE_BOOT_FLASH_ENC_KEYS_BURN_TOGETHER + if (esp_secure_boot_enabled() ^ esp_flash_encrypt_initialized_once()) { + BOOT_LOG_ERR("Secure Boot and Flash Encryption cannot be enabled separately, only together (their keys go into one eFuse key block)"); + FIH_PANIC; + } + + if (!esp_secure_boot_enabled() || !esp_flash_encryption_enabled()) { + esp_efuse_batch_write_begin(); + } +#endif // CONFIG_SECURE_BOOT_FLASH_ENC_KEYS_BURN_TOGETHER + +#ifdef CONFIG_SECURE_BOOT + /* Steps 1 (see above for full description): + * 1) Compute digest of the public key. + */ + + BOOT_LOG_INF("enabling secure boot v2..."); + + bool sb_hw_enabled = esp_secure_boot_enabled(); + + if (sb_hw_enabled) { + BOOT_LOG_INF("secure boot v2 is already enabled, continuing.."); + } else { + esp_efuse_batch_write_begin(); /* Batch all efuse writes at the end of this function */ + + err = check_and_generate_secure_boot_keys(); + if (err != ESP_OK) { + esp_efuse_batch_write_cancel(); + FIH_PANIC; + } + } +#endif + + os_heap_init(); + + struct boot_rsp rsp; + + FIH_DECLARE(fih_rc, FIH_FAILURE); + +#ifdef CONFIG_MCUBOOT_SERIAL + boot_console_init(); + if (boot_serial_detect_pin()) { + BOOT_LOG_INF("Enter the serial recovery mode"); + boot_serial_start(&boot_funcs); + } +#endif + + /* Step 2 (see above for full description): + * 2) MCUboot validates the application images and prepares the booting process. + */ + + /* MCUboot's boot_go validates and checks all images for update and returns + * the load information for booting the main image + */ + FIH_CALL(boot_go, fih_rc, &rsp); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + BOOT_LOG_ERR("Unable to find bootable image"); +#ifdef CONFIG_SECURE_BOOT + esp_efuse_batch_write_cancel(); +#endif + FIH_PANIC; + } + +#ifdef CONFIG_SECURE_BOOT + /* Step 3 (see above for full description): + * 3) Burn EFUSE to enable Secure Boot V2. + */ + + if (!sb_hw_enabled) { + BOOT_LOG_INF("blowing secure boot efuse..."); + err = esp_secure_boot_enable_secure_features(); + if (err != ESP_OK) { + esp_efuse_batch_write_cancel(); + FIH_PANIC; + } + + err = esp_efuse_batch_write_commit(); + if (err != ESP_OK) { + BOOT_LOG_ERR("Error programming security eFuses (err=0x%x).", err); + FIH_PANIC; + } + +#ifdef CONFIG_SECURE_BOOT_ENABLE_AGGRESSIVE_KEY_REVOKE + assert(esp_efuse_read_field_bit(ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE)); +#endif + +#ifndef CONFIG_SECURE_BOOT_FLASH_ENC_KEYS_BURN_TOGETHER + assert(esp_secure_boot_enabled()); + BOOT_LOG_INF("Secure boot permanently enabled"); +#endif + } +#endif + +#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED + /* Step 4, 5 & 6 (see above for full description): + * 4) Generate Flash Encryption key and write to EFUSE. + * 5) Encrypt flash in-place including bootloader, image primary/secondary slot and scratch. + * 6) Burn EFUSE to enable flash encryption + */ + BOOT_LOG_INF("Checking flash encryption..."); + bool flash_encryption_enabled = esp_flash_encrypt_state(); + if (!flash_encryption_enabled) { +#ifdef CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED + BOOT_LOG_ERR("flash encryption is not enabled, and SECURE_FLASH_REQUIRE_ALREADY_ENABLED is set, refusing to boot."); + FIH_PANIC; +#endif // CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED + + if (esp_flash_encrypt_is_write_protected(true)) { + FIH_PANIC; + } + + err = esp_flash_encrypt_init(); + if (err != ESP_OK) { + BOOT_LOG_ERR("Initialization of Flash Encryption key failed (%d)", err); + FIH_PANIC; + } + } + + if (!flash_encryption_enabled) { + err = esp_flash_encrypt_contents(); + if (err != ESP_OK) { + BOOT_LOG_ERR("Encryption flash contents failed (%d)", err); + FIH_PANIC; + } + + err = esp_flash_encrypt_enable(); + if (err != ESP_OK) { + BOOT_LOG_ERR("Enabling of Flash encryption failed (%d)", err); + FIH_PANIC; + } + } + +#ifdef CONFIG_SECURE_BOOT_FLASH_ENC_KEYS_BURN_TOGETHER + if (!esp_secure_boot_enabled() || !flash_encryption_enabled) { + err = esp_efuse_batch_write_commit(); + if (err != ESP_OK) { + BOOT_LOG_ERR("Error programming eFuses (err=0x%x).", err); + FIH_PANIC; + } + assert(esp_secure_boot_enabled()); + BOOT_LOG_INF("Secure boot permanently enabled"); + } +#endif // CONFIG_SECURE_BOOT_FLASH_ENC_KEYS_BURN_TOGETHER + + /* Step 7 (see above for full description): + * 7) Reset system to ensure flash encryption cache resets properly. + */ + if (!flash_encryption_enabled && esp_flash_encryption_enabled()) { + BOOT_LOG_INF("Resetting with flash encryption enabled..."); + bootloader_reset(); + } +#endif + + BOOT_LOG_INF("Disabling RNG early entropy source..."); + bootloader_random_disable(); + + /* Disable glitch reset after all the security checks are completed. + * Glitch detection can be falsely triggered by EMI interference (high RF TX power, etc) + * and to avoid such false alarms, disable it. + */ + bootloader_ana_clock_glitch_reset_config(false); + +#ifdef CONFIG_ESP_MULTI_PROCESSOR_BOOT + /* Multi image independent boot + * Boot on the second processor happens before the image0 boot + */ + do_boot_appcpu(IMAGE_INDEX_1, PRIMARY_SLOT); +#endif + + do_boot(&rsp); + + while(1); +} diff --git a/bootloader/mcuboot/boot/espressif/os.c b/bootloader/mcuboot/boot/espressif/os.c new file mode 100644 index 0000000..2a2e9ca --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/os.c @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifdef CONFIG_ESP_USE_MBEDTLS + +#include +#include + +#define CRYPTO_HEAP_SIZE 8192 + +static unsigned char memory_buf[CRYPTO_HEAP_SIZE]; + +/* + * Initialize Mbed TLS to be able to use the local heap. + */ +void os_heap_init(void) +{ + mbedtls_memory_buffer_alloc_init(memory_buf, sizeof(memory_buf)); +} +#else + +void os_heap_init(void) +{ +} + +#endif diff --git a/bootloader/mcuboot/boot/espressif/port/esp32/bootloader-multi.conf b/bootloader/mcuboot/boot/espressif/port/esp32/bootloader-multi.conf new file mode 100644 index 0000000..ad3355e --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32/bootloader-multi.conf @@ -0,0 +1,34 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ESP_FLASH_SIZE=4MB +CONFIG_ESP_BOOTLOADER_SIZE=0xF000 +CONFIG_ESP_BOOTLOADER_OFFSET=0x1000 +# Example of values to be used when multi image is enabled +# Notice that the OS layer and update agent must be aware +# of these regions +CONFIG_ESP_APPLICATION_SIZE=0x80000 +CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x90000 +CONFIG_ESP_IMAGE1_PRIMARY_START_ADDRESS=0x110000 +CONFIG_ESP_IMAGE1_SECONDARY_START_ADDRESS=0x190000 +CONFIG_ESP_SCRATCH_OFFSET=0x210000 +CONFIG_ESP_SCRATCH_SIZE=0x40000 +CONFIG_ESP_MCUBOOT_WDT_ENABLE=y + +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +# Configures alternative UART port for console printing +# CONFIG_ESP_CONSOLE_UART_CUSTOM=y +# CONFIG_ESP_CONSOLE_UART_TX_GPIO=26 +# CONFIG_ESP_CONSOLE_UART_RX_GPIO=25 + +# Enables multi image, if it is not defined, it is assumed +# only one updatable image +# CONFIG_ESP_IMAGE_NUMBER=2 + +# Enables multi image boot on independent processors +# (main host OS is not responsible for booting the second image) +# Use only with CONFIG_ESP_IMAGE_NUMBER=2 +# CONFIG_ESP_MULTI_PROCESSOR_BOOT=y diff --git a/bootloader/mcuboot/boot/espressif/port/esp32/bootloader.conf b/bootloader/mcuboot/boot/espressif/port/esp32/bootloader.conf new file mode 100644 index 0000000..8f555ec --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32/bootloader.conf @@ -0,0 +1,101 @@ +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ESP_FLASH_SIZE=4MB +CONFIG_ESP_BOOTLOADER_SIZE=0xF000 +CONFIG_ESP_BOOTLOADER_OFFSET=0x1000 +CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +CONFIG_ESP_APPLICATION_SIZE=0x100000 +CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x110000 +CONFIG_ESP_MCUBOOT_WDT_ENABLE=y +CONFIG_ESP_SCRATCH_OFFSET=0x210000 +CONFIG_ESP_SCRATCH_SIZE=0x40000 + +# When enabled, prevents updating image to an older version +# CONFIG_ESP_DOWNGRADE_PREVENTION=y +# This option makes downgrade prevention rely also on security +# counter (defined using imgtool) instead of only image version +# CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y + +# Enables the MCUboot Serial Recovery, that allows the use of +# MCUMGR to upload a firmware through the serial port +# CONFIG_ESP_MCUBOOT_SERIAL=y +# Use sector erasing instead of entire image size erasing +# when uploading through Serial Recovery +# CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y +# GPIO used to boot on Serial Recovery +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=32 +# GPIO input type (0 for Pull-down, 1 for Pull-up) +# CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0 +# GPIO signal value +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1 +# Delay time for identify the GPIO signal +# CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5 +# UART port used for serial communication +# CONFIG_ESP_SERIAL_BOOT_UART_NUM=1 +# GPIO for Serial RX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_RX=25 +# GPIO for Serial TX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_TX=26 + +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +# Configures alternative UART port for console printing +# CONFIG_ESP_CONSOLE_UART_CUSTOM=y +# CONFIG_ESP_CONSOLE_UART_TX_GPIO=26 +# CONFIG_ESP_CONSOLE_UART_RX_GPIO=25 + +# Enables multi image, if it is not defined, it is assumed +# only one updatable image +# CONFIG_ESP_IMAGE_NUMBER=2 + +# Enables multi image boot on independent processors +# (main host OS is not responsible for booting the second image) +# Use only with CONFIG_ESP_IMAGE_NUMBER=2 +# CONFIG_ESP_MULTI_PROCESSOR_BOOT=y + +# Example of values to be used when multi image is enabled +# Notice that the OS layer and update agent must be aware +# of these regions +# CONFIG_ESP_APPLICATION_SIZE=0x80000 +# CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +# CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x90000 +# CONFIG_ESP_IMAGE1_PRIMARY_START_ADDRESS=0x110000 +# CONFIG_ESP_IMAGE1_SECONDARY_START_ADDRESS=0x190000 +# CONFIG_ESP_SCRATCH_OFFSET=0x210000 +# CONFIG_ESP_SCRATCH_SIZE=0x40000 + +# CONFIG_ESP_SIGN_EC256=y +# CONFIG_ESP_SIGN_ED25519=n +# CONFIG_ESP_SIGN_RSA=n +# CONFIG_ESP_SIGN_RSA_LEN=2048 + +# Use Tinycrypt lib for EC256 or ED25519 signing +# CONFIG_ESP_USE_TINYCRYPT=y +# Use Mbed TLS lib for RSA image signing +# CONFIG_ESP_USE_MBEDTLS=n + +# It is strongly recommended to generate a new signing key +# using imgtool instead of use the existent sample +# CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem + +# Hardware Secure Boot related options +# CONFIG_SECURE_SIGNED_ON_BOOT=1 +# CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 +# CONFIG_SECURE_BOOT=1 +# CONFIG_SECURE_BOOT_V2_ENABLED=1 +# CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 + +# Hardware Flash Encryption related options +# CONFIG_SECURE_FLASH_ENC_ENABLED=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1 +# CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1 +# CONFIG_SECURE_BOOT_ALLOW_JTAG=1 +# CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=1 + +# Options for enabling eFuse emulation in Flash +# CONFIG_EFUSE_VIRTUAL=1 +# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1 diff --git a/bootloader/mcuboot/boot/espressif/port/esp32/ld/bootloader.ld b/bootloader/mcuboot/boot/espressif/port/esp32/ld/bootloader.ld new file mode 100644 index 0000000..5ceac18 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32/ld/bootloader.ld @@ -0,0 +1,144 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Simplified memory map for the bootloader. + * + * The main purpose is to make sure the bootloader can load into main memory + * without overwriting itself. + */ + +MEMORY +{ +#ifdef CONFIG_ESP_MULTI_PROCESSOR_BOOT + iram_loader_seg (RWX) : org = 0x400AB900, len = 0x6500 +#else + /* iram_loader_seg is currently placed on APP_CPU cache IRAM address range */ + iram_loader_seg (RWX) : org = 0x40078000, len = 0x6500 +#endif + iram_seg (RWX) : org = 0x40090000, len = 0x9000 + dram_seg (RW) : org = 0x3FFF4700, len = 0xB900 +} + +/* Default entry point: */ +ENTRY(main); + +SECTIONS +{ + .iram_loader.text : + { + . = ALIGN (16); + _loader_text_start = ABSOLUTE(.); + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ + *libhal.a:*.*(.literal .text .literal.* .text.*) + *esp_mcuboot.*(.literal .text .literal.* .text.*) + *esp_loader.*(.literal .text .literal.* .text.*) + *main.*(.literal .text .literal.* .text.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _loader_text_end = ABSOLUTE(.); + } > iram_loader_seg + .iram.text : + { + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + } > iram_seg + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + _dram_start = ABSOLUTE(.); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + } >dram_seg + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram_seg + .dram0.rodata : + { + _rodata_start = ABSOLUTE(.); + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + . = (. + 3) & ~ 3; + /* C++ constructor and destructor tables, properly ordered: */ + __init_array_start = ABSOLUTE(.); + KEEP (*crtbegin.*(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __init_array_end = ABSOLUTE(.); + KEEP (*crtbegin.*(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + _rodata_end = ABSOLUTE(.); + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + _dram_end = ABSOLUTE(.); + } >dram_seg + .iram.text : + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram .iram.*) /* catch stray IRAM_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } > iram_seg +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32/serial_adapter.c b/bootloader/mcuboot/boot/espressif/port/esp32/serial_adapter.c new file mode 100644 index 0000000..af32723 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32/serial_adapter.c @@ -0,0 +1,179 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#define SERIAL_BOOT_GPIO_DETECT CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#else +#define SERIAL_BOOT_GPIO_DETECT GPIO_NUM_5 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#define SERIAL_BOOT_GPIO_DETECT_VAL CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#else +#define SERIAL_BOOT_GPIO_DETECT_VAL 1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#define SERIAL_BOOT_DETECT_DELAY_S CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#else +#define SERIAL_BOOT_DETECT_DELAY_S 5 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#define SERIAL_BOOT_GPIO_INPUT_TYPE CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#else +// pull-down +#define SERIAL_BOOT_GPIO_INPUT_TYPE 0 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_UART_NUM +#define SERIAL_BOOT_UART_NUM CONFIG_ESP_SERIAL_BOOT_UART_NUM +#else +#define SERIAL_BOOT_UART_NUM ESP_ROM_UART_1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#define SERIAL_BOOT_GPIO_RX CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#else +#define SERIAL_BOOT_GPIO_RX GPIO_NUM_8 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#define SERIAL_BOOT_GPIO_TX CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#else +#define SERIAL_BOOT_GPIO_TX GPIO_NUM_9 +#endif + +static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ? + &UART0 : + &UART1; + +void console_write(const char *str, int cnt) +{ + uint32_t tx_len; + + do { + tx_len = uart_ll_get_txfifo_len(serial_boot_uart_dev); + } while (tx_len < cnt); + + uart_ll_write_txfifo(serial_boot_uart_dev, (const uint8_t *)str, cnt); +} + +int console_read(char *str, int cnt, int *newline) +{ + volatile uint32_t len = 0; + volatile uint32_t read_len = 0; + volatile bool stop = false; + do { + len = uart_ll_get_rxfifo_len(serial_boot_uart_dev); + + if (len) { + for (uint32_t i = 0; i < len; i++) { + /* Read the character from the RX FIFO */ + uart_ll_read_rxfifo(serial_boot_uart_dev, (uint8_t *)&str[read_len], 1); + read_len++; + if (read_len == cnt || str[read_len - 1] == '\n') { + stop = true; + break; + } + } + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (!stop); + + *newline = (str[read_len - 1] == '\n') ? 1 : 0; + return read_len; +} + +int boot_console_init(void) +{ + BOOT_LOG_INF("Initializing serial boot pins"); + + /* Enable GPIO for UART RX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_connect_in_signal(SERIAL_BOOT_GPIO_RX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_RX_PIN_IDX), + 0); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_RX); + + /* Enable GPIO for UART TX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_TX); + esp_rom_gpio_connect_out_signal(SERIAL_BOOT_GPIO_TX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_TX_PIN_IDX), + 0, 0); + gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX); + + uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_APB); + uart_ll_set_mode_normal(serial_boot_uart_dev); + uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_APB); + uart_ll_set_stop_bits(serial_boot_uart_dev, 1u); + uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE); + uart_ll_set_rx_tout(serial_boot_uart_dev, 16); + uart_ll_set_data_bit_num(serial_boot_uart_dev, UART_DATA_8_BITS); + uart_ll_set_tx_idle_num(serial_boot_uart_dev, 0); + uart_ll_set_hw_flow_ctrl(serial_boot_uart_dev, UART_HW_FLOWCTRL_DISABLE, 100); + periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + SERIAL_BOOT_UART_NUM); + + uart_ll_txfifo_rst(serial_boot_uart_dev); + uart_ll_rxfifo_rst(serial_boot_uart_dev); + esp_rom_delay_us(50000); + + return 0; +} + +bool boot_serial_detect_pin(void) +{ + bool detected = false; + int pin_value = 0; + + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_DETECT); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_DETECT); + switch (SERIAL_BOOT_GPIO_INPUT_TYPE) { + // Pull-down + case 0: + gpio_ll_pulldown_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + // Pull-up + case 1: + gpio_ll_pullup_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + } + esp_rom_delay_us(50000); + + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + esp_rom_delay_us(50000); + + if (detected) { + if (SERIAL_BOOT_DETECT_DELAY_S > 0) { + /* The delay time is an approximation */ + for (int i = 0; i < (SERIAL_BOOT_DETECT_DELAY_S * 100); i++) { + esp_rom_delay_us(10000); + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + if (!detected) { + break; + } + } + } + } + return detected; +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32c2/bootloader.conf b/bootloader/mcuboot/boot/espressif/port/esp32c2/bootloader.conf new file mode 100644 index 0000000..54f797e --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32c2/bootloader.conf @@ -0,0 +1,87 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ESP_FLASH_SIZE=4MB +CONFIG_ESP_BOOTLOADER_SIZE=0xF000 +CONFIG_ESP_BOOTLOADER_OFFSET=0x0000 +CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +CONFIG_ESP_APPLICATION_SIZE=0x100000 +CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x110000 +CONFIG_ESP_MCUBOOT_WDT_ENABLE=y +CONFIG_ESP_SCRATCH_OFFSET=0x210000 +CONFIG_ESP_SCRATCH_SIZE=0x40000 + +# When enabled, prevents updating image to an older version +# CONFIG_ESP_DOWNGRADE_PREVENTION=y +# This option makes downgrade prevention rely also on security +# counter (defined using imgtool) instead of only image version +# CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y + +# Enables the MCUboot Serial Recovery, that allows the use of +# MCUMGR to upload a firmware through the serial port +# CONFIG_ESP_MCUBOOT_SERIAL=y +# Use sector erasing (recommended) instead of entire image size +# erasing when uploading through Serial Recovery +# CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y + +# GPIO used to boot on Serial Recovery +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=18 +# GPIO input type (0 for Pull-down, 1 for Pull-up) +# CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0 +# GPIO signal value +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1 +# Delay time for identify the GPIO signal +# CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5 +# UART port used for serial communication (not needed when using USB) +# CONFIG_ESP_SERIAL_BOOT_UART_NUM=1 +# GPIO for Serial RX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_RX=2 +# GPIO for Serial TX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_TX=3 + +# Use UART0 for console printing (use either UART or USB alone) +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +# Configures alternative UART port for console printing +# (UART_NUM=0 must not be changed) +# CONFIG_ESP_CONSOLE_UART_CUSTOM=y +# CONFIG_ESP_CONSOLE_UART_TX_GPIO=3 +# CONFIG_ESP_CONSOLE_UART_RX_GPIO=2 + +# CONFIG_ESP_SIGN_EC256=y +# CONFIG_ESP_SIGN_ED25519=n +# CONFIG_ESP_SIGN_RSA=n +# CONFIG_ESP_SIGN_RSA_LEN=2048 + +# Use Tinycrypt lib for EC256 or ED25519 signing +# CONFIG_ESP_USE_TINYCRYPT=y +# Use Mbed TLS lib for RSA image signing +# CONFIG_ESP_USE_MBEDTLS=n + +# It is strongly recommended to generate a new signing key +# using imgtool instead of use the existent sample +# CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem + +# Hardware Secure Boot related options +# CONFIG_SECURE_SIGNED_ON_BOOT=1 +# CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME=1 +# CONFIG_SECURE_BOOT=1 +# CONFIG_SECURE_BOOT_V2_ENABLED=1 + +# Hardware Flash Encryption related options +# CONFIG_SECURE_FLASH_ENC_ENABLED=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1 +# CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1 +# CONFIG_SECURE_BOOT_ALLOW_JTAG=1 +# CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=1 + +# This option must be also enabled when enabling both Secure Boot +# and Flash Encryption at same time +# CONFIG_SECURE_BOOT_FLASH_ENC_KEYS_BURN_TOGETHER=1 + +# Options for enabling eFuse emulation in Flash +# CONFIG_EFUSE_VIRTUAL=1 +# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1 diff --git a/bootloader/mcuboot/boot/espressif/port/esp32c2/ld/bootloader.ld b/bootloader/mcuboot/boot/espressif/port/esp32c2/ld/bootloader.ld new file mode 100644 index 0000000..b24fabb --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32c2/ld/bootloader.ld @@ -0,0 +1,181 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** Simplified memory map for the bootloader. + * Make sure the bootloader can load into main memory without overwriting itself. + * + * ESP32-C2 ROM static data usage is as follows: + * - 0x3fccb264 - 0x3fcdcb70: Shared buffers, used in UART/USB/SPI download mode only + * - 0x3fcdcb70 - 0x3fcdeb70: PRO CPU stack, can be reclaimed as heap after RTOS startup + * - 0x3fcdeb70 - 0x3fce0000: ROM .bss and .data (not easily reclaimable) + * + * The 2nd stage bootloader can take space up to the end of ROM shared + * buffers area (0x3fcdcb70). + */ + +/* The offset between Dbus and Ibus. Used to convert between 0x403xxxxx and 0x3fcxxxxx addresses. */ +iram_dram_offset = 0x6e0000; + +/* We consider 0x3fcdcb70 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg, + * and work out iram_seg and iram_loader_seg addresses from there, backwards. + */ + +/* These lengths can be adjusted, if necessary: */ +bootloader_usable_dram_end = 0x3fcdcb70; +bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */ +bootloader_dram_seg_len = 0xA000; +bootloader_iram_loader_seg_len = 0x7000; +bootloader_iram_seg_len = 0x8800; + +/* Start of the lower region is determined by region size and the end of the higher region */ +bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead; +bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len; +bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len + iram_dram_offset; +bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len; + +MEMORY +{ + iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len + iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len + dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len +} + +/* The app may use RAM for static allocations up to the start of iram_loader_seg. + * If you have changed something above and this assert fails: + * 1. Check what the new value of bootloader_iram_loader_seg start is. + * 2. Update the value in this assert. + * 3. Update (SRAM_DRAM_END + I_D_SRAM_OFFSET) in components/esp_system/ld/esp32c2/memory.ld.in to the same value. + */ +ASSERT(bootloader_iram_loader_seg_start == 0x403a9b70, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END"); + +/* Default entry point: */ +ENTRY(main); + +SECTIONS +{ + .iram_loader.text : + { + . = ALIGN (16); + _loader_text_start = ABSOLUTE(.); + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ + *libhal.a:*.*(.literal .text .literal.* .text.*) + *esp_mcuboot.*(.literal .text .literal.* .text.*) + *esp_loader.*(.literal .text .literal.* .text.*) + *main.*(.literal .text .literal.* .text.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _loader_text_end = ABSOLUTE(.); + } > iram_loader_seg + + .iram.text : + { + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + } > iram_seg + + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + _dram_start = ABSOLUTE(.); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + } >dram_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram_seg + + .dram0.rodata : + { + _rodata_start = ABSOLUTE(.); + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + . = (. + 3) & ~ 3; + /* C++ constructor and destructor tables, properly ordered: */ + __init_array_start = ABSOLUTE(.); + KEEP (*crtbegin.*(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __init_array_end = ABSOLUTE(.); + KEEP (*crtbegin.*(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + _rodata_end = ABSOLUTE(.); + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + _dram_end = ABSOLUTE(.); + } >dram_seg + + .iram.text : + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram .iram.*) /* catch stray IRAM_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } > iram_seg + +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32c2/serial_adapter.c b/bootloader/mcuboot/boot/espressif/port/esp32c2/serial_adapter.c new file mode 100644 index 0000000..d10c0d6 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32c2/serial_adapter.c @@ -0,0 +1,190 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#define SERIAL_BOOT_GPIO_DETECT CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#else +#define SERIAL_BOOT_GPIO_DETECT GPIO_NUM_18 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#define SERIAL_BOOT_GPIO_DETECT_VAL CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#else +#define SERIAL_BOOT_GPIO_DETECT_VAL 1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#define SERIAL_BOOT_DETECT_DELAY_S CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#else +#define SERIAL_BOOT_DETECT_DELAY_S 5 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#define SERIAL_BOOT_GPIO_INPUT_TYPE CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#else +// pull-down +#define SERIAL_BOOT_GPIO_INPUT_TYPE 0 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_UART_NUM +#define SERIAL_BOOT_UART_NUM CONFIG_ESP_SERIAL_BOOT_UART_NUM +#else +#define SERIAL_BOOT_UART_NUM ESP_ROM_UART_1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#define SERIAL_BOOT_GPIO_RX CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#else +#define SERIAL_BOOT_GPIO_RX GPIO_NUM_2 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#define SERIAL_BOOT_GPIO_TX CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#else +#define SERIAL_BOOT_GPIO_TX GPIO_NUM_3 +#endif + +static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ? + &UART0 : + &UART1; + +void console_write(const char *str, int cnt) +{ + uint32_t tx_len; + uint32_t write_len; + + do { + tx_len = uart_ll_get_txfifo_len(serial_boot_uart_dev); + if (tx_len > 0) { + write_len = tx_len < cnt ? tx_len : cnt; + uart_ll_write_txfifo(serial_boot_uart_dev, (const uint8_t *)str, write_len); + cnt -= write_len; + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (cnt > 0); +} + +int console_read(char *str, int cnt, int *newline) +{ + uint32_t len = 0; + uint32_t read_len = 0; + bool stop = false; + + do { + len = uart_ll_get_rxfifo_len(serial_boot_uart_dev); + + if (len > 0) { + for (uint32_t i = 0; i < len; i++) { + /* Read the character from the RX FIFO */ + uart_ll_read_rxfifo(serial_boot_uart_dev, (uint8_t *)&str[read_len], 1); + read_len++; + if (read_len == cnt - 1|| str[read_len - 1] == '\n') { + stop = true; + break; + } + } + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (!stop); + + *newline = (str[read_len - 1] == '\n') ? 1 : 0; + return read_len; +} + +int boot_console_init(void) +{ + BOOT_LOG_INF("Initializing serial boot pins"); + + /* Enable GPIO for UART RX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_connect_in_signal(SERIAL_BOOT_GPIO_RX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_RX_PIN_IDX), + 0); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_pad_pullup_only(SERIAL_BOOT_GPIO_RX); + + + /* Enable GPIO for UART TX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_TX); + esp_rom_gpio_connect_out_signal(SERIAL_BOOT_GPIO_TX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_TX_PIN_IDX), + 0, 0); + gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX); + + uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_DEFAULT); + uart_ll_set_mode_normal(serial_boot_uart_dev); + uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_DEFAULT); + uart_ll_set_stop_bits(serial_boot_uart_dev, 1u); + uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE); + uart_ll_set_rx_tout(serial_boot_uart_dev, 16); + uart_ll_set_data_bit_num(serial_boot_uart_dev, UART_DATA_8_BITS); + uart_ll_set_tx_idle_num(serial_boot_uart_dev, 0); + uart_ll_set_hw_flow_ctrl(serial_boot_uart_dev, UART_HW_FLOWCTRL_DISABLE, 100); + periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + SERIAL_BOOT_UART_NUM); + + uart_ll_txfifo_rst(serial_boot_uart_dev); + uart_ll_rxfifo_rst(serial_boot_uart_dev); + esp_rom_delay_us(50000); + + return 0; +} + +bool boot_serial_detect_pin(void) +{ + bool detected = false; + int pin_value = 0; + + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_DETECT); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_DETECT); + switch (SERIAL_BOOT_GPIO_INPUT_TYPE) { + // Pull-down + case 0: + gpio_ll_pulldown_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + // Pull-up + case 1: + gpio_ll_pullup_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + } + esp_rom_delay_us(50000); + + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + esp_rom_delay_us(50000); + + if (detected) { + if (SERIAL_BOOT_DETECT_DELAY_S > 0) { + /* The delay time is an approximation */ + for (int i = 0; i < (SERIAL_BOOT_DETECT_DELAY_S * 100); i++) { + esp_rom_delay_us(10000); + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + if (!detected) { + break; + } + } + } + } + return detected; +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32c3/bootloader.conf b/bootloader/mcuboot/boot/espressif/port/esp32c3/bootloader.conf new file mode 100644 index 0000000..88954ee --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32c3/bootloader.conf @@ -0,0 +1,88 @@ +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ESP_FLASH_SIZE=4MB +CONFIG_ESP_BOOTLOADER_SIZE=0xF000 +CONFIG_ESP_BOOTLOADER_OFFSET=0x0000 +CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +CONFIG_ESP_APPLICATION_SIZE=0x100000 +CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x110000 +CONFIG_ESP_MCUBOOT_WDT_ENABLE=y +CONFIG_ESP_SCRATCH_OFFSET=0x210000 +CONFIG_ESP_SCRATCH_SIZE=0x40000 + +# When enabled, prevents updating image to an older version +# CONFIG_ESP_DOWNGRADE_PREVENTION=y +# This option makes downgrade prevention rely also on security +# counter (defined using imgtool) instead of only image version +# CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y + +# Enables the MCUboot Serial Recovery, that allows the use of +# MCUMGR to upload a firmware through the serial port +# CONFIG_ESP_MCUBOOT_SERIAL=y +# Use Serial through USB JTAG Serial port for Serial Recovery +# CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG=y +# Use sector erasing (recommended) instead of entire image size +# erasing when uploading through Serial Recovery +# CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y + +# GPIO used to boot on Serial Recovery +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 +# GPIO input type (0 for Pull-down, 1 for Pull-up) +# CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0 +# GPIO signal value +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1 +# Delay time for identify the GPIO signal +# CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5 +# UART port used for serial communication (not needed when using USB) +# CONFIG_ESP_SERIAL_BOOT_UART_NUM=1 +# GPIO for Serial RX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_RX=8 +# GPIO for Serial TX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_TX=9 + +# Use UART0 for console printing (use either UART or USB alone) +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +# Configures alternative UART port for console printing +# (UART_NUM=0 must not be changed) +# CONFIG_ESP_CONSOLE_UART_CUSTOM=y +# CONFIG_ESP_CONSOLE_UART_TX_GPIO=9 +# CONFIG_ESP_CONSOLE_UART_RX_GPIO=8 +# Use USB JTAG Serial for console printing +# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y + +# CONFIG_ESP_SIGN_EC256=y +# CONFIG_ESP_SIGN_ED25519=n +# CONFIG_ESP_SIGN_RSA=n +# CONFIG_ESP_SIGN_RSA_LEN=2048 + +# Use Tinycrypt lib for EC256 or ED25519 signing +# CONFIG_ESP_USE_TINYCRYPT=y +# Use Mbed TLS lib for RSA image signing +# CONFIG_ESP_USE_MBEDTLS=n + +# It is strongly recommended to generate a new signing key +# using imgtool instead of use the existent sample +# CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem + +# Hardware Secure Boot related options +# CONFIG_SECURE_SIGNED_ON_BOOT=1 +# CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 +# CONFIG_SECURE_BOOT=1 +# CONFIG_SECURE_BOOT_V2_ENABLED=1 +# CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 + +# Hardware Flash Encryption related options +# CONFIG_SECURE_FLASH_ENC_ENABLED=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1 +# CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1 +# CONFIG_SECURE_BOOT_ALLOW_JTAG=1 +# CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=1 + +# Options for enabling eFuse emulation in Flash +# CONFIG_EFUSE_VIRTUAL=1 +# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1 diff --git a/bootloader/mcuboot/boot/espressif/port/esp32c3/ld/bootloader.ld b/bootloader/mcuboot/boot/espressif/port/esp32c3/ld/bootloader.ld new file mode 100644 index 0000000..747b549 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32c3/ld/bootloader.ld @@ -0,0 +1,147 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Simplified memory map for the bootloader. + * + * The main purpose is to make sure the bootloader can load into main memory + * without overwriting itself. + */ + +MEMORY +{ + iram_seg (RWX) : org = 0x403C7000, len = 0x9000 + iram_loader_seg (RWX) : org = 0x403D0000, len = 0x5400 + dram_seg (RW) : org = 0x3FCD5400, len = 0xA000 +} + +/* Default entry point: */ +ENTRY(main); + +SECTIONS +{ + .iram_loader.text : + { + . = ALIGN (16); + _loader_text_start = ABSOLUTE(.); + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ + *libhal.a:*.*(.literal .text .literal.* .text.*) + *esp_mcuboot.*(.literal .text .literal.* .text.*) + *esp_loader.*(.literal .text .literal.* .text.*) + *main.*(.literal .text .literal.* .text.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _loader_text_end = ABSOLUTE(.); + } > iram_loader_seg + + .iram.text : + { + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + } > iram_seg + + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + _dram_start = ABSOLUTE(.); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + } >dram_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram_seg + + .dram0.rodata : + { + _rodata_start = ABSOLUTE(.); + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + . = (. + 3) & ~ 3; + /* C++ constructor and destructor tables, properly ordered: */ + __init_array_start = ABSOLUTE(.); + KEEP (*crtbegin.*(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __init_array_end = ABSOLUTE(.); + KEEP (*crtbegin.*(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + _rodata_end = ABSOLUTE(.); + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + _dram_end = ABSOLUTE(.); + } >dram_seg + + .iram.text : + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram .iram.*) /* catch stray IRAM_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } > iram_seg + +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32c3/serial_adapter.c b/bootloader/mcuboot/boot/espressif/port/esp32c3/serial_adapter.c new file mode 100644 index 0000000..09643a1 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32c3/serial_adapter.c @@ -0,0 +1,226 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#define SERIAL_BOOT_GPIO_DETECT CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#else +#define SERIAL_BOOT_GPIO_DETECT GPIO_NUM_5 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#define SERIAL_BOOT_GPIO_DETECT_VAL CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#else +#define SERIAL_BOOT_GPIO_DETECT_VAL 1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#define SERIAL_BOOT_DETECT_DELAY_S CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#else +#define SERIAL_BOOT_DETECT_DELAY_S 5 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#define SERIAL_BOOT_GPIO_INPUT_TYPE CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#else +// pull-down +#define SERIAL_BOOT_GPIO_INPUT_TYPE 0 +#endif + +#ifndef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + +#ifdef CONFIG_ESP_SERIAL_BOOT_UART_NUM +#define SERIAL_BOOT_UART_NUM CONFIG_ESP_SERIAL_BOOT_UART_NUM +#else +#define SERIAL_BOOT_UART_NUM ESP_ROM_UART_1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#define SERIAL_BOOT_GPIO_RX CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#else +#define SERIAL_BOOT_GPIO_RX GPIO_NUM_8 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#define SERIAL_BOOT_GPIO_TX CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#else +#define SERIAL_BOOT_GPIO_TX GPIO_NUM_9 +#endif + +static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ? + &UART0 : + &UART1; + +#endif + +void console_write(const char *str, int cnt) +{ +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + usb_serial_jtag_ll_txfifo_flush(); + while (!usb_serial_jtag_ll_txfifo_writable()) { + MCUBOOT_WATCHDOG_FEED(); + } + usb_serial_jtag_ll_write_txfifo((const uint8_t *)str, cnt); + usb_serial_jtag_ll_txfifo_flush(); +#else + uint32_t tx_len; + uint32_t write_len; + + do { + tx_len = uart_ll_get_txfifo_len(serial_boot_uart_dev); + if (tx_len > 0) { + write_len = tx_len < cnt ? tx_len : cnt; + uart_ll_write_txfifo(serial_boot_uart_dev, (const uint8_t *)str, write_len); + cnt -= write_len; + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (cnt > 0); +#endif +} + +int console_read(char *str, int cnt, int *newline) +{ +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + uint32_t read_len = 0; + + esp_rom_delay_us(1000); + do { + if (usb_serial_jtag_ll_rxfifo_data_available()) { + usb_serial_jtag_ll_read_rxfifo((uint8_t *)&str[read_len], 1); + read_len++; + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (!(read_len == cnt || str[read_len - 1] == '\n')); + *newline = (str[read_len - 1] == '\n') ? 1 : 0; + + return read_len; +#else + uint32_t len = 0; + uint32_t read_len = 0; + bool stop = false; + + do { + len = uart_ll_get_rxfifo_len(serial_boot_uart_dev); + + if (len > 0) { + for (uint32_t i = 0; i < len; i++) { + /* Read the character from the RX FIFO */ + uart_ll_read_rxfifo(serial_boot_uart_dev, (uint8_t *)&str[read_len], 1); + read_len++; + if (read_len == cnt - 1|| str[read_len - 1] == '\n') { + stop = true; + break; + } + } + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (!stop); + + *newline = (str[read_len - 1] == '\n') ? 1 : 0; + return read_len; +#endif +} + +int boot_console_init(void) +{ + BOOT_LOG_INF("Initializing serial boot pins"); + +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + usb_serial_jtag_ll_txfifo_flush(); + esp_rom_uart_tx_wait_idle(0); +#else + /* Enable GPIO for UART RX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_connect_in_signal(SERIAL_BOOT_GPIO_RX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_RX_PIN_IDX), + 0); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_pad_pullup_only(SERIAL_BOOT_GPIO_RX); + + + /* Enable GPIO for UART TX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_TX); + esp_rom_gpio_connect_out_signal(SERIAL_BOOT_GPIO_TX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_TX_PIN_IDX), + 0, 0); + gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX); + + uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_APB); + uart_ll_set_mode_normal(serial_boot_uart_dev); + uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_APB); + uart_ll_set_stop_bits(serial_boot_uart_dev, 1u); + uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE); + uart_ll_set_rx_tout(serial_boot_uart_dev, 16); + uart_ll_set_data_bit_num(serial_boot_uart_dev, UART_DATA_8_BITS); + uart_ll_set_tx_idle_num(serial_boot_uart_dev, 0); + uart_ll_set_hw_flow_ctrl(serial_boot_uart_dev, UART_HW_FLOWCTRL_DISABLE, 100); + periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + SERIAL_BOOT_UART_NUM); + + uart_ll_txfifo_rst(serial_boot_uart_dev); + uart_ll_rxfifo_rst(serial_boot_uart_dev); + esp_rom_delay_us(50000); +#endif + + return 0; +} + +bool boot_serial_detect_pin(void) +{ + bool detected = false; + int pin_value = 0; + + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_DETECT); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_DETECT); + switch (SERIAL_BOOT_GPIO_INPUT_TYPE) { + // Pull-down + case 0: + gpio_ll_pulldown_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + // Pull-up + case 1: + gpio_ll_pullup_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + } + esp_rom_delay_us(50000); + + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + esp_rom_delay_us(50000); + + if (detected) { + if (SERIAL_BOOT_DETECT_DELAY_S > 0) { + /* The delay time is an approximation */ + for (int i = 0; i < (SERIAL_BOOT_DETECT_DELAY_S * 100); i++) { + esp_rom_delay_us(10000); + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + if (!detected) { + break; + } + } + } + } + return detected; +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32c6/bootloader.conf b/bootloader/mcuboot/boot/espressif/port/esp32c6/bootloader.conf new file mode 100644 index 0000000..5c5307c --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32c6/bootloader.conf @@ -0,0 +1,88 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ESP_FLASH_SIZE=4MB +CONFIG_ESP_BOOTLOADER_SIZE=0xF000 +CONFIG_ESP_BOOTLOADER_OFFSET=0x0000 +CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +CONFIG_ESP_APPLICATION_SIZE=0x100000 +CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x110000 +CONFIG_ESP_MCUBOOT_WDT_ENABLE=y +CONFIG_ESP_SCRATCH_OFFSET=0x210000 +CONFIG_ESP_SCRATCH_SIZE=0x40000 + +# When enabled, prevents updating image to an older version +# CONFIG_ESP_DOWNGRADE_PREVENTION=y +# This option makes downgrade prevention rely also on security +# counter (defined using imgtool) instead of only image version +# CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y + +# Enables the MCUboot Serial Recovery, that allows the use of +# MCUMGR to upload a firmware through the serial port +# CONFIG_ESP_MCUBOOT_SERIAL=y +# Use Serial through USB JTAG Serial port for Serial Recovery +# CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG=y +# Use sector erasing (recommended) instead of entire image size +# erasing when uploading through Serial Recovery +# CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y + +# GPIO used to boot on Serial Recovery +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 +# GPIO input type (0 for Pull-down, 1 for Pull-up) +# CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0 +# GPIO signal value +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1 +# Delay time for identify the GPIO signal +# CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5 +# UART port used for serial communication (not needed when using USB) +# CONFIG_ESP_SERIAL_BOOT_UART_NUM=1 +# GPIO for Serial RX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_RX=8 +# GPIO for Serial TX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_TX=9 + +# Use UART0 for console printing (use either UART or USB alone) +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +# Configures alternative UART port for console printing +# (UART_NUM=0 must not be changed) +# CONFIG_ESP_CONSOLE_UART_CUSTOM=y +# CONFIG_ESP_CONSOLE_UART_TX_GPIO=9 +# CONFIG_ESP_CONSOLE_UART_RX_GPIO=8 +# Use USB JTAG Serial for console printing +# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y + +# CONFIG_ESP_SIGN_EC256=y +# CONFIG_ESP_SIGN_ED25519=n +# CONFIG_ESP_SIGN_RSA=n +# CONFIG_ESP_SIGN_RSA_LEN=2048 + +# Use Tinycrypt lib for EC256 or ED25519 signing +# CONFIG_ESP_USE_TINYCRYPT=y +# Use Mbed TLS lib for RSA image signing +# CONFIG_ESP_USE_MBEDTLS=n + +# It is strongly recommended to generate a new signing key +# using imgtool instead of use the existent sample +# CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem + +# Hardware Secure Boot related options +# CONFIG_SECURE_SIGNED_ON_BOOT=1 +# CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 +# CONFIG_SECURE_BOOT=1 +# CONFIG_SECURE_BOOT_V2_ENABLED=1 +# CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 + +# Hardware Flash Encryption related options +# CONFIG_SECURE_FLASH_ENC_ENABLED=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1 +# CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1 +# CONFIG_SECURE_BOOT_ALLOW_JTAG=1 +# CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=1 + +# Options for enabling eFuse emulation in Flash +# CONFIG_EFUSE_VIRTUAL=1 +# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1 diff --git a/bootloader/mcuboot/boot/espressif/port/esp32c6/ld/bootloader.ld b/bootloader/mcuboot/boot/espressif/port/esp32c6/ld/bootloader.ld new file mode 100644 index 0000000..06b6e91 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32c6/ld/bootloader.ld @@ -0,0 +1,177 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** Simplified memory map for the bootloader. + * Make sure the bootloader can load into main memory without overwriting itself. + * + * ESP32-C6 ROM static data usage is as follows: + * - 0x4086ad08 - 0x4087c610: Shared buffers, used in UART/USB/SPI download mode only + * - 0x4087c610 - 0x4087e610: PRO CPU stack, can be reclaimed as heap after RTOS startup + * - 0x4087e610 - 0x40880000: ROM .bss and .data (not easily reclaimable) + * + * The 2nd stage bootloader can take space up to the end of ROM shared + * buffers area (0x4087c610). + */ + +/* We consider 0x4087c610 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg, + * and work out iram_seg and iram_loader_seg addresses from there, backwards. + */ + +/* These lengths can be adjusted, if necessary: */ +bootloader_usable_dram_end = 0x4087c610; +bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */ +bootloader_dram_seg_len = 0xA000; +bootloader_iram_loader_seg_len = 0x7000; +bootloader_iram_seg_len = 0x9000; + +/* Start of the lower region is determined by region size and the end of the higher region */ +bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead; /* 0x4087c610 - 0x2000 = 0x4087a610 */ +bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len; /* 0x4087a610 - 0x5000 = 0x40875610 */ +bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len; /* 0x40875610 - 0x7000 = 0x4086e610 */ +bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len; /* 0x4086e610 - 0x3000 = 0x4086b610 */ + +MEMORY +{ + iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len + iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len + dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len +} + +/* The app may use RAM for static allocations up to the start of iram_loader_seg. + * If you have changed something above and this assert fails: + * 1. Check what the new value of bootloader_iram_loader_seg start is. + * 2. Update the value in this assert. + * 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32c6/memory.ld.in to the same value. + */ +ASSERT(bootloader_iram_loader_seg_start == 0x40869610, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END"); + +/* Default entry point: */ +ENTRY(main); + +SECTIONS +{ + .iram_loader.text : + { + . = ALIGN (16); + _loader_text_start = ABSOLUTE(.); + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ + *libhal.a:*.*(.literal .text .literal.* .text.*) + *esp_mcuboot.*(.literal .text .literal.* .text.*) + *esp_loader.*(.literal .text .literal.* .text.*) + *main.*(.literal .text .literal.* .text.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _loader_text_end = ABSOLUTE(.); + } > iram_loader_seg + + .iram.text : + { + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + } > iram_seg + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + _dram_start = ABSOLUTE(.); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + } >dram_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram_seg + + .dram0.rodata : + { + _rodata_start = ABSOLUTE(.); + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + . = (. + 3) & ~ 3; + /* C++ constructor and destructor tables, properly ordered: */ + __init_array_start = ABSOLUTE(.); + KEEP (*crtbegin.*(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __init_array_end = ABSOLUTE(.); + KEEP (*crtbegin.*(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + _rodata_end = ABSOLUTE(.); + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + _dram_end = ABSOLUTE(.); + } >dram_seg + + .iram.text : + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram .iram.*) /* catch stray IRAM_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } > iram_seg + +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32c6/serial_adapter.c b/bootloader/mcuboot/boot/espressif/port/esp32c6/serial_adapter.c new file mode 100644 index 0000000..5e6bb59 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32c6/serial_adapter.c @@ -0,0 +1,226 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#define SERIAL_BOOT_GPIO_DETECT CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#else +#define SERIAL_BOOT_GPIO_DETECT GPIO_NUM_3 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#define SERIAL_BOOT_GPIO_DETECT_VAL CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#else +#define SERIAL_BOOT_GPIO_DETECT_VAL 1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#define SERIAL_BOOT_DETECT_DELAY_S CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#else +#define SERIAL_BOOT_DETECT_DELAY_S 5 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#define SERIAL_BOOT_GPIO_INPUT_TYPE CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#else +// pull-down +#define SERIAL_BOOT_GPIO_INPUT_TYPE 0 +#endif + +#ifndef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + +#ifdef CONFIG_ESP_SERIAL_BOOT_UART_NUM +#define SERIAL_BOOT_UART_NUM CONFIG_ESP_SERIAL_BOOT_UART_NUM +#else +#define SERIAL_BOOT_UART_NUM ESP_ROM_UART_1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#define SERIAL_BOOT_GPIO_RX CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#else +#define SERIAL_BOOT_GPIO_RX GPIO_NUM_10 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#define SERIAL_BOOT_GPIO_TX CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#else +#define SERIAL_BOOT_GPIO_TX GPIO_NUM_11 +#endif + +static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ? + &UART0 : + &UART1; + +#endif + +void console_write(const char *str, int cnt) +{ +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + usb_serial_jtag_ll_txfifo_flush(); + while (!usb_serial_jtag_ll_txfifo_writable()) { + MCUBOOT_WATCHDOG_FEED(); + } + usb_serial_jtag_ll_write_txfifo((const uint8_t *)str, cnt); + usb_serial_jtag_ll_txfifo_flush(); +#else + uint32_t tx_len; + uint32_t write_len; + + do { + tx_len = uart_ll_get_txfifo_len(serial_boot_uart_dev); + if (tx_len > 0) { + write_len = tx_len < cnt ? tx_len : cnt; + uart_ll_write_txfifo(serial_boot_uart_dev, (const uint8_t *)str, write_len); + cnt -= write_len; + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (cnt > 0); +#endif +} + +int console_read(char *str, int cnt, int *newline) +{ +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + uint32_t read_len = 0; + + esp_rom_delay_us(1000); + do { + if (usb_serial_jtag_ll_rxfifo_data_available()) { + usb_serial_jtag_ll_read_rxfifo((uint8_t *)&str[read_len], 1); + read_len++; + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (!(read_len == cnt || str[read_len - 1] == '\n')); + *newline = (str[read_len - 1] == '\n') ? 1 : 0; + + return read_len; +#else + uint32_t len = 0; + uint32_t read_len = 0; + bool stop = false; + + do { + len = uart_ll_get_rxfifo_len(serial_boot_uart_dev); + + if (len > 0) { + for (uint32_t i = 0; i < len; i++) { + /* Read the character from the RX FIFO */ + uart_ll_read_rxfifo(serial_boot_uart_dev, (uint8_t *)&str[read_len], 1); + read_len++; + if (read_len == cnt - 1|| str[read_len - 1] == '\n') { + stop = true; + break; + } + } + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (!stop); + + *newline = (str[read_len - 1] == '\n') ? 1 : 0; + return read_len; +#endif +} + +int boot_console_init(void) +{ + BOOT_LOG_INF("Initializing serial boot pins"); + +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + usb_serial_jtag_ll_txfifo_flush(); + esp_rom_uart_tx_wait_idle(0); +#else + /* Enable GPIO for UART RX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_connect_in_signal(SERIAL_BOOT_GPIO_RX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_RX_PIN_IDX), + 0); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_pad_pullup_only(SERIAL_BOOT_GPIO_RX); + + + /* Enable GPIO for UART TX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_TX); + esp_rom_gpio_connect_out_signal(SERIAL_BOOT_GPIO_TX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_TX_PIN_IDX), + 0, 0); + gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX); + + uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_DEFAULT); + uart_ll_set_mode_normal(serial_boot_uart_dev); + uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_DEFAULT); + uart_ll_set_stop_bits(serial_boot_uart_dev, 1u); + uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE); + uart_ll_set_rx_tout(serial_boot_uart_dev, 16); + uart_ll_set_data_bit_num(serial_boot_uart_dev, UART_DATA_8_BITS); + uart_ll_set_tx_idle_num(serial_boot_uart_dev, 0); + uart_ll_set_hw_flow_ctrl(serial_boot_uart_dev, UART_HW_FLOWCTRL_DISABLE, 100); + periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + SERIAL_BOOT_UART_NUM); + + uart_ll_txfifo_rst(serial_boot_uart_dev); + uart_ll_rxfifo_rst(serial_boot_uart_dev); + esp_rom_delay_us(50000); +#endif + + return 0; +} + +bool boot_serial_detect_pin(void) +{ + bool detected = false; + int pin_value = 0; + + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_DETECT); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_DETECT); + switch (SERIAL_BOOT_GPIO_INPUT_TYPE) { + // Pull-down + case 0: + gpio_ll_pulldown_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + // Pull-up + case 1: + gpio_ll_pullup_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + } + esp_rom_delay_us(50000); + + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + esp_rom_delay_us(50000); + + if (detected) { + if (SERIAL_BOOT_DETECT_DELAY_S > 0) { + /* The delay time is an approximation */ + for (int i = 0; i < (SERIAL_BOOT_DETECT_DELAY_S * 100); i++) { + esp_rom_delay_us(10000); + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + if (!detected) { + break; + } + } + } + } + return detected; +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32h2/bootloader.conf b/bootloader/mcuboot/boot/espressif/port/esp32h2/bootloader.conf new file mode 100644 index 0000000..5c5307c --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32h2/bootloader.conf @@ -0,0 +1,88 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ESP_FLASH_SIZE=4MB +CONFIG_ESP_BOOTLOADER_SIZE=0xF000 +CONFIG_ESP_BOOTLOADER_OFFSET=0x0000 +CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +CONFIG_ESP_APPLICATION_SIZE=0x100000 +CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x110000 +CONFIG_ESP_MCUBOOT_WDT_ENABLE=y +CONFIG_ESP_SCRATCH_OFFSET=0x210000 +CONFIG_ESP_SCRATCH_SIZE=0x40000 + +# When enabled, prevents updating image to an older version +# CONFIG_ESP_DOWNGRADE_PREVENTION=y +# This option makes downgrade prevention rely also on security +# counter (defined using imgtool) instead of only image version +# CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y + +# Enables the MCUboot Serial Recovery, that allows the use of +# MCUMGR to upload a firmware through the serial port +# CONFIG_ESP_MCUBOOT_SERIAL=y +# Use Serial through USB JTAG Serial port for Serial Recovery +# CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG=y +# Use sector erasing (recommended) instead of entire image size +# erasing when uploading through Serial Recovery +# CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y + +# GPIO used to boot on Serial Recovery +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 +# GPIO input type (0 for Pull-down, 1 for Pull-up) +# CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0 +# GPIO signal value +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1 +# Delay time for identify the GPIO signal +# CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5 +# UART port used for serial communication (not needed when using USB) +# CONFIG_ESP_SERIAL_BOOT_UART_NUM=1 +# GPIO for Serial RX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_RX=8 +# GPIO for Serial TX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_TX=9 + +# Use UART0 for console printing (use either UART or USB alone) +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +# Configures alternative UART port for console printing +# (UART_NUM=0 must not be changed) +# CONFIG_ESP_CONSOLE_UART_CUSTOM=y +# CONFIG_ESP_CONSOLE_UART_TX_GPIO=9 +# CONFIG_ESP_CONSOLE_UART_RX_GPIO=8 +# Use USB JTAG Serial for console printing +# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y + +# CONFIG_ESP_SIGN_EC256=y +# CONFIG_ESP_SIGN_ED25519=n +# CONFIG_ESP_SIGN_RSA=n +# CONFIG_ESP_SIGN_RSA_LEN=2048 + +# Use Tinycrypt lib for EC256 or ED25519 signing +# CONFIG_ESP_USE_TINYCRYPT=y +# Use Mbed TLS lib for RSA image signing +# CONFIG_ESP_USE_MBEDTLS=n + +# It is strongly recommended to generate a new signing key +# using imgtool instead of use the existent sample +# CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem + +# Hardware Secure Boot related options +# CONFIG_SECURE_SIGNED_ON_BOOT=1 +# CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 +# CONFIG_SECURE_BOOT=1 +# CONFIG_SECURE_BOOT_V2_ENABLED=1 +# CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 + +# Hardware Flash Encryption related options +# CONFIG_SECURE_FLASH_ENC_ENABLED=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1 +# CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1 +# CONFIG_SECURE_BOOT_ALLOW_JTAG=1 +# CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=1 + +# Options for enabling eFuse emulation in Flash +# CONFIG_EFUSE_VIRTUAL=1 +# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1 diff --git a/bootloader/mcuboot/boot/espressif/port/esp32h2/ld/bootloader.ld b/bootloader/mcuboot/boot/espressif/port/esp32h2/ld/bootloader.ld new file mode 100644 index 0000000..b4330bf --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32h2/ld/bootloader.ld @@ -0,0 +1,179 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** Simplified memory map for the bootloader. + * Make sure the bootloader can load into main memory without overwriting itself. + * + * ESP32-H2 ROM static data usage is as follows: + * - 0x4083ba78 - 0x4084d380: Shared buffers, used in UART/USB/SPI download mode only + * - 0x4084d380 - 0x4084f380: PRO CPU stack, can be reclaimed as heap after RTOS startup + * - 0x4084f380 - 0x4084fee0: ROM .bss and .data used in startup code or nonos/early boot (can be freed when IDF runs) + * - 0x4084fee0 - 0x40850000: ROM .bss and .data used in startup code and when IDF runs (cannot be freed) + * + * The 2nd stage bootloader can take space up to the end of ROM shared + * buffers area (0x4084d380). + */ + +/* We consider 0x3fcdc710 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg, + * and work out iram_seg and iram_loader_seg addresses from there, backwards. + */ + +/* These lengths can be adjusted, if necessary: */ +bootloader_usable_dram_end = 0x4084cfd0; +bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */ +bootloader_dram_seg_len = 0xA000; +bootloader_iram_loader_seg_len = 0x7000; +bootloader_iram_seg_len = 0x8800; + +/* Start of the lower region is determined by region size and the end of the higher region */ +bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead; +bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len; +bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len; +bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len; + +MEMORY +{ + iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len + iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len + dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len +} + +/* The app may use RAM for static allocations up to the start of iram_loader_seg. + * If you have changed something above and this assert fails: + * 1. Check what the new value of bootloader_iram_loader_seg start is. + * 2. Update the value in this assert. + * 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32h2/memory.ld.in to the same value. + */ +ASSERT(bootloader_iram_loader_seg_start == 0x40839FD0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END"); + +/* Default entry point: */ +ENTRY(main); + +SECTIONS +{ + .iram_loader.text : + { + . = ALIGN (16); + _loader_text_start = ABSOLUTE(.); + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ + *libhal.a:*.*(.literal .text .literal.* .text.*) + *esp_mcuboot.*(.literal .text .literal.* .text.*) + *esp_loader.*(.literal .text .literal.* .text.*) + *main.*(.literal .text .literal.* .text.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _loader_text_end = ABSOLUTE(.); + } > iram_loader_seg + + .iram.text : + { + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + } > iram_seg + + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + _dram_start = ABSOLUTE(.); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + } >dram_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram_seg + + .dram0.rodata : + { + _rodata_start = ABSOLUTE(.); + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + . = (. + 3) & ~ 3; + /* C++ constructor and destructor tables, properly ordered: */ + __init_array_start = ABSOLUTE(.); + KEEP (*crtbegin.*(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __init_array_end = ABSOLUTE(.); + KEEP (*crtbegin.*(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + _rodata_end = ABSOLUTE(.); + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + _dram_end = ABSOLUTE(.); + } >dram_seg + + .iram.text : + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram .iram.*) /* catch stray IRAM_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } > iram_seg + +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32h2/serial_adapter.c b/bootloader/mcuboot/boot/espressif/port/esp32h2/serial_adapter.c new file mode 100644 index 0000000..acd76b0 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32h2/serial_adapter.c @@ -0,0 +1,226 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#define SERIAL_BOOT_GPIO_DETECT CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#else +#define SERIAL_BOOT_GPIO_DETECT GPIO_NUM_12 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#define SERIAL_BOOT_GPIO_DETECT_VAL CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#else +#define SERIAL_BOOT_GPIO_DETECT_VAL 1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#define SERIAL_BOOT_DETECT_DELAY_S CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#else +#define SERIAL_BOOT_DETECT_DELAY_S 5 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#define SERIAL_BOOT_GPIO_INPUT_TYPE CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#else +// pull-down +#define SERIAL_BOOT_GPIO_INPUT_TYPE 0 +#endif + +#ifndef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + +#ifdef CONFIG_ESP_SERIAL_BOOT_UART_NUM +#define SERIAL_BOOT_UART_NUM CONFIG_ESP_SERIAL_BOOT_UART_NUM +#else +#define SERIAL_BOOT_UART_NUM ESP_ROM_UART_1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#define SERIAL_BOOT_GPIO_RX CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#else +#define SERIAL_BOOT_GPIO_RX GPIO_NUM_10 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#define SERIAL_BOOT_GPIO_TX CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#else +#define SERIAL_BOOT_GPIO_TX GPIO_NUM_11 +#endif + +static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ? + &UART0 : + &UART1; + +#endif + +void console_write(const char *str, int cnt) +{ +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + usb_serial_jtag_ll_txfifo_flush(); + while (!usb_serial_jtag_ll_txfifo_writable()) { + MCUBOOT_WATCHDOG_FEED(); + } + usb_serial_jtag_ll_write_txfifo((const uint8_t *)str, cnt); + usb_serial_jtag_ll_txfifo_flush(); +#else + uint32_t tx_len; + uint32_t write_len; + + do { + tx_len = uart_ll_get_txfifo_len(serial_boot_uart_dev); + if (tx_len > 0) { + write_len = tx_len < cnt ? tx_len : cnt; + uart_ll_write_txfifo(serial_boot_uart_dev, (const uint8_t *)str, write_len); + cnt -= write_len; + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (cnt > 0); +#endif +} + +int console_read(char *str, int cnt, int *newline) +{ +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + uint32_t read_len = 0; + + esp_rom_delay_us(1000); + do { + if (usb_serial_jtag_ll_rxfifo_data_available()) { + usb_serial_jtag_ll_read_rxfifo((uint8_t *)&str[read_len], 1); + read_len++; + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (!(read_len == cnt || str[read_len - 1] == '\n')); + *newline = (str[read_len - 1] == '\n') ? 1 : 0; + + return read_len; +#else + uint32_t len = 0; + uint32_t read_len = 0; + bool stop = false; + + do { + len = uart_ll_get_rxfifo_len(serial_boot_uart_dev); + + if (len > 0) { + for (uint32_t i = 0; i < len; i++) { + /* Read the character from the RX FIFO */ + uart_ll_read_rxfifo(serial_boot_uart_dev, (uint8_t *)&str[read_len], 1); + read_len++; + if (read_len == cnt - 1|| str[read_len - 1] == '\n') { + stop = true; + break; + } + } + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (!stop); + + *newline = (str[read_len - 1] == '\n') ? 1 : 0; + return read_len; +#endif +} + +int boot_console_init(void) +{ + BOOT_LOG_INF("Initializing serial boot pins"); + +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + usb_serial_jtag_ll_txfifo_flush(); + esp_rom_uart_tx_wait_idle(0); +#else + /* Enable GPIO for UART RX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_connect_in_signal(SERIAL_BOOT_GPIO_RX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_RX_PIN_IDX), + 0); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_pad_pullup_only(SERIAL_BOOT_GPIO_RX); + + + /* Enable GPIO for UART TX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_TX); + esp_rom_gpio_connect_out_signal(SERIAL_BOOT_GPIO_TX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_TX_PIN_IDX), + 0, 0); + gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX); + + uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_DEFAULT); + uart_ll_set_mode_normal(serial_boot_uart_dev); + uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_DEFAULT); + uart_ll_set_stop_bits(serial_boot_uart_dev, 1u); + uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE); + uart_ll_set_rx_tout(serial_boot_uart_dev, 16); + uart_ll_set_data_bit_num(serial_boot_uart_dev, UART_DATA_8_BITS); + uart_ll_set_tx_idle_num(serial_boot_uart_dev, 0); + uart_ll_set_hw_flow_ctrl(serial_boot_uart_dev, UART_HW_FLOWCTRL_DISABLE, 100); + periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + SERIAL_BOOT_UART_NUM); + + uart_ll_txfifo_rst(serial_boot_uart_dev); + uart_ll_rxfifo_rst(serial_boot_uart_dev); + esp_rom_delay_us(50000); +#endif + + return 0; +} + +bool boot_serial_detect_pin(void) +{ + bool detected = false; + int pin_value = 0; + + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_DETECT); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_DETECT); + switch (SERIAL_BOOT_GPIO_INPUT_TYPE) { + // Pull-down + case 0: + gpio_ll_pulldown_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + // Pull-up + case 1: + gpio_ll_pullup_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + } + esp_rom_delay_us(50000); + + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + esp_rom_delay_us(50000); + + if (detected) { + if (SERIAL_BOOT_DETECT_DELAY_S > 0) { + /* The delay time is an approximation */ + for (int i = 0; i < (SERIAL_BOOT_DETECT_DELAY_S * 100); i++) { + esp_rom_delay_us(10000); + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + if (!detected) { + break; + } + } + } + } + return detected; +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32s2/bootloader.conf b/bootloader/mcuboot/boot/espressif/port/esp32s2/bootloader.conf new file mode 100644 index 0000000..485ba77 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32s2/bootloader.conf @@ -0,0 +1,84 @@ +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ESP_FLASH_SIZE=4MB +CONFIG_ESP_BOOTLOADER_SIZE=0xF000 +CONFIG_ESP_BOOTLOADER_OFFSET=0x1000 +CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +CONFIG_ESP_APPLICATION_SIZE=0x100000 +CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x110000 +CONFIG_ESP_MCUBOOT_WDT_ENABLE=y +CONFIG_ESP_SCRATCH_OFFSET=0x210000 +CONFIG_ESP_SCRATCH_SIZE=0x40000 + +# When enabled, prevents updating image to an older version +# CONFIG_ESP_DOWNGRADE_PREVENTION=y +# This option makes downgrade prevention rely also on security +# counter (defined using imgtool) instead of only image version +# CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y + +# Enables the MCUboot Serial Recovery, that allows the use of +# MCUMGR to upload a firmware through the serial port +# CONFIG_ESP_MCUBOOT_SERIAL=y +# Use sector erasing (recommended) instead of entire image size +# erasing when uploading through Serial Recovery +# CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y + +# GPIO used to boot on Serial Recovery +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 +# GPIO input type (0 for Pull-down, 1 for Pull-up) +# CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0 +# GPIO signal value +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1 +# Delay time for identify the GPIO signal +# CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5 +# UART port used for serial communication (not needed when using USB) +# CONFIG_ESP_SERIAL_BOOT_UART_NUM=1 +# GPIO for Serial RX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_RX=18 +# GPIO for Serial TX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_TX=17 + +# Use UART0 for console printing (use either UART or USB alone) +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +# Configures alternative UART port for console printing +# (UART_NUM=0 must not be changed) +# CONFIG_ESP_CONSOLE_UART_CUSTOM=y +# CONFIG_ESP_CONSOLE_UART_TX_GPIO=17 +# CONFIG_ESP_CONSOLE_UART_RX_GPIO=18 + +# CONFIG_ESP_SIGN_EC256=y +# CONFIG_ESP_SIGN_ED25519=n +# CONFIG_ESP_SIGN_RSA=n +# CONFIG_ESP_SIGN_RSA_LEN=2048 + +# Use Tinycrypt lib for EC256 or ED25519 signing +# CONFIG_ESP_USE_TINYCRYPT=y +# Use Mbed TLS lib for RSA image signing +# CONFIG_ESP_USE_MBEDTLS=n + +# It is strongly recommended to generate a new signing key +# using imgtool instead of use the existent sample +# CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem + +# Hardware Secure Boot related options +# CONFIG_SECURE_SIGNED_ON_BOOT=1 +# CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 +# CONFIG_SECURE_BOOT=1 +# CONFIG_SECURE_BOOT_V2_ENABLED=1 +# CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 + +# Hardware Flash Encryption related options +# CONFIG_SECURE_FLASH_ENC_ENABLED=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1 +# CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1 +# CONFIG_SECURE_BOOT_ALLOW_JTAG=1 +# CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=1 + +# Options for enabling eFuse emulation in Flash +# CONFIG_EFUSE_VIRTUAL=1 +# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1 diff --git a/bootloader/mcuboot/boot/espressif/port/esp32s2/ld/bootloader.ld b/bootloader/mcuboot/boot/espressif/port/esp32s2/ld/bootloader.ld new file mode 100644 index 0000000..cf159c3 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32s2/ld/bootloader.ld @@ -0,0 +1,147 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Simplified memory map for the bootloader. + * + * The main purpose is to make sure the bootloader can load into main memory + * without overwriting itself. + */ + +MEMORY +{ + iram_seg (RWX) : org = 0x40047000, len = 0x9000 + iram_loader_seg (RWX) : org = 0x40050000, len = 0x6000 + dram_seg (RW) : org = 0x3FFE6000, len = 0x9000 +} + +/* Default entry point: */ +ENTRY(main); + +SECTIONS +{ + .iram_loader.text : + { + . = ALIGN (16); + _loader_text_start = ABSOLUTE(.); + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ + *libhal.a:*.*(.literal .text .literal.* .text.*) + *esp_mcuboot.*(.literal .text .literal.* .text.*) + *esp_loader.*(.literal .text .literal.* .text.*) + *main.*(.literal .text .literal.* .text.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _loader_text_end = ABSOLUTE(.); + } > iram_loader_seg + + .iram.text : + { + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + } > iram_seg + + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + _dram_start = ABSOLUTE(.); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + } >dram_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram_seg + + .dram0.rodata : + { + _rodata_start = ABSOLUTE(.); + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + . = (. + 3) & ~ 3; + /* C++ constructor and destructor tables, properly ordered: */ + __init_array_start = ABSOLUTE(.); + KEEP (*crtbegin.*(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __init_array_end = ABSOLUTE(.); + KEEP (*crtbegin.*(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + _rodata_end = ABSOLUTE(.); + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + _dram_end = ABSOLUTE(.); + } >dram_seg + + .iram.text : + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram .iram.*) /* catch stray IRAM_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } > iram_seg + +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32s2/serial_adapter.c b/bootloader/mcuboot/boot/espressif/port/esp32s2/serial_adapter.c new file mode 100644 index 0000000..e22a6ba --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32s2/serial_adapter.c @@ -0,0 +1,191 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#define SERIAL_BOOT_GPIO_DETECT CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#else +#define SERIAL_BOOT_GPIO_DETECT GPIO_NUM_5 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#define SERIAL_BOOT_GPIO_DETECT_VAL CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#else +#define SERIAL_BOOT_GPIO_DETECT_VAL 1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#define SERIAL_BOOT_DETECT_DELAY_S CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#else +#define SERIAL_BOOT_DETECT_DELAY_S 5 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#define SERIAL_BOOT_GPIO_INPUT_TYPE CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#else +// pull-down +#define SERIAL_BOOT_GPIO_INPUT_TYPE 0 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_UART_NUM +#define SERIAL_BOOT_UART_NUM CONFIG_ESP_SERIAL_BOOT_UART_NUM +#else +#define SERIAL_BOOT_UART_NUM ESP_ROM_UART_1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#define SERIAL_BOOT_GPIO_RX CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#else +#define SERIAL_BOOT_GPIO_RX GPIO_NUM_18 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#define SERIAL_BOOT_GPIO_TX CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#else +#define SERIAL_BOOT_GPIO_TX GPIO_NUM_17 +#endif + +static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ? + &UART0 : + &UART1; + +void console_write(const char *str, int cnt) +{ + uint32_t tx_len; + uint32_t write_len; + + do { + tx_len = uart_ll_get_txfifo_len(serial_boot_uart_dev); + if (tx_len > 0) { + write_len = tx_len < cnt ? tx_len : cnt; + uart_ll_write_txfifo(serial_boot_uart_dev, (const uint8_t *)str, write_len); + cnt -= write_len; + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (cnt > 0); +} + +int console_read(char *str, int cnt, int *newline) +{ + uint32_t len = 0; + uint32_t read_len = 0; + bool stop = false; + + do { + len = uart_ll_get_rxfifo_len(serial_boot_uart_dev); + + if (len > 0) { + for (uint32_t i = 0; i < len; i++) { + /* Read the character from the RX FIFO */ + uart_ll_read_rxfifo(serial_boot_uart_dev, (uint8_t *)&str[read_len], 1); + read_len++; + if (read_len == cnt - 1|| str[read_len - 1] == '\n') { + stop = true; + break; + } + } + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (!stop); + *newline = (str[read_len - 1] == '\n') ? 1 : 0; + return read_len; +} + +int boot_console_init(void) +{ + BOOT_LOG_INF("Initializing serial boot pins"); + + /* Enable GPIO for UART RX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_connect_in_signal(SERIAL_BOOT_GPIO_RX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_RX_PIN_IDX), + 0); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_pad_pullup_only(SERIAL_BOOT_GPIO_RX); + + /* Enable GPIO for UART TX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_TX); + esp_rom_gpio_connect_out_signal(SERIAL_BOOT_GPIO_TX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_TX_PIN_IDX), + 0, 0); + gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX); + + uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_APB); + uart_ll_set_mode_normal(serial_boot_uart_dev); + uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_APB); + uart_ll_set_stop_bits(serial_boot_uart_dev, 1u); + uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE); + uart_ll_set_rx_tout(serial_boot_uart_dev, 16); + uart_ll_set_data_bit_num(serial_boot_uart_dev, UART_DATA_8_BITS); + uart_ll_set_tx_idle_num(serial_boot_uart_dev, 0); + uart_ll_set_hw_flow_ctrl(serial_boot_uart_dev, UART_HW_FLOWCTRL_DISABLE, 100); + periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + SERIAL_BOOT_UART_NUM); + + uart_ll_txfifo_rst(serial_boot_uart_dev); + uart_ll_rxfifo_rst(serial_boot_uart_dev); + esp_rom_delay_us(50000); + + return 0; +} + +bool boot_serial_detect_pin(void) +{ + bool detected = false; + int pin_value = 0; + + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_DETECT); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_DETECT); + switch (SERIAL_BOOT_GPIO_INPUT_TYPE) { + // Pull-down + case 0: + gpio_ll_pulldown_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + // Pull-up + case 1: + gpio_ll_pullup_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + } + esp_rom_delay_us(50000); + + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + esp_rom_delay_us(50000); + + if (detected) { + if (SERIAL_BOOT_DETECT_DELAY_S > 0) { + /* The delay time is an approximation */ + for (int i = 0; i < (SERIAL_BOOT_DETECT_DELAY_S * 100); i++) { + esp_rom_delay_us(10000); + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + if (!detected) { + break; + } + } + } + } + return detected; +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32s3/bootloader-multi.conf b/bootloader/mcuboot/boot/espressif/port/esp32s3/bootloader-multi.conf new file mode 100644 index 0000000..21c3457 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32s3/bootloader-multi.conf @@ -0,0 +1,38 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ESP_FLASH_SIZE=4MB +CONFIG_ESP_BOOTLOADER_SIZE=0xF000 +CONFIG_ESP_BOOTLOADER_OFFSET=0x0000 +CONFIG_ESP_MCUBOOT_WDT_ENABLE=y +# Example of values to be used when multi image is enabled +# Notice that the OS layer and update agent must be aware +# of these regions +CONFIG_ESP_APPLICATION_SIZE=0x80000 +CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x90000 +CONFIG_ESP_IMAGE1_PRIMARY_START_ADDRESS=0x110000 +CONFIG_ESP_IMAGE1_SECONDARY_START_ADDRESS=0x190000 +CONFIG_ESP_SCRATCH_OFFSET=0x210000 +CONFIG_ESP_SCRATCH_SIZE=0x40000 + +# Use UART0 for console printing (use either UART or USB alone) +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +# Configures alternative UART port for console printing +# (UART_NUM=0 must not be changed) +# CONFIG_ESP_CONSOLE_UART_CUSTOM=y +# CONFIG_ESP_CONSOLE_UART_TX_GPIO=17 +# CONFIG_ESP_CONSOLE_UART_RX_GPIO=18 +# Use USB JTAG Serial for console printing +# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y + +# Enables multi image, if it is not defined, it is assumed +# only one updatable image +# CONFIG_ESP_IMAGE_NUMBER=2 + +# Enables multi image boot on independent processors +# (main host OS is not responsible for booting the second image) +# Use only with CONFIG_ESP_IMAGE_NUMBER=2 +# CONFIG_ESP_MULTI_PROCESSOR_BOOT=y diff --git a/bootloader/mcuboot/boot/espressif/port/esp32s3/bootloader.conf b/bootloader/mcuboot/boot/espressif/port/esp32s3/bootloader.conf new file mode 100644 index 0000000..138737d --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32s3/bootloader.conf @@ -0,0 +1,108 @@ +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ESP_FLASH_SIZE=4MB +CONFIG_ESP_BOOTLOADER_SIZE=0xF000 +CONFIG_ESP_BOOTLOADER_OFFSET=0x0000 +CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +CONFIG_ESP_APPLICATION_SIZE=0x100000 +CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x110000 +CONFIG_ESP_MCUBOOT_WDT_ENABLE=y +CONFIG_ESP_SCRATCH_OFFSET=0x210000 +CONFIG_ESP_SCRATCH_SIZE=0x40000 + +# When enabled, prevents updating image to an older version +# CONFIG_ESP_DOWNGRADE_PREVENTION=y +# This option makes downgrade prevention rely also on security +# counter (defined using imgtool) instead of only image version +# CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y + +# Enables multi image, if it is not defined, it is assumed +# only one updatable image +# CONFIG_ESP_IMAGE_NUMBER=2 + +# Enables multi image boot on independent processors +# (main host OS is not responsible for booting the second image) +# Use only with CONFIG_ESP_IMAGE_NUMBER=2 +# CONFIG_ESP_MULTI_PROCESSOR_BOOT=y + +# Example of values to be used when multi image is enabled +# Notice that the OS layer and update agent must be aware +# of these regions +# CONFIG_ESP_APPLICATION_SIZE=0x80000 +# CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +# CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x90000 +# CONFIG_ESP_IMAGE1_PRIMARY_START_ADDRESS=0x110000 +# CONFIG_ESP_IMAGE1_SECONDARY_START_ADDRESS=0x190000 +# CONFIG_ESP_SCRATCH_OFFSET=0x210000 +# CONFIG_ESP_SCRATCH_SIZE=0x40000 + +# Enables the MCUboot Serial Recovery, that allows the use of +# MCUMGR to upload a firmware through the serial port +# CONFIG_ESP_MCUBOOT_SERIAL=y +# Use Serial through USB JTAG Serial port for Serial Recovery +# CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG=y +# Use sector erasing (recommended) instead of entire image size +# erasing when uploading through Serial Recovery +# CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y + +# GPIO used to boot on Serial Recovery +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 +# GPIO input type (0 for Pull-down, 1 for Pull-up) +# CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0 +# GPIO signal value +# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1 +# Delay time for identify the GPIO signal +# CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5 +# UART port used for serial communication (not needed when using USB) +# CONFIG_ESP_SERIAL_BOOT_UART_NUM=1 +# GPIO for Serial RX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_RX=18 +# GPIO for Serial TX signal +# CONFIG_ESP_SERIAL_BOOT_GPIO_TX=17 + +# Use UART0 for console printing (use either UART or USB alone) +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +# Configures alternative UART port for console printing +# (UART_NUM=0 must not be changed) +# CONFIG_ESP_CONSOLE_UART_CUSTOM=y +# CONFIG_ESP_CONSOLE_UART_TX_GPIO=17 +# CONFIG_ESP_CONSOLE_UART_RX_GPIO=18 +# Use USB JTAG Serial for console printing +# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y + +# CONFIG_ESP_SIGN_EC256=y +# CONFIG_ESP_SIGN_ED25519=n +# CONFIG_ESP_SIGN_RSA=n +# CONFIG_ESP_SIGN_RSA_LEN=2048 + +# Use Tinycrypt lib for EC256 or ED25519 signing +# CONFIG_ESP_USE_TINYCRYPT=y +# Use Mbed TLS lib for RSA image signing +# CONFIG_ESP_USE_MBEDTLS=n + +# It is strongly recommended to generate a new signing key +# using imgtool instead of use the existent sample +# CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem + +# Hardware Secure Boot related options +# CONFIG_SECURE_SIGNED_ON_BOOT=1 +# CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 +# CONFIG_SECURE_BOOT=1 +# CONFIG_SECURE_BOOT_V2_ENABLED=1 +# CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 + +# Hardware Flash Encryption related options +# CONFIG_SECURE_FLASH_ENC_ENABLED=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1 +# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1 +# CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1 +# CONFIG_SECURE_BOOT_ALLOW_JTAG=1 +# CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=1 + +# Options for enabling eFuse emulation in Flash +# CONFIG_EFUSE_VIRTUAL=1 +# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1 diff --git a/bootloader/mcuboot/boot/espressif/port/esp32s3/ld/bootloader.ld b/bootloader/mcuboot/boot/espressif/port/esp32s3/ld/bootloader.ld new file mode 100644 index 0000000..082081e --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32s3/ld/bootloader.ld @@ -0,0 +1,147 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Simplified memory map for the bootloader. + * + * The main purpose is to make sure the bootloader can load into main memory + * without overwriting itself. + */ + +MEMORY +{ + iram_seg (RWX) : org = 0x403B0000, len = 0xA000 + iram_loader_seg (RWX) : org = 0x403BA000, len = 0x6000 + dram_seg (RW) : org = 0x3FCD0000, len = 0x9A00 +} + +/* Default entry point: */ +ENTRY(main); + +SECTIONS +{ + .iram_loader.text : + { + . = ALIGN (16); + _loader_text_start = ABSOLUTE(.); + *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ + *libhal.a:*.*(.literal .text .literal.* .text.*) + *esp_mcuboot.*(.literal .text .literal.* .text.*) + *esp_loader.*(.literal .text .literal.* .text.*) + *main.*(.literal .text .literal.* .text.*) + *(.fini.literal) + *(.fini) + *(.gnu.version) + _loader_text_end = ABSOLUTE(.); + } > iram_loader_seg + + .iram.text : + { + . = ALIGN (16); + *(.entry.text) + *(.init.literal) + *(.init) + } > iram_seg + + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + _dram_start = ABSOLUTE(.); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + } >dram_seg + + .dram0.data : + { + _data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.jcr) + _data_end = ABSOLUTE(.); + } >dram_seg + + .dram0.rodata : + { + _rodata_start = ABSOLUTE(.); + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + . = (. + 3) & ~ 3; + /* C++ constructor and destructor tables, properly ordered: */ + __init_array_start = ABSOLUTE(.); + KEEP (*crtbegin.*(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __init_array_end = ABSOLUTE(.); + KEEP (*crtbegin.*(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + /* C++ exception handlers table: */ + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + _rodata_end = ABSOLUTE(.); + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + _dram_end = ABSOLUTE(.); + } >dram_seg + + .iram.text : + { + _stext = .; + _text_start = ABSOLUTE(.); + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.iram .iram.*) /* catch stray IRAM_ATTR */ + *(.fini.literal) + *(.fini) + *(.gnu.version) + _text_end = ABSOLUTE(.); + _etext = .; + } > iram_seg + +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp32s3/serial_adapter.c b/bootloader/mcuboot/boot/espressif/port/esp32s3/serial_adapter.c new file mode 100644 index 0000000..7b244a6 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp32s3/serial_adapter.c @@ -0,0 +1,228 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#define SERIAL_BOOT_GPIO_DETECT CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT +#else +#define SERIAL_BOOT_GPIO_DETECT GPIO_NUM_5 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#define SERIAL_BOOT_GPIO_DETECT_VAL CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL +#else +#define SERIAL_BOOT_GPIO_DETECT_VAL 1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#define SERIAL_BOOT_DETECT_DELAY_S CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S +#else +#define SERIAL_BOOT_DETECT_DELAY_S 5 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#define SERIAL_BOOT_GPIO_INPUT_TYPE CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE +#else +// pull-down +#define SERIAL_BOOT_GPIO_INPUT_TYPE 0 +#endif + +#ifndef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + +#ifdef CONFIG_ESP_SERIAL_BOOT_UART_NUM +#define SERIAL_BOOT_UART_NUM CONFIG_ESP_SERIAL_BOOT_UART_NUM +#else +#define SERIAL_BOOT_UART_NUM ESP_ROM_UART_1 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#define SERIAL_BOOT_GPIO_RX CONFIG_ESP_SERIAL_BOOT_GPIO_RX +#else +#define SERIAL_BOOT_GPIO_RX GPIO_NUM_18 +#endif + +#ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#define SERIAL_BOOT_GPIO_TX CONFIG_ESP_SERIAL_BOOT_GPIO_TX +#else +#define SERIAL_BOOT_GPIO_TX GPIO_NUM_17 +#endif + +static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ? + &UART0 : + &UART1; + +#endif + +void console_write(const char *str, int cnt) +{ +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + usb_serial_jtag_ll_txfifo_flush(); + while (!usb_serial_jtag_ll_txfifo_writable()) { + MCUBOOT_WATCHDOG_FEED(); + } + usb_serial_jtag_ll_write_txfifo((const uint8_t *)str, cnt); + usb_serial_jtag_ll_txfifo_flush(); +#else + uint32_t tx_len; + uint32_t write_len; + + do { + tx_len = uart_ll_get_txfifo_len(serial_boot_uart_dev); + if (tx_len > 0) { + write_len = tx_len < cnt ? tx_len : cnt; + uart_ll_write_txfifo(serial_boot_uart_dev, (const uint8_t *)str, write_len); + cnt -= write_len; + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (cnt > 0); +#endif +} + +int console_read(char *str, int cnt, int *newline) +{ +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + + uint32_t read_len = 0; + + esp_rom_delay_us(1000); + do { + if (usb_serial_jtag_ll_rxfifo_data_available()) { + usb_serial_jtag_ll_read_rxfifo((uint8_t *)&str[read_len], 1); + read_len++; + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (!(read_len == cnt || str[read_len - 1] == '\n')); + *newline = (str[read_len - 1] == '\n') ? 1 : 0; + + return read_len; +#else + uint32_t len = 0; + uint32_t read_len = 0; + bool stop = false; + + do { + len = uart_ll_get_rxfifo_len(serial_boot_uart_dev); + + if (len > 0) { + for (uint32_t i = 0; i < len; i++) { + /* Read the character from the RX FIFO */ + uart_ll_read_rxfifo(serial_boot_uart_dev, (uint8_t *)&str[read_len], 1); + read_len++; + if (read_len == cnt - 1|| str[read_len - 1] == '\n') { + stop = true; + break; + } + } + } + MCUBOOT_WATCHDOG_FEED(); + esp_rom_delay_us(1000); + } while (!stop); + + *newline = (str[read_len - 1] == '\n') ? 1 : 0; + return read_len; +#endif +} + +int boot_console_init(void) +{ + BOOT_LOG_INF("Initializing serial boot pins"); + +#ifdef CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG + usb_serial_jtag_ll_txfifo_flush(); + esp_rom_uart_tx_wait_idle(0); +#else + /* Enable GPIO for UART RX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_connect_in_signal(SERIAL_BOOT_GPIO_RX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_RX_PIN_IDX), + 0); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_RX); + esp_rom_gpio_pad_pullup_only(SERIAL_BOOT_GPIO_RX); + + /* Enable GPIO for UART TX */ + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_TX); + esp_rom_gpio_connect_out_signal(SERIAL_BOOT_GPIO_TX, + UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_TX_PIN_IDX), + 0, 0); + gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX); + + uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_APB); + uart_ll_set_mode_normal(serial_boot_uart_dev); + uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_APB); + uart_ll_set_stop_bits(serial_boot_uart_dev, 1u); + uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE); + uart_ll_set_rx_tout(serial_boot_uart_dev, 16); + uart_ll_set_data_bit_num(serial_boot_uart_dev, UART_DATA_8_BITS); + uart_ll_set_tx_idle_num(serial_boot_uart_dev, 0); + uart_ll_set_hw_flow_ctrl(serial_boot_uart_dev, UART_HW_FLOWCTRL_DISABLE, 100); + periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + SERIAL_BOOT_UART_NUM); + + uart_ll_txfifo_rst(serial_boot_uart_dev); + uart_ll_rxfifo_rst(serial_boot_uart_dev); + esp_rom_delay_us(50000); +#endif + return 0; +} + +bool boot_serial_detect_pin(void) +{ + bool detected = false; + int pin_value = 0; + + esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_DETECT); + gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_DETECT); + switch (SERIAL_BOOT_GPIO_INPUT_TYPE) { + // Pull-down + case 0: + gpio_ll_pulldown_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + // Pull-up + case 1: + gpio_ll_pullup_en(&GPIO, SERIAL_BOOT_GPIO_DETECT); + break; + } + esp_rom_delay_us(50000); + + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + esp_rom_delay_us(50000); + + if (detected) { + if (SERIAL_BOOT_DETECT_DELAY_S > 0) { + /* The delay time is an approximation */ + for (int i = 0; i < (SERIAL_BOOT_DETECT_DELAY_S * 100); i++) { + esp_rom_delay_us(10000); + pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT); + detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL); + if (!detected) { + break; + } + } + } + } + return detected; +} diff --git a/bootloader/mcuboot/boot/espressif/port/esp_loader.c b/bootloader/mcuboot/boot/espressif/port/esp_loader.c new file mode 100644 index 0000000..9074665 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp_loader.c @@ -0,0 +1,105 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include +#include + +#include "bootloader_memory_utils.h" +#include "bootloader_flash_priv.h" +#include "esp_flash_encrypt.h" + +#include "rom/uart.h" + +#include "esp_mcuboot_image.h" +#include "esp_loader.h" +#include "flash_map_backend/flash_map_backend.h" + +#ifdef CONFIG_ESP_MULTI_PROCESSOR_BOOT +#include "app_cpu_start.h" +#endif + +static int load_segment(const struct flash_area *fap, uint32_t data_addr, uint32_t data_len, uint32_t load_addr) +{ + const uint32_t *data = (const uint32_t *)bootloader_mmap((fap->fa_off + data_addr), data_len); + if (!data) { + BOOT_LOG_ERR("%s: Bootloader mmap failed", __func__); + return -1; + } + memcpy((void *)load_addr, data, data_len); + bootloader_munmap(data); + return 0; +} + +void esp_app_image_load(int image_index, int slot, unsigned int hdr_offset, unsigned int *entry_addr) +{ + const struct flash_area *fap; + int area_id; + int rc; + + area_id = flash_area_id_from_multi_image_slot(image_index, slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + BOOT_LOG_ERR("%s: flash_area_open failed with %d", __func__, rc); + } + + BOOT_LOG_INF("Loading image %d - slot %d from flash, area id: %d", image_index, slot, area_id); + + const uint32_t *data = (const uint32_t *)bootloader_mmap((fap->fa_off + hdr_offset), sizeof(esp_image_load_header_t)); + esp_image_load_header_t load_header = {0}; + memcpy((void *)&load_header, data, sizeof(esp_image_load_header_t)); + bootloader_munmap(data); + + if (load_header.header_magic != ESP_LOAD_HEADER_MAGIC) { + BOOT_LOG_ERR("Load header magic verification failed. Aborting"); + FIH_PANIC; + } + + if (!esp_ptr_in_iram((void *)load_header.iram_dest_addr) || !esp_ptr_in_iram((void *)(load_header.iram_dest_addr + load_header.iram_size))) { + BOOT_LOG_ERR("IRAM region in load header is not valid. Aborting"); + FIH_PANIC; + } + + if (!esp_ptr_in_dram((void *)load_header.dram_dest_addr) || !esp_ptr_in_dram((void *)(load_header.dram_dest_addr + load_header.dram_size))) { + BOOT_LOG_ERR("DRAM region in load header is not valid. Aborting"); + FIH_PANIC; + } + + if (!esp_ptr_in_iram((void *)load_header.entry_addr)) { + BOOT_LOG_ERR("Application entry point (0x%x) is not in IRAM. Aborting", load_header.entry_addr); + FIH_PANIC; + } + + BOOT_LOG_INF("DRAM segment: start=0x%x, size=0x%x, vaddr=0x%x", fap->fa_off + load_header.dram_flash_offset, load_header.dram_size, load_header.dram_dest_addr); + load_segment(fap, load_header.dram_flash_offset, load_header.dram_size, load_header.dram_dest_addr); + + BOOT_LOG_INF("IRAM segment: start=0x%x, size=0x%x, vaddr=0x%x", fap->fa_off + load_header.iram_flash_offset, load_header.iram_size, load_header.iram_dest_addr); + load_segment(fap, load_header.iram_flash_offset, load_header.iram_size, load_header.iram_dest_addr); + + BOOT_LOG_INF("start=0x%x", load_header.entry_addr); + uart_tx_wait_idle(0); + + assert(entry_addr != NULL); + *entry_addr = load_header.entry_addr; +} + +void start_cpu0_image(int image_index, int slot, unsigned int hdr_offset) +{ + unsigned int entry_addr; + esp_app_image_load(image_index, slot, hdr_offset, &entry_addr); + ((void (*)(void))entry_addr)(); /* Call to application entry address should not return */ + FIH_PANIC; /* It should not get here */ +} + +#ifdef CONFIG_ESP_MULTI_PROCESSOR_BOOT +void start_cpu1_image(int image_index, int slot, unsigned int hdr_offset) +{ + unsigned int entry_addr; + esp_app_image_load(image_index, slot, hdr_offset, &entry_addr); + appcpu_start(entry_addr); +} +#endif diff --git a/bootloader/mcuboot/boot/espressif/port/esp_mcuboot.c b/bootloader/mcuboot/boot/espressif/port/esp_mcuboot.c new file mode 100644 index 0000000..0ee9e38 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/port/esp_mcuboot.c @@ -0,0 +1,420 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +#include +#include + +#include "sdkconfig.h" +#include "esp_err.h" +#include "bootloader_flash_priv.h" +#include "esp_flash_encrypt.h" + +#include "flash_map_backend/flash_map_backend.h" +#include "sysflash/sysflash.h" + +#ifndef ARRAY_SIZE +# define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) +#endif + +#ifndef MIN +# define MIN(a, b) (((a) < (b)) ? (a) : (b)) +#endif + +#ifndef ALIGN_UP +# define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1)) +#endif + +#ifndef ALIGN_DOWN +# define ALIGN_DOWN(num, align) ((num) & ~((align) - 1)) +#endif + +#ifndef ALIGN_OFFSET +# define ALIGN_OFFSET(num, align) ((num) & ((align) - 1)) +#endif + +#ifndef IS_ALIGNED +# define IS_ALIGNED(num, align) (ALIGN_OFFSET((num), (align)) == 0) +#endif + +#define FLASH_BUFFER_SIZE 256 /* SPI Flash block size */ + +_Static_assert(IS_ALIGNED(FLASH_BUFFER_SIZE, 4), "Buffer size for SPI Flash operations must be 4-byte aligned."); + +#define BOOTLOADER_START_ADDRESS CONFIG_BOOTLOADER_OFFSET_IN_FLASH +#define BOOTLOADER_SIZE CONFIG_ESP_BOOTLOADER_SIZE +#define IMAGE0_PRIMARY_START_ADDRESS CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS +#define IMAGE0_SECONDARY_START_ADDRESS CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS +#define SCRATCH_OFFSET CONFIG_ESP_SCRATCH_OFFSET +#if (MCUBOOT_IMAGE_NUMBER == 2) +#define IMAGE1_PRIMARY_START_ADDRESS CONFIG_ESP_IMAGE1_PRIMARY_START_ADDRESS +#define IMAGE1_SECONDARY_START_ADDRESS CONFIG_ESP_IMAGE1_SECONDARY_START_ADDRESS +#endif + +#define APPLICATION_SIZE CONFIG_ESP_APPLICATION_SIZE +#define SCRATCH_SIZE CONFIG_ESP_SCRATCH_SIZE + +extern int ets_printf(const char *fmt, ...); + +static const struct flash_area bootloader = { + .fa_id = FLASH_AREA_BOOTLOADER, + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, + .fa_off = BOOTLOADER_START_ADDRESS, + .fa_size = BOOTLOADER_SIZE, +}; + +static const struct flash_area primary_img0 = { + .fa_id = FLASH_AREA_IMAGE_PRIMARY(0), + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, + .fa_off = IMAGE0_PRIMARY_START_ADDRESS, + .fa_size = APPLICATION_SIZE, +}; + +static const struct flash_area secondary_img0 = { + .fa_id = FLASH_AREA_IMAGE_SECONDARY(0), + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, + .fa_off = IMAGE0_SECONDARY_START_ADDRESS, + .fa_size = APPLICATION_SIZE, +}; + +#if (MCUBOOT_IMAGE_NUMBER == 2) +static const struct flash_area primary_img1 = { + .fa_id = FLASH_AREA_IMAGE_PRIMARY(1), + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, + .fa_off = IMAGE1_PRIMARY_START_ADDRESS, + .fa_size = APPLICATION_SIZE, +}; + +static const struct flash_area secondary_img1 = { + .fa_id = FLASH_AREA_IMAGE_SECONDARY(1), + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, + .fa_off = IMAGE1_SECONDARY_START_ADDRESS, + .fa_size = APPLICATION_SIZE, +}; +#endif + +static const struct flash_area scratch_img0 = { + .fa_id = FLASH_AREA_IMAGE_SCRATCH, + .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, + .fa_off = SCRATCH_OFFSET, + .fa_size = SCRATCH_SIZE, +}; + +static const struct flash_area *s_flash_areas[] = { + &bootloader, + &primary_img0, + &secondary_img0, +#if (MCUBOOT_IMAGE_NUMBER == 2) + &primary_img1, + &secondary_img1, +#endif + &scratch_img0, +}; + +static const struct flash_area *prv_lookup_flash_area(uint8_t id) { + for (size_t i = 0; i < ARRAY_SIZE(s_flash_areas); i++) { + const struct flash_area *area = s_flash_areas[i]; + if (id == area->fa_id) { + return area; + } + } + return NULL; +} + +int flash_area_open(uint8_t id, const struct flash_area **area_outp) +{ + BOOT_LOG_DBG("%s: ID=%d", __func__, (int)id); + const struct flash_area *area = prv_lookup_flash_area(id); + *area_outp = area; + return area != NULL ? 0 : -1; +} + +void flash_area_close(const struct flash_area *area) +{ + +} + +static bool aligned_flash_read(uintptr_t addr, void *dest, size_t size) +{ + if (IS_ALIGNED(addr, 4) && IS_ALIGNED((uintptr_t)dest, 4) && IS_ALIGNED(size, 4)) { + /* A single read operation is enough when when all parameters are aligned */ + + return bootloader_flash_read(addr, dest, size, true) == ESP_OK; + } + + const uint32_t aligned_addr = ALIGN_DOWN(addr, 4); + const uint32_t addr_offset = ALIGN_OFFSET(addr, 4); + uint32_t bytes_remaining = size; + uint8_t read_data[FLASH_BUFFER_SIZE] = {0}; + + /* Align the read address to 4-byte boundary and ensure read size is a multiple of 4 bytes */ + + uint32_t bytes = MIN(bytes_remaining + addr_offset, sizeof(read_data)); + if (bootloader_flash_read(aligned_addr, read_data, ALIGN_UP(bytes, 4), true) != ESP_OK) { + return false; + } + + /* Skip non-useful data which may have been read for adjusting the alignment */ + + uint32_t bytes_read = bytes - addr_offset; + memcpy(dest, &read_data[addr_offset], bytes_read); + + bytes_remaining -= bytes_read; + + /* Read remaining data from Flash in case requested size is greater than buffer size */ + + uint32_t offset = bytes; + + while (bytes_remaining != 0) { + bytes = MIN(bytes_remaining, sizeof(read_data)); + if (bootloader_flash_read(aligned_addr + offset, read_data, ALIGN_UP(bytes, 4), true) != ESP_OK) { + return false; + } + + memcpy(&((uint8_t *)dest)[bytes_read], read_data, bytes); + + offset += bytes; + bytes_read += bytes; + bytes_remaining -= bytes; + } + + return true; +} + +int flash_area_read(const struct flash_area *fa, uint32_t off, void *dst, + uint32_t len) +{ + if (fa->fa_device_id != FLASH_DEVICE_INTERNAL_FLASH) { + return -1; + } + + const uint32_t end_offset = off + len; + if (end_offset > fa->fa_size) { + BOOT_LOG_ERR("%s: Out of Bounds (0x%x vs 0x%x)", __func__, end_offset, fa->fa_size); + return -1; + } + + bool success = aligned_flash_read(fa->fa_off + off, dst, len); + if (!success) { + BOOT_LOG_ERR("%s: Flash read failed", __func__); + + return -1; + } + + return 0; +} + +static bool aligned_flash_write(size_t dest_addr, const void *src, size_t size) +{ +#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED + bool flash_encryption_enabled = esp_flash_encryption_enabled(); +#else + bool flash_encryption_enabled = false; +#endif + + if (IS_ALIGNED(dest_addr, 4) && IS_ALIGNED((uintptr_t)src, 4) && IS_ALIGNED(size, 4)) { + /* A single write operation is enough when all parameters are aligned */ + + return bootloader_flash_write(dest_addr, (void *)src, size, flash_encryption_enabled) == ESP_OK; + } + + const uint32_t aligned_addr = ALIGN_DOWN(dest_addr, 4); + const uint32_t addr_offset = ALIGN_OFFSET(dest_addr, 4); + uint32_t bytes_remaining = size; + uint8_t write_data[FLASH_BUFFER_SIZE] = {0}; + + /* Perform a read operation considering an offset not aligned to 4-byte boundary */ + + uint32_t bytes = MIN(bytes_remaining + addr_offset, sizeof(write_data)); + if (bootloader_flash_read(aligned_addr, write_data, ALIGN_UP(bytes, 4), true) != ESP_OK) { + return false; + } + + uint32_t bytes_written = bytes - addr_offset; + memcpy(&write_data[addr_offset], src, bytes_written); + + if (bootloader_flash_write(aligned_addr, write_data, ALIGN_UP(bytes, 4), flash_encryption_enabled) != ESP_OK) { + return false; + } + + bytes_remaining -= bytes_written; + + /* Write remaining data to Flash if any */ + + uint32_t offset = bytes; + + while (bytes_remaining != 0) { + bytes = MIN(bytes_remaining, sizeof(write_data)); + if (bootloader_flash_read(aligned_addr + offset, write_data, ALIGN_UP(bytes, 4), true) != ESP_OK) { + return false; + } + + memcpy(write_data, &((uint8_t *)src)[bytes_written], bytes); + + if (bootloader_flash_write(aligned_addr + offset, write_data, ALIGN_UP(bytes, 4), flash_encryption_enabled) != ESP_OK) { + return false; + } + + offset += bytes; + bytes_written += bytes; + bytes_remaining -= bytes; + } + + return true; +} + +int flash_area_write(const struct flash_area *fa, uint32_t off, const void *src, + uint32_t len) +{ + if (fa->fa_device_id != FLASH_DEVICE_INTERNAL_FLASH) { + return -1; + } + + const uint32_t end_offset = off + len; + if (end_offset > fa->fa_size) { + BOOT_LOG_ERR("%s: Out of Bounds (0x%x vs 0x%x)", __func__, end_offset, fa->fa_size); + return -1; + } + + const uint32_t start_addr = fa->fa_off + off; + BOOT_LOG_DBG("%s: Addr: 0x%08x Length: %d", __func__, (int)start_addr, (int)len); + + bool success = aligned_flash_write(start_addr, src, len); + if (!success) { + BOOT_LOG_ERR("%s: Flash write failed", __func__); + return -1; + } + + return 0; +} + +int flash_area_erase(const struct flash_area *fa, uint32_t off, uint32_t len) +{ + if (fa->fa_device_id != FLASH_DEVICE_INTERNAL_FLASH) { + return -1; + } + + if ((len % FLASH_SECTOR_SIZE) != 0 || (off % FLASH_SECTOR_SIZE) != 0) { + BOOT_LOG_ERR("%s: Not aligned on sector Offset: 0x%x Length: 0x%x", + __func__, (int)off, (int)len); + return -1; + } + + const uint32_t start_addr = fa->fa_off + off; + BOOT_LOG_DBG("%s: Addr: 0x%08x Length: %d", __func__, (int)start_addr, (int)len); + + if (bootloader_flash_erase_range(start_addr, len) != ESP_OK) { + BOOT_LOG_ERR("%s: Flash erase failed", __func__); + return -1; + } +#if VALIDATE_PROGRAM_OP + for (size_t i = 0; i < len; i++) { + uint8_t *val = (void *)(start_addr + i); + if (*val != 0xff) { + BOOT_LOG_ERR("%s: Erase at 0x%x Failed", __func__, (int)val); + assert(0); + } + } +#endif + + return 0; +} + +uint32_t flash_area_align(const struct flash_area *area) +{ + static size_t align = 0; + + if (align == 0) { +#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED + bool flash_encryption_enabled = esp_flash_encryption_enabled(); +#else + bool flash_encryption_enabled = false; +#endif + + if (flash_encryption_enabled) { + align = 32; + } else { + align = 4; + } + } + return align; +} + +uint8_t flash_area_erased_val(const struct flash_area *area) +{ + return 0xff; +} + +int flash_area_get_sectors(int fa_id, uint32_t *count, + struct flash_sector *sectors) +{ + const struct flash_area *fa = prv_lookup_flash_area(fa_id); + if (fa->fa_device_id != FLASH_DEVICE_INTERNAL_FLASH) { + return -1; + } + + const size_t sector_size = FLASH_SECTOR_SIZE; + uint32_t total_count = 0; + for (size_t off = 0; off < fa->fa_size; off += sector_size) { + // Note: Offset here is relative to flash area, not device + sectors[total_count].fs_off = off; + sectors[total_count].fs_size = sector_size; + total_count++; + } + + *count = total_count; + return 0; +} + +int flash_area_sector_from_off(uint32_t off, struct flash_sector *sector) +{ + sector->fs_off = (off / FLASH_SECTOR_SIZE) * FLASH_SECTOR_SIZE; + sector->fs_size = FLASH_SECTOR_SIZE; + + return 0; +} + +int flash_area_get_sector(const struct flash_area *fa, uint32_t off, + struct flash_sector *sector) +{ + sector->fs_off = (off / FLASH_SECTOR_SIZE) * FLASH_SECTOR_SIZE; + sector->fs_size = FLASH_SECTOR_SIZE; + + return 0; +} + +int flash_area_id_from_multi_image_slot(int image_index, int slot) +{ + BOOT_LOG_DBG("%s", __func__); + switch (slot) { + case 0: + return FLASH_AREA_IMAGE_PRIMARY(image_index); + case 1: + return FLASH_AREA_IMAGE_SECONDARY(image_index); + } + + BOOT_LOG_ERR("Unexpected Request: image_index=%d, slot=%d", image_index, slot); + return -1; /* flash_area_open will fail on that */ +} + +int flash_area_id_from_image_slot(int slot) +{ + return flash_area_id_from_multi_image_slot(0, slot); +} + +int flash_area_to_sectors(int idx, int *cnt, struct flash_area *fa) +{ + return -1; +} + +void mcuboot_assert_handler(const char *file, int line, const char *func) +{ + ets_printf("assertion failed: file \"%s\", line %d, func: %s\n", file, line, func); + abort(); +} diff --git a/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32.cmake b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32.cmake new file mode 100644 index 0000000..88f6ea3 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32.cmake @@ -0,0 +1,12 @@ +set(CMAKE_SYSTEM_NAME Generic) + +set(CMAKE_C_COMPILER xtensa-esp32-elf-gcc) +set(CMAKE_CXX_COMPILER xtensa-esp32-elf-g++) +set(CMAKE_ASM_COMPILER xtensa-esp32-elf-gcc) +set(_CMAKE_TOOLCHAIN_PREFIX xtensa-esp32-elf-) + +set(CMAKE_C_FLAGS "${UNIQ_CMAKE_C_FLAGS}" CACHE STRING "C Compiler Base Flags" FORCE) +set(CMAKE_CXX_FLAGS "${UNIQ_CMAKE_CXX_FLAGS}" CACHE STRING "C++ Compiler Base Flags" FORCE) +set(CMAKE_ASM_FLAGS "${UNIQ_CMAKE_ASM_FLAGS}" CACHE STRING "ASM Compiler Base Flags" FORCE) + +set(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections" CACHE STRING "Linker Base Flags") diff --git a/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32c2.cmake b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32c2.cmake new file mode 100644 index 0000000..0982a85 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32c2.cmake @@ -0,0 +1,13 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +set(CMAKE_SYSTEM_NAME Generic) + +set(CMAKE_C_COMPILER riscv32-esp-elf-gcc) +set(CMAKE_CXX_COMPILER riscv32-esp-elf-g++) +set(CMAKE_ASM_COMPILER riscv32-esp-elf-gcc) + +set(CMAKE_C_FLAGS "-march=rv32imc_zicsr_zifencei" CACHE STRING "C Compiler Base Flags") +set(CMAKE_CXX_FLAGS "-march=rv32imc_zicsr_zifencei" CACHE STRING "C++ Compiler Base Flags") +set(CMAKE_EXE_LINKER_FLAGS "-nostartfiles -march=rv32imc_zicsr_zifencei --specs=nosys.specs" CACHE STRING "Linker Base Flags") diff --git a/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32c3.cmake b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32c3.cmake new file mode 100644 index 0000000..5493620 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32c3.cmake @@ -0,0 +1,9 @@ +set(CMAKE_SYSTEM_NAME Generic) + +set(CMAKE_C_COMPILER riscv32-esp-elf-gcc) +set(CMAKE_CXX_COMPILER riscv32-esp-elf-g++) +set(CMAKE_ASM_COMPILER riscv32-esp-elf-gcc) + +set(CMAKE_C_FLAGS "-march=rv32imc_zicsr_zifencei" CACHE STRING "C Compiler Base Flags") +set(CMAKE_CXX_FLAGS "-march=rv32imc_zicsr_zifencei" CACHE STRING "C++ Compiler Base Flags") +set(CMAKE_EXE_LINKER_FLAGS "-nostartfiles -march=rv32imc_zicsr_zifencei --specs=nosys.specs" CACHE STRING "Linker Base Flags") diff --git a/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32c6.cmake b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32c6.cmake new file mode 100644 index 0000000..0982a85 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32c6.cmake @@ -0,0 +1,13 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +set(CMAKE_SYSTEM_NAME Generic) + +set(CMAKE_C_COMPILER riscv32-esp-elf-gcc) +set(CMAKE_CXX_COMPILER riscv32-esp-elf-g++) +set(CMAKE_ASM_COMPILER riscv32-esp-elf-gcc) + +set(CMAKE_C_FLAGS "-march=rv32imc_zicsr_zifencei" CACHE STRING "C Compiler Base Flags") +set(CMAKE_CXX_FLAGS "-march=rv32imc_zicsr_zifencei" CACHE STRING "C++ Compiler Base Flags") +set(CMAKE_EXE_LINKER_FLAGS "-nostartfiles -march=rv32imc_zicsr_zifencei --specs=nosys.specs" CACHE STRING "Linker Base Flags") diff --git a/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32h2.cmake b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32h2.cmake new file mode 100644 index 0000000..0982a85 --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32h2.cmake @@ -0,0 +1,13 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +set(CMAKE_SYSTEM_NAME Generic) + +set(CMAKE_C_COMPILER riscv32-esp-elf-gcc) +set(CMAKE_CXX_COMPILER riscv32-esp-elf-g++) +set(CMAKE_ASM_COMPILER riscv32-esp-elf-gcc) + +set(CMAKE_C_FLAGS "-march=rv32imc_zicsr_zifencei" CACHE STRING "C Compiler Base Flags") +set(CMAKE_CXX_FLAGS "-march=rv32imc_zicsr_zifencei" CACHE STRING "C++ Compiler Base Flags") +set(CMAKE_EXE_LINKER_FLAGS "-nostartfiles -march=rv32imc_zicsr_zifencei --specs=nosys.specs" CACHE STRING "Linker Base Flags") diff --git a/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32s2.cmake b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32s2.cmake new file mode 100644 index 0000000..77ea65c --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32s2.cmake @@ -0,0 +1,10 @@ +set(CMAKE_SYSTEM_NAME Generic) + +set(CMAKE_C_COMPILER xtensa-esp32s2-elf-gcc) +set(CMAKE_CXX_COMPILER xtensa-esp32s2-elf-g++) +set(CMAKE_ASM_COMPILER xtensa-esp32s2-elf-gcc) + +set(CMAKE_C_FLAGS "-mlongcalls" CACHE STRING "C Compiler Base Flags") +set(CMAKE_CXX_FLAGS "-mlongcalls" CACHE STRING "C++ Compiler Base Flags") + +set(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections" CACHE STRING "Linker Base Flags") diff --git a/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32s3.cmake b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32s3.cmake new file mode 100644 index 0000000..de3e3da --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/tools/toolchain-esp32s3.cmake @@ -0,0 +1,16 @@ +# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +set(CMAKE_SYSTEM_NAME Generic) + +set(CMAKE_C_COMPILER xtensa-esp32s3-elf-gcc) +set(CMAKE_CXX_COMPILER xtensa-esp32s3-elf-g++) +set(CMAKE_ASM_COMPILER xtensa-esp32s3-elf-gcc) +set(_CMAKE_TOOLCHAIN_PREFIX xtensa-esp32s3-elf-) + +set(CMAKE_C_FLAGS "-mlongcalls" CACHE STRING "C Compiler Base Flags" FORCE) +set(CMAKE_CXX_FLAGS "-mlongcalls" CACHE STRING "C++ Compiler Base Flags" FORCE) +set(CMAKE_ASM_FLAGS "${UNIQ_CMAKE_ASM_FLAGS}" CACHE STRING "ASM Compiler Base Flags" FORCE) + +set(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections" CACHE STRING "Linker Base Flags") diff --git a/bootloader/mcuboot/boot/espressif/tools/utils.cmake b/bootloader/mcuboot/boot/espressif/tools/utils.cmake new file mode 100644 index 0000000..238b30e --- /dev/null +++ b/bootloader/mcuboot/boot/espressif/tools/utils.cmake @@ -0,0 +1,31 @@ +# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD +# +# SPDX-License-Identifier: Apache-2.0 + +# Parse config files (.conf, format: =) and set each as +# definitions and variables +function(parse_and_set_config_file CONFIG_FILE) + file(STRINGS ${CONFIG_FILE} BOOTLOADER_CONF) + foreach(config ${BOOTLOADER_CONF}) + if (NOT (${config} MATCHES "#")) + string(REGEX REPLACE "^[ ]+" "" config ${config}) + string(REGEX MATCH "^[^=]+" CONFIG_NAME ${config}) + string(REPLACE "${CONFIG_NAME}=" "" CONFIG_VALUE ${config}) + # Overrides if already defined (definitions from latter file prevails over the former) + if (DEFINED ${CONFIG_NAME}) + set(CONFIG_OLD "${CONFIG_NAME}") + remove_definitions(-D${CONFIG_NAME}=${${CONFIG_OLD}}) + endif() + if (NOT ("${CONFIG_VALUE}" STREQUAL "n" + OR "${CONFIG_VALUE}" STREQUAL "N")) + + if (("${CONFIG_VALUE}" STREQUAL "y") + OR ("${CONFIG_VALUE}" STREQUAL "Y")) + set(CONFIG_VALUE 1) + endif() + add_compile_definitions(${CONFIG_NAME}=${CONFIG_VALUE}) + set(${CONFIG_NAME} ${CONFIG_VALUE} PARENT_SCOPE) + endif() + endif() + endforeach() +endfunction() diff --git a/bootloader/mcuboot/boot/mbed/CMakeLists.txt b/bootloader/mcuboot/boot/mbed/CMakeLists.txt new file mode 100644 index 0000000..8baa262 --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/CMakeLists.txt @@ -0,0 +1,61 @@ +# Copyright (c) 2021 ARM Limited. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +# Mbed-MCUboot Port + +cmake_minimum_required(VERSION 3.19.0 FATAL_ERROR) + +get_filename_component(BOOT_UTIL_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../bootutil REALPATH) + +set(LIB_TARGET mbed-mcuboot) +set(LIB_BOOTUTIL bootutil) + +add_library(${LIB_TARGET} STATIC) + +target_include_directories(${LIB_TARGET} + PUBLIC + include + ${BOOT_UTIL_DIR}/include + ${BOOT_UTIL_DIR}/src +) + +target_sources(${LIB_TARGET} + PRIVATE + mcuboot_main.cpp + app_enc_keys.c + src/flash_map_backend.cpp + src/secondary_bd.cpp +) + +target_link_libraries(${LIB_TARGET} + PUBLIC + bootutil # Cross-dependency + mbed-mbedtls + mbed-storage-flashiap + mbed-storage-blockdevice +) + +if("_RTE_" IN_LIST MBED_CONFIG_DEFINITIONS) + target_link_libraries(${LIB_TARGET} + PUBLIC + mbed-os + ) +else() + target_link_libraries(${LIB_TARGET} + PUBLIC + mbed-baremetal + ) +endif() + +# The cross-dependency requires that bootutil have access to the mbed port's +# include directory and is linked with the appropriate mbed-specific libraries. +target_include_directories(${LIB_BOOTUTIL} + PUBLIC + include +) + +target_link_libraries(${LIB_BOOTUTIL} + PUBLIC + mbed-mcuboot + mbed-mbedtls +) diff --git a/bootloader/mcuboot/boot/mbed/app_enc_keys.c b/bootloader/mcuboot/boot/mbed/app_enc_keys.c new file mode 100644 index 0000000..9bed4d8 --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/app_enc_keys.c @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2020 Embedded Planet + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License + */ + +#include +#include + +#if defined(MCUBOOT_SIGN_RSA) +#define HAVE_KEYS +extern const unsigned char rsa_pub_key[]; +extern unsigned int rsa_pub_key_len; +#elif defined(MCUBOOT_SIGN_EC256) +#define HAVE_KEYS +extern const unsigned char ecdsa_pub_key[]; +extern unsigned int ecdsa_pub_key_len; +#elif defined(MCUBOOT_SIGN_ED25519) +#define HAVE_KEYS +extern const unsigned char ed25519_pub_key[]; +extern unsigned int ed25519_pub_key_len; +#endif + +/* + * Note: Keys for both signing and encryption must be provided by the application. + * mcuboot's imgtool utility can be used to generate these keys and convert them into compatible C code. + * See imgtool's documentation, specifically the section: "Incorporating the public key into the code" which can be found here: + * https://github.com/JuulLabs-OSS/mcuboot/blob/master/docs/imgtool.md#incorporating-the-public-key-into-the-code + */ +#if defined(HAVE_KEYS) +const struct bootutil_key bootutil_keys[] = { + { +#if defined(MCUBOOT_SIGN_RSA) + .key = rsa_pub_key, + .len = &rsa_pub_key_len, +#elif defined(MCUBOOT_SIGN_EC256) + .key = ecdsa_pub_key, + .len = &ecdsa_pub_key_len, +#elif defined(MCUBOOT_SIGN_ED25519) + .key = ed25519_pub_key, + .len = &ed25519_pub_key_len, +#endif + }, +}; +const int bootutil_key_cnt = 1; + +#if defined(MCUBOOT_ENCRYPT_RSA) + +extern const unsigned char enc_priv_key[]; +extern const unsigned int enc_priv_key_len; + +const struct bootutil_key bootutil_enc_key = { + .key = enc_priv_key, + .len = &enc_priv_key_len, +}; +#elif defined(MCUBOOT_ENCRYPT_KW) +#error "Encrypted images with AES-KW is not implemented yet." +#endif + +#endif diff --git a/bootloader/mcuboot/boot/mbed/include/flash_map_backend/flash_map_backend.h b/bootloader/mcuboot/boot/mbed/include/flash_map_backend/flash_map_backend.h new file mode 100644 index 0000000..d526c5c --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/include/flash_map_backend/flash_map_backend.h @@ -0,0 +1,177 @@ +/* + * Copyright (c) 2018 Nordic Semiconductor ASA + * Copyright (c) 2015 Runtime Inc + * Copyright (c) 2020 Embedded Planet + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the Licens + */ + +#ifndef H_UTIL_FLASH_MAP_ +#define H_UTIL_FLASH_MAP_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * + * Provides abstraction of flash regions for type of use. + * I.e. dude where's my image? + * + * System will contain a map which contains flash areas. Every + * region will contain flash identifier, offset within flash and length. + * + * 1. This system map could be in a file within filesystem (Initializer + * must know/figure out where the filesystem is at). + * 2. Map could be at fixed location for project (compiled to code) + * 3. Map could be at specific place in flash (put in place at mfg time). + * + * Note that the map you use must be valid for BSP it's for, + * match the linker scripts when platform executes from flash, + * and match the target offset specified in download script. + */ +#include + +/** + * @brief Structure describing an area on a flash device. + * + * Multiple flash devices may be available in the system, each of + * which may have its own areas. For this reason, flash areas track + * which flash device they are part of. + */ +struct flash_area { + /** + * This flash area's ID; unique in the system. + */ + uint8_t fa_id; + + /** + * ID of the flash device this area is a part of. + */ + uint8_t fa_device_id; + + uint16_t pad16; + + /** + * This area's offset, relative to the beginning of its flash + * device's storage. + */ + uint32_t fa_off; + + /** + * This area's size, in bytes. + */ + uint32_t fa_size; +}; + +static inline uint8_t flash_area_get_id(const struct flash_area *fa) +{ + return fa->fa_id; +} + +static inline uint8_t flash_area_get_device_id(const struct flash_area *fa) +{ + return fa->fa_device_id; +} + +static inline uint32_t flash_area_get_off(const struct flash_area *fa) +{ + return fa->fa_off; +} + +static inline uint32_t flash_area_get_size(const struct flash_area *fa) +{ + return fa->fa_size; +} + +/** + * @brief Structure describing a sector within a flash area. + * + * Each sector has an offset relative to the start of its flash area + * (NOT relative to the start of its flash device), and a size. A + * flash area may contain sectors with different sizes. + */ +struct flash_sector { + /** + * Offset of this sector, from the start of its flash area (not device). + */ + uint32_t fs_off; + + /** + * Size of this sector, in bytes. + */ + uint32_t fs_size; +}; + +static inline uint32_t flash_sector_get_off(const struct flash_sector *fs) +{ + return fs->fs_off; +} + +static inline uint32_t flash_sector_get_size(const struct flash_sector *fs) +{ + return fs->fs_size; +} + +/* + * Start using flash area. + */ +int flash_area_open(uint8_t id, const struct flash_area ** fapp); + +void flash_area_close(const struct flash_area * fap); + +/* + * Read/write/erase. Offset is relative from beginning of flash area. + */ +int flash_area_read(const struct flash_area * fap, uint32_t off, void *dst, + uint32_t len); +int flash_area_write(const struct flash_area * fap, uint32_t off, const void *src, + uint32_t len); +int flash_area_erase(const struct flash_area * fap, uint32_t off, uint32_t len); + +/* + * Alignment restriction for flash writes. + */ +uint32_t flash_area_align(const struct flash_area * fap); + +/* + * What is value is read from erased flash bytes. + */ +uint8_t flash_area_erased_val(const struct flash_area * fap); + +/* + * Given flash area ID, return info about sectors within the area. + */ +int flash_area_get_sectors(int fa_id, uint32_t *count, + struct flash_sector *sectors); + + +int flash_area_id_from_image_slot(int slot); +int flash_area_id_from_multi_image_slot(int image_index, int slot); + + +/** + * Converts the specified flash area ID and image index (in multi-image setup) + * to an image slot index. + * + * Returns image slot index (0 or 1), or -1 if ID doesn't correspond to an image + * slot. + */ +int flash_area_id_to_multi_image_slot(int image_index, int area_id); + +#ifdef __cplusplus +} +#endif + +#endif /* H_UTIL_FLASH_MAP_ */ diff --git a/bootloader/mcuboot/boot/mbed/include/flash_map_backend/secondary_bd.h b/bootloader/mcuboot/boot/mbed/include/flash_map_backend/secondary_bd.h new file mode 100644 index 0000000..c14d3ce --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/include/flash_map_backend/secondary_bd.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2020 Embedded Planet + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the Licens + * + * Created on: Jul 30, 2020 + * Author: gdbeckstein + */ + +#ifndef MCUBOOT_BOOT_MBED_INCLUDE_FLASH_MAP_BACKEND_SECONDARY_BD_H_ +#define MCUBOOT_BOOT_MBED_INCLUDE_FLASH_MAP_BACKEND_SECONDARY_BD_H_ + +#include "blockdevice/BlockDevice.h" + +/** + * This is implemented as a weak function and may be redefined + * by the application. The default case is to return the + * BlockDevice object returned by BlockDevice::get_default_instance(); + * + * @retval secondary_bd Secondary BlockDevice where update candidates are stored + */ +mbed::BlockDevice* get_secondary_bd(void); + +#endif /* MCUBOOT_BOOT_MBED_INCLUDE_FLASH_MAP_BACKEND_SECONDARY_BD_H_ */ diff --git a/bootloader/mcuboot/boot/mbed/include/mcuboot_config/mcuboot_assert.h b/bootloader/mcuboot/boot/mbed/include/mcuboot_config/mcuboot_assert.h new file mode 100644 index 0000000..8c8d52d --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/include/mcuboot_config/mcuboot_assert.h @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2018 Open Source Foundries Limited + * + * Copyright (c) 2020 Embedded Planet + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the Licens + */ + +#include "platform/mbed_assert.h" diff --git a/bootloader/mcuboot/boot/mbed/include/mcuboot_config/mcuboot_config.h b/bootloader/mcuboot/boot/mbed/include/mcuboot_config/mcuboot_config.h new file mode 100644 index 0000000..b57e8d6 --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/include/mcuboot_config/mcuboot_config.h @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2018 Open Source Foundries Limited + * Copyright (c) 2019-2020 Arm Limited + * Copyright (c) 2019-2020 Linaro Limited + * Copyright (c) 2020 Embedded Planet + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __MCUBOOT_CONFIG_H__ +#define __MCUBOOT_CONFIG_H__ + +/* + * For available configurations and their explanations, + * see mbed_lib.json. + */ + +#define SIGNATURE_TYPE_RSA 0 +#define SIGNATURE_TYPE_EC256 1 +#define SIGNATURE_TYPE_ED25519 2 +#define SIGNATURE_TYPE_NONE 3 + +/* + * Signature algorithm + */ +#if (MCUBOOT_SIGNATURE_ALGORITHM == SIGNATURE_TYPE_RSA) +#define MCUBOOT_SIGN_RSA +# if (MCUBOOT_RSA_SIGNATURE_LENGTH != 2048 && \ + MCUBOOT_RSA_SIGNATURE_LENGTH != 3072) +# error "Invalid RSA key size (must be 2048 or 3072)" +# else +# define MCUBOOT_SIGN_RSA_LEN MCUBOOT_RSA_SIGNATURE_LENGTH +# endif +#elif (MCUBOOT_SIGNATURE_ALGORITHM == SIGNATURE_TYPE_EC256) +#define MCUBOOT_SIGN_EC256 +#elif (MCUBOOT_SIGNATURE_ALGORITHM == SIGNATURE_TYPE_ED25519) +#define MCUBOOT_SIGN_ED25519 +#endif + +/* + * Crypto backend + */ +#define MBEDTLS 0 +#define TINYCRYPT 1 + +#if (MCUBOOT_CRYPTO_BACKEND == MBEDTLS) +#define MCUBOOT_USE_MBED_TLS +#elif (MCUBOOT_CRYPTO_BACKEND == TINYCRYPT) +/** + * XXX TinyCrypt is currently not supported by Mbed-OS due to build conflicts. + * See https://github.com/AGlass0fMilk/mbed-mcuboot-blinky/issues/2 + */ +#error TinyCrypt is currently not supported by Mbed-OS due to build conflicts. +#define MCUBOOT_USE_TINYCRYPT +#endif + +/* + * Only one image (two slots) supported for now + */ +#define MCUBOOT_IMAGE_NUMBER 1 + +/* + * Currently there is no configuration option, for this platform, + * that enables the system specific mcumgr commands in mcuboot + */ +#define MCUBOOT_PERUSER_MGMT_GROUP_ENABLED 0 + +/* + * Encrypted Images + */ +#if defined(MCUBOOT_ENCRYPT_RSA) || defined(MCUBOOT_ENCRYPT_EC256) || defined(MCUBOOT_ENCRYPT_X25519) +#define MCUBOOT_ENC_IMAGES +#endif + +/* + * Enabling this option uses newer flash map APIs. This saves RAM and + * avoids deprecated API usage. + */ +#define MCUBOOT_USE_FLASH_AREA_GET_SECTORS + +/* + * No watchdog integration for now + */ +#define MCUBOOT_WATCHDOG_FEED() \ + do { \ + } while (0) + +/* + * No direct idle call implemented + */ +#define MCUBOOT_CPU_IDLE() \ + do { \ + } while (0) + +#endif /* __MCUBOOT_CONFIG_H__ */ diff --git a/bootloader/mcuboot/boot/mbed/include/mcuboot_config/mcuboot_logging.h b/bootloader/mcuboot/boot/mbed/include/mcuboot_config/mcuboot_logging.h new file mode 100644 index 0000000..c6a1cf7 --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/include/mcuboot_config/mcuboot_logging.h @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2018 Nordic Semiconductor ASA + * Copyright (c) 2015 Runtime Inc + * Copyright (c) 2020 Cypress Semiconductor Corporation + * Copyright (c) 2020 Embedded Planet + * Copyright (c) 2020 ARM Limited + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the Licens. + */ + +#ifndef __MCUBOOT_LOGGING_H__ +#define __MCUBOOT_LOGGING_H__ + +#define MCUBOOT_LOG_LEVEL_OFF 0 +#define MCUBOOT_LOG_LEVEL_ERROR 1 +#define MCUBOOT_LOG_LEVEL_WARNING 2 +#define MCUBOOT_LOG_LEVEL_INFO 3 +#define MCUBOOT_LOG_LEVEL_DEBUG 4 + +/* + * The compiled log level determines the maximum level that can be + * printed. + */ +#ifndef MCUBOOT_LOG_LEVEL +#define MCUBOOT_LOG_LEVEL MCUBOOT_LOG_LEVEL_OFF +#endif + +#if MCUBOOT_LOG_LEVEL == MCUBOOT_LOG_LEVEL_ERROR +#define MBED_TRACE_MAX_LEVEL TRACE_LEVEL_ERROR +#elif MCUBOOT_LOG_LEVEL == MCUBOOT_LOG_LEVEL_WARNING +#define MBED_TRACE_MAX_LEVEL TRACE_LEVEL_WARN +#elif MCUBOOT_LOG_LEVEL == MCUBOOT_LOG_LEVEL_INFO +#define MBED_TRACE_MAX_LEVEL TRACE_LEVEL_INFO +#elif MCUBOOT_LOG_LEVEL == MCUBOOT_LOG_LEVEL_DEBUG +#define MBED_TRACE_MAX_LEVEL TRACE_LEVEL_DEBUG +#endif + +#define TRACE_GROUP "MCUb" +#include "mbed-trace/mbed_trace.h" +#include "bootutil/ignore.h" + +#define MCUBOOT_LOG_MODULE_DECLARE(domain) /* ignore */ +#define MCUBOOT_LOG_MODULE_REGISTER(domain) /* ignore */ + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_ERROR +#define MCUBOOT_LOG_ERR tr_error +#else +#define MCUBOOT_LOG_ERR(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_WARNING +#define MCUBOOT_LOG_WRN tr_warn +#else +#define MCUBOOT_LOG_WRN(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_INFO +#define MCUBOOT_LOG_INF tr_info +#else +#define MCUBOOT_LOG_INF(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_DEBUG +#define MCUBOOT_LOG_DBG tr_debug +#else +#define MCUBOOT_LOG_DBG(...) IGNORE(__VA_ARGS__) +#endif + +#endif /* __MCUBOOT_LOGGING_H__ */ diff --git a/bootloader/mcuboot/boot/mbed/include/os/os_malloc.h b/bootloader/mcuboot/boot/mbed/include/os/os_malloc.h new file mode 100644 index 0000000..3aa6f1e --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/include/os/os_malloc.h @@ -0,0 +1 @@ +/** Not required for Mbed -- malloc calls are retargeted by the platform */ diff --git a/bootloader/mcuboot/boot/mbed/include/sysflash/sysflash.h b/bootloader/mcuboot/boot/mbed/include/sysflash/sysflash.h new file mode 100644 index 0000000..e19945b --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/include/sysflash/sysflash.h @@ -0,0 +1,14 @@ +/* Manual version of auto-generated version. */ + +#ifndef __SYSFLASH_H__ +#define __SYSFLASH_H__ + +#define PRIMARY_ID 0 +#define SECONDARY_ID 1 +#define SCRATCH_ID 2 + +#define FLASH_AREA_IMAGE_PRIMARY(x) PRIMARY_ID +#define FLASH_AREA_IMAGE_SECONDARY(x) SECONDARY_ID +#define FLASH_AREA_IMAGE_SCRATCH SCRATCH_ID + +#endif /* __SYSFLASH_H__ */ diff --git a/bootloader/mcuboot/boot/mbed/include/utils/DataShare.cpp b/bootloader/mcuboot/boot/mbed/include/utils/DataShare.cpp new file mode 100644 index 0000000..a7d012b --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/include/utils/DataShare.cpp @@ -0,0 +1,97 @@ +/** + * + * Built with ARM Mbed-OS + * + * Copyright (c) 2019-2021 Embedded Planet, Inc. + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if MCUBOOT_DATA_SHARING && !MCUBOOT_BOOTLOADER_BUILD + +#include "DataShare.h" +#include "boot_status.h" + +#include + +#define PTR_TO_UINT8(x) ((volatile uint8_t *) x) +#define PTR_TO_UINT16(x) ((volatile uint16_t *) x) +#define PTR_TO_UINT32(x) ((volatile uint32_t *) x) + +#define SHARED_DATA_ENTRY_BASE MCUBOOT_SHARED_DATA_BASE+SHARED_DATA_HEADER_SIZE + +DataShare::DataShare(uint8_t *shared_base) : _shared_base(shared_base) { + volatile uint16_t *ptr = PTR_TO_UINT16(MCUBOOT_SHARED_DATA_BASE); + + /* Validate magic word */ + if(*ptr++ == SHARED_DATA_TLV_INFO_MAGIC) { + _is_valid = true; + } + + _total_size = *ptr; + +} + +bool DataShare::is_valid() { + return _is_valid; +} + +uint16_t DataShare::get_total_size() { + if(!is_valid()) { + return 0; + } + + return _total_size; +} + +int DataShare::get_next(uint16_t *type, mbed::Span buf, uint16_t *actual_size) { + + if(!is_valid()) { + return DATA_SHARE_ERROR_CORRUPT; + } + + if(_current_offset >= (_total_size - SHARED_DATA_HEADER_SIZE)) { + return DATA_SHARE_ERROR_EOF; + } + + uint16_t working_offset = _current_offset; + + /* Get the type and the length */ + *type = *PTR_TO_UINT16((SHARED_DATA_ENTRY_BASE + working_offset)); + working_offset += sizeof(uint16_t); + *actual_size = *PTR_TO_UINT16((SHARED_DATA_ENTRY_BASE + working_offset)); + working_offset += sizeof(uint16_t); + + /* Check if the output buffer is large enough */ + if((size_t)buf.size() < *actual_size) { + return DATA_SHARE_ERROR_OUT_OF_MEM; + } + + /* Copy data of TLV entry */ + memcpy(buf.data(), (const uint8_t*)PTR_TO_UINT8((SHARED_DATA_ENTRY_BASE + working_offset)), *actual_size); + + working_offset += *actual_size; + + /* Update state */ + _current_offset = working_offset; + + return DATA_SHARE_OK; + +} + +void DataShare::rewind() { + _current_offset = 0; +} + +#endif /* MCUBOOT_DATA_SHARING && !MCUBOOT_BOOTLOADER_BUILD */ diff --git a/bootloader/mcuboot/boot/mbed/include/utils/DataShare.h b/bootloader/mcuboot/boot/mbed/include/utils/DataShare.h new file mode 100644 index 0000000..fbb7e8e --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/include/utils/DataShare.h @@ -0,0 +1,92 @@ +/** + * + * Built with ARM Mbed-OS + * + * Copyright (c) 2019-2021 Embedded Planet, Inc. + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#ifndef DATASHARE_H_ +#define DATASHARE_H_ + +/** + * This is an utility intended to be used by the booted application rather + * than by the bootloader + */ +#if MCUBOOT_DATA_SHARING && !MCUBOOT_BOOTLOADER_BUILD + +#include +#include "platform/Span.h" + +/* Error codes */ +#define DATA_SHARE_OK 0 +#define DATA_SHARE_ERROR_EOF 1 /* No more TLV entries available */ +#define DATA_SHARE_ERROR_OUT_OF_MEM 2 /* The output buffer was not large enough to hold the contents of the TLV entry */ +#define DATA_SHARE_ERROR_CORRUPT 3 /* Data corruption has been detected */ + +/** + * Class enabling iterator-style access to the TLV-encoded data shared + * by an mcuboot-based bootloader. + */ +class DataShare +{ +public: + + /** + * Initializes a DataShare iterator at the given base address + * @note the configured MCUBOOT_SHARED_DATA_BASE address is used by default + */ + DataShare(uint8_t * shared_base = ((uint8_t *) MCUBOOT_SHARED_DATA_BASE)); + + /** + * Validates the magic number of the shared data section + * @return true if magic number is found, false otherwise + */ + bool is_valid(); + + /** + * Gets the total size of the shared data region + * @return 0 if shared data region is not valid, otherwise the size of the shared data region + */ + uint16_t get_total_size(); + + /** + * Attempts to get the next TLV entry in the shared data memory + * @param[put] type Type code of the data entry + * @param[out] out Output buffer span + * @param[out] actual_size Size of entry copied to output buffer in bytes + * @return err Zero if output buffer contents is valid (successful), non-zero on failure + */ + int get_next(uint16_t *type, mbed::Span buf, uint16_t *actual_size); + + /** + * Resets the iterator-like pointer to the first TLV element in the shared + * data region + */ + void rewind(); + +protected: + + uint8_t *_shared_base; + bool _is_valid = false; + uint16_t _total_size = 0; + uint16_t _current_offset = 0; + +}; + +#endif /* MCUBOOT_DATA_SHARING && !MCUBOOT_BOOTLOADER_BUILD */ + +#endif /* DATASHARE_H_ */ diff --git a/bootloader/mcuboot/boot/mbed/mbed_lib.json b/bootloader/mcuboot/boot/mbed/mbed_lib.json new file mode 100644 index 0000000..f5b7b67 --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/mbed_lib.json @@ -0,0 +1,194 @@ +{ + "name": "mcuboot", + "config": { + "bootloader-build": { + "help": "Build the bootloader, in addition to the MCUboot library.", + "macro_name": "MCUBOOT_BOOTLOADER_BUILD", + "accepted_values": [true, false], + "value": true + }, + "primary-slot-address": { + "help": "Start address of the primary (bootable) image slot. Target-dependent, please set on a per-target basis.", + "macro_name": "MCUBOOT_PRIMARY_SLOT_START_ADDR", + "required": true + }, + "slot-size": { + "help": "Size of the primary (bootable) image slot, in bytes. Target-dependent, please set on a per-target basis.", + "macro_name": "MCUBOOT_SLOT_SIZE", + "required": true + }, + "header-size": { + "help": "Size of the header info section, in bytes. Target-dependent, please set on a per-target basis.", + "macro_name": "MCUBOOT_HEADER_SIZE", + "value": "0x1000" + }, + "scratch-address": { + "help": "Start address of the scratch area. If needed, please set on a per-target basis.", + "macro_name": "MCUBOOT_SCRATCH_START_ADDR" + }, + "scratch-size": { + "help": "Size of the scratch area, in bytes. If needed, please set on a per-target basis.", + "macro_name": "MCUBOOT_SCRATCH_SIZE" + }, + "validate-primary-slot": { + "help": "Always check the signature of the image in the primary slot before booting, even if no upgrade was performed. This is recommended if the boot time penalty is acceptable.", + "macro_name": "MCUBOOT_VALIDATE_PRIMARY_SLOT", + "accepted_values": [true, null], + "value": true + }, + "signature-algorithm": { + "help": "The algorithm used for digital signing.", + "macro_name": "MCUBOOT_SIGNATURE_ALGORITHM", + "required": true, + "accepted_values": ["SIGNATURE_TYPE_RSA", "SIGNATURE_TYPE_EC256", "SIGNATURE_TYPE_ED25519", "SIGNATURE_TYPE_NONE"], + "value": "SIGNATURE_TYPE_RSA" + }, + "rsa-signature-length": { + "help": "If RSA is used for signature algorithm, this specifies the length.", + "macro_name": "MCUBOOT_RSA_SIGNATURE_LENGTH", + "required": true, + "accepted_values": [2048, 3072], + "value": 2048 + }, + "crypto-backend": { + "help": "The crypto library backend. NOTE: TinyCrypt is currently only supported with GCC for Mbed-OS builds.", + "macro_name": "MCUBOOT_CRYPTO_BACKEND", + "required": true, + "accepted_values": ["MBEDTLS", "TINYCRYPT"], + "value": "MBEDTLS" + }, + "overwrite-only": { + "help": "The default is to support A/B image swapping with rollback. A simpler code path, which only supports overwriting the existing image with the update image, is also available. (null to disable)", + "macro_name": "MCUBOOT_OVERWRITE_ONLY", + "accepted_values": [true, null], + "value": null + }, + "overwrite-only-fast": { + "help": "Only erase and overwrite those primary slot sectors needed to install the new image, rather than the entire image slot.", + "macro_name": "MCUBOOT_OVERWRITE_ONLY_FAST", + "accepted_values": [true, null], + "value": null + }, + "log-enable": { + "help": "Enable MCUboot logging. Must also enable mbed-trace", + "macro_name": "MCUBOOT_HAVE_LOGGING", + "accepted_values": [true, null], + "value": null + }, + "log-level": { + "help": "Verbosity of MCUboot logging.", + "macro_name": "MCUBOOT_LOG_LEVEL", + "accepted_values": ["MCUBOOT_LOG_LEVEL_OFF", "MCUBOOT_LOG_LEVEL_ERROR", "MCUBOOT_LOG_LEVEL_WARN", "MCUBOOT_LOG_LEVEL_INFO", "MCUBOOT_LOG_LEVEL_DEBUG"], + "value": "MCUBOOT_LOG_LEVEL_OFF" + }, + "log-bootloader-only": { + "help": "Exclude non-bootloader logs from Mbed OS (e.g. underlying storage).", + "macro_name": "MCUBOOT_LOG_BOOTLOADER_ONLY", + "accepted_values": [true, false], + "value": true + }, + "max-img-sectors": { + "help": "Maximum number of flash sectors per image slot. Target-dependent, please set on a per-target basis.", + "macro_name": "MCUBOOT_MAX_IMG_SECTORS", + "required": true + }, + "read-granularity": { + "help": "Granularity of read operations, in bytes. Enables a workaround if your block device does not support reading a single byte at a time. If this is used, it should be at least the value of your specific ->get_read_size() result.", + "macro_name": "MCUBOOT_READ_GRANULARITY", + "value": null + }, + "hardware-key": { + "help": "Use hardware key (NOT TESTED)", + "macro_name": "MCUBOOT_HW_KEY", + "accepted_values": [true, null], + "value": null + }, + "boot-swap-move": { + "help": "Boot swap using move (NOT TESTED)", + "macro_name": "MCUBOOT_SWAP_USING_MOVE", + "accepted_values": [true, null], + "value": null + }, + "updateable-image-number": { + "help": "Updateable image number (NOT TESTED)", + "macro_name": "MCUBOOT_IMAGE_NUMBER" + }, + "MCUBOOT_SWAP_SAVE_ENCTLV": { + "help": "Swap save enctlv (NOT TESTED)", + "macro_name": "MCUBOOT_IMAGE_NUMBER", + "value": null + }, + "encrypt-rsa": { + "help": "Encrypt images using RSA (NOT TESTED)", + "macro_name": "MCUBOOT_ENCRYPT_RSA", + "accepted_values": [true, null], + "value": null + }, + "encrypt-ec256": { + "help": "Encrypt images using EC256 (NOT TESTED)", + "macro_name": "MCUBOOT_ENCRYPT_EC256", + "accepted_values": [true, null], + "value": null + }, + "encrypt-x25519": { + "help": "Encrypt images using X25519 (NOT TESTED)", + "macro_name": "MCUBOOT_ENCRYPT_X25519", + "accepted_values": [true, null], + "value": null + }, + "bootstrap": { + "help": "Bootstrap (NOT TESTED)", + "macro_name": "MCUBOOT_BOOTSTRAP", + "value": null + }, + "use-bench": { + "help": "Use bench (NOT TESTED)", + "macro_name": "MCUBOOT_USE_BENCH", + "value": null + }, + "downgrade-prevention": { + "help": "Prevent downgrades (NOT TESTED)", + "macro_name": "MCUBOOT_DOWNGRADE_PREVENTION", + "value": null + }, + "hw-rollback-protection": { + "help": "Hardware rollback protection (NOT TESTED)", + "macro_name": "MCUBOOT_HW_ROLLBACK_PROT", + "value": null + }, + "measured-boot": { + "help": "Measured boot (NOT TESTED)", + "macro_name": "MCUBOOT_MEASURED_BOOT", + "value": null + }, + "share-data": { + "help": "Share data (NOT TESTED)", + "macro_name": "MCUBOOT_DATA_SHARING", + "value": null + }, + "share-data-base-address": { + "help": "Start of reserved RAM region for data shared between bootloader and application", + "macro_name": "MCUBOOT_SHARED_DATA_BASE", + "value": null + }, + "share-data-size": { + "help": "Size of reserved RAM region for data shared between bootloader and application", + "macro_name": "MCUBOOT_SHARED_DATA_SIZE", + "value": null + }, + "direct-xip": { + "help": "Enable ability to boot update candidates in-place.", + "macro_name": "MCUBOOT_DIRECT_XIP", + "value": null + }, + "direct-xip-revert": { + "help": "Enable XIP revert mechanism. Only valid if direct-xip is also enabled.", + "macro_name": "MCUBOOT_DIRECT_XIP_REVERT", + "value": null + }, + "xip-secondary-slot-address": { + "help": "Specify start address for secondary slot address in XIP-accessible memory. This is required if direct-xip is enabled.", + "value": null + } + } +} diff --git a/bootloader/mcuboot/boot/mbed/mcuboot_main.cpp b/bootloader/mcuboot/boot/mbed/mcuboot_main.cpp new file mode 100644 index 0000000..bf95e3a --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/mcuboot_main.cpp @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2020 Embedded Planet + * Copyright (c) 2020 ARM Limited + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License + */ + +#if MCUBOOT_BOOTLOADER_BUILD + +#include +#include "bootutil/bootutil.h" +#include "bootutil/image.h" +#include "hal/serial_api.h" +#include "platform/mbed_application.h" + +#if (MCUBOOT_CRYPTO_BACKEND == MBEDTLS) +#include "mbedtls/platform.h" +#elif (MCUBOOT_CRYPTO_BACKEND == TINYCRYPT) +#include "tinycrypt/ecc.h" +#endif + +#define MBED_TRACE_MAX_LEVEL TRACE_LEVEL_DEBUG +#define TRACE_GROUP "BL" +#include "mbed-trace/mbed_trace.h" + +#if (MCUBOOT_CRYPTO_BACKEND == TINYCRYPT) +/* XXX add this global definition for linking only + * TinyCrypt is used for signature verification and ECIES using secp256r1 and AES encryption; + * RNG is not required. So here we provide a stub. + * See https://github.com/mcu-tools/mcuboot/pull/791#discussion_r514480098 + */ + +extern "C" { +int default_CSPRNG(uint8_t *dest, unsigned int size) { return 0; } +} +#endif + +int main() +{ + int rc; + +#ifdef MCUBOOT_HAVE_LOGGING + mbed_trace_init(); +#if MCUBOOT_LOG_BOOTLOADER_ONLY + mbed_trace_include_filters_set("MCUb,BL"); +#endif //MCUBOOT_LOG_BOOTLOADER_ONLY +#endif //MCUBOOT_HAVE_LOGGING + + tr_info("Starting MCUboot"); + +#if (MCUBOOT_CRYPTO_BACKEND == MBEDTLS) + // Initialize mbedtls crypto for use by MCUboot + mbedtls_platform_context unused_ctx; + rc = mbedtls_platform_setup(&unused_ctx); + if(rc != 0) { + tr_error("Failed to setup Mbed TLS, error: %d", rc); + exit(rc); + } +#elif (MCUBOOT_CRYPTO_BACKEND == TINYCRYPT) + uECC_set_rng(0); +#endif + + struct boot_rsp rsp; + rc = boot_go(&rsp); + if(rc != 0) { + tr_error("Failed to locate firmware image, error: %d", rc); + exit(rc); + } + + uint32_t address = rsp.br_image_off + rsp.br_hdr->ih_hdr_size; + + // Workaround: The extra \n ensures the last trace gets flushed + // before mbed_start_application() destroys the stack and jumps + // to the application + tr_info("Booting firmware image at 0x%x\n", address); + + // Run the application in the primary slot + // Add header size offset to calculate the actual start address of application + mbed_start_application(address); +} + +#endif // MCUBOOT_BOOTLOADER_BUILD diff --git a/bootloader/mcuboot/boot/mbed/src/flash_map_backend.cpp b/bootloader/mcuboot/boot/mbed/src/flash_map_backend.cpp new file mode 100644 index 0000000..955ac42 --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/src/flash_map_backend.cpp @@ -0,0 +1,247 @@ +/* + * Copyright (c) 2020 Embedded Planet + * Copyright (c) 2020 ARM Limited + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License + */ + +#include +#include +#include "flash_map_backend/flash_map_backend.h" +#include "flash_map_backend/secondary_bd.h" +#include "sysflash/sysflash.h" + +#include "blockdevice/BlockDevice.h" +#include "FlashIAP/FlashIAPBlockDevice.h" + +#include "mcuboot_config/mcuboot_logging.h" + +#include "bootutil_priv.h" + +#define FLASH_DEVICE_INTERNAL_FLASH 0 +#define FLASH_AREAS 3 + +/** Application defined secondary block device */ +mbed::BlockDevice* mcuboot_secondary_bd = get_secondary_bd(); + +/** Internal application block device */ +static FlashIAPBlockDevice mcuboot_primary_bd(MCUBOOT_PRIMARY_SLOT_START_ADDR, MCUBOOT_SLOT_SIZE); + +#if MCUBOOT_SWAP_USING_SCRATCH +/** Scratch space is at the end of internal flash, after the main application */ +static FlashIAPBlockDevice mcuboot_scratch_bd(MCUBOOT_SCRATCH_START_ADDR, MCUBOOT_SCRATCH_SIZE); +#endif + +static mbed::BlockDevice* flash_map_bd[FLASH_AREAS] = { + (mbed::BlockDevice*) &mcuboot_primary_bd, /** Primary (loadable) image area */ + mcuboot_secondary_bd, /** Secondary (update candidate) image area */ +#if MCUBOOT_SWAP_USING_SCRATCH + (mbed::BlockDevice*) &mcuboot_scratch_bd /** Scratch space for swapping images */ +#else + nullptr +#endif +}; + +static struct flash_area flash_areas[FLASH_AREAS]; + +static unsigned int open_count[FLASH_AREAS] = {0}; + +int flash_area_open(uint8_t id, const struct flash_area** fapp) { + + *fapp = &flash_areas[id]; + struct flash_area* fap = (struct flash_area*)*fapp; + + // The offset of the slot is from the beginning of the flash device. + switch (id) { + case PRIMARY_ID: + fap->fa_off = MCUBOOT_PRIMARY_SLOT_START_ADDR; + break; + case SECONDARY_ID: +#if MCUBOOT_DIRECT_XIP + fap->fa_off = MBED_CONF_MCUBOOT_XIP_SECONDARY_SLOT_ADDRESS; +#else + fap->fa_off = 0; +#endif + break; +#if MCUBOOT_SWAP_USING_SCRATCH + case SCRATCH_ID: + fap->fa_off = MCUBOOT_SCRATCH_START_ADDR; + break; +#endif + default: + MCUBOOT_LOG_ERR("flash_area_open, unknown id %d", id); + return -1; + } + + open_count[id]++; + MCUBOOT_LOG_DBG("flash area %d open count: %d (+)", id, open_count[id]); + + fap->fa_id = id; + fap->fa_device_id = 0; // not relevant + + mbed::BlockDevice* bd = flash_map_bd[id]; + + /* Only initialize if this isn't a nested call to open the flash area */ + if (open_count[id] == 1) { + MCUBOOT_LOG_DBG("initializing flash area %d...", id); + int ret = bd->init(); + if (ret) + { + MCUBOOT_LOG_ERR("initializing flash area failed %d", ret); + return ret; + } + } else { + return 0; + } + + fap->fa_size = (uint32_t) bd->size(); + return 0; +} + +void flash_area_close(const struct flash_area* fap) { + uint8_t id = fap->fa_id; + /* No need to close an unopened flash area, avoid an overflow of the counter */ + if (!open_count[id]) { + return; + } + + open_count[id]--; + MCUBOOT_LOG_DBG("flash area %d open count: %d (-)", id, open_count[id]); + if (!open_count[id]) { + /* mcuboot is not currently consistent in opening/closing flash areas only once at a time + * so only deinitialize the BlockDevice if all callers have closed the flash area. */ + MCUBOOT_LOG_DBG("deinitializing flash area block device %d...", id); + mbed::BlockDevice* bd = flash_map_bd[id]; + bd->deinit(); + } +} + +/* + * Read/write/erase. Offset is relative from beginning of flash area. + */ +int flash_area_read(const struct flash_area* fap, uint32_t off, void* dst, uint32_t len) { + mbed::BlockDevice* bd = flash_map_bd[fap->fa_id]; + + /* Note: The address must be aligned to bd->get_read_size(). If MCUBOOT_READ_GRANULARITY + is defined, the length does not need to be aligned. */ +#ifdef MCUBOOT_READ_GRANULARITY + uint32_t read_size = bd->get_read_size(); + if (read_size == 0) { + MCUBOOT_LOG_ERR("Invalid read size: must be non-zero"); + return -1; + } + if (MCUBOOT_READ_GRANULARITY < read_size) { + MCUBOOT_LOG_ERR("Please increase MCUBOOT_READ_GRANULARITY (currently %u) to be at least %u", + MCUBOOT_READ_GRANULARITY, read_size); + return -1; + } + + uint32_t remainder = len % read_size; + len -= remainder; + if (len != 0) { +#endif + if (!bd->is_valid_read(off, len)) { + MCUBOOT_LOG_ERR("Invalid read: fa_id %d offset 0x%x len 0x%x", fap->fa_id, + (unsigned int) off, (unsigned int) len); + return -1; + } + else { + int ret = bd->read(dst, off, len); + if (ret != 0) { + MCUBOOT_LOG_ERR("Read failed: fa_id %d offset 0x%x len 0x%x", fap->fa_id, + (unsigned int) off, (unsigned int) len); + return ret; + } + } +#ifdef MCUBOOT_READ_GRANULARITY + } + + if (remainder) { + if (!bd->is_valid_read(off + len, read_size)) { + MCUBOOT_LOG_ERR("Invalid read: fa_id %d offset 0x%x len 0x%x", fap->fa_id, + (unsigned int) (off + len), (unsigned int) read_size); + return -1; + } + else { + uint8_t buffer[MCUBOOT_READ_GRANULARITY]; + int ret = bd->read(buffer, off + len, read_size); + if (ret != 0) { + MCUBOOT_LOG_ERR("Read failed: %d", ret); + return ret; + } + memcpy((uint8_t *)dst + len, buffer, remainder); + } + } +#endif + + return 0; +} + +int flash_area_write(const struct flash_area* fap, uint32_t off, const void* src, uint32_t len) { + mbed::BlockDevice* bd = flash_map_bd[fap->fa_id]; + return bd->program(src, off, len); +} + +int flash_area_erase(const struct flash_area* fap, uint32_t off, uint32_t len) { + mbed::BlockDevice* bd = flash_map_bd[fap->fa_id]; + return bd->erase(off, len); +} + +uint32_t flash_area_align(const struct flash_area* fap) { + mbed::BlockDevice* bd = flash_map_bd[fap->fa_id]; + return bd->get_program_size(); +} + +uint8_t flash_area_erased_val(const struct flash_area* fap) { + mbed::BlockDevice* bd = flash_map_bd[fap->fa_id]; + return bd->get_erase_value(); +} + +int flash_area_get_sectors(int fa_id, uint32_t* count, struct flash_sector* sectors) { + mbed::BlockDevice* bd = flash_map_bd[fa_id]; + + /* Loop through sectors and collect information on them */ + bd_addr_t offset = 0; + *count = 0; + while (*count < MCUBOOT_MAX_IMG_SECTORS && bd->is_valid_read(offset, bd->get_read_size())) { + + sectors[*count].fs_off = offset; + bd_size_t erase_size = bd->get_erase_size(offset); + sectors[*count].fs_size = erase_size; + + offset += erase_size; + *count += 1; + } + + return 0; +} + +int flash_area_id_from_image_slot(int slot) { + return slot; +} + +/** + * Multi images support not implemented yet + */ +int flash_area_id_from_multi_image_slot(int image_index, int slot) +{ + assert(image_index == 0); + return slot; +} + +int flash_area_id_to_multi_image_slot(int image_index, int area_id) +{ + assert(image_index == 0); + return area_id; +} diff --git a/bootloader/mcuboot/boot/mbed/src/secondary_bd.cpp b/bootloader/mcuboot/boot/mbed/src/secondary_bd.cpp new file mode 100644 index 0000000..7550a61 --- /dev/null +++ b/bootloader/mcuboot/boot/mbed/src/secondary_bd.cpp @@ -0,0 +1,40 @@ +/* + * Mbed-OS Microcontroller Library + * Copyright (c) 2020 Embedded Planet + * Copyright (c) 2020 ARM Limited + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License + */ + +#if MCUBOOT_DIRECT_XIP + +#include "flash_map_backend/secondary_bd.h" +#include "platform/mbed_toolchain.h" +#include "FlashIAP/FlashIAPBlockDevice.h" + +/** + * For an XIP build, the secondary BD is provided by mcuboot by default. + * + * This is a weak symbol so the user can override it. + */ +MBED_WEAK mbed::BlockDevice* get_secondary_bd(void) { + static FlashIAPBlockDevice secondary_bd(MBED_CONF_MCUBOOT_XIP_SECONDARY_SLOT_ADDRESS, + MCUBOOT_SLOT_SIZE); + + return &secondary_bd; +} + +#endif + + diff --git a/bootloader/mcuboot/boot/mynewt/README.md b/bootloader/mcuboot/boot/mynewt/README.md new file mode 100644 index 0000000..e482d6d --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/README.md @@ -0,0 +1,6 @@ +# MCUboot - apps/boot + +This sample app implements a bootloader for the Mynewt OS (apache.mynewt.org). +This app requires the following Mynewt repositories: + * @mcuboot (this one) + * @apache-mynewt-core diff --git a/bootloader/mcuboot/boot/mynewt/boot_uart/include/boot_uart/boot_uart.h b/bootloader/mcuboot/boot/mynewt/boot_uart/include/boot_uart/boot_uart.h new file mode 100644 index 0000000..6d69668 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/boot_uart/include/boot_uart/boot_uart.h @@ -0,0 +1,28 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef _BOOT_UART_H_ +#define _BOOT_UART_H_ + +int boot_uart_open(void); +void boot_uart_close(void); +int boot_uart_read(char *str, int cnt, int *newline); +void boot_uart_write(const char *ptr, int cnt); + +#endif /* _BOOT_UART_H_ */ diff --git a/bootloader/mcuboot/boot/mynewt/boot_uart/pkg.yml b/bootloader/mcuboot/boot/mynewt/boot_uart/pkg.yml new file mode 100644 index 0000000..a100a20 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/boot_uart/pkg.yml @@ -0,0 +1,32 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: boot/mynewt/boot_uart +pkg.description: "For interfacing with uart from boot_serial" +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: + - loader + - boot + - bootloader + +pkg.deps: + - "@apache-mynewt-core/hw/hal" + + diff --git a/bootloader/mcuboot/boot/mynewt/boot_uart/src/boot_uart.c b/bootloader/mcuboot/boot/mynewt/boot_uart/src/boot_uart.c new file mode 100644 index 0000000..7593e33 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/boot_uart/src/boot_uart.c @@ -0,0 +1,178 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +#include +#include +#include +#include "os/mynewt.h" +#include + +/* + * RX is a ring buffer, which gets drained constantly. + * TX blocks until buffer has been completely transmitted. + */ +#define CONSOLE_HEAD_INC(cr) (((cr)->head + 1) & (sizeof((cr)->buf) - 1)) +#define CONSOLE_TAIL_INC(cr) (((cr)->tail + 1) & (sizeof((cr)->buf) - 1)) + +struct { + uint16_t head; + uint16_t tail; + uint8_t buf[MYNEWT_VAL(CONSOLE_UART_RX_BUF_SIZE)]; +} bs_uart_rx; + +struct { + uint8_t *ptr; + int cnt; +} volatile bs_uart_tx; + +static struct uart_dev *bs_uart; + +static int bs_rx_char(void *arg, uint8_t byte); +static int bs_tx_char(void *arg); + +int +boot_uart_open(void) +{ + struct uart_conf uc = { + .uc_speed = MYNEWT_VAL(CONSOLE_UART_BAUD), + .uc_databits = 8, + .uc_stopbits = 1, + .uc_parity = UART_PARITY_NONE, + .uc_flow_ctl = MYNEWT_VAL(CONSOLE_UART_FLOW_CONTROL), + .uc_tx_char = bs_tx_char, + .uc_rx_char = bs_rx_char, + }; + + bs_uart = (struct uart_dev *)os_dev_open(MYNEWT_VAL(CONSOLE_UART_DEV), + OS_TIMEOUT_NEVER, &uc); + if (!bs_uart) { + return -1; + } + return 0; +} + +void +boot_uart_close(void) +{ + os_dev_close(&bs_uart->ud_dev); + bs_uart_rx.head = 0; + bs_uart_rx.tail = 0; + bs_uart_tx.cnt = 0; +} + +static int +bs_rx_char(void *arg, uint8_t byte) +{ + if (CONSOLE_HEAD_INC(&bs_uart_rx) == bs_uart_rx.tail) { + /* + * RX queue full. Reader must drain this. + */ + return -1; + } + bs_uart_rx.buf[bs_uart_rx.head] = byte; + bs_uart_rx.head = CONSOLE_HEAD_INC(&bs_uart_rx); + return 0; +} + +static uint8_t +bs_pull_char(void) +{ + uint8_t ch; + + ch = bs_uart_rx.buf[bs_uart_rx.tail]; + bs_uart_rx.tail = CONSOLE_TAIL_INC(&bs_uart_rx); + return ch; +} + +int +boot_uart_read(char *str, int cnt, int *newline) +{ + int i; + int sr; + uint8_t ch; + + *newline = 0; + OS_ENTER_CRITICAL(sr); + for (i = 0; i < cnt; i++) { + if (bs_uart_rx.head == bs_uart_rx.tail) { + break; + } + + ch = bs_pull_char(); + if (ch == '\n') { + *str = '\0'; + *newline = 1; + break; + } + /* + * Unblock interrupts allowing more incoming data. + */ + OS_EXIT_CRITICAL(sr); + OS_ENTER_CRITICAL(sr); + *str++ = ch; + } + OS_EXIT_CRITICAL(sr); + if (i > 0 || *newline) { + uart_start_rx(bs_uart); + } + return i; +} + +static int +bs_tx_char(void *arg) +{ + uint8_t ch; + + if (!bs_uart_tx.cnt) { + return -1; + } + + bs_uart_tx.cnt--; + ch = *bs_uart_tx.ptr; + bs_uart_tx.ptr++; + return ch; +} + +#if MYNEWT_VAL(SELFTEST) +/* + * OS is not running, so native uart 'driver' cannot run either. + * At the moment unit tests don't check the responses to messages it + * sends, so we can drop the outgoing data here. + */ +void +boot_uart_write(const char *ptr, int cnt) +{ +} + +#else + +void +boot_uart_write(const char *ptr, int cnt) +{ + int sr; + + OS_ENTER_CRITICAL(sr); + bs_uart_tx.ptr = (uint8_t *)ptr; + bs_uart_tx.cnt = cnt; + OS_EXIT_CRITICAL(sr); + + uart_start_tx(bs_uart); + while (bs_uart_tx.cnt); +} + +#endif diff --git a/bootloader/mcuboot/boot/mynewt/boot_uart/syscfg.yml b/bootloader/mcuboot/boot/mynewt/boot_uart/syscfg.yml new file mode 100644 index 0000000..29f4b53 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/boot_uart/syscfg.yml @@ -0,0 +1,24 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +syscfg.defs: + CONSOLE_UART_RX_BUF_SIZE: + description: > + UART console receive buffer size; must be power of 2. + value: 32 + diff --git a/bootloader/mcuboot/boot/mynewt/flash_map_backend/include/flash_map_backend/flash_map_backend.h b/bootloader/mcuboot/boot/mynewt/flash_map_backend/include/flash_map_backend/flash_map_backend.h new file mode 100644 index 0000000..3686510 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/flash_map_backend/include/flash_map_backend/flash_map_backend.h @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2018 Nordic Semiconductor ASA + * Copyright (c) 2015 Runtime Inc + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef __FLASH_MAP_BACKEND_H__ +#define __FLASH_MAP_BACKEND_H__ + +#include +#include +#include +#include /* off_t */ + +#if (MCUBOOT_IMAGE_NUMBER == 1) + +#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_0 : \ + FLASH_AREA_IMAGE_0) +#if MYNEWT_VAL(BOOTUTIL_SINGLE_APPLICATION_SLOT) +#define FLASH_AREA_IMAGE_SECONDARY FLASH_AREA_IMAGE_PRIMARY +#else +#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_1 : \ + FLASH_AREA_IMAGE_1) +#endif + +#elif (MCUBOOT_IMAGE_NUMBER == 2) + +#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_0 : \ + ((x) == 1) ? \ + FLASH_AREA_IMAGE_2 : \ + 255) +#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? \ + FLASH_AREA_IMAGE_1 : \ + ((x) == 1) ? \ + FLASH_AREA_IMAGE_3 : \ + 255) + +#else +#error "Image slot and flash area mapping is not defined" +#endif + +int flash_area_id_from_multi_image_slot(int image_index, int slot); +int flash_area_id_to_multi_image_slot(int image_index, int area_id); + +struct flash_sector { + uint32_t fs_off; + uint32_t fs_size; +}; + +int flash_area_sector_from_off(off_t off, struct flash_sector *sector); + +static inline int flash_area_get_sector(const struct flash_area *fa, off_t off, + struct flash_sector *sector) +{ + return flash_area_sector_from_off(off, sector); +} + +static inline uint8_t flash_area_get_id(const struct flash_area *fa) +{ + return fa->fa_id; +} + +static inline uint8_t flash_area_get_device_id(const struct flash_area *fa) +{ + return fa->fa_device_id; +} + +static inline uint32_t flash_area_get_off(const struct flash_area *fa) +{ + return fa->fa_off; +} + +static inline uint32_t flash_area_get_size(const struct flash_area *fa) +{ + return fa->fa_size; +} + +static inline uint32_t flash_sector_get_off(const struct flash_sector *fs) +{ + return fs->fs_off; +} + +#endif /* __FLASH_MAP_BACKEND_H__ */ diff --git a/bootloader/mcuboot/boot/mynewt/flash_map_backend/pkg.yml b/bootloader/mcuboot/boot/mynewt/flash_map_backend/pkg.yml new file mode 100644 index 0000000..ba1bf5b --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/flash_map_backend/pkg.yml @@ -0,0 +1,14 @@ +# +# Copyright (c) 2018 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 +# + +pkg.name: boot/mynewt/flash_map_backend +pkg.description: Flash_map API helper reference. +pkg.author: "Nordic Semiconductor ASA" +pkg.homepage: "http://mcuboot.com" + +pkg.deps: + - "@apache-mynewt-core/sys/flash_map" + - "@mcuboot/boot/mynewt/mcuboot_config" diff --git a/bootloader/mcuboot/boot/mynewt/flash_map_backend/src/flash_map_extended.c b/bootloader/mcuboot/boot/mynewt/flash_map_backend/src/flash_map_extended.c new file mode 100644 index 0000000..e6952b3 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/flash_map_backend/src/flash_map_extended.c @@ -0,0 +1,83 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include +#include +#include +#include + +int flash_area_id_from_multi_image_slot(int image_index, int slot) +{ + switch (slot) { + case 0: return FLASH_AREA_IMAGE_PRIMARY(image_index); +#ifndef MCUBOOT_SINGLE_APPLICATION_SLOT + case 1: return FLASH_AREA_IMAGE_SECONDARY(image_index); +#endif +#if MCUBOOT_SWAP_USING_SCRATCH + case 2: return FLASH_AREA_IMAGE_SCRATCH; +#endif + } + return 255; +} + +int flash_area_id_to_multi_image_slot(int image_index, int area_id) +{ + if (area_id == FLASH_AREA_IMAGE_PRIMARY(image_index)) { + return 0; + } +#ifndef MCUBOOT_SINGLE_APPLICATION_SLOT + if (area_id == FLASH_AREA_IMAGE_SECONDARY(image_index)) { + return 1; + } +#endif + return 255; +} + +int flash_area_sector_from_off(off_t off, struct flash_sector *sector) +{ + const struct flash_area *fa; + const struct hal_flash *hf; + uint32_t start; + uint32_t size; + int rc; + int i; + + rc = flash_area_open(FLASH_AREA_IMAGE_0, &fa); + if (rc != 0) { + return -1; + } + + rc = -1; + hf = hal_bsp_flash_dev(fa->fa_device_id); + for (i = 0; i < hf->hf_sector_cnt; i++) { + hf->hf_itf->hff_sector_info(hf, i, &start, &size); + if (start < fa->fa_off) { + continue; + } + if (off >= start - fa->fa_off && off <= (start - fa->fa_off) + size) { + sector->fs_off = start - fa->fa_off; + sector->fs_size = size; + rc = 0; + break; + } + } + + flash_area_close(fa); + return rc; +} diff --git a/bootloader/mcuboot/boot/mynewt/mcuboot_config/include/mcuboot_config/mcuboot_config.h b/bootloader/mcuboot/boot/mynewt/mcuboot_config/include/mcuboot_config/mcuboot_config.h new file mode 100644 index 0000000..1ed1628 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/mcuboot_config/include/mcuboot_config/mcuboot_config.h @@ -0,0 +1,157 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +#ifndef __MCUBOOT_CONFIG_H__ +#define __MCUBOOT_CONFIG_H__ + +#include + +#if MYNEWT_VAL(BOOTUTIL_IMAGE_NUMBER) +#define MCUBOOT_IMAGE_NUMBER MYNEWT_VAL(BOOTUTIL_IMAGE_NUMBER) +#else +#define MCUBOOT_IMAGE_NUMBER 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_VERSION_CMP_USE_BUILD_NUMBER) +#define MCUBOOT_VERSION_CMP_USE_BUILD_NUMBER +#endif +#if MYNEWT_VAL(BOOT_SERIAL) +#define MCUBOOT_SERIAL 1 +#endif +#if MYNEWT_VAL(BOOT_SERIAL_MGMT_ECHO) +#define MCUBOOT_BOOT_MGMT_ECHO 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_VALIDATE_SLOT0) +#define MCUBOOT_VALIDATE_PRIMARY_SLOT 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_USE_MBED_TLS) +#define MCUBOOT_USE_MBED_TLS 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_USE_TINYCRYPT) +#define MCUBOOT_USE_TINYCRYPT 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_SIGN_EC256) +#define MCUBOOT_SIGN_EC256 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_SIGN_RSA) +#define MCUBOOT_SIGN_RSA 1 +#define MCUBOOT_SIGN_RSA_LEN MYNEWT_VAL(BOOTUTIL_SIGN_RSA_LEN) +#endif +#if MYNEWT_VAL(BOOTUTIL_SIGN_ED25519) +#define MCUBOOT_SIGN_ED25519 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_ENCRYPT_RSA) +#define MCUBOOT_ENCRYPT_RSA 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_ENCRYPT_KW) +#define MCUBOOT_ENCRYPT_KW 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_ENCRYPT_EC256) +#define MCUBOOT_ENCRYPT_EC256 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_ENCRYPT_X25519) +#define MCUBOOT_ENCRYPT_X25519 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_ENCRYPT_RSA) || MYNEWT_VAL(BOOTUTIL_ENCRYPT_KW) || \ + MYNEWT_VAL(BOOTUTIL_ENCRYPT_EC256) || MYNEWT_VAL(BOOTUTIL_ENCRYPT_X25519) +#define MCUBOOT_ENC_IMAGES 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_SWAP_USING_MOVE) +#define MCUBOOT_SWAP_USING_MOVE 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_SWAP_SAVE_ENCTLV) +#define MCUBOOT_SWAP_SAVE_ENCTLV 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_OVERWRITE_ONLY) +#define MCUBOOT_OVERWRITE_ONLY 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_OVERWRITE_ONLY_FAST) +#define MCUBOOT_OVERWRITE_ONLY_FAST 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_SINGLE_APPLICATION_SLOT) +#define MCUBOOT_SINGLE_APPLICATION_SLOT 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_HAVE_LOGGING) +#define MCUBOOT_HAVE_LOGGING 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_BOOTSTRAP) +#define MCUBOOT_BOOTSTRAP 1 +#endif +#if MYNEWT_VAL_CHOICE(BOOTUTIL_DOWNGRADE_PREVENTION, version) +#define MCUBOOT_DOWNGRADE_PREVENTION 1 +/* MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER is used later as bool value so it is + * always defined, (unlike MCUBOOT_DOWNGRADE_PREVENTION which is only used in + * preprocessor condition and my be not defined) */ +#define MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER 0 +#elif MYNEWT_VAL_CHOICE(BOOTUTIL_DOWNGRADE_PREVENTION, security_counter) +#define MCUBOOT_DOWNGRADE_PREVENTION 1 +#define MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER 1 +#endif +#if MYNEWT_VAL(BOOTUTIL_HW_DOWNGRADE_PREVENTION) +#define MCUBOOT_HW_ROLLBACK_PROT 1 +#endif + +#if MYNEWT_VAL(MCUBOOT_MEASURED_BOOT) +#define MCUBOOT_MEASURED_BOOT 1 +#endif + +#if MYNEWT_VAL(MCUBOOT_MEASURED_BOOT_MAX_RECORD_SZ) +#define MAX_BOOT_RECORD_SZ MYNEWT_VAL(MCUBOOT_MEASURED_BOOT_MAX_RECORD_SZ) +#endif + +#if MYNEWT_VAL(MCUBOOT_DATA_SHARING) +#define MCUBOOT_DATA_SHARING 1 +#endif + +#if MYNEWT_VAL(MCUBOOT_SHARED_DATA_BASE) +#define MCUBOOT_SHARED_DATA_BASE MYNEWT_VAL(MCUBOOT_SHARED_DATA_BASE) +#endif + +#if MYNEWT_VAL(MCUBOOT_SHARED_DATA_SIZE) +#define MCUBOOT_SHARED_DATA_SIZE MYNEWT_VAL(MCUBOOT_SHARED_DATA_SIZE) +#endif + +/* + * Currently there is no configuration option, for this platform, + * that enables the system specific mcumgr commands in mcuboot + */ +#define MCUBOOT_PERUSER_MGMT_GROUP_ENABLED 0 + +#define MCUBOOT_MAX_IMG_SECTORS MYNEWT_VAL(BOOTUTIL_MAX_IMG_SECTORS) + +#if MYNEWT_VAL(MCU_FLASH_MIN_WRITE_SIZE) > 8 +#define MCUBOOT_BOOT_MAX_ALIGN MYNEWT_VAL(MCU_FLASH_MIN_WRITE_SIZE) +#endif + +#if MYNEWT_VAL(BOOTUTIL_FEED_WATCHDOG) && MYNEWT_VAL(WATCHDOG_INTERVAL) +#include +#define MCUBOOT_WATCHDOG_FEED() \ + do { \ + hal_watchdog_tickle(); \ + } while (0) +#else +#define MCUBOOT_WATCHDOG_FEED() do {} while (0) +#endif + +/* + * No direct idle call implemented + */ +#define MCUBOOT_CPU_IDLE() \ + do { \ + } while (0) + +#endif /* __MCUBOOT_CONFIG_H__ */ diff --git a/bootloader/mcuboot/boot/mynewt/mcuboot_config/include/mcuboot_config/mcuboot_logging.h b/bootloader/mcuboot/boot/mynewt/mcuboot_config/include/mcuboot_config/mcuboot_logging.h new file mode 100644 index 0000000..a646faf --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/mcuboot_config/include/mcuboot_config/mcuboot_logging.h @@ -0,0 +1,87 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ +#ifndef __MCUBOOT_LOGGING_H__ +#define __MCUBOOT_LOGGING_H__ + +#include +#include + +#define BOOTUTIL_LOG_LEVEL_OFF 1 +#define BOOTUTIL_LOG_LEVEL_ERROR 2 +#define BOOTUTIL_LOG_LEVEL_WARNING 3 +#define BOOTUTIL_LOG_LEVEL_INFO 4 +#define BOOTUTIL_LOG_LEVEL_DEBUG 5 + +#define MCUBOOT_LOG_LEVEL_OFF BOOTUTIL_LOG_LEVEL_OFF +#define MCUBOOT_LOG_LEVEL_ERROR BOOTUTIL_LOG_LEVEL_ERROR +#define MCUBOOT_LOG_LEVEL_WARNING BOOTUTIL_LOG_LEVEL_WARNING +#define MCUBOOT_LOG_LEVEL_INFO BOOTUTIL_LOG_LEVEL_INFO +#define MCUBOOT_LOG_LEVEL_DEBUG BOOTUTIL_LOG_LEVEL_DEBUG + +#ifndef MCUBOOT_LOG_LEVEL +#define MCUBOOT_LOG_LEVEL MYNEWT_VAL(BOOTUTIL_LOG_LEVEL) +#endif + +#define MCUBOOT_LOG_MODULE_DECLARE(domain) /* ignore */ +#define MCUBOOT_LOG_MODULE_REGISTER(domain) /* ignore */ + +#if !((MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_OFF) && \ + (MCUBOOT_LOG_LEVEL <= MCUBOOT_LOG_LEVEL_DEBUG)) +#error "Invalid MCUBOOT_LOG_LEVEL config." +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_ERROR +#define MCUBOOT_LOG_ERR(_fmt, ...) \ + do { \ + printf("[ERR] " _fmt "\n", ##__VA_ARGS__); \ + } while (0) +#else +#define MCUBOOT_LOG_ERR(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_WARNING +#define MCUBOOT_LOG_WRN(_fmt, ...) \ + do { \ + printf("[WRN] " _fmt "\n", ##__VA_ARGS__); \ + } while (0) +#else +#define MCUBOOT_LOG_WRN(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_INFO +#define MCUBOOT_LOG_INF(_fmt, ...) \ + do { \ + printf("[INF] " _fmt "\n", ##__VA_ARGS__); \ + } while (0) +#else +#define MCUBOOT_LOG_INF(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_DEBUG +#define MCUBOOT_LOG_DBG(_fmt, ...) \ + do { \ + printf("[DBG] " _fmt "\n", ##__VA_ARGS__); \ + } while (0) +#else +#define MCUBOOT_LOG_DBG(...) IGNORE(__VA_ARGS__) +#endif + +#define MCUBOOT_LOG_SIM(...) IGNORE(__VA_ARGS__) + +#endif diff --git a/bootloader/mcuboot/boot/mynewt/mcuboot_config/pkg.yml b/bootloader/mcuboot/boot/mynewt/mcuboot_config/pkg.yml new file mode 100644 index 0000000..33ba332 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/mcuboot_config/pkg.yml @@ -0,0 +1,23 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: boot/mynewt/mcuboot_config +pkg.description: "Mynewt's mcuboot configuration" +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" diff --git a/bootloader/mcuboot/boot/mynewt/mcuboot_config/syscfg.yml b/bootloader/mcuboot/boot/mynewt/mcuboot_config/syscfg.yml new file mode 100644 index 0000000..7326005 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/mcuboot_config/syscfg.yml @@ -0,0 +1,159 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +# Package: boot/mynewt/mcuboot_config + +syscfg.defs: + BOOTUTIL_IMAGE_NUMBER: + description: 'Number of images for multi-image (0 and 1 mean single image).' + value: 0 + BOOTUTIL_VALIDATE_SLOT0: + description: 'Validate image at slot 0 on each boot.' + value: 0 + BOOTUTIL_SIGN_RSA: + description: 'Images are signed using RSA.' + value: 0 + BOOTUTIL_SIGN_RSA_LEN: + description: 'Key size for RSA keys (2048 or 3072).' + value: 2048 + BOOTUTIL_SIGN_EC256: + description: 'Images are signed using ECDSA NIST P-256.' + value: 0 + BOOTUTIL_SIGN_ED25519: + description: 'Images are signed using ED25519.' + value: 0 + BOOTUTIL_ENCRYPT_RSA: + description: 'Support for encrypted images using RSA-2048-OAEP.' + value: 0 + BOOTUTIL_ENCRYPT_KW: + description: 'Support for encrypted images using AES-128-Keywrap.' + value: 0 + BOOTUTIL_ENCRYPT_EC256: + description: 'Support for encrypted images using ECIES-P256.' + value: 0 + BOOTUTIL_ENCRYPT_X25519: + description: 'Support for encrypted images using ECIES-X25519.' + value: 0 + BOOTUTIL_USE_MBED_TLS: + description: 'Use mbed TLS for crypto operations.' + value: 1 + BOOTUTIL_USE_TINYCRYPT: + description: 'Use tinycrypt for crypto operations.' + value: 0 + BOOTUTIL_SWAP_USING_MOVE: + description: 'Perform swap without requiring scratch.' + value: 0 + BOOTUTIL_SWAP_SAVE_ENCTLV: + description: 'Save TLVs instead of plaintext encryption keys in swap status.' + value: 0 + BOOTUTIL_OVERWRITE_ONLY: + description: 'Non-swapping upgrades, copy from slot 1 to slot 0 only.' + value: 0 + BOOTUTIL_OVERWRITE_ONLY_FAST: + description: 'Use faster copy only upgrade.' + value: 1 + BOOTUTIL_SINGLE_APPLICATION_SLOT: + description: 'Set to one if there is only one slot.' + value: 0 + BOOTUTIL_IMAGE_FORMAT_V2: + description: 'Indicates that system is using v2 of image format.' + value: 1 + BOOTUTIL_MAX_IMG_SECTORS: + description: 'Maximum number of sectors that are swapped.' + value: 128 + BOOTUTIL_DOWNGRADE_PREVENTION: + description: > + Select downgrade prevention strategy. + - none downgrades are allowed + - version: + Prevent downgrades by enforcing incrementing version numbers. + When this option is set, any upgrade must have greater major version + or greater minor version with equal major version. This mechanism + only protects against some attacks against version downgrades (for + example, a JTAG could be used to write an older version). + - security_counter: + security counter is used for version eligibility check instead of pure + version. When this option is set, any upgrade must have greater or + equal security counter value. + Because of the acceptance of equal values it allows for software + downgrades to some extent. + choices: + - none + - version + - security_counter + value: none + BOOTUTIL_VERSION_CMP_USE_BUILD_NUMBER: + description: > + Use build number while comparing image version. + By default, the image version comparison relies only on version major, + minor and revision. Enable this option to take into account the build + number as well. + This only affect builds with BOOTUTIL_DOWNGRADE_PREVENTION set to version. + value: 0 + BOOTUTIL_HW_ROLLBACK_PROT: + description: > + Prevent undesirable/malicious software downgrades. When this option is + set, any upgrade must have greater or equal security counter value. + Because of the acceptance of equal values it allows for software + downgrade to some extent + value: 0 + BOOTUTIL_HAVE_LOGGING: + description: 'Enable serial logging' + value: 0 + restrictions: + - "!BOOTUTIL_NO_LOGGING" + BOOTUTIL_NO_LOGGING: + description: 'No serial logging' + value: 1 + restrictions: + - "!BOOTUTIL_HAVE_LOGGING" + BOOTUTIL_LOG_LEVEL: + description: > + Default console log level. Valid values are: + BOOTUTIL_LOG_LEVEL_OFF + BOOTUTIL_LOG_LEVEL_ERROR + BOOTUTIL_LOG_LEVEL_WARNING + BOOTUTIL_LOG_LEVEL_INFO + BOOTUTIL_LOG_LEVEL_DEBUG + value: 'BOOTUTIL_LOG_LEVEL_INFO' + BOOTUTIL_BOOTSTRAP: + description: 'Support bootstrapping slot0 from slot1, if slot0 is empty' + value: 0 + BOOTUTIL_FEED_WATCHDOG: + description: 'Enable watchdog feeding while performing a swap upgrade' + value: 0 + + MCUBOOT_MEASURED_BOOT: + description: > + Store the boot state/measurements in shared memory. + If enabled, the bootloader will store certain boot measurements such as + the hash of the firmware image in a shared memory area. This data can + be used later by runtime services (e.g. by a device attestation service). + value: + MCUBOOT_MEASURED_BOOT_MAX_RECORD_SZ: + description: the maximum size of the CBOR encoded boot record in bytes. + value: + MCUBOOT_DATA_SHARING: + description: Save application specific data in shared memory (RAM). + value: + MCUBOOT_SHARED_DATA_BASE: + description: RAM address of shared data + value: + MCUBOOT_SHARED_DATA_SIZE: + description: Shared data size. + value: diff --git a/bootloader/mcuboot/boot/mynewt/pkg.yml b/bootloader/mcuboot/boot/mynewt/pkg.yml new file mode 100644 index 0000000..e0b3132 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/pkg.yml @@ -0,0 +1,51 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: boot/mynewt +pkg.type: app +pkg.description: "Mynewt port of mcuboot" +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: + - loader + +pkg.cflags: + - "-DMCUBOOT_MYNEWT=1" + +pkg.deps: + - "@mcuboot/boot/mynewt/mcuboot_config" + - "@mcuboot/boot/bootutil" + - "@mcuboot/boot/mynewt/flash_map_backend" + - "@apache-mynewt-core/kernel/os" + - "@apache-mynewt-core/sys/log/stub" + +pkg.ign_files.!BOOTUTIL_SINGLE_APPLICATION_SLOT: + - "single_loader.c" +pkg.ign_files.BOOTUTIL_SINGLE_APPLICATION_SLOT: + - "swap_scratch.c" + +pkg.deps.BOOTUTIL_NO_LOGGING: + - "@apache-mynewt-core/sys/console/stub" + +pkg.deps.BOOTUTIL_HAVE_LOGGING: + - "@apache-mynewt-core/sys/console/minimal" + +pkg.deps.BOOT_SERIAL: + - "@mcuboot/boot/boot_serial" + - "@mcuboot/boot/mynewt/boot_uart" diff --git a/bootloader/mcuboot/boot/mynewt/src/main.c b/bootloader/mcuboot/boot/mynewt/src/main.c new file mode 100644 index 0000000..7a3fa2e --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/src/main.c @@ -0,0 +1,278 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include "mcuboot_config/mcuboot_config.h" + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef MCUBOOT_SERIAL +#include +#include +#include +#endif +#if defined(MCUBOOT_SERIAL) +#include +#endif +#include +#include "bootutil/image.h" +#include "bootutil/bootutil.h" +#include "bootutil/bootutil_log.h" +#include "bootutil/fault_injection_hardening.h" + +#if MYNEWT_VAL(BOOT_CUSTOM_START) +void boot_custom_start(uintptr_t flash_base, struct boot_rsp *rsp); +#endif + +#if MYNEWT_VAL(BOOT_PREBOOT) +void boot_preboot(void); +#endif + +#if defined(MCUBOOT_SERIAL) +#define BOOT_SERIAL_REPORT_DUR \ + (MYNEWT_VAL(OS_CPUTIME_FREQ) / MYNEWT_VAL(BOOT_SERIAL_REPORT_FREQ)) +#define BOOT_SERIAL_INPUT_MAX (512) + +static int boot_read(char *str, int cnt, int *newline); +static const struct boot_uart_funcs boot_uart_funcs = { + .read = boot_read, + .write = boot_uart_write +}; + +static int +boot_read(char *str, int cnt, int *newline) +{ +#if MYNEWT_VAL(BOOT_SERIAL_REPORT_PIN) != -1 + static uint32_t tick = 0; + + if (tick == 0) { + /* + * Configure GPIO line as output. This is a pin we toggle at the + * given frequency. + */ + hal_gpio_init_out(MYNEWT_VAL(BOOT_SERIAL_REPORT_PIN), 0); + tick = os_cputime_get32(); + } else { + if (os_cputime_get32() - tick > BOOT_SERIAL_REPORT_DUR) { + hal_gpio_toggle(MYNEWT_VAL(BOOT_SERIAL_REPORT_PIN)); + tick = os_cputime_get32(); + } + } +#endif + hal_watchdog_tickle(); + + return boot_uart_read(str, cnt, newline); +} + +#if MYNEWT_VAL(BOOT_SERIAL_DETECT_TIMEOUT) != 0 + +/** Don't include null-terminator in comparison. */ +#define BOOT_SERIAL_DETECT_STRING_LEN \ + (sizeof MYNEWT_VAL(BOOT_SERIAL_DETECT_STRING) - 1) + +/** + * Listens on the UART for the management string. Blocks for up to + * BOOT_SERIAL_DETECT_TIMEOUT milliseconds. + * + * @return true if the management string was received; + * false if the management string was not received + * before the UART listen timeout expired. + */ +static bool +serial_detect_uart_string(void) +{ + uint32_t start_tick; + char buf[BOOT_SERIAL_DETECT_STRING_LEN] = { 0 }; + char ch; + int newline; + int rc; + + /* Calculate the timeout duration in OS cputime ticks. */ + static const uint32_t timeout_dur = + MYNEWT_VAL(BOOT_SERIAL_DETECT_TIMEOUT) / + (1000.0 / MYNEWT_VAL(OS_CPUTIME_FREQ)); + + rc = boot_uart_open(); + assert(rc == 0); + + start_tick = os_cputime_get32(); + + while (1) { + /* Read a single character from the UART. */ + rc = boot_uart_read(&ch, 1, &newline); + if (rc > 0) { + /* Eliminate the oldest character in the buffer to make room for + * the new one. + */ + memmove(buf, buf + 1, BOOT_SERIAL_DETECT_STRING_LEN - 1); + buf[BOOT_SERIAL_DETECT_STRING_LEN - 1] = ch; + + /* If the full management string has been received, indicate that + * the serial boot loader should start. + */ + rc = memcmp(buf, + MYNEWT_VAL(BOOT_SERIAL_DETECT_STRING), + BOOT_SERIAL_DETECT_STRING_LEN); + if (rc == 0) { + boot_uart_close(); + return true; + } + } + + /* Abort the listen on timeout. */ + if (os_cputime_get32() >= start_tick + timeout_dur) { + boot_uart_close(); + return false; + } + } +} +#endif + +static void +serial_boot_detect(void) +{ + /* + * Read retained register and compare with expected magic value. + * If it matches, await for download commands from serial. + */ +#if MYNEWT_VAL(BOOT_SERIAL_NVREG_INDEX) != -1 + if (hal_nvreg_read(MYNEWT_VAL(BOOT_SERIAL_NVREG_INDEX)) == + MYNEWT_VAL(BOOT_SERIAL_NVREG_MAGIC)) { + + hal_nvreg_write(MYNEWT_VAL(BOOT_SERIAL_NVREG_INDEX), 0); + goto serial_boot; + } +#endif + + /* + * Configure a GPIO as input, and compare it against expected value. + * If it matches, await for download commands from serial. + */ +#if MYNEWT_VAL(BOOT_SERIAL_DETECT_PIN) != -1 + hal_gpio_init_in(MYNEWT_VAL(BOOT_SERIAL_DETECT_PIN), + MYNEWT_VAL(BOOT_SERIAL_DETECT_PIN_CFG)); + if (hal_gpio_read(MYNEWT_VAL(BOOT_SERIAL_DETECT_PIN)) == + MYNEWT_VAL(BOOT_SERIAL_DETECT_PIN_VAL)) { + goto serial_boot; + } +#endif + + /* + * Listen for management pattern in UART input. If detected, await for + * download commands from serial. + */ +#if MYNEWT_VAL(BOOT_SERIAL_DETECT_TIMEOUT) != 0 + if (serial_detect_uart_string()) { + goto serial_boot; + } +#endif + return; +serial_boot: + boot_uart_open(); + boot_serial_start(&boot_uart_funcs); + assert(0); +} +#endif + +/* + * Temporary flash_device_base() implementation. + * + * TODO: remove this when mynewt needs to support flash_device_base() + * for devices with nonzero base addresses. + */ +int flash_device_base(uint8_t fd_id, uintptr_t *ret) +{ + *ret = 0; + return 0; +} + +int +mynewt_main(void) +{ + struct boot_rsp rsp; + uintptr_t flash_base; + int rc; + fih_ret fih_rc = FIH_FAILURE; + + hal_bsp_init(); + +#if !MYNEWT_VAL(OS_SCHEDULING) && MYNEWT_VAL(WATCHDOG_INTERVAL) + rc = hal_watchdog_init(MYNEWT_VAL(WATCHDOG_INTERVAL)); + assert(rc == 0); +#endif + +#if defined(MCUBOOT_SERIAL) || defined(MCUBOOT_HAVE_LOGGING) || \ + MYNEWT_VAL(CRYPTO) || MYNEWT_VAL(HASH) || MYNEWT_VAL(BOOT_MYNEWT_SYSINIT) + /* initialize uart/crypto without os */ + os_dev_initialize_all(OS_DEV_INIT_PRIMARY); + os_dev_initialize_all(OS_DEV_INIT_SECONDARY); + sysinit(); + console_blocking_mode(); +#if defined(MCUBOOT_SERIAL) + serial_boot_detect(); + hal_timer_deinit(MYNEWT_VAL(OS_CPUTIME_TIMER_NUM)); +#endif +#else + flash_map_init(); +#endif + +#if MYNEWT_VAL(BOOT_PREBOOT) + boot_preboot(); +#endif + FIH_CALL(boot_go, fih_rc, &rsp); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + assert(fih_rc == FIH_SUCCESS); + FIH_PANIC; + } + + rc = flash_device_base(rsp.br_flash_dev_id, &flash_base); + assert(rc == 0); + +#if MYNEWT_VAL(BOOT_CUSTOM_START) + boot_custom_start(flash_base, &rsp); +#else + hal_bsp_deinit(); + hal_system_start((void *)(flash_base + rsp.br_image_off + + rsp.br_hdr->ih_hdr_size)); +#endif + + return 0; +} + +/* + * Mynewt startup code jump to mynewt_main() + * This function is here for compatibility with + * pre 1.12. mynewt-core that still wanted main() + */ +int +main(void) +{ + mynewt_main(); +} diff --git a/bootloader/mcuboot/boot/mynewt/src/single_loader.c b/bootloader/mcuboot/boot/mynewt/src/single_loader.c new file mode 100644 index 0000000..564d748 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/src/single_loader.c @@ -0,0 +1,136 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2020 Nordic Semiconductor ASA + * Copyright (c) 2020 Arm Limited + */ + +#include +#include "bootutil/image.h" +#include "../../../bootutil/src/bootutil_priv.h" +#include "bootutil/bootutil_log.h" +#include "bootutil/bootutil_public.h" +#include "bootutil/fault_injection_hardening.h" + +#include "mcuboot_config/mcuboot_config.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +/* Variables passed outside of unit via poiters. */ +static const struct flash_area *_fa_p; +static struct image_header _hdr = { 0 }; + +#if defined(MCUBOOT_VALIDATE_PRIMARY_SLOT) || defined(MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE) +/** + * Validate hash of a primary boot image. + * + * @param[in] fa_p flash area pointer + * @param[in] hdr boot image header pointer + * + * @return FIH_SUCCESS on success, error code otherwise + */ +fih_ret +boot_image_validate(const struct flash_area *fa_p, + struct image_header *hdr) +{ + static uint8_t tmpbuf[BOOT_TMPBUF_SZ]; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + /* NOTE: The first argument to boot_image_validate, for enc_state pointer, + * is allowed to be NULL only because the single image loader compiles + * with BOOT_IMAGE_NUMBER == 1, which excludes the code that uses + * the pointer from compilation. + */ + /* Validate hash */ + if (IS_ENCRYPTED(hdr)) + { + /* Clear the encrypted flag we didn't supply a key + * This flag could be set if there was a decryption in place + * was performed. We will try to validate the image, and if still + * encrypted the validation will fail, and go in panic mode + */ + hdr->ih_flags &= ~(ENCRYPTIONFLAGS); + } + FIH_CALL(bootutil_img_validate, fih_rc, NULL, 0, hdr, fa_p, tmpbuf, + BOOT_TMPBUF_SZ, NULL, 0, NULL); + + FIH_RET(fih_rc); +} +#endif /* MCUBOOT_VALIDATE_PRIMARY_SLOT || MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE*/ + +#if defined(MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE) +inline static fih_ret +boot_image_validate_once(const struct flash_area *fa_p, + struct image_header *hdr) +{ + static struct boot_swap_state state; + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + memset(&state, 0, sizeof(struct boot_swap_state)); + rc = boot_read_swap_state(fa_p, &state); + if (rc != 0) + FIH_RET(FIH_FAILURE); + if (state.magic != BOOT_MAGIC_GOOD + || state.image_ok != BOOT_FLAG_SET) { + /* At least validate the image once */ + FIH_CALL(boot_image_validate, fih_rc, fa_p, hdr); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_RET(FIH_FAILURE); + } + if (state.magic != BOOT_MAGIC_GOOD) { + rc = boot_write_magic(fa_p); + if (rc != 0) + FIH_RET(FIH_FAILURE); + } + rc = boot_write_image_ok(fa_p); + if (rc != 0) + FIH_RET(FIH_FAILURE); + } + FIH_RET(FIH_SUCCESS); +} +#endif + +/** + * Gather information on image and prepare for booting. + * + * @parami[out] rsp Parameters for booting image, on success + * + * @return FIH_SUCCESS on success; nonzero on failure. + */ +fih_ret +boot_go(struct boot_rsp *rsp) +{ + int rc = -1; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(0), &_fa_p); + assert(rc == 0); + + rc = boot_image_load_header(_fa_p, &_hdr); + if (rc != 0) + goto out; + +#ifdef MCUBOOT_VALIDATE_PRIMARY_SLOT + FIH_CALL(boot_image_validate, fih_rc, _fa_p, &_hdr); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + goto out; + } +#elif defined(MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE) + FIH_CALL(boot_image_validate_once, fih_rc, _fa_p, &_hdr); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + goto out; + } +#else + fih_rc = FIH_SUCCESS; +#endif /* MCUBOOT_VALIDATE_PRIMARY_SLOT */ + + rsp->br_flash_dev_id = flash_area_get_device_id(_fa_p); + rsp->br_image_off = flash_area_get_off(_fa_p); + rsp->br_hdr = &_hdr; + +out: + flash_area_close(_fa_p); + + FIH_RET(fih_rc); +} diff --git a/bootloader/mcuboot/boot/mynewt/syscfg.yml b/bootloader/mcuboot/boot/mynewt/syscfg.yml new file mode 100644 index 0000000..b4fdb77 --- /dev/null +++ b/bootloader/mcuboot/boot/mynewt/syscfg.yml @@ -0,0 +1,47 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +# Package: boot/mynewt + +syscfg.defs: + BOOT_LOADER: + description: 'Set to indicate that this app is a bootloader.' + value: 1 + BOOT_SERIAL: + description: 'Support image upgrade over serial within bootloader' + value: 0 + BOOT_CUSTOM_START: + description: 'Override hal_system_start with a custom start routine' + value: + BOOT_PREBOOT: + description: 'Call boot_preboot() function before booting application' + value: + BOOT_MYNEWT_SYSINIT: + description: > + When not 0 performs device initialization and calls newt + generated sysinit() function. + Note: this functionality is implicitly turned on when one of the + following settings are not 0: + MCUBOOT_SERIAL, MCUBOOT_HAVE_LOGGING, CRYPTO, HASH + value: 0 + +syscfg.vals: + SYSINIT_CONSTRAIN_INIT: 0 + OS_SCHEDULING: 0 + MSYS_1_BLOCK_COUNT: 0 + CONSOLE_COMPAT: 1 diff --git a/bootloader/mcuboot/boot/nuttx/include/flash_map_backend/flash_map_backend.h b/bootloader/mcuboot/boot/nuttx/include/flash_map_backend/flash_map_backend.h new file mode 100644 index 0000000..fb29f40 --- /dev/null +++ b/bootloader/mcuboot/boot/nuttx/include/flash_map_backend/flash_map_backend.h @@ -0,0 +1,449 @@ +/**************************************************************************** + * boot/nuttx/include/flash_map_backend/flash_map_backend.h + * + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************/ + +#ifndef __BOOT_NUTTX_INCLUDE_FLASH_MAP_BACKEND_FLASH_MAP_BACKEND_H +#define __BOOT_NUTTX_INCLUDE_FLASH_MAP_BACKEND_FLASH_MAP_BACKEND_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* Structure describing a flash area. */ + +struct flash_area +{ + /* MCUboot-API fields */ + + uint8_t fa_id; /* The slot/scratch ID */ + uint8_t fa_device_id; /* The device ID (usually there's only one) */ + uint16_t pad16; /* Padding */ + uint32_t fa_off; /* The flash offset from the beginning */ + uint32_t fa_size; /* The size of this sector */ + + /* NuttX implementation-specific fields */ + + const char *fa_mtd_path; /* Path for the MTD partition */ +}; + +/* Structure describing a sector within a flash area. */ + +struct flash_sector +{ + /* Offset of this sector, from the start of its flash area (not device). */ + + uint32_t fs_off; + + /* Size of this sector, in bytes. */ + + uint32_t fs_size; +}; + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: flash_area_get_id + * + * Description: + * Obtain the ID of a given flash area. + * + * Input Parameters: + * fa - Flash area. + * + * Returned Value: + * The ID of the requested flash area. + * + ****************************************************************************/ + +static inline uint8_t flash_area_get_id(const struct flash_area *fa) +{ + return fa->fa_id; +} + +/**************************************************************************** + * Name: flash_area_get_device_id + * + * Description: + * Obtain the ID of the device in which a given flash area resides on. + * + * Input Parameters: + * fa - Flash area. + * + * Returned Value: + * The device ID of the requested flash area. + * + ****************************************************************************/ + +static inline uint8_t flash_area_get_device_id(const struct flash_area *fa) +{ + return fa->fa_device_id; +} + +/**************************************************************************** + * Name: flash_area_get_sector + * + * Description: + * Retrieve the flash sector a given offset belongs to. + * + * Input Parameters: + * fap - flash area structure + * off - address offset. + * sector - flash sector + * + * Returned Value: + * Returns 0 on success, or an error code on failure. + * + ****************************************************************************/ + +int flash_area_get_sector(const struct flash_area *fap, off_t off, + struct flash_sector *fs); + +/**************************************************************************** + * Name: flash_area_get_off + * + * Description: + * Obtain the offset, from the beginning of a device, where a given flash + * area starts at. + * + * Input Parameters: + * fa - Flash area. + * + * Returned Value: + * The offset value of the requested flash area. + * + ****************************************************************************/ + +static inline uint32_t flash_area_get_off(const struct flash_area *fa) +{ + return fa->fa_off; +} + +/**************************************************************************** + * Name: flash_area_get_size + * + * Description: + * Obtain the size, from the offset, of a given flash area. + * + * Input Parameters: + * fa - Flash area. + * + * Returned Value: + * The size value of the requested flash area. + * + ****************************************************************************/ + +static inline uint32_t flash_area_get_size(const struct flash_area *fa) +{ + return fa->fa_size; +} + +/**************************************************************************** + * Name: flash_sector_get_off + * + * Description: + * Obtain the offset, from the beginning of its flash area, where a given + * flash sector starts at. + * + * Input Parameters: + * fs - Flash sector. + * + * Returned Value: + * The offset value of the requested flash sector. + * + ****************************************************************************/ + +static inline uint32_t flash_sector_get_off(const struct flash_sector *fs) +{ + return fs->fs_off; +} + +/**************************************************************************** + * Name: flash_sector_get_size + * + * Description: + * Obtain the size, from the offset, of a given flash sector. + * + * Input Parameters: + * fs - Flash sector. + * + * Returned Value: + * The size in bytes of the requested flash sector. + * + ****************************************************************************/ + +static inline uint32_t flash_sector_get_size(const struct flash_sector *fs) +{ + return fs->fs_size; +} + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: flash_area_open + * + * Description: + * Retrieve flash area from the flash map for a given partition. + * + * Input Parameters: + * id - ID of the flash partition. + * + * Output Parameters: + * fa - Pointer which will contain the reference to flash_area. + * If ID is unknown, it will be NULL on output. + * + * Returned Value: + * Zero on success, or negative value in case of error. + * + ****************************************************************************/ + +int flash_area_open(uint8_t id, const struct flash_area **fa); + +/**************************************************************************** + * Name: flash_area_close + * + * Description: + * Close a given flash area. + * + * Input Parameters: + * fa - Flash area to be closed. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void flash_area_close(const struct flash_area *fa); + +/**************************************************************************** + * Name: flash_area_read + * + * Description: + * Read data from flash area. + * Area readout boundaries are asserted before read request. API has the + * same limitation regarding read-block alignment and size as the + * underlying flash driver. + * + * Input Parameters: + * fa - Flash area to be read. + * off - Offset relative from beginning of flash area to be read. + * len - Number of bytes to read. + * + * Output Parameters: + * dst - Buffer to store read data. + * + * Returned Value: + * Zero on success, or negative value in case of error. + * + ****************************************************************************/ + +int flash_area_read(const struct flash_area *fa, uint32_t off, + void *dst, uint32_t len); + +/**************************************************************************** + * Name: flash_area_write + * + * Description: + * Write data to flash area. + * Area write boundaries are asserted before write request. API has the + * same limitation regarding write-block alignment and size as the + * underlying flash driver. + * + * Input Parameters: + * fa - Flash area to be written. + * off - Offset relative from beginning of flash area to be written. + * src - Buffer with data to be written. + * len - Number of bytes to write. + * + * Returned Value: + * Zero on success, or negative value in case of error. + * + ****************************************************************************/ + +int flash_area_write(const struct flash_area *fa, uint32_t off, + const void *src, uint32_t len); + +/**************************************************************************** + * Name: flash_area_erase + * + * Description: + * Erase a given flash area range. + * Area boundaries are asserted before erase request. API has the same + * limitation regarding erase-block alignment and size as the underlying + * flash driver. + * + * Input Parameters: + * fa - Flash area to be erased. + * off - Offset relative from beginning of flash area to be erased. + * len - Number of bytes to be erase. + * + * Returned Value: + * Zero on success, or negative value in case of error. + * + ****************************************************************************/ + +int flash_area_erase(const struct flash_area *fa, uint32_t off, + uint32_t len); + +/**************************************************************************** + * Name: flash_area_align + * + * Description: + * Get write block size of the flash area. + * Write block size might be treated as read block size, although most + * drivers support unaligned readout. + * + * Input Parameters: + * fa - Flash area. + * + * Returned Value: + * Alignment restriction for flash writes in the given flash area. + * + ****************************************************************************/ + +uint32_t flash_area_align(const struct flash_area *fa); + +/**************************************************************************** + * Name: flash_area_erased_val + * + * Description: + * Get the value expected to be read when accessing any erased flash byte. + * This API is compatible with the MCUboot's porting layer. + * + * Input Parameters: + * fa - Flash area. + * + * Returned Value: + * Byte value of erased memory. + * + ****************************************************************************/ + +uint8_t flash_area_erased_val(const struct flash_area *fa); + +/**************************************************************************** + * Name: flash_area_get_sectors + * + * Description: + * Retrieve info about sectors within the area. + * + * Input Parameters: + * fa_id - ID of the flash area whose info will be retrieved. + * count - On input, represents the capacity of the sectors buffer. + * + * Output Parameters: + * count - On output, it shall contain the number of retrieved sectors. + * sectors - Buffer for sectors data. + * + * Returned Value: + * Zero on success, or negative value in case of error. + * + ****************************************************************************/ + +int flash_area_get_sectors(int fa_id, uint32_t *count, + struct flash_sector *sectors); + +/**************************************************************************** + * Name: flash_area_id_from_multi_image_slot + * + * Description: + * Return the flash area ID for a given slot and a given image index + * (in case of a multi-image setup). + * + * Input Parameters: + * image_index - Index of the image. + * slot - Image slot, which may be 0 (primary) or 1 (secondary). + * + * Returned Value: + * Flash area ID (0 or 1), or negative value in case the requested slot + * is invalid. + * + ****************************************************************************/ + +int flash_area_id_from_multi_image_slot(int image_index, int slot); + +/**************************************************************************** + * Name: flash_area_id_from_image_slot + * + * Description: + * Return the flash area ID for a given slot. + * + * Input Parameters: + * slot - Image slot, which may be 0 (primary) or 1 (secondary). + * + * Returned Value: + * Flash area ID (0 or 1), or negative value in case the requested slot + * is invalid. + * + ****************************************************************************/ + +int flash_area_id_from_image_slot(int slot); + +/**************************************************************************** + * Name: flash_area_id_to_multi_image_slot + * + * Description: + * Convert the specified flash area ID and image index (in case of a + * multi-image setup) to an image slot index. + * + * Input Parameters: + * image_index - Index of the image. + * area_id - Unique identifier that is represented by fa_id in the + * flash_area struct. + * Returned Value: + * Image slot index (0 or 1), or negative value in case ID doesn't + * correspond to an image slot. + * + ****************************************************************************/ + +int flash_area_id_to_multi_image_slot(int image_index, int area_id); + +/**************************************************************************** + * Name: flash_area_id_from_image_offset + * + * Description: + * Return the flash area ID for a given image offset. + * + * Input Parameters: + * offset - Image offset. + * + * Returned Value: + * Flash area ID (0 or 1), or negative value in case the requested offset + * is invalid. + * + ****************************************************************************/ + +int flash_area_id_from_image_offset(uint32_t offset); + +#ifdef __cplusplus +} +#endif + +#endif /* __BOOT_NUTTX_INCLUDE_FLASH_MAP_BACKEND_FLASH_MAP_BACKEND_H */ diff --git a/bootloader/mcuboot/boot/nuttx/include/mcuboot_config/mcuboot_config.h b/bootloader/mcuboot/boot/nuttx/include/mcuboot_config/mcuboot_config.h new file mode 100644 index 0000000..41e7d67 --- /dev/null +++ b/bootloader/mcuboot/boot/nuttx/include/mcuboot_config/mcuboot_config.h @@ -0,0 +1,212 @@ +/**************************************************************************** + * boot/nuttx/include/mcuboot_config/mcuboot_config.h + * + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************/ + +#ifndef __BOOT_NUTTX_INCLUDE_MCUBOOT_CONFIG_MCUBOOT_CONFIG_H +#define __BOOT_NUTTX_INCLUDE_MCUBOOT_CONFIG_MCUBOOT_CONFIG_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifdef CONFIG_MCUBOOT_WATCHDOG +# include "watchdog/watchdog.h" +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Signature types + * + * You must choose exactly one signature type. + */ + +/* Uncomment for RSA signature support */ + +/* #define MCUBOOT_SIGN_RSA */ + +/* Uncomment for ECDSA signatures using curve P-256. */ + +/* #define MCUBOOT_SIGN_EC256 */ + +/* Upgrade mode + * + * The default is to support A/B image swapping with rollback. Other modes + * with simpler code path, which only supports overwriting the existing image + * with the update image or running the newest image directly from its flash + * partition, are also available. + * + * You can enable only one mode at a time from the list below to override + * the default upgrade mode. + */ + +/* Use image swap without using scratch area.*/ + +#ifdef CONFIG_MCUBOOT_SWAP_USING_MOVE +# define MCUBOOT_SWAP_USING_MOVE 1 +#endif + +/* Enable the overwrite-only code path. */ + +#ifdef CONFIG_MCUBOOT_OVERWRITE_ONLY +# define MCUBOOT_OVERWRITE_ONLY +#endif + +/* Only erase and overwrite those primary slot sectors needed + * to install the new image, rather than the entire image slot. + */ + +#ifdef CONFIG_MCUBOOT_OVERWRITE_ONLY_FAST +# define MCUBOOT_OVERWRITE_ONLY_FAST +#endif + +/* Enable the direct-xip code path. */ + +#ifdef CONFIG_MCUBOOT_DIRECT_XIP +# define MCUBOOT_DIRECT_XIP +#endif + +/* Enable the revert mechanism in direct-xip mode. */ + +#ifdef CONFIG_MCUBOOT_DIRECT_XIP_REVERT +# define MCUBOOT_DIRECT_XIP_REVERT +#endif + +/* Enable the ram-load code path. */ + +#ifdef CONFIG_MCUBOOT_RAM_LOAD +# define MCUBOOT_RAM_LOAD +#endif + +/* Enable bootstrapping the erased primary slot from the secondary slot */ + +#ifdef CONFIG_MCUBOOT_BOOTSTRAP +# define MCUBOOT_BOOTSTRAP +#endif + +/* Cryptographic settings + * + * You must choose between mbedTLS and Tinycrypt as source of + * cryptographic primitives. Other cryptographic settings are also + * available. + */ + +#ifdef CONFIG_MCUBOOT_USE_MBED_TLS +# define MCUBOOT_USE_MBED_TLS +#endif + +#ifdef CONFIG_MCUBOOT_USE_TINYCRYPT +# define MCUBOOT_USE_TINYCRYPT +#endif + +/* Always check the signature of the image in the primary slot before + * booting, even if no upgrade was performed. This is recommended if the boot + * time penalty is acceptable. + */ + +#define MCUBOOT_VALIDATE_PRIMARY_SLOT + +/* Flash abstraction */ + +/* Uncomment if your flash map API supports flash_area_get_sectors(). + * See the flash APIs for more details. + */ + +#define MCUBOOT_USE_FLASH_AREA_GET_SECTORS + +/* Default maximum number of flash sectors per image slot; change + * as desirable. + */ + +#define MCUBOOT_MAX_IMG_SECTORS 512 + +/* Default number of separately updateable images; change in case of + * multiple images. + */ + +#define MCUBOOT_IMAGE_NUMBER 1 + +/* Logging */ + +/* If logging is enabled the following functions must be defined by the + * platform: + * + * MCUBOOT_LOG_MODULE_REGISTER(domain) + * Register a new log module and add the current C file to it. + * + * MCUBOOT_LOG_MODULE_DECLARE(domain) + * Add the current C file to an existing log module. + * + * MCUBOOT_LOG_ERR(...) + * MCUBOOT_LOG_WRN(...) + * MCUBOOT_LOG_INF(...) + * MCUBOOT_LOG_DBG(...) + * + * The function priority is: + * + * MCUBOOT_LOG_ERR > MCUBOOT_LOG_WRN > MCUBOOT_LOG_INF > MCUBOOT_LOG_DBG + */ + +#ifdef CONFIG_MCUBOOT_ENABLE_LOGGING +# define MCUBOOT_HAVE_LOGGING +#endif + +/* Assertions */ + +/* Uncomment if your platform has its own mcuboot_config/mcuboot_assert.h. + * If so, it must provide an ASSERT macro for use by bootutil. Otherwise, + * "assert" is used. + */ + +/* #define MCUBOOT_HAVE_ASSERT_H 1 */ + +/* Watchdog feeding */ + +/* This macro might be implemented if the OS / HW watchdog is enabled while + * doing a swap upgrade and the time it takes for a swapping is long enough + * to cause an unwanted reset. If implementing this, the OS main.c must also + * enable the watchdog (if required)! + */ + +#ifdef CONFIG_MCUBOOT_WATCHDOG + +#ifndef CONFIG_MCUBOOT_WATCHDOG_DEVPATH +# define CONFIG_MCUBOOT_WATCHDOG_DEVPATH "/dev/watchdog0" +#endif + +#ifndef CONFIG_MCUBOOT_WATCHDOG_TIMEOUT +# define CONFIG_MCUBOOT_WATCHDOG_TIMEOUT 10000 /* Watchdog timeout in ms */ +#endif + +# define MCUBOOT_WATCHDOG_FEED() do \ + { \ + mcuboot_watchdog_feed(); \ + } \ + while (0) + +#else +# define MCUBOOT_WATCHDOG_FEED() do \ + { \ + } \ + while (0) +#endif + +#endif /* __BOOT_NUTTX_INCLUDE_MCUBOOT_CONFIG_MCUBOOT_CONFIG_H */ diff --git a/bootloader/mcuboot/boot/nuttx/include/mcuboot_config/mcuboot_logging.h b/bootloader/mcuboot/boot/nuttx/include/mcuboot_config/mcuboot_logging.h new file mode 100644 index 0000000..a2ccce0 --- /dev/null +++ b/bootloader/mcuboot/boot/nuttx/include/mcuboot_config/mcuboot_logging.h @@ -0,0 +1,48 @@ +/**************************************************************************** + * boot/nuttx/include/mcuboot_config/mcuboot_logging.h + * + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************/ + +#ifndef __BOOT_NUTTX_INCLUDE_MCUBOOT_CONFIG_MCUBOOT_LOGGING_H +#define __BOOT_NUTTX_INCLUDE_MCUBOOT_CONFIG_MCUBOOT_LOGGING_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define MCUBOOT_LOG_MODULE_DECLARE(...) +#define MCUBOOT_LOG_MODULE_REGISTER(...) + +#define MCUBOOT_LOG_ERR(format, ...) \ + syslog(LOG_ERR, "%s: " format "\n", __FUNCTION__, ##__VA_ARGS__) + +#define MCUBOOT_LOG_WRN(format, ...) \ + syslog(LOG_WARNING, "%s: " format "\n", __FUNCTION__, ##__VA_ARGS__) + +#define MCUBOOT_LOG_INF(format, ...) \ + syslog(LOG_INFO, "%s: " format "\n", __FUNCTION__, ##__VA_ARGS__) + +#define MCUBOOT_LOG_DBG(format, ...) \ + syslog(LOG_DEBUG, "%s: " format "\n", __FUNCTION__, ##__VA_ARGS__) + +#endif /* __BOOT_NUTTX_INCLUDE_MCUBOOT_CONFIG_MCUBOOT_LOGGING_H */ diff --git a/bootloader/mcuboot/boot/nuttx/include/os/os_malloc.h b/bootloader/mcuboot/boot/nuttx/include/os/os_malloc.h new file mode 100644 index 0000000..1fbefad --- /dev/null +++ b/bootloader/mcuboot/boot/nuttx/include/os/os_malloc.h @@ -0,0 +1,29 @@ +/**************************************************************************** + * boot/nuttx/include/os/os_malloc.h + * + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************/ + +#ifndef __BOOT_NUTTX_INCLUDE_OS_OS_MALLOC_H +#define __BOOT_NUTTX_INCLUDE_OS_OS_MALLOC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#endif /* __BOOT_NUTTX_INCLUDE_OS_OS_MALLOC_H */ diff --git a/bootloader/mcuboot/boot/nuttx/include/sysflash/sysflash.h b/bootloader/mcuboot/boot/nuttx/include/sysflash/sysflash.h new file mode 100644 index 0000000..304ca0c --- /dev/null +++ b/bootloader/mcuboot/boot/nuttx/include/sysflash/sysflash.h @@ -0,0 +1,39 @@ +/**************************************************************************** + * boot/nuttx/include/sysflash/sysflash.h + * + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************/ + +#ifndef __BOOT_NUTTX_INCLUDE_SYSFLASH_SYSFLASH_H +#define __BOOT_NUTTX_INCLUDE_SYSFLASH_SYSFLASH_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define PRIMARY_ID 0 +#define SECONDARY_ID 1 +#define SCRATCH_ID 2 + +#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? \ + PRIMARY_ID : \ + PRIMARY_ID) +#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? \ + SECONDARY_ID : \ + SECONDARY_ID) +#define FLASH_AREA_IMAGE_SCRATCH SCRATCH_ID + +#endif /* __BOOT_NUTTX_INCLUDE_SYSFLASH_SYSFLASH_H */ diff --git a/bootloader/mcuboot/boot/nuttx/include/watchdog/watchdog.h b/bootloader/mcuboot/boot/nuttx/include/watchdog/watchdog.h new file mode 100644 index 0000000..b75b7f6 --- /dev/null +++ b/bootloader/mcuboot/boot/nuttx/include/watchdog/watchdog.h @@ -0,0 +1,65 @@ +/**************************************************************************** + * boot/nuttx/include/watchdog/watchdog.h + * + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************/ + +#ifndef __BOOT_NUTTX_INCLUDE_WATCHDOG_WATCHDOG_H +#define __BOOT_NUTTX_INCLUDE_WATCHDOG_WATCHDOG_H + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: mcuboot_watchdog_feed + * + * Description: + * Reset the watchdog timer to the current timeout value, preventing any + * imminent watchdog timeouts. + * + * Input Parameters: + * None. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void mcuboot_watchdog_feed(void); + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: mcuboot_watchdog_init + * + * Description: + * Initialize the watchdog timer by setting the trigger timeout and + * starting it. + * + * Input Parameters: + * None. + * + * Returned Value: + * OK on success, ERROR if not. + * + ****************************************************************************/ + +int mcuboot_watchdog_init(void); + +#endif /* __BOOT_NUTTX_INCLUDE_WATCHDOG_WATCHDOG_H */ diff --git a/bootloader/mcuboot/boot/nuttx/main.c b/bootloader/mcuboot/boot/nuttx/main.c new file mode 100644 index 0000000..4460546 --- /dev/null +++ b/bootloader/mcuboot/boot/nuttx/main.c @@ -0,0 +1,137 @@ +/**************************************************************************** + * boot/nuttx/main.c + * + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include +#include + +#include "flash_map_backend/flash_map_backend.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Should we perform board-specific driver initialization? There are two + * ways that board initialization can occur: 1) automatically via + * board_late_initialize() during bootupif CONFIG_BOARD_LATE_INITIALIZE + * or 2). + * via a call to boardctl() if the interface is enabled + * (CONFIG_BOARDCTL=y). + * If this task is running as an NSH built-in application, then that + * initialization has probably already been performed otherwise we do it + * here. + */ + +#undef NEED_BOARDINIT + +#if defined(CONFIG_BOARDCTL) && !defined(CONFIG_NSH_ARCHINIT) +# define NEED_BOARDINIT 1 +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * do_boot + ****************************************************************************/ + +static void do_boot(struct boot_rsp *rsp) +{ + const struct flash_area *flash_area; + struct boardioc_boot_info_s info; + int area_id; + int ret; + + area_id = flash_area_id_from_image_offset(rsp->br_image_off); + + ret = flash_area_open(area_id, &flash_area); + assert(ret == OK); + + syslog(LOG_INFO, "Booting from %s...\n", flash_area->fa_mtd_path); + + info.path = flash_area->fa_mtd_path; + info.header_size = rsp->br_hdr->ih_hdr_size; + + flash_area_close(flash_area); + + if (boardctl(BOARDIOC_BOOT_IMAGE, (uintptr_t)&info) != OK) + { + syslog(LOG_ERR, "Failed to load application image!\n"); + FIH_PANIC; + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * main + ****************************************************************************/ + +int main(int argc, FAR char *argv[]) +{ + struct boot_rsp rsp; + FIH_DECLARE(fih_rc, FIH_FAILURE); + +#ifdef NEED_BOARDINIT + /* Perform architecture-specific initialization (if configured) */ + + boardctl(BOARDIOC_INIT, 0); + +#ifdef CONFIG_BOARDCTL_FINALINIT + /* Perform architecture-specific final-initialization (if configured) */ + + boardctl(BOARDIOC_FINALINIT, 0); +#endif +#endif + + syslog(LOG_INFO, "*** Booting MCUboot build %s ***\n", CONFIG_MCUBOOT_VERSION); + +#ifdef CONFIG_MCUBOOT_WATCHDOG + int ret = mcuboot_watchdog_init(); + if (ret < 0) + { + syslog(LOG_ERR, "Unable to initialize the watchdog timer\n"); + FIH_PANIC; + } +#endif + + FIH_CALL(boot_go, fih_rc, &rsp); + + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) + { + syslog(LOG_ERR, "Unable to find bootable image\n"); + FIH_PANIC; + } + + do_boot(&rsp); + + while (1); +} diff --git a/bootloader/mcuboot/boot/nuttx/src/flash_map_backend/flash_map_backend.c b/bootloader/mcuboot/boot/nuttx/src/flash_map_backend/flash_map_backend.c new file mode 100644 index 0000000..ae3ec64 --- /dev/null +++ b/bootloader/mcuboot/boot/nuttx/src/flash_map_backend/flash_map_backend.c @@ -0,0 +1,844 @@ +/**************************************************************************** + * boot/nuttx/src/flash_map_backend/flash_map_backend.c + * + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include "flash_map_backend/flash_map_backend.h" +#include "os/os_malloc.h" +#include "sysflash/sysflash.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0])) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct flash_device_s +{ + /* Reference to the flash area configuration parameters */ + + struct flash_area *fa_cfg; + + /* Geometry characteristics of the underlying MTD device */ + + struct mtd_geometry_s mtdgeo; + + /* Partition information */ + + struct partition_info_s partinfo; + + int fd; /* File descriptor for an open flash area */ + uint32_t refs; /* Reference counter */ + uint8_t erase_state; /* Byte value of the flash erased state */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct flash_area g_primary_img0 = +{ + .fa_id = FLASH_AREA_IMAGE_PRIMARY(0), + .fa_device_id = 0, + .fa_off = 0, + .fa_size = 0, + .fa_mtd_path = CONFIG_MCUBOOT_PRIMARY_SLOT_PATH +}; + +static struct flash_device_s g_primary_priv = +{ + .fa_cfg = &g_primary_img0, + .mtdgeo = + { + 0 + }, + .partinfo = + { + 0 + }, + .fd = -1, + .refs = 0, + .erase_state = CONFIG_MCUBOOT_DEFAULT_FLASH_ERASE_STATE +}; + +static struct flash_area g_secondary_img0 = +{ + .fa_id = FLASH_AREA_IMAGE_SECONDARY(0), + .fa_device_id = 0, + .fa_off = 0, + .fa_size = 0, + .fa_mtd_path = CONFIG_MCUBOOT_SECONDARY_SLOT_PATH +}; + +static struct flash_device_s g_secondary_priv = +{ + .fa_cfg = &g_secondary_img0, + .mtdgeo = + { + 0 + }, + .partinfo = + { + 0 + }, + .fd = -1, + .refs = 0, + .erase_state = CONFIG_MCUBOOT_DEFAULT_FLASH_ERASE_STATE +}; + +static struct flash_area g_scratch_img0 = +{ + .fa_id = FLASH_AREA_IMAGE_SCRATCH, + .fa_device_id = 0, + .fa_off = 0, + .fa_size = 0, + .fa_mtd_path = CONFIG_MCUBOOT_SCRATCH_PATH +}; + +static struct flash_device_s g_scratch_priv = +{ + .fa_cfg = &g_scratch_img0, + .mtdgeo = + { + 0 + }, + .partinfo = + { + 0 + }, + .fd = -1, + .refs = 0, + .erase_state = CONFIG_MCUBOOT_DEFAULT_FLASH_ERASE_STATE +}; + +static struct flash_device_s *g_flash_devices[] = +{ + &g_primary_priv, + &g_secondary_priv, + &g_scratch_priv, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lookup_flash_device_by_id + * + * Description: + * Retrieve flash device from a given flash area ID. + * + * Input Parameters: + * fa_id - ID of the flash area. + * + * Returned Value: + * Reference to the found flash device, or NULL in case it does not exist. + * + ****************************************************************************/ + +static struct flash_device_s *lookup_flash_device_by_id(uint8_t fa_id) +{ + size_t i; + + for (i = 0; i < ARRAYSIZE(g_flash_devices); i++) + { + struct flash_device_s *dev = g_flash_devices[i]; + + if (fa_id == dev->fa_cfg->fa_id) + { + return dev; + } + } + + return NULL; +} + +/**************************************************************************** + * Name: lookup_flash_device_by_offset + * + * Description: + * Retrieve flash device from a given flash area offset. + * + * Input Parameters: + * offset - Offset of the flash area. + * + * Returned Value: + * Reference to the found flash device, or NULL in case it does not exist. + * + ****************************************************************************/ + +static struct flash_device_s *lookup_flash_device_by_offset(uint32_t offset) +{ + size_t i; + + for (i = 0; i < ARRAYSIZE(g_flash_devices); i++) + { + struct flash_device_s *dev = g_flash_devices[i]; + + if (offset == dev->fa_cfg->fa_off) + { + return dev; + } + } + + return NULL; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: flash_area_open + * + * Description: + * Retrieve flash area from the flash map for a given ID. + * + * Input Parameters: + * id - ID of the flash area. + * + * Output Parameters: + * fa - Pointer which will contain the reference to flash_area. + * If ID is unknown, it will be NULL on output. + * + * Returned Value: + * Zero on success, or negative value in case of error. + * + ****************************************************************************/ + +int flash_area_open(uint8_t id, const struct flash_area **fa) +{ + struct flash_device_s *dev; + int fd; + int ret; + + BOOT_LOG_INF("ID:%" PRIu8, id); + + dev = lookup_flash_device_by_id(id); + if (dev == NULL) + { + BOOT_LOG_ERR("Undefined flash area: %" PRIu8, id); + + return ERROR; + } + + *fa = dev->fa_cfg; + + if (dev->refs++ > 0) + { + BOOT_LOG_INF("Flash area ID %" PRIu8 " already open, count: %" PRIu32 " (+)", + id, dev->refs); + + return OK; + } + + fd = open(dev->fa_cfg->fa_mtd_path, O_RDWR); + if (fd < 0) + { + int errcode = errno; + + BOOT_LOG_ERR("Error opening MTD device: %d", errcode); + + goto errout; + } + + ret = ioctl(fd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&dev->mtdgeo)); + if (ret < 0) + { + int errcode = errno; + + BOOT_LOG_ERR("Error retrieving MTD device geometry: %d", errcode); + + goto errout_with_fd; + } + + ret = ioctl(fd, BIOC_PARTINFO, (unsigned long)((uintptr_t)&dev->partinfo)); + if (ret < 0) + { + int errcode = errno; + + BOOT_LOG_ERR("Error retrieving MTD partition info: %d", errcode); + + goto errout_with_fd; + } + + ret = ioctl(fd, MTDIOC_ERASESTATE, + (unsigned long)((uintptr_t)&dev->erase_state)); + if (ret < 0) + { + int errcode = errno; + + BOOT_LOG_ERR("Error retrieving MTD device erase state: %d", errcode); + + goto errout_with_fd; + } + + dev->fa_cfg->fa_off = dev->partinfo.startsector * dev->partinfo.sectorsize; + dev->fa_cfg->fa_size = dev->partinfo.numsectors * dev->partinfo.sectorsize; + + BOOT_LOG_INF("Flash area offset: 0x%" PRIx32, dev->fa_cfg->fa_off); + BOOT_LOG_INF("Flash area size: %" PRIu32, dev->fa_cfg->fa_size); + BOOT_LOG_INF("MTD erase state: 0x%" PRIx8, dev->erase_state); + + dev->fd = fd; + + BOOT_LOG_INF("Flash area %" PRIu8 " open, count: %" PRIu32 " (+)", id, dev->refs); + + return OK; + +errout_with_fd: + close(fd); + +errout: + --dev->refs; + + return ERROR; +} + +/**************************************************************************** + * Name: flash_area_close + * + * Description: + * Close a given flash area. + * + * Input Parameters: + * fa - Flash area to be closed. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void flash_area_close(const struct flash_area *fa) +{ + BOOT_LOG_INF("ID:%" PRIu8, fa->fa_id); + + struct flash_device_s *dev = lookup_flash_device_by_id(fa->fa_id); + + DEBUGASSERT(dev != NULL); + + if (dev->refs == 0) + { + /* No need to close an unopened flash area, avoid an overflow of the + * counter. + */ + + return; + } + + BOOT_LOG_INF("Close request for flash area %" PRIu8 ", count: %" PRIu32 " (-)", + fa->fa_id, dev->refs); + + if (--dev->refs == 0) + { + close(dev->fd); + dev->fd = -1; + + BOOT_LOG_INF("Flash area %" PRIu8 " closed", fa->fa_id); + } +} + +/**************************************************************************** + * Name: flash_area_read + * + * Description: + * Read data from flash area. + * Area readout boundaries are asserted before read request. API has the + * same limitation regarding read-block alignment and size as the + * underlying flash driver. + * + * Input Parameters: + * fa - Flash area to be read. + * off - Offset relative from beginning of flash area to be read. + * len - Number of bytes to read. + * + * Output Parameters: + * dst - Buffer to store read data. + * + * Returned Value: + * Zero on success, or negative value in case of error. + * + ****************************************************************************/ + +int flash_area_read(const struct flash_area *fa, uint32_t off, + void *dst, uint32_t len) +{ + struct flash_device_s *dev; + off_t seekpos; + ssize_t nbytes; + + BOOT_LOG_INF("ID:%" PRIu8 " offset:%" PRIu32 " length:%" PRIu32, + fa->fa_id, off, len); + + dev = lookup_flash_device_by_id(fa->fa_id); + + DEBUGASSERT(dev != NULL); + + if (off + len > fa->fa_size) + { + BOOT_LOG_ERR("Attempt to read out of flash area bounds"); + + return ERROR; + } + + /* Reposition the file offset from the beginning of the flash area */ + + seekpos = lseek(dev->fd, (off_t)off, SEEK_SET); + if (seekpos != (off_t)off) + { + int errcode = errno; + + BOOT_LOG_ERR("Seek to offset %" PRIu32 " failed: %d", off, errcode); + + return ERROR; + } + + /* Read the flash block into memory */ + + nbytes = read(dev->fd, dst, len); + if (nbytes < 0) + { + int errcode = errno; + + BOOT_LOG_ERR("Read from %s failed: %d", fa->fa_mtd_path, errcode); + + return ERROR; + } + + return OK; +} + +/**************************************************************************** + * Name: flash_area_write + * + * Description: + * Write data to flash area. + * Area write boundaries are asserted before write request. API has the + * same limitation regarding write-block alignment and size as the + * underlying flash driver. + * + * Input Parameters: + * fa - Flash area to be written. + * off - Offset relative from beginning of flash area to be written. + * src - Buffer with data to be written. + * len - Number of bytes to write. + * + * Returned Value: + * Zero on success, or negative value in case of error. + * + ****************************************************************************/ + +int flash_area_write(const struct flash_area *fa, uint32_t off, + const void *src, uint32_t len) +{ + struct flash_device_s *dev; + off_t seekpos; + ssize_t nbytes; + + BOOT_LOG_INF("ID:%" PRIu8 " offset:%" PRIu32 " length:%" PRIu32, + fa->fa_id, off, len); + + dev = lookup_flash_device_by_id(fa->fa_id); + + DEBUGASSERT(dev != NULL); + + if (off + len > fa->fa_size) + { + BOOT_LOG_ERR("Attempt to write out of flash area bounds"); + + return ERROR; + } + + /* Reposition the file offset from the beginning of the flash area */ + + seekpos = lseek(dev->fd, (off_t)off, SEEK_SET); + if (seekpos != (off_t)off) + { + int errcode = errno; + + BOOT_LOG_ERR("Seek to offset %" PRIu32 " failed: %d", off, errcode); + + return ERROR; + } + + /* Write the buffer to the flash block */ + + nbytes = write(dev->fd, src, len); + if (nbytes < 0) + { + int errcode = errno; + + BOOT_LOG_ERR("Write to %s failed: %d", fa->fa_mtd_path, errcode); + + return ERROR; + } + + return OK; +} + +/**************************************************************************** + * Name: flash_area_erase + * + * Description: + * Erase a given flash area range. + * Area boundaries are asserted before erase request. API has the same + * limitation regarding erase-block alignment and size as the underlying + * flash driver. + * + * Input Parameters: + * fa - Flash area to be erased. + * off - Offset relative from beginning of flash area to be erased. + * len - Number of bytes to be erase. + * + * Returned Value: + * Zero on success, or negative value in case of error. + * + ****************************************************************************/ + +int flash_area_erase(const struct flash_area *fa, uint32_t off, uint32_t len) +{ + int ret; + void *buffer; + size_t i; + struct flash_device_s *dev = lookup_flash_device_by_id(fa->fa_id); + const size_t sector_size = dev->mtdgeo.erasesize; + const uint8_t erase_val = dev->erase_state; + + BOOT_LOG_INF("ID:%" PRIu8 " offset:%" PRIu32 " length:%" PRIu32, + fa->fa_id, off, len); + + buffer = malloc(sector_size); + if (buffer == NULL) + { + BOOT_LOG_ERR("Failed to allocate erase buffer"); + + return ERROR; + } + + memset(buffer, erase_val, sector_size); + + i = 0; + + do + { + BOOT_LOG_DBG("Erasing %zu bytes at offset %" PRIu32, + sector_size, off + i); + + ret = flash_area_write(fa, off + i, buffer, sector_size); + i += sector_size; + } + while (ret == OK && i < (len - sector_size)); + + if (ret == OK) + { + BOOT_LOG_DBG("Erasing %" PRIu32 " bytes at offset %" PRIu32, + len - i, off + i); + + ret = flash_area_write(fa, off + i, buffer, len - i); + } + + free(buffer); + + return ret; +} + +/**************************************************************************** + * Name: flash_area_align + * + * Description: + * Get write block size of the flash area. + * Write block size might be treated as read block size, although most + * drivers support unaligned readout. + * + * Input Parameters: + * fa - Flash area. + * + * Returned Value: + * Alignment restriction for flash writes in the given flash area. + * + ****************************************************************************/ + +uint32_t flash_area_align(const struct flash_area *fa) +{ + /* MTD access alignment is handled by the character and block device + * drivers. + */ + + const uint32_t minimum_write_length = 1; + + BOOT_LOG_INF("ID:%" PRIu8 " align:%" PRIu32, + fa->fa_id, minimum_write_length); + + return minimum_write_length; +} + +/**************************************************************************** + * Name: flash_area_erased_val + * + * Description: + * Get the value expected to be read when accessing any erased flash byte. + * This API is compatible with the MCUboot's porting layer. + * + * Input Parameters: + * fa - Flash area. + * + * Returned Value: + * Byte value of erased memory. + * + ****************************************************************************/ + +uint8_t flash_area_erased_val(const struct flash_area *fa) +{ + struct flash_device_s *dev; + uint8_t erased_val; + + dev = lookup_flash_device_by_id(fa->fa_id); + + DEBUGASSERT(dev != NULL); + + erased_val = dev->erase_state; + + BOOT_LOG_INF("ID:%" PRIu8 " erased_val:0x%" PRIx8, fa->fa_id, erased_val); + + return erased_val; +} + +/**************************************************************************** + * Name: flash_area_get_sectors + * + * Description: + * Retrieve info about sectors within the area. + * + * Input Parameters: + * fa_id - ID of the flash area whose info will be retrieved. + * count - On input, represents the capacity of the sectors buffer. + * + * Output Parameters: + * count - On output, it shall contain the number of retrieved sectors. + * sectors - Buffer for sectors data. + * + * Returned Value: + * Zero on success, or negative value in case of error. + * + ****************************************************************************/ + +int flash_area_get_sectors(int fa_id, uint32_t *count, + struct flash_sector *sectors) +{ + size_t off; + uint32_t total_count = 0; + struct flash_device_s *dev = lookup_flash_device_by_id(fa_id); + const size_t sector_size = dev->mtdgeo.erasesize; + const struct flash_area *fa = fa = dev->fa_cfg; + + for (off = 0; off < fa->fa_size; off += sector_size) + { + /* Note: Offset here is relative to flash area, not device */ + + sectors[total_count].fs_off = off; + sectors[total_count].fs_size = sector_size; + total_count++; + } + + *count = total_count; + + DEBUGASSERT(total_count == dev->mtdgeo.neraseblocks); + + BOOT_LOG_INF("ID:%d count:%" PRIu32, fa_id, *count); + + return OK; +} + +/**************************************************************************** + * Name: flash_area_id_from_multi_image_slot + * + * Description: + * Return the flash area ID for a given slot and a given image index + * (in case of a multi-image setup). + * + * Input Parameters: + * image_index - Index of the image. + * slot - Image slot, which may be 0 (primary) or 1 (secondary). + * + * Returned Value: + * Flash area ID (0 or 1), or negative value in case the requested slot + * is invalid. + * + ****************************************************************************/ + +int flash_area_id_from_multi_image_slot(int image_index, int slot) +{ + BOOT_LOG_INF("image_index:%d slot:%d", image_index, slot); + + switch (slot) + { + case 0: + return FLASH_AREA_IMAGE_PRIMARY(image_index); + case 1: + return FLASH_AREA_IMAGE_SECONDARY(image_index); + } + + BOOT_LOG_ERR("Unexpected Request: image_index:%d, slot:%d", + image_index, slot); + + return ERROR; /* flash_area_open will fail on that */ +} + +/**************************************************************************** + * Name: flash_area_id_from_image_slot + * + * Description: + * Return the flash area ID for a given slot. + * + * Input Parameters: + * slot - Image slot, which may be 0 (primary) or 1 (secondary). + * + * Returned Value: + * Flash area ID (0 or 1), or negative value in case the requested slot + * is invalid. + * + ****************************************************************************/ + +int flash_area_id_from_image_slot(int slot) +{ + BOOT_LOG_INF("slot:%d", slot); + + return flash_area_id_from_multi_image_slot(0, slot); +} + +/**************************************************************************** + * Name: flash_area_id_to_multi_image_slot + * + * Description: + * Convert the specified flash area ID and image index (in case of a + * multi-image setup) to an image slot index. + * + * Input Parameters: + * image_index - Index of the image. + * area_id - Unique identifier that is represented by fa_id in the + * flash_area struct. + * Returned Value: + * Image slot index (0 or 1), or negative value in case ID doesn't + * correspond to an image slot. + * + ****************************************************************************/ + +int flash_area_id_to_multi_image_slot(int image_index, int area_id) +{ + BOOT_LOG_INF("image_index:%d area_id:%d", image_index, area_id); + + if (area_id == FLASH_AREA_IMAGE_PRIMARY(image_index)) + { + return 0; + } + + if (area_id == FLASH_AREA_IMAGE_SECONDARY(image_index)) + { + return 1; + } + + BOOT_LOG_ERR("Unexpected Request: image_index:%d, area_id:%d", + image_index, area_id); + + return ERROR; /* flash_area_open will fail on that */ +} + +/**************************************************************************** + * Name: flash_area_id_from_image_offset + * + * Description: + * Return the flash area ID for a given image offset. + * + * Input Parameters: + * offset - Image offset. + * + * Returned Value: + * Flash area ID (0 or 1), or negative value in case the requested offset + * is invalid. + * + ****************************************************************************/ + +int flash_area_id_from_image_offset(uint32_t offset) +{ + struct flash_device_s *dev = lookup_flash_device_by_offset(offset); + + BOOT_LOG_INF("offset:%" PRIu32, offset); + + if (dev != NULL) + { + return dev->fa_cfg->fa_id; + } + + BOOT_LOG_ERR("Unexpected Request: offset:%" PRIu32, offset); + + return ERROR; /* flash_area_open will fail on that */ +} + +/**************************************************************************** + * Name: flash_area_get_sector + * + * Description: + * Retrieve the flash sector a given offset belongs to. + * + * Input Parameters: + * fap - flash area structure + * off - address offset. + * sector - flash sector + * + * Returned Value: + * Returns 0 on success, or an error code on failure. + * + ****************************************************************************/ + +int flash_area_get_sector(const struct flash_area *fap, off_t off, + struct flash_sector *fs) +{ + off_t offset = fap->fa_off + off; + struct flash_device_s *dev = lookup_flash_device_by_offset(offset); + if (dev == NULL) + { + return -errno; + } + + fs->fs_off = (offset / dev->mtdgeo.erasesize) * dev->mtdgeo.erasesize; + fs->fs_size = dev->mtdgeo.erasesize; + + return 0; +} diff --git a/bootloader/mcuboot/boot/nuttx/src/watchdog/watchdog.c b/bootloader/mcuboot/boot/nuttx/src/watchdog/watchdog.c new file mode 100644 index 0000000..59f4587 --- /dev/null +++ b/bootloader/mcuboot/boot/nuttx/src/watchdog/watchdog.c @@ -0,0 +1,130 @@ +/**************************************************************************** + * boot/nuttx/src/watchdog/watchdog.c + * + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include "watchdog/watchdog.h" + +#include +#include +#include +#include + +#include + +#include + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mcuboot_watchdog_feed + * + * Description: + * Reset the watchdog timer to the current timeout value, preventing any + * imminent watchdog timeouts. + * + * Input Parameters: + * None. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void mcuboot_watchdog_feed(void) +{ + int fd; + int ret; + + fd = open(CONFIG_MCUBOOT_WATCHDOG_DEVPATH, O_RDONLY); + if (fd < 0) + { + BOOT_LOG_ERR("Failed to open %s", CONFIG_MCUBOOT_WATCHDOG_DEVPATH); + + return; + } + + ret = ioctl(fd, WDIOC_KEEPALIVE, 0); + if (ret < 0) + { + int errcode = errno; + + BOOT_LOG_ERR("Failed to ping watchdog device: %d", errcode); + } + + close(fd); +} + +/**************************************************************************** + * Name: mcuboot_watchdog_init + * + * Description: + * Initialize the watchdog timer by setting the trigger timeout and + * starting it. + * + * Input Parameters: + * None. + * + * Returned Value: + * OK on success, ERROR if not. + * + ****************************************************************************/ + +int mcuboot_watchdog_init(void) +{ + int fd; + int ret; + + fd = open(CONFIG_MCUBOOT_WATCHDOG_DEVPATH, O_RDONLY); + if (fd < 0) + { + BOOT_LOG_ERR("Failed to open %s", CONFIG_MCUBOOT_WATCHDOG_DEVPATH); + goto errout; + } + + ret = ioctl(fd, WDIOC_SETTIMEOUT, (unsigned long)CONFIG_MCUBOOT_WATCHDOG_TIMEOUT); + if (ret < 0) + { + int errcode = errno; + + BOOT_LOG_ERR("Failed to set timeout in watchdog device: %d", errcode); + goto errout_with_dev; + } + + ret = ioctl(fd, WDIOC_START, 0); + if (ret < 0) + { + int errcode = errno; + + BOOT_LOG_ERR("Failed to start watchdog device: %d", errcode); + goto errout_with_dev; + } + + close(fd); + return OK; + +errout_with_dev: + close(fd); +errout: + return ERROR; +} diff --git a/bootloader/mcuboot/boot/zcbor/add_zcbor_copy_version.sh b/bootloader/mcuboot/boot/zcbor/add_zcbor_copy_version.sh new file mode 100644 index 0000000..a88ebf9 --- /dev/null +++ b/bootloader/mcuboot/boot/zcbor/add_zcbor_copy_version.sh @@ -0,0 +1,24 @@ +#!/bin/bash + +if [ "$1" == "--help" ]; then + echo "Add header if the zcbor files are updated." + exit -1 +fi + +add_copy_notice() { +echo "$(printf '/* + * This file has been %s from the zcbor library. + * Commit %s + */ + +' "$2" "$(zcbor --version)"; cat $1;)" > $1 +} + +add_copy_notice src/zcbor_decode.c "copied" +add_copy_notice src/zcbor_encode.c "copied" +add_copy_notice src/zcbor_common.c "copied" +add_copy_notice include/zcbor_decode.h "copied" +add_copy_notice include/zcbor_encode.h "copied" +add_copy_notice include/zcbor_common.h "copied" +add_copy_notice include/zcbor_print.h "copied" +add_copy_notice include/zcbor_tags.h "copied" diff --git a/bootloader/mcuboot/boot/zcbor/include/zcbor_common.h b/bootloader/mcuboot/boot/zcbor/include/zcbor_common.h new file mode 100644 index 0000000..0583ab8 --- /dev/null +++ b/bootloader/mcuboot/boot/zcbor/include/zcbor_common.h @@ -0,0 +1,514 @@ +/* + * This file has been copied from the zcbor library. + * Commit zcbor 0.8.1 + */ + +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZCBOR_COMMON_H__ +#define ZCBOR_COMMON_H__ + +#include +#include +#include +#include +#include "zcbor_tags.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define ZCBOR_STRINGIFY_PRE(x) #x +#define ZCBOR_STRINGIFY(s) ZCBOR_STRINGIFY_PRE(s) + +#define ZCBOR_VERSION_MAJOR 0 +#define ZCBOR_VERSION_MINOR 8 +#define ZCBOR_VERSION_BUGFIX 1 + +/** The version string with dots and not prefix. */ +#define ZCBOR_VERSION_STR ZCBOR_STRINGIFY(ZCBOR_VERSION_MAJOR) \ + "." ZCBOR_STRINGIFY(ZCBOR_VERSION_MINOR) \ + "." ZCBOR_STRINGIFY(ZCBOR_VERSION_BUGFIX) + +/** Monotonically increasing integer representing the version. */ +#define ZCBOR_VERSION ((ZCBOR_VERSION_MAJOR << 24) \ + + (ZCBOR_VERSION_MINOR << 16) \ + + (ZCBOR_VERSION_BUGFIX << 8)) + +/** Convenience type that allows pointing to strings directly inside the payload + * without the need to copy out. + */ +struct zcbor_string { + const uint8_t *value; + size_t len; +}; + + +/** Type representing a string fragment. + * + * Don't modify any member variables, or subsequent calls may fail. +**/ +struct zcbor_string_fragment { + struct zcbor_string fragment; ///! Location and length of the fragment. + size_t offset; ///! The offset in the full string at which this fragment belongs. + size_t total_len; ///! The total length of the string this fragment is a part of. +}; + + +/** Size to use in struct zcbor_string_fragment when the real size is unknown. */ +#define ZCBOR_STRING_FRAGMENT_UNKNOWN_LENGTH SIZE_MAX + +#ifndef MIN +#define MIN(a, b) (((a) < (b)) ? (a) : (b)) +#endif + +#ifndef MAX +#define MAX(a, b) (((a) < (b)) ? (b) : (a)) +#endif + +#ifndef ZCBOR_ARRAY_SIZE +#define ZCBOR_ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) +#endif + +/* Endian-dependent offset of smaller integer in a bigger one. */ +#ifdef ZCBOR_BIG_ENDIAN +#define ZCBOR_ECPY_OFFS(dst_len, src_len) ((dst_len) - (src_len)) +#else +#define ZCBOR_ECPY_OFFS(dst_len, src_len) (0) +#endif /* ZCBOR_BIG_ENDIAN */ + +#if SIZE_MAX <= UINT64_MAX +/** The ZCBOR_SUPPORTS_SIZE_T will be defined if processing of size_t type variables directly + * with zcbor_size_ functions is supported. +**/ +#define ZCBOR_SUPPORTS_SIZE_T +#else +#warning "zcbor: Unsupported size_t encoding size" +#endif + +struct zcbor_state_constant; + +/** The zcbor_state_t structure is used for both encoding and decoding. */ +typedef struct { +union { + uint8_t *payload_mut; + uint8_t const *payload; /**< The current place in the payload. Will be + updated when an element is correctly + processed. */ +}; + uint8_t const *payload_bak; /**< Temporary backup of payload. */ + size_t elem_count; /**< The current element is part of a LIST or a MAP, + and this keeps count of how many elements are + expected. This will be checked before processing + and decremented if the element is correctly + processed. */ + uint8_t const *payload_end; /**< The end of the payload. This will be + checked against payload before + processing each element. */ + bool payload_moved; /**< Is set to true while the state is stored as a backup + if @ref zcbor_update_state is called, since that function + updates the payload_end of all backed-up states. */ + +/* This is the "decode state", the part of zcbor_state_t that is only used by zcbor_decode.c. */ +struct { + bool indefinite_length_array; /**< Is set to true if the decoder is currently + decoding the contents of an indefinite- + length array. */ + bool counting_map_elems; /**< Is set to true while the number of elements of the + current map are being counted. */ +#ifdef ZCBOR_MAP_SMART_SEARCH + uint8_t *map_search_elem_state; /**< Optional flags to use when searching unordered + maps. If this is not NULL and map_elem_count + is non-zero, this consists of one flag per element + in the current map. The n-th bit can be set to 0 + to indicate that the n-th element in the + map should not be searched. These are manipulated + via zcbor_elem_processed() or + zcbor_unordered_map_search(), and should not be + manipulated directly. */ +#else + size_t map_elems_processed; /**< The number of elements of an unordered map + that have been processed. */ +#endif + size_t map_elem_count; /**< Number of elements in the current unordered map. + This also serves as the number of bits (not bytes) + in the map_search_elem_state array (when applicable). */ +} decode_state; + struct zcbor_state_constant *constant_state; /**< The part of the state that is + not backed up and duplicated. */ +} zcbor_state_t; + +struct zcbor_state_constant { + zcbor_state_t *backup_list; + size_t current_backup; + size_t num_backups; + int error; +#ifdef ZCBOR_STOP_ON_ERROR + bool stop_on_error; +#endif + bool manually_process_elem; /**< Whether an (unordered map) element should be automatically + marked as processed when found via @ref zcbor_search_map_key. */ +#ifdef ZCBOR_MAP_SMART_SEARCH + uint8_t *map_search_elem_state_end; /**< The end of the @ref map_search_elem_state buffer. */ +#endif +}; + +/** Function pointer type used with zcbor_multi_decode. + * + * This type is compatible with all decoding functions here and in the generated + * code, except for zcbor_multi_decode. + */ +typedef bool(zcbor_encoder_t)(zcbor_state_t *, const void *); +typedef bool(zcbor_decoder_t)(zcbor_state_t *, void *); + +/** Enumeration representing the major types available in CBOR. + * + * The major type is represented in the 3 first bits of the header byte. + */ +typedef enum +{ + ZCBOR_MAJOR_TYPE_PINT = 0, ///! Positive Integer + ZCBOR_MAJOR_TYPE_NINT = 1, ///! Negative Integer + ZCBOR_MAJOR_TYPE_BSTR = 2, ///! Byte String + ZCBOR_MAJOR_TYPE_TSTR = 3, ///! Text String + ZCBOR_MAJOR_TYPE_LIST = 4, ///! List + ZCBOR_MAJOR_TYPE_MAP = 5, ///! Map + ZCBOR_MAJOR_TYPE_TAG = 6, ///! Semantic Tag + ZCBOR_MAJOR_TYPE_SIMPLE = 7, ///! Simple values and floats +} zcbor_major_type_t; + +/** Extract the major type, i.e. the first 3 bits of the header byte. */ +#define ZCBOR_MAJOR_TYPE(header_byte) ((zcbor_major_type_t)(((header_byte) >> 5) & 0x7)) + +/** Extract the additional info, i.e. the last 5 bits of the header byte. */ +#define ZCBOR_ADDITIONAL(header_byte) ((header_byte) & 0x1F) + +/** Convenience macro for failing out of a decoding/encoding function. +*/ +#define ZCBOR_FAIL() \ +do {\ + zcbor_log("ZCBOR_FAIL "); \ + zcbor_trace_file(state); \ + return false; \ +} while(0) + +#define ZCBOR_FAIL_IF(expr) \ +do {\ + if (expr) { \ + zcbor_log("ZCBOR_FAIL_IF(" #expr ") "); \ + ZCBOR_FAIL(); \ + } \ +} while(0) + +#define ZCBOR_ERR(err) \ +do { \ + zcbor_log("ZCBOR_ERR(%d) ", err); \ + zcbor_error(state, err); \ + ZCBOR_FAIL(); \ +} while(0) + +#define ZCBOR_ERR_IF(expr, err) \ +do {\ + if (expr) { \ + zcbor_log("ZCBOR_ERR_IF(" #expr ", %d) ", err); \ + ZCBOR_ERR(err); \ + } \ +} while(0) + +#define ZCBOR_CHECK_PAYLOAD() \ + ZCBOR_ERR_IF(state->payload >= state->payload_end, ZCBOR_ERR_NO_PAYLOAD) + +#ifdef ZCBOR_STOP_ON_ERROR +#define ZCBOR_CHECK_ERROR() \ +do { \ + if (!zcbor_check_error(state)) { \ + ZCBOR_FAIL(); \ + } \ +} while(0) +#else +#define ZCBOR_CHECK_ERROR() +#endif + +#define ZCBOR_VALUE_IN_HEADER 23 ///! Values below this are encoded directly in the header. +#define ZCBOR_VALUE_IS_1_BYTE 24 ///! The next 1 byte contains the value. +#define ZCBOR_VALUE_IS_2_BYTES 25 ///! The next 2 bytes contain the value. +#define ZCBOR_VALUE_IS_4_BYTES 26 ///! The next 4 bytes contain the value. +#define ZCBOR_VALUE_IS_8_BYTES 27 ///! The next 8 bytes contain the value. +#define ZCBOR_VALUE_IS_INDEFINITE_LENGTH 31 ///! The list or map has indefinite length, and will instead be terminated by a 0xFF token. + +#define ZCBOR_BOOL_TO_SIMPLE ((uint8_t)20) ///! In CBOR, false/true have the values 20/21 + +#define ZCBOR_FLAG_RESTORE 1UL ///! Restore from the backup. Overwrite the current state with the state from the backup. +#define ZCBOR_FLAG_CONSUME 2UL ///! Consume the backup. Remove the backup from the stack of backups. +#define ZCBOR_FLAG_KEEP_PAYLOAD 4UL ///! Keep the pre-restore payload after restoring. +#define ZCBOR_FLAG_KEEP_DECODE_STATE 8UL ///! Keep the pre-restore decode state (everything only used for decoding) + +#define ZCBOR_SUCCESS 0 +#define ZCBOR_ERR_NO_BACKUP_MEM 1 +#define ZCBOR_ERR_NO_BACKUP_ACTIVE 2 +#define ZCBOR_ERR_LOW_ELEM_COUNT 3 +#define ZCBOR_ERR_HIGH_ELEM_COUNT 4 +#define ZCBOR_ERR_INT_SIZE 5 +#define ZCBOR_ERR_FLOAT_SIZE 6 +#define ZCBOR_ERR_ADDITIONAL_INVAL 7 ///! > 27 +#define ZCBOR_ERR_NO_PAYLOAD 8 +#define ZCBOR_ERR_PAYLOAD_NOT_CONSUMED 9 +#define ZCBOR_ERR_WRONG_TYPE 10 +#define ZCBOR_ERR_WRONG_VALUE 11 +#define ZCBOR_ERR_WRONG_RANGE 12 +#define ZCBOR_ERR_ITERATIONS 13 +#define ZCBOR_ERR_ASSERTION 14 +#define ZCBOR_ERR_PAYLOAD_OUTDATED 15 ///! Because of a call to @ref zcbor_update_state +#define ZCBOR_ERR_ELEM_NOT_FOUND 16 +#define ZCBOR_ERR_MAP_MISALIGNED 17 +#define ZCBOR_ERR_ELEMS_NOT_PROCESSED 18 +#define ZCBOR_ERR_NOT_AT_END 19 +#define ZCBOR_ERR_MAP_FLAGS_NOT_AVAILABLE 20 +#define ZCBOR_ERR_INVALID_VALUE_ENCODING 21 ///! When ZCBOR_CANONICAL is defined, and the incoming data is not encoded with minimal length. +#define ZCBOR_ERR_UNKNOWN 31 + +/** The largest possible elem_count. */ +#define ZCBOR_MAX_ELEM_COUNT SIZE_MAX + +/** Initial value for elem_count for when it just needs to be large. */ +#define ZCBOR_LARGE_ELEM_COUNT (ZCBOR_MAX_ELEM_COUNT - 15) + + +/** Take a backup of the current state. Overwrite the current elem_count. */ +bool zcbor_new_backup(zcbor_state_t *state, size_t new_elem_count); + +/** Consult the most recent backup. In doing so, check whether elem_count is + * less than or equal to max_elem_count. + * Also, take action based on the flags (See ZCBOR_FLAG_*). + */ +bool zcbor_process_backup(zcbor_state_t *state, uint32_t flags, size_t max_elem_count); + +/** Convenience function for starting encoding/decoding of a union. + * + * That is, for attempting to encode, or especially decode, multiple options. + * Makes a new backup. + */ +bool zcbor_union_start_code(zcbor_state_t *state); + +/** Convenience function before encoding/decoding one element of a union. + * + * Call this before attempting each option. + * Restores the backup, without consuming it. + */ +bool zcbor_union_elem_code(zcbor_state_t *state); + +/** Convenience function before encoding/decoding one element of a union. + * + * Consumes the backup without restoring it. + */ +bool zcbor_union_end_code(zcbor_state_t *state); + +/** Initialize a state with backups. + * As long as n_states is more than 1, one of the states in the array is used + * as a struct zcbor_state_constant object. + * If there is no struct zcbor_state_constant (n_states == 1), error codes are + * not available. + * This means that you get a state with (n_states - 2) backups. + * payload, payload_len, elem_count, and elem_state are used to initialize the first state. + * The elem_state is only needed for unordered maps, when ZCBOR_MAP_SMART_SEARCH is enabled. + * It is ignored otherwise. + */ +void zcbor_new_state(zcbor_state_t *state_array, size_t n_states, + const uint8_t *payload, size_t payload_len, size_t elem_count, + uint8_t *elem_state, size_t elem_state_bytes); + +/** Do boilerplate entry function procedure. + * Initialize states, call function, and check the result. + */ +int zcbor_entry_function(const uint8_t *payload, size_t payload_len, + void *result, size_t *payload_len_out, zcbor_state_t *state, zcbor_decoder_t func, + size_t n_states, size_t elem_count); + +#ifdef ZCBOR_STOP_ON_ERROR +/** Check stored error and fail if present, but only if stop_on_error is true. + * + * @retval true No error found + * @retval false An error was found + */ +static inline bool zcbor_check_error(const zcbor_state_t *state) +{ + struct zcbor_state_constant *cs = state->constant_state; + return !(cs && cs->stop_on_error && cs->error); +} +#endif + +/** Return the current error state, replacing it with SUCCESS. */ +static inline int zcbor_pop_error(zcbor_state_t *state) +{ + if (!state->constant_state) { + return ZCBOR_SUCCESS; + } + int err = state->constant_state->error; + + state->constant_state->error = ZCBOR_SUCCESS; + return err; +} + +/** Look at current error state without altering it */ +static inline int zcbor_peek_error(const zcbor_state_t *state) +{ + if (!state->constant_state) { + return ZCBOR_SUCCESS; + } else { + return state->constant_state->error; + } +} + +/** Write the provided error to the error state. */ +static inline void zcbor_error(zcbor_state_t *state, int err) +{ +#ifdef ZCBOR_STOP_ON_ERROR + if (zcbor_check_error(state)) +#endif + { + if (state->constant_state) { + state->constant_state->error = err; + } + } +} + +/** Whether the current payload is exhausted. */ +static inline bool zcbor_payload_at_end(const zcbor_state_t *state) +{ + return (state->payload == state->payload_end); +} + +/** Update the current payload pointer (and payload_end). + * + * For use when the payload is divided into multiple chunks. + * + * This function also updates all backups to the new payload_end. + * This sets a flag so that @ref zcbor_process_backup fails if a backup is + * processed with the flag @ref ZCBOR_FLAG_RESTORE, but without the flag + * @ref ZCBOR_FLAG_KEEP_PAYLOAD since this would cause an invalid state. + * + * @param[inout] state The current state, will be updated with + * the new payload pointer. + * @param[in] payload The new payload chunk. + * @param[in] payload_len The length of the new payload chunk. + */ +void zcbor_update_state(zcbor_state_t *state, + const uint8_t *payload, size_t payload_len); + +/** Check that the provided fragments are complete and in the right order. + * + * If the total length is not known, the total_len can have the value + * @ref ZCBOR_STRING_FRAGMENT_UNKNOWN_LENGTH. If so, all fragments will be + * updated with the actual total length. + * + * @param[in] fragments An array of string fragments. Cannot be NULL. + * @param[in] num_fragments The number of fragments in @p fragments. + * + * @retval true If the fragments are in the right order, and there are no + * fragments missing. + * @retval false If not all fragments have the same total_len, or gaps are + * found, or if any fragment value is NULL. + */ +bool zcbor_validate_string_fragments(struct zcbor_string_fragment *fragments, + size_t num_fragments); + +/** Assemble the fragments into a single string. + * + * The fragments are copied in the order they appear, without regard for + * offset or total_len. To ensure that the fragments are correct, first + * validate with @ref zcbor_validate_string_fragments. + * + * @param[in] fragments An array of string fragments. Cannot be NULL. + * @param[in] num_fragments The number of fragments in @p fragments. + * @param[out] result The buffer to place the assembled string into. + * @param[inout] result_len In: The length of the @p result. + * Out: The length of the assembled string. + * + * @retval true On success. + * @retval false If the assembled string would be larger than the buffer. + * The buffer might still be written to. + */ +bool zcbor_splice_string_fragments(struct zcbor_string_fragment *fragments, + size_t num_fragments, uint8_t *result, size_t *result_len); + +/** Compare two struct zcbor_string instances. + * + * @param[in] str1 A string + * @param[in] str2 A string to compare to @p str1 + * + * @retval true if the strings are identical + * @retval false if length or contents don't match, or one one or both strings is NULL. + */ +bool zcbor_compare_strings(const struct zcbor_string *str1, + const struct zcbor_string *str2); + +/** Calculate the length of a CBOR string, list, or map header. + * + * This can be used to find the start of the CBOR object when you have a + * pointer to the start of the contents. The function assumes that the header + * will be the shortest it can be. + * + * @param[in] num_elems The number of elements in the string, list, or map. + * + * @return The length of the header in bytes (1-9). + */ +size_t zcbor_header_len(uint64_t value); + +/** Like @ref zcbor_header_len but for integer of any size <= 8. */ +size_t zcbor_header_len_ptr(const void *const value, size_t value_len); + +/** Convert a float16 value to float32. + * + * @param[in] input The float16 value stored in a uint16_t. + * + * @return The resulting float32 value. + */ +float zcbor_float16_to_32(uint16_t input); + +/** Convert a float32 value to float16. + * + * @param[in] input The float32 value. + * + * @return The resulting float16 value as a uint16_t. + */ +uint16_t zcbor_float32_to_16(float input); + +#ifdef ZCBOR_MAP_SMART_SEARCH +static inline size_t zcbor_round_up(size_t x, size_t align) +{ + return (((x) + (align) - 1) / (align) * (align)); +} + +#define ZCBOR_BITS_PER_BYTE 8 +/** Calculate the number of bytes needed to hold @p num_flags 1 bit flags + */ +static inline size_t zcbor_flags_to_bytes(size_t num_flags) +{ + return zcbor_round_up(num_flags, ZCBOR_BITS_PER_BYTE) / ZCBOR_BITS_PER_BYTE; +} + +/** Calculate the number of zcbor_state_t instances needed to hold @p num_flags 1 bit flags + */ +static inline size_t zcbor_flags_to_states(size_t num_flags) +{ + return zcbor_round_up(num_flags, sizeof(zcbor_state_t) * ZCBOR_BITS_PER_BYTE) + / (sizeof(zcbor_state_t) * ZCBOR_BITS_PER_BYTE); +} + +#define ZCBOR_FLAG_STATES(n_flags) zcbor_flags_to_states(n_flags) + +#else +#define ZCBOR_FLAG_STATES(n_flags) 0 +#endif + +size_t strnlen(const char *, size_t); + +#ifdef __cplusplus +} +#endif + +#endif /* ZCBOR_COMMON_H__ */ diff --git a/bootloader/mcuboot/boot/zcbor/include/zcbor_decode.h b/bootloader/mcuboot/boot/zcbor/include/zcbor_decode.h new file mode 100644 index 0000000..e5a58d8 --- /dev/null +++ b/bootloader/mcuboot/boot/zcbor/include/zcbor_decode.h @@ -0,0 +1,452 @@ +/* + * This file has been copied from the zcbor library. + * Commit zcbor 0.8.1 + */ + +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZCBOR_DECODE_H__ +#define ZCBOR_DECODE_H__ + +#include +#include +#include +#include "zcbor_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** The zcbor_decode library provides functions for decoding CBOR data elements. + * + * See The README for an introduction to CBOR, including the meaning of pint, + * nint, bstr etc. + */ + + +/** See @ref zcbor_new_state() */ +void zcbor_new_decode_state(zcbor_state_t *state_array, size_t n_states, + const uint8_t *payload, size_t payload_len, size_t elem_count, + uint8_t *elem_state, size_t elem_state_bytes); + +/** Convenience macro for declaring and initializing a decoding state with backups. + * + * This gives you a state variable named @p name. The variable functions like + * a pointer. + * + * @param[in] name The name of the new state variable. + * @param[in] num_backups The number of backup slots to keep in the state. + * @param[in] payload The payload to work on. + * @param[in] payload_size The size (in bytes) of @p payload. + * @param[in] elem_count The starting elem_count (typically 1). + * @param[in] n_flags For use if ZCBOR_MAP_SMART_SEARCH is enabled, ignored otherwise. + * The total number of unordered map search flags needed. + * I.e. the largest number of elements expected in an unordered map, + * including elements in nested unordered maps. + */ +#define ZCBOR_STATE_D(name, num_backups, payload, payload_size, elem_count, n_flags) \ +zcbor_state_t name[((num_backups) + 2 + ZCBOR_FLAG_STATES(n_flags))]; \ +do { \ + zcbor_new_decode_state(name, ZCBOR_ARRAY_SIZE(name), payload, payload_size, elem_count, \ + (uint8_t *)&name[(num_backups) + 1], ZCBOR_FLAG_STATES(n_flags) * sizeof(zcbor_state_t)); \ +} while(0) + + +/** The following applies to all _decode() functions listed directly below. + * + * @param[inout] state The current state of the decoding. + * @param[out] result Where to place the decoded value. + * @param[in] result_size (if present) Size in bytes of the memory at @p result + * + * @retval true If the value was decoded correctly. + * @retval false If the value has the wrong type, the payload overflowed, the + * element count was exhausted, or the value was larger than can + * fit in the result variable. + * Use zcbor_peek_error() to see the error code. + */ +bool zcbor_int32_decode(zcbor_state_t *state, int32_t *result); /* pint/nint */ +bool zcbor_int64_decode(zcbor_state_t *state, int64_t *result); /* pint/nint */ +bool zcbor_uint32_decode(zcbor_state_t *state, uint32_t *result); /* pint */ +bool zcbor_uint64_decode(zcbor_state_t *state, uint64_t *result); /* pint */ +bool zcbor_size_decode(zcbor_state_t *state, size_t *result); /* pint */ +bool zcbor_int_decode(zcbor_state_t *state, void *result, size_t result_size); /* pint/nint */ +bool zcbor_uint_decode(zcbor_state_t *state, void *result, size_t result_size); /* pint */ +bool zcbor_bstr_decode(zcbor_state_t *state, struct zcbor_string *result); /* bstr */ +bool zcbor_tstr_decode(zcbor_state_t *state, struct zcbor_string *result); /* tstr */ +bool zcbor_tag_decode(zcbor_state_t *state, uint32_t *result); /* CBOR tag */ +bool zcbor_simple_decode(zcbor_state_t *state, uint8_t *result); /* CBOR simple value */ +bool zcbor_bool_decode(zcbor_state_t *state, bool *result); /* boolean CBOR simple value */ +bool zcbor_float16_decode(zcbor_state_t *state, float *result); /* IEEE754 float16 */ +bool zcbor_float16_bytes_decode(zcbor_state_t *state, uint16_t *result); /* IEEE754 float16 raw bytes */ +bool zcbor_float16_32_decode(zcbor_state_t *state, float *result); /* IEEE754 float16 or float32 */ +bool zcbor_float32_decode(zcbor_state_t *state, float *result); /* IEEE754 float32 */ +bool zcbor_float32_64_decode(zcbor_state_t *state, double *result); /* IEEE754 float32 or float64 */ +bool zcbor_float64_decode(zcbor_state_t *state, double *result); /* IEEE754 float64 */ +bool zcbor_float_decode(zcbor_state_t *state, double *result); /* IEEE754 float16, float32, or float64 */ + +/** The following applies to all _expect() and _pexpect() functions listed directly below. + * + * @param[inout] state The current state of the decoding. + * @param[in] expected The expected value. + * + * @retval true If the result was decoded correctly and has the expected value. + * @retval false If the decoding failed or the result doesn't have the + * expected value. + * Use zcbor_peek_error() to see the error code. + */ +bool zcbor_int32_expect(zcbor_state_t *state, int32_t expected); /* pint/nint */ +bool zcbor_int64_expect(zcbor_state_t *state, int64_t expected); /* pint/nint */ +bool zcbor_uint32_expect(zcbor_state_t *state, uint32_t expected); /* pint */ +bool zcbor_uint64_expect(zcbor_state_t *state, uint64_t expected); /* pint */ +bool zcbor_size_expect(zcbor_state_t *state, size_t expected); /* pint */ +bool zcbor_bstr_expect(zcbor_state_t *state, struct zcbor_string *expected); /* bstr */ +bool zcbor_tstr_expect(zcbor_state_t *state, struct zcbor_string *expected); /* tstr */ +bool zcbor_tag_expect(zcbor_state_t *state, uint32_t expected); /* CBOR tag */ +bool zcbor_simple_expect(zcbor_state_t *state, uint8_t expected); /* CBOR simple value */ +bool zcbor_bool_expect(zcbor_state_t *state, bool expected); /* boolean CBOR simple value */ +bool zcbor_nil_expect(zcbor_state_t *state, void *unused); /* 'nil' CBOR simple value */ +bool zcbor_undefined_expect(zcbor_state_t *state, void *unused); /* 'undefined' CBOR simple value */ +bool zcbor_float16_expect(zcbor_state_t *state, float expected); /* IEEE754 float16 */ +bool zcbor_float16_bytes_expect(zcbor_state_t *state, uint16_t expected); /* IEEE754 float16 raw bytes */ +bool zcbor_float16_32_expect(zcbor_state_t *state, float expected); /* IEEE754 float16 or float32 */ +bool zcbor_float32_expect(zcbor_state_t *state, float expected); /* IEEE754 float32 */ +bool zcbor_float32_64_expect(zcbor_state_t *state, double expected); /* IEEE754 float32 or float64 */ +bool zcbor_float64_expect(zcbor_state_t *state, double expected); /* IEEE754 float64 */ +bool zcbor_float_expect(zcbor_state_t *state, double expected); /* IEEE754 float16, float32, or float64 */ + +/** Like the _expect() functions but the value is passed through a pointer. + * (for use as a zcbor_decoder_t function) */ +bool zcbor_int32_pexpect(zcbor_state_t *state, int32_t *expected); /* pint/nint */ +bool zcbor_int64_pexpect(zcbor_state_t *state, int64_t *expected); /* pint/nint */ +bool zcbor_uint32_pexpect(zcbor_state_t *state, uint32_t *expected); /* pint */ +bool zcbor_uint64_pexpect(zcbor_state_t *state, uint64_t *expected); /* pint */ +bool zcbor_size_pexpect(zcbor_state_t *state, size_t *expected); /* pint */ +bool zcbor_tag_pexpect(zcbor_state_t *state, uint32_t *expected); /* CBOR tag */ +bool zcbor_simple_pexpect(zcbor_state_t *state, uint8_t *expected); /* CBOR simple value */ +bool zcbor_bool_pexpect(zcbor_state_t *state, bool *expected); /* boolean CBOR simple value */ +bool zcbor_float16_pexpect(zcbor_state_t *state, float *expected); /* IEEE754 float16 */ +bool zcbor_float16_bytes_pexpect(zcbor_state_t *state, uint16_t *expected); /* IEEE754 float16 raw bytes */ +bool zcbor_float16_32_pexpect(zcbor_state_t *state, float *expected); /* IEEE754 float16 or float32 */ +bool zcbor_float32_pexpect(zcbor_state_t *state, float *expected); /* IEEE754 float32 */ +bool zcbor_float32_64_pexpect(zcbor_state_t *state, double *expected); /* IEEE754 float32 or float64 */ +bool zcbor_float64_pexpect(zcbor_state_t *state, double *expected); /* IEEE754 float64 */ +bool zcbor_float_pexpect(zcbor_state_t *state, double *expected); /* IEEE754 float16, float32, or float64 */ + +/** Consume and expect a pint/nint with a certain value, within a union. + * + * Calls @ref zcbor_union_elem_code then @ref zcbor_[u]int[32|64]_expect. + */ +bool zcbor_int32_expect_union(zcbor_state_t *state, int32_t expected); +bool zcbor_int64_expect_union(zcbor_state_t *state, int64_t expected); +bool zcbor_uint32_expect_union(zcbor_state_t *state, uint32_t expected); +bool zcbor_uint64_expect_union(zcbor_state_t *state, uint64_t expected); + +/** Decode and consume a list/map header. + * + * The contents of the list can be decoded via subsequent function calls. + * A state backup is created to keep track of the element count. + * Call @ref zcbor_list_end_decode / @ref zcbor_map_end_decode when done + * decoding the contents of the list/map + * + * @retval true Header decoded correctly + * @retval false Header decoded incorrectly, or backup failed. + */ +bool zcbor_list_start_decode(zcbor_state_t *state); +bool zcbor_map_start_decode(zcbor_state_t *state); +bool zcbor_unordered_map_start_decode(zcbor_state_t *state); + +/** Search for a key in a map. + * + * The CBOR spec allows elements (key-value pairs) in maps to appear in any order. + * This function should be used when the order of elements is unknown. + * + * This must only be used while inside a map that has been entered via + * @ref zcbor_unordered_map_start_decode. Use @ref zcbor_unordered_map_end_decode + * when leaving the map. + * + * This function searches for keys. When this function returns successfully, + * the @p state is pointing to the value corresponding to the found key. + * Therefore, to be able to call this function again, the value must first be + * decoded or skipped. + * + * When searching unordered maps, the found elements must be kept track of. + * By default, this function automatically keeps track, which means it keeps a + * running count of the number of found elements, which is checked when exiting + * the map. You can do this manually instead, see @ref zcbor_elem_processed and + * @ref manually_process_elem. If ZCBOR_MAP_SMART_SEARCH is defined, a flag is + * kept for each element, instead of a rolling count. + * + * @note Unless ZCBOR_MAP_SMART_SEARCH is defined, + * elements are not individually marked as processed, so they may + * be returned again in a subsequent call to this function, if it is + * matched by the @p key_decoder of that call. Because of this, you should + * only use this function when you know the @p key_decoder matches no more + * than one of the keys. Typically this means all keys are known strings + * or integers, i.e. the @p key_decoder is typically a _pexpect() function. + * + * When searching for strings, there are convenience functions available, + * see the zcbor_search_key_* functions. + * + * @param[in] key_decoder A decoding function that will be tried against all + * keys in the map until it returns true, at which point + * @ref zcbor_unordered_map_search will return true. + * For example, a zcbor_*_pexpect() function. + * @param[inout] state The current state of decoding. Must be currently decoding + * the contents of a map, and pointing to one (any) of the + * keys, not one of the values. If successful, the @p state + * will be pointing to the value corresponding to the + * matched key. If unsuccessful, the @p state will be + * unchanged. + * @param[inout] key_result This will be passed as the second argument to the + * @p key_decoder. + * + * @retval true If the key was found, i.e. @p key_decoder returned true. + * @retval false If the key was not found after searching all map elements. + * Or the map was pointing to a value (not a key). + * Or an unexpected error happened while skipping elements or + * jumping from the end of the map to the start. + */ +bool zcbor_unordered_map_search(zcbor_decoder_t key_decoder, zcbor_state_t *state, void *key_result); + +/** Find a specific bstr/tstr key as part of a map with unknown element order. + * + * Uses @ref zcbor_unordered_map_search under the hood. Please refer to those docs + * for the conditions under which this can be called. + * Refer to the docs for zcbor_(t|b)str_expect_* (e.g. @ref zcbor_bstr_expect_ptr) + * for parameter docs. + */ +bool zcbor_search_key_bstr_ptr(zcbor_state_t *state, char const *ptr, size_t len); +bool zcbor_search_key_tstr_ptr(zcbor_state_t *state, char const *ptr, size_t len); +bool zcbor_search_key_bstr_term(zcbor_state_t *state, char const *str, size_t maxlen); +bool zcbor_search_key_tstr_term(zcbor_state_t *state, char const *str, size_t maxlen); +#define zcbor_search_key_bstr_lit(state, str) zcbor_search_key_bstr_ptr(state, str, sizeof(str) - 1) +#define zcbor_search_key_tstr_lit(state, str) zcbor_search_key_tstr_ptr(state, str, sizeof(str) - 1) +#define zcbor_search_key_bstr_arr(state, str) zcbor_search_key_bstr_ptr(state, str, (sizeof(str))) +#define zcbor_search_key_tstr_arr(state, str) zcbor_search_key_tstr_ptr(state, str, (sizeof(str))) + +/** (Optional) Call this function to mark an (unordered map) element as processed. + * + * @note This should not be called unless the @ref manually_process_elem flag is set. + * By default, i.e. when @ref manually_process_elem is not set, this function is + * called internally by @ref zcbor_unordered_map_search whenever a key is found. + * + * By default, this function increments the internal count @ref map_elems_processed. + * + * If ZCBOR_MAP_SMART_SEARCH is defined, this function instead clears a flag for the + * element (key-value pair) that is currently being processed, or that has just been + * processed, meaning the element won't be found again via @ref zcbor_unordered_map_search. + * + * @ref zcbor_unordered_map_end_decode will fail if @ref map_elems_processed does not + * match the number of elements in the map, or if any of the map element's flag is set. + */ +bool zcbor_elem_processed(zcbor_state_t *state); + +/** Finalize decoding a list/map + * + * Check that the list/map had the correct number of elements, and restore the + * previous element count from the backup. + * + * Use @ref zcbor_list_map_end_force_decode to forcibly consume the backup if + * something has gone wrong. + * + * In all successful cases, the state is returned pointing to the byte/element + * after the list/map in the payload. + * + * @retval true Everything ok. + * @retval false Element count not correct. + */ +bool zcbor_list_end_decode(zcbor_state_t *state); +bool zcbor_map_end_decode(zcbor_state_t *state); +bool zcbor_unordered_map_end_decode(zcbor_state_t *state); +bool zcbor_list_map_end_force_decode(zcbor_state_t *state); + +/** Find whether the state is at the end of a list or map. + */ +bool zcbor_array_at_end(zcbor_state_t *state); + +/** Skip a single element, regardless of type and value. + * + * This means if the element is a map or list, this function will recursively + * skip all its contents. + * This function will also skip any tags preceeding the element. + * + * @param[inout] state The current state of the decoding. + * @param[in] unused Unused parameter to maintain signature parity with + * @ref zcbor_decoder_t. + */ +bool zcbor_any_skip(zcbor_state_t *state, void *unused); + +/** Decode 0 or more elements with the same type and constraints. + * + * The decoded values will appear consecutively in the @p result array. + * + * The following is an example of decoding a list containing 3 INTS followed by + * 0 to 2 bstrs: + * + * @code{c} + * uint32_t ints[3]; + * struct zcbor_string bstrs[2]; + * uint32_t num_decode; + * bool res; + * + * res = zcbor_list_start_decode(state); + * res = res && zcbor_multi_decode(3, 3, &num_decode, zcbor_uint32_decode, + * state, ints, sizeof(ints[0])); + * res = res && zcbor_multi_decode(0, 2, &num_decode, zcbor_bstr_decode, + * state, bstrs, sizeof(bstrs[0])); + * res = res && zcbor_list_end_decode(state); + * // check res + * @endcode + * + * The @ref zcbor_decoder_t type is designed to be compatible with all single- + * value decoder functions in this library, e.g. @ref zcbor_uint32_decode, + * @ref zcbor_tstr_expect, @ref zcbor_nil_expect, etc. For _expect() functions, + * @p result will be used as a value instead of an array/pointer, so + * @p result_len will determine how much the value changes for each call. + * To decode the same value multiple times, use a @p result_len of 0. + * This function can also be used with custom decoder functions, such as those + * generated by the zcbor.py script, which for example decodes larger chunks of + * the data at once. + * + * @param[in] min_decode The minimum acceptable number of elements. + * @param[in] max_decode The maximum acceptable number of elements. + * @param[out] num_decode The actual number of elements decoded. + * @param[in] decoder The decoder function to call under the hood. This + * function will be called with the provided arguments + * repeatedly until the function fails (returns false) + * or until it has been called @p max_decode times. + * The result pointer is moved @p result_len bytes for + * each call to @p decoder, i.e. @p result refers to + * an array of result variables. + * Should not be an _expect() function, use + * _pexpect() instead. + * @param[out] result Where to place the decoded values. Must be an array + * of at least @p max_decode elements. + * @param[in] result_len The length of each result variable. Must be the + * length of the individual elements of @p result. + * + * @retval true If at least @p min_decode variables were correctly decoded. + * @retval false If @p decoder failed before having decoded @p min_decode + * values. + */ +bool zcbor_multi_decode(size_t min_decode, size_t max_decode, size_t *num_decode, + zcbor_decoder_t decoder, zcbor_state_t *state, void *result, + size_t result_len); + +/** Attempt to decode a value that might not be present in the data. + * + * Works like @ref zcbor_multi_decode, with @p present as num_decode. + * Will return true, even if the data is not present. + * + * @param[out] present Whether or not the data was present and successfully decoded. + * @param[in] decoder The decoder to attempt. + * @param[out] result The result, if present. + * + * @return Should always return true. + */ +bool zcbor_present_decode(bool *present, + zcbor_decoder_t decoder, + zcbor_state_t *state, + void *result); + + +/** Supplementary string (bstr/tstr) decoding functions: */ + +/** Consume and expect a bstr/tstr with the value of the provided char/uint8_t array. + * + * @param[inout] state The current state of the decoding. + * @param[in] str The value to expect. A pointer to the string/array. + * _term() uses strnlen(), so @p str must be null-terminated. + * _lit() uses sizeof()-1, so @p str must be a (null-terminated) string literal. + * _arr() uses sizeof(), so @p str must be a uint8_t array (not null-terminated). + * @param[in] len (if present) The length of the string pointed to by @p str + * @param[in] maxlen (if present) The maximum length of the string pointed to by @p str. + * This value is passed to strnlen. + */ +bool zcbor_bstr_expect_ptr(zcbor_state_t *state, char const *ptr, size_t len); +bool zcbor_tstr_expect_ptr(zcbor_state_t *state, char const *ptr, size_t len); +bool zcbor_bstr_expect_term(zcbor_state_t *state, char const *str, size_t maxlen); +bool zcbor_tstr_expect_term(zcbor_state_t *state, char const *str, size_t maxlen); +#define zcbor_bstr_expect_lit(state, str) zcbor_bstr_expect_ptr(state, str, sizeof(str) - 1) +#define zcbor_tstr_expect_lit(state, str) zcbor_tstr_expect_ptr(state, str, sizeof(str) - 1) +#define zcbor_bstr_expect_arr(state, str) zcbor_bstr_expect_ptr(state, str, sizeof(str)) +#define zcbor_tstr_expect_arr(state, str) zcbor_tstr_expect_ptr(state, str, sizeof(str)) + +/** Decode and consume a bstr header. + * + * The rest of the string can be decoded as CBOR. + * A state backup is created to keep track of the element count. + * Call @ref zcbor_bstr_end_decode when done decoding the contents of the bstr. + * + * @param[inout] state The current state of the decoding. + * @param[out] result The resulting string, for reference. The string should be decoded via + * functions from this API since state is pointing to the start of the string, + * not the end. + * + * @retval true Header decoded correctly + * @retval false Header decoded incorrectly, or backup failed, or payload is not large enough + * to contain the contents of the string. Use @ref zcbor_bstr_start_decode_fragment + * for decoding fragmented payloads. + */ +bool zcbor_bstr_start_decode(zcbor_state_t *state, struct zcbor_string *result); + +/** Finalize decoding a CBOR-encoded bstr. + * + * Restore element count from backup. + */ +bool zcbor_bstr_end_decode(zcbor_state_t *state); + + +/** Supplementary string (bstr/tstr) decoding functions for fragmented payloads: */ + +/** Start decoding a bstr/tstr, even if the payload contains only part of it. + * + * This must be followed by a call to @ref zcbor_update_state, which can be + * followed by a call to @ref zcbor_next_fragment. Do not call this function + * again on subsequent fragments of the same string. + * + * This consumes the remaining payload as long as it belongs to the string. + */ +bool zcbor_bstr_decode_fragment(zcbor_state_t *state, struct zcbor_string_fragment *result); +bool zcbor_tstr_decode_fragment(zcbor_state_t *state, struct zcbor_string_fragment *result); + +/** Extract the next fragment of a string. + * + * Use this function to extract all but the first fragment. + */ +void zcbor_next_fragment(zcbor_state_t *state, + struct zcbor_string_fragment *prev_fragment, + struct zcbor_string_fragment *result); + +/** Decode and consume a bstr header, assuming the payload does not contain the whole bstr. + * + * The rest of the string can be decoded as CBOR. + * A state backup is created to keep track of the element count. + * Call @ref zcbor_update_state followed by @ref zcbor_bstr_next_fragment when + * the current payload has been exhausted. + * Call @ref zcbor_bstr_end_decode when done decoding the contents of the bstr. + */ +bool zcbor_bstr_start_decode_fragment(zcbor_state_t *state, + struct zcbor_string_fragment *result); + +/** Start decoding the next fragment of a string. + * + * Use this function to extract all but the first fragment of a CBOR-encoded + * bstr. + */ +void zcbor_bstr_next_fragment(zcbor_state_t *state, + struct zcbor_string_fragment *prev_fragment, + struct zcbor_string_fragment *result); + +/** Can be used on any fragment to tell if it is the final fragment of the string. */ +bool zcbor_is_last_fragment(const struct zcbor_string_fragment *fragment); + +#ifdef __cplusplus +} +#endif + +#endif /* ZCBOR_DECODE_H__ */ diff --git a/bootloader/mcuboot/boot/zcbor/include/zcbor_encode.h b/bootloader/mcuboot/boot/zcbor/include/zcbor_encode.h new file mode 100644 index 0000000..5139d3c --- /dev/null +++ b/bootloader/mcuboot/boot/zcbor/include/zcbor_encode.h @@ -0,0 +1,245 @@ +/* + * This file has been copied from the zcbor library. + * Commit zcbor 0.8.1 + */ + +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZCBOR_ENCODE_H__ +#define ZCBOR_ENCODE_H__ + +#include +#include +#include +#include "zcbor_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/** The zcbor_encode library provides functions for encoding CBOR data elements. + * + * See The README for an introduction to CBOR, including the meaning of pint, + * nint, bstr etc. + */ + + +/** See @ref zcbor_new_state() */ +void zcbor_new_encode_state(zcbor_state_t *state_array, size_t n_states, + uint8_t *payload, size_t payload_len, size_t elem_count); + +/** Convenience macro for declaring and initializing an encoding state with backups. + * + * This gives you a state variable named @p name. The variable functions like + * a pointer. + * + * @param[in] name The name of the new state variable. + * @param[in] num_backups The number of backup slots to keep in the state. + * @param[in] payload The payload to work on. + * @param[in] payload_size The size (in bytes) of @p payload. + * @param[in] elem_count The starting elem_count (typically 1). + */ +#define ZCBOR_STATE_E(name, num_backups, payload, payload_size, elem_count) \ +zcbor_state_t name[((num_backups) + 2)]; \ +do { \ + zcbor_new_encode_state(name, ZCBOR_ARRAY_SIZE(name), payload, payload_size, elem_count); \ +} while(0) + + +/** The following applies to all _put and _encode functions listed directly below. + * + * The difference between _put and _encode is only in the argument type, + * but when a @ref zcbor_encoder_t is needed, such as for @ref zcbor_multi_encode, + * the _encode variant must be used. + * + * @param[inout] state The current state of the encoding. + * @param[in] input The value to encode. + * + * @retval true Everything is ok. + * @retval false If the payload is exhausted. Or an unexpected error happened. + * Use zcbor_peek_error() to see the error code. + */ +bool zcbor_int32_put(zcbor_state_t *state, int32_t input); /* pint/nint */ +bool zcbor_int64_put(zcbor_state_t *state, int64_t input); /* pint/nint */ +bool zcbor_uint32_put(zcbor_state_t *state, uint32_t input); /* pint */ +bool zcbor_uint64_put(zcbor_state_t *state, uint64_t input); /* pint */ +bool zcbor_size_put(zcbor_state_t *state, size_t input); /* pint */ +bool zcbor_tag_put(zcbor_state_t *state, uint32_t tag); /* CBOR tag */ +bool zcbor_simple_put(zcbor_state_t *state, uint8_t input); /* CBOR simple value */ +bool zcbor_bool_put(zcbor_state_t *state, bool input); /* boolean CBOR simple value */ +bool zcbor_nil_put(zcbor_state_t *state, const void *unused); /* 'nil' CBOR simple value */ +bool zcbor_undefined_put(zcbor_state_t *state, const void *unused); /* 'undefined' CBOR simple value */ +bool zcbor_float16_put(zcbor_state_t *state, float input); /* IEEE754 float16 */ +bool zcbor_float16_bytes_put(zcbor_state_t *state, uint16_t input); /* IEEE754 float16 raw bytes */ +bool zcbor_float32_put(zcbor_state_t *state, float input); /* IEEE754 float32 */ +bool zcbor_float64_put(zcbor_state_t *state, double input); /* IEEE754 float64 */ + +bool zcbor_int32_encode(zcbor_state_t *state, const int32_t *input); /* pint/nint */ +bool zcbor_int64_encode(zcbor_state_t *state, const int64_t *input); /* pint/nint */ +bool zcbor_uint32_encode(zcbor_state_t *state, const uint32_t *input); /* pint */ +bool zcbor_uint64_encode(zcbor_state_t *state, const uint64_t *input); /* pint */ +bool zcbor_size_encode(zcbor_state_t *state, const size_t *input); /* pint */ +bool zcbor_int_encode(zcbor_state_t *state, const void *input_int, size_t int_size); +bool zcbor_uint_encode(zcbor_state_t *state, const void *input_uint, size_t uint_size); +bool zcbor_bstr_encode(zcbor_state_t *state, const struct zcbor_string *input); /* bstr */ +bool zcbor_tstr_encode(zcbor_state_t *state, const struct zcbor_string *input); /* tstr */ +bool zcbor_tag_encode(zcbor_state_t *state, uint32_t *tag); /* CBOR tag. Note that zcbor_tag_encode()'s argument was changed to be a pointer. See also zcbor_tag_put(). */ +bool zcbor_simple_encode(zcbor_state_t *state, uint8_t *input); /* CBOR simple value */ +bool zcbor_bool_encode(zcbor_state_t *state, const bool *input); /* boolean CBOR simple value */ +bool zcbor_float16_encode(zcbor_state_t *state, const float *input); /* IEEE754 float16 */ +bool zcbor_float16_bytes_encode(zcbor_state_t *state, const uint16_t *input); /* IEEE754 float16 raw bytes */ +bool zcbor_float32_encode(zcbor_state_t *state, const float *input); /* IEEE754 float32 */ +bool zcbor_float64_encode(zcbor_state_t *state, const double *input); /* IEEE754 float64 */ + +/** Encode a list/map header. + * + * The contents of the list/map can be encoded via subsequent function calls. + * If ZCBOR_CANONICAL is defined, a state backup is created to keep track of the + * element count. + * When all members have been encoded, call @ref zcbor_list_end_encode / + * @ref zcbor_map_end_encode to close the list/map. + * + * @param[inout] state The current state of the encoding. + * @param[in] max_num The maximum number of members in the list/map. + * This serves as a size hint for the header. Must be + * equal to the max_num provided to the corresponding + * @ref zcbor_list_end_encode / @ref zcbor_map_end_encode + * call. + * Only used when ZCBOR_CANONICAL is defined. + */ +bool zcbor_list_start_encode(zcbor_state_t *state, size_t max_num); +bool zcbor_map_start_encode(zcbor_state_t *state, size_t max_num); + +/** Encode the end of a list/map. Do some checks and deallocate backup. + * + * - Default: Adds a list terminator (0xFF) to mark the + * end of the list/map. + * - If ZCBOR_CANONICAL is defined: Instead encodes the number of members in + * the list/map header. If the header ends up a different size than expected, + * the list/map contents are moved using memmove(). + * + * Use @ref zcbor_list_map_end_force_encode to forcibly consume the backup if + * something has gone wrong. + * + * @param[inout] state The current state of the encoding. + * @param[in] max_num The maximum number of members in the list/map. Must be + * equal to the max_num provided to the corresponding + * @ref zcbor_list_start_encode call. + * Only used when ZCBOR_CANONICAL is defined. + */ +bool zcbor_list_end_encode(zcbor_state_t *state, size_t max_num); +bool zcbor_map_end_encode(zcbor_state_t *state, size_t max_num); +bool zcbor_list_map_end_force_encode(zcbor_state_t *state); + +/** Encode 0 or more elements with the same type and constraints. + * + * The encoded values are taken from the @p input array. + * + * The following is an example of encoding a list containing 3 INTS followed by + * 0 to 2 bstrs: + * + * @code{c} + * uint32_t ints[3] = ; + * struct zcbor_string bstrs[2] = ; + * bool res; + * + * res = zcbor_list_start_encode(state, 5); + * res = res && zcbor_multi_encode(3, zcbor_uint32_encode, state, + * ints, sizeof(uint32_t)); + * res = res && zcbor_multi_encode(2, zcbor_bstr_encode, state, + * bstrs, sizeof(struct zcbor_string)); + * res = res && zcbor_list_end_encode(state, 5); + * // check res + * @endcode + * + * The @ref zcbor_encoder_t type is designed to be compatible with all single- + * value encoder functions in this library, e.g. @ref zcbor_uint32_encode, + * @ref zcbor_tstr_put, @ref zcbor_nil_put, etc. For _put() functions, + * @p input will be used as a value instead of an array/pointer, so + * @p input_len will determine how much the value changes for each call. + * To encode the same value multiple times, use a @p input_len of 0. + * This function can also be used with custom decoder functions, such as those + * generated by the zcbor.py script, which for example encodes larger chunks of + * the data at once. + * + * @param[in] num_encode The actual number of elements. + * @param[in] encoder The encoder function to call under the hood. This + * function will be called with the provided arguments + * repeatedly until the function fails (returns false) + * or until it has been called @p max_encode times. + * The input pointer is moved @p input_len bytes for + * each call to @p encoder, i.e. @p input refers to an + * array of input variables. + * @param[in] input Source of the encoded values. Must be an array of + * at least @p max_encode elements. + * @param[in] input_len The length of the input variables. Must be the + * length of the individual elements in input. + * + * @retval true If at least @p min_encode variables were correctly encoded. + * @retval false If @p encoder failed before having encoded @p min_encode + * values. + */ +bool zcbor_multi_encode(size_t num_encode, zcbor_encoder_t encoder, + zcbor_state_t *state, const void *input, size_t result_len); + +/** Works like @ref zcbor_multi_encode + * + * But first checks that @p num_encode is between @p min_encode and @p max_encode. + */ +bool zcbor_multi_encode_minmax(size_t min_encode, size_t max_encode, + const size_t *num_encode, zcbor_encoder_t encoder, + zcbor_state_t *state, const void *input, size_t input_len); + + +/* Supplementary string (bstr/tstr) encoding functions: */ + +/** Encode a char/uint8_t pointer as a bstr/tstr. + * + * @param[inout] state The current state of the encoding. + * @param[in] str The value to encode. A pointer to the string/array. + * _term() uses strnlen(), so @p str must be null-terminated. + * _lit() uses sizeof()-1, so @p str must be a (null-terminated) string literal. + * _arr() uses sizeof(), so @p str must be a uint8_t array (not null-terminated). + * @param[in] len (if present) The length of the string pointed to by @p str + * @param[in] maxlen (if present) The maximum length of the string pointed to by @p str. + * This value is passed to strnlen. + */ +bool zcbor_bstr_encode_ptr(zcbor_state_t *state, const char *str, size_t len); +bool zcbor_tstr_encode_ptr(zcbor_state_t *state, const char *str, size_t len); +bool zcbor_bstr_put_term(zcbor_state_t *state, char const *str, size_t maxlen); +bool zcbor_tstr_put_term(zcbor_state_t *state, char const *str, size_t maxlen); +#define zcbor_bstr_put_lit(state, str) zcbor_bstr_encode_ptr(state, str, sizeof(str) - 1) +#define zcbor_tstr_put_lit(state, str) zcbor_tstr_encode_ptr(state, str, sizeof(str) - 1) +#define zcbor_bstr_put_arr(state, str) zcbor_bstr_encode_ptr(state, str, sizeof(str)) +#define zcbor_tstr_put_arr(state, str) zcbor_tstr_encode_ptr(state, str, sizeof(str)) + +/** Encode a bstr header. + * + * The rest of the string can be encoded as CBOR. + * A state backup is created to keep track of the element count. + * Call @ref zcbor_bstr_end_encode when done encoding the contents of the bstr. + * + * @param[inout] state The current state of the encoding. + * + * @retval true Header encoded correctly + * @retval false Header encoded incorrectly, or backup failed. + */ +bool zcbor_bstr_start_encode(zcbor_state_t *state); + +/** Finalize encoding a CBOR-encoded bstr. + * + * This writes the final size of the bstr to the header. + * Restore element count from backup. + */ +bool zcbor_bstr_end_encode(zcbor_state_t *state, struct zcbor_string *result); + +#ifdef __cplusplus +} +#endif + +#endif /* ZCBOR_ENCODE_H__ */ diff --git a/bootloader/mcuboot/boot/zcbor/include/zcbor_print.h b/bootloader/mcuboot/boot/zcbor/include/zcbor_print.h new file mode 100644 index 0000000..fc19667 --- /dev/null +++ b/bootloader/mcuboot/boot/zcbor/include/zcbor_print.h @@ -0,0 +1,170 @@ +/* + * This file has been copied from the zcbor library. + * Commit zcbor 0.8.1 + */ + +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZCBOR_PRINT_H__ +#define ZCBOR_PRINT_H__ + + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef ZCBOR_PRINT_FUNC +#include +#define zcbor_do_print(...) printf(__VA_ARGS__) +#else +#define zcbor_do_print(...) ZCBOR_PRINT_FUNC(__VA_ARGS__) +#endif + +#ifdef ZCBOR_VERBOSE +#define zcbor_trace_raw(state) (zcbor_do_print("rem: %zu, cur: 0x%x, ec: 0x%zx, err: %d",\ + (size_t)state->payload_end - (size_t)state->payload, *state->payload, state->elem_count, \ + state->constant_state ? state->constant_state->error : 0)) +#define zcbor_trace(state, appendix) do { \ + zcbor_trace_raw(state); \ + zcbor_do_print(", %s\n", appendix); \ +} while(0) +#define zcbor_trace_file(state) do { \ + zcbor_trace_raw(state); \ + zcbor_do_print(", %s:%d\n", __FILE__, __LINE__); \ +} while(0) + +#define zcbor_log_assert(expr, ...) \ +do { \ + zcbor_do_print("ASSERTION \n \"" #expr \ + "\"\nfailed at %s:%d with message:\n ", \ + __FILE__, __LINE__); \ + zcbor_do_print(__VA_ARGS__);\ +} while(0) +#define zcbor_log(...) zcbor_do_print(__VA_ARGS__) +#else +#define zcbor_trace(state, appendix) +#define zcbor_trace_file(state) ((void)state) +#define zcbor_log_assert(...) +#define zcbor_log(...) +#endif + +#ifdef ZCBOR_ASSERTS +#define zcbor_assert(expr, ...) \ +do { \ + if (!(expr)) { \ + zcbor_log_assert(expr, __VA_ARGS__); \ + ZCBOR_FAIL(); \ + } \ +} while(0) +#define zcbor_assert_state(expr, ...) \ +do { \ + if (!(expr)) { \ + zcbor_log_assert(expr, __VA_ARGS__); \ + ZCBOR_ERR(ZCBOR_ERR_ASSERTION); \ + } \ +} while(0) +#else +#define zcbor_assert(expr, ...) +#define zcbor_assert_state(expr, ...) +#endif + +__attribute__((used)) +static void zcbor_print_compare_lines(const uint8_t *str1, const uint8_t *str2, size_t size) +{ + for (size_t j = 0; j < size; j++) { + zcbor_do_print("%x ", str1[j]); + } + zcbor_do_print("\r\n"); + for (size_t j = 0; j < size; j++) { + zcbor_do_print("%x ", str2[j]); + } + zcbor_do_print("\r\n"); + for (size_t j = 0; j < size; j++) { + zcbor_do_print("%x ", str1[j] != str2[j]); + } + zcbor_do_print("\r\n"); + zcbor_do_print("\r\n"); +} + +__attribute__((used)) +static void zcbor_print_compare_strings(const uint8_t *str1, const uint8_t *str2, size_t size) +{ + const size_t col_width = 16; + + for (size_t i = 0; i <= size / col_width; i++) { + zcbor_do_print("line %zu (char %zu)\r\n", i, i*col_width); + zcbor_print_compare_lines(&str1[i*col_width], &str2[i*col_width], + MIN(col_width, (size - i*col_width))); + } + zcbor_do_print("\r\n"); +} + +__attribute__((used)) +static void zcbor_print_compare_strings_diff(const uint8_t *str1, const uint8_t *str2, size_t size) +{ + const size_t col_width = 16; + bool printed = false; + + for (size_t i = 0; i <= size / col_width; i++) { + if (memcmp(&str1[i*col_width], &str2[i*col_width], MIN(col_width, (size - i*col_width))) != 0) { + zcbor_do_print("line %zu (char %zu)\r\n", i, i*col_width); + zcbor_print_compare_lines(&str1[i*col_width], &str2[i*col_width], + MIN(col_width, (size - i*col_width))); + printed = true; + } + } + if (printed) { + zcbor_do_print("\r\n"); + } +} + +__attribute__((used)) +static const char *zcbor_error_str(int error) +{ + #define ZCBOR_ERR_CASE(err) case err: \ + return #err; /* The literal is static per C99 6.4.5 paragraph 5. */\ + + switch(error) { + ZCBOR_ERR_CASE(ZCBOR_SUCCESS) + ZCBOR_ERR_CASE(ZCBOR_ERR_NO_BACKUP_MEM) + ZCBOR_ERR_CASE(ZCBOR_ERR_NO_BACKUP_ACTIVE) + ZCBOR_ERR_CASE(ZCBOR_ERR_LOW_ELEM_COUNT) + ZCBOR_ERR_CASE(ZCBOR_ERR_HIGH_ELEM_COUNT) + ZCBOR_ERR_CASE(ZCBOR_ERR_INT_SIZE) + ZCBOR_ERR_CASE(ZCBOR_ERR_FLOAT_SIZE) + ZCBOR_ERR_CASE(ZCBOR_ERR_ADDITIONAL_INVAL) + ZCBOR_ERR_CASE(ZCBOR_ERR_NO_PAYLOAD) + ZCBOR_ERR_CASE(ZCBOR_ERR_PAYLOAD_NOT_CONSUMED) + ZCBOR_ERR_CASE(ZCBOR_ERR_WRONG_TYPE) + ZCBOR_ERR_CASE(ZCBOR_ERR_WRONG_VALUE) + ZCBOR_ERR_CASE(ZCBOR_ERR_WRONG_RANGE) + ZCBOR_ERR_CASE(ZCBOR_ERR_ITERATIONS) + ZCBOR_ERR_CASE(ZCBOR_ERR_ASSERTION) + ZCBOR_ERR_CASE(ZCBOR_ERR_PAYLOAD_OUTDATED) + ZCBOR_ERR_CASE(ZCBOR_ERR_ELEM_NOT_FOUND) + ZCBOR_ERR_CASE(ZCBOR_ERR_MAP_MISALIGNED) + ZCBOR_ERR_CASE(ZCBOR_ERR_ELEMS_NOT_PROCESSED) + ZCBOR_ERR_CASE(ZCBOR_ERR_NOT_AT_END) + ZCBOR_ERR_CASE(ZCBOR_ERR_MAP_FLAGS_NOT_AVAILABLE) + ZCBOR_ERR_CASE(ZCBOR_ERR_INVALID_VALUE_ENCODING) + } + #undef ZCBOR_ERR_CASE + + return "ZCBOR_ERR_UNKNOWN"; +} + +__attribute__((used)) +static void zcbor_print_error(int error) +{ + zcbor_do_print("%s\r\n", zcbor_error_str(error)); +} + +#ifdef __cplusplus +} +#endif + +#endif /* ZCBOR_PRINT_H__ */ diff --git a/bootloader/mcuboot/boot/zcbor/include/zcbor_tags.h b/bootloader/mcuboot/boot/zcbor/include/zcbor_tags.h new file mode 100644 index 0000000..d17e8b3 --- /dev/null +++ b/bootloader/mcuboot/boot/zcbor/include/zcbor_tags.h @@ -0,0 +1,99 @@ +/* + * This file has been copied from the zcbor library. + * Commit zcbor 0.8.1 + */ + +/* + * Copyright (c) 2022 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZCBOR_TAGS_H__ +#define ZCBOR_TAGS_H__ + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** Values defined by RFCs via www.iana.org/assignments/cbor-tags/cbor-tags.xhtml */ +enum zcbor_tag { + ZCBOR_TAG_TIME_TSTR = 0, ///! text string [RFC8949] Standard date/time string + ZCBOR_TAG_TIME_NUM = 1, ///! integer or float [RFC8949] Epoch-based date/time + ZCBOR_TAG_UBIGNUM_BSTR = 2, ///! byte string [RFC8949] Unsigned bignum + ZCBOR_TAG_BIGNUM_BSTR = 3, ///! byte string [RFC8949] Negative bignum + ZCBOR_TAG_DECFRAC_ARR = 4, ///! array [RFC8949] Decimal fraction + ZCBOR_TAG_BIGFLOAT_ARR = 5, ///! array [RFC8949] Bigfloat + ZCBOR_TAG_COSE_ENCRYPT0 = 16, ///! COSE_Encrypt0 [RFC9052] COSE Single Recipient Encrypted Data Object + ZCBOR_TAG_COSE_MAC0 = 17, ///! COSE_Mac0 [RFC9052] COSE MAC w/o Recipients Object + ZCBOR_TAG_COSE_SIGN1 = 18, ///! COSE_Sign1 [RFC9052] COSE Single Signer Data Object + ZCBOR_TAG_2BASE64URL = 21, ///! (any) [RFC8949] Expected conversion to base64url encoding + ZCBOR_TAG_2BASE64 = 22, ///! (any) [RFC8949] Expected conversion to base64 encoding + ZCBOR_TAG_2BASE16 = 23, ///! (any) [RFC8949] Expected conversion to base16 encoding + ZCBOR_TAG_BSTR = 24, ///! byte string [RFC8949] Encoded CBOR data item + ZCBOR_TAG_URI_TSTR = 32, ///! text string [RFC8949] URI + ZCBOR_TAG_BASE64URL_TSTR = 33, ///! text string [RFC8949] base64url + ZCBOR_TAG_BASE64_TSTR = 34, ///! text string [RFC8949] base64 + ZCBOR_TAG_REGEX = 35, ///! text string [RFC7049] Regular expression (UTF-8) + ZCBOR_TAG_MIME_TSTR = 36, ///! text string [RFC8949] MIME message + ZCBOR_TAG_LANG_TSTR = 38, ///! array [RFC9290] Text string with language tag + ZCBOR_TAG_MULTI_DIM_ARR_R = 40, ///! array of arrays [RFC8746] Multi-dimensional array, row-major order + ZCBOR_TAG_HOMOG_ARR = 41, ///! array [RFC8746] Homogeneous array + ZCBOR_TAG_YANG_BITS = 42, ///! text string [RFC9254] YANG bits datatype; see Section 6.7. + ZCBOR_TAG_YANG_ENUM = 43, ///! text string [RFC9254] YANG enumeration datatype; see Section 6.6. + ZCBOR_TAG_YANG_IDENTITYREF = 44, ///! uint/tstr [RFC9254] YANG identityref datatype; see Section 6.10. + ZCBOR_TAG_YANK_INSTANCE_ID = 45, ///! uint/tstr/array [RFC9254] YANG instance-identifier datatype; see Section 6.13. + ZCBOR_TAG_SID = 46, ///! uint [RFC9254] YANG Schema Item iDentifier (sid); see Section 3.2. + ZCBOR_TAG_IPV4 = 52, ///! bstr or array [RFC9164] IPv4 + ZCBOR_TAG_IPV6 = 54, ///! bstr or array [RFC9164] IPv6 + ZCBOR_TAG_CWT = 61, ///! CWT [RFC8392] CBOR Web Token + ZCBOR_TAG_TYPED_ARR_U8 = 64, ///! byte string [RFC8746] uint8 Typed Array + ZCBOR_TAG_TYPED_ARR_U16_BE = 65, ///! byte string [RFC8746] uint16, big endian, Typed Array + ZCBOR_TAG_TYPED_ARR_U32_BE = 66, ///! byte string [RFC8746] uint32, big endian, Typed Array + ZCBOR_TAG_TYPED_ARR_U64_BE = 67, ///! byte string [RFC8746] uint64, big endian, Typed Array + ZCBOR_TAG_TYPED_ARR_U8_CA = 68, ///! byte string [RFC8746] uint8 Typed Array, clamped arithmetic + ZCBOR_TAG_TYPED_ARR_U16_LE = 69, ///! byte string [RFC8746] uint16, little endian, Typed Array + ZCBOR_TAG_TYPED_ARR_U32_LE = 70, ///! byte string [RFC8746] uint32, little endian, Typed Array + ZCBOR_TAG_TYPED_ARR_U64_LE = 71, ///! byte string [RFC8746] uint64, little endian, Typed Array + ZCBOR_TAG_TYPED_ARR_S8 = 72, ///! byte string [RFC8746] sint8 Typed Array + ZCBOR_TAG_TYPED_ARR_S16_BE = 73, ///! byte string [RFC8746] sint16, big endian, Typed Array + ZCBOR_TAG_TYPED_ARR_S32_BE = 74, ///! byte string [RFC8746] sint32, big endian, Typed Array + ZCBOR_TAG_TYPED_ARR_S64_BE = 75, ///! byte string [RFC8746] sint64, big endian, Typed Array + ZCBOR_TAG_TYPED_ARR_S16_LE = 77, ///! byte string [RFC8746] sint16, little endian, Typed Array + ZCBOR_TAG_TYPED_ARR_S32_LE = 78, ///! byte string [RFC8746] sint32, little endian, Typed Array + ZCBOR_TAG_TYPED_ARR_S64_LE = 79, ///! byte string [RFC8746] sint64, little endian, Typed Array + ZCBOR_TAG_TYPED_ARR_F16_BE = 80, ///! byte string [RFC8746] IEEE 754 binary16, big endian, Typed Array + ZCBOR_TAG_TYPED_ARR_F32_BE = 81, ///! byte string [RFC8746] IEEE 754 binary32, big endian, Typed Array + ZCBOR_TAG_TYPED_ARR_F64_BE = 82, ///! byte string [RFC8746] IEEE 754 binary64, big endian, Typed Array + ZCBOR_TAG_TYPED_ARR_F128_BE = 83, ///! byte string [RFC8746] IEEE 754 binary128, big endian, Typed Array + ZCBOR_TAG_TYPED_ARR_F16_LE = 84, ///! byte string [RFC8746] IEEE 754 binary16, little endian, Typed Array + ZCBOR_TAG_TYPED_ARR_F32_LE = 85, ///! byte string [RFC8746] IEEE 754 binary32, little endian, Typed Array + ZCBOR_TAG_TYPED_ARR_F64_LE = 86, ///! byte string [RFC8746] IEEE 754 binary64, little endian, Typed Array + ZCBOR_TAG_TYPED_ARR_F128_LE = 87, ///! byte string [RFC8746] IEEE 754 binary128, little endian, Typed Array + ZCBOR_TAG_COSE_ENCRYPT = 96, ///! COSE_Encrypt [RFC9052] COSE Encrypted Data Object + ZCBOR_TAG_COSE_MAC = 97, ///! COSE_Mac [RFC9052] COSE MACed Data Object + ZCBOR_TAG_COSE_SIGN = 98, ///! COSE_Sign [RFC9052] COSE Signed Data Object + ZCBOR_TAG_EPOCH_DAYS = 100, ///! integer [RFC8943] Number of days since the epoch date 1970-01-01 + ZCBOR_TAG_REL_OID_BER_SDNV = 110, ///! bstr/array/map [RFC9090] relative object identifier (BER encoding); SDNV [RFC6256] sequence + ZCBOR_TAG_OID_BER = 111, ///! bstr/array/map [RFC9090] object identifier (BER encoding) + ZCBOR_TAG_PEN_REL_OID_BER = 112, ///! bstr/array/map [RFC9090] object identifier (BER encoding), relative to 1.3.6.1.4.1 + ZCBOR_TAG_DOTS_SIG_CHAN_OBJ = 271, ///! DOTS sig chan obj [RFC9132] DDoS Open Threat Signaling (DOTS) signal channel object + ZCBOR_TAG_FULL_DATE_STR = 1004, ///! tstr (UTF-8) [RFC8943] Full-date string + ZCBOR_TAG_MULTI_DIM_ARR_C = 1040, ///! array of arrays [RFC8746] Multi-dimensional array, column-major order + ZCBOR_TAG_CBOR = 55799, ///! (any) [RFC8949] Self-described CBOR + ZCBOR_TAG_CBOR_SEQ_FILE = 55800, ///! tagged bstr [RFC9277] indicates that the file contains CBOR Sequences + ZCBOR_TAG_CBOR_FILE_LABEL = 55801, ///! tagged bstr [RFC9277] indicates that the file starts with a CBOR-Labeled Non-CBOR Data label. + ZCBOR_TAG_COAP_CT = 1668546817, ///! bstr or (any) [RFC9277] Start of range: the representation of content-format ct < 65025 is indicated by tag number TN(ct) = 0x63740101 + (ct / 255) * 256 + ct % 255 + ZCBOR_TAG_COAP_CT_END = 1668612095, ///! bstr or (any) [RFC9277] End of range: the representation of content-format ct < 65025 is indicated by tag number TN(ct) = 0x63740101 + (ct / 255) * 256 + ct % 255 +}; + + +#ifdef __cplusplus +} +#endif + +#endif /* ZCBOR_TAGS_H__ */ diff --git a/bootloader/mcuboot/boot/zcbor/pkg.yml b/bootloader/mcuboot/boot/zcbor/pkg.yml new file mode 100644 index 0000000..f51acce --- /dev/null +++ b/bootloader/mcuboot/boot/zcbor/pkg.yml @@ -0,0 +1,27 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: boot/zcbor +pkg.description: Library for encoding and decoding data to/from cbor. +pkg.author: "Nordic Semiconductor" +pkg.homepage: "https://github.com/NordicSemiconductor/zcbor" +pkg.keywords: + - zcbor + +#pkg.src_dirs: src diff --git a/bootloader/mcuboot/boot/zcbor/src/zcbor_common.c b/bootloader/mcuboot/boot/zcbor/src/zcbor_common.c new file mode 100644 index 0000000..3697983 --- /dev/null +++ b/bootloader/mcuboot/boot/zcbor/src/zcbor_common.c @@ -0,0 +1,442 @@ +/* + * This file has been copied from the zcbor library. + * Commit zcbor 0.8.1 + */ + +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include "zcbor_common.h" +#include "zcbor_print.h" + +_Static_assert((sizeof(size_t) == sizeof(void *)), + "This code needs size_t to be the same length as pointers."); + +_Static_assert((sizeof(zcbor_state_t) >= sizeof(struct zcbor_state_constant)), + "This code needs zcbor_state_t to be at least as large as zcbor_backups_t."); + +bool zcbor_new_backup(zcbor_state_t *state, size_t new_elem_count) +{ + ZCBOR_CHECK_ERROR(); + + if ((state->constant_state->current_backup) + >= state->constant_state->num_backups) { + ZCBOR_ERR(ZCBOR_ERR_NO_BACKUP_MEM); + } + + state->payload_moved = false; + + (state->constant_state->current_backup)++; + + /* use the backup at current_backup - 1, since otherwise, the 0th + * backup would be unused. */ + size_t i = (state->constant_state->current_backup) - 1; + + memcpy(&state->constant_state->backup_list[i], state, + sizeof(zcbor_state_t)); + + state->elem_count = new_elem_count; + + zcbor_log("New backup (level %zu)\n", i); + + return true; +} + + +bool zcbor_process_backup(zcbor_state_t *state, uint32_t flags, + size_t max_elem_count) +{ + ZCBOR_CHECK_ERROR(); + zcbor_state_t local_copy = *state; + + if (state->constant_state->current_backup == 0) { + zcbor_log("No backups available.\r\n"); + ZCBOR_ERR(ZCBOR_ERR_NO_BACKUP_ACTIVE); + } + + /* use the backup at current_backup - 1, since otherwise, the + * 0th backup would be unused. */ + size_t i = state->constant_state->current_backup - 1; + + zcbor_log("Process backup (level %zu, flags 0x%x)\n", i, flags); + + if (flags & ZCBOR_FLAG_RESTORE) { + if (!(flags & ZCBOR_FLAG_KEEP_PAYLOAD)) { + if (state->constant_state->backup_list[i].payload_moved) { + zcbor_log("Payload pointer out of date.\r\n"); + ZCBOR_ERR(ZCBOR_ERR_PAYLOAD_OUTDATED); + } + } + memcpy(state, &state->constant_state->backup_list[i], + sizeof(zcbor_state_t)); + } + + if (flags & ZCBOR_FLAG_CONSUME) { + state->constant_state->current_backup--; + } + + if (local_copy.elem_count > max_elem_count) { + zcbor_log("elem_count: %zu (expected max %zu)\r\n", + local_copy.elem_count, max_elem_count); + ZCBOR_ERR(ZCBOR_ERR_HIGH_ELEM_COUNT); + } + + if (flags & ZCBOR_FLAG_KEEP_PAYLOAD) { + state->payload = local_copy.payload; + } + + if (flags & ZCBOR_FLAG_KEEP_DECODE_STATE) { + /* Copy decode state */ + state->decode_state = local_copy.decode_state; + } + + return true; +} + +static void update_backups(zcbor_state_t *state, uint8_t const *new_payload_end) +{ + if (state->constant_state) { + for (unsigned int i = 0; i < state->constant_state->current_backup; i++) { + state->constant_state->backup_list[i].payload_end = new_payload_end; + state->constant_state->backup_list[i].payload_moved = true; + } + } +} + + +bool zcbor_union_start_code(zcbor_state_t *state) +{ + if (!zcbor_new_backup(state, state->elem_count)) { + ZCBOR_FAIL(); + } + return true; +} + + +bool zcbor_union_elem_code(zcbor_state_t *state) +{ + if (!zcbor_process_backup(state, ZCBOR_FLAG_RESTORE, state->elem_count)) { + ZCBOR_FAIL(); + } + return true; +} + +bool zcbor_union_end_code(zcbor_state_t *state) +{ + if (!zcbor_process_backup(state, ZCBOR_FLAG_CONSUME, state->elem_count)) { + ZCBOR_FAIL(); + } + return true; +} + +void zcbor_new_state(zcbor_state_t *state_array, size_t n_states, + const uint8_t *payload, size_t payload_len, size_t elem_count, + uint8_t *flags, size_t flags_bytes) +{ + state_array[0].payload = payload; + state_array[0].payload_end = payload + payload_len; + state_array[0].elem_count = elem_count; + state_array[0].payload_moved = false; + state_array[0].decode_state.indefinite_length_array = false; +#ifdef ZCBOR_MAP_SMART_SEARCH + state_array[0].decode_state.map_search_elem_state = flags; + state_array[0].decode_state.map_elem_count = 0; +#else + state_array[0].decode_state.map_elems_processed = 0; + (void)flags; + (void)flags_bytes; +#endif + state_array[0].constant_state = NULL; + + if (n_states < 2) { + return; + } + + /* Use the last state as a struct zcbor_state_constant object. */ + state_array[0].constant_state = (struct zcbor_state_constant *)&state_array[n_states - 1]; + state_array[0].constant_state->backup_list = NULL; + state_array[0].constant_state->num_backups = n_states - 2; + state_array[0].constant_state->current_backup = 0; + state_array[0].constant_state->error = ZCBOR_SUCCESS; +#ifdef ZCBOR_STOP_ON_ERROR + state_array[0].constant_state->stop_on_error = false; +#endif + state_array[0].constant_state->manually_process_elem = false; +#ifdef ZCBOR_MAP_SMART_SEARCH + state_array[0].constant_state->map_search_elem_state_end = flags + flags_bytes; +#endif + if (n_states > 2) { + state_array[0].constant_state->backup_list = &state_array[1]; + } +} + +void zcbor_update_state(zcbor_state_t *state, + const uint8_t *payload, size_t payload_len) +{ + state->payload = payload; + state->payload_end = payload + payload_len; + + update_backups(state, state->payload_end); +} + + +bool zcbor_validate_string_fragments(struct zcbor_string_fragment *fragments, + size_t num_fragments) +{ + size_t total_len = 0; + + if (fragments == NULL) { + return false; + } + + for (size_t i = 0; i < num_fragments; i++) { + if (fragments[i].offset != total_len) { + return false; + } + if (fragments[i].fragment.value == NULL) { + return false; + } + if (fragments[i].total_len != fragments[0].total_len) { + return false; + } + total_len += fragments[i].fragment.len; + if (total_len > fragments[0].total_len) { + return false; + } + } + + if (num_fragments && total_len != fragments[0].total_len) { + return false; + } + + if (num_fragments && (fragments[0].total_len == ZCBOR_STRING_FRAGMENT_UNKNOWN_LENGTH)) { + for (size_t i = 0; i < num_fragments; i++) { + fragments[i].total_len = total_len; + } + } + + return true; +} + +bool zcbor_splice_string_fragments(struct zcbor_string_fragment *fragments, + size_t num_fragments, uint8_t *result, size_t *result_len) +{ + size_t total_len = 0; + + if (!fragments) { + return false; + } + + for (size_t i = 0; i < num_fragments; i++) { + if ((total_len > *result_len) + || (fragments[i].fragment.len > (*result_len - total_len))) { + return false; + } + memcpy(&result[total_len], + fragments[i].fragment.value, fragments[i].fragment.len); + total_len += fragments[i].fragment.len; + } + + *result_len = total_len; + return true; +} + + +bool zcbor_compare_strings(const struct zcbor_string *str1, + const struct zcbor_string *str2) +{ + return (str1 != NULL) && (str2 != NULL) + && (str1->value != NULL) && (str2->value != NULL) && (str1->len == str2->len) + && (memcmp(str1->value, str2->value, str1->len) == 0); +} + + +size_t zcbor_header_len(uint64_t value) +{ + if (value <= ZCBOR_VALUE_IN_HEADER) { + return 1; + } else if (value <= 0xFF) { + return 2; + } else if (value <= 0xFFFF) { + return 3; + } else if (value <= 0xFFFFFFFF) { + return 5; + } else { + return 9; + } +} + + +size_t zcbor_header_len_ptr(const void *const value, size_t value_len) +{ + uint64_t val64 = 0; + + if (value_len > sizeof(val64)) { + return 0; + } + + memcpy(((uint8_t*)&val64) + ZCBOR_ECPY_OFFS(sizeof(val64), value_len), value, value_len); + return zcbor_header_len(val64); +} + + +int zcbor_entry_function(const uint8_t *payload, size_t payload_len, + void *result, size_t *payload_len_out, zcbor_state_t *state, zcbor_decoder_t func, + size_t n_states, size_t elem_count) +{ + zcbor_new_state(state, n_states, payload, payload_len, elem_count, NULL, 0); + + bool ret = func(state, result); + + if (!ret) { + int err = zcbor_pop_error(state); + + err = (err == ZCBOR_SUCCESS) ? ZCBOR_ERR_UNKNOWN : err; + return err; + } + + if (payload_len_out != NULL) { + *payload_len_out = MIN(payload_len, + (size_t)state[0].payload - (size_t)payload); + } + return ZCBOR_SUCCESS; +} + + +/* Float16: */ +#define F16_SIGN_OFFS 15 /* Bit offset of the sign bit. */ +#define F16_EXPO_OFFS 10 /* Bit offset of the exponent. */ +#define F16_EXPO_MSK 0x1F /* Bitmask for the exponent (right shifted by F16_EXPO_OFFS). */ +#define F16_MANTISSA_MSK 0x3FF /* Bitmask for the mantissa. */ +#define F16_MAX 65520 /* Lowest float32 value that rounds up to float16 infinity. + * (65519.996 rounds to 65504) */ +#define F16_MIN_EXPO 24 /* Negative exponent of the non-zero float16 value closest to 0 (2^-24) */ +#define F16_MIN (1.0f / (1 << F16_MIN_EXPO)) /* The non-zero float16 value closest to 0 (2^-24) */ +#define F16_MIN_NORM (1.0f / (1 << 14)) /* The normalized float16 value closest to 0 (2^-14) */ +#define F16_BIAS 15 /* The exponent bias of normalized float16 values. */ + +/* Float32: */ +#define F32_SIGN_OFFS 31 /* Bit offset of the sign bit. */ +#define F32_EXPO_OFFS 23 /* Bit offset of the exponent. */ +#define F32_EXPO_MSK 0xFF /* Bitmask for the exponent (right shifted by F32_EXPO_OFFS). */ +#define F32_MANTISSA_MSK 0x7FFFFF /* Bitmask for the mantissa. */ +#define F32_BIAS 127 /* The exponent bias of normalized float32 values. */ + +/* Rounding: */ +#define SUBNORM_ROUND_MSK (F32_MANTISSA_MSK | (1 << F32_EXPO_OFFS)) /* mantissa + lsb of expo for + * tiebreak. */ +#define SUBNORM_ROUND_BIT_MSK (1 << (F32_EXPO_OFFS - 1)) /* msb of mantissa (0x400000) */ +#define NORM_ROUND_MSK (F32_MANTISSA_MSK >> (F16_EXPO_OFFS - 1)) /* excess mantissa when going from + * float32 to float16 + 1 extra bit + * for tiebreak. */ +#define NORM_ROUND_BIT_MSK (1 << (F32_EXPO_OFFS - F16_EXPO_OFFS - 1)) /* bit 12 (0x1000) */ + + +float zcbor_float16_to_32(uint16_t input) +{ + uint32_t sign = input >> F16_SIGN_OFFS; + uint32_t expo = (input >> F16_EXPO_OFFS) & F16_EXPO_MSK; + uint32_t mantissa = input & F16_MANTISSA_MSK; + + if ((expo == 0) && (mantissa != 0)) { + /* Subnormal float16 - convert to normalized float32 */ + return ((float)mantissa * F16_MIN) * (sign ? -1 : 1); + } else { + /* Normalized / zero / Infinity / NaN */ + uint32_t new_expo = (expo == 0 /* zero */) ? 0 + : (expo == F16_EXPO_MSK /* inf/NaN */) ? F32_EXPO_MSK + : (expo + (F32_BIAS - F16_BIAS)); + uint32_t value32 = (sign << F32_SIGN_OFFS) | (new_expo << F32_EXPO_OFFS) + | (mantissa << (F32_EXPO_OFFS - F16_EXPO_OFFS)); + float result; + + memcpy(&result, &value32, sizeof(result)); + return result; + } +} + + +uint16_t zcbor_float32_to_16(float input) +{ + uint32_t value32; + + memcpy(&value32, &input, sizeof(value32)); + + uint32_t sign = value32 >> F32_SIGN_OFFS; + uint32_t expo = (value32 >> F32_EXPO_OFFS) & F32_EXPO_MSK; + uint32_t mantissa = value32 & F32_MANTISSA_MSK; + + uint16_t value16 = (uint16_t)(sign << F16_SIGN_OFFS); + + uint32_t abs_value32 = value32 & ~(1 << F32_SIGN_OFFS); + float abs_input; + + memcpy(&abs_input, &abs_value32, sizeof(abs_input)); + + if (abs_input <= (F16_MIN / 2)) { + /* 0 or too small for float16. Round down to 0. value16 is already correct. */ + } else if (abs_input < F16_MIN) { + /* Round up to 2^(-24) (F16_MIN), has other rounding rules than larger values. */ + value16 |= 0x0001; + } else if (abs_input < F16_MIN_NORM) { + /* Subnormal float16 (normal float32) */ + uint32_t adjusted_mantissa = + /* Adjust for the purposes of checking rounding. */ + /* The lsb of expo is needed for the cases where expo is 103 (minimum). */ + ((value32 << (expo - (F32_BIAS - F16_MIN_EXPO))) & SUBNORM_ROUND_MSK); + uint16_t rounding_bit = + /* "Round to nearest, ties to even". */ + /* 0x400000 means ties go down towards even. (0xC00000 means ties go up.) */ + (adjusted_mantissa & SUBNORM_ROUND_BIT_MSK) + && (adjusted_mantissa != SUBNORM_ROUND_BIT_MSK); + value16 |= ((uint16_t)(abs_input * (1 << 24)) + rounding_bit); /* expo is 0 */ + } else if (abs_input < F16_MAX) { + /* Normal float16 (normal float32) */ + uint16_t rounding_bit = + /* Bit 13 of the mantissa represents which way to round, except for the */ + /* special case where bits 0-12 and 14 are 0. */ + /* This is because of "Round to nearest, ties to even". */ + /* 0x1000 means ties go down towards even. (0x3000 means ties go up.) */ + ((mantissa & NORM_ROUND_BIT_MSK) + && ((mantissa & NORM_ROUND_MSK) != NORM_ROUND_BIT_MSK)); + value16 |= (uint16_t)((expo - (F32_BIAS - F16_BIAS)) << F16_EXPO_OFFS); + value16 |= (uint16_t)(mantissa >> (F32_EXPO_OFFS - F16_EXPO_OFFS)); + value16 += rounding_bit; /* Might propagate to exponent. */ + } else if (expo != F32_EXPO_MSK || !mantissa) { + /* Infinite, or finite normal float32 too large for float16. Round up to inf. */ + value16 |= (F16_EXPO_MSK << F16_EXPO_OFFS); + } else { + /* NaN */ + /* Preserve msbit of mantissa. */ + uint16_t new_mantissa = (uint16_t)(mantissa >> (F32_EXPO_OFFS - F16_EXPO_OFFS)); + value16 |= (F16_EXPO_MSK << F16_EXPO_OFFS) | (new_mantissa ? new_mantissa : 1); + } + + return value16; +} + + +/** Weak strnlen() implementation in case it is not available. + * + * This function is in the public domain, according to: + * https://github.com/arm-embedded/gcc-arm-none-eabi.debian/blob/master/src/libiberty/strnlen.c + */ +__attribute__((__weak__)) +size_t strnlen (const char *s, size_t maxlen) +{ + size_t i; + + for (i = 0; i < maxlen; ++i) { + if (s[i] == '\0') { + break; + } + } + return i; +} diff --git a/bootloader/mcuboot/boot/zcbor/src/zcbor_decode.c b/bootloader/mcuboot/boot/zcbor/src/zcbor_decode.c new file mode 100644 index 0000000..841c341 --- /dev/null +++ b/bootloader/mcuboot/boot/zcbor/src/zcbor_decode.c @@ -0,0 +1,1572 @@ +/* + * This file has been copied from the zcbor library. + * Commit zcbor 0.8.1 + */ + +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include +#include "zcbor_decode.h" +#include "zcbor_common.h" +#include "zcbor_print.h" + + +/** Return value length from additional value. + */ +static size_t additional_len(uint8_t additional) +{ + if (additional <= ZCBOR_VALUE_IN_HEADER) { + return 0; + } else if (ZCBOR_VALUE_IS_1_BYTE <= additional && additional <= ZCBOR_VALUE_IS_8_BYTES) { + /* 24 => 1 + * 25 => 2 + * 26 => 4 + * 27 => 8 + */ + return 1U << (additional - ZCBOR_VALUE_IS_1_BYTE); + } + return 0xF; +} + + +static bool initial_checks(zcbor_state_t *state) +{ + ZCBOR_CHECK_ERROR(); + ZCBOR_CHECK_PAYLOAD(); + return true; +} + + +static bool type_check(zcbor_state_t *state, zcbor_major_type_t exp_major_type) +{ + if (!initial_checks(state)) { + ZCBOR_FAIL(); + } + zcbor_major_type_t major_type = ZCBOR_MAJOR_TYPE(*state->payload); + + if (major_type != exp_major_type) { + ZCBOR_ERR(ZCBOR_ERR_WRONG_TYPE); + } + return true; +} + + +#define INITIAL_CHECKS() \ +do {\ + if (!initial_checks(state)) { \ + ZCBOR_FAIL(); \ + } \ +} while(0) + +#define INITIAL_CHECKS_WITH_TYPE(exp_major_type) \ +do {\ + if (!type_check(state, exp_major_type)) { \ + ZCBOR_FAIL(); \ + } \ +} while(0) + +static void err_restore(zcbor_state_t *state, int err) +{ + state->payload = state->payload_bak; + state->elem_count++; + zcbor_error(state, err); +} + +#define ERR_RESTORE(err) \ +do { \ + err_restore(state, err); \ + ZCBOR_FAIL(); \ +} while(0) + +#define FAIL_RESTORE() \ +do { \ + state->payload = state->payload_bak; \ + state->elem_count++; \ + ZCBOR_FAIL(); \ +} while(0) + +#define PRINT_FUNC() zcbor_log("%s ", __func__); + + +static void endian_copy(uint8_t *dst, const uint8_t *src, size_t src_len) +{ +#ifdef ZCBOR_BIG_ENDIAN + memcpy(dst, src, src_len); +#else + for (size_t i = 0; i < src_len; i++) { + dst[i] = src[src_len - 1 - i]; + } +#endif /* ZCBOR_BIG_ENDIAN */ +} + + +/** Get a single value. + * + * @details @p ppayload must point to the header byte. This function will + * retrieve the value (either from within the additional info, or from + * the subsequent bytes) and return it in the result. The result can + * have arbitrary length. + * + * The function will also validate + * - Min/max constraints on the value. + * - That @p payload doesn't overrun past @p payload_end. + * - That @p elem_count has not been exhausted. + * + * @p ppayload and @p elem_count are updated if the function + * succeeds. If not, they are left unchanged. + * + * CBOR values are always big-endian, so this function converts from + * big to little-endian if necessary (@ref ZCBOR_BIG_ENDIAN). + */ +static bool value_extract(zcbor_state_t *state, + void *const result, size_t result_len) +{ + zcbor_trace(state, "value_extract"); + zcbor_assert_state(result_len != 0, "0-length result not supported.\r\n"); + zcbor_assert_state(result_len <= 8, "result sizes above 8 bytes not supported.\r\n"); + zcbor_assert_state(result != NULL, "result cannot be NULL.\r\n"); + + INITIAL_CHECKS(); + ZCBOR_ERR_IF((state->elem_count == 0), ZCBOR_ERR_LOW_ELEM_COUNT); + + uint8_t additional = ZCBOR_ADDITIONAL(*state->payload); + size_t len = additional_len(additional); + uint8_t *result_offs = (uint8_t *)result + ZCBOR_ECPY_OFFS(result_len, MAX(1, len)); + + ZCBOR_ERR_IF(additional > ZCBOR_VALUE_IS_8_BYTES, ZCBOR_ERR_ADDITIONAL_INVAL); + ZCBOR_ERR_IF(len > result_len, ZCBOR_ERR_INT_SIZE); + ZCBOR_ERR_IF((state->payload + len + 1) > state->payload_end, + ZCBOR_ERR_NO_PAYLOAD); + + memset(result, 0, result_len); + + if (len == 0) { + *result_offs = additional; + } else { + endian_copy(result_offs, state->payload + 1, len); + +#ifdef ZCBOR_CANONICAL + ZCBOR_ERR_IF((zcbor_header_len_ptr(result, result_len) != (len + 1)), + ZCBOR_ERR_INVALID_VALUE_ENCODING); +#endif + } + + state->payload_bak = state->payload; + (state->payload) += len + 1; + (state->elem_count)--; + return true; +} + + +bool zcbor_int_decode(zcbor_state_t *state, void *result, size_t result_size) +{ + PRINT_FUNC(); + INITIAL_CHECKS(); + zcbor_major_type_t major_type = ZCBOR_MAJOR_TYPE(*state->payload); + uint8_t *result_uint8 = (uint8_t *)result; + int8_t *result_int8 = (int8_t *)result; + + if (major_type != ZCBOR_MAJOR_TYPE_PINT + && major_type != ZCBOR_MAJOR_TYPE_NINT) { + /* Value to be read doesn't have the right type. */ + ZCBOR_ERR(ZCBOR_ERR_WRONG_TYPE); + } + + if (!value_extract(state, result, result_size)) { + ZCBOR_FAIL(); + } + +#ifdef ZCBOR_BIG_ENDIAN + if (result_int8[0] < 0) { +#else + if (result_int8[result_size - 1] < 0) { +#endif + /* Value is too large to fit in a signed integer. */ + ERR_RESTORE(ZCBOR_ERR_INT_SIZE); + } + + if (major_type == ZCBOR_MAJOR_TYPE_NINT) { + /* Convert from CBOR's representation by flipping all bits. */ + for (unsigned int i = 0; i < result_size; i++) { + result_uint8[i] = (uint8_t)~result_uint8[i]; + } + } + + return true; +} + + +bool zcbor_int32_decode(zcbor_state_t *state, int32_t *result) +{ + PRINT_FUNC(); + return zcbor_int_decode(state, result, sizeof(*result)); +} + + +bool zcbor_int64_decode(zcbor_state_t *state, int64_t *result) +{ + PRINT_FUNC(); + return zcbor_int_decode(state, result, sizeof(*result)); +} + + +bool zcbor_uint_decode(zcbor_state_t *state, void *result, size_t result_size) +{ + PRINT_FUNC(); + INITIAL_CHECKS_WITH_TYPE(ZCBOR_MAJOR_TYPE_PINT); + + if (!value_extract(state, result, result_size)) { + zcbor_log("uint with size %zu failed.\r\n", result_size); + ZCBOR_FAIL(); + } + return true; +} + + +bool zcbor_uint32_decode(zcbor_state_t *state, uint32_t *result) +{ + PRINT_FUNC(); + return zcbor_uint_decode(state, result, sizeof(*result)); +} + + +bool zcbor_int32_expect_union(zcbor_state_t *state, int32_t result) +{ + PRINT_FUNC(); + if (!zcbor_union_elem_code(state)) { + ZCBOR_FAIL(); + } + return zcbor_int32_expect(state, result); +} + + +bool zcbor_int64_expect_union(zcbor_state_t *state, int64_t result) +{ + PRINT_FUNC(); + if (!zcbor_union_elem_code(state)) { + ZCBOR_FAIL(); + } + return zcbor_int64_expect(state, result); +} + + +bool zcbor_uint32_expect_union(zcbor_state_t *state, uint32_t result) +{ + PRINT_FUNC(); + if (!zcbor_union_elem_code(state)) { + ZCBOR_FAIL(); + } + return zcbor_uint32_expect(state, result); +} + + +bool zcbor_uint64_expect_union(zcbor_state_t *state, uint64_t result) +{ + PRINT_FUNC(); + if (!zcbor_union_elem_code(state)) { + ZCBOR_FAIL(); + } + return zcbor_uint64_expect(state, result); +} + + +bool zcbor_int32_expect(zcbor_state_t *state, int32_t expected) +{ + PRINT_FUNC(); + return zcbor_int64_expect(state, expected); +} + + +bool zcbor_int32_pexpect(zcbor_state_t *state, int32_t *expected) +{ + PRINT_FUNC(); + return zcbor_int32_expect(state, *expected); +} + + +bool zcbor_int64_expect(zcbor_state_t *state, int64_t expected) +{ + PRINT_FUNC(); + int64_t actual; + + if (!zcbor_int64_decode(state, &actual)) { + ZCBOR_FAIL(); + } + + if (actual != expected) { + zcbor_log("%" PRIi64 " != %" PRIi64 "\r\n", actual, expected); + ERR_RESTORE(ZCBOR_ERR_WRONG_VALUE); + } + return true; +} + + +bool zcbor_int64_pexpect(zcbor_state_t *state, int64_t *expected) +{ + PRINT_FUNC(); + return zcbor_int64_expect(state, *expected); +} + + +bool zcbor_uint64_decode(zcbor_state_t *state, uint64_t *result) +{ + PRINT_FUNC(); + return zcbor_uint_decode(state, result, sizeof(*result)); +} + + +#ifdef ZCBOR_SUPPORTS_SIZE_T +bool zcbor_size_decode(zcbor_state_t *state, size_t *result) +{ + PRINT_FUNC(); + return zcbor_uint_decode(state, result, sizeof(*result)); +} +#endif + + +bool zcbor_uint32_expect(zcbor_state_t *state, uint32_t expected) +{ + PRINT_FUNC(); + return zcbor_uint64_expect(state, expected); +} + + +bool zcbor_uint32_pexpect(zcbor_state_t *state, uint32_t *expected) +{ + PRINT_FUNC(); + return zcbor_uint32_expect(state, *expected); +} + + +bool zcbor_uint64_expect(zcbor_state_t *state, uint64_t expected) +{ + PRINT_FUNC(); + uint64_t actual; + + if (!zcbor_uint64_decode(state, &actual)) { + ZCBOR_FAIL(); + } + if (actual != expected) { + zcbor_log("%" PRIu64 " != %" PRIu64 "\r\n", actual, expected); + ERR_RESTORE(ZCBOR_ERR_WRONG_VALUE); + } + return true; +} + + +bool zcbor_uint64_pexpect(zcbor_state_t *state, uint64_t *expected) +{ + PRINT_FUNC(); + return zcbor_uint64_expect(state, *expected); +} + + +#ifdef ZCBOR_SUPPORTS_SIZE_T +bool zcbor_size_expect(zcbor_state_t *state, size_t expected) +{ + PRINT_FUNC(); + return zcbor_uint64_expect(state, expected); +} + + +bool zcbor_size_pexpect(zcbor_state_t *state, size_t *expected) +{ + PRINT_FUNC(); + return zcbor_size_expect(state, *expected); +} +#endif + + +static bool str_start_decode(zcbor_state_t *state, + struct zcbor_string *result, zcbor_major_type_t exp_major_type) +{ + INITIAL_CHECKS_WITH_TYPE(exp_major_type); + + if (!value_extract(state, &result->len, sizeof(result->len))) { + ZCBOR_FAIL(); + } + + result->value = state->payload; + return true; +} + +static bool str_start_decode_with_overflow_check(zcbor_state_t *state, + struct zcbor_string *result, zcbor_major_type_t exp_major_type) +{ + bool res = str_start_decode(state, result, exp_major_type); + + if (!res) { + ZCBOR_FAIL(); + } + + /* Casting to size_t is safe since str_start_decode() checks that + * payload_end is bigger that payload. */ + if (result->len > (size_t)(state->payload_end - state->payload)) { + zcbor_log("error: 0x%zu > 0x%zu\r\n", + result->len, + (state->payload_end - state->payload)); + ERR_RESTORE(ZCBOR_ERR_NO_PAYLOAD); + } + + return true; +} + + +bool zcbor_bstr_start_decode(zcbor_state_t *state, struct zcbor_string *result) +{ + PRINT_FUNC(); + struct zcbor_string dummy; + if (result == NULL) { + result = &dummy; + } + + if(!str_start_decode_with_overflow_check(state, result, ZCBOR_MAJOR_TYPE_BSTR)) { + ZCBOR_FAIL(); + } + + if (!zcbor_new_backup(state, ZCBOR_MAX_ELEM_COUNT)) { + FAIL_RESTORE(); + } + + state->payload_end = result->value + result->len; + return true; +} + + +bool zcbor_bstr_end_decode(zcbor_state_t *state) +{ + ZCBOR_ERR_IF(state->payload != state->payload_end, ZCBOR_ERR_PAYLOAD_NOT_CONSUMED); + + if (!zcbor_process_backup(state, + ZCBOR_FLAG_RESTORE | ZCBOR_FLAG_CONSUME | ZCBOR_FLAG_KEEP_PAYLOAD, + ZCBOR_MAX_ELEM_COUNT)) { + ZCBOR_FAIL(); + } + + return true; +} + + +static void partition_fragment(const zcbor_state_t *state, + struct zcbor_string_fragment *result) +{ + result->fragment.len = MIN(result->fragment.len, + (size_t)state->payload_end - (size_t)state->payload); +} + + +static bool start_decode_fragment(zcbor_state_t *state, + struct zcbor_string_fragment *result, + zcbor_major_type_t exp_major_type) +{ + PRINT_FUNC(); + if(!str_start_decode(state, &result->fragment, exp_major_type)) { + ZCBOR_FAIL(); + } + + result->offset = 0; + result->total_len = result->fragment.len; + partition_fragment(state, result); + state->payload_end = state->payload + result->fragment.len; + + return true; +} + +bool zcbor_bstr_start_decode_fragment(zcbor_state_t *state, + struct zcbor_string_fragment *result) +{ + PRINT_FUNC(); + if (!start_decode_fragment(state, result, ZCBOR_MAJOR_TYPE_BSTR)) { + ZCBOR_FAIL(); + } + if (!zcbor_new_backup(state, ZCBOR_MAX_ELEM_COUNT)) { + FAIL_RESTORE(); + } + return true; +} + + +void zcbor_next_fragment(zcbor_state_t *state, + struct zcbor_string_fragment *prev_fragment, + struct zcbor_string_fragment *result) +{ + memcpy(result, prev_fragment, sizeof(*result)); + result->fragment.value = state->payload_mut; + result->offset += prev_fragment->fragment.len; + result->fragment.len = result->total_len - result->offset; + + partition_fragment(state, result); + zcbor_log("New fragment length %zu\r\n", result->fragment.len); + + state->payload += result->fragment.len; +} + + +void zcbor_bstr_next_fragment(zcbor_state_t *state, + struct zcbor_string_fragment *prev_fragment, + struct zcbor_string_fragment *result) +{ + memcpy(result, prev_fragment, sizeof(*result)); + result->fragment.value = state->payload_mut; + result->offset += prev_fragment->fragment.len; + result->fragment.len = result->total_len - result->offset; + + partition_fragment(state, result); + zcbor_log("fragment length %zu\r\n", result->fragment.len); + state->payload_end = state->payload + result->fragment.len; +} + + +bool zcbor_is_last_fragment(const struct zcbor_string_fragment *fragment) +{ + return (fragment->total_len == (fragment->offset + fragment->fragment.len)); +} + + +static bool str_decode(zcbor_state_t *state, struct zcbor_string *result, + zcbor_major_type_t exp_major_type) +{ + if (!str_start_decode_with_overflow_check(state, result, exp_major_type)) { + ZCBOR_FAIL(); + } + + state->payload += result->len; + return true; +} + + +static bool str_decode_fragment(zcbor_state_t *state, struct zcbor_string_fragment *result, + zcbor_major_type_t exp_major_type) +{ + if (!start_decode_fragment(state, result, exp_major_type)) { + ZCBOR_FAIL(); + } + + (state->payload) += result->fragment.len; + return true; +} + + +static bool str_expect(zcbor_state_t *state, struct zcbor_string *result, + zcbor_major_type_t exp_major_type) +{ + struct zcbor_string tmp_result; + + if (!str_decode(state, &tmp_result, exp_major_type)) { + ZCBOR_FAIL(); + } + if (!zcbor_compare_strings(&tmp_result, result)) { + ERR_RESTORE(ZCBOR_ERR_WRONG_VALUE); + } + return true; +} + + +bool zcbor_bstr_decode(zcbor_state_t *state, struct zcbor_string *result) +{ + PRINT_FUNC(); + return str_decode(state, result, ZCBOR_MAJOR_TYPE_BSTR); +} + + +bool zcbor_bstr_decode_fragment(zcbor_state_t *state, struct zcbor_string_fragment *result) +{ + PRINT_FUNC(); + return str_decode_fragment(state, result, ZCBOR_MAJOR_TYPE_BSTR); +} + + +bool zcbor_bstr_expect(zcbor_state_t *state, struct zcbor_string *expected) +{ + PRINT_FUNC(); + return str_expect(state, expected, ZCBOR_MAJOR_TYPE_BSTR); +} + + +bool zcbor_tstr_decode(zcbor_state_t *state, struct zcbor_string *result) +{ + PRINT_FUNC(); + return str_decode(state, result, ZCBOR_MAJOR_TYPE_TSTR); +} + + +bool zcbor_tstr_decode_fragment(zcbor_state_t *state, struct zcbor_string_fragment *result) +{ + PRINT_FUNC(); + return str_decode_fragment(state, result, ZCBOR_MAJOR_TYPE_TSTR); +} + + +bool zcbor_tstr_expect(zcbor_state_t *state, struct zcbor_string *expected) +{ + PRINT_FUNC(); + return str_expect(state, expected, ZCBOR_MAJOR_TYPE_TSTR); +} + + +bool zcbor_bstr_expect_ptr(zcbor_state_t *state, char const *ptr, size_t len) +{ + PRINT_FUNC(); + struct zcbor_string zs = { .value = (const uint8_t *)ptr, .len = len }; + + return zcbor_bstr_expect(state, &zs); +} + + +bool zcbor_tstr_expect_ptr(zcbor_state_t *state, char const *ptr, size_t len) +{ + PRINT_FUNC(); + struct zcbor_string zs = { .value = (const uint8_t *)ptr, .len = len }; + + return zcbor_tstr_expect(state, &zs); +} + + +bool zcbor_bstr_expect_term(zcbor_state_t *state, char const *string, size_t maxlen) +{ + PRINT_FUNC(); + return zcbor_bstr_expect_ptr(state, string, strnlen(string, maxlen)); +} + + +bool zcbor_tstr_expect_term(zcbor_state_t *state, char const *string, size_t maxlen) +{ + PRINT_FUNC(); + return zcbor_tstr_expect_ptr(state, string, strnlen(string, maxlen)); +} + + +static bool list_map_start_decode(zcbor_state_t *state, + zcbor_major_type_t exp_major_type) +{ + size_t new_elem_count; + bool indefinite_length_array = false; + + INITIAL_CHECKS_WITH_TYPE(exp_major_type); + +#ifndef ZCBOR_CANONICAL + if (ZCBOR_ADDITIONAL(*state->payload) == ZCBOR_VALUE_IS_INDEFINITE_LENGTH) { + /* Indefinite length array. */ + new_elem_count = ZCBOR_LARGE_ELEM_COUNT; + ZCBOR_ERR_IF(state->elem_count == 0, ZCBOR_ERR_LOW_ELEM_COUNT); + indefinite_length_array = true; + state->payload_bak = state->payload++; + state->elem_count--; + } else +#endif + { + if (!value_extract(state, &new_elem_count, sizeof(new_elem_count))) { + ZCBOR_FAIL(); + } + } + + if (!zcbor_new_backup(state, new_elem_count)) { + FAIL_RESTORE(); + } + + state->decode_state.indefinite_length_array = indefinite_length_array; + + return true; +} + + +bool zcbor_list_start_decode(zcbor_state_t *state) +{ + PRINT_FUNC(); + return list_map_start_decode(state, ZCBOR_MAJOR_TYPE_LIST); +} + + +bool zcbor_map_start_decode(zcbor_state_t *state) +{ + PRINT_FUNC(); + bool ret = list_map_start_decode(state, ZCBOR_MAJOR_TYPE_MAP); + + if (ret && !state->decode_state.indefinite_length_array) { + if (state->elem_count >= (ZCBOR_MAX_ELEM_COUNT / 2)) { + /* The new elem_count is too large. */ + ERR_RESTORE(ZCBOR_ERR_INT_SIZE); + } + state->elem_count *= 2; + } + return ret; +} + + +bool zcbor_array_at_end(zcbor_state_t *state) +{ +#ifdef ZCBOR_CANONICAL + const bool indefinite_length_array = false; +#else + const bool indefinite_length_array = state->decode_state.indefinite_length_array; +#endif + return ((!indefinite_length_array && (state->elem_count == 0)) + || (indefinite_length_array + && (state->payload < state->payload_end) + && (*state->payload == 0xFF))); +} + + +static size_t update_map_elem_count(zcbor_state_t *state, size_t elem_count); +#ifdef ZCBOR_MAP_SMART_SEARCH +static bool allocate_map_flags(zcbor_state_t *state, size_t elem_count); +#endif + + +bool zcbor_unordered_map_start_decode(zcbor_state_t *state) +{ + PRINT_FUNC(); + ZCBOR_FAIL_IF(!zcbor_map_start_decode(state)); + +#ifdef ZCBOR_MAP_SMART_SEARCH + state->decode_state.map_search_elem_state + += zcbor_flags_to_bytes(state->decode_state.map_elem_count); +#else + state->decode_state.map_elems_processed = 0; +#endif + state->decode_state.map_elem_count = 0; + state->decode_state.counting_map_elems = state->decode_state.indefinite_length_array; + + if (!state->decode_state.counting_map_elems) { + size_t old_flags = update_map_elem_count(state, state->elem_count); +#ifdef ZCBOR_MAP_SMART_SEARCH + ZCBOR_FAIL_IF(!allocate_map_flags(state, old_flags)); +#endif + (void)old_flags; + } + + return true; +} + + +/** Return the max (starting) elem_count of the current container. + * + * Should only be used for unordered maps (started with @ref zcbor_unordered_map_start_decode) + */ +static size_t zcbor_current_max_elem_count(zcbor_state_t *state) +{ + return (state->decode_state.indefinite_length_array ? \ + ZCBOR_LARGE_ELEM_COUNT : state->decode_state.map_elem_count * 2); +} + + +static bool map_restart(zcbor_state_t *state) +{ + if (!zcbor_process_backup(state, ZCBOR_FLAG_RESTORE | ZCBOR_FLAG_KEEP_DECODE_STATE, + ZCBOR_MAX_ELEM_COUNT)) { + ZCBOR_FAIL(); + } + + state->elem_count = zcbor_current_max_elem_count(state); + return true; +} + + +__attribute__((used)) +static size_t get_current_index(zcbor_state_t *state, uint32_t index_offset) +{ + /* Subtract mode because for GET, you want the index you are pointing to, while for SET, + * you want the one you just processed. This only comes into play when elem_count is even. */ + return ((zcbor_current_max_elem_count(state) - state->elem_count - index_offset) / 2); +} + + +#ifdef ZCBOR_MAP_SMART_SEARCH +#define FLAG_MODE_GET_CURRENT 0 +#define FLAG_MODE_CLEAR_CURRENT 1 +#define FLAG_MODE_CLEAR_UNUSED 2 + +static bool manipulate_flags(zcbor_state_t *state, uint32_t mode) +{ + const size_t last_index = (state->decode_state.map_elem_count - 1); + size_t index = (mode == FLAG_MODE_CLEAR_UNUSED) ? last_index : get_current_index(state, mode); + + ZCBOR_ERR_IF((index >= state->decode_state.map_elem_count), + ZCBOR_ERR_MAP_FLAGS_NOT_AVAILABLE); + uint8_t *flag_byte = &state->decode_state.map_search_elem_state[index >> 3]; + uint8_t flag_mask = (uint8_t)(1 << (index & 7)); + + switch(mode) { + case FLAG_MODE_GET_CURRENT: + return (!!(*flag_byte & flag_mask)); + case FLAG_MODE_CLEAR_CURRENT: + *flag_byte &= ~flag_mask; + return true; + case FLAG_MODE_CLEAR_UNUSED: + *flag_byte &= (uint8_t)((flag_mask << 1) - 1); + return true; + } + return false; +} + + +static bool should_try_key(zcbor_state_t *state) +{ + return manipulate_flags(state, FLAG_MODE_GET_CURRENT); +} + + +bool zcbor_elem_processed(zcbor_state_t *state) +{ + return manipulate_flags(state, FLAG_MODE_CLEAR_CURRENT); +} + + +static bool allocate_map_flags(zcbor_state_t *state, size_t old_flags) +{ + size_t new_bytes = zcbor_flags_to_bytes(state->decode_state.map_elem_count); + size_t old_bytes = zcbor_flags_to_bytes(old_flags); + size_t extra_bytes = new_bytes - old_bytes; + const uint8_t *flags_end = state->constant_state->map_search_elem_state_end; + + if (extra_bytes) { + if ((state->decode_state.map_search_elem_state + new_bytes) > flags_end) { + state->decode_state.map_elem_count + = 8 * (size_t)(flags_end - state->decode_state.map_search_elem_state); + ZCBOR_ERR(ZCBOR_ERR_MAP_FLAGS_NOT_AVAILABLE); + } + + memset(&state->decode_state.map_search_elem_state[new_bytes - extra_bytes], 0xFF, extra_bytes); + } + return true; +} +#else + +static bool should_try_key(zcbor_state_t *state) +{ + return (state->decode_state.map_elems_processed < state->decode_state.map_elem_count); +} + + +bool zcbor_elem_processed(zcbor_state_t *state) +{ + if (should_try_key(state)) { + state->decode_state.map_elems_processed++; + } + return true; +} +#endif + + +static size_t update_map_elem_count(zcbor_state_t *state, size_t elem_count) +{ + size_t old_map_elem_count = state->decode_state.map_elem_count; + + state->decode_state.map_elem_count = MAX(old_map_elem_count, elem_count / 2); + return old_map_elem_count; +} + + +static bool handle_map_end(zcbor_state_t *state) +{ + state->decode_state.counting_map_elems = false; + return map_restart(state); +} + + +static bool try_key(zcbor_state_t *state, void *key_result, zcbor_decoder_t key_decoder) +{ + uint8_t const *payload_bak2 = state->payload; + size_t elem_count_bak = state->elem_count; + + if (!key_decoder(state, (uint8_t *)key_result)) { + state->payload = payload_bak2; + state->elem_count = elem_count_bak; + return false; + } + + zcbor_log("Found element at index %zu.\n", get_current_index(state, 1)); + return true; +} + + +bool zcbor_unordered_map_search(zcbor_decoder_t key_decoder, zcbor_state_t *state, void *key_result) +{ + PRINT_FUNC(); + /* elem_count cannot be odd since the map consists of key-value-pairs. + * This might mean that this function was called while pointing at a value (instead + * of a key). */ + ZCBOR_ERR_IF(state->elem_count & 1, ZCBOR_ERR_MAP_MISALIGNED); + + uint8_t const *payload_bak = state->payload; + size_t elem_count = state->elem_count; + + /* Loop once through all the elements of the map. */ + do { + if (zcbor_array_at_end(state)) { + if (!handle_map_end(state)) { + goto error; + } + continue; /* This continue is needed so the loop stops both if elem_count is + * at the very start or the very end of the map. */ + } + + if (state->decode_state.counting_map_elems) { + size_t m_elem_count = ZCBOR_LARGE_ELEM_COUNT - state->elem_count + 2; + size_t old_flags = update_map_elem_count(state, m_elem_count); +#ifdef ZCBOR_MAP_SMART_SEARCH + ZCBOR_FAIL_IF(!allocate_map_flags(state, old_flags)); +#endif + (void)old_flags; + } + + if (should_try_key(state) && try_key(state, key_result, key_decoder)) { + if (!state->constant_state->manually_process_elem) { + ZCBOR_FAIL_IF(!zcbor_elem_processed(state)); + } + return true; + } + + /* Skip over both the key and the value. */ + if (!zcbor_any_skip(state, NULL) || !zcbor_any_skip(state, NULL)) { + goto error; + } + } while (state->elem_count != elem_count); + + zcbor_error(state, ZCBOR_ERR_ELEM_NOT_FOUND); +error: + state->payload = payload_bak; + state->elem_count = elem_count; + ZCBOR_FAIL(); +} + + +bool zcbor_search_key_bstr_ptr(zcbor_state_t *state, char const *ptr, size_t len) +{ + struct zcbor_string zs = { .value = (const uint8_t *)ptr, .len = len }; + + return zcbor_unordered_map_search((zcbor_decoder_t *)zcbor_bstr_expect, state, &zs); +} + + +bool zcbor_search_key_tstr_ptr(zcbor_state_t *state, char const *ptr, size_t len) +{ + struct zcbor_string zs = { .value = (const uint8_t *)ptr, .len = len }; + + return zcbor_unordered_map_search((zcbor_decoder_t *)zcbor_tstr_expect, state, &zs); +} + + +bool zcbor_search_key_bstr_term(zcbor_state_t *state, char const *str, size_t maxlen) +{ + return zcbor_search_key_bstr_ptr(state, str, strnlen(str, maxlen)); +} + + +bool zcbor_search_key_tstr_term(zcbor_state_t *state, char const *str, size_t maxlen) +{ + return zcbor_search_key_tstr_ptr(state, str, strnlen(str, maxlen)); +} + + +static bool array_end_expect(zcbor_state_t *state) +{ + INITIAL_CHECKS(); + ZCBOR_ERR_IF(*state->payload != 0xFF, ZCBOR_ERR_WRONG_TYPE); + + state->payload++; + return true; +} + + +static bool list_map_end_decode(zcbor_state_t *state) +{ + size_t max_elem_count = 0; + +#ifndef ZCBOR_CANONICAL + if (state->decode_state.indefinite_length_array) { + if (!array_end_expect(state)) { + ZCBOR_FAIL(); + } + max_elem_count = ZCBOR_MAX_ELEM_COUNT; + state->decode_state.indefinite_length_array = false; + } +#endif + if (!zcbor_process_backup(state, + ZCBOR_FLAG_RESTORE | ZCBOR_FLAG_CONSUME | ZCBOR_FLAG_KEEP_PAYLOAD, + max_elem_count)) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_list_end_decode(zcbor_state_t *state) +{ + PRINT_FUNC(); + return list_map_end_decode(state); +} + + +bool zcbor_map_end_decode(zcbor_state_t *state) +{ + PRINT_FUNC(); + return list_map_end_decode(state); +} + + +bool zcbor_unordered_map_end_decode(zcbor_state_t *state) +{ + /* Checking zcbor_array_at_end() ensures that check is valid. + * In case the map is at the end, but state->decode_state.counting_map_elems isn't updated.*/ + ZCBOR_ERR_IF(!zcbor_array_at_end(state) && state->decode_state.counting_map_elems, + ZCBOR_ERR_ELEMS_NOT_PROCESSED); + + if (state->decode_state.map_elem_count > 0) { +#ifdef ZCBOR_MAP_SMART_SEARCH + manipulate_flags(state, FLAG_MODE_CLEAR_UNUSED); + + for (size_t i = 0; i < zcbor_flags_to_bytes(state->decode_state.map_elem_count); i++) { + if (state->decode_state.map_search_elem_state[i] != 0) { + zcbor_log("unprocessed element(s) in map: [%zu] = 0x%02x\n", + i, state->decode_state.map_search_elem_state[i]); + ZCBOR_ERR(ZCBOR_ERR_ELEMS_NOT_PROCESSED); + } + } +#else + ZCBOR_ERR_IF(should_try_key(state), ZCBOR_ERR_ELEMS_NOT_PROCESSED); +#endif + } + while (!zcbor_array_at_end(state)) { + zcbor_any_skip(state, NULL); + } + return zcbor_map_end_decode(state); +} + + +bool zcbor_list_map_end_force_decode(zcbor_state_t *state) +{ + if (!zcbor_process_backup(state, + ZCBOR_FLAG_RESTORE | ZCBOR_FLAG_CONSUME | ZCBOR_FLAG_KEEP_PAYLOAD, + ZCBOR_MAX_ELEM_COUNT)) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_simple_decode(zcbor_state_t *state, uint8_t *result) +{ + PRINT_FUNC(); + PRINT_FUNC(); + INITIAL_CHECKS_WITH_TYPE(ZCBOR_MAJOR_TYPE_SIMPLE); + + /* Simple values must be 0-23 (additional is 0-23) or 24-255 (additional is 24). + * Other additional values are not considered simple values. */ + ZCBOR_ERR_IF(ZCBOR_ADDITIONAL(*state->payload) > 24, ZCBOR_ERR_WRONG_TYPE); + + if (!value_extract(state, result, sizeof(*result))) { + ZCBOR_FAIL(); + } + return true; +} + + +bool zcbor_simple_expect(zcbor_state_t *state, uint8_t expected) +{ + PRINT_FUNC(); + uint8_t actual; + + if (!zcbor_simple_decode(state, &actual)) { + ZCBOR_FAIL(); + } + + if (actual != expected) { + zcbor_log("simple value %u != %u\r\n", actual, expected); + ERR_RESTORE(ZCBOR_ERR_WRONG_VALUE); + } + + return true; +} + + +bool zcbor_simple_pexpect(zcbor_state_t *state, uint8_t *expected) +{ + PRINT_FUNC(); + return zcbor_simple_expect(state, *expected); +} + + +bool zcbor_nil_expect(zcbor_state_t *state, void *unused) +{ + PRINT_FUNC(); + (void)unused; + return zcbor_simple_expect(state, 22); +} + + +bool zcbor_undefined_expect(zcbor_state_t *state, void *unused) +{ + PRINT_FUNC(); + (void)unused; + return zcbor_simple_expect(state, 23); +} + + +bool zcbor_bool_decode(zcbor_state_t *state, bool *result) +{ + PRINT_FUNC(); + uint8_t value; + + if (!zcbor_simple_decode(state, &value)) { + ZCBOR_FAIL(); + } + value -= ZCBOR_BOOL_TO_SIMPLE; + if (value > 1) { + ERR_RESTORE(ZCBOR_ERR_WRONG_TYPE); + } + *result = value; + + zcbor_log("boolval: %u\r\n", *result); + return true; +} + + +bool zcbor_bool_expect(zcbor_state_t *state, bool expected) +{ + PRINT_FUNC(); + return zcbor_simple_expect(state, (uint8_t)(!!expected) + ZCBOR_BOOL_TO_SIMPLE); +} + + +bool zcbor_bool_pexpect(zcbor_state_t *state, bool *expected) +{ + PRINT_FUNC(); + return zcbor_bool_expect(state, *expected); +} + + +static bool float_check(zcbor_state_t *state, uint8_t additional_val) +{ + INITIAL_CHECKS_WITH_TYPE(ZCBOR_MAJOR_TYPE_SIMPLE); + ZCBOR_ERR_IF(ZCBOR_ADDITIONAL(*state->payload) != additional_val, ZCBOR_ERR_FLOAT_SIZE); + return true; +} + + +bool zcbor_float16_bytes_decode(zcbor_state_t *state, uint16_t *result) +{ + PRINT_FUNC(); + ZCBOR_FAIL_IF(!float_check(state, ZCBOR_VALUE_IS_2_BYTES)); + + if (!value_extract(state, result, sizeof(*result))) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float16_bytes_expect(zcbor_state_t *state, uint16_t expected) +{ + PRINT_FUNC(); + uint16_t actual; + + if (!zcbor_float16_bytes_decode(state, &actual)) { + ZCBOR_FAIL(); + } + if (actual != expected) { + ERR_RESTORE(ZCBOR_ERR_WRONG_VALUE); + } + return true; +} + + +bool zcbor_float16_bytes_pexpect(zcbor_state_t *state, uint16_t *expected) +{ + PRINT_FUNC(); + return zcbor_float16_bytes_expect(state, *expected); +} + + +bool zcbor_float16_decode(zcbor_state_t *state, float *result) +{ + PRINT_FUNC(); + uint16_t value16; + + if (!zcbor_float16_bytes_decode(state, &value16)) { + ZCBOR_FAIL(); + } + + *result = zcbor_float16_to_32(value16); + return true; +} + + +bool zcbor_float16_expect(zcbor_state_t *state, float expected) +{ + PRINT_FUNC(); + float actual; + + if (!zcbor_float16_decode(state, &actual)) { + ZCBOR_FAIL(); + } + if (actual != expected) { + ERR_RESTORE(ZCBOR_ERR_WRONG_VALUE); + } + return true; +} + + +bool zcbor_float16_pexpect(zcbor_state_t *state, float *expected) +{ + PRINT_FUNC(); + return zcbor_float16_expect(state, *expected); +} + + +bool zcbor_float32_decode(zcbor_state_t *state, float *result) +{ + PRINT_FUNC(); + ZCBOR_FAIL_IF(!float_check(state, ZCBOR_VALUE_IS_4_BYTES)); + + if (!value_extract(state, result, sizeof(*result))) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float32_expect(zcbor_state_t *state, float expected) +{ + PRINT_FUNC(); + float actual; + + if (!zcbor_float32_decode(state, &actual)) { + ZCBOR_FAIL(); + } + if (actual != expected) { + ERR_RESTORE(ZCBOR_ERR_WRONG_VALUE); + } + return true; +} + + +bool zcbor_float32_pexpect(zcbor_state_t *state, float *expected) +{ + PRINT_FUNC(); + return zcbor_float32_expect(state, *expected); +} + + +bool zcbor_float16_32_decode(zcbor_state_t *state, float *result) +{ + PRINT_FUNC(); + if (zcbor_float16_decode(state, result)) { + /* Do nothing */ + } else if (!zcbor_float32_decode(state, result)) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float16_32_expect(zcbor_state_t *state, float expected) +{ + PRINT_FUNC(); + if (zcbor_float16_expect(state, expected)) { + /* Do nothing */ + } else if (!zcbor_float32_expect(state, expected)) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float16_32_pexpect(zcbor_state_t *state, float *expected) +{ + PRINT_FUNC(); + return zcbor_float16_32_expect(state, *expected); +} + + +bool zcbor_float64_decode(zcbor_state_t *state, double *result) +{ + PRINT_FUNC(); + ZCBOR_FAIL_IF(!float_check(state, ZCBOR_VALUE_IS_8_BYTES)); + + if (!value_extract(state, result, sizeof(*result))) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float64_expect(zcbor_state_t *state, double expected) +{ + PRINT_FUNC(); + double actual; + + if (!zcbor_float64_decode(state, &actual)) { + ZCBOR_FAIL(); + } + if (actual != expected) { + ERR_RESTORE(ZCBOR_ERR_WRONG_VALUE); + } + return true; +} + + +bool zcbor_float64_pexpect(zcbor_state_t *state, double *expected) +{ + PRINT_FUNC(); + return zcbor_float64_expect(state, *expected); +} + + +bool zcbor_float32_64_decode(zcbor_state_t *state, double *result) +{ + PRINT_FUNC(); + float float_result; + + if (zcbor_float32_decode(state, &float_result)) { + *result = (double)float_result; + } else if (!zcbor_float64_decode(state, result)) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float32_64_expect(zcbor_state_t *state, double expected) +{ + PRINT_FUNC(); + if (zcbor_float64_expect(state, expected)) { + /* Do nothing */ + } else if (!zcbor_float32_expect(state, (float)expected)) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float32_64_pexpect(zcbor_state_t *state, double *expected) +{ + PRINT_FUNC(); + return zcbor_float32_64_expect(state, *expected); +} + + +bool zcbor_float_decode(zcbor_state_t *state, double *result) +{ + PRINT_FUNC(); + float float_result; + + if (zcbor_float16_decode(state, &float_result)) { + *result = (double)float_result; + } else if (zcbor_float32_decode(state, &float_result)) { + *result = (double)float_result; + } else if (!zcbor_float64_decode(state, result)) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float_expect(zcbor_state_t *state, double expected) +{ + PRINT_FUNC(); + if (zcbor_float16_expect(state, (float)expected)) { + /* Do nothing */ + } else if (zcbor_float32_expect(state, (float)expected)) { + /* Do nothing */ + } else if (!zcbor_float64_expect(state, expected)) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float_pexpect(zcbor_state_t *state, double *expected) +{ + PRINT_FUNC(); + return zcbor_float_expect(state, *expected); +} + + +bool zcbor_any_skip(zcbor_state_t *state, void *result) +{ + PRINT_FUNC(); + zcbor_assert_state(result == NULL, + "'any' type cannot be returned, only skipped.\r\n"); + (void)result; + + INITIAL_CHECKS(); + zcbor_major_type_t major_type = ZCBOR_MAJOR_TYPE(*state->payload); + uint8_t additional = ZCBOR_ADDITIONAL(*state->payload); + uint64_t value = 0; /* In case of indefinite_length_array. */ + zcbor_state_t state_copy; + + memcpy(&state_copy, state, sizeof(zcbor_state_t)); + + while (major_type == ZCBOR_MAJOR_TYPE_TAG) { + uint32_t tag_dummy; + + if (!zcbor_tag_decode(&state_copy, &tag_dummy)) { + ZCBOR_FAIL(); + } + ZCBOR_ERR_IF(state_copy.payload >= state_copy.payload_end, ZCBOR_ERR_NO_PAYLOAD); + major_type = ZCBOR_MAJOR_TYPE(*state_copy.payload); + additional = ZCBOR_ADDITIONAL(*state_copy.payload); + } + +#ifdef ZCBOR_CANONICAL + const bool indefinite_length_array = false; +#else + const bool indefinite_length_array = ((additional == ZCBOR_VALUE_IS_INDEFINITE_LENGTH) + && ((major_type == ZCBOR_MAJOR_TYPE_LIST) || (major_type == ZCBOR_MAJOR_TYPE_MAP))); +#endif + + if (!indefinite_length_array && !value_extract(&state_copy, &value, sizeof(value))) { + /* Can happen because of elem_count (or payload_end) */ + ZCBOR_FAIL(); + } + + switch (major_type) { + case ZCBOR_MAJOR_TYPE_BSTR: + case ZCBOR_MAJOR_TYPE_TSTR: + /* 'value' is the length of the BSTR or TSTR. + * The subtraction is safe because value_extract() above + * checks that payload_end is greater than payload. */ + ZCBOR_ERR_IF( + value > (uint64_t)(state_copy.payload_end - state_copy.payload), + ZCBOR_ERR_NO_PAYLOAD); + (state_copy.payload) += value; + break; + case ZCBOR_MAJOR_TYPE_MAP: + ZCBOR_ERR_IF(value > (SIZE_MAX / 2), ZCBOR_ERR_INT_SIZE); + value *= 2; + /* fallthrough */ + case ZCBOR_MAJOR_TYPE_LIST: + if (indefinite_length_array) { + state_copy.payload++; + value = ZCBOR_LARGE_ELEM_COUNT; + } + state_copy.elem_count = (size_t)value; + state_copy.decode_state.indefinite_length_array = indefinite_length_array; + while (!zcbor_array_at_end(&state_copy)) { + if (!zcbor_any_skip(&state_copy, NULL)) { + ZCBOR_FAIL(); + } + } + if (indefinite_length_array && !array_end_expect(&state_copy)) { + ZCBOR_FAIL(); + } + break; + default: + /* Do nothing */ + break; + } + + state->payload = state_copy.payload; + state->elem_count--; + + return true; +} + + +bool zcbor_tag_decode(zcbor_state_t *state, uint32_t *result) +{ + PRINT_FUNC(); + INITIAL_CHECKS_WITH_TYPE(ZCBOR_MAJOR_TYPE_TAG); + + if (!value_extract(state, result, sizeof(*result))) { + ZCBOR_FAIL(); + } + state->elem_count++; + return true; +} + + +bool zcbor_tag_expect(zcbor_state_t *state, uint32_t expected) +{ + PRINT_FUNC(); + uint32_t actual; + + if (!zcbor_tag_decode(state, &actual)) { + ZCBOR_FAIL(); + } + if (actual != expected) { + ERR_RESTORE(ZCBOR_ERR_WRONG_VALUE); + } + return true; +} + + +bool zcbor_tag_pexpect(zcbor_state_t *state, uint32_t *expected) +{ + PRINT_FUNC(); + return zcbor_tag_expect(state, *expected); +} + + +bool zcbor_multi_decode(size_t min_decode, + size_t max_decode, + size_t *num_decode, + zcbor_decoder_t decoder, + zcbor_state_t *state, + void *result, + size_t result_len) +{ + PRINT_FUNC(); + ZCBOR_CHECK_ERROR(); + for (size_t i = 0; i < max_decode; i++) { + uint8_t const *payload_bak = state->payload; + size_t elem_count_bak = state->elem_count; + + if (!decoder(state, + (uint8_t *)result + i*result_len)) { + *num_decode = i; + state->payload = payload_bak; + state->elem_count = elem_count_bak; + ZCBOR_ERR_IF(i < min_decode, ZCBOR_ERR_ITERATIONS); + zcbor_log("Found %zu elements.\r\n", i); + return true; + } + } + zcbor_log("Found %zu elements.\r\n", max_decode); + *num_decode = max_decode; + return true; +} + + +bool zcbor_present_decode(bool *present, + zcbor_decoder_t decoder, + zcbor_state_t *state, + void *result) +{ + PRINT_FUNC(); + size_t num_decode = 0; + bool retval = zcbor_multi_decode(0, 1, &num_decode, decoder, state, result, 0); + + zcbor_assert_state(retval, "zcbor_multi_decode should not fail with these parameters.\r\n"); + + *present = !!num_decode; + return retval; +} + + +void zcbor_new_decode_state(zcbor_state_t *state_array, size_t n_states, + const uint8_t *payload, size_t payload_len, size_t elem_count, + uint8_t *flags, size_t flags_bytes) +{ + zcbor_new_state(state_array, n_states, payload, payload_len, elem_count, flags, flags_bytes); +} diff --git a/bootloader/mcuboot/boot/zcbor/src/zcbor_encode.c b/bootloader/mcuboot/boot/zcbor/src/zcbor_encode.c new file mode 100644 index 0000000..53d19c0 --- /dev/null +++ b/bootloader/mcuboot/boot/zcbor/src/zcbor_encode.c @@ -0,0 +1,614 @@ +/* + * This file has been copied from the zcbor library. + * Commit zcbor 0.8.1 + */ + +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include "zcbor_encode.h" +#include "zcbor_common.h" +#include "zcbor_print.h" + +_Static_assert((sizeof(size_t) == sizeof(void *)), + "This code needs size_t to be the same length as pointers."); + + +static uint8_t log2ceil(size_t val) +{ + switch(val) { + case 1: return 0; + case 2: return 1; + case 3: return 2; + case 4: return 2; + case 5: return 3; + case 6: return 3; + case 7: return 3; + case 8: return 3; + } + + zcbor_log("Should not come here.\r\n"); + return 0; +} + + +static uint8_t get_additional(size_t len, uint8_t value0) +{ + return len == 0 ? value0 : (uint8_t)(24 + log2ceil(len)); +} + + +static bool encode_header_byte(zcbor_state_t *state, + zcbor_major_type_t major_type, uint8_t additional) +{ + ZCBOR_CHECK_ERROR(); + ZCBOR_CHECK_PAYLOAD(); + + zcbor_assert_state(additional < 32, "Unsupported additional value: %d\r\n", additional); + + *(state->payload_mut++) = (uint8_t)((major_type << 5) | (additional & 0x1F)); + return true; +} + + +/** Encode a single value. + */ +static bool value_encode_len(zcbor_state_t *state, zcbor_major_type_t major_type, + const void *const result, size_t result_len) +{ + uint8_t *u8_result = (uint8_t *)result; + + if ((state->payload + 1 + result_len) > state->payload_end) { + ZCBOR_ERR(ZCBOR_ERR_NO_PAYLOAD); + } + + if (!encode_header_byte(state, major_type, + get_additional(result_len, u8_result[0]))) { + ZCBOR_FAIL(); + } + state->payload_mut--; + zcbor_trace(state, "value_encode_len"); + state->payload_mut++; + +#ifdef ZCBOR_BIG_ENDIAN + memcpy(state->payload_mut, u8_result, result_len); + state->payload_mut += result_len; +#else + for (; result_len > 0; result_len--) { + *(state->payload_mut++) = u8_result[result_len - 1]; + } +#endif /* ZCBOR_BIG_ENDIAN */ + + state->elem_count++; + return true; +} + + +static bool value_encode(zcbor_state_t *state, zcbor_major_type_t major_type, + const void *const input, size_t max_result_len) +{ + zcbor_assert_state(max_result_len != 0, "0-length result not supported.\r\n"); + + size_t result_len = zcbor_header_len_ptr(input, max_result_len) - 1; + const void *result = input; + +#ifdef ZCBOR_BIG_ENDIAN + result = (uint8_t *)input + max_result_len - (result_len ? result_len : 1); +#endif + + return value_encode_len(state, major_type, result, result_len); +} + + +bool zcbor_int_encode(zcbor_state_t *state, const void *input_int, size_t int_size) +{ + zcbor_major_type_t major_type; + uint8_t input_buf[8]; + const uint8_t *input_uint8 = input_int; + const int8_t *input_int8 = input_int; + const uint8_t *input = input_int; + + if (int_size > sizeof(int64_t)) { + ZCBOR_ERR(ZCBOR_ERR_INT_SIZE); + } + +#ifdef ZCBOR_BIG_ENDIAN + if (input_int8[0] < 0) { +#else + if (input_int8[int_size - 1] < 0) { +#endif + major_type = ZCBOR_MAJOR_TYPE_NINT; + + /* Convert to CBOR's representation by flipping all bits. */ + for (unsigned int i = 0; i < int_size; i++) { + input_buf[i] = (uint8_t)~input_uint8[i]; + } + input = input_buf; + } else { + major_type = ZCBOR_MAJOR_TYPE_PINT; + } + + if (!value_encode(state, major_type, input, int_size)) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_uint_encode(zcbor_state_t *state, const void *input_uint, size_t uint_size) +{ + if (!value_encode(state, ZCBOR_MAJOR_TYPE_PINT, input_uint, uint_size)) { + zcbor_log("uint with size %zu failed.\r\n", uint_size); + ZCBOR_FAIL(); + } + return true; +} + + +bool zcbor_int32_encode(zcbor_state_t *state, const int32_t *input) +{ + return zcbor_int_encode(state, input, sizeof(*input)); +} + + +bool zcbor_int64_encode(zcbor_state_t *state, const int64_t *input) +{ + return zcbor_int_encode(state, input, sizeof(*input)); +} + + +bool zcbor_uint32_encode(zcbor_state_t *state, const uint32_t *input) +{ + return zcbor_uint_encode(state, input, sizeof(*input)); +} + + +bool zcbor_uint64_encode(zcbor_state_t *state, const uint64_t *input) +{ + return zcbor_uint_encode(state, input, sizeof(*input)); +} + + +bool zcbor_int32_put(zcbor_state_t *state, int32_t input) +{ + return zcbor_int_encode(state, &input, sizeof(input)); +} + + +bool zcbor_int64_put(zcbor_state_t *state, int64_t input) +{ + return zcbor_int_encode(state, &input, sizeof(input)); +} + + +bool zcbor_uint32_put(zcbor_state_t *state, uint32_t input) +{ + return zcbor_uint_encode(state, &input, sizeof(input)); +} + + +bool zcbor_uint64_put(zcbor_state_t *state, uint64_t input) +{ + return zcbor_uint_encode(state, &input, sizeof(input)); +} + + +#ifdef ZCBOR_SUPPORTS_SIZE_T +bool zcbor_size_put(zcbor_state_t *state, size_t input) +{ + return zcbor_uint_encode(state, &input, sizeof(input)); +} + + +bool zcbor_size_encode(zcbor_state_t *state, const size_t *input) +{ + return zcbor_uint_encode(state, input, sizeof(*input)); +} +#endif + +static bool str_start_encode(zcbor_state_t *state, + const struct zcbor_string *input, zcbor_major_type_t major_type) +{ + if (input->value && ((zcbor_header_len_ptr(&input->len, sizeof(input->len)) + + input->len + (size_t)state->payload) + > (size_t)state->payload_end)) { + ZCBOR_ERR(ZCBOR_ERR_NO_PAYLOAD); + } + if (!value_encode(state, major_type, &input->len, sizeof(input->len))) { + ZCBOR_FAIL(); + } + + return true; +} + + +static size_t remaining_str_len(zcbor_state_t *state) +{ + size_t max_len = (size_t)state->payload_end - (size_t)state->payload; + size_t result_len = zcbor_header_len_ptr(&max_len, sizeof(max_len)) - 1; + + return max_len - result_len - 1; +} + + +bool zcbor_bstr_start_encode(zcbor_state_t *state) +{ + if (!zcbor_new_backup(state, 0)) { + ZCBOR_FAIL(); + } + + uint64_t max_len = remaining_str_len(state); + + /* Encode a dummy header */ + if (!value_encode(state, ZCBOR_MAJOR_TYPE_BSTR, &max_len, sizeof(max_len))) { + ZCBOR_FAIL(); + } + return true; +} + + +bool zcbor_bstr_end_encode(zcbor_state_t *state, struct zcbor_string *result) +{ + const uint8_t *payload = state->payload; + struct zcbor_string dummy_value; + + if (result == NULL) { + /* Use a dummy value for the sake of the length calculation below. + * Will not be returned. + */ + result = &dummy_value; + } + + if (!zcbor_process_backup(state, ZCBOR_FLAG_RESTORE | ZCBOR_FLAG_CONSUME, 0xFFFFFFFF)) { + ZCBOR_FAIL(); + } + + result->value = state->payload_end - remaining_str_len(state); + result->len = (size_t)payload - (size_t)result->value; + + /* Reencode header of list now that we know the number of elements. */ + if (!zcbor_bstr_encode(state, result)) { + ZCBOR_FAIL(); + } + return true; +} + + +static bool str_encode(zcbor_state_t *state, + const struct zcbor_string *input, zcbor_major_type_t major_type) +{ + ZCBOR_CHECK_PAYLOAD(); /* To make the size_t cast below safe. */ + if (input->len > (size_t)(state->payload_end - state->payload)) { + ZCBOR_ERR(ZCBOR_ERR_NO_PAYLOAD); + } + if (!str_start_encode(state, input, major_type)) { + ZCBOR_FAIL(); + } + if (state->payload_mut != input->value) { + /* Use memmove since string might be encoded into the same space + * because of bstrx_cbor_start_encode/bstrx_cbor_end_encode. */ + memmove(state->payload_mut, input->value, input->len); + } + state->payload += input->len; + return true; +} + + +bool zcbor_bstr_encode(zcbor_state_t *state, const struct zcbor_string *input) +{ + return str_encode(state, input, ZCBOR_MAJOR_TYPE_BSTR); +} + + +bool zcbor_tstr_encode(zcbor_state_t *state, const struct zcbor_string *input) +{ + return str_encode(state, input, ZCBOR_MAJOR_TYPE_TSTR); +} + + +bool zcbor_bstr_encode_ptr(zcbor_state_t *state, const char *str, size_t len) +{ + const struct zcbor_string zs = { .value = (const uint8_t *)str, .len = len }; + + return zcbor_bstr_encode(state, &zs); +} + + +bool zcbor_tstr_encode_ptr(zcbor_state_t *state, const char *str, size_t len) +{ + const struct zcbor_string zs = { .value = (const uint8_t *)str, .len = len }; + + return zcbor_tstr_encode(state, &zs); +} + + +bool zcbor_bstr_put_term(zcbor_state_t *state, char const *str, size_t maxlen) +{ + return zcbor_bstr_encode_ptr(state, str, strnlen(str, maxlen)); +} + + +bool zcbor_tstr_put_term(zcbor_state_t *state, char const *str, size_t maxlen) +{ + return zcbor_tstr_encode_ptr(state, str, strnlen(str, maxlen)); +} + + +static bool list_map_start_encode(zcbor_state_t *state, size_t max_num, + zcbor_major_type_t major_type) +{ +#ifdef ZCBOR_CANONICAL + if (!zcbor_new_backup(state, 0)) { + ZCBOR_FAIL(); + } + + /* Encode dummy header with max number of elements. */ + if (!value_encode(state, major_type, &max_num, sizeof(max_num))) { + ZCBOR_FAIL(); + } + state->elem_count--; /* Because of dummy header. */ +#else + (void)max_num; + + if (!encode_header_byte(state, major_type, ZCBOR_VALUE_IS_INDEFINITE_LENGTH)) { + ZCBOR_FAIL(); + } +#endif + return true; +} + + +bool zcbor_list_start_encode(zcbor_state_t *state, size_t max_num) +{ + return list_map_start_encode(state, max_num, ZCBOR_MAJOR_TYPE_LIST); +} + + +bool zcbor_map_start_encode(zcbor_state_t *state, size_t max_num) +{ + return list_map_start_encode(state, max_num, ZCBOR_MAJOR_TYPE_MAP); +} + + +static bool list_map_end_encode(zcbor_state_t *state, size_t max_num, + zcbor_major_type_t major_type) +{ +#ifdef ZCBOR_CANONICAL + size_t list_count = ((major_type == ZCBOR_MAJOR_TYPE_LIST) ? + state->elem_count + : (state->elem_count / 2)); + + const uint8_t *payload = state->payload; + + size_t max_header_len = zcbor_header_len_ptr(&max_num, 4) - 1; + size_t header_len = zcbor_header_len_ptr(&list_count, 4) - 1; + + if (!zcbor_process_backup(state, ZCBOR_FLAG_RESTORE | ZCBOR_FLAG_CONSUME, 0xFFFFFFFF)) { + ZCBOR_FAIL(); + } + + zcbor_log("list_count: %zu\r\n", list_count); + + + /** If max_num is smaller than the actual number of encoded elements, + * the value_encode() below will corrupt the data if the encoded + * header is larger than the previously encoded header. */ + if (header_len > max_header_len) { + zcbor_log("max_num too small.\r\n"); + ZCBOR_ERR(ZCBOR_ERR_HIGH_ELEM_COUNT); + } + + /* Reencode header of list now that we know the number of elements. */ + if (!(value_encode(state, major_type, &list_count, sizeof(list_count)))) { + ZCBOR_FAIL(); + } + + if (max_header_len != header_len) { + const uint8_t *start = state->payload + max_header_len - header_len; + size_t body_size = (size_t)payload - (size_t)start; + + memmove(state->payload_mut, start, body_size); + /* Reset payload pointer to end of list */ + state->payload += body_size; + } else { + /* Reset payload pointer to end of list */ + state->payload = payload; + } +#else + (void)max_num; + (void)major_type; + if (!encode_header_byte(state, ZCBOR_MAJOR_TYPE_SIMPLE, ZCBOR_VALUE_IS_INDEFINITE_LENGTH)) { + ZCBOR_FAIL(); + } +#endif + return true; +} + + +bool zcbor_list_end_encode(zcbor_state_t *state, size_t max_num) +{ + return list_map_end_encode(state, max_num, ZCBOR_MAJOR_TYPE_LIST); +} + + +bool zcbor_map_end_encode(zcbor_state_t *state, size_t max_num) +{ + return list_map_end_encode(state, max_num, ZCBOR_MAJOR_TYPE_MAP); +} + + +bool zcbor_list_map_end_force_encode(zcbor_state_t *state) +{ +#ifdef ZCBOR_CANONICAL + if (!zcbor_process_backup(state, ZCBOR_FLAG_RESTORE | ZCBOR_FLAG_CONSUME, + ZCBOR_MAX_ELEM_COUNT)) { + ZCBOR_FAIL(); + } +#endif + (void)state; + return true; +} + + +bool zcbor_simple_encode(zcbor_state_t *state, uint8_t *input) +{ + if (!value_encode(state, ZCBOR_MAJOR_TYPE_SIMPLE, input, sizeof(*input))) { + zcbor_log("Error encoding %u (0x%p)\r\n", *input, input); + ZCBOR_FAIL(); + } + return true; +} + + +bool zcbor_simple_put(zcbor_state_t *state, uint8_t input) +{ + return value_encode(state, ZCBOR_MAJOR_TYPE_SIMPLE, &input, sizeof(input)); +} + + +bool zcbor_nil_put(zcbor_state_t *state, const void *unused) +{ + (void)unused; + return zcbor_simple_put(state, 22); +} + + +bool zcbor_undefined_put(zcbor_state_t *state, const void *unused) +{ + (void)unused; + return zcbor_simple_put(state, 23); +} + + +bool zcbor_bool_encode(zcbor_state_t *state, const bool *input) +{ + return zcbor_bool_put(state, *input); +} + + +bool zcbor_bool_put(zcbor_state_t *state, bool input) +{ + return zcbor_simple_put(state, (!!input + ZCBOR_BOOL_TO_SIMPLE)); +} + + +bool zcbor_float64_encode(zcbor_state_t *state, const double *input) +{ + if (!value_encode_len(state, ZCBOR_MAJOR_TYPE_SIMPLE, input, + sizeof(*input))) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float64_put(zcbor_state_t *state, double input) +{ + return zcbor_float64_encode(state, &input); +} + + +bool zcbor_float32_encode(zcbor_state_t *state, const float *input) +{ + if (!value_encode_len(state, ZCBOR_MAJOR_TYPE_SIMPLE, input, + sizeof(*input))) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float32_put(zcbor_state_t *state, float input) +{ + return zcbor_float32_encode(state, &input); +} + + +bool zcbor_float16_encode(zcbor_state_t *state, const float *input) +{ + return zcbor_float16_put(state, *input); +} + + +bool zcbor_float16_put(zcbor_state_t *state, float input) +{ + return zcbor_float16_bytes_put(state, zcbor_float32_to_16(input)); +} + + +bool zcbor_float16_bytes_encode(zcbor_state_t *state, const uint16_t *input) +{ + if (!value_encode_len(state, ZCBOR_MAJOR_TYPE_SIMPLE, input, + sizeof(*input))) { + ZCBOR_FAIL(); + } + + return true; +} + + +bool zcbor_float16_bytes_put(zcbor_state_t *state, uint16_t input) +{ + return zcbor_float16_bytes_encode(state, &input); +} + + +bool zcbor_tag_put(zcbor_state_t *state, uint32_t tag) +{ + if (!value_encode(state, ZCBOR_MAJOR_TYPE_TAG, &tag, sizeof(tag))) { + ZCBOR_FAIL(); + } + state->elem_count--; + + return true; +} + + +bool zcbor_tag_encode(zcbor_state_t *state, uint32_t *tag) +{ + return zcbor_tag_put(state, *tag); +} + + +bool zcbor_multi_encode_minmax(size_t min_encode, size_t max_encode, + const size_t *num_encode, zcbor_encoder_t encoder, + zcbor_state_t *state, const void *input, size_t result_len) +{ + + if ((*num_encode >= min_encode) && (*num_encode <= max_encode)) { + return zcbor_multi_encode(*num_encode, encoder, state, input, result_len); + } else { + ZCBOR_ERR(ZCBOR_ERR_ITERATIONS); + } +} + + +bool zcbor_multi_encode(const size_t num_encode, zcbor_encoder_t encoder, + zcbor_state_t *state, const void *input, size_t result_len) +{ + ZCBOR_CHECK_ERROR(); + for (size_t i = 0; i < num_encode; i++) { + if (!encoder(state, (const uint8_t *)input + i*result_len)) { + ZCBOR_FAIL(); + } + } + zcbor_log("Encoded %zu elements.\n", num_encode); + return true; +} + + +void zcbor_new_encode_state(zcbor_state_t *state_array, size_t n_states, + uint8_t *payload, size_t payload_len, size_t elem_count) +{ + zcbor_new_state(state_array, n_states, payload, payload_len, elem_count, NULL, 0); +} diff --git a/bootloader/mcuboot/boot/zephyr/CMakeLists.txt b/bootloader/mcuboot/boot/zephyr/CMakeLists.txt new file mode 100644 index 0000000..3a34064 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/CMakeLists.txt @@ -0,0 +1,635 @@ +# CMakeLists.txt for building mcuboot as a Zephyr project +# +# Copyright (c) 2017 Open Source Foundries Limited +# Copyright (c) 2023 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 + +cmake_minimum_required(VERSION 3.13.1) + +# find_package(Zephyr) in order to load application boilerplate: +# http://docs.zephyrproject.org/application/application.html +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +project(NONE) + +# Path to "boot" subdirectory of repository root. +get_filename_component(BOOT_DIR ${APPLICATION_SOURCE_DIR} DIRECTORY) +# Path to top-level repository root directory. +get_filename_component(MCUBOOT_DIR ${BOOT_DIR} DIRECTORY) +# Path to tinycrypt library source subdirectory of MCUBOOT_DIR. +set(TINYCRYPT_DIR "${MCUBOOT_DIR}/ext/tinycrypt/lib") +assert_exists(TINYCRYPT_DIR) +set(TINYCRYPT_SHA512_DIR "${MCUBOOT_DIR}/ext/tinycrypt-sha512/lib") +assert_exists(TINYCRYPT_SHA512_DIR) +# Path to crypto-fiat +set(FIAT_DIR "${MCUBOOT_DIR}/ext/fiat") +assert_exists(FIAT_DIR) +# Path to mbed-tls' asn1 parser library. +set(MBEDTLS_ASN1_DIR "${MCUBOOT_DIR}/ext/mbedtls-asn1") +assert_exists(MBEDTLS_ASN1_DIR) +set(MCUBOOT_NRF_EXT_DIR "${MCUBOOT_DIR}/ext/nrf") + +if(CONFIG_BOOT_USE_NRF_CC310_BL) + if(NOT EXISTS ${ZEPHYR_NRFXLIB_MODULE_DIR}) + message(FATAL_ERROR " + ------------------------------------------------------------------------ + No such file or directory: ${ZEPHYR_NRFXLIB_MODULE_DIR} + The current configuration enables nRF CC310 crypto accelerator hardware + with the `CONFIG_BOOT_USE_NRF_CC310_BL` option. Please follow + `ext/nrf/README.md` guide to fix your setup or use tinycrypt instead of + the HW accelerator. + To use the tinycrypt set `CONFIG_BOOT_ECDSA_TINYCRYPT` to y. + ------------------------------------------------------------------------") + endif() +endif() + +zephyr_library_include_directories( + include + targets + ) +if(EXISTS targets/${BOARD}.h) + zephyr_library_compile_definitions(MCUBOOT_TARGET_CONFIG="${BOARD}.h") +endif() + +if(DEFINED CONFIG_MBEDTLS) + zephyr_library_include_directories( + ${ZEPHYR_MBEDTLS_MODULE_DIR}/include + ) +endif() + +# Zephyr port-specific sources. +zephyr_library_sources( + main.c + io.c + flash_map_extended.c + os.c + keys.c + ) + +if(DEFINED CONFIG_ENABLE_MGMT_PERUSER) + zephyr_library_sources( + boot_serial_extensions.c + ) + + zephyr_linker_sources_ifdef( + CONFIG_ENABLE_MGMT_PERUSER + SECTIONS include/boot_serial/boot_serial.ld + ) + + if(DEFINED CONFIG_BOOT_MGMT_CUSTOM_STORAGE_ERASE OR DEFINED CONFIG_BOOT_MGMT_CUSTOM_IMG_LIST) + zephyr_library_sources( + boot_serial_extension_zephyr_basic.c + ) + endif() +endif() + +if(NOT DEFINED CONFIG_FLASH_PAGE_LAYOUT) + zephyr_library_sources( + flash_map_legacy.c + ) +endif() + +if(DEFINED CONFIG_BOOT_SHARE_BACKEND_RETENTION) + zephyr_library_sources( + shared_data.c + ) +endif() + +# Generic bootutil sources and includes. +zephyr_library_include_directories(${BOOT_DIR}/bootutil/include) +zephyr_library_sources( + ${BOOT_DIR}/bootutil/src/image_validate.c + ${BOOT_DIR}/bootutil/src/tlv.c + ${BOOT_DIR}/bootutil/src/encrypted.c + ${BOOT_DIR}/bootutil/src/image_rsa.c + ${BOOT_DIR}/bootutil/src/image_ecdsa.c + ${BOOT_DIR}/bootutil/src/image_ed25519.c + ${BOOT_DIR}/bootutil/src/bootutil_misc.c + ${BOOT_DIR}/bootutil/src/fault_injection_hardening.c + ) + +if(DEFINED CONFIG_BOOT_ENCRYPT_X25519 AND DEFINED CONFIG_BOOT_ED25519_PSA) + zephyr_library_sources(${BOOT_DIR}/bootutil/src/encrypted_psa.c) +endif() + +if(DEFINED CONFIG_MEASURED_BOOT OR DEFINED CONFIG_BOOT_SHARE_DATA) + zephyr_library_sources( + ${BOOT_DIR}/bootutil/src/boot_record.c + ) + + # Set a define for this file which will allow inclusion of the Zephyr version + # include file + set_source_files_properties( + ${BOOT_DIR}/bootutil/src/boot_record.c + PROPERTIES COMPILE_FLAGS -DZEPHYR_VER_INCLUDE=1 + ) +endif() + +# library which might be common source code for MCUBoot and an application +zephyr_link_libraries(MCUBOOT_BOOTUTIL) + +if(CONFIG_BOOT_FIH_PROFILE_HIGH) +zephyr_library_sources( + ${BOOT_DIR}/bootutil/src/fault_injection_hardening_delay_rng_mbedtls.c + ) +endif() + +if(CONFIG_SINGLE_APPLICATION_SLOT) +zephyr_library_sources( + ${BOOT_DIR}/zephyr/single_loader.c + ) +zephyr_library_include_directories(${BOOT_DIR}/bootutil/src) +elseif(CONFIG_BOOT_FIRMWARE_LOADER) +zephyr_library_sources( + ${BOOT_DIR}/zephyr/firmware_loader.c + ) +zephyr_library_include_directories(${BOOT_DIR}/bootutil/src) +else() + if(NOT CONFIG_MCUBOOT_APPLICATION_IMAGE_NUMBER EQUAL "-1") + # Sysbuild + zephyr_library_sources( + ${BOOT_DIR}/bootutil/src/loader.c + ) + else() + # Legacy child/parent image + zephyr_library_sources( + ${BOOT_DIR}/bootutil/src/loader_legacy_child_parent.c + ) + endif() +zephyr_library_sources( + ${BOOT_DIR}/bootutil/src/swap_misc.c + ${BOOT_DIR}/bootutil/src/swap_scratch.c + ${BOOT_DIR}/bootutil/src/swap_move.c + ${BOOT_DIR}/bootutil/src/caps.c + ) + + if(NOT CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER EQUAL "-1" AND NOT CONFIG_BOOT_UPGRADE_ONLY) + zephyr_library_sources( + ${BOOT_DIR}/bootutil/src/swap_nsib.c + ) + endif() +endif() + +if(CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256 OR CONFIG_BOOT_ENCRYPT_EC256) + zephyr_library_include_directories( + ${MBEDTLS_ASN1_DIR}/include + ) + zephyr_library_sources( + # Additionally pull in just the ASN.1 parser from mbedTLS. + ${MBEDTLS_ASN1_DIR}/src/asn1parse.c + ${MBEDTLS_ASN1_DIR}/src/platform_util.c + ) + if(CONFIG_BOOT_USE_TINYCRYPT) + # When using ECDSA signatures, pull in our copy of the tinycrypt library. + zephyr_library_include_directories( + ${BOOT_DIR}/zephyr/include + ${TINYCRYPT_DIR}/include + ) + zephyr_include_directories(${TINYCRYPT_DIR}/include) + + zephyr_library_sources( + ${TINYCRYPT_DIR}/source/ecc.c + ${TINYCRYPT_DIR}/source/ecc_dsa.c + ${TINYCRYPT_DIR}/source/sha256.c + ${TINYCRYPT_DIR}/source/utils.c + ) + elseif(CONFIG_BOOT_USE_NRF_CC310_BL) + zephyr_library_sources(${MCUBOOT_NRF_EXT_DIR}/cc310_glue.c) + zephyr_library_include_directories(${MCUBOOT_NRF_EXT_DIR}) + zephyr_link_libraries(nrfxlib_crypto) + elseif(CONFIG_BOOT_USE_NRF_EXTERNAL_CRYPTO) + zephyr_include_directories(${BL_CRYPTO_DIR}/../include) + endif() + + # Since here we are not using Zephyr's mbedTLS but rather our own, we need + # to set MBEDTLS_CONFIG_FILE ourselves. When using Zephyr's copy, this + # variable is set by its Kconfig in the Zephyr codebase. + zephyr_library_compile_definitions( + MBEDTLS_CONFIG_FILE="${CMAKE_CURRENT_LIST_DIR}/include/mcuboot-mbedtls-cfg.h" + ) +elseif(CONFIG_BOOT_SIGNATURE_TYPE_NONE) + zephyr_library_include_directories( + ${BOOT_DIR}/zephyr/include + ${TINYCRYPT_DIR}/include + ) + + zephyr_library_sources( + ${TINYCRYPT_DIR}/source/sha256.c + ${TINYCRYPT_DIR}/source/utils.c + ) +elseif(CONFIG_BOOT_SIGNATURE_TYPE_RSA) + # Use mbedTLS provided by Zephyr for RSA signatures. (Its config file + # is set using Kconfig.) + zephyr_include_directories(include) + if(CONFIG_BOOT_ENCRYPT_RSA) + set_source_files_properties( + ${BOOT_DIR}/bootutil/src/encrypted.c + PROPERTIES + INCLUDE_DIRECTORIES ${ZEPHYR_MBEDTLS_MODULE_DIR}/library + ) + endif() +elseif(CONFIG_BOOT_SIGNATURE_TYPE_ED25519 OR CONFIG_BOOT_ENCRYPT_X25519) + if(CONFIG_BOOT_USE_TINYCRYPT) + zephyr_library_include_directories( + ${MBEDTLS_ASN1_DIR}/include + ${BOOT_DIR}/zephyr/include + ${TINYCRYPT_DIR}/include + ${TINYCRYPT_SHA512_DIR}/include + ) + zephyr_library_sources( + ${TINYCRYPT_DIR}/source/sha256.c + ${TINYCRYPT_DIR}/source/utils.c + ${TINYCRYPT_SHA512_DIR}/source/sha512.c + # Additionally pull in just the ASN.1 parser from mbedTLS. + ${MBEDTLS_ASN1_DIR}/src/asn1parse.c + ${MBEDTLS_ASN1_DIR}/src/platform_util.c + ) + zephyr_library_compile_definitions( + MBEDTLS_CONFIG_FILE="${CMAKE_CURRENT_LIST_DIR}/include/mcuboot-mbedtls-cfg.h" + ) + else() + zephyr_include_directories(include) + endif() + + zephyr_library_include_directories( + ${BOOT_DIR}/zephyr/include + ${FIAT_DIR}/include/ + ) + + if(NOT CONFIG_BOOT_ED25519_PSA) + zephyr_library_sources( + ${FIAT_DIR}/src/curve25519.c + ) + else() + zephyr_library_sources( + ${MBEDTLS_ASN1_DIR}/src/asn1parse.c + ${BOOT_DIR}/bootutil/src/ed25519_psa.c + ) + endif() +endif() + +if(NOT CONFIG_BOOT_ED25519_PSA) + if(CONFIG_BOOT_ENCRYPT_EC256 OR CONFIG_BOOT_ENCRYPT_X25519) + zephyr_library_sources( + ${TINYCRYPT_DIR}/source/aes_encrypt.c + ${TINYCRYPT_DIR}/source/aes_decrypt.c + ${TINYCRYPT_DIR}/source/ctr_mode.c + ${TINYCRYPT_DIR}/source/hmac.c + ${TINYCRYPT_DIR}/source/ecc_dh.c + ) + endif() +endif() + +if(CONFIG_BOOT_ENCRYPT_EC256) + zephyr_library_sources( + ${TINYCRYPT_DIR}/source/ecc_dh.c + ) +endif() + +if(CONFIG_BOOT_DECOMPRESSION) + zephyr_library_sources( + decompression.c + ) +endif() + +if(CONFIG_MCUBOOT_SERIAL) + zephyr_sources(${BOOT_DIR}/zephyr/serial_adapter.c) + zephyr_sources(${BOOT_DIR}/boot_serial/src/boot_serial.c) + zephyr_sources(${BOOT_DIR}/boot_serial/src/zcbor_bulk.c) + + zephyr_include_directories(${BOOT_DIR}/bootutil/include) + zephyr_include_directories(${BOOT_DIR}/boot_serial/include) + zephyr_include_directories(include) + + zephyr_include_directories_ifdef( + CONFIG_BOOT_ERASE_PROGRESSIVELY + ${BOOT_DIR}/bootutil/src + ) + + if(CONFIG_BOOT_ENCRYPT_IMAGE) + zephyr_library_sources( + ${BOOT_DIR}/boot_serial/src/boot_serial_encryption.c + ) + endif() +endif() + +if(NOT CONFIG_BOOT_SIGNATURE_USING_KMU AND NOT CONFIG_BOOT_SIGNATURE_KEY_FILE STREQUAL "") + # CONF_FILE points to the KConfig configuration files of the bootloader. + foreach (filepath ${CONF_FILE}) + file(READ ${filepath} temp_text) + string(FIND "${temp_text}" ${CONFIG_BOOT_SIGNATURE_KEY_FILE} match) + if (${match} GREATER_EQUAL 0) + if (NOT DEFINED CONF_DIR) + get_filename_component(CONF_DIR ${filepath} DIRECTORY) + else() + message(FATAL_ERROR "Signature key file defined in multiple conf files") + endif() + endif() + endforeach() + + if(IS_ABSOLUTE ${CONFIG_BOOT_SIGNATURE_KEY_FILE}) + set(KEY_FILE ${CONFIG_BOOT_SIGNATURE_KEY_FILE}) + elseif((DEFINED CONF_DIR) AND + (EXISTS ${CONF_DIR}/${CONFIG_BOOT_SIGNATURE_KEY_FILE})) + set(KEY_FILE ${CONF_DIR}/${CONFIG_BOOT_SIGNATURE_KEY_FILE}) + else() + set(KEY_FILE ${MCUBOOT_DIR}/${CONFIG_BOOT_SIGNATURE_KEY_FILE}) + endif() + message("MCUBoot bootloader key file: ${KEY_FILE}") + + set_property( + GLOBAL + PROPERTY + KEY_FILE + ${KEY_FILE} + ) + + set(GENERATED_PUBKEY ${ZEPHYR_BINARY_DIR}/autogen-pubkey.c) + add_custom_command( + OUTPUT ${GENERATED_PUBKEY} + COMMAND + ${PYTHON_EXECUTABLE} + ${MCUBOOT_DIR}/scripts/imgtool.py + getpub + -k + ${KEY_FILE} + > ${GENERATED_PUBKEY} + DEPENDS ${KEY_FILE} + ) + zephyr_library_sources(${GENERATED_PUBKEY}) +endif() + +if(CONFIG_BOOT_ENCRYPTION_KEY_FILE AND NOT CONFIG_BOOT_ENCRYPTION_KEY_FILE STREQUAL "") + # CONF_FILE points to the KConfig configuration files of the bootloader. + unset(CONF_DIR) + foreach(filepath ${CONF_FILE}) + file(READ ${filepath} temp_text) + string(FIND "${temp_text}" ${CONFIG_BOOT_ENCRYPTION_KEY_FILE} match) + if(${match} GREATER_EQUAL 0) + if(NOT DEFINED CONF_DIR) + get_filename_component(CONF_DIR ${filepath} DIRECTORY) + else() + message(FATAL_ERROR "Encryption key file defined in multiple conf files") + endif() + endif() + endforeach() + + if(IS_ABSOLUTE ${CONFIG_BOOT_ENCRYPTION_KEY_FILE}) + set(KEY_FILE ${CONFIG_BOOT_ENCRYPTION_KEY_FILE}) + elseif((DEFINED CONF_DIR) AND + (EXISTS ${CONF_DIR}/${CONFIG_BOOT_ENCRYPTION_KEY_FILE})) + set(KEY_FILE ${CONF_DIR}/${CONFIG_BOOT_ENCRYPTION_KEY_FILE}) + else() + set(KEY_FILE ${MCUBOOT_DIR}/${CONFIG_BOOT_ENCRYPTION_KEY_FILE}) + endif() + message("MCUBoot bootloader encryption key file: ${KEY_FILE}") + + set(GENERATED_ENCKEY ${ZEPHYR_BINARY_DIR}/autogen-enckey.c) + add_custom_command( + OUTPUT ${GENERATED_ENCKEY} + COMMAND + ${PYTHON_EXECUTABLE} + ${MCUBOOT_DIR}/scripts/imgtool.py + getpriv + -k + ${KEY_FILE} + > ${GENERATED_ENCKEY} + DEPENDS ${KEY_FILE} + ) + zephyr_library_sources(${GENERATED_ENCKEY}) +endif() + +if(CONFIG_MCUBOOT_CLEANUP_ARM_CORE) +zephyr_library_sources( + ${BOOT_DIR}/zephyr/arm_cleanup.c +) +endif() + +if(CONFIG_MCUBOOT_BOOT_BANNER) + # Replace Zephyr's boot banner with the MCUboot one + zephyr_sources(kernel/banner.c) +endif() + +function(align_up num align result) + math(EXPR out "(((${num}) + ((${align}) - 1)) & ~((${align}) - 1))") + set(${result} "${out}" PARENT_SCOPE) +endfunction() + +function(dt_get_parent node) + string(FIND "${${node}}" "/" pos REVERSE) + + if(pos EQUAL -1) + message(ERROR "Unable to get parent of node: ${${node}}") + endif() + + string(SUBSTRING "${${node}}" 0 ${pos} ${node}) + set(${node} "${${node}}" PARENT_SCOPE) +endfunction() + +if(CONFIG_BOOT_MAX_IMG_SECTORS_AUTO) + dt_nodelabel(slot0_flash NODELABEL "slot0_partition") + dt_prop(slot0_size PATH "${slot0_flash}" PROPERTY "reg" INDEX 1) + dt_get_parent(slot0_flash) + dt_get_parent(slot0_flash) + dt_prop(erase_size_slot0 PATH "${slot0_flash}" PROPERTY "erase-block-size") + + if(NOT DEFINED slot0_size) + message(WARNING "Unable to determine size of slot0 partition, cannot calculate minimum sector usage") + elseif(NOT DEFINED erase_size_slot0) + message(WARNING "Unable to determine erase size of slot0 partition, cannot calculate minimum sector usage") + else() + math(EXPR slot_min_sectors "${slot0_size} / ${erase_size_slot0}") + endif() + + if(NOT CONFIG_SINGLE_APPLICATION_SLOT) + dt_nodelabel(slot1_flash NODELABEL "slot1_partition") + dt_prop(slot1_size PATH "${slot1_flash}" PROPERTY "reg" INDEX 1) + dt_get_parent(slot1_flash) + dt_get_parent(slot1_flash) + dt_prop(erase_size_slot1 PATH "${slot1_flash}" PROPERTY "erase-block-size") + + if(NOT DEFINED slot1_size) + message(WARNING "Unable to determine size of slot1 partition, cannot calculate minimum sector usage") + elseif(NOT DEFINED erase_size_slot1) + message(WARNING "Unable to determine erase size of slot1 partition, cannot calculate minimum sector usage") + else() + math(EXPR slot1_min_sectors "${slot1_size} / ${erase_size_slot1}") + + if("${slot1_min_sectors}" GREATER "${slot_min_sectors}") + set(slot_min_sectors ${slot1_min_sectors}) + endif() + endif() + endif() + + if(DEFINED slot_min_sectors AND "${slot_min_sectors}" GREATER "0") + zephyr_compile_definitions("MIN_SECTOR_COUNT=${slot_min_sectors}") + message("Calculated maximum number of sectors: ${slot_min_sectors}") + else() + message(WARNING "Unable to calculate minimum number of sector sizes, falling back to 128 sector default. Please disable CONFIG_BOOT_MAX_IMG_SECTORS_AUTO and set CONFIG_BOOT_MAX_IMG_SECTORS to the required value") + endif() +endif() + +if(SYSBUILD) + if(CONFIG_SINGLE_APPLICATION_SLOT OR CONFIG_BOOT_FIRMWARE_LOADER OR CONFIG_BOOT_SWAP_USING_SCRATCH OR CONFIG_BOOT_SWAP_USING_MOVE OR CONFIG_BOOT_UPGRADE_ONLY OR CONFIG_BOOT_DIRECT_XIP OR CONFIG_BOOT_RAM_LOAD) + # TODO: RAM LOAD support + dt_nodelabel(slot0_flash NODELABEL "slot0_partition") + dt_get_parent(slot0_flash) + dt_get_parent(slot0_flash) + + if(NOT CONFIG_SINGLE_APPLICATION_SLOT) + dt_nodelabel(slot1_flash NODELABEL "slot1_partition") + dt_get_parent(slot1_flash) + dt_get_parent(slot1_flash) + + if(NOT "${slot0_flash}" STREQUAL "${slot1_flash}") + # Check both slots for the one with the largest write/erase block size + dt_prop(erase_size_slot0 PATH "${slot0_flash}" PROPERTY "erase-block-size") + dt_prop(write_size_slot0 PATH "${slot0_flash}" PROPERTY "write-block-size") + dt_prop(erase_size_slot1 PATH "${slot1_flash}" PROPERTY "erase-block-size") + dt_prop(write_size_slot1 PATH "${slot1_flash}" PROPERTY "write-block-size") + + if(DEFINED erase_size_slot0 AND DEFINED erase_size_slot1) + if(${erase_size_slot0} GREATER ${erase_size_slot1}) + set(erase_size ${erase_size_slot0}) + else() + set(erase_size ${erase_size_slot1}) + endif() + elseif(DEFINED erase_size_slot0) + set(erase_size ${erase_size_slot0}) + elseif(DEFINED erase_size_slot1) + set(erase_size ${erase_size_slot1}) + endif() + + if(DEFINED write_size_slot0 AND DEFINED write_size_slot1) + if(${write_size_slot0} GREATER ${write_size_slot1}) + set(write_size ${write_size_slot0}) + else() + set(write_size ${write_size_slot1}) + endif() + elseif(DEFINED write_size_slot0) + set(write_size ${write_size_slot0}) + elseif(DEFINED write_size_slot1) + set(write_size ${write_size_slot1}) + endif() + else() + dt_prop(erase_size PATH "${slot0_flash}" PROPERTY "erase-block-size") + dt_prop(write_size PATH "${slot0_flash}" PROPERTY "write-block-size") + endif() + else() + dt_prop(erase_size PATH "${slot0_flash}" PROPERTY "erase-block-size") + dt_prop(write_size PATH "${slot0_flash}" PROPERTY "write-block-size") + endif() + + if(NOT DEFINED erase_size) + message(WARNING "Unable to determine erase size of slot0 or slot1 partition, setting to 1 (this is probably wrong)") + set(erase_size 1) + endif() + + if(NOT DEFINED write_size) + message(WARNING "Unable to determine write size of slot0 or slot1 partition, setting to 8 (this is probably wrong)") + set(write_size 8) + endif() + + if(${write_size} LESS 8) + set(max_align_size 8) + else() + set(max_align_size ${write_size}) + endif() + + set(key_size 0) + + # Boot trailer magic size + set(boot_magic_size 16) + + # Estimates for trailer TLV data size, this was taken from hello world builds for nrf52840dk + if(CONFIG_BOOT_SIGNATURE_TYPE_RSA) + if(CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN EQUAL 3072) + set(boot_tlv_estimate 464) + else() + set(boot_tlv_estimate 336) + endif() + elseif(CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256) + set(boot_tlv_estimate 150) + elseif(CONFIG_BOOT_SIGNATURE_TYPE_ED25519) + set(boot_tlv_estimate 144) + else() + set(boot_tlv_estimate 40) + endif() + + if(CONFIG_BOOT_ENCRYPT_RSA OR CONFIG_BOOT_ENCRYPT_EC256 OR CONFIG_BOOT_ENCRYPT_X25519) + # 128-bit AES key size + set(boot_enc_key_size 16) + + if(CONFIG_BOOT_SWAP_SAVE_ENCTLV) + if(CONFIG_BOOT_ENCRYPT_RSA) + set(key_size 256) + elseif(CONFIG_BOOT_ENCRYPT_EC256) + math(EXPR key_size "65 + 32 + ${boot_enc_key_size}") + elseif(CONFIG_BOOT_ENCRYPT_X25519) + math(EXPR key_size "32 + 32 + ${boot_enc_key_size}") + endif() + else() + set(key_size "${boot_enc_key_size}") + endif() + + align_up(${key_size} ${max_align_size} key_size) + math(EXPR key_size "${key_size} * 2") + endif() + + align_up(${boot_magic_size} ${write_size} boot_magic_size) + + if(CONFIG_SINGLE_APPLICATION_SLOT OR CONFIG_BOOT_FIRMWARE_LOADER) + set(boot_swap_data_size 0) + else() + math(EXPR boot_swap_data_size "${max_align_size} * 4") + endif() + + if(CONFIG_BOOT_SWAP_USING_SCRATCH OR CONFIG_BOOT_SWAP_USING_MOVE) + if(CONFIG_BOOT_MAX_IMG_SECTORS_AUTO AND DEFINED slot_min_sectors AND "${slot_min_sectors}" GREATER "0") + math(EXPR boot_status_data_size "${slot_min_sectors} * (3 * ${write_size})") + else() + math(EXPR boot_status_data_size "${CONFIG_BOOT_MAX_IMG_SECTORS} * (3 * ${write_size})") + endif() + else() + set(boot_status_data_size 0) + endif() + + math(EXPR required_size "${key_size} + ${boot_magic_size} + ${boot_swap_data_size} + ${boot_status_data_size} + ${boot_tlv_estimate}") + align_up(${required_size} ${erase_size} required_size) + + if(CONFIG_SINGLE_APPLICATION_SLOT OR CONFIG_BOOT_FIRMWARE_LOADER) + set(required_upgrade_size "0") + else() + math(EXPR required_upgrade_size "${boot_magic_size} + ${boot_swap_data_size} + ${boot_status_data_size}") + align_up(${required_upgrade_size} ${erase_size} required_upgrade_size) + endif() + + if(CONFIG_BOOT_SWAP_USING_MOVE) + math(EXPR required_size "${required_size} + ${erase_size}") + math(EXPR required_upgrade_size "${required_upgrade_size} + ${erase_size}") + endif() + else() + set(required_size 0) + set(required_upgrade_size 0) + endif() + + set(mcuboot_image_footer_size ${required_size} CACHE INTERNAL "Estimated MCUboot image trailer size" FORCE) + set(mcuboot_image_upgrade_footer_size ${required_upgrade_size} CACHE INTERNAL "Estimated MCUboot update image trailer size" FORCE) +endif() + +if(CONFIG_MCUBOOT_NRF_CLEANUP_PERIPHERAL OR CONFIG_MCUBOOT_CLEANUP_NONSECURE_RAM) +zephyr_library_sources( + ${BOOT_DIR}/zephyr/nrf_cleanup.c +) +endif() + +if(SYSBUILD AND CONFIG_PCD_APP) + # Sysbuild requires details of the RAM flash device are stored to the cache of MCUboot so + # that they can be read when running partition manager + dt_nodelabel(ram_flash_dev NODELABEL flash_sim0) + dt_reg_addr(ram_flash_addr PATH ${ram_flash_dev}) + dt_reg_size(ram_flash_size PATH ${ram_flash_dev}) + + set(RAM_FLASH_ADDR "${ram_flash_addr}" CACHE STRING "" FORCE) + set(RAM_FLASH_SIZE "${ram_flash_size}" CACHE STRING "" FORCE) +endif() diff --git a/bootloader/mcuboot/boot/zephyr/Kconfig b/bootloader/mcuboot/boot/zephyr/Kconfig new file mode 100644 index 0000000..b681fb5 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/Kconfig @@ -0,0 +1,1040 @@ +# Copyright (c) 2017-2020 Linaro Limited +# Copyright (c) 2020 Arm Limited +# Copyright (c) 2023 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 +# + +mainmenu "MCUboot configuration" + +comment "MCUboot-specific configuration options" + +source "$(ZEPHYR_NRF_MODULE_DIR)/modules/mcuboot/boot/zephyr/Kconfig" + +# Hidden option to mark a project as MCUboot +config MCUBOOT + default y + bool + select MPU_ALLOW_FLASH_WRITE if ARM_MPU + select USE_DT_CODE_PARTITION if HAS_FLASH_LOAD_OFFSET + select MCUBOOT_BOOTUTIL_LIB + select REBOOT if SECURE_BOOT + +config BOOT_USE_MBEDTLS + bool + # Hidden option + default n + help + Use mbedTLS for crypto primitives. + +config BOOT_USE_PSA_CRYPTO + bool + default y if NRF_SECURITY + # This is counter intuitive but that is how PSA heap is enabled. + select MBEDTLS_ENABLE_HEAP + select MBEDTLS_PSA_CRYPTO_C + help + Hidden option set if using PSA crypt for cryptography functionality + +config BOOT_USE_TINYCRYPT + bool + # Hidden option + default n + # When building for ECDSA, we use our own copy of mbedTLS, so the + # Zephyr one must not be enabled or the MBEDTLS_CONFIG_FILE macros + # will collide. + select MBEDTLS_PROMPTLESS if ZEPHYR_MBEDTLS_MODULE + help + Use TinyCrypt for crypto primitives. + +config BOOT_USE_CC310 + bool + # Hidden option + default n + # When building for ECDSA, we use our own copy of mbedTLS, so the + # Zephyr one must not be enabled or the MBEDTLS_CONFIG_FILE macros + # will collide. + help + Use cc310 for crypto primitives. + +config BOOT_USE_NRF_CC310_BL + bool + default n + +config NRFXLIB_CRYPTO + bool + default n + +config NRF_CC310_BL + bool + default n + +if BOOT_USE_PSA_CRYPTO + +config BOOT_PSA_IMG_HASH_ALG_SHA256_DEPENDENCIES + bool + default y if BOOT_IMG_HASH_ALG_SHA256 + select PSA_WANT_ALG_SHA_256 + help + Dependencies for hashing with SHA256 + +config BOOT_ED25519_PSA_DEPENDENCIES + bool + select PSA_WANT_ALG_SHA_256 if BOOT_IMG_HASH_ALG_SHA256 + select PSA_WANT_ALG_SHA_512 + select PSA_WANT_ALG_PURE_EDDSA + select PSA_WANT_ECC_TWISTED_EDWARDS_255 + select PSA_WANT_KEY_TYPE_ECC_KEY_PAIR_IMPORT + help + Dependencies for ed25519 signature + +if BOOT_ENCRYPT_IMAGE + +config BOOT_X25519_PSA_DEPENDENCIES + bool + select PSA_WANT_ALG_ECDH + select PSA_WANT_ALG_HMAC + select PSA_WANT_ALG_HKDF + select PSA_WANT_ALG_CTR + select PSA_WANT_KEY_TYPE_ECC_KEY_PAIR_IMPORT + select PSA_WANT_KEY_TYPE_DERIVE + select PSA_WANT_KEY_TYPE_AES + select PSA_WANT_ECC_MONTGOMERY_255 + help + Dependencies for x25519 shared-random key encryption and AES + encryption. The PSA_WANT_ALG_CTR and PSA_WANT_KEY_TYPE_AES + enable Counter based block cipher and AES key, and algorithm support, + to use with it; the others are used for shared key decryption + and derivation. + +endif # BOOT_ENCRYPT_IMAGE + +if MBEDTLS_ENABLE_HEAP + +config MBEDTLS_HEAP_SIZE + default 2048 if BOOT_USE_PSA_CRYPTO + help + The PSA internals need to be able to allocate memory for operation + and it uses mbedTLS heap for that. + +endif # MBEDTLS_ENABLE_HEAP + +endif # BOOT_USE_PSA_CRYPTO + +menu "MCUBoot settings" + +config SINGLE_APPLICATION_SLOT + bool "Single slot bootloader" + default n + help + Single image area is used for application which means that + uploading a new application overwrites the one that previously + occupied the area. + +config BOOT_IMG_HASH_ALG_SHA256_ALLOW + bool + help + Hidden option set by configurations that allow SHA256 + +config BOOT_IMG_HASH_ALG_SHA384_ALLOW + bool + help + Hidden option set by configurations that allow SHA384 + +config BOOT_IMG_HASH_ALG_SHA512_ALLOW + bool + help + Hidden option set by configurations that allow SHA512 + +config BOOT_IMG_HASH_DIRECTLY_ON_STORAGE + bool "Hash calculation functions access storage through address space" + depends on !BOOT_ENCRYPT_IMAGE + help + When possible to map storage device, at least for read operations, + to address space or RAM area, enabling this option allows hash + calculation functions to directly access the storage through that address + space or using its own DMA. This reduces flash read overhead done + by the MCUboot. + Notes: + - not supported when encrypted images are in use, because calculating + SHA requires image to be decrypted first, which is done to RAM. + - currently only supported on internal storage of devices; this + option will not work with devices that use external storage for + either of image slots. + +choice BOOT_IMG_HASH_ALG + prompt "Selected image hash algorithm" + default BOOT_IMG_HASH_ALG_SHA256 if BOOT_IMG_HASH_ALG_SHA256_ALLOW + default BOOT_IMG_HASH_ALG_SHA384 if BOOT_IMG_HASH_ALG_SHA384_ALLOW + default BOOT_IMG_HASH_ALG_SHA512 if BOOT_IMG_HASH_ALG_SHA512_ALLOW + help + Hash algorithm used for image verification. Selection + here may be limited by other configurations, like for + example selected cryptographic signature. + +config BOOT_IMG_HASH_ALG_SHA256 + bool "SHA256" + depends on BOOT_IMG_HASH_ALG_SHA256_ALLOW + help + SHA256 algorithm + +config BOOT_IMG_HASH_ALG_SHA384 + bool "SHA384" + depends on BOOT_IMG_HASH_ALG_SHA384_ALLOW + help + SHA384 algorithm + +config BOOT_IMG_HASH_ALG_SHA512 + bool "SHA512" + depends on BOOT_IMG_HASH_ALG_SHA512_ALLOW + help + SHA512 algorithm + +endchoice # BOOT_IMG_HASH_ALG + +config BOOT_SIGNATURE_TYPE_PURE_ALLOW + bool + help + Hidden option set by configurations that allow Pure variant, + for example ed25519. The pure variant means that image + signature is calculated over entire image instead of hash + of an image. + +choice BOOT_SIGNATURE_TYPE + prompt "Signature type" + default BOOT_SIGNATURE_TYPE_ED25519 if SOC_NRF54L15_CPUAPP + default BOOT_SIGNATURE_TYPE_RSA + +config BOOT_SIGNATURE_TYPE_NONE + bool "No signature; use only hash check" + select BOOT_USE_TINYCRYPT + select BOOT_IMG_HASH_ALG_SHA256_ALLOW + +config BOOT_SIGNATURE_TYPE_RSA + bool "RSA signatures" + select BOOT_USE_MBEDTLS + select MBEDTLS + select BOOT_ENCRYPTION_SUPPORT + select BOOT_IMG_HASH_ALG_SHA256_ALLOW + +if BOOT_SIGNATURE_TYPE_RSA +config BOOT_SIGNATURE_TYPE_RSA_LEN + int "RSA signature length" + range 2048 3072 + default 2048 +endif + +config BOOT_SIGNATURE_TYPE_ECDSA_P256 + bool "Elliptic curve digital signatures with curve P-256" + select BOOT_ENCRYPTION_SUPPORT + select BOOT_IMG_HASH_ALG_SHA256_ALLOW + +if BOOT_SIGNATURE_TYPE_ECDSA_P256 +choice BOOT_ECDSA_IMPLEMENTATION + prompt "Ecdsa implementation" + default BOOT_ECDSA_TINYCRYPT + +config BOOT_ECDSA_TINYCRYPT + bool "Use tinycrypt" + select BOOT_USE_TINYCRYPT + +config BOOT_ECDSA_CC310 + bool "Use CC310" + depends on HAS_HW_NRF_CC310 + select BOOT_USE_NRF_CC310_BL + select NRF_CC310_BL + select NRFXLIB_CRYPTO + select BOOT_USE_CC310 +endchoice # Ecdsa implementation +endif + +config BOOT_SIGNATURE_TYPE_ED25519 + bool "Edwards curve digital signatures using ed25519" + select BOOT_ENCRYPTION_SUPPORT if !BOOT_SIGNATURE_TYPE_PURE + select BOOT_IMG_HASH_ALG_SHA256_ALLOW if !BOOT_SIGNATURE_TYPE_PURE + # The SHA is used only for key hashing, not for images. + select BOOT_IMG_HASH_ALG_SHA512_ALLOW if BOOT_USE_PSA_CRYPTO + select BOOT_SIGNATURE_TYPE_PURE_ALLOW + help + This is ed25519 signature calculated over SHA512 of SHA256 of application + image; that is not completely correct approach as the SHA512 should be + rather directly calculated over an image. + Select BOOT_SIGNATURE_TYPE_PURE to have a PureEdDSA calculating image + signature directly on image, rather than hash of the image. + +if BOOT_SIGNATURE_TYPE_ED25519 + +config BOOT_SIGNATURE_TYPE_PURE + bool "Use Pure signature of image" + depends on BOOT_SIGNATURE_TYPE_PURE_ALLOW + help + The Pure signature is calculated directly over image rather than + hash of an image. + This is more secure signature, specifically if hardware can do the + verification without need to share key. + Note that this requires that all slots for which signature is to be + verified need to be accessible through memory address space that + cryptography can access. + +choice BOOT_ED25519_IMPLEMENTATION + prompt "Ecdsa implementation" + default BOOT_ED25519_TINYCRYPT + +config BOOT_ED25519_TINYCRYPT + bool "Use tinycrypt" + select BOOT_USE_TINYCRYPT + depends on !NRF_SECURITY + +config BOOT_ED25519_MBEDTLS + bool "Use mbedTLS" + select BOOT_USE_MBEDTLS + select MBEDTLS + depends on !NRF_SECURITY + +config BOOT_ED25519_PSA + bool "Use PSA crypto" + depends on NRF_SECURITY + select BOOT_USE_PSA_CRYPTO + select BOOT_ED25519_PSA_DEPENDENCIES + select BOOT_X25519_PSA_DEPENDENCIES if BOOT_ENCRYPT_IMAGE + +endchoice +endif + +endchoice + +config BOOT_SIGNATURE_USING_KMU + bool "Use KMU stored keys for signature verification" + depends on NRF_SECURITY + depends on CRACEN_LIB_KMU + select PSA_WANT_ALG_GCM + select PSA_WANT_KEY_TYPE_AES + select PSA_WANT_AES_KEY_SIZE_256 + select PSA_WANT_ALG_SP800_108_COUNTER_CMAC + select PSA_WANT_ALG_CMAC + select PSA_WANT_ALG_ECB_NO_PADDING + help + MCUboot will use keys provisioned to the device key management unit for signature + verification instead of compiling in key data from a file. + +if !BOOT_SIGNATURE_USING_KMU + +config BOOT_SIGNATURE_KEY_FILE + string "PEM key file" + default "root-ec-p256.pem" if BOOT_SIGNATURE_TYPE_ECDSA_P256 + default "root-ed25519.pem" if BOOT_SIGNATURE_TYPE_ED25519 + default "root-rsa-3072.pem" if BOOT_SIGNATURE_TYPE_RSA && BOOT_SIGNATURE_TYPE_RSA_LEN=3072 + default "root-rsa-2048.pem" if BOOT_SIGNATURE_TYPE_RSA && BOOT_SIGNATURE_TYPE_RSA_LEN=2048 + default "" + help + You can use either absolute or relative path. + In case relative path is used, the build system assumes that it starts + from the directory where the MCUBoot KConfig configuration file is + located. If the key file is not there, the build system uses relative + path that starts from the MCUBoot repository root directory. + The key file will be parsed by imgtool's getpub command and a .c source + with the public key information will be written in a format expected by + MCUboot. + +endif + +config MCUBOOT_CLEANUP_ARM_CORE + bool "Perform core cleanup before chain-load the application" + depends on CPU_CORTEX_M + default y + help + This option instructs MCUboot to perform a clean-up of a set of + architecture core HW registers before jumping to the application + firmware. The clean-up sets these registers to their warm-reset + values as specified by the architecture. + + This option is enabled by default to prevent possible problems when + booting zephyr (or other) applications whereby e.g. a MPU stack guard + may be initialised in RAM which is then used by the application + start-up code which can cause a module fault and potentially make the + module irrecoverable. + +# Disable MBEDTLS from being selected if NRF_SECURITY is enabled, and use default NRF_SECURITY +# configuration file for MBEDTLS +config MBEDTLS + depends on !NRF_SECURITY + +config NRF_SECURITY + select MBEDTLS_PROMPTLESS + +if MBEDTLS + +config MBEDTLS_CFG_FILE + default "mcuboot-mbedtls-cfg.h" if !NRF_SECURITY + +endif + +config BOOT_HW_KEY + bool "Use HW key for image verification" + default n + help + Use HW key for image verification, otherwise the public key is embedded + in MCUBoot. If enabled the public key is appended to the signed image + and requires the hash of the public key to be provisioned to the device + beforehand. + +config BOOT_VALIDATE_SLOT0 + bool "Validate image in the primary slot on every boot" + default y + help + If y, the bootloader attempts to validate the signature of the + primary slot every boot. This adds the signature check time to + every boot, but can mitigate against some changes that are + able to modify the flash image itself. + +config BOOT_VALIDATE_SLOT0_ONCE + bool "Validate image in the primary slot just once after after upgrade" + depends on !BOOT_VALIDATE_SLOT0 && SINGLE_APPLICATION_SLOT + default n + help + If y, the bootloader attempts to validate the signature of the + primary slot only once after an upgrade of the main slot. + It caches the result in the magic area, which makes it an unsecure + method. This option is usefull for lowering the boot up time for + low end devices with as a compromise lowering the security level. + If unsure, leave at the default value. + +config BOOT_PREFER_SWAP_MOVE + bool "Prefer the newer swap move algorithm" + default y if SOC_FAMILY_NORDIC_NRF + default y if !$(dt_nodelabel_enabled,scratch_partition) + help + If y, the BOOT_IMAGE_UPGRADE_MODE will default to using + "move" instead of "scratch". This is a separate bool config + option, because Kconfig doesn't allow defaults to be + overridden in choice options. Most devices should be using + swap move. + +if !SINGLE_APPLICATION_SLOT +choice BOOT_IMAGE_UPGRADE_MODE + prompt "Image upgrade modes" + default BOOT_SWAP_USING_MOVE if BOOT_PREFER_SWAP_MOVE + default BOOT_SWAP_USING_SCRATCH + +config BOOT_SWAP_USING_SCRATCH + bool "Swap mode that run with the scratch partition" + help + This is the most conservative swap mode but it can work even on + devices with heterogeneous flash page layout. + +config BOOT_UPGRADE_ONLY + bool "Overwrite image updates instead of swapping" + help + If y, overwrite the primary slot with the upgrade image instead + of swapping them. This prevents the fallback recovery, but + uses a much simpler code path. + +config BOOT_SWAP_USING_MOVE + bool "Swap mode that can run without a scratch partition" + help + If y, the swap upgrade is done in two steps, where first every + sector of the primary slot is moved up one sector, then for + each sector X in the secondary slot, it is moved to index X in + the primary slot, then the sector at X+1 in the primary is + moved to index X in the secondary. + This allows a swap upgrade without using a scratch partition, + but is currently limited to all sectors in both slots being of + the same size. + +config BOOT_DIRECT_XIP + bool "Run the latest image directly from its slot" + help + If y, mcuboot selects the newest valid image based on the image version + numbers, thereafter the selected image can run directly from its slot + without having to move/copy it into the primary slot. For this reason the + images must be linked to be executed from the given image slot. Using this + mode results in a simpler code path and smaller code size. + +config BOOT_RAM_LOAD + bool "RAM load" + help + If y, mcuboot selects the newest valid image based on the image version + numbers, thereafter the selected image is copied to RAM and executed from + there. For this reason, the image has to be linked to be executed from RAM. + The address that the image is copied to is specified using the load-addr + argument to the imgtool.py script which writes it to the image header. + +config BOOT_FIRMWARE_LOADER + bool "Firmware loader" + help + If y, mcuboot will have a single application slot, and the secondary + slot will be for a non-upgradeable firmware loaded image (e.g. for + loading firmware via Bluetooth). The main application will boot by + default unless there is an error with it or the boot mode has been + forced to the firmware loader. + + Note: The firmware loader image must be signed with the same signing + key as the primary image. + +endchoice + +# Workaround for not being able to have commas in macro arguments +DT_CHOSEN_Z_SRAM := zephyr,sram + +if BOOT_RAM_LOAD +config BOOT_IMAGE_EXECUTABLE_RAM_START + hex "Boot image executable ram start" + default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_SRAM)) + +config BOOT_IMAGE_EXECUTABLE_RAM_SIZE + int "Boot image executable base size" + default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_SRAM),0) +endif + +config BOOT_DIRECT_XIP_REVERT + bool "Enable the revert mechanism in direct-xip mode" + depends on BOOT_DIRECT_XIP + default n + help + If y, enables the revert mechanism in direct-xip similar to the one in + swap mode. It requires the trailer magic to be added to the signed image. + When a reboot happens without the image being confirmed at runtime, the + bootloader considers the image faulty and erases it. After this it will + attempt to boot the previous image. The images can also be made permanent + (marked as confirmed in advance) just like in swap mode. + +config BOOT_BOOTSTRAP + bool "Bootstrap erased the primary slot from the secondary slot" + default n + help + If y, enables bootstraping support. Bootstrapping allows an erased + primary slot to be initialized from a valid image in the secondary slot. + If unsure, leave at the default value. + +config BOOT_SWAP_SAVE_ENCTLV + bool "Save encrypted key TLVs instead of plaintext keys in swap metadata" + default n + depends on BOOT_ENCRYPT_IMAGE + help + If y, instead of saving the encrypted image keys in plaintext in the + swap resume metadata, save the encrypted image TLVs. This should be used + when there is no security mechanism protecting the data in the primary + slot from being dumped. If n is selected (default), the keys are written + after being decrypted from the image TLVs and could be read by an + attacker who has access to the flash contents of the primary slot (eg + JTAG/SWD or primary slot in external flash). + If unsure, leave at the default value. + +endif # !SINGLE_APPLICATION_SLOT + +config BOOT_ENCRYPTION_SUPPORT + bool + help + Hidden option used to check if image encryption is supported. + +config BOOT_ENCRYPT_IMAGE + bool "Support for encrypted image updates" + depends on BOOT_ENCRYPTION_SUPPORT + select BOOT_ENCRYPT_RSA if BOOT_SIGNATURE_TYPE_RSA + select BOOT_ENCRYPT_EC256 if BOOT_SIGNATURE_TYPE_ECDSA_P256 + select BOOT_ENCRYPT_X25519 if BOOT_SIGNATURE_TYPE_ED25519 + depends on !SINGLE_APPLICATION_SLOT || MCUBOOT_SERIAL + help + If y, images in the secondary slot can be encrypted and are decrypted + on the fly when upgrading to the primary slot, as well as encrypted + back when swapping from the primary slot to the secondary slot. The + encryption mechanism must match the same type as the signature type, + supported types include: + - RSA-OAEP (2048 bits). + - ECIES using primitives described under "ECIES-P256 encryption" in + docs/encrypted_images.md. + - ECIES using primitives described under "ECIES-X25519 encryption" + in docs/encrypted_images.md. + + Note that for single slot operation, this can still be used to allow + loading encrypted images via serial recovery which are then + decrypted on-the-fly without needing a second slot. + +config BOOT_ENCRYPT_RSA + bool + help + Hidden option selecting RSA encryption. + +config BOOT_ENCRYPT_EC256 + bool + help + Hidden option selecting EC256 encryption. + +config BOOT_ENCRYPT_X25519 + bool + help + Hidden option selecting x25519 encryption. + +config BOOT_ENCRYPTION_KEY_FILE + string "Encryption key file" + depends on BOOT_ENCRYPT_IMAGE + default "enc-rsa2048-priv.pem" if BOOT_ENCRYPT_RSA + default "enc-ec256-priv.pem" if BOOT_ENCRYPT_EC256 + default "enc-x25519-priv.pem" if BOOT_ENCRYPT_X25519 + default "" + help + You can use either absolute or relative path. + In case relative path is used, the build system assumes that it starts + from the directory where the MCUBoot KConfig configuration file is + located. If the key file is not there, the build system uses relative + path that starts from the MCUBoot repository root directory. + The key file will be parsed by imgtool's getpriv command and a .c source + with the public key information will be written in a format expected by + MCUboot. + +config BOOT_MAX_IMG_SECTORS_AUTO + bool "Calculate maximum sectors automatically" + default y if !PARTITION_MANAGER_ENABLED + help + If this option is enabled then the maximum number of supported sectors per image will + be calculated automatically from the flash erase sizes and size of each partition for + the first image. + + If this information is not available, or multiple images are used, then this option + should be disabled and BOOT_MAX_IMG_SECTORS should be set instead + +config BOOT_MAX_IMG_SECTORS + int "Maximum number of sectors per image slot" + default 128 + depends on !BOOT_MAX_IMG_SECTORS_AUTO + help + This option controls the maximum number of sectors that each of + the two image areas can contain. Smaller values reduce MCUboot's + memory usage; larger values allow it to support larger images. + If unsure, leave at the default value. + +config BOOT_SHARE_BACKEND_AVAILABLE + bool + default n + help + Hidden open which indicates if there is a sharing backend available. + +# Workaround for not being able to have commas in macro arguments +DT_CHOSEN_BOOTLOADER_INFO := zephyr,bootloader-info + +config BOOT_SHARE_BACKEND_AVAILABLE + bool + default n + help + Hidden open which indicates if there is a sharing backend available. + +choice BOOT_SHARE_BACKEND + prompt "Shared data backend" + default BOOT_SHARE_BACKEND_DISABLED + +config BOOT_SHARE_BACKEND_DISABLED + bool "Disabled" + help + No data sharing support. + +config BOOT_SHARE_BACKEND_RETENTION + bool "Retention" + depends on RETENTION + depends on $(dt_chosen_enabled,$(DT_CHOSEN_BOOTLOADER_INFO)) + select BOOT_SHARE_BACKEND_AVAILABLE + help + Use retention to share data with application. Requires: + - Retained memory area + - Retention partition of retained memory area + - Chosen node "zephyr,bootloader-info" to be set to the retention + partition + +config BOOT_SHARE_BACKEND_EXTERNAL + bool "External (user-provided code)" + select BOOT_SHARE_BACKEND_AVAILABLE + help + Use a custom user-specified storage. + +endchoice + +menuconfig BOOT_SHARE_DATA + bool "Save application specific data" + default n + depends on BOOT_SHARE_BACKEND_AVAILABLE + help + This will allow data to be shared between MCUboot and an application, + it does not include any informatiom by default. + + Note: This requires a backend to function, see + BOOT_SHARE_BACKEND_RETENTION for details on using the retention + subsystem as a backend. + +config BOOT_SHARE_DATA_BOOTINFO + bool "Save boot information data" + default n + depends on BOOT_SHARE_DATA + help + This will place information about the MCUboot configuration and + running application into a shared memory area. + +menuconfig MEASURED_BOOT + bool "Store the boot state/measurements in shared memory area" + default n + depends on BOOT_SHARE_BACKEND_AVAILABLE + help + If enabled, the bootloader will store certain boot measurements such as + the hash of the firmware image in a shared memory area. This data can + be used later by runtime services (e.g. by a device attestation service). + + Note: This requires a backend to function, see + BOOT_SHARE_BACKEND_RETENTION for details on using the retention + subsystem as a backend. + +config MEASURED_BOOT_MAX_CBOR_SIZE + int "Maximum CBOR size of boot state/measurements" + default 64 + range 0 256 + depends on MEASURED_BOOT + help + The maximum size of the CBOR message which stores boot + state/measurements. + +choice BOOT_FAULT_INJECTION_HARDENING_PROFILE + prompt "Fault injection hardening profile" + default BOOT_FIH_PROFILE_OFF + +config BOOT_FIH_PROFILE_OFF + bool "No hardening against hardware level fault injection" + help + No hardening in SW against hardware level fault injection: power or + clock glitching, etc. + +config BOOT_FIH_PROFILE_LOW + bool "Moderate level hardening against hardware level fault injection" + help + Moderate level hardening: Long global fail loop to avoid break out, + control flow integrity check to discover discrepancy in expected code + flow. + +config BOOT_FIH_PROFILE_MEDIUM + bool "Medium level hardening against hardware level fault injection" + help + Medium level hardening: Long global fail loop to avoid break out, + control flow integrity check to discover discrepancy in expected code + flow, double variables to discover register or memory corruption. + +config BOOT_FIH_PROFILE_HIGH + bool "Maximum level hardening against hardware level fault injection" + select MBEDTLS + help + Maximum level hardening: Long global fail loop to avoid break out, + control flow integrity check to discover discrepancy in expected code + flow, double variables to discover register or memory corruption, random + delays to make code execution less predictable. Random delays requires an + entropy source. + +endchoice + +choice BOOT_USB_DFU + prompt "USB DFU" + default BOOT_USB_DFU_NO + +config BOOT_USB_DFU_NO + prompt "Disabled" + +config BOOT_USB_DFU_WAIT + bool "Wait for a prescribed duration to see if USB DFU is invoked" + select USB_DEVICE_STACK + select USB_DFU_CLASS + select IMG_MANAGER + select STREAM_FLASH + select MULTITHREADING + help + If y, MCUboot waits for a prescribed duration of time to allow + for USB DFU to be invoked. Please note DFU always updates the + slot1 image. + +config BOOT_USB_DFU_GPIO + bool "Use GPIO to detect whether to trigger DFU mode" + select USB_DEVICE_STACK + select USB_DFU_CLASS + select IMG_MANAGER + select STREAM_FLASH + select MULTITHREADING + help + If y, MCUboot uses GPIO to detect whether to invoke USB DFU. + +endchoice + +config BOOT_USB_DFU_WAIT_DELAY_MS + int "USB DFU wait duration" + depends on BOOT_USB_DFU_WAIT + default 12000 + help + Milliseconds to wait for USB DFU to be invoked. + +if BOOT_USB_DFU_GPIO + +config BOOT_USB_DFU_DETECT_DELAY + int "Serial detect pin detection delay time [ms]" + default 0 + help + Used to prevent the bootloader from loading on button press. + Useful for powering on when using the same button as + the one used to place the device in bootloader mode. + +endif # BOOT_USB_DFU_GPIO + +config BOOT_USB_DFU_NO_APPLICATION + bool "Stay in bootloader if no application" + help + Allows for entering USB DFU recovery mode if there is no bootable + application that the bootloader can jump to. + +config BOOT_USE_BENCH + bool "Enable benchmark code" + default n + help + If y, adds support for simple benchmarking that can record + time intervals between two calls. The time printed depends + on the particular Zephyr target, and is generally ticks of a + specific board-specific timer. + +module = MCUBOOT +module-str = MCUBoot bootloader +source "subsys/logging/Kconfig.template.log_config" + +config MCUBOOT_LOG_THREAD_STACK_SIZE + int "Stack size for the MCUBoot log processing thread" + depends on LOG && !LOG_IMMEDIATE + default 2048 if COVERAGE_GCOV + default 1024 if NO_OPTIMIZATIONS + default 1024 if XTENSA + default 4096 if (X86 && X86_64) + default 4096 if ARM64 + default 768 + help + Set the internal stack size for MCUBoot log processing thread. + +config MCUBOOT_INDICATION_LED + bool "Turns on LED indication when device is in DFU" + select GPIO + help + Device device activates the LED while in bootloader mode. + mcuboot-led0 alias must be set in the device's .dts + definitions for this to work. + +rsource "Kconfig.serial_recovery" + +rsource "Kconfig.firmware_loader" + +config BOOT_INTR_VEC_RELOC + bool "Relocate the interrupt vector to the application" + default n + depends on SW_VECTOR_RELAY || CPU_CORTEX_M_HAS_VTOR + help + Relocate the interrupt vector to the application before it is started. + Select this option if application requires vector relocation, + but it doesn't relocate vector in its reset handler. + +config UPDATEABLE_IMAGE_NUMBER + int "Number of updateable images" + default 1 + range 1 1 if SINGLE_APPLICATION_SLOT + help + Enables support of multi image update. + +config BOOT_VERSION_CMP_USE_BUILD_NUMBER + bool "Use build number while comparing image version" + depends on (UPDATEABLE_IMAGE_NUMBER > 1) || BOOT_DIRECT_XIP || \ + BOOT_RAM_LOAD || MCUBOOT_DOWNGRADE_PREVENTION + help + By default, the image version comparison relies only on version major, + minor and revision. Enable this option to take into account the build + number as well. + +choice BOOT_DOWNGRADE_PREVENTION_CHOICE + prompt "Downgrade prevention" + optional + +config MCUBOOT_DOWNGRADE_PREVENTION + bool "SW based downgrade prevention" + depends on !BOOT_DIRECT_XIP + help + Prevent downgrades by enforcing incrementing version numbers. + When this option is set, any upgrade must have greater major version + or greater minor version with equal major version. This mechanism + only protects against some attacks against version downgrades (for + example, a JTAG could be used to write an older version). + +config MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER + bool "Use image security counter instead of version number" + depends on MCUBOOT_DOWNGRADE_PREVENTION + depends on (BOOT_SWAP_USING_MOVE || BOOT_SWAP_USING_SCRATCH) + help + Security counter is used for version eligibility check instead of pure + version. When this option is set, any upgrade must have greater or + equal security counter value. + Because of the acceptance of equal values it allows for software + downgrades to some extent. + +config MCUBOOT_HW_DOWNGRADE_PREVENTION + bool "HW based downgrade prevention" + help + Prevent undesirable/malicious software downgrades. When this option is + set, any upgrade must have greater or equal security counter value. + Because of the acceptance of equal values it allows for software + downgrade to some extent. + +endchoice + +config BOOT_WATCHDOG_FEED + bool "Feed the watchdog while doing swap" + default y if WATCHDOG + default y if SOC_FAMILY_NORDIC_NRF + # for nRF nrfx based implementation is available + imply NRFX_WDT if SOC_FAMILY_NORDIC_NRF + imply NRFX_WDT0 if SOC_FAMILY_NORDIC_NRF + imply NRFX_WDT1 if SOC_FAMILY_NORDIC_NRF + imply NRFX_WDT30 if SOC_FAMILY_NORDIC_NRF + imply NRFX_WDT31 if SOC_FAMILY_NORDIC_NRF + help + Enables implementation of MCUBOOT_WATCHDOG_FEED() macro which is + used to feed watchdog while doing time consuming operations. + +config BOOT_IMAGE_ACCESS_HOOKS + bool "Enable hooks for overriding MCUboot's native routines" + help + Allow to provide procedures for override or extend native + MCUboot's routines required for access the image data and the image + update. It is up to the project customization to add required source + files to the build. + +config MCUBOOT_ACTION_HOOKS + bool "Enable hooks for responding to MCUboot status changes" + help + This will call a handler when the MCUboot status changes which allows + for some level of user feedback, for instance to change LED status to + indicate a failure, using the callback: + 'void mcuboot_status_change(mcuboot_status_type_t status)' where + 'mcuboot_status_type_t' is listed in + boot/bootutil/include/bootutil/mcuboot_status.h + +config BOOT_DISABLE_CACHES + bool "Disable I/D caches before chain-loading application" + depends on CPU_HAS_ICACHE || CPU_HAS_DCACHE + default y + help + Will flush and disable the instruction and data caches on the CPU prior to + booting an application, this is required on some ARM Cortex devices and + increases protection against data leakage from MCUboot to applications via + these caches. + +config MCUBOOT_BOOT_BANNER + bool "Use MCUboot boot banner" + depends on BOOT_BANNER + depends on !NCS_BOOT_BANNER + depends on "$(APP_VERSION_EXTENDED_STRING)" != "" + default y + help + Uses a MCUboot boot banner instead of the default zephyr one, which will output the + MCUboot name and version, followed by the zephyr name and version. + + For example: + + *** Booting MCUboot v2.0.0-72-g8c0e36c88663 *** + *** Using Zephyr OS build v3.6.0-2607-gd0be2010c31f *** + +config BOOT_BANNER_STRING + default "Using Zephyr OS build" if MCUBOOT_BOOT_BANNER + +config BOOT_DECOMPRESSION_SUPPORT + bool + depends on NRF_COMPRESS && NRF_COMPRESS_DECOMPRESSION && (NRF_COMPRESS_LZMA_VERSION_LZMA1 || NRF_COMPRESS_LZMA_VERSION_LZMA2) + depends on !SINGLE_APPLICATION_SLOT && !BOOT_ENCRYPT_IMAGE && BOOT_UPGRADE_ONLY + depends on UPDATEABLE_IMAGE_NUMBER = 1 + default y + help + Hidden symbol which should be selected if a system provided decompression support. + +if BOOT_DECOMPRESSION_SUPPORT + +menuconfig BOOT_DECOMPRESSION + bool "Decompression [EXPERIMENTAL]" + select NRF_COMPRESS_CLEANUP + select PM_USE_CONFIG_SRAM_SIZE if SOC_NRF54L15_CPUAPP + select EXPERIMENTAL + help + If enabled, will include support for compressed images being loaded to the secondary slot + which then get decompressed into the primary slot. This mode allows the secondary slot to + be smaller than primary slot which otherwise would not be allowed. + +if BOOT_DECOMPRESSION + +config BOOT_DECOMPRESSION_BUFFER_SIZE + int + range 16 16384 + default NRF_COMPRESS_CHUNK_SIZE + help + The size of a secondary buffer used for writing decompressed data to the storage device. + +endif # BOOT_DECOMPRESSION + +endif # BOOT_DECOMPRESSION_SUPPORT + +endmenu + +config MCUBOOT_DEVICE_SETTINGS + # Hidden selector for device-specific settings + bool + default y + # CPU options + select MCUBOOT_DEVICE_CPU_CORTEX_M0 if CPU_CORTEX_M0 + # Enable flash page layout if available + select FLASH_PAGE_LAYOUT if FLASH_HAS_PAGE_LAYOUT + # Enable flash_map module as flash I/O back-end + select FLASH_MAP + +config MCUBOOT_DEVICE_CPU_CORTEX_M0 + # Hidden selector for Cortex-M0 settings + bool + default n + select SW_VECTOR_RELAY if !CPU_CORTEX_M0_HAS_VECTOR_TABLE_REMAP + +comment "Zephyr configuration options" + +# Disabling MULTITHREADING provides a code size advantage, but +# it requires peripheral drivers (particularly a flash driver) +# that works properly with the option enabled. +# +# If you know for sure that your hardware will work, you can default +# it to n here. Otherwise, having it on by default makes the most +# hardware work. +config MULTITHREADING + default y if BOOT_SERIAL_CDC_ACM #usb driver requires MULTITHREADING + default y if BOOT_USB_DFU_GPIO || BOOT_USB_DFU_WAIT + default n if SOC_FAMILY_NORDIC_NRF + default n if SOC_FAMILY_ESPRESSIF_ESP32 && MCUBOOT + default y + +config LOG_PROCESS_THREAD + default n # mcuboot has its own log processing thread + +# override USB device name +config USB_DEVICE_PRODUCT + default "MCUBOOT" + +# use MCUboot's own log configuration +config MCUBOOT_BOOTUTIL_LIB_OWN_LOG + bool + default n + +config MCUBOOT_VERIFY_IMG_ADDRESS + bool "Verify reset address of image in secondary slot" + depends on UPDATEABLE_IMAGE_NUMBER > 1 + depends on !BOOT_ENCRYPT_IMAGE + depends on ARM + default y if BOOT_UPGRADE_ONLY + help + Verify that the reset address in the image located in the secondary slot + is contained within the corresponding primary slot. This is recommended + if swapping is not used (that is, BOOT_UPGRADE_ONLY is set). If a user + incorrectly uploads an update for image 1 to image 0's secondary slot + MCUboot will overwrite image 0's primary slot with this image even + though it will not boot. If swapping is enabled this will be handled + since the image will not confirm itself. If, however, swapping is not + enabled then the only mitigation is serial recovery. This feature can + also be useful when BOOT_DIRECT_XIP is enabled, to ensure that the image + linked at the correct address is loaded. + +source "Kconfig.zephyr" diff --git a/bootloader/mcuboot/boot/zephyr/Kconfig.firmware_loader b/bootloader/mcuboot/boot/zephyr/Kconfig.firmware_loader new file mode 100644 index 0000000..1ba2239 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/Kconfig.firmware_loader @@ -0,0 +1,47 @@ +# Copyright (c) 2023 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 + +if BOOT_FIRMWARE_LOADER + +menu "Firmware loader entrance methods" + +menuconfig BOOT_FIRMWARE_LOADER_ENTRANCE_GPIO + bool "GPIO" + depends on GPIO + help + Use a GPIO to enter firmware loader mode. + +config BOOT_FIRMWARE_LOADER_DETECT_DELAY + int "Serial detect pin detection delay time [ms]" + default 0 + depends on BOOT_FIRMWARE_LOADER_ENTRANCE_GPIO + help + Used to prevent the bootloader from loading on button press. + Useful for powering on when using the same button as + the one used to place the device in bootloader mode. + +config BOOT_FIRMWARE_LOADER_BOOT_MODE + bool "Check boot mode via retention subsystem" + depends on RETENTION_BOOT_MODE + help + Allows for entering firmware loader mode by using Zephyr's boot mode + retention system (i.e. an application must set the boot mode to stay + in firmware loader mode and reboot the module). + +config BOOT_FIRMWARE_LOADER_NO_APPLICATION + bool "Stay in bootloader if no application" + help + Allows for entering firmware loader mode if there is no bootable + application that the bootloader can jump to. + +config BOOT_FIRMWARE_LOADER_PIN_RESET + bool "Check for device reset by pin" + select HWINFO + help + Checks if the module reset was caused by the reset pin and will + remain in bootloader firmware loader mode if it was. + +endmenu + +endif diff --git a/bootloader/mcuboot/boot/zephyr/Kconfig.serial_recovery b/bootloader/mcuboot/boot/zephyr/Kconfig.serial_recovery new file mode 100644 index 0000000..7ed9a7d --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/Kconfig.serial_recovery @@ -0,0 +1,212 @@ +# Copyright (c) 2017-2020 Linaro Limited +# Copyright (c) 2020 Arm Limited +# Copyright (c) 2017-2023 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 + +menuconfig MCUBOOT_SERIAL + bool "MCUboot serial recovery" + default n + select REBOOT + select SERIAL + select UART_INTERRUPT_DRIVEN + select BASE64 + select CRC + select ZCBOR + depends on !BOOT_FIRMWARE_LOADER + help + If y, enables a serial-port based update mode. This allows + MCUboot itself to load update images into flash over a UART. + If unsure, leave at the default value. + +if MCUBOOT_SERIAL + +choice BOOT_SERIAL_DEVICE + prompt "Serial device" + default BOOT_SERIAL_UART if !BOARD_NRF52840DONGLE_NRF52840 + default BOOT_SERIAL_CDC_ACM if BOARD_NRF52840DONGLE_NRF52840 + +config BOOT_SERIAL_UART + bool "UART" + # SERIAL and UART_INTERRUPT_DRIVEN already selected + help + The serial device to use will be fist selected via chosen + node "zephyr,uart-mcumgr", when such node does not exist + the "zephyr,console" is used. In case when + the "zephyr,uart-mcumgr" points to the same device as + the "zephyr,console" compilation error will be triggered. + +config BOOT_SERIAL_CDC_ACM + bool "CDC ACM" + select USB_DEVICE_STACK + help + This setting will choose CDC ACM for serial recovery unless chosen + "zephyr,uart-mcumgr" is present, in which case the chosen takes + precedence and redirects serial recovery to uart pointed by + the chosen, leaving console on CDC ACM. + +endchoice + +config MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD + bool "Allow to select image number for DFU" + depends on !SINGLE_APPLICATION_SLOT + help + With the option enabled, the mcuboot serial recovery will + respect the "image" field in mcumgr image update frame + header. + The mapping of image number to partition is as follows: + 0 -> default behaviour, same as 1; + 1 -> image-0 (primary slot of the first image); + 2 -> image-1 (secondary slot of the first image); + 3 -> image-2; + 4 -> image-3. + Note that 0 is default upload target when no explicit + selection is done. + +config BOOT_SERIAL_UNALIGNED_BUFFER_SIZE + int "Stack buffer for unaligned memory writes" + default 64 + range 0 128 + help + Specifies the stack usage for a buffer which is used for unaligned + memory access when data is written to a device with memory alignment + requirements. Set to 0 to disable. + +config BOOT_MAX_LINE_INPUT_LEN + int "Maximum input line length" + default 128 + help + Maximum length of input serial port buffer (SMP serial transport uses + fragments of 128-bytes, this should not need to be changed unless a + different value is used for the transport). + +config BOOT_LINE_BUFS + int "Number of receive buffers" + range 2 128 + default 8 + help + Number of receive buffers for data received via the serial port. + +config BOOT_SERIAL_MAX_RECEIVE_SIZE + int "Maximum command line length" + default 1024 + help + Maximum length of received commands via the serial port (this should + be equal to the maximum line length, BOOT_MAX_LINE_INPUT_LEN times + by the number of receive buffers, BOOT_LINE_BUFS to allow for + optimal data transfer speeds). + +config BOOT_ERASE_PROGRESSIVELY + bool "Erase flash progressively when receiving new firmware" + default y if SOC_FAMILY_NORDIC_NRF + help + If enabled, flash is erased as necessary when receiving new firmware, + instead of erasing the whole image slot at once. This is necessary + on some hardware that has long erase times, to prevent long wait + times at the beginning of the DFU process. + +config BOOT_MGMT_ECHO + bool "Enable echo command" + help + if enabled, support for the mcumgr echo command is being added. + +menuconfig ENABLE_MGMT_PERUSER + bool "Enable system specific mcumgr commands" + help + The option enables processing of system specific mcumgr commands; + system specific commands are within group MGMT_GROUP_ID_PERUSER (64) + and above, as defined within mcumgr library. + These are system specific command and system specific implementation + function is required to process these commands. + +if ENABLE_MGMT_PERUSER + +config BOOT_MGMT_CUSTOM_STORAGE_ERASE + bool "Enable storage erase command" + help + The option enables mcumgr command that allows to erase storage + partition. + Note that the storage partition needs to be defined, in DTS, otherwise + enabling the option will cause a compilation to fail. + +endif # ENABLE_MGMT_PERUSER + +menu "Entrance methods" + +menuconfig BOOT_SERIAL_ENTRANCE_GPIO + bool "GPIO" + default y + depends on GPIO + help + Use a GPIO to enter serial recovery mode. + +config BOOT_SERIAL_DETECT_DELAY + int "Serial detect pin detection delay time [ms]" + default 0 + depends on BOOT_SERIAL_ENTRANCE_GPIO + help + Used to prevent the bootloader from loading on button press. + Useful for powering on when using the same button as + the one used to place the device in bootloader mode. + +menuconfig BOOT_SERIAL_WAIT_FOR_DFU + bool "Wait a prescribed duration to see if DFU is invoked by receiving a MCUmgr comand" + depends on BOOT_SERIAL_UART || BOOT_SERIAL_CDC_ACM + help + If y, MCUboot waits for a prescribed duration of time to allow + for DFU to be invoked. The serial recovery can be entered by receiving any + mcumgr command. + +config BOOT_SERIAL_WAIT_FOR_DFU_TIMEOUT + int "Duration to wait for the serial DFU timeout in ms" + default 500 + depends on BOOT_SERIAL_WAIT_FOR_DFU + help + Timeout in ms for MCUboot to wait to allow for DFU to be invoked. + +config BOOT_SERIAL_BOOT_MODE + bool "Check boot mode via retention subsystem" + depends on RETENTION_BOOT_MODE + help + Allows for entering serial recovery mode by using Zephyr's boot mode + retention system (i.e. an application must set the boot mode to stay + in serial recovery mode and reboot the module). + +config BOOT_SERIAL_NO_APPLICATION + bool "Stay in bootloader if no application" + help + Allows for entering serial recovery mode if there is no bootable + application that the bootloader can jump to. + +config BOOT_SERIAL_PIN_RESET + bool "Check for device reset by pin" + select HWINFO + help + Checks if the module reset was caused by the reset pin and will + remain in bootloader serial recovery mode if it was. + +endmenu + +config BOOT_SERIAL_IMG_GRP_HASH + bool "Image list hash support" + default y + help + If y, image list responses will include the image hash (adds ~100 + bytes of flash). + +config BOOT_SERIAL_IMG_GRP_IMAGE_STATE + bool "Image state support" + depends on !SINGLE_APPLICATION_SLOT + select BOOT_SERIAL_IMG_GRP_HASH if UPDATEABLE_IMAGE_NUMBER > 1 + help + If y, image states will be included with image lists and the set + state command can be used to mark an image as test/confirmed. + +config BOOT_SERIAL_IMG_GRP_SLOT_INFO + bool "Slot info" + default y if UPDATEABLE_IMAGE_NUMBER > 1 + help + If y, will include the slot info command which lists what available + slots there are in the system. + +endif # MCUBOOT_SERIAL diff --git a/bootloader/mcuboot/boot/zephyr/VERSION b/bootloader/mcuboot/boot/zephyr/VERSION new file mode 100644 index 0000000..428a355 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/VERSION @@ -0,0 +1,5 @@ +VERSION_MAJOR = 2 +VERSION_MINOR = 1 +PATCHLEVEL = 0 +VERSION_TWEAK = 0 +EXTRAVERSION = dev diff --git a/bootloader/mcuboot/boot/zephyr/app.overlay b/bootloader/mcuboot/boot/zephyr/app.overlay new file mode 100644 index 0000000..74d3dfb --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/app.overlay @@ -0,0 +1,5 @@ +/ { + chosen { + zephyr,code-partition = &boot_partition; + }; +}; diff --git a/bootloader/mcuboot/boot/zephyr/arm_cleanup.c b/bootloader/mcuboot/boot/zephyr/arm_cleanup.c new file mode 100644 index 0000000..3b6c71a --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/arm_cleanup.c @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include +#if CONFIG_CPU_HAS_NXP_MPU +#include +#endif + +void cleanup_arm_nvic(void) { + /* Allow any pending interrupts to be recognized */ + __ISB(); + __disable_irq(); + + /* Disable NVIC interrupts */ + for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) { + NVIC->ICER[i] = 0xFFFFFFFF; + } + /* Clear pending NVIC interrupts */ + for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) { + NVIC->ICPR[i] = 0xFFFFFFFF; + } +} + +#if CONFIG_CPU_HAS_ARM_MPU +__weak void z_arm_clear_arm_mpu_config(void) +{ + int i; + + int num_regions = + ((MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos); + + for (i = 0; i < num_regions; i++) { + ARM_MPU_ClrRegion(i); + } +} +#elif CONFIG_CPU_HAS_NXP_MPU +__weak void z_arm_clear_arm_mpu_config(void) +{ + int i; + + int num_regions = FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT; + + SYSMPU_Enable(SYSMPU, false); + + /* NXP MPU region 0 is reserved for the debugger */ + for (i = 1; i < num_regions; i++) { + SYSMPU_RegionEnable(SYSMPU, i, false); + } +} +#endif diff --git a/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_bee_nrf9160.conf b/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_bee_nrf9160.conf new file mode 100644 index 0000000..2d4f009 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_bee_nrf9160.conf @@ -0,0 +1,10 @@ +# Disable Zephyr console +CONFIG_CONSOLE=n + +# MCUBoot settings +CONFIG_BOOT_MAX_IMG_SECTORS=256 + +# MCUboot serial recovery +CONFIG_MCUBOOT_SERIAL=y + +CONFIG_MULTITHREADING=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_nrf9160.conf b/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_nrf9160.conf new file mode 100644 index 0000000..2d4f009 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_nrf9160.conf @@ -0,0 +1,10 @@ +# Disable Zephyr console +CONFIG_CONSOLE=n + +# MCUBoot settings +CONFIG_BOOT_MAX_IMG_SECTORS=256 + +# MCUboot serial recovery +CONFIG_MCUBOOT_SERIAL=y + +CONFIG_MULTITHREADING=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_som_dk_nrf9160.conf b/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_som_dk_nrf9160.conf new file mode 100644 index 0000000..2d4f009 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_som_dk_nrf9160.conf @@ -0,0 +1,10 @@ +# Disable Zephyr console +CONFIG_CONSOLE=n + +# MCUBoot settings +CONFIG_BOOT_MAX_IMG_SECTORS=256 + +# MCUboot serial recovery +CONFIG_MCUBOOT_SERIAL=y + +CONFIG_MULTITHREADING=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_som_nrf9160.conf b/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_som_nrf9160.conf new file mode 100644 index 0000000..2d4f009 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/actinius_icarus_som_nrf9160.conf @@ -0,0 +1,10 @@ +# Disable Zephyr console +CONFIG_CONSOLE=n + +# MCUBoot settings +CONFIG_BOOT_MAX_IMG_SECTORS=256 + +# MCUboot serial recovery +CONFIG_MCUBOOT_SERIAL=y + +CONFIG_MULTITHREADING=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/bl5340_dvk_nrf5340_cpuapp.conf b/bootloader/mcuboot/boot/zephyr/boards/bl5340_dvk_nrf5340_cpuapp.conf new file mode 100644 index 0000000..00a8dfb --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/bl5340_dvk_nrf5340_cpuapp.conf @@ -0,0 +1,6 @@ +CONFIG_MULTITHREADING=y +# Enable QSPI (MX25R64) - Slot 1 in QSPI +CONFIG_NORDIC_QSPI_NOR=y +CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096 +CONFIG_NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE=4 +CONFIG_BOOT_MAX_IMG_SECTORS=256 diff --git a/bootloader/mcuboot/boot/zephyr/boards/circuitdojo_feather_nrf9160.conf b/bootloader/mcuboot/boot/zephyr/boards/circuitdojo_feather_nrf9160.conf new file mode 100644 index 0000000..c23f92c --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/circuitdojo_feather_nrf9160.conf @@ -0,0 +1,13 @@ +# Disable Zephyr console +CONFIG_CONSOLE=n + +# Multithreading +CONFIG_MULTITHREADING=y + +# MCUBoot settings +CONFIG_BOOT_MAX_IMG_SECTORS=256 + +# MCUboot serial recovery +CONFIG_MCUBOOT_SERIAL=y +CONFIG_BOOT_SERIAL_DETECT_DELAY=450 +CONFIG_MCUBOOT_INDICATION_LED=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/conexio_stratus.conf b/bootloader/mcuboot/boot/zephyr/boards/conexio_stratus.conf new file mode 100644 index 0000000..79ba798 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/conexio_stratus.conf @@ -0,0 +1,15 @@ +# Disable Zephyr console +CONFIG_CONSOLE=n +CONFIG_CONSOLE_HANDLER=n +CONFIG_UART_CONSOLE=n + +# Multithreading +CONFIG_MULTITHREADING=y + +# MCUBoot settings +CONFIG_BOOT_MAX_IMG_SECTORS=256 + +# MCUboot serial recovery +CONFIG_MCUBOOT_SERIAL=y +CONFIG_BOOT_SERIAL_DETECT_DELAY=450 +CONFIG_MCUBOOT_INDICATION_LED=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/disco_l475_iot1_stm32l475xx.conf b/bootloader/mcuboot/boot/zephyr/boards/disco_l475_iot1_stm32l475xx.conf new file mode 100644 index 0000000..cbf3886 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/disco_l475_iot1_stm32l475xx.conf @@ -0,0 +1,2 @@ +CONFIG_BOOT_MAX_IMG_SECTORS=256 +CONFIG_WATCHDOG=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/flash_sim_driver.conf b/bootloader/mcuboot/boot/zephyr/boards/flash_sim_driver.conf new file mode 100644 index 0000000..7e5e58e --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/flash_sim_driver.conf @@ -0,0 +1,2 @@ +CONFIG_FLASH_SIMULATOR=y +CONFIG_FLASH_SIMULATOR_UNALIGNED_READ=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/frdm_k64f_mk64f12.conf b/bootloader/mcuboot/boot/zephyr/boards/frdm_k64f_mk64f12.conf new file mode 100644 index 0000000..80e211d --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/frdm_k64f_mk64f12.conf @@ -0,0 +1 @@ +CONFIG_WATCHDOG=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/frdm_mcxn947_mcxn947_cpu0.conf b/bootloader/mcuboot/boot/zephyr/boards/frdm_mcxn947_mcxn947_cpu0.conf new file mode 100644 index 0000000..801162f --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/frdm_mcxn947_mcxn947_cpu0.conf @@ -0,0 +1,5 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +#MCXN94x does not support the MCUBoot swap mode. +CONFIG_BOOT_UPGRADE_ONLY=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/frdm_mcxn947_mcxn947_cpu0_qspi.conf b/bootloader/mcuboot/boot/zephyr/boards/frdm_mcxn947_mcxn947_cpu0_qspi.conf new file mode 100644 index 0000000..3982570 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/frdm_mcxn947_mcxn947_cpu0_qspi.conf @@ -0,0 +1,5 @@ +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=1024 +CONFIG_BOOT_UPGRADE_ONLY=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/frdm_mcxn947_mcxn947_cpu0_qspi.overlay b/bootloader/mcuboot/boot/zephyr/boards/frdm_mcxn947_mcxn947_cpu0_qspi.overlay new file mode 100644 index 0000000..21d18e8 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/frdm_mcxn947_mcxn947_cpu0_qspi.overlay @@ -0,0 +1,12 @@ +/* + * Copyright 2023 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + chosen { + zephyr,flash = &flash; + }; +}; + diff --git a/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s06_lpc55s06.conf b/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s06_lpc55s06.conf new file mode 100644 index 0000000..c0f9637 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s06_lpc55s06.conf @@ -0,0 +1,6 @@ +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 + +#LPC does not support the MCUBoot swap mode. +CONFIG_BOOT_UPGRADE_ONLY=y +CONFIG_BOOT_MAX_IMG_SECTORS=256 diff --git a/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s16_lpc55s16.conf b/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s16_lpc55s16.conf new file mode 100644 index 0000000..c0f9637 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s16_lpc55s16.conf @@ -0,0 +1,6 @@ +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 + +#LPC does not support the MCUBoot swap mode. +CONFIG_BOOT_UPGRADE_ONLY=y +CONFIG_BOOT_MAX_IMG_SECTORS=256 diff --git a/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s28_lpc55s28.conf b/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s28_lpc55s28.conf new file mode 100644 index 0000000..fbe7b67 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s28_lpc55s28.conf @@ -0,0 +1,6 @@ +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 + +#LPC does not support the MCUBoot swap mode. +CONFIG_BOOT_UPGRADE_ONLY=y +CONFIG_BOOT_MAX_IMG_SECTORS=512 diff --git a/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s36_lpc55s36.conf b/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s36_lpc55s36.conf new file mode 100644 index 0000000..c0f9637 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s36_lpc55s36.conf @@ -0,0 +1,6 @@ +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 + +#LPC does not support the MCUBoot swap mode. +CONFIG_BOOT_UPGRADE_ONLY=y +CONFIG_BOOT_MAX_IMG_SECTORS=256 diff --git a/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s69_lpc55s69_cpu0.conf b/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s69_lpc55s69_cpu0.conf new file mode 100644 index 0000000..fbe7b67 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/lpcxpresso55s69_lpc55s69_cpu0.conf @@ -0,0 +1,6 @@ +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 + +#LPC does not support the MCUBoot swap mode. +CONFIG_BOOT_UPGRADE_ONLY=y +CONFIG_BOOT_MAX_IMG_SECTORS=512 diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1010_evk_mimxrt1011.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1010_evk_mimxrt1011.conf new file mode 100644 index 0000000..e7737af --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1010_evk_mimxrt1011.conf @@ -0,0 +1,4 @@ +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=2048 diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1015_evk_mimxrt1015.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1015_evk_mimxrt1015.conf new file mode 100644 index 0000000..e7737af --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1015_evk_mimxrt1015.conf @@ -0,0 +1,4 @@ +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=2048 diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1020_evk_mimxrt1021.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1020_evk_mimxrt1021.conf new file mode 100644 index 0000000..37ed5f8 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1020_evk_mimxrt1021.conf @@ -0,0 +1,4 @@ +# Copyright 2021 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=1024 diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1024_evk_mimxrt1024.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1024_evk_mimxrt1024.conf new file mode 100644 index 0000000..22e3320 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1024_evk_mimxrt1024.conf @@ -0,0 +1,4 @@ +# Copyright (c) 2021 Prevas A/S +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=512 diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1040_evk_mimxrt1042.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1040_evk_mimxrt1042.conf new file mode 100644 index 0000000..35f90d4 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1040_evk_mimxrt1042.conf @@ -0,0 +1,4 @@ +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=1024 diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1050_evk_mimxrt1052.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1050_evk_mimxrt1052.conf new file mode 100644 index 0000000..dc4ea57 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1050_evk_mimxrt1052.conf @@ -0,0 +1,5 @@ +# Copyright 2021-2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=1024 +CONFIG_BOOT_ERASE_PROGRESSIVELY=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1060_evk_mimxrt1062.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1060_evk_mimxrt1062.conf new file mode 100644 index 0000000..7850953 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1060_evk_mimxrt1062.conf @@ -0,0 +1,5 @@ +# Copyright 2021-2022 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=1024 +CONFIG_BOOT_ERASE_PROGRESSIVELY=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1060_evk_mimxrt1062_cm7.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1060_evk_mimxrt1062_cm7.conf new file mode 100644 index 0000000..480796d --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1060_evk_mimxrt1062_cm7.conf @@ -0,0 +1,7 @@ +# Copyright 2022 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=1024 +CONFIG_BOOT_ERASE_PROGRESSIVELY=y +# Move swap provides better wear levelling, so use it by default +CONFIG_BOOT_SWAP_USING_MOVE=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1060_evkb_mimxrt1062.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1060_evkb_mimxrt1062.conf new file mode 100644 index 0000000..7850953 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1060_evkb_mimxrt1062.conf @@ -0,0 +1,5 @@ +# Copyright 2021-2022 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=1024 +CONFIG_BOOT_ERASE_PROGRESSIVELY=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1062_fmurt6.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1062_fmurt6.conf new file mode 100644 index 0000000..c38a67f --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1062_fmurt6.conf @@ -0,0 +1,5 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=1024 +CONFIG_BOOT_ERASE_PROGRESSIVELY=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1064_evk_mimxrt1064.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1064_evk_mimxrt1064.conf new file mode 100644 index 0000000..1c50bc9 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1064_evk_mimxrt1064.conf @@ -0,0 +1,4 @@ +# Copyright 2021 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=512 diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1160_evk_mimxrt1166_cm7.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1160_evk_mimxrt1166_cm7.conf new file mode 100644 index 0000000..e8fc78e --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1160_evk_mimxrt1166_cm7.conf @@ -0,0 +1,5 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=2048 +CONFIG_BOOT_ERASE_PROGRESSIVELY=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt1170_evk_mimxrt1176_cm7.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1170_evk_mimxrt1176_cm7.conf new file mode 100644 index 0000000..9b299e1 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt1170_evk_mimxrt1176_cm7.conf @@ -0,0 +1,6 @@ +# Copyright 2022-2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=2048 +CONFIG_BOOT_ERASE_PROGRESSIVELY=y + diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt595_evk_mimxrt595s_cm33.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt595_evk_mimxrt595s_cm33.conf new file mode 100644 index 0000000..957f990 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt595_evk_mimxrt595s_cm33.conf @@ -0,0 +1,3 @@ +# Copyright 2023 NXP +# SPDX-License-Identifier: Apache-2.0 +CONFIG_BOOT_MAX_IMG_SECTORS=8192 diff --git a/bootloader/mcuboot/boot/zephyr/boards/mimxrt685_evk_mimxrt685s_cm33.conf b/bootloader/mcuboot/boot/zephyr/boards/mimxrt685_evk_mimxrt685s_cm33.conf new file mode 100644 index 0000000..f93c663 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/mimxrt685_evk_mimxrt685s_cm33.conf @@ -0,0 +1,4 @@ +# Copyright 2021 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=8192 diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf51dk_nrf51822.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf51dk_nrf51822.conf new file mode 100644 index 0000000..b6d5ae5 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf51dk_nrf51822.conf @@ -0,0 +1,5 @@ +# Due the small boot partition, we can't enable logging or the debug +# optimization level out off the box. You need to increase the boot +# partition size with a zephyr DTS overlay to make MCUboot's debug +# builds fit. +CONFIG_LOG=n diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52840_big.overlay b/bootloader/mcuboot/boot/zephyr/boards/nrf52840_big.overlay new file mode 100644 index 0000000..8ad19fc --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52840_big.overlay @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/delete-node/ &boot_partition; +/delete-node/ &slot0_partition; +/delete-node/ &slot1_partition; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x000000000 0x00010000>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x000010000 0x000074000>; + }; + slot1_partition: partition@75000 { + label = "image-1"; + reg = <0x00084000 0x000074000>; + }; + }; +}; + +&zephyr_udc0 { + cdc_acm_uart0 { + compatible = "zephyr,cdc-acm-uart"; + }; +}; diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52840_single_slot.overlay b/bootloader/mcuboot/boot/zephyr/boards/nrf52840_single_slot.overlay new file mode 100644 index 0000000..8e7cc33 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52840_single_slot.overlay @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/delete-node/ &boot_partition; +/delete-node/ &slot0_partition; +/delete-node/ &slot1_partition; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x000000000 0x00010000>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x000010000 0x0000E8000>; + }; + }; +}; diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_hooks_sample_overlay.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_hooks_sample_overlay.conf new file mode 100644 index 0000000..fd336db --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_hooks_sample_overlay.conf @@ -0,0 +1,6 @@ +CONFIG_UPDATEABLE_IMAGE_NUMBER=2 + +CONFIG_FLASH_SIMULATOR=y +CONFIG_FLASH_SIMULATOR_UNALIGNED_READ=y + +CONFIG_BOOT_IMAGE_ACCESS_HOOKS=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_nrf52840.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_nrf52840.conf new file mode 100644 index 0000000..3bd75a2 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_nrf52840.conf @@ -0,0 +1,2 @@ +# Ensure that the qspi driver is disabled by default +CONFIG_NORDIC_QSPI_NOR=n diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_nrf52840.overlay b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_nrf52840.overlay new file mode 100644 index 0000000..add9e2d --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_nrf52840.overlay @@ -0,0 +1,3 @@ +&uicr { + /delete-property/ gpio-as-nreset; +}; diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_qspi_nor.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_qspi_nor.conf new file mode 100644 index 0000000..3205eaf --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_qspi_nor.conf @@ -0,0 +1,3 @@ +CONFIG_NORDIC_QSPI_NOR=y +CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096 +CONFIG_NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE=16 diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_qspi_nor_secondary.overlay b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_qspi_nor_secondary.overlay new file mode 100644 index 0000000..948a530 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_qspi_nor_secondary.overlay @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/delete-node/ &boot_partition; +/delete-node/ &slot0_partition; +/delete-node/ &slot1_partition; + +&flash0 { + partitions { + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x000000000 0x00010000>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x000010000 0x0000e8000>; + }; + }; +}; + +&mx25r64 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot1_partition: partition@0 { + label = "image-1"; + reg = <0x000000000 0x0000e8000>; + }; + }; +}; diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_qspi_secondary_boot.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_qspi_secondary_boot.conf new file mode 100644 index 0000000..9f984be --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_qspi_secondary_boot.conf @@ -0,0 +1,2 @@ +CONFIG_MULTITHREADING=y +CONFIG_BOOT_MAX_IMG_SECTORS=256 diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_ram.overlay b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_ram.overlay new file mode 100644 index 0000000..d489e97 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_ram.overlay @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2021 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/delete-node/ &slot1_partition; +/delete-node/ &slot0_partition; +/delete-node/ &boot_partition; + +&flash0 { + partitions { + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x000000000 0x00010000>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x000010000 0x00000A000>; + }; + }; +}; + +/ { + soc { + flash_controller2: flash-controller@2 { + compatible = "zephyr,sim-flash"; + reg = <0x00000000 DT_SIZE_K(40)>; + + #address-cells = <1>; + #size-cells = <1>; + erase-value = <0xff>; + + flash_sim0: flash_sim@0 { + status = "okay"; + compatible = "soc-nv-flash"; + erase-block-size = <4096>; + write-block-size = <1>; + reg = <0x00000000 DT_SIZE_K(40)>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot1_partition: partition@0 { + label = "image-1"; + reg = <0x00000000 0x00000A000>; + }; + }; + }; + }; + }; +}; diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_ram_multi.overlay b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_ram_multi.overlay new file mode 100644 index 0000000..aeb0b05 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dk_ram_multi.overlay @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2021 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/delete-node/ &slot1_partition; +/delete-node/ &slot0_partition; +/delete-node/ &boot_partition; + +&flash0 { + partitions { + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x000000000 0x00010000>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x000010000 0x00000A000>; + }; + slot1_partition: partition@1A000 { + label = "image-1"; + reg = <0x00001A000 0x00000A000>; + }; + slot3_partition: partition@24000 { + label = "image-3"; + reg = <0x000024000 0x00000A000>; + }; + }; +}; + +/ { + soc { + flash_controller2: flash-controller@2 { + compatible = "zephyr,sim-flash"; + reg = <0x00000000 DT_SIZE_K(40)>; + + #address-cells = <1>; + #size-cells = <1>; + erase-value = <0xff>; + + flash_sim0: flash_sim@0 { + status = "okay"; + compatible = "soc-nv-flash"; + erase-block-size = <4096>; + write-block-size = <1>; + reg = <0x00000000 DT_SIZE_K(40)>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot2_partition: partition@0 { + label = "image-2"; + reg = <0x00000000 0x00000A000>; + }; + }; + }; + }; + }; +}; diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52840dongle_nrf52840.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dongle_nrf52840.conf new file mode 100644 index 0000000..d219f35 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52840dongle_nrf52840.conf @@ -0,0 +1,26 @@ +# The UART is used for Serial Recovery, so logging requires +# an RTT console, which is not available out of the box on this board. +# Disable logging. +CONFIG_LOG=n + +# Serial +CONFIG_CONSOLE=n +CONFIG_SERIAL=y +CONFIG_UART_NRFX=n +CONFIG_UART_INTERRUPT_DRIVEN=y +CONFIG_UART_LINE_CTRL=y + +# MCUBoot serial +CONFIG_GPIO=y +CONFIG_MCUBOOT_SERIAL=y +CONFIG_BOOT_SERIAL_CDC_ACM=y + +# Required by USB +CONFIG_MULTITHREADING=y + +# USB +CONFIG_USB_DEVICE_STACK=y +CONFIG_USB_DEVICE_REMOTE_WAKEUP=n +CONFIG_USB_DEVICE_PRODUCT="MCUBOOT" + +CONFIG_NORDIC_QSPI_NOR=n diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf52_minimal_footprint.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf52_minimal_footprint.conf new file mode 100644 index 0000000..a290312 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf52_minimal_footprint.conf @@ -0,0 +1,61 @@ +# Minimal MCUBoot flash footprint configuration +# for nRF52832 SoC targets +# This is not recomendet configuration because of security and reliability +# reasons. + + +# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) +CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256=y +CONFIG_BOOT_SIGNATURE_KEY_FILE="root-ec-p256.pem" + +# In any real project CONFIG_BOOT_VALIDATE_SLOT0 enabling is recommended +# by security reason. +# CONFIG_BOOT_VALIDATE_SLOT0 is not set + +# In most of projects CONFIG_BOOT_UPGRADE_ONLY disabling is recommended +# by reliability reason. +CONFIG_BOOT_UPGRADE_ONLY=y + +# CONFIG_BOARD_ENABLE_DCDC is not set +CONFIG_SOC_SERIES_NRF52X=y +CONFIG_SOC_NRF52832_QFAA=y +CONFIG_ARM=y +CONFIG_ARM_MPU=n +CONFIG_MAIN_STACK_SIZE=10240 +CONFIG_THREAD_STACK_INFO=n +# CONFIG_TICKLESS_KERNEL is not set +CONFIG_FLASH=y + +CONFIG_CONSOLE=n +CONFIG_DEBUG=n +CONFIG_EARLY_CONSOLE=n +CONFIG_PRINTK=n + +CONFIG_SYS_CLOCK_EXISTS=n + +# Drivers and peripherals +CONFIG_I2C=n +CONFIG_WATCHDOG=n +CONFIG_GPIO=n +CONFIG_PINMUX=n +CONFIG_SPI=n +CONFIG_SERIAL=n + +# Power management +CONFIG_PM=n + +# Interrupts +CONFIG_DYNAMIC_INTERRUPTS=n +CONFIG_IRQ_OFFLOAD=n + +# Memory protection +CONFIG_MEMORY_PROTECTION=n +CONFIG_THREAD_CUSTOM_DATA=n +CONFIG_FPU=n + +# Boot +CONFIG_BOOT_BANNER=n +CONFIG_BOOT_DELAY=0 + +# Console +CONFIG_STDOUT_CONSOLE=n diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf5340dk_nrf5340_cpuapp_minimal.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf5340dk_nrf5340_cpuapp_minimal.conf new file mode 100644 index 0000000..dd54681 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf5340dk_nrf5340_cpuapp_minimal.conf @@ -0,0 +1,13 @@ +# +# Copyright (c) 2021 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +# CC3xx is currently not used for nrf53 +CONFIG_HW_CC3XX=n +CONFIG_NRF_CC3XX_PLATFORM=n + +# Required for kernel operation +CONFIG_CLOCK_CONTROL=y +CONFIG_SYS_CLOCK_EXISTS=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf54l15dk_nrf54l15_cpuapp.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15dk_nrf54l15_cpuapp.conf new file mode 100644 index 0000000..8d8eb84 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15dk_nrf54l15_cpuapp.conf @@ -0,0 +1,13 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 +# +CONFIG_BOOT_MAX_IMG_SECTORS=256 + +# Ensure that the SPI NOR driver is disabled by default +CONFIG_SPI_NOR=n + +# TODO: below are not yet supported and need fixing +CONFIG_FPROTECT=n + +CONFIG_BOOT_WATCHDOG_FEED=n diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf54l15dk_nrf54l15_cpuapp_ext_flash.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15dk_nrf54l15_cpuapp_ext_flash.conf new file mode 100644 index 0000000..8fc12e0 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15dk_nrf54l15_cpuapp_ext_flash.conf @@ -0,0 +1,15 @@ +CONFIG_MULTITHREADING=y +CONFIG_SPI=y +CONFIG_SPI_NOR=y +CONFIG_FLASH=y +CONFIG_PM_PARTITION_SIZE_MCUBOOT=0x14000 +CONFIG_MAIN_STACK_SIZE=20480 +CONFIG_BOOT_MAX_IMG_SECTORS=512 +CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096 +# Ensure that the qspi driver is disabled by default +CONFIG_NORDIC_QSPI_NOR=n + +# TODO: below are not yet supported and need fixing +CONFIG_FPROTECT=n + +CONFIG_BOOT_WATCHDOG_FEED=n diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf54l15dk_nrf54l15_cpuapp_ext_flash.overlay b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15dk_nrf54l15_cpuapp_ext_flash.overlay new file mode 100644 index 0000000..60ee6fe --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15dk_nrf54l15_cpuapp_ext_flash.overlay @@ -0,0 +1,47 @@ +/ { + chosen { + nordic,pm-ext-flash = &mx25r64; + zephyr,code-partition = &boot_partition; + }; +}; + +/delete-node/ &boot_partition; +/delete-node/ &slot0_partition; +/delete-node/ &slot1_partition; + +/delete-node/ &slot0_ns_partition; +/delete-node/ &slot1_ns_partition; + +/delete-node/ &storage_partition; + +&cpuapp_rram { + reg = < 0x0 DT_SIZE_K(1524) >; + partitions { + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x000000000 0x00014000>; + }; + slot0_partition: partition@14000 { + label = "image-0"; + reg = <0x000014000 0x0015A000>; + }; + storage_partition: partition@16E000 { + label = "storage"; + reg = < 0x16E000 0x9000 >; + }; + }; +}; + +&mx25r64 { + status = "okay"; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot1_partition: partition@0 { + label = "image-1"; + reg = <0x000000000 0x0015A000>; + }; + }; +}; diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf54l15pdk_nrf54l15_cpuapp.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15pdk_nrf54l15_cpuapp.conf new file mode 100644 index 0000000..8d8eb84 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15pdk_nrf54l15_cpuapp.conf @@ -0,0 +1,13 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 +# +CONFIG_BOOT_MAX_IMG_SECTORS=256 + +# Ensure that the SPI NOR driver is disabled by default +CONFIG_SPI_NOR=n + +# TODO: below are not yet supported and need fixing +CONFIG_FPROTECT=n + +CONFIG_BOOT_WATCHDOG_FEED=n diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf54l15pdk_nrf54l15_cpuapp_ext_flash.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15pdk_nrf54l15_cpuapp_ext_flash.conf new file mode 100644 index 0000000..8fc12e0 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15pdk_nrf54l15_cpuapp_ext_flash.conf @@ -0,0 +1,15 @@ +CONFIG_MULTITHREADING=y +CONFIG_SPI=y +CONFIG_SPI_NOR=y +CONFIG_FLASH=y +CONFIG_PM_PARTITION_SIZE_MCUBOOT=0x14000 +CONFIG_MAIN_STACK_SIZE=20480 +CONFIG_BOOT_MAX_IMG_SECTORS=512 +CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096 +# Ensure that the qspi driver is disabled by default +CONFIG_NORDIC_QSPI_NOR=n + +# TODO: below are not yet supported and need fixing +CONFIG_FPROTECT=n + +CONFIG_BOOT_WATCHDOG_FEED=n diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf54l15pdk_nrf54l15_cpuapp_ext_flash.overlay b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15pdk_nrf54l15_cpuapp_ext_flash.overlay new file mode 100644 index 0000000..60ee6fe --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf54l15pdk_nrf54l15_cpuapp_ext_flash.overlay @@ -0,0 +1,47 @@ +/ { + chosen { + nordic,pm-ext-flash = &mx25r64; + zephyr,code-partition = &boot_partition; + }; +}; + +/delete-node/ &boot_partition; +/delete-node/ &slot0_partition; +/delete-node/ &slot1_partition; + +/delete-node/ &slot0_ns_partition; +/delete-node/ &slot1_ns_partition; + +/delete-node/ &storage_partition; + +&cpuapp_rram { + reg = < 0x0 DT_SIZE_K(1524) >; + partitions { + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x000000000 0x00014000>; + }; + slot0_partition: partition@14000 { + label = "image-0"; + reg = <0x000014000 0x0015A000>; + }; + storage_partition: partition@16E000 { + label = "storage"; + reg = < 0x16E000 0x9000 >; + }; + }; +}; + +&mx25r64 { + status = "okay"; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot1_partition: partition@0 { + label = "image-1"; + reg = <0x000000000 0x0015A000>; + }; + }; +}; diff --git a/bootloader/mcuboot/boot/zephyr/boards/nrf9161dk_nrf9161_0_7_0.conf b/bootloader/mcuboot/boot/zephyr/boards/nrf9161dk_nrf9161_0_7_0.conf new file mode 100644 index 0000000..c4ce81a --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/nrf9161dk_nrf9161_0_7_0.conf @@ -0,0 +1 @@ +CONFIG_SPI_NOR=n diff --git a/bootloader/mcuboot/boot/zephyr/boards/odroid_go_esp32_procpu.conf b/bootloader/mcuboot/boot/zephyr/boards/odroid_go_esp32_procpu.conf new file mode 100644 index 0000000..2d97ef6 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/odroid_go_esp32_procpu.conf @@ -0,0 +1,4 @@ +# SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_REGULATOR=n diff --git a/bootloader/mcuboot/boot/zephyr/boards/pinnacle_100_dvk_nrf52840.conf b/bootloader/mcuboot/boot/zephyr/boards/pinnacle_100_dvk_nrf52840.conf new file mode 100644 index 0000000..00a8dfb --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/pinnacle_100_dvk_nrf52840.conf @@ -0,0 +1,6 @@ +CONFIG_MULTITHREADING=y +# Enable QSPI (MX25R64) - Slot 1 in QSPI +CONFIG_NORDIC_QSPI_NOR=y +CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096 +CONFIG_NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE=4 +CONFIG_BOOT_MAX_IMG_SECTORS=256 diff --git a/bootloader/mcuboot/boot/zephyr/boards/rd_rw612_bga_rw612.conf b/bootloader/mcuboot/boot/zephyr/boards/rd_rw612_bga_rw612.conf new file mode 100644 index 0000000..3a751f2 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/rd_rw612_bga_rw612.conf @@ -0,0 +1,4 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=1024 diff --git a/bootloader/mcuboot/boot/zephyr/boards/sparkfun_thing_plus_nrf9160.conf b/bootloader/mcuboot/boot/zephyr/boards/sparkfun_thing_plus_nrf9160.conf new file mode 100644 index 0000000..c23f92c --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/sparkfun_thing_plus_nrf9160.conf @@ -0,0 +1,13 @@ +# Disable Zephyr console +CONFIG_CONSOLE=n + +# Multithreading +CONFIG_MULTITHREADING=y + +# MCUBoot settings +CONFIG_BOOT_MAX_IMG_SECTORS=256 + +# MCUboot serial recovery +CONFIG_MCUBOOT_SERIAL=y +CONFIG_BOOT_SERIAL_DETECT_DELAY=450 +CONFIG_MCUBOOT_INDICATION_LED=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/thingy52_nrf52832.conf b/bootloader/mcuboot/boot/zephyr/boards/thingy52_nrf52832.conf new file mode 100644 index 0000000..cf4c34c --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/thingy52_nrf52832.conf @@ -0,0 +1 @@ +CONFIG_GPIO_SX1509B=n diff --git a/bootloader/mcuboot/boot/zephyr/boards/thingy53_nrf5340_cpuapp.conf b/bootloader/mcuboot/boot/zephyr/boards/thingy53_nrf5340_cpuapp.conf new file mode 100644 index 0000000..e106566 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/thingy53_nrf5340_cpuapp.conf @@ -0,0 +1,74 @@ +CONFIG_SIZE_OPTIMIZATIONS=y + +CONFIG_SYSTEM_CLOCK_NO_WAIT=y +CONFIG_PM=n + +CONFIG_MAIN_STACK_SIZE=10240 +CONFIG_MBEDTLS_CFG_FILE="mcuboot-mbedtls-cfg.h" + +CONFIG_BOOT_MAX_IMG_SECTORS=2048 +CONFIG_BOOT_SIGNATURE_TYPE_RSA=y + +# Flash +CONFIG_FLASH=y +CONFIG_BOOT_ERASE_PROGRESSIVELY=y +CONFIG_SOC_FLASH_NRF_EMULATE_ONE_BYTE_WRITE_ACCESS=y +CONFIG_FPROTECT=y + +# Serial +CONFIG_SERIAL=y +CONFIG_UART_LINE_CTRL=y + +# MCUBoot serial +CONFIG_GPIO=y +CONFIG_GPIO_NRFX_INTERRUPT=n +CONFIG_MCUBOOT_SERIAL=y +CONFIG_MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD=y +CONFIG_BOOT_SERIAL_CDC_ACM=y + +# Required by QSPI +CONFIG_NORDIC_QSPI_NOR=y +CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096 +CONFIG_NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE=16 + +# Required by USB and QSPI +CONFIG_MULTITHREADING=y + +# USB +CONFIG_BOARD_SERIAL_BACKEND_CDC_ACM=n +CONFIG_USB_DEVICE_REMOTE_WAKEUP=n +CONFIG_USB_DEVICE_MANUFACTURER="Nordic Semiconductor ASA" +CONFIG_USB_DEVICE_PRODUCT="Bootloader Thingy:53" +CONFIG_USB_DEVICE_VID=0x1915 +CONFIG_USB_DEVICE_PID=0x5300 +CONFIG_USB_CDC_ACM=y + +# Decrease memory footprint +CONFIG_CBPRINTF_NANO=y +CONFIG_TIMESLICING=n +CONFIG_BOOT_BANNER=n +CONFIG_CONSOLE=n +CONFIG_CONSOLE_HANDLER=n +CONFIG_UART_CONSOLE=n +CONFIG_USE_SEGGER_RTT=n +CONFIG_LOG=n +CONFIG_ERRNO=n +CONFIG_PRINTK=n +CONFIG_RESET_ON_FATAL_ERROR=n +CONFIG_SPI=n +CONFIG_I2C=n +CONFIG_UART_NRFX=n + +# The following configurations are required to support simultaneous multi image update +CONFIG_PCD_APP=y +CONFIG_UPDATEABLE_IMAGE_NUMBER=2 +CONFIG_BOOT_UPGRADE_ONLY=y +# The network core cannot access external flash directly. The flash simulator must be used to +# provide a memory region that is used to forward the new firmware to the network core. +CONFIG_FLASH_SIMULATOR=y +CONFIG_FLASH_SIMULATOR_DOUBLE_WRITES=y +CONFIG_FLASH_SIMULATOR_STATS=n + +# Enable custom command to erase settings partition. +CONFIG_ENABLE_MGMT_PERUSER=y +CONFIG_BOOT_MGMT_CUSTOM_STORAGE_ERASE=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/thingy91_nrf52840.conf b/bootloader/mcuboot/boot/zephyr/boards/thingy91_nrf52840.conf new file mode 100644 index 0000000..c0d1834 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/thingy91_nrf52840.conf @@ -0,0 +1,34 @@ +# Disable Zephyr console +CONFIG_LOG=n +CONFIG_CONSOLE=n +CONFIG_CONSOLE_HANDLER=n +CONFIG_UART_CONSOLE=n + +# The build won't fit on the partition allocated for it without size +# optimizations. +CONFIG_SIZE_OPTIMIZATIONS=y +CONFIG_PM_PARTITION_SIZE_MCUBOOT=0x12000 + +# Serial +CONFIG_SERIAL=y +CONFIG_UART_NRFX=y +CONFIG_UART_INTERRUPT_DRIVEN=y +CONFIG_UART_LINE_CTRL=y + +# MCUboot serial recovery +CONFIG_GPIO=y +CONFIG_MCUBOOT_SERIAL=y +CONFIG_BOOT_SERIAL_CDC_ACM=y + +# Required by USB +CONFIG_MULTITHREADING=y + +# USB +CONFIG_USB_DEVICE_STACK=y +CONFIG_USB_DEVICE_PRODUCT="MCUBOOT" +CONFIG_USB_CDC_ACM=y +CONFIG_USB_COMPOSITE_DEVICE=y +CONFIG_USB_MASS_STORAGE=n +CONFIG_USB_DEVICE_MANUFACTURER="Nordic Semiconductor" +CONFIG_USB_DEVICE_VID=0x1915 +CONFIG_USB_DEVICE_PID=0x520F diff --git a/bootloader/mcuboot/boot/zephyr/boards/thingy91_nrf9160.conf b/bootloader/mcuboot/boot/zephyr/boards/thingy91_nrf9160.conf new file mode 100644 index 0000000..1bf2e42 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/thingy91_nrf9160.conf @@ -0,0 +1,13 @@ +# Disable Zephyr console +CONFIG_CONSOLE=n +CONFIG_CONSOLE_HANDLER=n +CONFIG_UART_CONSOLE=n + +# Disable Flash protection +CONFIG_FPROTECT=n + +# MCUBoot settings +CONFIG_BOOT_MAX_IMG_SECTORS=256 + +# MCUboot serial recovery +CONFIG_MCUBOOT_SERIAL=y diff --git a/bootloader/mcuboot/boot/zephyr/boards/thingy91x_nrf5340_cpuapp.conf b/bootloader/mcuboot/boot/zephyr/boards/thingy91x_nrf5340_cpuapp.conf new file mode 100644 index 0000000..d3e253b --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/thingy91x_nrf5340_cpuapp.conf @@ -0,0 +1,63 @@ +# MCUBoot settings +CONFIG_BOOT_MAX_IMG_SECTORS=110 + +# MCUboot serial recovery +CONFIG_MCUBOOT_SERIAL=y + +# Disable Zephyr console +CONFIG_LOG=n +CONFIG_CONSOLE=n +CONFIG_CONSOLE_HANDLER=n +CONFIG_UART_CONSOLE=n + +# Serial +CONFIG_SERIAL=y +CONFIG_UART_NRFX=y +CONFIG_UART_INTERRUPT_DRIVEN=y +CONFIG_UART_LINE_CTRL=y + +# MCUboot serial recovery +CONFIG_GPIO=y +CONFIG_MCUBOOT_SERIAL=y +CONFIG_BOOT_SERIAL_CDC_ACM=y + +# Required by USB +CONFIG_MULTITHREADING=y + +# USB +CONFIG_USB_DEVICE_STACK=y +CONFIG_USB_DEVICE_PRODUCT="MCUBOOT" +CONFIG_USB_CDC_ACM=y +CONFIG_USB_COMPOSITE_DEVICE=y +CONFIG_USB_MASS_STORAGE=n +CONFIG_USB_DEVICE_MANUFACTURER="Nordic Semiconductor" +CONFIG_USB_DEVICE_VID=0x1915 +CONFIG_USB_DEVICE_PID=0x910A + +CONFIG_BOOT_SERIAL_BOOT_MODE=y + +CONFIG_PM_PARTITION_SIZE_MCUBOOT=0x13E00 + +# The following configurations are required to support simultaneous multi image update +CONFIG_PCD_APP=y +CONFIG_UPDATEABLE_IMAGE_NUMBER=2 +CONFIG_BOOT_UPGRADE_ONLY=y +# The network core cannot access external flash directly. The flash simulator must be used to +# provide a memory region that is used to forward the new firmware to the network core. +CONFIG_FLASH_SIMULATOR=y +CONFIG_FLASH_SIMULATOR_DOUBLE_WRITES=y +CONFIG_FLASH_SIMULATOR_STATS=n + +CONFIG_BOOT_IMAGE_ACCESS_HOOKS=y + +# Makes it possible to update the network core using the flash simulator +CONFIG_NRF53_RECOVERY_NETWORK_CORE=y + +CONFIG_MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD=y +CONFIG_BOOT_SERIAL_IMG_GRP_IMAGE_STATE=y + +# Skip checks on the secondary image to make it possible to update MCUBoot on S1/S0 +CONFIG_MCUBOOT_VERIFY_IMG_ADDRESS=n + +CONFIG_BOOT_SERIAL_NO_APPLICATION=y +CONFIG_FW_INFO_FIRMWARE_VERSION=2 diff --git a/bootloader/mcuboot/boot/zephyr/boards/thingy91x_nrf9151.conf b/bootloader/mcuboot/boot/zephyr/boards/thingy91x_nrf9151.conf new file mode 100644 index 0000000..7c2042d --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/thingy91x_nrf9151.conf @@ -0,0 +1,21 @@ +# MCUBoot settings +CONFIG_BOOT_MAX_IMG_SECTORS=512 + +CONFIG_SPI=y +CONFIG_SPI_NOR=y +CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096 +CONFIG_SPI_NOR_SFDP_DEVICETREE=y +CONFIG_MULTITHREADING=y + +# Disable Zephyr console and use UART for MCUboot serial recovery instead +CONFIG_CONSOLE=n +CONFIG_CONSOLE_HANDLER=n +CONFIG_UART_CONSOLE=n +CONFIG_MCUBOOT_SERIAL=y +CONFIG_MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD=y +CONFIG_BOOT_SERIAL_IMG_GRP_IMAGE_STATE=y + +CONFIG_PM_EXTERNAL_FLASH_MCUBOOT_SECONDARY=y +CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y + +CONFIG_FW_INFO_FIRMWARE_VERSION=2 diff --git a/bootloader/mcuboot/boot/zephyr/boards/thingy91x_nrf9151.overlay b/bootloader/mcuboot/boot/zephyr/boards/thingy91x_nrf9151.overlay new file mode 100644 index 0000000..7f2818c --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/thingy91x_nrf9151.overlay @@ -0,0 +1,4 @@ +&uart0 { + status = "okay"; + current-speed = < 1000000 >; +}; diff --git a/bootloader/mcuboot/boot/zephyr/boards/tlsr9518adk80d_tlsr9518.conf b/bootloader/mcuboot/boot/zephyr/boards/tlsr9518adk80d_tlsr9518.conf new file mode 100644 index 0000000..d0f5330 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/tlsr9518adk80d_tlsr9518.conf @@ -0,0 +1,4 @@ +# Copyright 2022 Telink Semiconductor +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=4096 diff --git a/bootloader/mcuboot/boot/zephyr/boards/vmu_rt1170_mimxrt1176_cm7.conf b/bootloader/mcuboot/boot/zephyr/boards/vmu_rt1170_mimxrt1176_cm7.conf new file mode 100644 index 0000000..c38a67f --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boards/vmu_rt1170_mimxrt1176_cm7.conf @@ -0,0 +1,5 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=1024 +CONFIG_BOOT_ERASE_PROGRESSIVELY=y diff --git a/bootloader/mcuboot/boot/zephyr/boot_serial_extension_zephyr_basic.c b/bootloader/mcuboot/boot/zephyr/boot_serial_extension_zephyr_basic.c new file mode 100644 index 0000000..b0c75f4 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boot_serial_extension_zephyr_basic.c @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2021-2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include +#include <../subsys/mgmt/mcumgr/transport/include/mgmt/mcumgr/transport/smp_internal.h> + +#include +#include + +#include "bootutil/bootutil_log.h" +#include "../boot_serial/src/boot_serial_priv.h" +#include + +#include "bootutil/image.h" +#include "bootutil/bootutil_public.h" +#include "bootutil/boot_hooks.h" + +#include + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +#ifdef CONFIG_BOOT_MGMT_CUSTOM_STORAGE_ERASE +static int bs_custom_storage_erase(const struct nmgr_hdr *hdr, + const char *buffer, int len, + zcbor_state_t *cs) +{ + int rc; + const struct flash_area *fa; + + (void)buffer; + (void)len; + + if (hdr->nh_group != ZEPHYR_MGMT_GRP_BASIC || hdr->nh_op != NMGR_OP_WRITE || + hdr->nh_id != ZEPHYR_MGMT_GRP_BASIC_CMD_ERASE_STORAGE) { + return MGMT_ERR_ENOTSUP; + } + + rc = flash_area_open(FIXED_PARTITION_ID(storage_partition), &fa); + + if (rc < 0) { + BOOT_LOG_ERR("failed to open flash area"); + } else { + rc = flash_area_erase(fa, 0, flash_area_get_size(fa)); + if (rc < 0) { + BOOT_LOG_ERR("failed to erase flash area"); + } + flash_area_close(fa); + } + if (rc == 0) { + rc = MGMT_ERR_OK; + } else { + rc = MGMT_ERR_EUNKNOWN; + } + + zcbor_map_start_encode(cs, 10); + zcbor_tstr_put_lit(cs, "rc"); + zcbor_uint32_put(cs, rc); + zcbor_map_end_encode(cs, 10); + + return rc; +} + +MCUMGR_HANDLER_DEFINE(storage_erase, bs_custom_storage_erase); +#endif diff --git a/bootloader/mcuboot/boot/zephyr/boot_serial_extensions.c b/bootloader/mcuboot/boot/zephyr/boot_serial_extensions.c new file mode 100644 index 0000000..abbb651 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/boot_serial_extensions.c @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2021-2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include "bootutil/bootutil_log.h" +#include "../boot_serial/src/boot_serial_priv.h" +#include +#include + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +int bs_peruser_system_specific(const struct nmgr_hdr *hdr, const char *buffer, + int len, zcbor_state_t *cs) +{ + int mgmt_rc = MGMT_ERR_ENOTSUP; + + STRUCT_SECTION_FOREACH(mcuboot_bs_custom_handlers, function) { + if (function->handler) { + mgmt_rc = function->handler(hdr, buffer, len, cs); + + if (mgmt_rc != MGMT_ERR_ENOTSUP) { + break; + } + } + } + + if (mgmt_rc == MGMT_ERR_ENOTSUP) { + zcbor_map_start_encode(cs, 10); + zcbor_tstr_put_lit(cs, "rc"); + zcbor_uint32_put(cs, mgmt_rc); + zcbor_map_end_encode(cs, 10); + } + + return MGMT_ERR_OK; +} diff --git a/bootloader/mcuboot/boot/zephyr/decompression.c b/bootloader/mcuboot/boot/zephyr/decompression.c new file mode 100644 index 0000000..35a1950 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/decompression.c @@ -0,0 +1,1278 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#include +#include "compression/decompression.h" +#include "bootutil/crypto/sha.h" +#include "bootutil/bootutil_log.h" + +#if !defined(__BOOTSIM__) +#define TARGET_STATIC static +#else +#define TARGET_STATIC +#endif + +#if defined(MCUBOOT_SIGN_RSA) +#if MCUBOOT_SIGN_RSA_LEN == 2048 +#define EXPECTED_SIG_TLV IMAGE_TLV_RSA2048_PSS +#elif MCUBOOT_SIGN_RSA_LEN == 3072 +#define EXPECTED_SIG_TLV IMAGE_TLV_RSA3072_PSS +#endif +#elif defined(MCUBOOT_SIGN_EC256) || \ + defined(MCUBOOT_SIGN_EC384) || \ + defined(MCUBOOT_SIGN_EC) +#define EXPECTED_SIG_TLV IMAGE_TLV_ECDSA_SIG +#elif defined(MCUBOOT_SIGN_ED25519) +#define EXPECTED_SIG_TLV IMAGE_TLV_ED25519 +#endif + +#define DECOMP_BUF_SIZE CONFIG_BOOT_DECOMPRESSION_BUFFER_SIZE +#if defined(CONFIG_NRF_COMPRESS_ARM_THUMB) +#define DECOMP_BUF_EXTRA_SIZE 2 +#else +#define DECOMP_BUF_EXTRA_SIZE 0 +#endif +#define DECOMP_BUF_ALLOC_SIZE (DECOMP_BUF_SIZE + DECOMP_BUF_EXTRA_SIZE) + +/* Number of times that consumed data by decompression system can be 0 in a row before aborting */ +#define OFFSET_ZERO_CHECK_TIMES 3 + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +static int boot_sha_protected_tlvs(const struct image_header *hdr, + const struct flash_area *fap_src, uint32_t protected_size, + uint8_t *buf, size_t buf_size, bootutil_sha_context *sha_ctx); + +bool boot_is_compressed_header_valid(const struct image_header *hdr, const struct flash_area *fap, + struct boot_loader_state *state) +{ + /* Image is compressed in secondary slot, need to check if fits into the primary slot */ + bool opened_flash_area = false; + int primary_fa_id; + int rc; + int size_check; + int size; + uint32_t protected_tlvs_size; + uint32_t decompressed_size; + + if (BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT) == NULL) { + opened_flash_area = true; + } + + primary_fa_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), BOOT_PRIMARY_SLOT); + rc = flash_area_open(primary_fa_id, &BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT)); + assert(rc == 0); + + size_check = flash_area_get_size(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT)); + + if (opened_flash_area) { + (void)flash_area_close(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT)); + } + + rc = bootutil_get_img_decomp_size(hdr, fap, &decompressed_size); + + if (rc) { + return false; + } + + if (!boot_u32_safe_add(&size, decompressed_size, hdr->ih_hdr_size)) { + return false; + } + + rc = boot_size_protected_tlvs(hdr, fap, &protected_tlvs_size); + + if (rc) { + return false; + } + + if (!boot_u32_safe_add(&size, size, protected_tlvs_size)) { + return false; + } + + if (size >= size_check) { + BOOT_LOG_ERR("Compressed image too large, decompressed image size: 0x%x, slot size: 0x%x", + size, size_check); + return false; + } + + return true; +} + +static bool is_compression_object_valid(struct nrf_compress_implementation *compression) +{ + if (compression == NULL || compression->init == NULL || compression->deinit == NULL || + compression->decompress_bytes_needed == NULL || compression->decompress == NULL) { + return false; + } + + return true; +} + +int bootutil_img_hash_decompress(struct enc_key_data *enc_state, int image_index, + struct image_header *hdr, const struct flash_area *fap, + uint8_t *tmp_buf, uint32_t tmp_buf_sz, uint8_t *hash_result, + uint8_t *seed, int seed_len) +{ + int rc; + uint32_t read_pos = 0; + uint32_t write_pos = 0; + uint32_t protected_tlv_size = 0; + uint32_t decompressed_image_size; + uint32_t output_size_total = 0; + struct nrf_compress_implementation *compression_lzma = NULL; + struct nrf_compress_implementation *compression_arm_thumb = NULL; + TARGET_STATIC struct image_header modified_hdr; + bootutil_sha_context sha_ctx; + uint8_t flash_erased_value; + + bootutil_sha_init(&sha_ctx); + + /* Setup decompression system */ +#if CONFIG_NRF_COMPRESS_LZMA_VERSION_LZMA1 + if (!(hdr->ih_flags & IMAGE_F_COMPRESSED_LZMA1)) { +#elif CONFIG_NRF_COMPRESS_LZMA_VERSION_LZMA2 + if (!(hdr->ih_flags & IMAGE_F_COMPRESSED_LZMA2)) { +#endif + /* Compressed image does not use the correct compression type which is supported by this + * build + */ + BOOT_LOG_ERR("Invalid image compression flags: no supported compression found"); + rc = BOOT_EBADIMAGE; + goto finish_without_clean; + } + + compression_lzma = nrf_compress_implementation_find(NRF_COMPRESS_TYPE_LZMA); + compression_arm_thumb = nrf_compress_implementation_find(NRF_COMPRESS_TYPE_ARM_THUMB); + + if (!is_compression_object_valid(compression_lzma) || + !is_compression_object_valid(compression_arm_thumb)) { + /* Compression library missing or missing required function pointer */ + BOOT_LOG_ERR("Decompression library fatal error"); + rc = BOOT_EBADSTATUS; + goto finish_without_clean; + } + + rc = compression_lzma->init(NULL); + rc = compression_arm_thumb->init(NULL); + + if (rc) { + BOOT_LOG_ERR("Decompression library fatal error"); + rc = BOOT_EBADSTATUS; + goto finish_without_clean; + } + + /* We need a modified header which has the updated sizes, start with the original header */ + memcpy(&modified_hdr, hdr, sizeof(modified_hdr)); + + /* Extract the decompressed image size from the protected TLV, set it and remove the + * compressed image flags + */ + rc = bootutil_get_img_decomp_size(hdr, fap, &decompressed_image_size); + + if (rc) { + BOOT_LOG_ERR("Unable to determine decompressed size of compressed image"); + rc = BOOT_EBADIMAGE; + goto finish; + } + + modified_hdr.ih_flags &= ~COMPRESSIONFLAGS; + modified_hdr.ih_img_size = decompressed_image_size; + + /* Calculate the protected TLV size, these will not include the decompressed + * sha/size/signature entries + */ + rc = boot_size_protected_tlvs(hdr, fap, &protected_tlv_size); + + if (rc) { + BOOT_LOG_ERR("Unable to determine protected TLV size of compressed image"); + rc = BOOT_EBADIMAGE; + goto finish; + } + + modified_hdr.ih_protect_tlv_size = protected_tlv_size; + bootutil_sha_update(&sha_ctx, &modified_hdr, sizeof(modified_hdr)); + read_pos = sizeof(modified_hdr); + flash_erased_value = flash_area_erased_val(fap); + memset(tmp_buf, flash_erased_value, tmp_buf_sz); + + while (read_pos < modified_hdr.ih_hdr_size) { + uint32_t copy_size = tmp_buf_sz; + + if ((read_pos + copy_size) > modified_hdr.ih_hdr_size) { + copy_size = modified_hdr.ih_hdr_size - read_pos; + } + + bootutil_sha_update(&sha_ctx, tmp_buf, copy_size); + read_pos += copy_size; + } + + /* Read in compressed data, decompress and add to hash calculation */ + read_pos = 0; + + while (read_pos < hdr->ih_img_size) { + uint32_t copy_size = hdr->ih_img_size - read_pos; + uint32_t tmp_off = 0; + uint8_t offset_zero_check = 0; + + if (copy_size > tmp_buf_sz) { + copy_size = tmp_buf_sz; + } + + rc = flash_area_read(fap, (hdr->ih_hdr_size + read_pos), tmp_buf, copy_size); + + if (rc != 0) { + BOOT_LOG_ERR("Flash read failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (hdr->ih_hdr_size + read_pos), copy_size, fap->fa_id, rc); + rc = BOOT_EFLASH; + goto finish; + } + + /* Decompress data in chunks, writing it back with a larger write offset of the primary + * slot than read size of the secondary slot + */ + while (tmp_off < copy_size) { + uint32_t offset = 0; + uint8_t *output = NULL; + uint32_t output_size = 0; + uint32_t chunk_size; + bool last_packet = false; + + chunk_size = compression_lzma->decompress_bytes_needed(NULL); + + if (chunk_size > (copy_size - tmp_off)) { + chunk_size = (copy_size - tmp_off); + } + + if ((read_pos + tmp_off + chunk_size) >= hdr->ih_img_size) { + last_packet = true; + } + + rc = compression_lzma->decompress(NULL, &tmp_buf[tmp_off], chunk_size, last_packet, + &offset, &output, &output_size); + + if (rc) { + BOOT_LOG_ERR("Decompression error: %d", rc); + rc = BOOT_EBADSTATUS; + goto finish; + } + + write_pos += output_size; + + if (write_pos > decompressed_image_size) { + BOOT_LOG_ERR("Decompressed image larger than claimed TLV size, at least: %d", + write_pos); + rc = BOOT_EBADIMAGE; + goto finish; + } + + /* Additional dry-run validity checks */ + if (last_packet == true && write_pos == 0) { + /* Last packet and we still have no output, this is a faulty update */ + BOOT_LOG_ERR("All compressed data consumed without any output, image not valid"); + rc = BOOT_EBADIMAGE; + goto finish; + } + + if (offset == 0) { + /* If the decompression system continually consumes 0 bytes, then there is a + * problem with this update image, abort and mark image as bad + */ + if (offset_zero_check >= OFFSET_ZERO_CHECK_TIMES) { + BOOT_LOG_ERR("Decompression system returning no output data, image not valid"); + rc = BOOT_EBADIMAGE; + goto finish; + } + + ++offset_zero_check; + + break; + } else { + offset_zero_check = 0; + } + + /* Copy data to secondary buffer for calculating hash */ + if (output_size > 0) { + if (hdr->ih_flags & IMAGE_F_COMPRESSED_ARM_THUMB_FLT) { + /* Run this through the ARM thumb filter */ + uint32_t offset_arm_thumb = 0; + uint8_t *output_arm_thumb = NULL; + uint32_t processed_size = 0; + uint32_t output_size_arm_thumb = 0; + + while (processed_size < output_size) { + uint32_t current_size = output_size - processed_size; + bool arm_thumb_last_packet = false; + + if (current_size > CONFIG_NRF_COMPRESS_CHUNK_SIZE) { + current_size = CONFIG_NRF_COMPRESS_CHUNK_SIZE; + } + + if (last_packet && (processed_size + current_size) == + output_size) { + arm_thumb_last_packet = true; + } + + rc = compression_arm_thumb->decompress(NULL, &output[processed_size], + current_size, arm_thumb_last_packet, + &offset_arm_thumb, + &output_arm_thumb, + &output_size_arm_thumb); + + if (rc) { + BOOT_LOG_ERR("Decompression error: %d", rc); + rc = BOOT_EBADSTATUS; + goto finish; + } + + bootutil_sha_update(&sha_ctx, output_arm_thumb, output_size_arm_thumb); + output_size_total += output_size_arm_thumb; + processed_size += current_size; + } + } else { + bootutil_sha_update(&sha_ctx, output, output_size); + output_size_total += output_size; + } + } + + tmp_off += offset; + } + + read_pos += copy_size; + } + + if (modified_hdr.ih_img_size != output_size_total) { + BOOT_LOG_ERR("Decompression expected output_size mismatch: %d vs %d", + modified_hdr.ih_img_size, output_size_total); + rc = BOOT_EBADSTATUS; + goto finish; + } + + /* If there are any protected TLVs present, add them after the main decompressed image */ + if (modified_hdr.ih_protect_tlv_size > 0) { + rc = boot_sha_protected_tlvs(hdr, fap, modified_hdr.ih_protect_tlv_size, tmp_buf, + tmp_buf_sz, &sha_ctx); + } + + bootutil_sha_finish(&sha_ctx, hash_result); + +finish: + /* Clean up decompression system */ + (void)compression_lzma->deinit(NULL); + (void)compression_arm_thumb->deinit(NULL); + +finish_without_clean: + bootutil_sha_drop(&sha_ctx); + + return rc; +} + +static int boot_copy_protected_tlvs(const struct image_header *hdr, + const struct flash_area *fap_src, + const struct flash_area *fap_dst, uint32_t off_dst, + uint32_t protected_size, uint8_t *buf, size_t buf_size, + uint16_t *buf_pos, uint32_t *written) +{ + int rc; + uint32_t off; + uint32_t write_pos = 0; + uint16_t len; + uint16_t type; + struct image_tlv_iter it; + struct image_tlv tlv_header; + struct image_tlv_info tlv_info_header = { + .it_magic = IMAGE_TLV_PROT_INFO_MAGIC, + .it_tlv_tot = protected_size, + }; + uint16_t info_size_left = sizeof(tlv_info_header); + + while (info_size_left > 0) { + uint16_t copy_size = buf_size - *buf_pos; + + if (info_size_left > 0 && copy_size > 0) { + uint16_t single_copy_size = copy_size; + uint8_t *tlv_info_header_address = (uint8_t *)&tlv_info_header; + + if (single_copy_size > info_size_left) { + single_copy_size = info_size_left; + } + + memcpy(&buf[*buf_pos], &tlv_info_header_address[sizeof(tlv_info_header) - + info_size_left], single_copy_size); + *buf_pos += single_copy_size; + info_size_left -= single_copy_size; + } + + if (*buf_pos == buf_size) { + rc = flash_area_write(fap_dst, (off_dst + write_pos), buf, *buf_pos); + + if (rc != 0) { + BOOT_LOG_ERR("Flash write failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (off_dst + write_pos), *buf_pos, fap_dst->fa_id, rc); + rc = BOOT_EFLASH; + goto out; + } + + write_pos += *buf_pos; + *buf_pos = 0; + } + } + + rc = bootutil_tlv_iter_begin(&it, hdr, fap_src, IMAGE_TLV_ANY, true); + + if (rc) { + goto out; + } + + while (true) { + rc = bootutil_tlv_iter_next(&it, &off, &len, &type); + + if (rc < 0) { + goto out; + } else if (rc > 0) { + rc = 0; + break; + } + + if (type == IMAGE_TLV_DECOMP_SIZE || type == IMAGE_TLV_DECOMP_SHA || + type == IMAGE_TLV_DECOMP_SIGNATURE) { + /* Skip these TLVs as they are not needed */ + continue; + } else { + uint16_t header_size_left = sizeof(tlv_header); + uint16_t data_size_left = len; + + tlv_header.it_type = type; + tlv_header.it_len = len; + + while (header_size_left > 0 || data_size_left > 0) { + uint16_t copy_size = buf_size - *buf_pos; + uint8_t *tlv_header_address = (uint8_t *)&tlv_header; + + if (header_size_left > 0 && copy_size > 0) { + uint16_t single_copy_size = copy_size; + + if (single_copy_size > header_size_left) { + single_copy_size = header_size_left; + } + + memcpy(&buf[*buf_pos], &tlv_header_address[sizeof(tlv_header) - + header_size_left], + single_copy_size); + *buf_pos += single_copy_size; + copy_size -= single_copy_size; + header_size_left -= single_copy_size; + } + + if (data_size_left > 0 && copy_size > 0) { + uint16_t single_copy_size = copy_size; + + if (single_copy_size > data_size_left) { + single_copy_size = data_size_left; + } + + rc = LOAD_IMAGE_DATA(hdr, fap_src, (off + (len - data_size_left)), + &buf[*buf_pos], single_copy_size); + + if (rc) { + BOOT_LOG_ERR( + "Image data load failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (off + (len - data_size_left)), single_copy_size, fap_src->fa_id, rc); + goto out; + } + + *buf_pos += single_copy_size; + data_size_left -= single_copy_size; + } + + if (*buf_pos == buf_size) { + rc = flash_area_write(fap_dst, (off_dst + write_pos), buf, *buf_pos); + + if (rc != 0) { + BOOT_LOG_ERR( + "Flash write failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (off_dst + write_pos), *buf_pos, fap_dst->fa_id, rc); + rc = BOOT_EFLASH; + goto out; + } + + write_pos += *buf_pos; + *buf_pos = 0; + } + } + } + } + + *written = write_pos; + +out: + return rc; +} + +static int boot_sha_protected_tlvs(const struct image_header *hdr, + const struct flash_area *fap_src, uint32_t protected_size, + uint8_t *buf, size_t buf_size, bootutil_sha_context *sha_ctx) +{ + int rc; + uint32_t off; + uint16_t len; + uint16_t type; + struct image_tlv_iter it; + struct image_tlv tlv_header; + struct image_tlv_info tlv_info_header = { + .it_magic = IMAGE_TLV_PROT_INFO_MAGIC, + .it_tlv_tot = protected_size, + }; + + bootutil_sha_update(sha_ctx, &tlv_info_header, sizeof(tlv_info_header)); + + rc = bootutil_tlv_iter_begin(&it, hdr, fap_src, IMAGE_TLV_ANY, true); + if (rc) { + goto out; + } + + while (true) { + uint32_t read_off = 0; + + rc = bootutil_tlv_iter_next(&it, &off, &len, &type); + + if (rc < 0) { + goto out; + } else if (rc > 0) { + rc = 0; + break; + } + + if (type == IMAGE_TLV_DECOMP_SIZE || type == IMAGE_TLV_DECOMP_SHA || + type == IMAGE_TLV_DECOMP_SIGNATURE) { + /* Skip these TLVs as they are not needed */ + continue; + } + + tlv_header.it_type = type; + tlv_header.it_len = len; + + bootutil_sha_update(sha_ctx, &tlv_header, sizeof(tlv_header)); + + while (read_off < len) { + uint32_t copy_size = buf_size; + + if (copy_size > (len - read_off)) { + copy_size = len - read_off; + } + + rc = LOAD_IMAGE_DATA(hdr, fap_src, (off + read_off), buf, copy_size); + + if (rc) { + BOOT_LOG_ERR( + "Image data load failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (off + read_off), copy_size, fap_src->fa_id, rc); + goto out; + } + + bootutil_sha_update(sha_ctx, buf, copy_size); + read_off += copy_size; + } + } + +out: + return rc; +} + +int boot_size_protected_tlvs(const struct image_header *hdr, const struct flash_area *fap, + uint32_t *sz) +{ + int rc = 0; + uint32_t tlv_size; + uint32_t off; + uint16_t len; + uint16_t type; + struct image_tlv_iter it; + + *sz = 0; + tlv_size = hdr->ih_protect_tlv_size; + + rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_ANY, true); + + if (rc) { + goto out; + } + + while (true) { + rc = bootutil_tlv_iter_next(&it, &off, &len, &type); + + if (rc < 0) { + goto out; + } else if (rc > 0) { + rc = 0; + break; + } + + if (type == IMAGE_TLV_DECOMP_SIZE || type == IMAGE_TLV_DECOMP_SHA || + type == IMAGE_TLV_DECOMP_SIGNATURE) { + /* Exclude these TLVs as they will be copied to the unprotected area */ + tlv_size -= len + sizeof(struct image_tlv); + } + } + + if (!rc) { + if (tlv_size == sizeof(struct image_tlv_info)) { + /* If there are no entries then omit protected TLV section entirely */ + tlv_size = 0; + } + + *sz = tlv_size; + } + +out: + return rc; +} + +int boot_size_unprotected_tlvs(const struct image_header *hdr, const struct flash_area *fap, + uint32_t *sz) +{ + int rc = 0; + uint32_t tlv_size; + uint32_t off; + uint16_t len; + uint16_t type; + struct image_tlv_iter it; + + *sz = 0; + tlv_size = sizeof(struct image_tlv_info); + + rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_ANY, false); + + if (rc) { + goto out; + } + + while (true) { + rc = bootutil_tlv_iter_next(&it, &off, &len, &type); + + if (rc < 0) { + goto out; + } else if (rc > 0) { + rc = 0; + break; + } else if (bootutil_tlv_iter_is_prot(&it, off) && type != IMAGE_TLV_DECOMP_SHA && + type != IMAGE_TLV_DECOMP_SIGNATURE) { + /* Include size of protected hash and signature as these will be replacing the + * original ones + */ + continue; + } else if (type == EXPECTED_HASH_TLV || type == EXPECTED_SIG_TLV) { + /* Exclude the original unprotected TLVs for signature and hash, the length of the + * signature of the compressed data might not be the same size as the signaute of the + * decompressed data, as is the case when using ECDSA-P256 + */ + continue; + } + + tlv_size += len + sizeof(struct image_tlv); + } + + if (!rc) { + if (tlv_size == sizeof(struct image_tlv_info)) { + /* If there are no entries in the unprotected TLV section then there is something wrong + * with this image + */ + BOOT_LOG_ERR("No unprotected TLVs in post-decompressed image output, image is invalid"); + rc = BOOT_EBADIMAGE; + goto out; + } + + *sz = tlv_size; + } + +out: + return rc; +} + +static int boot_copy_unprotected_tlvs(const struct image_header *hdr, + const struct flash_area *fap_src, + const struct flash_area *fap_dst, uint32_t off_dst, + uint32_t unprotected_size, uint8_t *buf, size_t buf_size, + uint16_t *buf_pos, uint32_t *written) +{ + int rc; + uint32_t write_pos = 0; + uint32_t off; + uint16_t len; + uint16_t type; + struct image_tlv_iter it; + struct image_tlv_iter it_protected; + struct image_tlv tlv_header; + struct image_tlv_info tlv_info_header = { + .it_magic = IMAGE_TLV_INFO_MAGIC, + .it_tlv_tot = unprotected_size, + }; + uint16_t info_size_left = sizeof(tlv_info_header); + + while (info_size_left > 0) { + uint16_t copy_size = buf_size - *buf_pos; + + if (info_size_left > 0 && copy_size > 0) { + uint16_t single_copy_size = copy_size; + uint8_t *tlv_info_header_address = (uint8_t *)&tlv_info_header; + + if (single_copy_size > info_size_left) { + single_copy_size = info_size_left; + } + + memcpy(&buf[*buf_pos], &tlv_info_header_address[sizeof(tlv_info_header) - + info_size_left], single_copy_size); + *buf_pos += single_copy_size; + info_size_left -= single_copy_size; + } + + if (*buf_pos == buf_size) { + rc = flash_area_write(fap_dst, (off_dst + write_pos), buf, *buf_pos); + + if (rc != 0) { + BOOT_LOG_ERR("Flash write failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (off_dst + write_pos), *buf_pos, fap_dst->fa_id, rc); + rc = BOOT_EFLASH; + goto out; + } + + write_pos += *buf_pos; + *buf_pos = 0; + } + } + + rc = bootutil_tlv_iter_begin(&it, hdr, fap_src, IMAGE_TLV_ANY, false); + if (rc) { + goto out; + } + + while (true) { + uint16_t header_size_left = sizeof(tlv_header); + uint16_t data_size_left; + + rc = bootutil_tlv_iter_next(&it, &off, &len, &type); + if (rc < 0) { + goto out; + } else if (rc > 0) { + rc = 0; + break; + } else if (bootutil_tlv_iter_is_prot(&it, off)) { + /* Skip protected TLVs */ + continue; + } + + /* Change the values of these fields from having the data in the compressed image + * unprotected TLV (which is valid only for the compressed image data) to having the + * fields in the protected TLV section (which is valid for the decompressed image data). + * The compressed data is no longer needed + */ + if (type == EXPECTED_HASH_TLV || type == EXPECTED_SIG_TLV) { + rc = bootutil_tlv_iter_begin(&it_protected, hdr, fap_src, (type == EXPECTED_HASH_TLV ? + IMAGE_TLV_DECOMP_SHA : + IMAGE_TLV_DECOMP_SIGNATURE), + true); + + if (rc) { + goto out; + } + + while (true) { + rc = bootutil_tlv_iter_next(&it_protected, &off, &len, &type); + if (rc < 0) { + goto out; + } else if (rc > 0) { + rc = 0; + break; + } + } + + if (type == IMAGE_TLV_DECOMP_SHA) { + type = EXPECTED_HASH_TLV; + } else { + type = EXPECTED_SIG_TLV; + } + } + + data_size_left = len; + tlv_header.it_type = type; + tlv_header.it_len = len; + + while (header_size_left > 0 || data_size_left > 0) { + uint16_t copy_size = buf_size - *buf_pos; + + if (header_size_left > 0 && copy_size > 0) { + uint16_t single_copy_size = copy_size; + uint8_t *tlv_header_address = (uint8_t *)&tlv_header; + + if (single_copy_size > header_size_left) { + single_copy_size = header_size_left; + } + + memcpy(&buf[*buf_pos], &tlv_header_address[sizeof(tlv_header) - header_size_left], + single_copy_size); + *buf_pos += single_copy_size; + copy_size -= single_copy_size; + header_size_left -= single_copy_size; + } + + if (data_size_left > 0 && copy_size > 0) { + uint16_t single_copy_size = copy_size; + + if (single_copy_size > data_size_left) { + single_copy_size = data_size_left; + } + + rc = LOAD_IMAGE_DATA(hdr, fap_src, (off + len - data_size_left), + &buf[*buf_pos], single_copy_size); + + if (rc) { + BOOT_LOG_ERR( + "Image data load failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (off + (len - data_size_left)), single_copy_size, fap_src->fa_id, rc); + goto out; + } + + *buf_pos += single_copy_size; + data_size_left -= single_copy_size; + } + + if (*buf_pos == buf_size) { + rc = flash_area_write(fap_dst, (off_dst + write_pos), buf, *buf_pos); + + if (rc != 0) { + BOOT_LOG_ERR( + "Flash write failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (off_dst + write_pos), *buf_pos, fap_dst->fa_id, rc); + rc = BOOT_EFLASH; + goto out; + } + + write_pos += *buf_pos; + *buf_pos = 0; + } + } + } + + *written = write_pos; + +out: + return rc; +} + +int boot_copy_region_decompress(struct boot_loader_state *state, const struct flash_area *fap_src, + const struct flash_area *fap_dst, uint32_t off_src, + uint32_t off_dst, uint32_t sz, uint8_t *buf, size_t buf_size) +{ + int rc; + uint32_t pos = 0; + uint16_t decomp_buf_size = 0; + uint16_t write_alignment; + uint32_t write_pos = 0; + uint32_t protected_tlv_size = 0; + uint32_t unprotected_tlv_size = 0; + uint32_t tlv_write_size = 0; + uint32_t decompressed_image_size; + struct nrf_compress_implementation *compression_lzma = NULL; + struct nrf_compress_implementation *compression_arm_thumb = NULL; + struct image_header *hdr; + TARGET_STATIC uint8_t decomp_buf[DECOMP_BUF_ALLOC_SIZE] __attribute__((aligned(4))); + TARGET_STATIC struct image_header modified_hdr; + +#if defined(CONFIG_NRF_COMPRESS_ARM_THUMB) + uint8_t excess_data_buffer[DECOMP_BUF_EXTRA_SIZE]; + bool excess_data_buffer_full = false; +#endif + + hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT); + + /* Setup decompression system */ +#if CONFIG_NRF_COMPRESS_LZMA_VERSION_LZMA1 + if (!(hdr->ih_flags & IMAGE_F_COMPRESSED_LZMA1)) { +#elif CONFIG_NRF_COMPRESS_LZMA_VERSION_LZMA2 + if (!(hdr->ih_flags & IMAGE_F_COMPRESSED_LZMA2)) { +#endif + /* Compressed image does not use the correct compression type which is supported by this + * build + */ + BOOT_LOG_ERR("Invalid image compression flags: no supported compression found"); + rc = BOOT_EBADIMAGE; + goto finish; + } + + compression_lzma = nrf_compress_implementation_find(NRF_COMPRESS_TYPE_LZMA); + compression_arm_thumb = nrf_compress_implementation_find(NRF_COMPRESS_TYPE_ARM_THUMB); + + if (!is_compression_object_valid(compression_lzma) || + !is_compression_object_valid(compression_arm_thumb)) { + /* Compression library missing or missing required function pointer */ + BOOT_LOG_ERR("Decompression library fatal error"); + rc = BOOT_EBADSTATUS; + goto finish; + } + + rc = compression_lzma->init(NULL); + rc = compression_arm_thumb->init(NULL); + + if (rc) { + BOOT_LOG_ERR("Decompression library fatal error"); + rc = BOOT_EBADSTATUS; + goto finish; + } + + write_alignment = flash_area_align(fap_dst); + + memcpy(&modified_hdr, hdr, sizeof(modified_hdr)); + + rc = bootutil_get_img_decomp_size(hdr, fap_src, &decompressed_image_size); + + if (rc) { + BOOT_LOG_ERR("Unable to determine decompressed size of compressed image"); + rc = BOOT_EBADIMAGE; + goto finish; + } + + modified_hdr.ih_flags &= ~COMPRESSIONFLAGS; + modified_hdr.ih_img_size = decompressed_image_size; + + /* Calculate protected TLV size for target image once items are removed */ + rc = boot_size_protected_tlvs(hdr, fap_src, &protected_tlv_size); + + if (rc) { + BOOT_LOG_ERR("Unable to determine protected TLV size of compressed image"); + rc = BOOT_EBADIMAGE; + goto finish; + } + + modified_hdr.ih_protect_tlv_size = protected_tlv_size; + + rc = boot_size_unprotected_tlvs(hdr, fap_src, &unprotected_tlv_size); + + if (rc) { + BOOT_LOG_ERR("Unable to determine unprotected TLV size of compressed image"); + rc = BOOT_EBADIMAGE; + goto finish; + } + + /* Write out the image header first, this should be a multiple of the write size */ + rc = flash_area_write(fap_dst, off_dst, &modified_hdr, sizeof(modified_hdr)); + + if (rc != 0) { + BOOT_LOG_ERR("Flash write failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + off_dst, sizeof(modified_hdr), fap_dst->fa_id, rc); + rc = BOOT_EFLASH; + goto finish; + } + + /* Read in, decompress and write out data */ + while (pos < hdr->ih_img_size) { + uint32_t copy_size = hdr->ih_img_size - pos; + uint32_t tmp_off = 0; + + if (copy_size > buf_size) { + copy_size = buf_size; + } + + rc = flash_area_read(fap_src, off_src + hdr->ih_hdr_size + pos, buf, copy_size); + + if (rc != 0) { + BOOT_LOG_ERR("Flash read failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (off_src + hdr->ih_hdr_size + pos), copy_size, fap_src->fa_id, rc); + rc = BOOT_EFLASH; + goto finish; + } + + /* Decompress data in chunks, writing it back with a larger write offset of the primary + * slot than read size of the secondary slot + */ + while (tmp_off < copy_size) { + uint32_t offset = 0; + uint32_t output_size = 0; + uint32_t chunk_size; + uint32_t compression_buffer_pos = 0; + uint8_t *output = NULL; + bool last_packet = false; + + chunk_size = compression_lzma->decompress_bytes_needed(NULL); + + if (chunk_size > (copy_size - tmp_off)) { + chunk_size = (copy_size - tmp_off); + } + + if ((pos + tmp_off + chunk_size) >= hdr->ih_img_size) { + last_packet = true; + } + + rc = compression_lzma->decompress(NULL, &buf[tmp_off], chunk_size, last_packet, + &offset, &output, &output_size); + + if (rc) { + BOOT_LOG_ERR("Decompression error: %d", rc); + rc = BOOT_EBADSTATUS; + goto finish; + } + + /* Copy data to secondary buffer for writing out */ + while (output_size > 0) { + uint32_t data_size = (DECOMP_BUF_SIZE - decomp_buf_size); + + if (data_size > output_size) { + data_size = output_size; + } + +#if defined(CONFIG_NRF_COMPRESS_ARM_THUMB) + if (hdr->ih_flags & IMAGE_F_COMPRESSED_ARM_THUMB_FLT) { + memcpy(&decomp_buf[decomp_buf_size + DECOMP_BUF_EXTRA_SIZE], + &output[compression_buffer_pos], data_size); + } else +#endif + { + memcpy(&decomp_buf[decomp_buf_size], &output[compression_buffer_pos], + data_size); + } + + compression_buffer_pos += data_size; + + decomp_buf_size += data_size; + output_size -= data_size; + + /* Write data out from secondary buffer when it is full */ + if (decomp_buf_size == DECOMP_BUF_SIZE) { +#if defined(CONFIG_NRF_COMPRESS_ARM_THUMB) + if (hdr->ih_flags & IMAGE_F_COMPRESSED_ARM_THUMB_FLT) { + uint32_t filter_writeback_pos = 0; + uint32_t processed_size = 0; + + /* Run this through the ARM thumb filter */ + while (processed_size < DECOMP_BUF_SIZE) { + uint32_t offset_arm_thumb = 0; + uint32_t output_size_arm_thumb = 0; + uint8_t *output_arm_thumb = NULL; + uint32_t current_size = DECOMP_BUF_SIZE; + bool arm_thumb_last_packet = false; + + if (current_size > CONFIG_NRF_COMPRESS_CHUNK_SIZE) { + current_size = CONFIG_NRF_COMPRESS_CHUNK_SIZE; + } + + if (last_packet && (processed_size + current_size) == DECOMP_BUF_SIZE + && output_size == 0) { + arm_thumb_last_packet = true; + } + + rc = compression_arm_thumb->decompress(NULL, + &decomp_buf[processed_size + + DECOMP_BUF_EXTRA_SIZE], + current_size, + arm_thumb_last_packet, + &offset_arm_thumb, + &output_arm_thumb, + &output_size_arm_thumb); + + if (rc) { + BOOT_LOG_ERR("Decompression error: %d", rc); + rc = BOOT_EBADSTATUS; + goto finish; + } + + memcpy(&decomp_buf[filter_writeback_pos], output_arm_thumb, + output_size_arm_thumb); + filter_writeback_pos += output_size_arm_thumb; + processed_size += current_size; + } + + if (excess_data_buffer_full == true) + { + /* Restore extra data removed from previous iteration to the write + * buffer + */ + memmove(&decomp_buf[DECOMP_BUF_EXTRA_SIZE], decomp_buf, + filter_writeback_pos); + memcpy(decomp_buf, excess_data_buffer, DECOMP_BUF_EXTRA_SIZE); + excess_data_buffer_full = false; + filter_writeback_pos += DECOMP_BUF_EXTRA_SIZE; + } + + if ((filter_writeback_pos % sizeof(uint32_t)) != 0) + { + /* Since there are an extra 2 bytes here, remove them and stash for + * later usage to prevent flash write issues with non-word boundary + * writes + */ + memcpy(excess_data_buffer, &decomp_buf[filter_writeback_pos - + DECOMP_BUF_EXTRA_SIZE], + DECOMP_BUF_EXTRA_SIZE); + excess_data_buffer_full = true; + filter_writeback_pos -= DECOMP_BUF_EXTRA_SIZE; + } + + rc = flash_area_write(fap_dst, (off_dst + hdr->ih_hdr_size + write_pos), + decomp_buf, filter_writeback_pos); + + if (rc != 0) { + BOOT_LOG_ERR( + "Flash write failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (off_dst + hdr->ih_hdr_size + write_pos), DECOMP_BUF_SIZE, + fap_dst->fa_id, rc); + rc = BOOT_EFLASH; + goto finish; + } + + write_pos += filter_writeback_pos; + decomp_buf_size = 0; + filter_writeback_pos = 0; + } else +#endif + { + rc = flash_area_write(fap_dst, (off_dst + hdr->ih_hdr_size + write_pos), + decomp_buf, DECOMP_BUF_SIZE); + + if (rc != 0) { + BOOT_LOG_ERR( + "Flash write failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (off_dst + hdr->ih_hdr_size + write_pos), DECOMP_BUF_SIZE, + fap_dst->fa_id, rc); + rc = BOOT_EFLASH; + goto finish; + } + + write_pos += DECOMP_BUF_SIZE; + decomp_buf_size = 0; + } + } + } + + tmp_off += offset; + } + + pos += copy_size; + } + +#if defined(CONFIG_NRF_COMPRESS_ARM_THUMB) + if (hdr->ih_flags & IMAGE_F_COMPRESSED_ARM_THUMB_FLT && decomp_buf_size > 0) { + /* Extra data that has not been written out that needs ARM thumb filter applied */ + uint32_t offset_arm_thumb = 0; + uint32_t output_size_arm_thumb = 0; + uint8_t *output_arm_thumb = NULL; + + rc = compression_arm_thumb->decompress(NULL, &decomp_buf[DECOMP_BUF_EXTRA_SIZE], + decomp_buf_size, true, &offset_arm_thumb, + &output_arm_thumb, &output_size_arm_thumb); + + if (rc) { + BOOT_LOG_ERR("Decompression error: %d", rc); + rc = BOOT_EBADSTATUS; + goto finish; + } + + memcpy(decomp_buf, output_arm_thumb, output_size_arm_thumb); + } +#endif + + /* Clean up decompression system */ + (void)compression_lzma->deinit(NULL); + (void)compression_arm_thumb->deinit(NULL); + + if (protected_tlv_size > 0) { + rc = boot_copy_protected_tlvs(hdr, fap_src, fap_dst, (off_dst + hdr->ih_hdr_size + + write_pos), protected_tlv_size, + decomp_buf, DECOMP_BUF_SIZE, &decomp_buf_size, + &tlv_write_size); + + if (rc) { + BOOT_LOG_ERR("Protected TLV copy failure: %d", rc); + goto finish; + } + + write_pos += tlv_write_size; + } + + tlv_write_size = 0; + rc = boot_copy_unprotected_tlvs(hdr, fap_src, fap_dst, (off_dst + hdr->ih_hdr_size + + write_pos), unprotected_tlv_size, + decomp_buf, DECOMP_BUF_SIZE, &decomp_buf_size, + &tlv_write_size); + + if (rc) { + BOOT_LOG_ERR("Protected TLV copy failure: %d", rc); + goto finish; + } + + write_pos += tlv_write_size; + + /* Check if we have unwritten data buffered up and, if so, write it out */ + if (decomp_buf_size > 0) { + uint32_t write_padding_size = write_alignment - (decomp_buf_size % write_alignment); + + /* Check if additional write padding should be applied to meet the minimum write size */ + if (write_alignment > 1 && write_padding_size) { + uint8_t flash_erased_value; + + flash_erased_value = flash_area_erased_val(fap_dst); + memset(&decomp_buf[decomp_buf_size], flash_erased_value, write_padding_size); + decomp_buf_size += write_padding_size; + } + + rc = flash_area_write(fap_dst, (off_dst + hdr->ih_hdr_size + write_pos), decomp_buf, + decomp_buf_size); + + if (rc != 0) { + BOOT_LOG_ERR("Flash write failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + (off_dst + hdr->ih_hdr_size + write_pos), decomp_buf_size, + fap_dst->fa_id, rc); + rc = BOOT_EFLASH; + goto finish; + } + + write_pos += decomp_buf_size; + decomp_buf_size = 0; + } + +finish: + memset(decomp_buf, 0, sizeof(decomp_buf)); + + return rc; +} + +int bootutil_get_img_decomp_size(const struct image_header *hdr, const struct flash_area *fap, + uint32_t *img_decomp_size) +{ + struct image_tlv_iter it; + uint32_t off; + uint16_t len; + int32_t rc; + + if (hdr == NULL || fap == NULL || img_decomp_size == NULL) { + return BOOT_EBADARGS; + } else if (hdr->ih_protect_tlv_size == 0) { + return BOOT_EBADIMAGE; + } + + rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_DECOMP_SIZE, true); + + if (rc) { + return rc; + } + + rc = bootutil_tlv_iter_next(&it, &off, &len, NULL); + + if (rc != 0) { + return -1; + } + + if (len != sizeof(*img_decomp_size)) { + BOOT_LOG_ERR("Invalid decompressed image size TLV: %d", len); + return BOOT_EBADIMAGE; + } + + rc = LOAD_IMAGE_DATA(hdr, fap, off, img_decomp_size, len); + + if (rc) { + BOOT_LOG_ERR("Image data load failed at offset: 0x%x, size: 0x%x, area: %d, rc: %d", + off, len, fap->fa_id, rc); + return BOOT_EFLASH; + } + + return 0; +} diff --git a/bootloader/mcuboot/boot/zephyr/external_crypto.conf b/bootloader/mcuboot/boot/zephyr/external_crypto.conf new file mode 100644 index 0000000..8181ad5 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/external_crypto.conf @@ -0,0 +1,20 @@ +# +# Copyright (c) 2021 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +# These configurations should be used when using nrf/samples/bootloader +# as the immutable bootloader (B0), and MCUBoot as the second stage updateable +# bootloader. + +# Set ECDSA as signing mechanism +CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256=y + +# Use crypto backend from B0 +CONFIG_BOOT_NRF_EXTERNAL_CRYPTO=y +CONFIG_SECURE_BOOT_CRYPTO=y +CONFIG_SB_CRYPTO_CLIENT_ECDSA_SECP256R1=y +CONFIG_SB_CRYPTO_CLIENT_SHA256=y +CONFIG_BL_SHA256_EXT_API_REQUIRED=y +CONFIG_BL_SECP256R1_EXT_API_REQUIRED=y diff --git a/bootloader/mcuboot/boot/zephyr/firmware_loader.c b/bootloader/mcuboot/boot/zephyr/firmware_loader.c new file mode 100644 index 0000000..11b461c --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/firmware_loader.c @@ -0,0 +1,196 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2020 Arm Limited + * Copyright (c) 2020-2023 Nordic Semiconductor ASA + */ + +#include +#include +#include +#include +#include "bootutil/image.h" +#include "bootutil_priv.h" +#include "bootutil/bootutil_log.h" +#include "bootutil/bootutil_public.h" +#include "bootutil/fault_injection_hardening.h" + +#include "io/io.h" +#include "mcuboot_config/mcuboot_config.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +/* Variables passed outside of unit via poiters. */ +static const struct flash_area *_fa_p; +static struct image_header _hdr = { 0 }; + +#if defined(MCUBOOT_VALIDATE_PRIMARY_SLOT) || defined(MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE) +/** + * Validate hash of a primary boot image. + * + * @param[in] fa_p flash area pointer + * @param[in] hdr boot image header pointer + * + * @return FIH_SUCCESS on success, error code otherwise + */ +fih_ret +boot_image_validate(const struct flash_area *fa_p, + struct image_header *hdr) +{ + static uint8_t tmpbuf[BOOT_TMPBUF_SZ]; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + /* NOTE: The first argument to boot_image_validate, for enc_state pointer, + * is allowed to be NULL only because the single image loader compiles + * with BOOT_IMAGE_NUMBER == 1, which excludes the code that uses + * the pointer from compilation. + */ + /* Validate hash */ + if (IS_ENCRYPTED(hdr)) + { + /* Clear the encrypted flag we didn't supply a key + * This flag could be set if there was a decryption in place + * was performed. We will try to validate the image, and if still + * encrypted the validation will fail, and go in panic mode + */ + hdr->ih_flags &= ~(ENCRYPTIONFLAGS); + } + FIH_CALL(bootutil_img_validate, fih_rc, NULL, 0, hdr, fa_p, tmpbuf, + BOOT_TMPBUF_SZ, NULL, 0, NULL); + + FIH_RET(fih_rc); +} +#endif /* MCUBOOT_VALIDATE_PRIMARY_SLOT || MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE*/ + +#if defined(MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE) +inline static fih_ret +boot_image_validate_once(const struct flash_area *fa_p, + struct image_header *hdr) +{ + static struct boot_swap_state state; + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + memset(&state, 0, sizeof(struct boot_swap_state)); + rc = boot_read_swap_state(fa_p, &state); + if (rc != 0) + FIH_RET(FIH_FAILURE); + if (state.magic != BOOT_MAGIC_GOOD + || state.image_ok != BOOT_FLAG_SET) { + /* At least validate the image once */ + FIH_CALL(boot_image_validate, fih_rc, fa_p, hdr); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_RET(FIH_FAILURE); + } + if (state.magic != BOOT_MAGIC_GOOD) { + rc = boot_write_magic(fa_p); + if (rc != 0) + FIH_RET(FIH_FAILURE); + } + rc = boot_write_image_ok(fa_p); + if (rc != 0) + FIH_RET(FIH_FAILURE); + } + FIH_RET(FIH_SUCCESS); +} +#endif + +/** + * Validates that an image in a slot is OK to boot. + * + * @param[in] slot Slot number to check + * @param[out] rsp Parameters for booting image, on success + * + * @return FIH_SUCCESS on success; non-zero on failure. + */ +static fih_ret validate_image_slot(int slot, struct boot_rsp *rsp) +{ + int rc = -1; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + rc = flash_area_open(slot, &_fa_p); + assert(rc == 0); + + rc = boot_image_load_header(_fa_p, &_hdr); + if (rc != 0) { + goto other; + } + +#ifdef MCUBOOT_VALIDATE_PRIMARY_SLOT + FIH_CALL(boot_image_validate, fih_rc, _fa_p, &_hdr); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + goto other; + } +#elif defined(MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE) + FIH_CALL(boot_image_validate_once, fih_rc, _fa_p, &_hdr); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + goto other; + } +#else + fih_rc = FIH_SUCCESS; +#endif /* MCUBOOT_VALIDATE_PRIMARY_SLOT */ + + rsp->br_flash_dev_id = flash_area_get_device_id(_fa_p); + rsp->br_image_off = flash_area_get_off(_fa_p); + rsp->br_hdr = &_hdr; + +other: + flash_area_close(_fa_p); + + FIH_RET(fih_rc); +} + +/** + * Gather information on image and prepare for booting. Will boot from main + * image if none of the enabled entrance modes for the firmware loader are set, + * otherwise will boot the firmware loader. Note: firmware loader must be a + * valid signed image with the same signing key as the application image. + * + * @param[out] rsp Parameters for booting image, on success + * + * @return FIH_SUCCESS on success; non-zero on failure. + */ +fih_ret +boot_go(struct boot_rsp *rsp) +{ + bool boot_firmware_loader = false; + FIH_DECLARE(fih_rc, FIH_FAILURE); + +#ifdef CONFIG_BOOT_FIRMWARE_LOADER_ENTRANCE_GPIO + if (io_detect_pin() && + !io_boot_skip_serial_recovery()) { + boot_firmware_loader = true; + } +#endif + +#ifdef CONFIG_BOOT_FIRMWARE_LOADER_PIN_RESET + if (io_detect_pin_reset()) { + boot_firmware_loader = true; + } +#endif + +#ifdef CONFIG_BOOT_FIRMWARE_LOADER_BOOT_MODE + if (io_detect_boot_mode()) { + boot_firmware_loader = true; + } +#endif + + /* Check if firmware loader button is pressed. TODO: check all entrance methods */ + if (boot_firmware_loader == true) { + FIH_CALL(validate_image_slot, fih_rc, FLASH_AREA_IMAGE_SECONDARY(0), rsp); + + if (FIH_EQ(fih_rc, FIH_SUCCESS)) { + FIH_RET(fih_rc); + } + } + + FIH_CALL(validate_image_slot, fih_rc, FLASH_AREA_IMAGE_PRIMARY(0), rsp); + +#ifdef CONFIG_BOOT_FIRMWARE_LOADER_NO_APPLICATION + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_CALL(validate_image_slot, fih_rc, FLASH_AREA_IMAGE_SECONDARY(0), rsp); + } +#endif + + FIH_RET(fih_rc); +} diff --git a/bootloader/mcuboot/boot/zephyr/flash_map_extended.c b/bootloader/mcuboot/boot/zephyr/flash_map_extended.c new file mode 100644 index 0000000..d0744af --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/flash_map_extended.c @@ -0,0 +1,174 @@ +/* + * Copyright (c) 2018 Nordic Semiconductor ASA + * Copyright (c) 2015 Runtime Inc + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +#include "target.h" + +#include +#include + +#include "bootutil/bootutil_log.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +#if (!defined(CONFIG_XTENSA) && DT_HAS_CHOSEN(zephyr_flash_controller)) +#define FLASH_DEVICE_ID SOC_FLASH_0_ID +#define FLASH_DEVICE_BASE CONFIG_FLASH_BASE_ADDRESS +#define FLASH_DEVICE_NODE DT_CHOSEN(zephyr_flash_controller) + +#elif (defined(CONFIG_XTENSA) && DT_NODE_EXISTS(DT_INST(0, jedec_spi_nor))) +#define FLASH_DEVICE_ID SPI_FLASH_0_ID +#define FLASH_DEVICE_BASE 0 +#define FLASH_DEVICE_NODE DT_INST(0, jedec_spi_nor) + +#elif defined(CONFIG_SOC_FAMILY_ESPRESSIF_ESP32) + +#define FLASH_DEVICE_ID SPI_FLASH_0_ID +#define FLASH_DEVICE_BASE 0 +#define FLASH_DEVICE_NODE DT_CHOSEN(zephyr_flash_controller) + +#else +#error "FLASH_DEVICE_ID could not be determined" +#endif + +static const struct device *flash_dev = DEVICE_DT_GET(FLASH_DEVICE_NODE); + +int flash_device_base(uint8_t fd_id, uintptr_t *ret) +{ + if (fd_id != FLASH_DEVICE_ID) { + BOOT_LOG_ERR("invalid flash ID %d; expected %d", + fd_id, FLASH_DEVICE_ID); + return -EINVAL; + } + *ret = FLASH_DEVICE_BASE; + return 0; +} + +/* + * This depends on the mappings defined in sysflash.h. + * MCUBoot uses continuous numbering for the primary slot, the secondary slot, + * and the scratch while zephyr might number it differently. + */ +int flash_area_id_from_multi_image_slot(int image_index, int slot) +{ + switch (slot) { + case 0: return FLASH_AREA_IMAGE_PRIMARY(image_index); +#if !defined(CONFIG_SINGLE_APPLICATION_SLOT) + case 1: return FLASH_AREA_IMAGE_SECONDARY(image_index); +#endif +#if defined(CONFIG_BOOT_SWAP_USING_SCRATCH) + case 2: return FLASH_AREA_IMAGE_SCRATCH; +#endif + } + + return -EINVAL; /* flash_area_open will fail on that */ +} + +int flash_area_id_from_image_slot(int slot) +{ + return flash_area_id_from_multi_image_slot(0, slot); +} + +int flash_area_id_to_multi_image_slot(int image_index, int area_id) +{ + if (area_id == FLASH_AREA_IMAGE_PRIMARY(image_index)) { + return 0; + } +#if !defined(CONFIG_SINGLE_APPLICATION_SLOT) + if (area_id == FLASH_AREA_IMAGE_SECONDARY(image_index)) { + return 1; + } +#endif + + BOOT_LOG_ERR("invalid flash area ID"); + return -1; +} + +#if defined(CONFIG_MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD) +int flash_area_id_from_direct_image(int image_id) +{ + switch (image_id) { + case 0: + case 1: + return FIXED_PARTITION_ID(slot0_partition); +#if FIXED_PARTITION_EXISTS(slot1_partition) + case 2: + return FIXED_PARTITION_ID(slot1_partition); +#endif +#if FIXED_PARTITION_EXISTS(slot2_partition) + case 3: + return FIXED_PARTITION_ID(slot2_partition); +#endif +#if FIXED_PARTITION_EXISTS(slot3_partition) + case 4: + return FIXED_PARTITION_ID(slot3_partition); +#endif +#if FIXED_PARTITION_EXISTS(slot4_partition) + case 5: + return FIXED_PARTITION_ID(slot4_partition); +#endif +#if FIXED_PARTITION_EXISTS(slot5_partition) + case 6: + return FIXED_PARTITION_ID(slot5_partition); +#endif + } + return -EINVAL; +} +#endif + +int flash_area_sector_from_off(off_t off, struct flash_sector *sector) +{ + int rc; + struct flash_pages_info page; + + rc = flash_get_page_info_by_offs(flash_dev, off, &page); + if (rc) { + return rc; + } + + sector->fs_off = page.start_offset; + sector->fs_size = page.size; + + return rc; +} + +uint8_t flash_area_get_device_id(const struct flash_area *fa) +{ + (void)fa; + return FLASH_DEVICE_ID; +} + +#define ERASED_VAL 0xff +__weak uint8_t flash_area_erased_val(const struct flash_area *fap) +{ + (void)fap; + return ERASED_VAL; +} + +int flash_area_get_sector(const struct flash_area *fap, off_t off, + struct flash_sector *fsp) +{ + struct flash_pages_info fpi; + int rc; + + if (off >= fap->fa_size) { + return -ERANGE; + } + + rc = flash_get_page_info_by_offs(fap->fa_dev, fap->fa_off + off, + &fpi); + + if (rc == 0) { + fsp->fs_off = fpi.start_offset - fap->fa_off; + fsp->fs_size = fpi.size; + } + + return rc; +} diff --git a/bootloader/mcuboot/boot/zephyr/flash_map_legacy.c b/bootloader/mcuboot/boot/zephyr/flash_map_legacy.c new file mode 100644 index 0000000..6a8e7ae --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/flash_map_legacy.c @@ -0,0 +1,104 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +/** + * @file + * @brief Legacy flash fallbacks + * + * This file contains hacks for flash drivers without page layout + * support. They're hacks because they guess a page layout that may be + * incorrect, but is likely to "work". Needless to say, such guesswork + * is undesirable in trusted bootloader code. + * + * The behavior is: + * + * - If FLASH_AREA_IMAGE_SECTOR_SIZE is defined (this was used by + * older Zephyr ports), the image sectors have uniform sector sizes. + * We also assume that's the size of the scratch sectors. + * + * - Otherwise, we assume that the size of the entire scratch area is + * a least common multiple of all sector sizes, and use that as + * FLASH_AREA_IMAGE_SECTOR_SIZE. + */ + +#include "bootutil/bootutil_log.h" + +#include +#include +#include + +#warning "The flash driver lacks page layout support; falling back on hacks." + +#if !defined(FLASH_AREA_IMAGE_SECTOR_SIZE) +#define FLASH_AREA_IMAGE_SECTOR_SIZE FLASH_AREA_IMAGE_SCRATCH_SIZE +#endif + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +/* + * Lookup the sector map for a given flash area. This should fill in + * `ret` with all of the sectors in the area. `*cnt` will be set to + * the storage at `ret` and should be set to the final number of + * sectors in this area. + */ +int flash_area_get_sectors(int idx, uint32_t *cnt, struct flash_sector *ret) +{ + const struct flash_area *fa; + uint32_t max_cnt = *cnt; + uint32_t rem_len; + int rc = -1; + + if (flash_area_open(idx, &fa)) { + goto out; + } + + BOOT_LOG_DBG("area %d: offset=0x%x, length=0x%x", idx, fa->fa_off, + fa->fa_size); + + if (*cnt < 1) { + goto fa_close_out; + } + + rem_len = fa->fa_size; + *cnt = 0; + while (rem_len > 0 && *cnt < max_cnt) { + if (rem_len < FLASH_AREA_IMAGE_SECTOR_SIZE) { + BOOT_LOG_ERR("area %d size 0x%x not divisible by sector size 0x%x", + idx, fa->fa_size, FLASH_AREA_IMAGE_SECTOR_SIZE); + goto fa_close_out; + } + + ret[*cnt].fs_off = FLASH_AREA_IMAGE_SECTOR_SIZE * (*cnt); + ret[*cnt].fs_size = FLASH_AREA_IMAGE_SECTOR_SIZE; + *cnt = *cnt + 1; + rem_len -= FLASH_AREA_IMAGE_SECTOR_SIZE; + } + + if (*cnt >= max_cnt) { + BOOT_LOG_ERR("flash area %d sector count overflow", idx); + goto fa_close_out; + } + + rc = 0; + +fa_close_out: + flash_area_close(fa); +out: + return rc; +} diff --git a/bootloader/mcuboot/boot/zephyr/hooks_sample.c b/bootloader/mcuboot/boot/zephyr/hooks_sample.c new file mode 100644 index 0000000..a5a7293 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/hooks_sample.c @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2021 Nordic Semiconductor ASA + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include "bootutil/image.h" +#include "bootutil/bootutil.h" +#include "bootutil/fault_injection_hardening.h" +#include "flash_map_backend/flash_map_backend.h" + +/* @retval 0: header was read/populated + * FIH_FAILURE: image is invalid, + * BOOT_HOOK_REGULAR if hook not implemented for the image-slot, + * othervise an error-code value. + */ +int boot_read_image_header_hook(int img_index, int slot, + struct image_header *img_hed) +{ + if (img_index == 1 && slot == 0) { + img_hed->ih_magic = IMAGE_MAGIC; + return 0; + } + + return BOOT_HOOK_REGULAR; +} + +/* @retval FIH_SUCCESS: image is valid, + * FIH_FAILURE: image is invalid, + * fih encoded BOOT_HOOK_REGULAR if hook not implemented for + * the image-slot. + */ +fih_ret boot_image_check_hook(int img_index, int slot) +{ + if (img_index == 1 && slot == 0) { + FIH_RET(FIH_SUCCESS); + } + + FIH_RET(FIH_BOOT_HOOK_REGULAR); +} + +int boot_perform_update_hook(int img_index, struct image_header *img_head, + const struct flash_area *area) +{ + if (img_index == 1) { + return 0; + } + + return BOOT_HOOK_REGULAR; +} + +int boot_read_swap_state_primary_slot_hook(int image_index, + struct boot_swap_state *state) +{ + if (image_index == 1) { + state->magic = BOOT_MAGIC_UNSET; + state->swap_type = BOOT_SWAP_TYPE_NONE; + state->image_num = image_index ; // ? + state->copy_done = BOOT_FLAG_UNSET; + state->image_ok = BOOT_FLAG_UNSET; + + return 0; + } + + return BOOT_HOOK_REGULAR; +} + +int boot_copy_region_post_hook(int img_index, const struct flash_area *area, + size_t size) +{ + return 0; +} + +int boot_serial_uploaded_hook(int img_index, const struct flash_area *area, + size_t size) +{ + return 0; +} + +int boot_img_install_stat_hook(int image_index, int slot, int *img_install_stat) +{ + return BOOT_HOOK_REGULAR; +} diff --git a/bootloader/mcuboot/boot/zephyr/include/arm_cleanup.h b/bootloader/mcuboot/boot/zephyr/include/arm_cleanup.h new file mode 100644 index 0000000..565477c --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/arm_cleanup.h @@ -0,0 +1,23 @@ + +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef H_ARM_CLEANUP_ +#define H_ARM_CLEANUP_ + +/** + * Cleanup interrupt priority and interupt enable registers. + */ +void cleanup_arm_nvic(void); + +#if defined(CONFIG_CPU_HAS_ARM_MPU) || defined(CONFIG_CPU_HAS_NXP_MPU) +/** + * Cleanup all ARM MPU region configuration + */ +void z_arm_clear_arm_mpu_config(void); +#endif + +#endif diff --git a/bootloader/mcuboot/boot/zephyr/include/boot_serial/boot_serial.ld b/bootloader/mcuboot/boot/zephyr/include/boot_serial/boot_serial.ld new file mode 100644 index 0000000..c0e82ad --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/boot_serial/boot_serial.ld @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +ITERABLE_SECTION_ROM(mcuboot_bs_custom_handlers, 4) diff --git a/bootloader/mcuboot/boot/zephyr/include/boot_serial/boot_serial_extensions.h b/bootloader/mcuboot/boot/zephyr/include/boot_serial/boot_serial_extensions.h new file mode 100644 index 0000000..6eea574 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/boot_serial/boot_serial_extensions.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef H_BOOT_SERIAL_EXTENTIONS_ +#define H_BOOT_SERIAL_EXTENTIONS_ + +#include +#include +#include + +/** + * Callback handler prototype for boot serial extensions. + * + * @param[in] hdr MCUmgr header + * @param[in] buffer Buffer with first MCUmgr message + * @param[in] len Length of data in buffer + * @param[out] cs Response + * + * @return MGMT_ERR_ENOTSUP to run other handlers, other MGMT_ERR_* value + * when expected handler has ran. + */ +typedef int (*bs_custom_handler_cb)(const struct nmgr_hdr *hdr, + const char *buffer, int len, + zcbor_state_t *cs); + +struct mcuboot_bs_custom_handlers { + const bs_custom_handler_cb handler; +}; + +/* Used to create an iterable section containing a boot serial handler + * function + */ +#define MCUMGR_HANDLER_DEFINE(name, _handler) \ + STRUCT_SECTION_ITERABLE(mcuboot_bs_custom_handlers, name) = { \ + .handler = _handler, \ + } + +#endif /* H_BOOT_SERIAL_EXTENTIONS_ */ diff --git a/bootloader/mcuboot/boot/zephyr/include/compression/decompression.h b/bootloader/mcuboot/boot/zephyr/include/compression/decompression.h new file mode 100644 index 0000000..f8a676a --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/compression/decompression.h @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#ifndef H_DECOMPRESSION_ +#define H_DECOMPRESSION_ + +#include +#include +#include +#include "bootutil/bootutil.h" +#include "bootutil/bootutil_public.h" +#include "bootutil/image.h" +#include "../src/bootutil_priv.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Checks if a compressed image header is valid. + * + * @param hdr Image header. + * @param fap Flash area of the slot. + * @param state Bootloader state object. + * + * @return true if valid; false if invalid. + */ +bool boot_is_compressed_header_valid(const struct image_header *hdr, const struct flash_area *fap, + struct boot_loader_state *state); + +/** + * Reads in compressed image data from a slot, decompresses it and writes it out to a destination + * slot, including corresponding image headers and TLVs. + * + * @param state Bootloader state object. + * @param fap_src Flash area of the source slot. + * @param fap_dst Flash area of the destination slot. + * @param off_src Offset of the source slot to read from (should be 0). + * @param off_dst Offset of the destination slot to write to (should be 0). + * @param sz Size of the source slot data. + * @param buf Temporary buffer for reading data from. + * @param buf_size Size of temporary buffer. + * + * @return 0 on success; nonzero on failure. + */ +int boot_copy_region_decompress(struct boot_loader_state *state, const struct flash_area *fap_src, + const struct flash_area *fap_dst, uint32_t off_src, + uint32_t off_dst, uint32_t sz, uint8_t *buf, size_t buf_size); + +/** + * Gets the total data size (excluding headers and TLVs) of a compressed image when it is + * decompressed. + * + * @param hdr Image header. + * @param fap Flash area of the slot. + * @param img_decomp_size Pointer to variable that will be updated with the decompressed image + * size. + * + * @return 0 on success; nonzero on failure. + */ +int bootutil_get_img_decomp_size(const struct image_header *hdr, const struct flash_area *fap, + uint32_t *img_decomp_size); + +/** + * Calculate MCUboot-compatible image hash of compressed image slot. + * + * @param enc_state Not currently used, set to NULL. + * @param image_index Image number. + * @param hdr Image header. + * @param fap Flash area of the slot. + * @param tmp_buf Temporary buffer for reading data from. + * @param tmp_buf_sz Size of temporary buffer. + * @param hash_result Pointer to a variable that will be updated with the image hash. + * @param seed Not currently used, set to NULL. + * @param seed_len Not currently used, set to 0. + * + * @return 0 on success; nonzero on failure. + */ +int bootutil_img_hash_decompress(struct enc_key_data *enc_state, int image_index, + struct image_header *hdr, const struct flash_area *fap, + uint8_t *tmp_buf, uint32_t tmp_buf_sz, uint8_t *hash_result, + uint8_t *seed, int seed_len); + +/** + * Calculates the size that the compressed image protected TLV section will occupy once the image + * has been decompressed. + * + * @param hdr Image header. + * @param fap Flash area of the slot. + * @param sz Pointer to variable that will be updated with the protected TLV size. + * + * @return 0 on success; nonzero on failure. + */ +int boot_size_protected_tlvs(const struct image_header *hdr, const struct flash_area *fap_src, + uint32_t *sz); + +#ifdef __cplusplus +} +#endif + +#endif /* H_DECOMPRESSION_ */ diff --git a/bootloader/mcuboot/boot/zephyr/include/config-asn1.h b/bootloader/mcuboot/boot/zephyr/include/config-asn1.h new file mode 100644 index 0000000..b9d70df --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/config-asn1.h @@ -0,0 +1,44 @@ +/* + * Configuration of mbedTLS containing only the ASN.1 parser. + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - RSA or ECDSA signature verification + */ + +#ifndef MBEDTLS_CONFIG_ASN1_H +#define MBEDTLS_CONFIG_ASN1_H + +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +/* mbed TLS modules */ +#define MBEDTLS_ASN1_PARSE_C +// #define MBEDTLS_ASN1_WRITE_C +// #define MBEDTLS_BIGNUM_C +// #define MBEDTLS_MD_C +// #define MBEDTLS_OID_C +// #define MBEDTLS_SHA256_C + +#endif /* MBEDTLS_CONFIG_ASN1_H */ diff --git a/bootloader/mcuboot/boot/zephyr/include/config-ec.h b/bootloader/mcuboot/boot/zephyr/include/config-ec.h new file mode 100644 index 0000000..f6c690b --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/config-ec.h @@ -0,0 +1,94 @@ +/* + * Minimal configuration for using TLS in the bootloader + * + * Copyright (C) 2006-2021, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - RSA or ECDSA signature verification + */ + +#ifndef MCUBOOT_MBEDTLS_CONFIG_ECDSA +#define MCUBOOT_MBEDTLS_CONFIG_ECDSA + +#ifdef CONFIG_MCUBOOT_SERIAL +/* Mcuboot uses mbedts-base64 for serial protocol encoding. */ +#define MBEDTLS_BASE64_C +#endif + +/* System support */ +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C +#define MBEDTLS_NO_PLATFORM_ENTROPY +#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/* STD functions */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +#define MBEDTLS_PLATFORM_EXIT_ALT +#define MBEDTLS_PLATFORM_PRINTF_ALT +#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +#if !defined(CONFIG_ARM) +#define MBEDTLS_HAVE_ASM +#endif + +#define MBEDTLS_ECDSA_C +#define MBEDTLS_ECDH_C + +/* mbed TLS modules */ +#define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_ASN1_WRITE_C +#define MBEDTLS_ECP_C +#define MBEDTLS_ECP_DP_SECP256R1_ENABLED +#define MBEDTLS_ECP_NIST_OPTIM +#define MBEDTLS_BIGNUM_C +#define MBEDTLS_MD_C +#define MBEDTLS_OID_C +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA256_SMALLER +#define MBEDTLS_SHA224_C +#define MBEDTLS_AES_C + +/* Bring in support for x509. */ +#define MBEDTLS_X509_USE_C +#define MBEDTLS_PK_C +#define MBEDTLS_PK_PARSE_C +#define MBEDTLS_X509_CRT_PARSE_C + +/* Save RAM by adjusting to our exact needs */ +#define MBEDTLS_MPI_MAX_SIZE 32 + +#define MBEDTLS_SSL_MAX_CONTENT_LEN 1024 + +/* Save ROM and a few bytes of RAM by specifying our own ciphersuite list */ +#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + +/* If encryption is being used, also enable the features needed for + * that. */ +#if defined(MCUBOOT_ENC_IMAGES) +#define MBEDTLS_CIPHER_MODE_CTR +#define MBEDTLS_CIPHER_C +#define MBEDTLS_NIST_KW_C +#endif /* MCUBOOT_ENC_IMAGES */ + +#endif /* MCUBOOT_MBEDTLS_CONFIG_ECDSA */ diff --git a/bootloader/mcuboot/boot/zephyr/include/config-ed25519.h b/bootloader/mcuboot/boot/zephyr/include/config-ed25519.h new file mode 100644 index 0000000..2766ee2 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/config-ed25519.h @@ -0,0 +1,76 @@ +/* + * Configuration of mbedTLS containing only the ASN.1 parser. + * + * Copyright (C) 2006-2021, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - ed25519 signature verification + */ + +#ifndef MCUBOOT_MBEDTLS_CONFIG_ED25519 +#define MCUBOOT_MBEDTLS_CONFIG_ED25519 + +#ifdef CONFIG_MCUBOOT_SERIAL +/* Mcuboot uses mbedts-base64 for serial protocol encoding. */ +#define MBEDTLS_BASE64_C +#endif + +/* System support */ +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C +#define MBEDTLS_NO_PLATFORM_ENTROPY +#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/* STD functions */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +#define MBEDTLS_PLATFORM_EXIT_ALT +#define MBEDTLS_PLATFORM_PRINTF_ALT +#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +#if !defined(CONFIG_ARM) +#define MBEDTLS_HAVE_ASM +#endif + +#define MBEDTLS_CIPHER_MODE_CTR + +/* mbed TLS modules */ +#define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_BIGNUM_C +#define MBEDTLS_MD_C +#define MBEDTLS_OID_C +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA256_SMALLER +#define MBEDTLS_SHA224_C +#define MBEDTLS_SHA512_C +#define MBEDTLS_AES_C + +/* Save RAM by adjusting to our exact needs */ +#define MBEDTLS_MPI_MAX_SIZE 64 + +//#define MBEDTLS_SSL_MAX_CONTENT_LEN 1024 + +/* Save ROM and a few bytes of RAM by specifying our own ciphersuite list */ +#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + +#endif /* MCUBOOT_MBEDTLS_CONFIG_RSA */ diff --git a/bootloader/mcuboot/boot/zephyr/include/config-kw.h b/bootloader/mcuboot/boot/zephyr/include/config-kw.h new file mode 100644 index 0000000..1198fe5 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/config-kw.h @@ -0,0 +1,66 @@ +/* + * Minimal configuration for using TLS in the bootloader + * + * Copyright (C) 2006-2021, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - RSA or ECDSA signature verification + */ + +#ifndef MCUBOOT_MBEDTLS_CONFIG_KW +#define MCUBOOT_MBEDTLS_CONFIG_KW + +#ifdef CONFIG_MCUBOOT_SERIAL +/* Mcuboot uses mbedts-base64 for serial protocol encoding. */ +#define MBEDTLS_BASE64_C +#endif + +/* System support */ +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C +#define MBEDTLS_NO_PLATFORM_ENTROPY +#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/* STD functions */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +#define MBEDTLS_PLATFORM_EXIT_ALT +#define MBEDTLS_PLATFORM_PRINTF_ALT +#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +#define MBEDTLS_ASN1_PARSE_C + +#if !defined(CONFIG_ARM) +#define MBEDTLS_HAVE_ASM +#endif + +#define MBEDTLS_CIPHER_MODE_CTR + +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA256_SMALLER +#define MBEDTLS_SHA224_C +#define MBEDTLS_AES_C +#define MBEDTLS_CIPHER_C +#define MBEDTLS_NIST_KW_C + +#endif /* MCUBOOT_MBEDTLS_CONFIG_KW */ diff --git a/bootloader/mcuboot/boot/zephyr/include/config-rsa-kw.h b/bootloader/mcuboot/boot/zephyr/include/config-rsa-kw.h new file mode 100644 index 0000000..ae67df9 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/config-rsa-kw.h @@ -0,0 +1,80 @@ +/* + * Minimal configuration for using TLS in the bootloader + * + * Copyright (C) 2006-2021, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - RSA signature verification + NIST Keywrapping support + */ + +#ifndef MCUBOOT_MBEDTLS_CONFIG_RSA_KW +#define MCUBOOT_MBEDTLS_CONFIG_RSA_KW + +#ifdef CONFIG_MCUBOOT_SERIAL +/* Mcuboot uses mbedts-base64 for serial protocol encoding. */ +#define MBEDTLS_BASE64_C +#endif + +/* System support */ +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C +#define MBEDTLS_NO_PLATFORM_ENTROPY +#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/* STD functions */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +#define MBEDTLS_PLATFORM_EXIT_ALT +#define MBEDTLS_PLATFORM_PRINTF_ALT +#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +#if !defined(CONFIG_ARM) +#define MBEDTLS_HAVE_ASM +#endif + +#define MBEDTLS_RSA_C +#define MBEDTLS_PKCS1_V21 + +#define MBEDTLS_CIPHER_MODE_CTR + +/* mbed TLS modules */ +#define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_BIGNUM_C +#define MBEDTLS_MD_C +#define MBEDTLS_OID_C +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA256_SMALLER +#define MBEDTLS_SHA224_C +#define MBEDTLS_AES_C +#define MBEDTLS_CIPHER_C +#define MBEDTLS_NIST_KW_C + +/* Save RAM by adjusting to our exact needs */ +#define MBEDTLS_MPI_MAX_SIZE 256 + +#define MBEDTLS_SSL_MAX_CONTENT_LEN 1024 + +/* Save ROM and a few bytes of RAM by specifying our own ciphersuite list */ +#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + +#endif /* MCUBOOT_MBEDTLS_CONFIG_RSA_KW */ diff --git a/bootloader/mcuboot/boot/zephyr/include/config-rsa.h b/bootloader/mcuboot/boot/zephyr/include/config-rsa.h new file mode 100644 index 0000000..4b7c75e --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/config-rsa.h @@ -0,0 +1,83 @@ +/* + * Minimal configuration for using TLS in the bootloader + * + * Copyright (C) 2006-2021, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - RSA or ECDSA signature verification + */ + +#ifndef MCUBOOT_MBEDTLS_CONFIG_RSA +#define MCUBOOT_MBEDTLS_CONFIG_RSA + +#ifdef CONFIG_MCUBOOT_SERIAL +/* Mcuboot uses mbedts-base64 for serial protocol encoding. */ +#define MBEDTLS_BASE64_C +#endif + +/* System support */ +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C +#define MBEDTLS_NO_PLATFORM_ENTROPY +#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/* STD functions */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +#define MBEDTLS_PLATFORM_EXIT_ALT +#define MBEDTLS_PLATFORM_PRINTF_ALT +#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +#if !defined(CONFIG_ARM) +#define MBEDTLS_HAVE_ASM +#endif + +#define MBEDTLS_RSA_C +#define MBEDTLS_PKCS1_V21 + +#define MBEDTLS_CIPHER_MODE_CTR + +/* mbed TLS modules */ +#define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_ASN1_WRITE_C +#define MBEDTLS_BIGNUM_C +#define MBEDTLS_MD_C +#define MBEDTLS_OID_C +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA256_SMALLER +#define MBEDTLS_SHA224_C +#define MBEDTLS_AES_C + +/* Save RAM by adjusting to our exact needs */ +#if (CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN == 3072) +#define MBEDTLS_MPI_MAX_SIZE 384 +#else +#define MBEDTLS_MPI_MAX_SIZE 256 +#endif + +#define MBEDTLS_SSL_MAX_CONTENT_LEN 1024 + +/* Save ROM and a few bytes of RAM by specifying our own ciphersuite list */ +#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + +#endif /* MCUBOOT_MBEDTLS_CONFIG_RSA */ diff --git a/bootloader/mcuboot/boot/zephyr/include/flash_map_backend/flash_map_backend.h b/bootloader/mcuboot/boot/zephyr/include/flash_map_backend/flash_map_backend.h new file mode 100644 index 0000000..e5408a1 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/flash_map_backend/flash_map_backend.h @@ -0,0 +1,113 @@ +/* + * Copyright (c) 2018 Nordic Semiconductor ASA + * Copyright (c) 2015 Runtime Inc + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __FLASH_MAP_BACKEND_H__ +#define __FLASH_MAP_BACKEND_H__ + +#include // the zephyr flash_map + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * + * Provides abstraction of flash regions for type of use. + * I.e. dude where's my image? + * + * System will contain a map which contains flash areas. Every + * region will contain flash identifier, offset within flash and length. + * + * 1. This system map could be in a file within filesystem (Initializer + * must know/figure out where the filesystem is at). + * 2. Map could be at fixed location for project (compiled to code) + * 3. Map could be at specific place in flash (put in place at mfg time). + * + * Note that the map you use must be valid for BSP it's for, + * match the linker scripts when platform executes from flash, + * and match the target offset specified in download script. + */ +#include +#include + +/* + * Retrieve a memory-mapped flash device's base address. + * + * On success, the address will be stored in the value pointed to by + * ret. + * + * Returns 0 on success, or an error code on failure. + */ +int flash_device_base(uint8_t fd_id, uintptr_t *ret); + +int flash_area_id_from_image_slot(int slot); +int flash_area_id_from_multi_image_slot(int image_index, int slot); + +/** + * Converts the specified flash area ID and image index (in multi-image setup) + * to an image slot index. + * + * Returns image slot index (0 or 1), or -1 if ID doesn't correspond to an image + * slot. + */ +int flash_area_id_to_multi_image_slot(int image_index, int area_id); + +/* Retrieve the flash sector a given offset belongs to. + * + * Returns 0 on success, or an error code on failure. + */ +int flash_area_sector_from_off(off_t off, struct flash_sector *sector); + +static inline uint32_t flash_area_get_off(const struct flash_area *fa) +{ + return (uint32_t)fa->fa_off; +} + +static inline uint32_t flash_area_get_size(const struct flash_area *fa) +{ + return (uint32_t)fa->fa_size; +} + +static inline uint8_t flash_area_get_id(const struct flash_area *fa) +{ + return fa->fa_id; +} + +uint8_t flash_area_get_device_id(const struct flash_area *fa); + +/* + * Returns the value expected to be read when accessing any erased + * flash byte. + */ +uint8_t flash_area_erased_val(const struct flash_area *fap); + +static inline uint32_t flash_sector_get_off(const struct flash_sector *fs) +{ + return fs->fs_off; +} + +static inline uint32_t flash_sector_get_size(const struct flash_sector *fs) +{ + return fs->fs_size; +} + +/* Retrieve the flash sector withing given flash area, at a given offset. + * + * @param fa flash area where the sector is taken from. + * @param off offset within flash area. + * @param sector structure of sector information. + * Returns 0 on success, -ERANGE if @p off is beyond flash area size, + * other negative errno code on failure. + */ +int flash_area_get_sector(const struct flash_area *fa, off_t off, + struct flash_sector *fs); + +#ifdef __cplusplus +} +#endif + +#endif /* __FLASH_MAP_BACKEND_H__ */ diff --git a/bootloader/mcuboot/boot/zephyr/include/hal/hal_bsp.h b/bootloader/mcuboot/boot/zephyr/include/hal/hal_bsp.h new file mode 100644 index 0000000..8b52f27 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/hal/hal_bsp.h @@ -0,0 +1,79 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef __HAL_BSP_H_ +#define __HAL_BSP_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/* + * Initializes BSP; registers flash_map with the system. + */ +void hal_bsp_init(void); + +/* + * Return pointer to flash device structure, given BSP specific + * flash id. + */ +struct hal_flash; +const struct hal_flash *hal_bsp_flash_dev(uint8_t flash_id); + +/* + * Grows heap by given amount. XXX giving space back not implemented. + */ +void *_sbrk(int incr); + +/* + * Report which memory areas should be included inside a coredump. + */ +struct hal_bsp_mem_dump { + void *hbmd_start; + uint32_t hbmd_size; +}; + +const struct hal_bsp_mem_dump *hal_bsp_core_dump(int *area_cnt); + +/* + * Get unique HW identifier/serial number for platform. + * Returns the number of bytes filled in. + */ +#define HAL_BSP_MAX_ID_LEN 32 +int hal_bsp_hw_id(uint8_t *id, int max_len); + +#define HAL_BSP_POWER_ON (1) +#define HAL_BSP_POWER_WFI (2) +#define HAL_BSP_POWER_SLEEP (3) +#define HAL_BSP_POWER_DEEP_SLEEP (4) +#define HAL_BSP_POWER_OFF (5) +#define HAL_BSP_POWER_PERUSER (128) + +int hal_bsp_power_state(int state); + +/* Returns priority of given interrupt number */ +uint32_t hal_bsp_get_nvic_priority(int irq_num, uint32_t pri); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/zephyr/include/hal/hal_flash.h b/bootloader/mcuboot/boot/zephyr/include/hal/hal_flash.h new file mode 100644 index 0000000..2895479 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/hal/hal_flash.h @@ -0,0 +1,43 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_HAL_FLASH_ +#define H_HAL_FLASH_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +int hal_flash_read(uint8_t flash_id, uint32_t address, void *dst, + uint32_t num_bytes); +int hal_flash_write(uint8_t flash_id, uint32_t address, const void *src, + uint32_t num_bytes); +int hal_flash_erase_sector(uint8_t flash_id, uint32_t sector_address); +int hal_flash_erase(uint8_t flash_id, uint32_t address, uint32_t num_bytes); +uint8_t hal_flash_align(uint8_t flash_id); +int hal_flash_init(void); + + +#ifdef __cplusplus +} +#endif + +#endif /* H_HAL_FLASH_ */ diff --git a/bootloader/mcuboot/boot/zephyr/include/io/io.h b/bootloader/mcuboot/boot/zephyr/include/io/io.h new file mode 100644 index 0000000..563281f --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/io/io.h @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2012-2014 Wind River Systems, Inc. + * Copyright (c) 2020 Arm Limited + * Copyright (c) 2021-2023 Nordic Semiconductor ASA + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef H_IO_ +#define H_IO_ + +#include + +#ifdef CONFIG_SOC_FAMILY_NORDIC_NRF +#include +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Initialises the configured LED. + */ +void io_led_init(void); + +/* + * Sets value of the configured LED. + */ +void io_led_set(int value); + +/* + * Checks if GPIO is set in the required way to remain in serial recovery mode + * + * @retval false for normal boot, true for serial recovery boot + */ +bool io_detect_pin(void); + +/* + * Checks if board was reset using reset pin and if device should stay in + * serial recovery mode + * + * @retval false for normal boot, true for serial recovery boot + */ +bool io_detect_pin_reset(void); + +/* + * Checks board boot mode via retention subsystem and if device should stay in + * serial recovery mode + * + * @retval false for normal boot, true for serial recovery boot + */ +bool io_detect_boot_mode(void); + +#ifdef CONFIG_SOC_FAMILY_NORDIC_NRF +static inline bool io_boot_skip_serial_recovery() +{ + uint32_t rr = nrfx_reset_reason_get(); + + return !(rr == 0 || (rr & NRFX_RESET_REASON_RESETPIN_MASK)); +} +#else +static inline bool io_boot_skip_serial_recovery() +{ + return false; +} +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/zephyr/include/mcuboot-mbedtls-cfg.h b/bootloader/mcuboot/boot/zephyr/include/mcuboot-mbedtls-cfg.h new file mode 100644 index 0000000..a46fbb0 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/mcuboot-mbedtls-cfg.h @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2018 Open Source Foundries Limited + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef _MCUBOOT_MBEDTLS_CONFIG_ +#define _MCUBOOT_MBEDTLS_CONFIG_ + +/** + * @file + * + * This is the top-level mbedTLS configuration file for MCUboot. The + * configuration depends on the signature type, so this file just + * pulls in the right header depending on that setting. + */ + +/* + * IMPORTANT: + * + * If you put any "generic" definitions in here, make sure to update + * the simulator build.rs accordingly. + */ + +#if defined(CONFIG_BOOT_SIGNATURE_TYPE_RSA) || defined(CONFIG_BOOT_ENCRYPT_RSA) +#include "config-rsa.h" +#elif defined(CONFIG_BOOT_USE_PSA_CRYPTO) || defined(CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256) || \ + defined(CONFIG_BOOT_ENCRYPT_EC256) || \ + (defined(CONFIG_BOOT_ENCRYPT_X25519) && !defined(CONFIG_BOOT_SIGNATURE_TYPE_ED25519)) +#include "config-asn1.h" +#elif defined(CONFIG_BOOT_SIGNATURE_TYPE_ED25519) +#include "config-ed25519.h" +#else +#error "Cannot configure mbedTLS; signature type is unknown." +#endif + +#endif diff --git a/bootloader/mcuboot/boot/zephyr/include/mcuboot_config/mcuboot_config.h b/bootloader/mcuboot/boot/zephyr/include/mcuboot_config/mcuboot_config.h new file mode 100644 index 0000000..7896e09 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/mcuboot_config/mcuboot_config.h @@ -0,0 +1,424 @@ +/* + * Copyright (c) 2018 Open Source Foundries Limited + * Copyright (c) 2019-2020 Arm Limited + * Copyright (c) 2019-2020 Linaro Limited + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __MCUBOOT_CONFIG_H__ +#define __MCUBOOT_CONFIG_H__ + +#include + +#ifdef CONFIG_BOOT_SIGNATURE_TYPE_RSA +#define MCUBOOT_SIGN_RSA +# if (CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN != 2048 && \ + CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN != 3072) +# error "Invalid RSA key size (must be 2048 or 3072)" +# else +# define MCUBOOT_SIGN_RSA_LEN CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN +# endif +#elif defined(CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256) +#define MCUBOOT_SIGN_EC256 +#elif defined(CONFIG_BOOT_SIGNATURE_TYPE_ED25519) +#define MCUBOOT_SIGN_ED25519 +#endif + +#if defined(CONFIG_BOOT_USE_TINYCRYPT) +# if defined(CONFIG_MBEDTLS) || defined(CONFIG_BOOT_USE_CC310) +# error "One crypto library implementation allowed at a time." +# endif +#elif defined(CONFIG_MBEDTLS) && defined(CONFIG_BOOT_USE_CC310) +# error "One crypto library implementation allowed at a time." +#endif + +#ifdef CONFIG_BOOT_USE_MBEDTLS +#define MCUBOOT_USE_MBED_TLS +#elif defined(CONFIG_BOOT_USE_TINYCRYPT) +#define MCUBOOT_USE_TINYCRYPT +#elif defined(CONFIG_BOOT_USE_CC310) +#define MCUBOOT_USE_CC310 +#elif defined(CONFIG_MBEDTLS_PSA_CRYPTO_CLIENT) +#define MCUBOOT_USE_PSA_CRYPTO +#elif defined(CONFIG_BOOT_USE_NRF_EXTERNAL_CRYPTO) +#define MCUBOOT_USE_NRF_EXTERNAL_CRYPTO +#endif + +#ifdef CONFIG_BOOT_IMG_HASH_ALG_SHA512 +#define MCUBOOT_SHA512 +#endif + +#ifdef CONFIG_BOOT_IMG_HASH_ALG_SHA256 +#define MCUBOOT_SHA256 +#endif + +/* Zephyr, regardless of C library used, provides snprintf */ +#define MCUBOOT_USE_SNPRINTF 1 + +#ifdef CONFIG_BOOT_HW_KEY +#define MCUBOOT_HW_KEY +#endif + +#ifdef CONFIG_BOOT_VALIDATE_SLOT0 +#define MCUBOOT_VALIDATE_PRIMARY_SLOT +#endif + +#ifdef CONFIG_BOOT_VALIDATE_SLOT0_ONCE +#define MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE +#endif + +#ifdef CONFIG_BOOT_UPGRADE_ONLY +#define MCUBOOT_OVERWRITE_ONLY +#define MCUBOOT_OVERWRITE_ONLY_FAST +#endif + +#ifdef CONFIG_SINGLE_APPLICATION_SLOT +#define MCUBOOT_SINGLE_APPLICATION_SLOT 1 +#define MCUBOOT_IMAGE_NUMBER 1 +#else + +#ifdef CONFIG_BOOT_SWAP_USING_MOVE +#define MCUBOOT_SWAP_USING_MOVE 1 +#endif + +#ifdef CONFIG_BOOT_DIRECT_XIP +#define MCUBOOT_DIRECT_XIP +#endif + +#ifdef CONFIG_BOOT_DIRECT_XIP_REVERT +#define MCUBOOT_DIRECT_XIP_REVERT +#endif + +#ifdef CONFIG_BOOT_RAM_LOAD +#define MCUBOOT_RAM_LOAD 1 +#define IMAGE_EXECUTABLE_RAM_START CONFIG_BOOT_IMAGE_EXECUTABLE_RAM_START +#define IMAGE_EXECUTABLE_RAM_SIZE CONFIG_BOOT_IMAGE_EXECUTABLE_RAM_SIZE +#endif + +#ifdef CONFIG_BOOT_FIRMWARE_LOADER +#define MCUBOOT_FIRMWARE_LOADER +#endif + +#ifdef CONFIG_UPDATEABLE_IMAGE_NUMBER +#define MCUBOOT_IMAGE_NUMBER CONFIG_UPDATEABLE_IMAGE_NUMBER +#else +#define MCUBOOT_IMAGE_NUMBER 1 +#endif + +#ifdef CONFIG_BOOT_VERSION_CMP_USE_BUILD_NUMBER +#define MCUBOOT_VERSION_CMP_USE_BUILD_NUMBER +#endif + +#ifdef CONFIG_BOOT_SWAP_SAVE_ENCTLV +#define MCUBOOT_SWAP_SAVE_ENCTLV 1 +#endif + +#endif /* CONFIG_SINGLE_APPLICATION_SLOT */ + +#ifdef CONFIG_LOG +#define MCUBOOT_HAVE_LOGGING 1 +#endif + +#ifdef CONFIG_BOOT_ENCRYPT_RSA +#define MCUBOOT_ENC_IMAGES +#define MCUBOOT_ENCRYPT_RSA +#endif + +#ifdef CONFIG_BOOT_ENCRYPT_EC256 +#define MCUBOOT_ENC_IMAGES +#define MCUBOOT_ENCRYPT_EC256 +#endif + +#ifdef CONFIG_BOOT_ENCRYPT_X25519 +#define MCUBOOT_ENC_IMAGES +#define MCUBOOT_ENCRYPT_X25519 +#endif + +#ifdef CONFIG_BOOT_DECOMPRESSION +#define MCUBOOT_DECOMPRESS_IMAGES +#endif + +/* Invoke hashing functions directly on storage. This requires for device + * to be able to map storage to address space or RAM. + */ +#ifdef CONFIG_BOOT_IMG_HASH_DIRECTLY_ON_STORAGE +#define MCUBOOT_HASH_STORAGE_DIRECTLY +#endif + +#ifdef CONFIG_BOOT_SIGNATURE_TYPE_PURE +#define MCUBOOT_SIGN_PURE +#endif + +#ifdef CONFIG_BOOT_BOOTSTRAP +#define MCUBOOT_BOOTSTRAP 1 +#endif + +#ifdef CONFIG_BOOT_USE_BENCH +#define MCUBOOT_USE_BENCH 1 +#endif + +#ifdef CONFIG_MCUBOOT_DOWNGRADE_PREVENTION +#define MCUBOOT_DOWNGRADE_PREVENTION 1 +/* MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER is used later as bool value so it is + * always defined, (unlike MCUBOOT_DOWNGRADE_PREVENTION which is only used in + * preprocessor condition and my be not defined) */ +# ifdef CONFIG_MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER +# define MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER 1 +# else +# define MCUBOOT_DOWNGRADE_PREVENTION_SECURITY_COUNTER 0 +# endif +#endif + +#ifdef CONFIG_MCUBOOT_HW_DOWNGRADE_PREVENTION +#define MCUBOOT_HW_ROLLBACK_PROT +#endif + +#ifdef CONFIG_MEASURED_BOOT +#define MCUBOOT_MEASURED_BOOT +#endif + +#ifdef CONFIG_BOOT_SHARE_DATA +#define MCUBOOT_DATA_SHARING +#endif + +#ifdef CONFIG_BOOT_SHARE_BACKEND_RETENTION +#define MCUBOOT_CUSTOM_DATA_SHARING_FUNCTION +#endif + +#ifdef CONFIG_BOOT_SHARE_DATA_BOOTINFO +#define MCUBOOT_DATA_SHARING_BOOTINFO +#endif + +#ifdef CONFIG_MEASURED_BOOT_MAX_CBOR_SIZE +#define MAX_BOOT_RECORD_SZ CONFIG_MEASURED_BOOT_MAX_CBOR_SIZE +#endif + +#ifdef CONFIG_BOOT_FIH_PROFILE_OFF +#define MCUBOOT_FIH_PROFILE_OFF +#endif + +#ifdef CONFIG_BOOT_FIH_PROFILE_LOW +#define MCUBOOT_FIH_PROFILE_LOW +#endif + +#ifdef CONFIG_BOOT_FIH_PROFILE_MEDIUM +#define MCUBOOT_FIH_PROFILE_MEDIUM +#endif + +#ifdef CONFIG_BOOT_FIH_PROFILE_HIGH +#define MCUBOOT_FIH_PROFILE_HIGH +#endif + +#ifdef CONFIG_ENABLE_MGMT_PERUSER +#define MCUBOOT_PERUSER_MGMT_GROUP_ENABLED 1 +#else +#define MCUBOOT_PERUSER_MGMT_GROUP_ENABLED 0 +#endif + +#ifdef CONFIG_BOOT_MGMT_CUSTOM_IMG_LIST +#define MCUBOOT_MGMT_CUSTOM_IMG_LIST +#endif + +#ifdef CONFIG_BOOT_MGMT_ECHO +#define MCUBOOT_BOOT_MGMT_ECHO +#endif + +#ifdef CONFIG_BOOT_IMAGE_ACCESS_HOOKS +#define MCUBOOT_IMAGE_ACCESS_HOOKS +#endif + +#ifdef CONFIG_MCUBOOT_VERIFY_IMG_ADDRESS +#define MCUBOOT_VERIFY_IMG_ADDRESS +#endif + +#ifdef CONFIG_MCUBOOT_SERIAL +#define MCUBOOT_SERIAL +#endif + +/* + * The configuration option enables direct image upload with the + * serial recovery. + */ +#ifdef CONFIG_MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD +#define MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD +#endif + +#ifdef CONFIG_BOOT_SERIAL_WAIT_FOR_DFU +#define MCUBOOT_SERIAL_WAIT_FOR_DFU +#endif + +#ifdef CONFIG_BOOT_SERIAL_IMG_GRP_HASH +#define MCUBOOT_SERIAL_IMG_GRP_HASH +#endif + +#ifdef CONFIG_BOOT_SERIAL_IMG_GRP_IMAGE_STATE +#define MCUBOOT_SERIAL_IMG_GRP_IMAGE_STATE +#endif + +#ifdef CONFIG_BOOT_SERIAL_IMG_GRP_SLOT_INFO +#define MCUBOOT_SERIAL_IMG_GRP_SLOT_INFO +#endif + +#ifdef CONFIG_MCUBOOT_SERIAL +#define MCUBOOT_SERIAL_RECOVERY +#endif + +#if (defined(CONFIG_BOOT_USB_DFU_WAIT) || \ + defined(CONFIG_BOOT_USB_DFU_GPIO)) +#define MCUBOOT_USB_DFU +#endif + +/* + * The option enables code, currently in boot_serial, that attempts + * to erase flash progressively, as update fragments are received, + * instead of erasing whole image size of flash area after receiving + * first frame. + * Enabling this options prevents stalling the beginning of transfer + * for the time needed to erase large chunk of flash. + */ +#ifdef CONFIG_BOOT_ERASE_PROGRESSIVELY +#define MCUBOOT_ERASE_PROGRESSIVELY +#endif + +/* + * Enabling this option uses newer flash map APIs. This saves RAM and + * avoids deprecated API usage. + * + * (This can be deleted when flash_area_to_sectors() is removed instead + * of simply deprecated.) + */ +#define MCUBOOT_USE_FLASH_AREA_GET_SECTORS + +#if (defined(CONFIG_BOOT_USB_DFU_WAIT) || \ + defined(CONFIG_BOOT_USB_DFU_GPIO)) +# ifndef CONFIG_MULTITHREADING +# error "USB DFU Requires MULTITHREADING" +# endif +#endif + +#if defined(CONFIG_BOOT_MAX_IMG_SECTORS_AUTO) && defined(MIN_SECTOR_COUNT) + +#define MCUBOOT_MAX_IMG_SECTORS MIN_SECTOR_COUNT + +#elif defined(CONFIG_BOOT_MAX_IMG_SECTORS) + +#define MCUBOOT_MAX_IMG_SECTORS CONFIG_BOOT_MAX_IMG_SECTORS + +#else +#define MCUBOOT_MAX_IMG_SECTORS 128 +#endif + +#ifdef CONFIG_BOOT_SERIAL_MAX_RECEIVE_SIZE +#define MCUBOOT_SERIAL_MAX_RECEIVE_SIZE CONFIG_BOOT_SERIAL_MAX_RECEIVE_SIZE +#endif + +#ifdef CONFIG_BOOT_SERIAL_UNALIGNED_BUFFER_SIZE +#define MCUBOOT_SERIAL_UNALIGNED_BUFFER_SIZE CONFIG_BOOT_SERIAL_UNALIGNED_BUFFER_SIZE +#endif + +#if defined(MCUBOOT_DATA_SHARING) && defined(ZEPHYR_VER_INCLUDE) +#include + +#define MCUBOOT_VERSION_AVAILABLE +#define MCUBOOT_VERSION_MAJOR APP_VERSION_MAJOR +#define MCUBOOT_VERSION_MINOR APP_VERSION_MINOR +#define MCUBOOT_VERSION_PATCHLEVEL APP_PATCHLEVEL +#endif + +/* Support 32-byte aligned flash sizes */ +#if DT_HAS_CHOSEN(zephyr_flash) + #if DT_PROP_OR(DT_CHOSEN(zephyr_flash), write_block_size, 0) > 8 + #define MCUBOOT_BOOT_MAX_ALIGN \ + DT_PROP(DT_CHOSEN(zephyr_flash), write_block_size) + #endif +#endif + +#ifdef CONFIG_MCUBOOT_BOOTUTIL_LIB_FOR_DIRECT_XIP +#define MCUBOOT_BOOTUTIL_LIB_FOR_DIRECT_XIP 1 +#endif + +#if CONFIG_BOOT_WATCHDOG_FEED +#if CONFIG_NRFX_WDT +#include + +#define FEED_WDT_INST(id) \ + do { \ + nrfx_wdt_t wdt_inst_##id = NRFX_WDT_INSTANCE(id); \ + for (uint8_t i = 0; i < NRF_WDT_CHANNEL_NUMBER; i++) \ + { \ + nrf_wdt_reload_request_set(wdt_inst_##id.p_reg, \ + (nrf_wdt_rr_register_t)(NRF_WDT_RR0 + i)); \ + } \ + } while (0) +#if defined(CONFIG_NRFX_WDT0) && defined(CONFIG_NRFX_WDT1) +#define MCUBOOT_WATCHDOG_FEED() \ + do { \ + FEED_WDT_INST(0); \ + FEED_WDT_INST(1); \ + } while (0) +#elif defined(CONFIG_NRFX_WDT0) +#define MCUBOOT_WATCHDOG_FEED() \ + FEED_WDT_INST(0); +#elif defined(CONFIG_NRFX_WDT30) && defined(CONFIG_NRFX_WDT31) +#define MCUBOOT_WATCHDOG_FEED() \ + do { \ + FEED_WDT_INST(30); \ + FEED_WDT_INST(31); \ + } while (0) +#elif defined(CONFIG_NRFX_WDT30) +#define MCUBOOT_WATCHDOG_FEED() \ + FEED_WDT_INST(30); +#elif defined(CONFIG_NRFX_WDT31) +#define MCUBOOT_WATCHDOG_FEED() \ + FEED_WDT_INST(31); +#else +#error "No NRFX WDT instances enabled" +#endif + +#elif DT_NODE_HAS_STATUS(DT_ALIAS(watchdog0), okay) /* CONFIG_NRFX_WDT */ +#include +#include + +#define MCUBOOT_WATCHDOG_SETUP() \ + do { \ + const struct device* wdt = \ + DEVICE_DT_GET(DT_ALIAS(watchdog0)); \ + if (device_is_ready(wdt)) { \ + wdt_setup(wdt, 0); \ + } \ + } while (0) + +#define MCUBOOT_WATCHDOG_FEED() \ + do { \ + const struct device* wdt = \ + DEVICE_DT_GET(DT_ALIAS(watchdog0)); \ + if (device_is_ready(wdt)) { \ + wdt_feed(wdt, 0); \ + } \ + } while (0) +#else /* DT_NODE_HAS_STATUS(DT_ALIAS(watchdog0), okay) */ +/* No vendor implementation, no-op for historical reasons */ +#define MCUBOOT_WATCHDOG_FEED() \ + do { \ + } while (0) +#endif +#else /* CONFIG_BOOT_WATCHDOG_FEED */ +/* Not enabled, no feed activity */ +#define MCUBOOT_WATCHDOG_FEED() \ + do { \ + } while (0) + +#endif /* CONFIG_BOOT_WATCHDOG_FEED */ + +#ifndef MCUBOOT_WATCHDOG_SETUP +#define MCUBOOT_WATCHDOG_SETUP() +#endif + +#define MCUBOOT_CPU_IDLE() \ + if (!IS_ENABLED(CONFIG_MULTITHREADING)) { \ + k_cpu_idle(); \ + } + +#endif /* __MCUBOOT_CONFIG_H__ */ diff --git a/bootloader/mcuboot/boot/zephyr/include/mcuboot_config/mcuboot_logging.h b/bootloader/mcuboot/boot/zephyr/include/mcuboot_config/mcuboot_logging.h new file mode 100644 index 0000000..83c9a1f --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/mcuboot_config/mcuboot_logging.h @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2018 Runtime Inc + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __MCUBOOT_LOGGING_H__ +#define __MCUBOOT_LOGGING_H__ + +/* + * When building for targets running Zephyr, delegate to its native + * logging subsystem. + */ +#ifdef CONFIG_MCUBOOT +#define MCUBOOT_LOG_MODULE_DECLARE(domain) LOG_MODULE_DECLARE(domain, CONFIG_MCUBOOT_LOG_LEVEL) +#define MCUBOOT_LOG_MODULE_REGISTER(domain) LOG_MODULE_REGISTER(domain, CONFIG_MCUBOOT_LOG_LEVEL) +#else +#define MCUBOOT_LOG_MODULE_DECLARE(domain) LOG_MODULE_DECLARE(domain, CONFIG_MCUBOOT_UTIL_LOG_LEVEL) +#define MCUBOOT_LOG_MODULE_REGISTER(domain) LOG_MODULE_REGISTER(domain, CONFIG_MCUBOOT_UTIL_LOG_LEVEL) +#endif + +#define MCUBOOT_LOG_ERR(...) LOG_ERR(__VA_ARGS__) +#define MCUBOOT_LOG_WRN(...) LOG_WRN(__VA_ARGS__) +#define MCUBOOT_LOG_INF(...) LOG_INF(__VA_ARGS__) +#define MCUBOOT_LOG_DBG(...) LOG_DBG(__VA_ARGS__) +#define MCUBOOT_LOG_SIM(...) IGNORE(__VA_ARGS__) + +#include + +#endif /* __MCUBOOT_LOGGING_H__ */ diff --git a/bootloader/mcuboot/boot/zephyr/include/nrf_cleanup.h b/bootloader/mcuboot/boot/zephyr/include/nrf_cleanup.h new file mode 100644 index 0000000..9e87e13 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/nrf_cleanup.h @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#ifndef H_NRF_CLEANUP_ +#define H_NRF_CLEANUP_ + +/** + * Perform cleanup on some peripheral resources used by MCUBoot prior chainload + * the application. + * + * This function disables all RTC instances and UARTE instances. + * It Disables their interrupts signals as well. + */ +void nrf_cleanup_peripheral(void); + +/** + * Perform cleanup of non-secure RAM that may have been used by MCUBoot. + */ +void nrf_cleanup_ns_ram(void); + +#endif diff --git a/bootloader/mcuboot/boot/zephyr/include/os/os.h b/bootloader/mcuboot/boot/zephyr/include/os/os.h new file mode 100644 index 0000000..e69de29 diff --git a/bootloader/mcuboot/boot/zephyr/include/os/os_heap.h b/bootloader/mcuboot/boot/zephyr/include/os/os_heap.h new file mode 100644 index 0000000..4413568 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/os/os_heap.h @@ -0,0 +1,38 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_OS_HEAP_ +#define H_OS_HEAP_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +void *os_malloc(size_t size); +void os_free(void *mem); +void *os_realloc(void *ptr, size_t size); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/bootloader/mcuboot/boot/zephyr/include/os/os_malloc.h b/bootloader/mcuboot/boot/zephyr/include/os/os_malloc.h new file mode 100644 index 0000000..32b72c2 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/os/os_malloc.h @@ -0,0 +1,42 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_OS_MALLOC_ +#define H_OS_MALLOC_ + +#include "os/os_heap.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#undef malloc +#define malloc os_malloc + +#undef free +#define free os_free + +#undef realloc +#define realloc os_realloc + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bootloader/mcuboot/boot/zephyr/include/platform-bench.h b/bootloader/mcuboot/boot/zephyr/include/platform-bench.h new file mode 100644 index 0000000..d0cb963 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/platform-bench.h @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2019 Linaro Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef H_ZEPHYR_BENCH_H__ +#define H_ZEPHYR_BENCH_H__ + +#include +#include +#include "zephyr.h" +#include "bootutil/bootutil_log.h" + +/* TODO: Unclear if this can be here (redundantly). */ +BOOT_LOG_MODULE_DECLARE(mcuboot); + +typedef uint32_t bench_state_t; + +#define plat_bench_start(_s) do { \ + BOOT_LOG_ERR("start benchmark"); \ + *(_s) = k_cycle_get_32(); \ +} while (0) + +#define plat_bench_stop(_s) do { \ + uint32_t _stop_time = k_cycle_get_32(); \ + BOOT_LOG_ERR("bench: %" PRId32 " cycles", _stop_time - *(_s)); \ +} while (0) + +#endif /* not H_ZEPHYR_BENCH_H__ */ diff --git a/bootloader/mcuboot/boot/zephyr/include/serial_adapter/serial_adapter.h b/bootloader/mcuboot/boot/zephyr/include/serial_adapter/serial_adapter.h new file mode 100644 index 0000000..1f407a1 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/serial_adapter/serial_adapter.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2017 Nordic Semiconductor ASA + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef H_SERIAL_ADAPTER +#define H_SERIAL_ADAPTER + +int +console_out(int c); + +void +console_write(const char *str, int cnt); + +int +boot_console_init(void); + +int +console_read(char *str, int str_cnt, int *newline); + +#endif // SERIAL_ADAPTER diff --git a/bootloader/mcuboot/boot/zephyr/include/sysflash/pm_sysflash.h b/bootloader/mcuboot/boot/zephyr/include/sysflash/pm_sysflash.h new file mode 100644 index 0000000..42f2518 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/sysflash/pm_sysflash.h @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#ifndef __PM_SYSFLASH_H__ +#define __PM_SYSFLASH_H__ +/* Blocking the __SYSFLASH_H__ */ +#define __SYSFLASH_H__ + +#include +#include +#include + +#ifndef CONFIG_SINGLE_APPLICATION_SLOT + +/* Each pair of slots is separated by , and there is no terminating character */ +#define FLASH_AREA_IMAGE_0_SLOTS PM_MCUBOOT_PRIMARY_ID, PM_MCUBOOT_SECONDARY_ID, +#define FLASH_AREA_IMAGE_1_SLOTS PM_MCUBOOT_PRIMARY_1_ID, PM_MCUBOOT_SECONDARY_1_ID, +#define FLASH_AREA_IMAGE_2_SLOTS PM_MCUBOOT_PRIMARY_2_ID, PM_MCUBOOT_SECONDARY_2_ID, +#define FLASH_AREA_IMAGE_3_SLOTS PM_MCUBOOT_PRIMARY_3_ID, PM_MCUBOOT_SECONDARY_3_ID, + +#if CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1 +#ifdef CONFIG_NCS_IS_VARIANT_IMAGE +#define MCUBOOT_S0_S1_SLOTS PM_S0_ID, PM_MCUBOOT_SECONDARY_ID, +#else +#define MCUBOOT_S0_S1_SLOTS PM_S1_ID, PM_MCUBOOT_SECONDARY_ID, +#endif +#else +#define MCUBOOT_S0_S1_SLOTS +#endif + +#if (MCUBOOT_IMAGE_NUMBER == 1) || (MCUBOOT_IMAGE_NUMBER == 2 && CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1) +#define ALL_AVAILABLE_SLOTS FLASH_AREA_IMAGE_0_SLOTS +#elif (MCUBOOT_IMAGE_NUMBER == 2) || (MCUBOOT_IMAGE_NUMBER == 3 && CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1) +#define ALL_AVAILABLE_SLOTS FLASH_AREA_IMAGE_0_SLOTS \ + FLASH_AREA_IMAGE_1_SLOTS +#elif (MCUBOOT_IMAGE_NUMBER == 3) || (MCUBOOT_IMAGE_NUMBER == 4 && CONFIG_MCUBOOT_MCUBOOT_IMAGE_NUMBER != -1) +#define ALL_AVAILABLE_SLOTS FLASH_AREA_IMAGE_0_SLOTS \ + FLASH_AREA_IMAGE_1_SLOTS \ + FLASH_AREA_IMAGE_2_SLOTS +#elif (MCUBOOT_IMAGE_NUMBER == 4) +#define ALL_AVAILABLE_SLOTS FLASH_AREA_IMAGE_0_SLOTS \ + FLASH_AREA_IMAGE_1_SLOTS \ + FLASH_AREA_IMAGE_2_SLOTS \ + FLASH_AREA_IMAGE_3_SLOTS +#else +#error Unsupported number of images +#endif + +static inline uint32_t __flash_area_ids_for_slot(int img, int slot) +{ + static const int all_slots[] = { + ALL_AVAILABLE_SLOTS + MCUBOOT_S0_S1_SLOTS + }; + return all_slots[img * 2 + slot]; +}; + +#undef FLASH_AREA_IMAGE_0_SLOTS +#undef FLASH_AREA_IMAGE_1_SLOTS +#undef FLASH_AREA_IMAGE_2_SLOTS +#undef FLASH_AREA_IMAGE_3_SLOTS +#undef MCUBOOT_S0_S1_SLOTS +#undef ALL_AVAILABLE_SLOTS + +#define FLASH_AREA_IMAGE_PRIMARY(x) __flash_area_ids_for_slot(x, 0) +#define FLASH_AREA_IMAGE_SECONDARY(x) __flash_area_ids_for_slot(x, 1) + +#if !defined(CONFIG_BOOT_SWAP_USING_MOVE) +#define FLASH_AREA_IMAGE_SCRATCH PM_MCUBOOT_SCRATCH_ID +#endif + +#else /* CONFIG_SINGLE_APPLICATION_SLOT */ + +#define FLASH_AREA_IMAGE_PRIMARY(x) PM_MCUBOOT_PRIMARY_ID +#define FLASH_AREA_IMAGE_SECONDARY(x) PM_MCUBOOT_PRIMARY_ID +/* NOTE: Scratch parition is not used by single image DFU but some of + * functions in common files reference it, so the definitions has been + * provided to allow compilation of common units. + */ +#define FLASH_AREA_IMAGE_SCRATCH 0 + +#endif /* CONFIG_SINGLE_APPLICATION_SLOT */ + +#endif /* __PM_SYSFLASH_H__ */ diff --git a/bootloader/mcuboot/boot/zephyr/include/sysflash/pm_sysflash_legacy_child_parent.h b/bootloader/mcuboot/boot/zephyr/include/sysflash/pm_sysflash_legacy_child_parent.h new file mode 100644 index 0000000..db60ddd --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/sysflash/pm_sysflash_legacy_child_parent.h @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#ifndef __PM_SYSFLASH_H__ +#define __PM_SYSFLASH_H__ +/* Blocking the __SYSFLASH_H__ */ +#define __SYSFLASH_H__ + +#include +#include +#include + +#ifndef CONFIG_SINGLE_APPLICATION_SLOT + +#if (MCUBOOT_IMAGE_NUMBER == 2) && defined(PM_B0_ADDRESS) +/* If B0 is present then two bootloaders are present, and we must use + * a single secondary slot for both primary slots. + */ +extern uint32_t _image_1_primary_slot_id[]; +#endif /* (MCUBOOT_IMAGE_NUMBER == 2 && defined(PM_B0_ADDRESS) */ + +#if (MCUBOOT_IMAGE_NUMBER == 2) && defined(PM_B0_ADDRESS) && \ + !defined(CONFIG_NRF53_MULTI_IMAGE_UPDATE) + +#define FLASH_AREA_IMAGE_PRIMARY(x) \ + ((x == 0) ? \ + PM_MCUBOOT_PRIMARY_ID : \ + (x == 1) ? \ + (uint32_t)_image_1_primary_slot_id : \ + 255 ) + +#define FLASH_AREA_IMAGE_SECONDARY(x) \ + ((x == 0) ? \ + PM_MCUBOOT_SECONDARY_ID: \ + (x == 1) ? \ + PM_MCUBOOT_SECONDARY_ID: \ + 255 ) + +#else /* MCUBOOT_IMAGE_NUMBER == 2) && defined(PM_B0_ADDRESS) && \ + * !defined(CONFIG_NRF53_MULTI_IMAGE_UPDATE) + */ + +/* Each pair of slots is separated by , and there is no terminating character */ +#define FLASH_AREA_IMAGE_0_SLOTS PM_MCUBOOT_PRIMARY_ID, PM_MCUBOOT_SECONDARY_ID +#define FLASH_AREA_IMAGE_1_SLOTS PM_MCUBOOT_PRIMARY_1_ID, PM_MCUBOOT_SECONDARY_1_ID +#define FLASH_AREA_IMAGE_2_SLOTS PM_MCUBOOT_PRIMARY_2_ID, PM_MCUBOOT_SECONDARY_2_ID + +#if (MCUBOOT_IMAGE_NUMBER == 1) +#define ALL_AVAILABLE_SLOTS FLASH_AREA_IMAGE_0_SLOTS +#elif (MCUBOOT_IMAGE_NUMBER == 2) +#define ALL_AVAILABLE_SLOTS FLASH_AREA_IMAGE_0_SLOTS, \ + FLASH_AREA_IMAGE_1_SLOTS +#elif (MCUBOOT_IMAGE_NUMBER == 3) +#define ALL_AVAILABLE_SLOTS FLASH_AREA_IMAGE_0_SLOTS, \ + FLASH_AREA_IMAGE_1_SLOTS, \ + FLASH_AREA_IMAGE_2_SLOTS +#else +#error Unsupported number of images +#endif + +static inline uint32_t __flash_area_ids_for_slot(int img, int slot) +{ + static const int all_slots[] = { + ALL_AVAILABLE_SLOTS + }; + return all_slots[img * 2 + slot]; +}; + +#undef FLASH_AREA_IMAGE_0_SLOTS +#undef FLASH_AREA_IMAGE_1_SLOTS +#undef FLASH_AREA_IMAGE_2_SLOTS +#undef ALL_AVAILABLE_SLOTS + +#define FLASH_AREA_IMAGE_PRIMARY(x) __flash_area_ids_for_slot(x, 0) +#define FLASH_AREA_IMAGE_SECONDARY(x) __flash_area_ids_for_slot(x, 1) + +#if !defined(CONFIG_BOOT_SWAP_USING_MOVE) +#define FLASH_AREA_IMAGE_SCRATCH PM_MCUBOOT_SCRATCH_ID +#endif + +#endif /* MCUBOOT_IMAGE_NUMBER == 2) && defined(PM_B0_ADDRESS) && \ + * !defined(CONFIG_NRF53_MULTI_IMAGE_UPDATE) + */ + +#else /* CONFIG_SINGLE_APPLICATION_SLOT */ + +#define FLASH_AREA_IMAGE_PRIMARY(x) PM_MCUBOOT_PRIMARY_ID +#define FLASH_AREA_IMAGE_SECONDARY(x) PM_MCUBOOT_PRIMARY_ID +/* NOTE: Scratch parition is not used by single image DFU but some of + * functions in common files reference it, so the definitions has been + * provided to allow compilation of common units. + */ +#define FLASH_AREA_IMAGE_SCRATCH 0 + +#endif /* CONFIG_SINGLE_APPLICATION_SLOT */ + +#endif /* __PM_SYSFLASH_H__ */ diff --git a/bootloader/mcuboot/boot/zephyr/include/sysflash/sysflash.h b/bootloader/mcuboot/boot/zephyr/include/sysflash/sysflash.h new file mode 100644 index 0000000..bee101b --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/sysflash/sysflash.h @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2023-2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#if USE_PARTITION_MANAGER +/* Blocking the rest of the file */ +#define __SYSFLASH_H__ +#if CONFIG_MCUBOOT_APPLICATION_IMAGE_NUMBER != -1 +/* Sysbuild */ +#include +#else +/* Legacy child/parent */ +#include +#endif +#endif + +#ifndef __SYSFLASH_H__ +#define __SYSFLASH_H__ + +#include +#include +#include +#include + +#ifndef SOC_FLASH_0_ID +#define SOC_FLASH_0_ID 0 +#endif + +#ifndef SPI_FLASH_0_ID +#define SPI_FLASH_0_ID 1 +#endif + +#if !defined(CONFIG_SINGLE_APPLICATION_SLOT) && !defined(CONFIG_MCUBOOT_BOOTLOADER_MODE_SINGLE_APP) + +/* Each pair of slots is separated by , and there is no terminating character */ +#define FLASH_AREA_IMAGE_0_SLOTS slot0_partition, slot1_partition +#define FLASH_AREA_IMAGE_1_SLOTS slot2_partition, slot3_partition +#define FLASH_AREA_IMAGE_2_SLOTS slot4_partition, slot5_partition + +#if (MCUBOOT_IMAGE_NUMBER == 1) +#define ALL_AVAILABLE_SLOTS FLASH_AREA_IMAGE_0_SLOTS +#elif (MCUBOOT_IMAGE_NUMBER == 2) +#define ALL_AVAILABLE_SLOTS FLASH_AREA_IMAGE_0_SLOTS, \ + FLASH_AREA_IMAGE_1_SLOTS +#elif (MCUBOOT_IMAGE_NUMBER == 3) +#define ALL_AVAILABLE_SLOTS FLASH_AREA_IMAGE_0_SLOTS, \ + FLASH_AREA_IMAGE_1_SLOTS, \ + FLASH_AREA_IMAGE_2_SLOTS +#endif + +static inline uint32_t __flash_area_ids_for_slot(int img, int slot) +{ + static const int all_slots[] = { + FOR_EACH_NONEMPTY_TERM(FIXED_PARTITION_ID, (,), ALL_AVAILABLE_SLOTS) + }; + return all_slots[img * 2 + slot]; +}; + +#undef FLASH_AREA_IMAGE_0_SLOTS +#undef FLASH_AREA_IMAGE_1_SLOTS +#undef FLASH_AREA_IMAGE_2_SLOTS +#undef ALL_AVAILABLE_SLOTS + +#define FLASH_AREA_IMAGE_PRIMARY(x) __flash_area_ids_for_slot(x, 0) +#define FLASH_AREA_IMAGE_SECONDARY(x) __flash_area_ids_for_slot(x, 1) + +#if !defined(CONFIG_BOOT_SWAP_USING_MOVE) +#define FLASH_AREA_IMAGE_SCRATCH FIXED_PARTITION_ID(scratch_partition) +#endif + +#else /* !CONFIG_SINGLE_APPLICATION_SLOT && !CONFIG_MCUBOOT_BOOTLOADER_MODE_SINGLE_APP */ + +#define FLASH_AREA_IMAGE_PRIMARY(x) FIXED_PARTITION_ID(slot0_partition) +#define FLASH_AREA_IMAGE_SECONDARY(x) FIXED_PARTITION_ID(slot0_partition) + +#endif /* CONFIG_SINGLE_APPLICATION_SLOT */ + +#endif /* __SYSFLASH_H__ */ diff --git a/bootloader/mcuboot/boot/zephyr/include/target.h b/bootloader/mcuboot/boot/zephyr/include/target.h new file mode 100644 index 0000000..40287d5 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/include/target.h @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2017, Linaro Ltd + * Copyright (c) 2019, Arm Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef H_TARGETS_TARGET_ +#define H_TARGETS_TARGET_ + +#ifndef USE_PARTITION_MANAGER + +#if defined(MCUBOOT_TARGET_CONFIG) +/* + * Target-specific definitions are permitted in legacy cases that + * don't provide the information via DTS, etc. + */ +#include MCUBOOT_TARGET_CONFIG +#else +/* + * Otherwise, the Zephyr SoC header and the DTS provide most + * everything we need. + */ +#include +#include +#include + +#define FLASH_ALIGN FLASH_WRITE_BLOCK_SIZE + +#endif /* !defined(MCUBOOT_TARGET_CONFIG) */ + +/* + * Sanity check the target support. + */ +#if (!defined(CONFIG_XTENSA) && !DT_HAS_CHOSEN(zephyr_flash_controller)) || \ + (defined(CONFIG_XTENSA) && !DT_NODE_EXISTS(DT_INST(0, jedec_spi_nor)) && \ + !defined(CONFIG_SOC_FAMILY_ESPRESSIF_ESP32)) || \ + !defined(FLASH_ALIGN) || \ + !(FIXED_PARTITION_EXISTS(slot0_partition)) || \ + !(FIXED_PARTITION_EXISTS(slot1_partition) || CONFIG_SINGLE_APPLICATION_SLOT) || \ + (defined(CONFIG_BOOT_SWAP_USING_SCRATCH) && !FIXED_PARTITION_EXISTS(scratch_partition)) +#error "Target support is incomplete; cannot build mcuboot." +#endif + +#if (MCUBOOT_IMAGE_NUMBER == 2) && (!(FIXED_PARTITION_EXISTS(slot2_partition)) || \ + !(FIXED_PARTITION_EXISTS(slot3_partition))) +#error "Target support is incomplete; cannot build mcuboot." +#endif + +#endif /* ifndef USE_PARTITION_MANAGER */ + +#endif /* H_TARGETS_TARGET_ */ diff --git a/bootloader/mcuboot/boot/zephyr/io.c b/bootloader/mcuboot/boot/zephyr/io.c new file mode 100644 index 0000000..309f1ab --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/io.c @@ -0,0 +1,211 @@ +/* + * Copyright (c) 2012-2014 Wind River Systems, Inc. + * Copyright (c) 2020 Arm Limited + * Copyright (c) 2021-2023 Nordic Semiconductor ASA + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "target.h" +#include "bootutil/bootutil_log.h" + +#if defined(CONFIG_BOOT_SERIAL_PIN_RESET) || defined(CONFIG_BOOT_FIRMWARE_LOADER_PIN_RESET) +#include +#endif + +#if defined(CONFIG_BOOT_SERIAL_BOOT_MODE) || defined(CONFIG_BOOT_FIRMWARE_LOADER_BOOT_MODE) +#include +#endif + +/* Validate serial recovery configuration */ +#ifdef CONFIG_MCUBOOT_SERIAL +#if !defined(CONFIG_BOOT_SERIAL_ENTRANCE_GPIO) && \ + !defined(CONFIG_BOOT_SERIAL_WAIT_FOR_DFU) && \ + !defined(CONFIG_BOOT_SERIAL_BOOT_MODE) && \ + !defined(CONFIG_BOOT_SERIAL_NO_APPLICATION) && \ + !defined(CONFIG_BOOT_SERIAL_PIN_RESET) +#error "Serial recovery selected without an entrance mode set" +#endif +#endif + +/* Validate firmware loader configuration */ +#ifdef CONFIG_BOOT_FIRMWARE_LOADER +#if !defined(CONFIG_BOOT_FIRMWARE_LOADER_ENTRANCE_GPIO) && \ + !defined(CONFIG_BOOT_FIRMWARE_LOADER_BOOT_MODE) && \ + !defined(CONFIG_BOOT_FIRMWARE_LOADER_NO_APPLICATION) && \ + !defined(CONFIG_BOOT_FIRMWARE_LOADER_PIN_RESET) +#error "Firmware loader selected without an entrance mode set" +#endif +#endif + +#ifdef CONFIG_MCUBOOT_INDICATION_LED + +/* + * The led0 devicetree alias is optional. If present, we'll use it + * to turn on the LED whenever the button is pressed. + */ +#if DT_NODE_EXISTS(DT_ALIAS(mcuboot_led0)) +#define LED0_NODE DT_ALIAS(mcuboot_led0) +#elif DT_NODE_EXISTS(DT_ALIAS(bootloader_led0)) +#warning "bootloader-led0 alias is deprecated; use mcuboot-led0 instead" +#define LED0_NODE DT_ALIAS(bootloader_led0) +#endif + +#if DT_NODE_HAS_STATUS(LED0_NODE, okay) && DT_NODE_HAS_PROP(LED0_NODE, gpios) +static const struct gpio_dt_spec led0 = GPIO_DT_SPEC_GET(LED0_NODE, gpios); +#else +/* A build error here means your board isn't set up to drive an LED. */ +#error "Unsupported board: led0 devicetree alias is not defined" +#endif + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +void io_led_init(void) +{ + if (!device_is_ready(led0.port)) { + BOOT_LOG_ERR("Didn't find LED device referred by the LED0_NODE\n"); + return; + } + + gpio_pin_configure_dt(&led0, GPIO_OUTPUT); + gpio_pin_set_dt(&led0, 0); +} + +void io_led_set(int value) +{ + gpio_pin_set_dt(&led0, value); +} +#endif /* CONFIG_MCUBOOT_INDICATION_LED */ + +#if defined(CONFIG_BOOT_SERIAL_ENTRANCE_GPIO) || defined(CONFIG_BOOT_USB_DFU_GPIO) || \ + defined(CONFIG_BOOT_FIRMWARE_LOADER_ENTRANCE_GPIO) + +#if defined(CONFIG_MCUBOOT_SERIAL) +#define BUTTON_0_DETECT_DELAY CONFIG_BOOT_SERIAL_DETECT_DELAY +#elif defined(CONFIG_BOOT_FIRMWARE_LOADER) +#define BUTTON_0_DETECT_DELAY CONFIG_BOOT_FIRMWARE_LOADER_DETECT_DELAY +#else +#define BUTTON_0_DETECT_DELAY CONFIG_BOOT_USB_DFU_DETECT_DELAY +#endif + +#define BUTTON_0_NODE DT_ALIAS(mcuboot_button0) + +#if DT_NODE_EXISTS(BUTTON_0_NODE) && DT_NODE_HAS_PROP(BUTTON_0_NODE, gpios) +static const struct gpio_dt_spec button0 = GPIO_DT_SPEC_GET(BUTTON_0_NODE, gpios); +#else +#error "Serial recovery/USB DFU button must be declared in device tree as 'mcuboot_button0'" +#endif + +bool io_detect_pin(void) +{ + int rc; + int pin_active; + + if (!device_is_ready(button0.port)) { + __ASSERT(false, "GPIO device is not ready.\n"); + return false; + } + + rc = gpio_pin_configure_dt(&button0, GPIO_INPUT); + __ASSERT(rc == 0, "Failed to initialize boot detect pin.\n"); + + rc = gpio_pin_get_dt(&button0); + pin_active = rc; + + __ASSERT(rc >= 0, "Failed to read boot detect pin.\n"); + + if (pin_active) { + if (BUTTON_0_DETECT_DELAY > 0) { +#ifdef CONFIG_MULTITHREADING + k_sleep(K_MSEC(50)); +#else + k_busy_wait(50000); +#endif + + /* Get the uptime for debounce purposes. */ + int64_t timestamp = k_uptime_get(); + + for(;;) { + rc = gpio_pin_get_dt(&button0); + pin_active = rc; + __ASSERT(rc >= 0, "Failed to read boot detect pin.\n"); + + /* Get delta from when this started */ + uint32_t delta = k_uptime_get() - timestamp; + + /* If not pressed OR if pressed > debounce period, stop. */ + if (delta >= BUTTON_0_DETECT_DELAY || !pin_active) { + break; + } + + /* Delay 1 ms */ +#ifdef CONFIG_MULTITHREADING + k_sleep(K_MSEC(1)); +#else + k_busy_wait(1000); +#endif + } + } + } + + return (bool)pin_active; +} +#endif + +#if defined(CONFIG_BOOT_SERIAL_PIN_RESET) || defined(CONFIG_BOOT_FIRMWARE_LOADER_PIN_RESET) +bool io_detect_pin_reset(void) +{ + uint32_t reset_cause; + int rc; + + rc = hwinfo_get_reset_cause(&reset_cause); + + if (rc == 0 && reset_cause == RESET_PIN) { + (void)hwinfo_clear_reset_cause(); + return true; + } + + return false; +} +#endif + +#if defined(CONFIG_BOOT_SERIAL_BOOT_MODE) || defined(CONFIG_BOOT_FIRMWARE_LOADER_BOOT_MODE) +bool io_detect_boot_mode(void) +{ + int32_t boot_mode; + + boot_mode = bootmode_check(BOOT_MODE_TYPE_BOOTLOADER); + + if (boot_mode == 1) { + /* Boot mode to stay in bootloader, clear status and enter serial + * recovery mode + */ + bootmode_clear(); + + return true; + } + + return false; +} +#endif diff --git a/bootloader/mcuboot/boot/zephyr/kernel/banner.c b/bootloader/mcuboot/boot/zephyr/kernel/banner.c new file mode 100644 index 0000000..f917582 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/kernel/banner.c @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2020 Intel Corporation + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include + +#if defined(CONFIG_BOOT_DELAY) && (CONFIG_BOOT_DELAY > 0) +#define DELAY_STR STRINGIFY(CONFIG_BOOT_DELAY) +#define BANNER_POSTFIX " (delayed boot " DELAY_STR "ms)" +#else +#define BANNER_POSTFIX "" +#endif /* defined(CONFIG_BOOT_DELAY) && (CONFIG_BOOT_DELAY > 0) */ + +#ifndef BANNER_VERSION +#if defined(BUILD_VERSION) && !IS_EMPTY(BUILD_VERSION) +#define BANNER_VERSION STRINGIFY(BUILD_VERSION) +#else +#define BANNER_VERSION KERNEL_VERSION_STRING +#endif /* BUILD_VERSION */ +#endif /* !BANNER_VERSION */ + +#if defined(APP_BUILD_VERSION) +#define APPLICATION_BANNER_VERSION STRINGIFY(APP_BUILD_VERSION) +#elif defined(APP_VERSION_EXTENDED_STRING) +#define APPLICATION_BANNER_VERSION APP_VERSION_EXTENDED_STRING +#endif + +#if defined(APPLICATION_BANNER_VERSION) +void boot_banner(void) +{ +#if defined(CONFIG_BOOT_DELAY) && (CONFIG_BOOT_DELAY > 0) + printk("***** delaying boot " DELAY_STR "ms (per build configuration) *****\n"); + k_busy_wait(CONFIG_BOOT_DELAY * USEC_PER_MSEC); +#endif /* defined(CONFIG_BOOT_DELAY) && (CONFIG_BOOT_DELAY > 0) */ + + printk("*** Booting MCUboot " APPLICATION_BANNER_VERSION " ***\n"); + printk("*** " CONFIG_BOOT_BANNER_STRING " " BANNER_VERSION BANNER_POSTFIX " ***\n"); +} +#endif /* APP_BUILD_VERSION */ diff --git a/bootloader/mcuboot/boot/zephyr/keys.c b/bootloader/mcuboot/boot/zephyr/keys.c new file mode 100644 index 0000000..ab403dd --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/keys.c @@ -0,0 +1,88 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include + +/* + * Even though this is in principle a Zephyr-specific file, the + * simulator builds it and uses it as well. Because of that, we can't + * use Kconfig symbols for key types, and have to rely on the MCUBoot + * symbols (which Zephyr provides via this header, and the simulator + * provides via the compiler command line). + */ +#include + +#if !defined(MCUBOOT_HW_KEY) +#if defined(MCUBOOT_SIGN_RSA) || defined(MCUBOOT_SIGN_EC256) || defined(MCUBOOT_SIGN_ED25519) +#define HAVE_KEYS +#if defined(MCUBOOT_SIGN_RSA) +extern const unsigned char rsa_pub_key[]; +extern unsigned int rsa_pub_key_len; +#elif defined(MCUBOOT_SIGN_EC256) +extern const unsigned char ecdsa_pub_key[]; +extern unsigned int ecdsa_pub_key_len; +#elif defined(MCUBOOT_SIGN_ED25519) +extern const unsigned char ed25519_pub_key[]; +extern unsigned int ed25519_pub_key_len; +#endif +#endif + +/* + * NOTE: *_pub_key and *_pub_key_len are autogenerated based on the provided + * key file. If no key file was configured, the array and length must be + * provided and added to the build manually. + */ +#if defined(HAVE_KEYS) +const struct bootutil_key bootutil_keys[] = { + { +#if defined(MCUBOOT_SIGN_RSA) + .key = rsa_pub_key, + .len = &rsa_pub_key_len, +#elif defined(MCUBOOT_SIGN_EC256) + .key = ecdsa_pub_key, + .len = &ecdsa_pub_key_len, +#elif defined(MCUBOOT_SIGN_ED25519) + .key = ed25519_pub_key, + .len = &ed25519_pub_key_len, +#endif + }, +}; +const int bootutil_key_cnt = 1; +#endif /* HAVE_KEYS */ +#else +unsigned int pub_key_len; +struct bootutil_key bootutil_keys[1] = { + { + .key = 0, + .len = &pub_key_len, + } +}; +const int bootutil_key_cnt = 1; +#endif /* !MCUBOOT_HW_KEY */ + +#if defined(MCUBOOT_ENCRYPT_RSA) || defined(MCUBOOT_ENCRYPT_X25519) || defined(MCUBOOT_ENCRYPT_EC256) +extern const unsigned char enc_priv_key[]; +extern unsigned int enc_priv_key_len; +const struct bootutil_key bootutil_enc_key = { + .key = enc_priv_key, + .len = &enc_priv_key_len, +}; +#elif defined(MCUBOOT_ENCRYPT_KW) +#error "Encrypted images with AES-KW is not implemented yet." +#endif diff --git a/bootloader/mcuboot/boot/zephyr/main.c b/bootloader/mcuboot/boot/zephyr/main.c new file mode 100644 index 0000000..2339084 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/main.c @@ -0,0 +1,811 @@ +/* + * Copyright (c) 2012-2014 Wind River Systems, Inc. + * Copyright (c) 2020 Arm Limited + * Copyright (c) 2021-2023 Nordic Semiconductor ASA + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_BOOT_DISABLE_CACHES) +#include +#endif + +#if defined(CONFIG_ARM) +#include +#endif + +#include "io/io.h" +#include "target.h" + +#include "bootutil/bootutil_log.h" +#include "bootutil/image.h" +#include "bootutil/bootutil.h" +#include "bootutil/fault_injection_hardening.h" +#include "bootutil/mcuboot_status.h" +#include "flash_map_backend/flash_map_backend.h" + +/* Check if Espressif target is supported */ +#ifdef CONFIG_SOC_FAMILY_ESPRESSIF_ESP32 + +#include +#include + +#define IMAGE_INDEX_0 0 +#define IMAGE_INDEX_1 1 + +#define PRIMARY_SLOT 0 +#define SECONDARY_SLOT 1 + +#define IMAGE0_PRIMARY_START_ADDRESS \ + DT_PROP_BY_IDX(DT_NODE_BY_FIXED_PARTITION_LABEL(image_0), reg, 0) +#define IMAGE0_PRIMARY_SIZE \ + DT_PROP_BY_IDX(DT_NODE_BY_FIXED_PARTITION_LABEL(image_0), reg, 1) + +#define IMAGE1_PRIMARY_START_ADDRESS \ + DT_PROP_BY_IDX(DT_NODE_BY_FIXED_PARTITION_LABEL(image_1), reg, 0) +#define IMAGE1_PRIMARY_SIZE \ + DT_PROP_BY_IDX(DT_NODE_BY_FIXED_PARTITION_LABEL(image_1), reg, 1) + +#endif /* CONFIG_SOC_FAMILY_ESPRESSIF_ESP32 */ + +#ifdef CONFIG_FW_INFO +#include +#endif + +#ifdef CONFIG_MCUBOOT_SERIAL +#include "boot_serial/boot_serial.h" +#include "serial_adapter/serial_adapter.h" + +const struct boot_uart_funcs boot_funcs = { + .read = console_read, + .write = console_write +}; +#endif + +#if defined(CONFIG_BOOT_USB_DFU_WAIT) || defined(CONFIG_BOOT_USB_DFU_GPIO) +#include +#endif + +#if CONFIG_MCUBOOT_CLEANUP_ARM_CORE +#include +#endif + +#if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(PM_CPUNET_B0N_ADDRESS) +#include +#endif + +/* CONFIG_LOG_MINIMAL is the legacy Kconfig property, + * replaced by CONFIG_LOG_MODE_MINIMAL. + */ +#if (defined(CONFIG_LOG_MODE_MINIMAL) || defined(CONFIG_LOG_MINIMAL)) +#define ZEPHYR_LOG_MODE_MINIMAL 1 +#endif + +/* CONFIG_LOG_IMMEDIATE is the legacy Kconfig property, + * replaced by CONFIG_LOG_MODE_IMMEDIATE. + */ +#if (defined(CONFIG_LOG_MODE_IMMEDIATE) || defined(CONFIG_LOG_IMMEDIATE)) +#define ZEPHYR_LOG_MODE_IMMEDIATE 1 +#endif + +#if defined(CONFIG_LOG) && !defined(ZEPHYR_LOG_MODE_IMMEDIATE) && \ + !defined(ZEPHYR_LOG_MODE_MINIMAL) +#ifdef CONFIG_LOG_PROCESS_THREAD +#warning "The log internal thread for log processing can't transfer the log"\ + "well for MCUBoot." +#else +#include + +#define BOOT_LOG_PROCESSING_INTERVAL K_MSEC(30) /* [ms] */ + +/* log are processing in custom routine */ +K_THREAD_STACK_DEFINE(boot_log_stack, CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE); +struct k_thread boot_log_thread; +volatile bool boot_log_stop = false; +K_SEM_DEFINE(boot_log_sem, 1, 1); + +/* log processing need to be initalized by the application */ +#define ZEPHYR_BOOT_LOG_START() zephyr_boot_log_start() +#define ZEPHYR_BOOT_LOG_STOP() zephyr_boot_log_stop() +#endif /* CONFIG_LOG_PROCESS_THREAD */ +#else +/* synchronous log mode doesn't need to be initalized by the application */ +#define ZEPHYR_BOOT_LOG_START() do { } while (false) +#define ZEPHYR_BOOT_LOG_STOP() do { } while (false) +#endif /* defined(CONFIG_LOG) && !defined(ZEPHYR_LOG_MODE_IMMEDIATE) && \ + * !defined(ZEPHYR_LOG_MODE_MINIMAL) + */ + +#if USE_PARTITION_MANAGER && CONFIG_FPROTECT +#include +#include +#endif + +#if CONFIG_MCUBOOT_NRF_CLEANUP_PERIPHERAL || CONFIG_MCUBOOT_NRF_CLEANUP_NONSECURE_RAM +#include +#endif + +static const struct gpio_dt_spec _left_button = GPIO_DT_SPEC_GET(DT_ALIAS(left_button), gpios); +static const struct gpio_dt_spec _right_button = GPIO_DT_SPEC_GET(DT_ALIAS(right_button), gpios); +static const struct gpio_dt_spec _pwr_5v_enable = GPIO_DT_SPEC_GET(DT_ALIAS(pwr_5v_enable), gpios); +static const struct gpio_dt_spec _mcuboot_led = GPIO_DT_SPEC_GET(DT_ALIAS(mcuboot_led), gpios); + +BOOT_LOG_MODULE_REGISTER(mcuboot); + +void os_heap_init(void); + +#if defined(CONFIG_ARM) + +#ifdef CONFIG_SW_VECTOR_RELAY +extern void *_vector_table_pointer; +#endif + +struct arm_vector_table { + uint32_t msp; + uint32_t reset; +}; + +static void do_boot(struct boot_rsp *rsp) +{ + struct arm_vector_table *vt; + + /* The beginning of the image is the ARM vector table, containing + * the initial stack pointer address and the reset vector + * consecutively. Manually set the stack pointer and jump into the + * reset vector + */ +#ifdef CONFIG_BOOT_RAM_LOAD + /* Get ram address for image */ + vt = (struct arm_vector_table *)(rsp->br_hdr->ih_load_addr + rsp->br_hdr->ih_hdr_size); +#else + uintptr_t flash_base; + int rc; + + /* Jump to flash image */ + rc = flash_device_base(rsp->br_flash_dev_id, &flash_base); + assert(rc == 0); + + vt = (struct arm_vector_table *)(flash_base + + rsp->br_image_off + + rsp->br_hdr->ih_hdr_size); +#endif + + if (IS_ENABLED(CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT)) { + sys_clock_disable(); + } + +#ifdef CONFIG_USB_DEVICE_STACK + /* Disable the USB to prevent it from firing interrupts */ + usb_disable(); +#endif + +#if defined(CONFIG_FW_INFO) && !defined(CONFIG_EXT_API_PROVIDE_EXT_API_UNUSED) + uintptr_t fw_start_addr; + + rc = flash_device_base(rsp->br_flash_dev_id, &fw_start_addr); + assert(rc == 0); + + fw_start_addr += rsp->br_image_off + rsp->br_hdr->ih_hdr_size; + + const struct fw_info *firmware_info = fw_info_find(fw_start_addr); + bool provided = fw_info_ext_api_provide(firmware_info, true); + +#ifdef PM_S0_ADDRESS + /* Only fail if the immutable bootloader is present. */ + if (!provided) { + if (firmware_info == NULL) { + BOOT_LOG_WRN("Unable to find firmware info structure in %p", vt); + } + BOOT_LOG_ERR("Failed to provide EXT_APIs to %p", vt); + } +#endif +#endif +#if CONFIG_MCUBOOT_NRF_CLEANUP_PERIPHERAL + nrf_cleanup_peripheral(); +#endif +#if CONFIG_MCUBOOT_NRF_CLEANUP_NONSECURE_RAM && defined(PM_SRAM_NONSECURE_NAME) + nrf_cleanup_ns_ram(); +#endif +#if CONFIG_MCUBOOT_CLEANUP_ARM_CORE + cleanup_arm_nvic(); /* cleanup NVIC registers */ + +#if defined(CONFIG_BOOT_DISABLE_CACHES) + /* Flush and disable instruction/data caches before chain-loading the application */ + (void)sys_cache_instr_flush_all(); + (void)sys_cache_data_flush_all(); + sys_cache_instr_disable(); + sys_cache_data_disable(); +#endif + +#if CONFIG_CPU_HAS_ARM_MPU || CONFIG_CPU_HAS_NXP_MPU + z_arm_clear_arm_mpu_config(); +#endif + +#if defined(CONFIG_BUILTIN_STACK_GUARD) && \ + defined(CONFIG_CPU_CORTEX_M_HAS_SPLIM) + /* Reset limit registers to avoid inflicting stack overflow on image + * being booted. + */ + __set_PSPLIM(0); + __set_MSPLIM(0); +#endif + +#else + irq_lock(); +#endif /* CONFIG_MCUBOOT_CLEANUP_ARM_CORE */ + +#ifdef CONFIG_BOOT_INTR_VEC_RELOC +#if defined(CONFIG_SW_VECTOR_RELAY) + _vector_table_pointer = vt; +#ifdef CONFIG_CPU_CORTEX_M_HAS_VTOR + SCB->VTOR = (uint32_t)__vector_relay_table; +#endif +#elif defined(CONFIG_CPU_CORTEX_M_HAS_VTOR) + SCB->VTOR = (uint32_t)vt; +#endif /* CONFIG_SW_VECTOR_RELAY */ +#else /* CONFIG_BOOT_INTR_VEC_RELOC */ +#if defined(CONFIG_CPU_CORTEX_M_HAS_VTOR) && defined(CONFIG_SW_VECTOR_RELAY) + _vector_table_pointer = _vector_start; + SCB->VTOR = (uint32_t)__vector_relay_table; +#endif +#endif /* CONFIG_BOOT_INTR_VEC_RELOC */ + + __set_MSP(vt->msp); +#if CONFIG_MCUBOOT_CLEANUP_ARM_CORE + __set_CONTROL(0x00); /* application will configures core on its own */ + __ISB(); +#endif + ((void (*)(void))vt->reset)(); +} + +#elif defined(CONFIG_XTENSA) || defined(CONFIG_RISCV) + +#ifndef CONFIG_SOC_FAMILY_ESPRESSIF_ESP32 + +#define SRAM_BASE_ADDRESS 0xBE030000 + +static void copy_img_to_SRAM(int slot, unsigned int hdr_offset) +{ + const struct flash_area *fap; + int area_id; + int rc; + unsigned char *dst = (unsigned char *)(SRAM_BASE_ADDRESS + hdr_offset); + + BOOT_LOG_INF("Copying image to SRAM"); + + area_id = flash_area_id_from_image_slot(slot); + rc = flash_area_open(area_id, &fap); + if (rc != 0) { + BOOT_LOG_ERR("flash_area_open failed with %d\n", rc); + goto done; + } + + rc = flash_area_read(fap, hdr_offset, dst, fap->fa_size - hdr_offset); + if (rc != 0) { + BOOT_LOG_ERR("flash_area_read failed with %d\n", rc); + goto done; + } + +done: + flash_area_close(fap); +} +#endif /* !CONFIG_SOC_FAMILY_ESPRESSIF_ESP32 */ + +/* Entry point (.ResetVector) is at the very beginning of the image. + * Simply copy the image to a suitable location and jump there. + */ +static void do_boot(struct boot_rsp *rsp) +{ +#ifndef CONFIG_SOC_FAMILY_ESPRESSIF_ESP32 + void *start; +#endif /* CONFIG_SOC_FAMILY_ESPRESSIF_ESP32 */ + + BOOT_LOG_INF("br_image_off = 0x%x\n", rsp->br_image_off); + BOOT_LOG_INF("ih_hdr_size = 0x%x\n", rsp->br_hdr->ih_hdr_size); + +#ifdef CONFIG_SOC_FAMILY_ESPRESSIF_ESP32 + int slot = (rsp->br_image_off == IMAGE0_PRIMARY_START_ADDRESS) ? + PRIMARY_SLOT : SECONDARY_SLOT; + /* Load memory segments and start from entry point */ + start_cpu0_image(IMAGE_INDEX_0, slot, rsp->br_hdr->ih_hdr_size); +#else + /* Copy from the flash to HP SRAM */ + copy_img_to_SRAM(0, rsp->br_hdr->ih_hdr_size); + + /* Jump to entry point */ + start = (void *)(SRAM_BASE_ADDRESS + rsp->br_hdr->ih_hdr_size); + ((void (*)(void))start)(); +#endif /* CONFIG_SOC_FAMILY_ESPRESSIF_ESP32 */ +} + +#else +/* Default: Assume entry point is at the very beginning of the image. Simply + * lock interrupts and jump there. This is the right thing to do for X86 and + * possibly other platforms. + */ +static void do_boot(struct boot_rsp *rsp) +{ + void *start; + +#if defined(MCUBOOT_RAM_LOAD) + start = (void *)(rsp->br_hdr->ih_load_addr + rsp->br_hdr->ih_hdr_size); +#else + uintptr_t flash_base; + int rc; + + rc = flash_device_base(rsp->br_flash_dev_id, &flash_base); + assert(rc == 0); + + start = (void *)(flash_base + rsp->br_image_off + + rsp->br_hdr->ih_hdr_size); +#endif + + /* Lock interrupts and dive into the entry point */ + irq_lock(); + ((void (*)(void))start)(); +} +#endif + +#if defined(CONFIG_LOG) && !defined(ZEPHYR_LOG_MODE_IMMEDIATE) && \ + !defined(CONFIG_LOG_PROCESS_THREAD) && !defined(ZEPHYR_LOG_MODE_MINIMAL) +/* The log internal thread for log processing can't transfer log well as has too + * low priority. + * Dedicated thread for log processing below uses highest application + * priority. This allows to transmit all logs without adding k_sleep/k_yield + * anywhere else int the code. + */ + +/* most simple log processing theread */ +void boot_log_thread_func(void *dummy1, void *dummy2, void *dummy3) +{ + (void)dummy1; + (void)dummy2; + (void)dummy3; + + log_init(); + + while (1) { +#if defined(CONFIG_LOG1) || defined(CONFIG_LOG2) + /* support Zephyr legacy logging implementation before commit c5f2cde */ + if (log_process(false) == false) { +#else + if (log_process() == false) { +#endif + if (boot_log_stop) { + break; + } + k_sleep(BOOT_LOG_PROCESSING_INTERVAL); + } + } + + k_sem_give(&boot_log_sem); +} + +void zephyr_boot_log_start(void) +{ + /* start logging thread */ + k_thread_create(&boot_log_thread, boot_log_stack, + K_THREAD_STACK_SIZEOF(boot_log_stack), + boot_log_thread_func, NULL, NULL, NULL, + K_HIGHEST_APPLICATION_THREAD_PRIO, 0, + BOOT_LOG_PROCESSING_INTERVAL); + + k_thread_name_set(&boot_log_thread, "logging"); +} + +void zephyr_boot_log_stop(void) +{ + boot_log_stop = true; + + /* wait until log procesing thread expired + * This can be reworked using a thread_join() API once a such will be + * available in zephyr. + * see https://github.com/zephyrproject-rtos/zephyr/issues/21500 + */ + (void)k_sem_take(&boot_log_sem, K_FOREVER); +} +#endif /* defined(CONFIG_LOG) && !defined(ZEPHYR_LOG_MODE_IMMEDIATE) && \ + * !defined(CONFIG_LOG_PROCESS_THREAD) && !defined(ZEPHYR_LOG_MODE_MINIMAL) + */ + +#ifdef CONFIG_MCUBOOT_SERIAL +static void boot_serial_enter() +{ + int rc; + +#ifdef CONFIG_MCUBOOT_INDICATION_LED + io_led_set(1); +#endif + + mcuboot_status_change(MCUBOOT_STATUS_SERIAL_DFU_ENTERED); + + BOOT_LOG_INF("Enter the serial recovery mode"); + rc = boot_console_init(); + __ASSERT(rc == 0, "Error initializing boot console.\n"); + boot_serial_start(&boot_funcs); + __ASSERT(0, "Bootloader serial process was terminated unexpectedly.\n"); +} +#endif + +static void _delay_ms(uint32_t ms) +{ + uint32_t starting_uptime = k_uptime_get_32(); + uint32_t ending_uptime = starting_uptime + ms; + + while (starting_uptime < ending_uptime) + { + starting_uptime = k_uptime_get_32(); + } +} + +/* Function to check button sequence and perform swap if pressed */ +static void _check_and_swap(void) +{ + int ret; + int timer_ms; + + /*---------------------------------------------------------------------------------------------- + * Initialize GPIOs + *--------------------------------------------------------------------------------------------*/ + /* Check if right button GPIO is ready. */ + if (!gpio_is_ready_dt(&_right_button)) + { + BOOT_LOG_INF("Right button not ready"); + return; + } + + /* Check if left button GPIO is ready. */ + if (!gpio_is_ready_dt(&_left_button)) + { + BOOT_LOG_INF("Left button not ready"); + return; + } + + /* Check if power enable GPIO is ready. */ + if (!gpio_is_ready_dt(&_pwr_5v_enable)) + { + BOOT_LOG_INF("Left button not ready"); + return; + } + + /* Check if mcuboot LED (bubble) GPIO is ready. */ + if (!gpio_is_ready_dt(&_mcuboot_led)) + { + BOOT_LOG_INF("Left button not ready"); + return; + } + + /*---------------------------------------------------------------------------------------------- + * Configure GPIOs + *--------------------------------------------------------------------------------------------*/ + /* Configure right button. */ + ret = gpio_pin_configure_dt(&_right_button, GPIO_INPUT); + if (ret < 0) + { + BOOT_LOG_INF("Error configuring right button GPIO: %d", ret); + return; + } + + /* Configure left button. */ + ret = gpio_pin_configure_dt(&_left_button, GPIO_INPUT); + if (ret < 0) + { + BOOT_LOG_INF("Error configuring left button GPIO: %d", ret); + return; + } + + /* Configure power enable. */ + ret = gpio_pin_configure_dt(&_pwr_5v_enable, GPIO_OUTPUT); + if (ret < 0) + { + BOOT_LOG_INF("Error configuring power enable GPIO: %d", ret); + return; + } + + /* Configure mcuboot LED. */ + ret = gpio_pin_configure_dt(&_mcuboot_led, GPIO_OUTPUT); + if (ret < 0) + { + BOOT_LOG_INF("Error configuring mcuboot LED GPIO: %d", ret); + return; + } + + /* Small delay to ensure stable reading */ + _delay_ms(10); + + /*---------------------------------------------------------------------------------------------- + * Swap sequence + *--------------------------------------------------------------------------------------------*/ + /* 1. Initial condition, right button must be pressed and left not pressed. */ + if (!gpio_pin_get_dt(&_right_button) || gpio_pin_get_dt(&_left_button)) + { + return; + } + + /* After three seconds, check if right button is still pressed and left not pressed. */ + _delay_ms(1000); + if (!gpio_pin_get_dt(&_right_button) || gpio_pin_get_dt(&_left_button)) + { + return; + } + _delay_ms(1000); + if (!gpio_pin_get_dt(&_right_button) || gpio_pin_get_dt(&_left_button)) + { + return; + } + _delay_ms(1000); + if (!gpio_pin_get_dt(&_right_button) || gpio_pin_get_dt(&_left_button)) + { + return; + } + + + /* 2. Turn on mcuboot LED (bubble) for feedback of swap sequence starting. + NOTE: power chip needs to be enabled for LED to work. */ + gpio_pin_set_dt(&_pwr_5v_enable, true); + gpio_pin_set_dt(&_mcuboot_led, true); + + /* 3. Within the next 3 seconds, left button needs to be pressed while right is still held + to start swap sequence. Check every 100 mS */ + for (timer_ms = 0; timer_ms < 3000; timer_ms += 100) + { + /* If right button released, exit. */ + if (!gpio_pin_get_dt(&_right_button)) + { + /* Disable LED and power. */ + gpio_pin_set_dt(&_mcuboot_led, false); + gpio_pin_set_dt(&_pwr_5v_enable, false); + + return; + } + + if (gpio_pin_get_dt(&_left_button)) + { + BOOT_LOG_INF("Image swap button sequence detected - requesting permanent image swap"); + + /* Blink LED to indicate swap starting. */ + gpio_pin_set_dt(&_mcuboot_led, false); + _delay_ms(400); + gpio_pin_set_dt(&_mcuboot_led, true); + _delay_ms(400); + gpio_pin_set_dt(&_mcuboot_led, false); + _delay_ms(400); + gpio_pin_set_dt(&_mcuboot_led, true); + _delay_ms(400); + gpio_pin_set_dt(&_mcuboot_led, false); + + /* true = permanent swap, false = one time swap. */ + int rc = boot_set_pending(true); + if (rc == 0) + { + BOOT_LOG_INF("permanent image swap requested successfully"); + } else + { + BOOT_LOG_INF("Failed to request swap: %d", rc); + } + + return; + } + + _delay_ms(100); + } + + /* Disable LED and power. */ + gpio_pin_set_dt(&_mcuboot_led, false); + gpio_pin_set_dt(&_pwr_5v_enable, false); +} + +int main(void) +{ + struct boot_rsp rsp; + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + MCUBOOT_WATCHDOG_SETUP(); + MCUBOOT_WATCHDOG_FEED(); + +#if !defined(MCUBOOT_DIRECT_XIP) + BOOT_LOG_INF("Starting (MAPS modified) bootloader"); +#else + BOOT_LOG_INF("Starting Direct-XIP bootloader"); +#endif + +#ifdef CONFIG_MCUBOOT_INDICATION_LED + /* LED init */ + io_led_init(); +#endif + + os_heap_init(); + + ZEPHYR_BOOT_LOG_START(); + + (void)rc; + + mcuboot_status_change(MCUBOOT_STATUS_STARTUP); + + _check_and_swap(); + +#ifdef CONFIG_BOOT_SERIAL_ENTRANCE_GPIO + if (io_detect_pin() && + !io_boot_skip_serial_recovery()) { + boot_serial_enter(); + } +#endif + +#ifdef CONFIG_BOOT_SERIAL_PIN_RESET + if (io_detect_pin_reset()) { + boot_serial_enter(); + } +#endif + +#if defined(CONFIG_BOOT_USB_DFU_GPIO) + if (io_detect_pin()) { +#ifdef CONFIG_MCUBOOT_INDICATION_LED + io_led_set(1); +#endif + + mcuboot_status_change(MCUBOOT_STATUS_USB_DFU_ENTERED); + + rc = usb_enable(NULL); + if (rc) { + BOOT_LOG_ERR("Cannot enable USB"); + } else { + BOOT_LOG_INF("Waiting for USB DFU"); + wait_for_usb_dfu(K_FOREVER); + BOOT_LOG_INF("USB DFU wait time elapsed"); + } + } +#elif defined(CONFIG_BOOT_USB_DFU_WAIT) + rc = usb_enable(NULL); + if (rc) { + BOOT_LOG_ERR("Cannot enable USB"); + } else { + BOOT_LOG_INF("Waiting for USB DFU"); + + mcuboot_status_change(MCUBOOT_STATUS_USB_DFU_WAITING); + + wait_for_usb_dfu(K_MSEC(CONFIG_BOOT_USB_DFU_WAIT_DELAY_MS)); + BOOT_LOG_INF("USB DFU wait time elapsed"); + + mcuboot_status_change(MCUBOOT_STATUS_USB_DFU_TIMED_OUT); + } +#endif + +#ifdef CONFIG_BOOT_SERIAL_WAIT_FOR_DFU + /* Initialize the boot console, so we can already fill up our buffers while + * waiting for the boot image check to finish. This image check, can take + * some time, so it's better to reuse thistime to already receive the + * initial mcumgr command(s) into our buffers + */ + rc = boot_console_init(); + int timeout_in_ms = CONFIG_BOOT_SERIAL_WAIT_FOR_DFU_TIMEOUT; + uint32_t start = k_uptime_get_32(); + +#ifdef CONFIG_MCUBOOT_INDICATION_LED + io_led_set(1); +#endif +#endif + + FIH_CALL(boot_go, fih_rc, &rsp); + +#ifdef CONFIG_BOOT_SERIAL_BOOT_MODE + if (io_detect_boot_mode()) { + /* Boot mode to stay in bootloader, clear status and enter serial + * recovery mode + */ + boot_serial_enter(); + } +#endif + +#ifdef CONFIG_BOOT_SERIAL_WAIT_FOR_DFU + timeout_in_ms -= (k_uptime_get_32() - start); + if( timeout_in_ms <= 0 ) { + /* at least one check if time was expired */ + timeout_in_ms = 1; + } + boot_serial_check_start(&boot_funcs,timeout_in_ms); + +#ifdef CONFIG_MCUBOOT_INDICATION_LED + io_led_set(0); +#endif +#endif + + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + BOOT_LOG_ERR("Unable to find bootable image"); + + mcuboot_status_change(MCUBOOT_STATUS_NO_BOOTABLE_IMAGE_FOUND); + +#ifdef CONFIG_BOOT_SERIAL_NO_APPLICATION + /* No bootable image and configuration set to remain in serial + * recovery mode + */ + boot_serial_enter(); +#elif defined(CONFIG_BOOT_USB_DFU_NO_APPLICATION) + rc = usb_enable(NULL); + if (rc && rc != -EALREADY) { + BOOT_LOG_ERR("Cannot enable USB"); + } else { + BOOT_LOG_INF("Waiting for USB DFU"); + wait_for_usb_dfu(K_FOREVER); + } +#endif + + FIH_PANIC; + } + +#ifdef CONFIG_BOOT_RAM_LOAD + BOOT_LOG_INF("Bootloader chainload address offset: 0x%x", + rsp.br_hdr->ih_load_addr); +#else + BOOT_LOG_INF("Bootloader chainload address offset: 0x%x", + rsp.br_image_off); +#endif + +#if defined(MCUBOOT_DIRECT_XIP) + BOOT_LOG_INF("Jumping to the image slot"); +#else + BOOT_LOG_INF("Jumping to the first image slot"); +#endif + + mcuboot_status_change(MCUBOOT_STATUS_BOOTABLE_IMAGE_FOUND); + +#if USE_PARTITION_MANAGER && CONFIG_FPROTECT + +#ifdef PM_S1_ADDRESS +/* MCUBoot is stored in either S0 or S1, protect both */ +#define PROTECT_SIZE (PM_MCUBOOT_PRIMARY_ADDRESS - PM_S0_ADDRESS) +#define PROTECT_ADDR PM_S0_ADDRESS +#else +/* There is only one instance of MCUBoot */ +#define PROTECT_SIZE (PM_MCUBOOT_PRIMARY_ADDRESS - PM_MCUBOOT_ADDRESS) +#define PROTECT_ADDR PM_MCUBOOT_ADDRESS +#endif + + rc = fprotect_area(PROTECT_ADDR, PROTECT_SIZE); + + if (rc != 0) { + BOOT_LOG_ERR("Protect mcuboot flash failed, cancel startup."); + while (1) + ; + } + +#if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(PM_CPUNET_B0N_ADDRESS) && defined(CONFIG_PCD_APP) +#if defined(PM_TFM_SECURE_ADDRESS) + pcd_lock_ram(false); +#else + pcd_lock_ram(true); +#endif +#endif +#endif /* USE_PARTITION_MANAGER && CONFIG_FPROTECT */ + + ZEPHYR_BOOT_LOG_STOP(); + + do_boot(&rsp); + + mcuboot_status_change(MCUBOOT_STATUS_BOOT_FAILED); + + BOOT_LOG_ERR("Never should get here"); + while (1) + ; +} diff --git a/bootloader/mcuboot/boot/zephyr/nrf52840dk_nrf52840_cc310_ecdsa.conf b/bootloader/mcuboot/boot/zephyr/nrf52840dk_nrf52840_cc310_ecdsa.conf new file mode 100644 index 0000000..d195965 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/nrf52840dk_nrf52840_cc310_ecdsa.conf @@ -0,0 +1,2 @@ +CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256=y +CONFIG_BOOT_ECDSA_CC310=y diff --git a/bootloader/mcuboot/boot/zephyr/nrf_cleanup.c b/bootloader/mcuboot/boot/zephyr/nrf_cleanup.c new file mode 100644 index 0000000..051705e --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/nrf_cleanup.c @@ -0,0 +1,122 @@ +/* + * Copyright (c) 2020 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#include +#include +#include +#if defined(NRF_RTC0) || defined(NRF_RTC1) || defined(NRF_RTC2) + #include +#endif +#if defined(NRF_PPI) + #include +#endif +#if defined(NRF_DPPIC) + #include +#endif + +#include + +#if USE_PARTITION_MANAGER +#include +#endif + +#if defined(NRF_UARTE0) || defined(NRF_UARTE1) || defined(NRF_UARTE20) || \ + defined(NRF_UARTE30) +#define NRF_UARTE_CLEANUP +#endif + +#define NRF_UARTE_SUBSCRIBE_CONF_OFFS offsetof(NRF_UARTE_Type, SUBSCRIBE_STARTRX) +#define NRF_UARTE_SUBSCRIBE_CONF_SIZE (offsetof(NRF_UARTE_Type, EVENTS_CTS) -\ + NRF_UARTE_SUBSCRIBE_CONF_OFFS) + +#define NRF_UARTE_PUBLISH_CONF_OFFS offsetof(NRF_UARTE_Type, PUBLISH_CTS) +#define NRF_UARTE_PUBLISH_CONF_SIZE (offsetof(NRF_UARTE_Type, SHORTS) -\ + NRF_UARTE_PUBLISH_CONF_OFFS) + +#if defined(NRF_RTC0) || defined(NRF_RTC1) || defined(NRF_RTC2) +static inline void nrf_cleanup_rtc(NRF_RTC_Type * rtc_reg) +{ + nrf_rtc_task_trigger(rtc_reg, NRF_RTC_TASK_STOP); + nrf_rtc_event_disable(rtc_reg, 0xFFFFFFFF); + nrf_rtc_int_disable(rtc_reg, 0xFFFFFFFF); +} +#endif + +#if defined(NRF_UARTE_CLEANUP) +static NRF_UARTE_Type *nrf_uarte_to_clean[] = { +#if defined(NRF_UARTE0) + NRF_UARTE0, +#endif +#if defined(NRF_UARTE1) + NRF_UARTE1, +#endif +#if defined(NRF_UARTE20) + NRF_UARTE20, +#endif +#if defined(NRF_UARTE30) + NRF_UARTE30, +#endif +}; +#endif + +static void nrf_cleanup_clock(void) +{ + nrf_clock_int_disable(NRF_CLOCK, 0xFFFFFFFF); +} + +void nrf_cleanup_peripheral(void) +{ +#if defined(NRF_RTC0) + nrf_cleanup_rtc(NRF_RTC0); +#endif +#if defined(NRF_RTC1) + nrf_cleanup_rtc(NRF_RTC1); +#endif +#if defined(NRF_RTC2) + nrf_cleanup_rtc(NRF_RTC2); +#endif + +#if defined(NRF_UARTE_CLEANUP) + for (int i = 0; i < sizeof(nrf_uarte_to_clean) / sizeof(nrf_uarte_to_clean[0]); ++i) { + NRF_UARTE_Type *current = nrf_uarte_to_clean[i]; + + nrfy_uarte_int_disable(current, 0xFFFFFFFF); + nrfy_uarte_int_uninit(current); + nrfy_uarte_task_trigger(current, NRF_UARTE_TASK_STOPRX); + + nrfy_uarte_event_clear(current, NRF_UARTE_EVENT_RXSTARTED); + nrfy_uarte_event_clear(current, NRF_UARTE_EVENT_ENDRX); + nrfy_uarte_event_clear(current, NRF_UARTE_EVENT_RXTO); + nrfy_uarte_disable(current); + +#if defined(NRF_DPPIC) + /* Clear all SUBSCRIBE configurations. */ + memset((uint8_t *)current + NRF_UARTE_SUBSCRIBE_CONF_OFFS, 0, + NRF_UARTE_SUBSCRIBE_CONF_SIZE); + /* Clear all PUBLISH configurations. */ + memset((uint8_t *)current + NRF_UARTE_PUBLISH_CONF_OFFS, 0, + NRF_UARTE_PUBLISH_CONF_SIZE); +#endif + } +#endif + +#if defined(NRF_PPI) + nrf_ppi_channels_disable_all(NRF_PPI); +#endif +#if defined(NRF_DPPIC) + nrf_dppi_channels_disable_all(NRF_DPPIC); +#endif + nrf_cleanup_clock(); +} + +#if USE_PARTITION_MANAGER \ + && defined(CONFIG_ARM_TRUSTZONE_M) \ + && defined(PM_SRAM_NONSECURE_NAME) +void nrf_cleanup_ns_ram(void) +{ + memset((void *) PM_SRAM_NONSECURE_ADDRESS, 0, PM_SRAM_NONSECURE_SIZE); +} +#endif diff --git a/bootloader/mcuboot/boot/zephyr/os.c b/bootloader/mcuboot/boot/zephyr/os.c new file mode 100644 index 0000000..048cb2b --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/os.c @@ -0,0 +1,63 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include +#include + +#include "os/os_heap.h" + +#ifdef CONFIG_BOOT_USE_MBEDTLS + +#include +#include + +/* + * This is the heap for mbed TLS. The value needed depends on the key + * size and algorithm used. + * + * - RSA-2048 signing without encryption is known to work well with 6144 bytes; + * - When using RSA-2048-OAEP encryption + RSA-2048 signing, or RSA-3072 + * signing (no encryption) 10240 bytes seems to be enough. + * + * NOTE: RSA-3072 signing + RSA-2048-OAEP might require growing the size... + */ +#if (CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN == 2048) && !defined(CONFIG_BOOT_ENCRYPT_RSA) +#define CRYPTO_HEAP_SIZE 6144 +#else +# if !defined(MBEDTLS_RSA_NO_CRT) +# define CRYPTO_HEAP_SIZE 12032 +# else +# define CRYPTO_HEAP_SIZE 16384 +# endif +#endif + +static unsigned char mempool[CRYPTO_HEAP_SIZE]; + +/* + * Initialize mbedtls to be able to use the local heap. + */ +void os_heap_init(void) +{ + mbedtls_memory_buffer_alloc_init(mempool, sizeof(mempool)); +} +#else +void os_heap_init(void) +{ +} +#endif diff --git a/bootloader/mcuboot/boot/zephyr/pm.yml b/bootloader/mcuboot/boot/zephyr/pm.yml new file mode 100644 index 0000000..13ffc44 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/pm.yml @@ -0,0 +1,90 @@ +#include + +mcuboot: + size: CONFIG_PM_PARTITION_SIZE_MCUBOOT + placement: + before: [mcuboot_primary] +#if defined(CONFIG_HIDE_CHILD_PARENT_CONFIG) + align: {end: 0x1000} +#endif + +mcuboot_primary_app: + # All images to be placed in MCUboot's slot 0 should be placed in this + # partition + span: [app] + +mcuboot_primary: + span: [mcuboot_pad, mcuboot_primary_app] + +# Partition for secondary slot is not created if building in single application +# slot configuration. +#if !defined(CONFIG_SINGLE_APPLICATION_SLOT) && !defined(CONFIG_BOOT_DIRECT_XIP) +mcuboot_secondary: + share_size: [mcuboot_primary] +#if defined(CONFIG_PM_EXTERNAL_FLASH_MCUBOOT_SECONDARY) + region: external_flash + placement: + align: {start: 4} +#else + placement: + align: {start: CONFIG_FPROTECT_BLOCK_SIZE} + align_next: CONFIG_FPROTECT_BLOCK_SIZE # Ensure that the next partition does not interfere with this image + after: mcuboot_primary +#endif /* CONFIG_PM_EXTERNAL_FLASH_MCUBOOT_SECONDARY */ + +#endif /* !defined(CONFIG_SINGLE_APPLICATION_SLOT) && !defined(CONFIG_BOOT_DIRECT_XIP) */ + +#if CONFIG_BOOT_DIRECT_XIP + +# Direct XIP is enabled, reserve area for metadata (padding) and name the +# partition so that its clear that it is not the secondary slot, but the direct +# XIP alternative. + +mcuboot_secondary_pad: + share_size: mcuboot_pad + placement: + after: mcuboot_primary + align: {start: CONFIG_FPROTECT_BLOCK_SIZE} + +mcuboot_secondary_app: + share_size: mcuboot_primary_app + placement: + after: mcuboot_secondary_pad + +mcuboot_secondary: + span: [mcuboot_secondary_pad, mcuboot_secondary_app] + +#endif /* CONFIG_BOOT_DIRECT_XIP */ + +#if CONFIG_BOOT_SWAP_USING_SCRATCH +mcuboot_scratch: + size: CONFIG_PM_PARTITION_SIZE_MCUBOOT_SCRATCH + placement: + after: app + align: {start: CONFIG_FPROTECT_BLOCK_SIZE} +#endif /* CONFIG_BOOT_SWAP_USING_SCRATCH */ + +# Padding placed before image to boot. This reserves space for the MCUboot image header +# and it ensures that the boot image gets linked with the correct address offset in flash. +mcuboot_pad: + # MCUboot pad must be placed before the primary application partition. + # The primary application partition includes the secure firmware if present. + size: CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD + placement: + before: [mcuboot_primary_app] +#ifdef CONFIG_FPROTECT + align: {start: CONFIG_FPROTECT_BLOCK_SIZE} +#endif + +#if (CONFIG_NRF53_MCUBOOT_PRIMARY_1_RAM_FLASH) +mcuboot_primary_1: + region: ram_flash + size: CONFIG_NRF53_RAM_FLASH_SIZE +#endif /* CONFIG_NRF53_MULTI_IMAGE_UPDATE */ + +#if (CONFIG_NRF53_MULTI_IMAGE_UPDATE) +mcuboot_secondary_1: + region: external_flash + size: CONFIG_NRF53_RAM_FLASH_SIZE + +#endif /* CONFIG_NRF53_MULTI_IMAGE_UPDATE */ diff --git a/bootloader/mcuboot/boot/zephyr/prj.conf b/bootloader/mcuboot/boot/zephyr/prj.conf new file mode 100644 index 0000000..d7c33fc --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/prj.conf @@ -0,0 +1,45 @@ +CONFIG_PM=n + +CONFIG_MAIN_STACK_SIZE=10240 + +# Enable GPIO for button detection +CONFIG_GPIO=y +CONFIG_BOOT_SWAP_USING_MOVE=y + +CONFIG_BOOT_SWAP_SAVE_ENCTLV=n +CONFIG_BOOT_ENCRYPT_IMAGE=n + +CONFIG_BOOT_UPGRADE_ONLY=n +CONFIG_BOOT_BOOTSTRAP=n + +### mbedTLS has its own heap +# CONFIG_HEAP_MEM_POOL_SIZE is not set + +### We never want Zephyr's copy of tinycrypt. If tinycrypt is needed, +### MCUboot has its own copy in tree. +# CONFIG_TINYCRYPT is not set +# CONFIG_TINYCRYPT_ECC_DSA is not set +# CONFIG_TINYCRYPT_SHA256 is not set + +CONFIG_FLASH=y +CONFIG_FPROTECT=y + +### Various Zephyr boards enable features that we don't want. +# CONFIG_BT is not set +# CONFIG_BT_CTLR is not set +# CONFIG_I2C is not set + +CONFIG_LOG=y +CONFIG_LOG_MODE_MINIMAL=y # former CONFIG_MODE_MINIMAL +### Ensure Zephyr logging changes don't use more resources +CONFIG_LOG_DEFAULT_LEVEL=0 +### Use info log level by default +CONFIG_MCUBOOT_LOG_LEVEL_INF=y +### Decrease footprint by ~4 KB in comparison to CBPRINTF_COMPLETE=y +CONFIG_CBPRINTF_NANO=y +### Use the minimal C library to reduce flash usage +CONFIG_MINIMAL_LIBC=y +CONFIG_NRF_RTC_TIMER_USER_CHAN_COUNT=0 + +# NCS boot banner +CONFIG_NCS_APPLICATION_BOOT_BANNER_STRING="MCUboot" diff --git a/bootloader/mcuboot/boot/zephyr/prj_minimal.conf b/bootloader/mcuboot/boot/zephyr/prj_minimal.conf new file mode 100644 index 0000000..55d4c61 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/prj_minimal.conf @@ -0,0 +1,40 @@ +# +# Copyright (c) 2021 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +CONFIG_MAIN_STACK_SIZE=10240 +CONFIG_MBEDTLS_CFG_FILE="mcuboot-mbedtls-cfg.h" + +CONFIG_FLASH=y +CONFIG_FPROTECT=y +CONFIG_PM=n + +CONFIG_BOOT_SWAP_SAVE_ENCTLV=n +CONFIG_BOOT_ENCRYPT_IMAGE=n + +CONFIG_BOOT_BOOTSTRAP=n +CONFIG_BOOT_UPGRADE_ONLY=n + +### Minimal Configurations ### +CONFIG_BOOT_USE_MIN_PARTITION_SIZE=y +CONFIG_ASSERT=n +CONFIG_BOOT_BANNER=n +CONFIG_CLOCK_CONTROL=n +CONFIG_CONSOLE=n +CONFIG_CONSOLE_HANDLER=n +CONFIG_GPIO=n +CONFIG_KERNEL_MEM_POOL=n +CONFIG_LOG=n +CONFIG_MINIMAL_LIBC_CALLOC=n +CONFIG_MINIMAL_LIBC_MALLOC=n +CONFIG_MINIMAL_LIBC_REALLOCARRAY=n +CONFIG_NCS_SAMPLES_DEFAULTS=n +CONFIG_NO_RUNTIME_CHECKS=y +CONFIG_NRF_RTC_TIMER=n +CONFIG_PRINTK=n +CONFIG_SERIAL=n +CONFIG_SIZE_OPTIMIZATIONS=y +CONFIG_SYS_CLOCK_EXISTS=n +CONFIG_UART_CONSOLE=n diff --git a/bootloader/mcuboot/boot/zephyr/ram_load.conf b/bootloader/mcuboot/boot/zephyr/ram_load.conf new file mode 100644 index 0000000..4cca450 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/ram_load.conf @@ -0,0 +1,6 @@ +# Enables RAM load mode and specifies 16 MB of memory from 0x80000000 +# as a valid location for the firmware to be loaded into. + +CONFIG_BOOT_RAM_LOAD=y +CONFIG_BOOT_IMAGE_EXECUTABLE_RAM_START=0x80000000 +CONFIG_BOOT_IMAGE_EXECUTABLE_RAM_SIZE=16777216 \ No newline at end of file diff --git a/bootloader/mcuboot/boot/zephyr/sample.yaml b/bootloader/mcuboot/boot/zephyr/sample.yaml new file mode 100644 index 0000000..9ab3307 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/sample.yaml @@ -0,0 +1,59 @@ +sample: + description: mcuboot test build sample + name: mcuboot + +tests: + sample.bootloader.mcuboot: + tags: bootloader_mcuboot + platform_allow: nrf52840dk/nrf52840 frdm_k64f disco_l475_iot1 + integration_platforms: + - nrf52840dk/nrf52840 + - frdm_k64f + - disco_l475_iot1 + sample.bootloader.mcuboot.serial_recovery: + extra_args: OVERLAY_CONFIG=serial_recovery.conf + platform_allow: nrf52840dk/nrf52840 + integration_platforms: + - nrf52840dk/nrf52840 + tags: bootloader_mcuboot + sample.bootloader.mcuboot.usb_cdc_acm_recovery: + tags: bootloader_mcuboot + platform_allow: nrf52840dongle/nrf52840 + extra_args: DTC_OVERLAY_FILE="./usb_cdc_acm.overlay;app.overlay" + integration_platforms: + - nrf52840dongle/nrf52840 + sample.bootloader.mcuboot.usb_cdc_acm_recovery_log: + extra_args: OVERLAY_CONFIG=./usb_cdc_acm_log_recovery.conf + DTC_OVERLAY_FILE="./boards/nrf52840_big.overlay;app.overlay" + platform_allow: nrf52840dk/nrf52840 + integration_platforms: + - nrf52840dk/nrf52840 + tags: bootloader_mcuboot + sample.bootloader.mcuboot.single_slot: + extra_args: OVERLAY_CONFIG=./single_slot.conf + DTC_OVERLAY_FILE="./boards/nrf52840_single_slot.overlay;app.overlay" + platform_allow: nrf52840dk/nrf52840 + integration_platforms: + - nrf52840dk/nrf52840 + tags: bootloader_mcuboot + sample.bootloader.mcuboot.qspi_nor_slot: + extra_args: DTC_OVERLAY_FILE="./boards/nrf52840dk_qspi_nor_secondary.overlay;app.overlay" + OVERLAY_CONFIG="./boards/nrf52840dk_qspi_nor.conf;./boards/nrf52840dk_qspi_secondary_boot.conf" + platform_allow: nrf52840dk/nrf52840 + integration_platforms: + - nrf52840dk/nrf52840 + tags: bootloader_mcuboot + sample.bootloader.mcuboot.hooks_multi: + extra_args: DTC_OVERLAY_FILE="./boards/nrf52840dk_ram_multi.overlay;app.overlay" + OVERLAY_CONFIG=./boards/nrf52840dk_hooks_sample_overlay.conf + TEST_BOOT_IMAGE_ACCESS_HOOKS=Y + platform_allow: nrf52840dk/nrf52840 + integration_platforms: + - nrf52840dk/nrf52840 + tags: bootloader_mcuboot + sample.bootloader.mcuboot.ram_load: + extra_args: OVERLAY_CONFIG=./ram_load.conf + tags: bootloader_mcuboot + platform_allow: mimxrt1020_evk + integration_platforms: + - mimxrt1020_evk diff --git a/bootloader/mcuboot/boot/zephyr/serial_adapter.c b/bootloader/mcuboot/boot/zephyr/serial_adapter.c new file mode 100644 index 0000000..de2e5c5 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/serial_adapter.c @@ -0,0 +1,250 @@ +/* + * Copyright (c) 2017-2023 Nordic Semiconductor ASA + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include "bootutil/bootutil_log.h" +#include + +#if defined(CONFIG_BOOT_SERIAL_UART) && defined(CONFIG_UART_CONSOLE) && \ + (!DT_HAS_CHOSEN(zephyr_uart_mcumgr) || \ + DT_SAME_NODE(DT_CHOSEN(zephyr_uart_mcumgr), DT_CHOSEN(zephyr_console))) +#error Zephyr UART console must be disabled if serial_adapter module is used. +#endif + +#if defined(CONFIG_BOOT_SERIAL_CDC_ACM) && \ + defined(CONFIG_UART_CONSOLE) && (!DT_HAS_CHOSEN(zephyr_uart_mcumgr) || \ + DT_SAME_NODE(DT_CHOSEN(zephyr_uart_mcumgr), DT_CHOSEN(zephyr_console))) +#error Zephyr UART console must be disabled if CDC ACM is enabled and MCUmgr \ + has not been redirected to other UART with DTS chosen zephyr,uart-mcumgr. +#endif + +#if defined(CONFIG_BOOT_SERIAL_CDC_ACM) && CONFIG_MAIN_THREAD_PRIORITY < 0 +#error CONFIG_MAIN_THREAD_PRIORITY must be preemptible to support USB CDC ACM \ + (0 or above) +#endif + +BOOT_LOG_MODULE_REGISTER(serial_adapter); + +/** @brief Console input representation + * + * This struct is used to represent an input line from a serial interface. + */ +struct line_input { + /** Required to use sys_slist */ + sys_snode_t node; + + int len; + /** Buffer where the input line is recorded */ + char line[CONFIG_BOOT_MAX_LINE_INPUT_LEN]; +}; + +static struct device const *uart_dev; +static struct line_input line_bufs[CONFIG_BOOT_LINE_BUFS]; + +static sys_slist_t avail_queue; +static sys_slist_t lines_queue; + +static uint16_t cur; + +static int boot_uart_fifo_getline(char **line); +static int boot_uart_fifo_init(void); + +int +console_out(int c) +{ + uart_poll_out(uart_dev, c); + + return c; +} + +void +console_write(const char *str, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) { + if (console_out((int)str[i]) == EOF) { + break; + } + } +} + +int +console_read(char *str, int str_size, int *newline) +{ + char *line; + int len; + + len = boot_uart_fifo_getline(&line); + + if (line == NULL) { + *newline = 0; + return 0; + } + + if (len > str_size - 1) { + len = str_size - 1; + } + + memcpy(str, line, len); + str[len] = '\0'; + *newline = 1; + return len + 1; +} + +int +boot_console_init(void) +{ + int i; + + /* Zephyr UART handler takes an empty buffer from avail_queue, + * stores UART input in it until EOL, and then puts it into + * lines_queue. + */ + sys_slist_init(&avail_queue); + sys_slist_init(&lines_queue); + + for (i = 0; i < ARRAY_SIZE(line_bufs); i++) { + sys_slist_append(&avail_queue, &line_bufs[i].node); + } + + return boot_uart_fifo_init(); +} + +static void +boot_uart_fifo_callback(const struct device *dev, void *user_data) +{ + static struct line_input *cmd; + uint8_t byte; + int rx; + + uart_irq_update(uart_dev); + + if (!uart_irq_rx_ready(uart_dev)) { + return; + } + + while (true) { + rx = uart_fifo_read(uart_dev, &byte, 1); + if (rx != 1) { + break; + } + + if (!cmd) { + sys_snode_t *node; + + node = sys_slist_get(&avail_queue); + if (!node) { + BOOT_LOG_ERR("Not enough memory to store" + " incoming data!"); + return; + } + cmd = CONTAINER_OF(node, struct line_input, node); + } + + if (cur < CONFIG_BOOT_MAX_LINE_INPUT_LEN) { + cmd->line[cur++] = byte; + } + + if (byte == '\n') { + cmd->len = cur; + sys_slist_append(&lines_queue, &cmd->node); + cur = 0; + cmd = NULL; + } + } +} + +static int +boot_uart_fifo_getline(char **line) +{ + static struct line_input *cmd; + sys_snode_t *node; + int key; + + key = irq_lock(); + /* Recycle cmd buffer returned previous time */ + if (cmd != NULL) { + if (sys_slist_peek_tail(&avail_queue) != &cmd->node) { + sys_slist_append(&avail_queue, &cmd->node); + } + } + + node = sys_slist_get(&lines_queue); + irq_unlock(key); + + if (node == NULL) { + cmd = NULL; + *line = NULL; + + return 0; + } + + cmd = CONTAINER_OF(node, struct line_input, node); + *line = cmd->line; + return cmd->len; +} + +static int +boot_uart_fifo_init(void) +{ +#if defined(CONFIG_BOOT_SERIAL_UART) + +#if DT_HAS_CHOSEN(zephyr_uart_mcumgr) + uart_dev = DEVICE_DT_GET(DT_CHOSEN(zephyr_uart_mcumgr)); +#else + uart_dev = DEVICE_DT_GET(DT_CHOSEN(zephyr_console)); +#endif + +#elif defined(CONFIG_BOOT_SERIAL_CDC_ACM) + uart_dev = DEVICE_DT_GET_ONE(zephyr_cdc_acm_uart); +#else +#error No serial recovery device selected +#endif + + + if (!device_is_ready(uart_dev)) { + return (-1); + } + +#if CONFIG_BOOT_SERIAL_CDC_ACM + int rc = usb_enable(NULL); + if (rc) { + return (-1); + } +#endif + + uart_irq_callback_set(uart_dev, boot_uart_fifo_callback); + + /* Drain the fifo */ + if (uart_irq_rx_ready(uart_dev)) { + uint8_t c; + + while (uart_fifo_read(uart_dev, &c, 1)) { + ; + } + } + + cur = 0; + + uart_irq_rx_enable(uart_dev); + + return 0; +} diff --git a/bootloader/mcuboot/boot/zephyr/serial_recovery.conf b/bootloader/mcuboot/boot/zephyr/serial_recovery.conf new file mode 100644 index 0000000..ddd08fc --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/serial_recovery.conf @@ -0,0 +1,3 @@ +CONFIG_MCUBOOT_SERIAL=y +CONFIG_BOOT_SERIAL_UART=y +CONFIG_UART_CONSOLE=n diff --git a/bootloader/mcuboot/boot/zephyr/shared_data.c b/bootloader/mcuboot/boot/zephyr/shared_data.c new file mode 100644 index 0000000..5554a7e --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/shared_data.c @@ -0,0 +1,124 @@ +/* + * Copyright (c) 2023, Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include +#include +#include +#include <../../bootutil/src/bootutil_priv.h> + +#define SHARED_MEMORY_MIN_SIZE 8 + +LOG_MODULE_REGISTER(bootloader_info, CONFIG_RETENTION_LOG_LEVEL); + +static bool shared_memory_init_done = false; +static uint16_t shared_data_size = SHARED_DATA_HEADER_SIZE; +static ssize_t shared_data_max_size = 0; +static const struct device *bootloader_info_dev = + DEVICE_DT_GET(DT_CHOSEN(zephyr_bootloader_info)); + +BUILD_ASSERT(SHARED_MEMORY_MIN_SIZE < \ + DT_REG_SIZE_BY_IDX(DT_CHOSEN(zephyr_bootloader_info), 0), \ + "zephyr,bootloader-info area is too small for bootloader information struct"); + +int boot_add_data_to_shared_area(uint8_t major_type, + uint16_t minor_type, + size_t size, + const uint8_t *data) +{ + struct shared_data_tlv_header header = { + .tlv_magic = SHARED_DATA_TLV_INFO_MAGIC, + .tlv_tot_len = shared_data_size, + }; + struct shared_data_tlv_entry tlv_entry = {0}; + uint16_t boot_data_size; + uintptr_t tlv_end, offset; + int rc; + + if (data == NULL) { + return SHARED_MEMORY_GEN_ERROR; + } + + /* Check whether first time to call this function. If does then initialise + * shared data area. + */ + if (!shared_memory_init_done) { + retention_clear(bootloader_info_dev); + shared_data_max_size = retention_size(bootloader_info_dev); + shared_memory_init_done = true; + } + + /* Check whether TLV entry is already added. + * Get the boundaries of TLV section + */ + tlv_end = shared_data_size; + offset = SHARED_DATA_HEADER_SIZE; + + /* Iterates over the TLV section looks for the same entry if found then + * returns with error: SHARED_MEMORY_OVERWRITE + */ + while (offset < tlv_end) { + /* Create local copy to avoid unaligned access */ + rc = retention_read(bootloader_info_dev, offset, (void *)&tlv_entry, + SHARED_DATA_ENTRY_HEADER_SIZE); + + if (rc) { + return SHARED_MEMORY_READ_ERROR; + } + + if (GET_MAJOR(tlv_entry.tlv_type) == major_type && + GET_MINOR(tlv_entry.tlv_type) == minor_type) { + return SHARED_MEMORY_OVERWRITE; + } + + offset += SHARED_DATA_ENTRY_SIZE(tlv_entry.tlv_len); + } + + /* Add TLV entry */ + tlv_entry.tlv_type = SET_TLV_TYPE(major_type, minor_type); + tlv_entry.tlv_len = size; + + if (!boot_u16_safe_add(&boot_data_size, shared_data_size, + SHARED_DATA_ENTRY_SIZE(size))) { + return SHARED_MEMORY_GEN_ERROR; + } + + /* Verify overflow of shared area */ + if (boot_data_size > shared_data_max_size) { + return SHARED_MEMORY_OVERFLOW; + } + + offset = shared_data_size; + rc = retention_write(bootloader_info_dev, offset, (void*)&tlv_entry, + SHARED_DATA_ENTRY_HEADER_SIZE); + if (rc) { + LOG_ERR("Shared data TLV header write failed: %d", rc); + return SHARED_MEMORY_WRITE_ERROR; + } + + offset += SHARED_DATA_ENTRY_HEADER_SIZE; + rc = retention_write(bootloader_info_dev, offset, data, size); + + if (rc) { + LOG_ERR("Shared data TLV data write failed: %d", rc); + return SHARED_MEMORY_WRITE_ERROR; + } + + shared_data_size += SHARED_DATA_ENTRY_SIZE(size); + header.tlv_tot_len = shared_data_size; + + rc = retention_write(bootloader_info_dev, 0, (void *)&header, + sizeof(header)); + + if (rc) { + return SHARED_MEMORY_WRITE_ERROR; + } + + return SHARED_MEMORY_OK; +} diff --git a/bootloader/mcuboot/boot/zephyr/single_loader.c b/bootloader/mcuboot/boot/zephyr/single_loader.c new file mode 100644 index 0000000..75374d2 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/single_loader.c @@ -0,0 +1,136 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2020 Nordic Semiconductor ASA + * Copyright (c) 2020 Arm Limited + */ + +#include +#include "bootutil/image.h" +#include "bootutil_priv.h" +#include "bootutil/bootutil_log.h" +#include "bootutil/bootutil_public.h" +#include "bootutil/fault_injection_hardening.h" + +#include "mcuboot_config/mcuboot_config.h" + +BOOT_LOG_MODULE_DECLARE(mcuboot); + +/* Variables passed outside of unit via poiters. */ +static const struct flash_area *_fa_p; +static struct image_header _hdr = { 0 }; + +#if defined(MCUBOOT_VALIDATE_PRIMARY_SLOT) || defined(MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE) +/** + * Validate hash of a primary boot image. + * + * @param[in] fa_p flash area pointer + * @param[in] hdr boot image header pointer + * + * @return FIH_SUCCESS on success, error code otherwise + */ +fih_ret +boot_image_validate(const struct flash_area *fa_p, + struct image_header *hdr) +{ + static uint8_t tmpbuf[BOOT_TMPBUF_SZ]; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + /* NOTE: The first argument to boot_image_validate, for enc_state pointer, + * is allowed to be NULL only because the single image loader compiles + * with BOOT_IMAGE_NUMBER == 1, which excludes the code that uses + * the pointer from compilation. + */ + /* Validate hash */ + if (IS_ENCRYPTED(hdr)) + { + /* Clear the encrypted flag we didn't supply a key + * This flag could be set if there was a decryption in place + * was performed. We will try to validate the image, and if still + * encrypted the validation will fail, and go in panic mode + */ + hdr->ih_flags &= ~(ENCRYPTIONFLAGS); + } + FIH_CALL(bootutil_img_validate, fih_rc, NULL, 0, hdr, fa_p, tmpbuf, + BOOT_TMPBUF_SZ, NULL, 0, NULL); + + FIH_RET(fih_rc); +} +#endif /* MCUBOOT_VALIDATE_PRIMARY_SLOT || MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE*/ + +#if defined(MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE) +inline static fih_ret +boot_image_validate_once(const struct flash_area *fa_p, + struct image_header *hdr) +{ + static struct boot_swap_state state; + int rc; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + memset(&state, 0, sizeof(struct boot_swap_state)); + rc = boot_read_swap_state(fa_p, &state); + if (rc != 0) + FIH_RET(FIH_FAILURE); + if (state.magic != BOOT_MAGIC_GOOD + || state.image_ok != BOOT_FLAG_SET) { + /* At least validate the image once */ + FIH_CALL(boot_image_validate, fih_rc, fa_p, hdr); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + FIH_RET(FIH_FAILURE); + } + if (state.magic != BOOT_MAGIC_GOOD) { + rc = boot_write_magic(fa_p); + if (rc != 0) + FIH_RET(FIH_FAILURE); + } + rc = boot_write_image_ok(fa_p); + if (rc != 0) + FIH_RET(FIH_FAILURE); + } + FIH_RET(FIH_SUCCESS); +} +#endif + +/** + * Gather information on image and prepare for booting. + * + * @parami[out] rsp Parameters for booting image, on success + * + * @return FIH_SUCCESS on success; nonzero on failure. + */ +fih_ret +boot_go(struct boot_rsp *rsp) +{ + int rc = -1; + FIH_DECLARE(fih_rc, FIH_FAILURE); + + rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(0), &_fa_p); + assert(rc == 0); + + rc = boot_image_load_header(_fa_p, &_hdr); + if (rc != 0) + goto out; + +#ifdef MCUBOOT_VALIDATE_PRIMARY_SLOT + FIH_CALL(boot_image_validate, fih_rc, _fa_p, &_hdr); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + goto out; + } +#elif defined(MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE) + FIH_CALL(boot_image_validate_once, fih_rc, _fa_p, &_hdr); + if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) { + goto out; + } +#else + fih_rc = FIH_SUCCESS; +#endif /* MCUBOOT_VALIDATE_PRIMARY_SLOT */ + + rsp->br_flash_dev_id = flash_area_get_device_id(_fa_p); + rsp->br_image_off = flash_area_get_off(_fa_p); + rsp->br_hdr = &_hdr; + +out: + flash_area_close(_fa_p); + + FIH_RET(fih_rc); +} diff --git a/bootloader/mcuboot/boot/zephyr/single_slot.conf b/bootloader/mcuboot/boot/zephyr/single_slot.conf new file mode 100644 index 0000000..34cc92a --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/single_slot.conf @@ -0,0 +1 @@ +CONFIG_SINGLE_APPLICATION_SLOT=y diff --git a/bootloader/mcuboot/boot/zephyr/socs/esp32_procpu.conf b/bootloader/mcuboot/boot/zephyr/socs/esp32_procpu.conf new file mode 100644 index 0000000..b2b4059 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/socs/esp32_procpu.conf @@ -0,0 +1,19 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=512 +CONFIG_BOOT_UPGRADE_ONLY=y +CONFIG_BOOT_VALIDATE_SLOT0=n +CONFIG_BOOT_SIGNATURE_TYPE_NONE=y +CONFIG_BOOT_BANNER=n + +CONFIG_UART_CONSOLE=n +CONFIG_CONSOLE=n +CONFIG_SERIAL=n + +CONFIG_MCUBOOT_LOG_LEVEL_OFF=y +CONFIG_LOG_DEFAULT_LEVEL=0 +CONFIG_DEBUG=n + +CONFIG_HEAP_MEM_POOL_SIZE=4096 +CONFIG_MINIMAL_LIBC=y diff --git a/bootloader/mcuboot/boot/zephyr/socs/esp32c2.conf b/bootloader/mcuboot/boot/zephyr/socs/esp32c2.conf new file mode 100644 index 0000000..5b49f16 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/socs/esp32c2.conf @@ -0,0 +1,20 @@ +# SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=512 +CONFIG_BOOT_UPGRADE_ONLY=y +CONFIG_BOOT_VALIDATE_SLOT0=n +CONFIG_BOOT_SIGNATURE_TYPE_NONE=y +CONFIG_BOOT_BANNER=n + +CONFIG_UART_CONSOLE=n +CONFIG_CONSOLE=n +CONFIG_SERIAL=n + +CONFIG_MCUBOOT_LOG_LEVEL_OFF=y +CONFIG_LOG_DEFAULT_LEVEL=0 +CONFIG_DEBUG=n + +CONFIG_XIP=n +CONFIG_HEAP_MEM_POOL_SIZE=4096 +CONFIG_MINIMAL_LIBC=y diff --git a/bootloader/mcuboot/boot/zephyr/socs/esp32c3.conf b/bootloader/mcuboot/boot/zephyr/socs/esp32c3.conf new file mode 100644 index 0000000..56298cd --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/socs/esp32c3.conf @@ -0,0 +1,20 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=512 +CONFIG_BOOT_UPGRADE_ONLY=y +CONFIG_BOOT_VALIDATE_SLOT0=n +CONFIG_BOOT_SIGNATURE_TYPE_NONE=y +CONFIG_BOOT_BANNER=n + +CONFIG_UART_CONSOLE=n +CONFIG_CONSOLE=n +CONFIG_SERIAL=n + +CONFIG_MCUBOOT_LOG_LEVEL_OFF=y +CONFIG_LOG_DEFAULT_LEVEL=0 +CONFIG_DEBUG=n + +CONFIG_XIP=n +CONFIG_HEAP_MEM_POOL_SIZE=4096 +CONFIG_MINIMAL_LIBC=y diff --git a/bootloader/mcuboot/boot/zephyr/socs/esp32c6.conf b/bootloader/mcuboot/boot/zephyr/socs/esp32c6.conf new file mode 100644 index 0000000..5b49f16 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/socs/esp32c6.conf @@ -0,0 +1,20 @@ +# SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=512 +CONFIG_BOOT_UPGRADE_ONLY=y +CONFIG_BOOT_VALIDATE_SLOT0=n +CONFIG_BOOT_SIGNATURE_TYPE_NONE=y +CONFIG_BOOT_BANNER=n + +CONFIG_UART_CONSOLE=n +CONFIG_CONSOLE=n +CONFIG_SERIAL=n + +CONFIG_MCUBOOT_LOG_LEVEL_OFF=y +CONFIG_LOG_DEFAULT_LEVEL=0 +CONFIG_DEBUG=n + +CONFIG_XIP=n +CONFIG_HEAP_MEM_POOL_SIZE=4096 +CONFIG_MINIMAL_LIBC=y diff --git a/bootloader/mcuboot/boot/zephyr/socs/esp32s2.conf b/bootloader/mcuboot/boot/zephyr/socs/esp32s2.conf new file mode 100644 index 0000000..b2b4059 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/socs/esp32s2.conf @@ -0,0 +1,19 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=512 +CONFIG_BOOT_UPGRADE_ONLY=y +CONFIG_BOOT_VALIDATE_SLOT0=n +CONFIG_BOOT_SIGNATURE_TYPE_NONE=y +CONFIG_BOOT_BANNER=n + +CONFIG_UART_CONSOLE=n +CONFIG_CONSOLE=n +CONFIG_SERIAL=n + +CONFIG_MCUBOOT_LOG_LEVEL_OFF=y +CONFIG_LOG_DEFAULT_LEVEL=0 +CONFIG_DEBUG=n + +CONFIG_HEAP_MEM_POOL_SIZE=4096 +CONFIG_MINIMAL_LIBC=y diff --git a/bootloader/mcuboot/boot/zephyr/socs/esp32s3_procpu.conf b/bootloader/mcuboot/boot/zephyr/socs/esp32s3_procpu.conf new file mode 100644 index 0000000..b2b4059 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/socs/esp32s3_procpu.conf @@ -0,0 +1,19 @@ +# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOOT_MAX_IMG_SECTORS=512 +CONFIG_BOOT_UPGRADE_ONLY=y +CONFIG_BOOT_VALIDATE_SLOT0=n +CONFIG_BOOT_SIGNATURE_TYPE_NONE=y +CONFIG_BOOT_BANNER=n + +CONFIG_UART_CONSOLE=n +CONFIG_CONSOLE=n +CONFIG_SERIAL=n + +CONFIG_MCUBOOT_LOG_LEVEL_OFF=y +CONFIG_LOG_DEFAULT_LEVEL=0 +CONFIG_DEBUG=n + +CONFIG_HEAP_MEM_POOL_SIZE=4096 +CONFIG_MINIMAL_LIBC=y diff --git a/bootloader/mcuboot/boot/zephyr/sysbuild/CMakeLists.txt b/bootloader/mcuboot/boot/zephyr/sysbuild/CMakeLists.txt new file mode 100644 index 0000000..5a2a881 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/sysbuild/CMakeLists.txt @@ -0,0 +1,43 @@ +function(mathup num align result) + math(EXPR out "(((${num}) + ((${align}) - 1)) & ~((${align}) - 1))") + set(${result} "${out}" PARENT_SCOPE) +endfunction() + +function(${SYSBUILD_CURRENT_MODULE_NAME}_pre_image_cmake) + cmake_parse_arguments(PRE_IMAGE_CMAKE "" "IMAGE" "IMAGES" ${ARGN}) + + if(NOT "${PRE_IMAGE_CMAKE_IMAGE}" STREQUAL "mcuboot" OR NOT SB_CONFIG_BOOTLOADER_MCUBOOT) + return() + endif() + + set_property( + DIRECTORY APPEND PROPERTY + CMAKE_CONFIGURE_DEPENDS + ${CMAKE_BINARY_DIR}/mcuboot/CMakeCache.txt + ${CMAKE_BINARY_DIR}/mcuboot/zephyr/.config + ) +endfunction(${SYSBUILD_CURRENT_MODULE_NAME}_pre_image_cmake) + +function(${SYSBUILD_CURRENT_MODULE_NAME}_post_image_cmake) + cmake_parse_arguments(POST_IMAGE_CMAKE "" "IMAGE" "IMAGES" ${ARGN}) + + if(NOT "${POST_IMAGE_CMAKE_IMAGE}" STREQUAL "mcuboot" OR NOT SB_CONFIG_BOOTLOADER_MCUBOOT) + return() + endif() + + foreach(image ${IMAGES}) + set(app_type) + get_property(app_type TARGET ${image} PROPERTY APP_TYPE) + + if("${app_type}" STREQUAL "MAIN") + sysbuild_get(mcuboot_image_footer_size IMAGE mcuboot CACHE) + sysbuild_get(mcuboot_image_upgrade_footer_size IMAGE mcuboot CACHE) + math(EXPR mcuboot_image_footer_size "${mcuboot_image_footer_size}" OUTPUT_FORMAT HEXADECIMAL) + math(EXPR mcuboot_image_upgrade_footer_size "${mcuboot_image_upgrade_footer_size}" OUTPUT_FORMAT HEXADECIMAL) + + set_property(TARGET ${image} APPEND_STRING PROPERTY CONFIG "CONFIG_ROM_END_OFFSET=${mcuboot_image_footer_size}\n") + set_property(TARGET ${image} APPEND_STRING PROPERTY CONFIG "CONFIG_MCUBOOT_UPDATE_FOOTER_SIZE=${mcuboot_image_upgrade_footer_size}\n") + return() + endif() + endforeach() +endfunction(${SYSBUILD_CURRENT_MODULE_NAME}_post_image_cmake) diff --git a/bootloader/mcuboot/boot/zephyr/targets/arduino_101.h b/bootloader/mcuboot/boot/zephyr/targets/arduino_101.h new file mode 100644 index 0000000..19095b3 --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/targets/arduino_101.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/** + * @file + * @brief Bootloader device specific configuration. + */ + +/* + * NOTE: This flash layout is a simple one for demonstration purposes. + * It assumes we are building MCUboot as a 3rd-stage loader, leaving the + * stock bootloaders on the Arduino 101 untouched. + * + * In this configuration MCUboot will live at 0x40010000 + */ + +#define FLASH_DEV_NAME CONFIG_SOC_FLASH_QMSI_DEV_NAME +#define FLASH_ALIGN 4 +#define FLASH_AREA_IMAGE_0_OFFSET 0x40020000 +#define FLASH_AREA_IMAGE_0_SIZE 0x10000 +#define FLASH_AREA_IMAGE_1_OFFSET 0x40030000 +#define FLASH_AREA_IMAGE_1_SIZE 0x10000 +#define FLASH_AREA_IMAGE_SCRATCH_OFFSET 0x40040000 +#define FLASH_AREA_IMAGE_SCRATCH_SIZE 0x10000 diff --git a/bootloader/mcuboot/boot/zephyr/usb_cdc_acm.overlay b/bootloader/mcuboot/boot/zephyr/usb_cdc_acm.overlay new file mode 100644 index 0000000..800d63c --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/usb_cdc_acm.overlay @@ -0,0 +1,5 @@ +&zephyr_udc0 { + cdc_acm_uart0 { + compatible = "zephyr,cdc-acm-uart"; + }; +}; diff --git a/bootloader/mcuboot/boot/zephyr/usb_cdc_acm_log_recovery.conf b/bootloader/mcuboot/boot/zephyr/usb_cdc_acm_log_recovery.conf new file mode 100644 index 0000000..2312c0e --- /dev/null +++ b/bootloader/mcuboot/boot/zephyr/usb_cdc_acm_log_recovery.conf @@ -0,0 +1,11 @@ +CONFIG_LOG=y + +# Serial +CONFIG_UART_CONSOLE=n +CONFIG_CONSOLE=n +CONFIG_SERIAL=y +CONFIG_UART_LINE_CTRL=y + +# MCUBoot serial +CONFIG_MCUBOOT_SERIAL=y +CONFIG_BOOT_SERIAL_CDC_ACM=y diff --git a/bootloader/mcuboot/ci/check-signed-off-by.sh b/bootloader/mcuboot/ci/check-signed-off-by.sh new file mode 100644 index 0000000..5d41afe --- /dev/null +++ b/bootloader/mcuboot/ci/check-signed-off-by.sh @@ -0,0 +1,81 @@ +#!/bin/bash + +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +DEPENDABOT_COMMITER='GitHub ' +DEPENDABOT_AUTHOR='dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>' + +if [[ -n "$1" ]]; then + commits=$(git show -s --format=%h ${1}~..HEAD) +else + parents=(`git log -n 1 --format=%p HEAD`) + if [[ "${#parents[@]}" -ne 2 ]]; then + echo "HEAD is not a merge commit, please supply the oldest SHA" + exit 1 + fi + commits=$(git show -s --format=%h ${parents[0]}..${parents[1]}) +fi + +if [[ -z "${commits}" ]]; then + echo "No commits found in this PR!" + exit 1 +fi + +for sha in $commits; do + author="$(git show -s --format="%an <%ae>" ${sha})" + committer="$(git show -s --format="%cn <%ce>" ${sha})" + + if [[ "${committer}" == "${DEPENDABOT_COMMITER}" ]] && + [[ "${author}" == "${DEPENDABOT_AUTHOR}" ]]; then + continue + fi + + author="Signed-off-by: ${author}" + committer="Signed-off-by: ${committer}" + + lines="$(git show -s --format=%B ${sha})" + + found_author=false + # Don't enforce committer email on forks; this primarily avoids issues + # running workflows on the zephyr fork, because rebases done in the GH UX + # use the primary email of the committer, which might not match the one + # used in git CLI. + if [[ $GITHUB_REPOSITORY == mcu-tools/* ]]; then + found_committer=false + else + found_committer=true + fi + + IFS=$'\n' + for line in ${lines}; do + stripped=$(echo $line | sed -e 's/^\s*//' | sed -e 's/\s*$//') + if [[ "${stripped}" == "${author}" ]]; then + found_author=true + fi + if [[ "${stripped}" == "${committer}" ]]; then + found_committer=true + fi + + [[ ${found_author} == true && ${found_committer} == true ]] && break + done + + if [[ ${found_author} == false ]]; then + echo -e "Missing \"${author}\" in commit ${sha}" + fi + if [[ ${found_committer} == false ]]; then + echo -e "Missing \"${committer}\" in commit ${sha}" + fi + if [[ ${found_author} == false || ${found_committer} == false ]]; then + exit 1 + fi +done diff --git a/bootloader/mcuboot/ci/compare_versions.py b/bootloader/mcuboot/ci/compare_versions.py new file mode 100644 index 0000000..d97392e --- /dev/null +++ b/bootloader/mcuboot/ci/compare_versions.py @@ -0,0 +1,65 @@ +#!/usr/bin/env python3 + +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +from packaging.version import parse, InvalidVersion +import argparse +import sys + +try: + from packaging.version import LegacyVersion +except ImportError: + LegacyVersion = () # trick isinstance! + +# exit with 0 if --new is equal to --old +# exit with 1 on errors +# exit with 2 if --new is newer than --old +# exit with 3 if --new is older than --old + +parser = argparse.ArgumentParser() +parser.add_argument('--old', help='Version currently in use') +parser.add_argument('--new', help='New version to publish') + +args = parser.parse_args() +if args.old is None or args.new is None: + parser.print_help() + exit(1) + +# packaging>=22 only supports PEP-440 version numbers, and a non-valid version +# will throw InvalidVersion. Previous packaging releases would create a +# LegacyVersion object if the given version string failed to parse as PEP-440, +# and since we use versions closer to semver, we want to fail in that case. + +versions = [] +for version in [args.old, args.new]: + try: + versions.append(parse(version)) + except InvalidVersion: + print("Invalid version parsed: {}".format(version)) + sys.exit(1) + +old, new = versions[0], versions[1] +for version in [old, new]: + if isinstance(version, LegacyVersion): + print("Invalid version parsed: {}".format(version)) + sys.exit(1) + +if new == old: + print("No version change") + sys.exit(0) +elif new > old: + print("Upgrade detected ({} > {})".format(new, old)) + sys.exit(2) + +print("Downgrade detected ({} < {})".format(new, old)) +sys.exit(3) diff --git a/bootloader/mcuboot/ci/espressif_install.sh b/bootloader/mcuboot/ci/espressif_install.sh new file mode 100644 index 0000000..c2ec2c4 --- /dev/null +++ b/bootloader/mcuboot/ci/espressif_install.sh @@ -0,0 +1,23 @@ +#!/usr/bin/env bash +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: Apache-2.0 + +set -eo pipefail + +install_imgtool() { + pip install imgtool +} + +install_idf() { + pushd $HOME + git clone --depth=1 https://github.com/espressif/esp-idf.git --branch release/v5.1 + [[ $? -ne 0 ]] && exit 1 + + $HOME/esp-idf/install.sh + [[ $? -ne 0 ]] && exit 1 + + popd +} + +install_imgtool +install_idf diff --git a/bootloader/mcuboot/ci/espressif_run.sh b/bootloader/mcuboot/ci/espressif_run.sh new file mode 100644 index 0000000..74b77cb --- /dev/null +++ b/bootloader/mcuboot/ci/espressif_run.sh @@ -0,0 +1,60 @@ +#!/usr/bin/env bash +# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: Apache-2.0 + +SCRIPT_ROOTDIR=$(dirname "$(realpath "${BASH_SOURCE[0]}")") +MCUBOOT_ROOTDIR=$(realpath "${SCRIPT_ROOTDIR}/..") +ESPRESSIF_ROOT="${MCUBOOT_ROOTDIR}/boot/espressif" +IDF_PATH="${HOME}/esp-idf" + +set -eo pipefail + +prepare_environment() { + # Prepare the environment for ESP-IDF + + . "${IDF_PATH}"/export.sh +} + +build_mcuboot() { + local target=${1} + local feature=${2} + local img_num=${3} + local build_dir=".build-${target}" + local toolchain_file="${ESPRESSIF_ROOT}/tools/toolchain-${target}.cmake" + + if [ -n "$img_num" ]; then + img_num="-${img_num}" + fi + local mcuboot_config="${ESPRESSIF_ROOT}/port/${target}/bootloader${img_num}.conf" + + if [ -n "${feature}" ]; then + mcuboot_config="${mcuboot_config};${ESPRESSIF_ROOT}/ci_configs/${feature}.conf" + build_dir=".build-${target}-${feature}" + fi + + # Build MCUboot for selected target + + cd "${MCUBOOT_ROOTDIR}" &>/dev/null + cmake -DCMAKE_TOOLCHAIN_FILE="${toolchain_file}" \ + -DMCUBOOT_TARGET="${target}" \ + -DMCUBOOT_CONFIG_FILE="${mcuboot_config}" \ + -DESP_HAL_PATH="${IDF_PATH}" \ + -B "${build_dir}" \ + "${ESPRESSIF_ROOT}" + cmake --build "${build_dir}"/ +} + +prepare_environment + +if [ -n "${MCUBOOT_FEATURES}" ]; then + IFS=',' + read -ra target_list <<< "${MCUBOOT_TARGETS}" + read img_num <<< "${MCUBOOT_IMG_NUM}" + for target in "${target_list[@]}"; do + read -ra feature_list <<< "${MCUBOOT_FEATURES}" + for feature in "${feature_list[@]}"; do + echo "Building MCUboot for \"${target}\" with support for \"${feature}\"" + build_mcuboot "${target}" "${feature}" "${img_num}" + done + done +fi diff --git a/bootloader/mcuboot/ci/fih-tests_install.sh b/bootloader/mcuboot/ci/fih-tests_install.sh new file mode 100644 index 0000000..1e78aaf --- /dev/null +++ b/bootloader/mcuboot/ci/fih-tests_install.sh @@ -0,0 +1,34 @@ +#!/bin/bash -x + +# Copyright (c) 2020 Arm Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +set -e + +source $(dirname "$0")/fih-tests_version.sh + +DOCKER_DIR=docker + +IMAGE=fih-test:$FIH_IMAGE_VERSION + +CACHED_IMAGE=$DOCKER_DIR/$IMAGE + +[[ -f $CACHED_IMAGE ]] && (gzip -dc $CACHED_IMAGE | docker load) + +if [[ $? -ne 0 ]]; then + docker pull mcuboot/$IMAGE + if [[ $GITHUB_ACTIONS != true ]]; then + docker save mcuboot/$IMAGE | gzip > $CACHED_IMAGE + fi +fi diff --git a/bootloader/mcuboot/ci/fih-tests_run.sh b/bootloader/mcuboot/ci/fih-tests_run.sh new file mode 100644 index 0000000..66357d5 --- /dev/null +++ b/bootloader/mcuboot/ci/fih-tests_run.sh @@ -0,0 +1,58 @@ +#!/bin/bash -x + +# Copyright (c) 2020-2024 Arm Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +set -e + +source $(dirname "$0")/fih-tests_version.sh + +pushd .. &&\ + git clone https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git &&\ + pushd trusted-firmware-m &&\ + git checkout eb8ff0db7d657b77abcd0262d5bf7f38eb1e1cdc &&\ + source lib/ext/tf-m-tests/version.txt &&\ + popd &&\ + git clone https://git.trustedfirmware.org/TF-M/tf-m-tests.git &&\ + pushd tf-m-tests &&\ + git checkout $version &&\ + popd + +if [[ $GITHUB_ACTIONS == true ]]; then + if [[ -z $FIH_ENV ]]; then + echo "Workflow has found no \$FIH_ENV" + exit 1 + fi + + args=($FIH_ENV) + len=${#args[@]} + if [[ $len < 3 ]]; then + echo "Invalid number of \$FIH_ENV args" + exit 1 + fi + + BUILD_TYPE=${args[0]} + SKIP_SIZE=${args[1]} + DAMAGE_TYPE=${args[2]} + + if [[ $len > 3 ]]; then + FIH_LEVEL=${args[3]} + fi +fi + +if test -z "$FIH_LEVEL"; then + docker run --rm -v $(pwd):/root/work/tfm:rw,z mcuboot/fih-test:$FIH_IMAGE_VERSION /bin/sh -c '/root/work/tfm/mcuboot/ci/fih_test_docker/execute_test.sh $0 $1 $2' $SKIP_SIZE $BUILD_TYPE $DAMAGE_TYPE +else + docker run --rm -v $(pwd):/root/work/tfm:rw,z mcuboot/fih-test:$FIH_IMAGE_VERSION /bin/sh -c '/root/work/tfm/mcuboot/ci/fih_test_docker/execute_test.sh $0 $1 $2 $3' $SKIP_SIZE $BUILD_TYPE $DAMAGE_TYPE $FIH_LEVEL +fi diff --git a/bootloader/mcuboot/ci/fih-tests_version.sh b/bootloader/mcuboot/ci/fih-tests_version.sh new file mode 100644 index 0000000..a46aae3 --- /dev/null +++ b/bootloader/mcuboot/ci/fih-tests_version.sh @@ -0,0 +1 @@ +FIH_IMAGE_VERSION=0.0.3 diff --git a/bootloader/mcuboot/ci/fih_test_docker/damage_image.py b/bootloader/mcuboot/ci/fih_test_docker/damage_image.py new file mode 100644 index 0000000..afa25b8 --- /dev/null +++ b/bootloader/mcuboot/ci/fih_test_docker/damage_image.py @@ -0,0 +1,211 @@ +# Copyright (c) 2020 Arm Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import argparse +import logging +import struct +import sys + +from imgtool.image import (IMAGE_HEADER_SIZE, IMAGE_MAGIC, + TLV_INFO_MAGIC, TLV_PROT_INFO_MAGIC, TLV_VALUES) +from shutil import copyfile + + +def get_tlv_type_string(tlv_type): + tlvs = {v: f"IMAGE_TLV_{k}" for k, v in TLV_VALUES.items()} + return tlvs.get(tlv_type, "UNKNOWN({:d})".format(tlv_type)) + + +class ImageHeader: + + def __init__(self): + self.ih_magic = 0 + self.ih_load_addr = 0 + self.ih_hdr_size = 0 + self.ih_protect_tlv_size = 0 + self.ih_img_size = 0 + self.ih_flags = 0 + self.iv_major = 0 + self.iv_minor = 0 + self.iv_revision = 0 + self.iv_build_num = 0 + self._pad1 = 0 + + @staticmethod + def read_from_binary(in_file): + h = ImageHeader() + + (h.ih_magic, h.ih_load_addr, h.ih_hdr_size, h.ih_protect_tlv_size, h.ih_img_size, + h.ih_flags, h.iv_major, h.iv_minor, h.iv_revision, h.iv_build_num, h._pad1 + ) = struct.unpack('=1.9.0 \ + Jinja2>=2.10.3 \ + PyYAML \ + pyasn1 + +# Add tfm work directory && get rid of spurious git ownership errors +RUN mkdir -p /root/work/tfm &&\ + git config --global --add safe.directory '*' + +# run the command +CMD ["bash"] diff --git a/bootloader/mcuboot/ci/fih_test_docker/docker-build/build.sh b/bootloader/mcuboot/ci/fih_test_docker/docker-build/build.sh new file mode 100644 index 0000000..d0d00b3 --- /dev/null +++ b/bootloader/mcuboot/ci/fih_test_docker/docker-build/build.sh @@ -0,0 +1,29 @@ +#!/bin/sh + +# Copyright (c) 2020 Arm Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +set -e + +trap cleanup_exit INT TERM EXIT + +cleanup_exit() +{ + rm -f *.list *.key +} + +export LANG=C + +image=mcuboot/fih-test +docker build --pull --tag=$image . diff --git a/bootloader/mcuboot/ci/fih_test_docker/execute_test.sh b/bootloader/mcuboot/ci/fih_test_docker/execute_test.sh new file mode 100644 index 0000000..cc67d84 --- /dev/null +++ b/bootloader/mcuboot/ci/fih_test_docker/execute_test.sh @@ -0,0 +1,68 @@ +#!/bin/bash -x + +# Copyright (c) 2020-2023 Arm Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +set -e + +source $(dirname "$0")/paths.sh + +SKIP_SIZE=$1 +BUILD_TYPE=$2 +DAMAGE_TYPE=$3 +FIH_LEVEL=$4 + +if test -z "$FIH_LEVEL"; then + # Use the default level + CMAKE_FIH_LEVEL="" +else + CMAKE_FIH_LEVEL="-DMCUBOOT_FIH_PROFILE=\"$FIH_LEVEL\"" +fi + +# build TF-M with MCUBoot +mkdir -p $TFM_BUILD_PATH $TFM_SPE_BUILD_PATH + +cmake -S $TFM_TESTS_PATH/tests_reg/spe \ + -B $TFM_SPE_BUILD_PATH \ + -DTFM_PLATFORM=arm/mps2/an521 \ + -DCONFIG_TFM_SOURCE_PATH=$TFM_PATH \ + -DCMAKE_BUILD_TYPE=$BUILD_TYPE \ + -DTFM_TOOLCHAIN_FILE=$TFM_PATH/toolchain_GNUARM.cmake \ + -DTEST_S=ON \ + -DTEST_NS=ON \ + -DTFM_PSA_API=ON \ + -DMCUBOOT_PATH=$MCUBOOT_PATH \ + -DMCUBOOT_LOG_LEVEL=INFO \ + $CMAKE_FIH_LEVEL +cmake --build $TFM_SPE_BUILD_PATH -- install + +cmake -S $TFM_TESTS_PATH/tests_reg \ + -B $TFM_BUILD_PATH \ + -DCONFIG_SPE_PATH=$TFM_SPE_BUILD_PATH/api_ns \ + -DCMAKE_BUILD_TYPE=$BUILD_TYPE \ + -DTFM_TOOLCHAIN_FILE=$TFM_SPE_BUILD_PATH/api_ns/cmake/toolchain_ns_GNUARM.cmake +cmake --build $TFM_BUILD_PATH + +cd $TFM_BUILD_PATH +$MCUBOOT_PATH/ci/fih_test_docker/run_fi_test.sh $BOOTLOADER_AXF_PATH $SKIP_SIZE $DAMAGE_TYPE> fih_test_output.yaml + +echo "" +echo "test finished with" +echo " - BUILD_TYPE: $BUILD_TYPE" +echo " - FIH_LEVEL: $FIH_LEVEL" +echo " - SKIP_SIZE: $SKIP_SIZE" +echo " - DAMAGE_TYPE: $DAMAGE_TYPE" + +python3 $MCUBOOT_PATH/ci/fih_test_docker/generate_test_report.py fih_test_output.yaml +python3 $MCUBOOT_PATH/ci/fih_test_docker/validate_output.py fih_test_output.yaml $SKIP_SIZE $FIH_LEVEL diff --git a/bootloader/mcuboot/ci/fih_test_docker/fi_make_manifest.sh b/bootloader/mcuboot/ci/fih_test_docker/fi_make_manifest.sh new file mode 100644 index 0000000..190a316 --- /dev/null +++ b/bootloader/mcuboot/ci/fih_test_docker/fi_make_manifest.sh @@ -0,0 +1,41 @@ +#!/bin/bash + +# Copyright (c) 2020 Arm Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +OBJDUMP=arm-none-eabi-objdump +GDB=gdb-multiarch + +# Check if the ELF file specified is compatible +if test $# -eq 0 || ! file $1 | grep "ELF" | grep "ARM" | grep "32" &>/dev/null; then + echo "Incompatible file: $1" 1>&2 + exit 1 +fi + +# Extract the full path +AXF_PATH=$(realpath $1) +#Dump all objects that have a name containing FIH_LABEL +ADDRESSES=$($OBJDUMP $AXF_PATH -t | grep "FIH_LABEL") +# strip all data except "address, label_name" +ADDRESSES=$(echo "$ADDRESSES" | sed "s/\([[:xdigit:]]*\).*\(FIH_LABEL_FIH_CALL_[a-zA-Z]*\)_.*/0x\1, \2/g") +# Sort by address in ascending order +ADDRESSES=$(echo "$ADDRESSES" | sort) +# In the case that there is a START followed by another START take the first one +ADDRESSES=$(echo "$ADDRESSES" | sed "N;s/\(.*START.*\)\n\(.*START.*\)/\1/;P;D") +# Same for END except take the second one +ADDRESSES=$(echo "$ADDRESSES" | sed "N;s/\(.*END.*\)\n\(.*END.*\)/\2/;P;D") + +# Output in CSV format with a label +echo "Address, Type" +echo "$ADDRESSES" diff --git a/bootloader/mcuboot/ci/fih_test_docker/fi_tester_gdb.sh b/bootloader/mcuboot/ci/fih_test_docker/fi_tester_gdb.sh new file mode 100644 index 0000000..ffb0bc7 --- /dev/null +++ b/bootloader/mcuboot/ci/fih_test_docker/fi_tester_gdb.sh @@ -0,0 +1,204 @@ +#!/bin/bash + +# Copyright (c) 2020-2022 Arm Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +source $(dirname "$0")/paths.sh + +function skip_instruction { + + local SKIP_ADDRESS=$1 + local SKIP_SIZE=$2 + + # Parse the ASM instruction from the address using gdb + INSTR=$($GDB $AXF_FILE --batch -ex "disassemble $SKIP_ADDRESS" | grep "^ *$SKIP_ADDRESS" | sed "s/.*:[ \t]*\(.*\)$/\1/g") + # Parse the C line from the address using gdb + LINE=$($GDB $AXF_FILE --batch -ex "info line *$SKIP_ADDRESS" | sed "s/Line \([0-9]*\).*\"\(.*\)\".*/\2:\1/g") + + # Sometimes an address is in the middle of a 4 byte instruction. In that case + # don't run the test + if test "$INSTR" == ""; then + return + fi + + # Print out the meta-info about the test, in YAML + echo "- skip_test:" + echo " addr: $SKIP_ADDRESS" + echo " asm: \"$INSTR\"" + echo " line: \"$LINE\"" + echo " skip: $SKIP_SIZE" + # echo -ne "$SKIP_ADDRESS | $INSTR...\t" + + cat >commands.gdb <&2 + + # start qemu, dump the serial output to $QEMU_LOG_FILE + QEMU_LOG_FILE=qemu.log + QEMU_PID_FILE=qemu_pid.txt + rm -f $QEMU_PID_FILE $QEMU_LOG_FILE + /usr/bin/qemu-system-arm \ + -M mps2-an521 \ + -s -S \ + -kernel $AXF_FILE \ + -device loader,file=$TFM_IMAGE_PATH,addr=0x10080000 \ + -chardev file,id=char0,path=$QEMU_LOG_FILE \ + -serial chardev:char0 \ + -display none \ + -pidfile $QEMU_PID_FILE \ + -daemonize + + # start qemu, skip the instruction, and continue execution + $GDB < ./commands.gdb &>gdb_out.txt + + # kill qemu + kill -9 `cat $QEMU_PID_FILE` + + # If "Secure image initializing" is seen the TFM booted, which means that a skip + # managed to defeat the signature check. Write out whether the image booted or + # not to the log in YAML + if cat $QEMU_LOG_FILE | grep -i "Starting bootloader" &>/dev/null; then + # bootloader started successfully + if cat gdb_out.txt | grep -i "Stopped at breakpoint" &>/dev/null; then + # The target was stopped at the desired address + if cat $QEMU_LOG_FILE | grep -i "Secure image initializing" &>/dev/null; then + echo " test_exec_ok: True" + echo " skipped: True" + echo " boot: True" + + #print the address that was skipped, and some context to the console + echo "" 1>&2 + echo "Boot success: address: $SKIP_ADDRESS skipped: $SKIP_SIZE" 1>&2 + arm-none-eabi-objdump -d $AXF_FILE --start-address=$SKIP_ADDRESS -S | tail -n +7 | head -n 14 1>&2 + echo "" 1>&2 + echo "" 1>&2 + else + LAST_LINE=`tail -n 1 $QEMU_LOG_FILE | tr -dc '[:print:]'` + echo " test_exec_ok: True" + echo " skipped: True" + echo " boot: False" + echo " last_line: \"$LAST_LINE\" " + fi + else + # The target was not stopped at the desired address. + # The most probable reason is that the instruction for that address is + # on a call path that is not taken in this run (e.g. error handling) + if cat $QEMU_LOG_FILE | grep -i "Secure image initializing" &>/dev/null; then + # The image booted, although it shouldn't happen as the test is to + # be run with a corrupt image. + echo " test_exec_ok: False" + echo " test_exec_fail_reason: \"No instructions were skipped (e.g. branch was not executed), but booted successfully\"" + else + # the execution didn't stop at the address (e.g. the instruction + # is on a branch that is not taken) + echo " test_exec_ok: True" + echo " skipped: False" + fi + fi + else + # failed before the first printout + echo " test_exec_ok: True" + echo " skipped: True" + echo " boot: False" + echo " last_line: 'N/A' " + fi +} + +# Inform how the script is used +usage() { + echo "$0 [] [(-s | --skip) ]" +} + +#defaults +SKIP=2 +AXF_FILE=${BOOTLOADER_AXF_PATH} +GDB=gdb-multiarch +BOOTLOADER=true + +# Parse arguments +while [[ $# -gt 0 ]]; do + case $1 in + -s|--skip) + SKIP="$2" + shift + shift + ;; + -h|--help) + usage + exit 0 + ;; + *) + if test -z "$IMAGE_DIR"; then + IMAGE_DIR=$1 + elif test -z "$START"; then + START=$1 + elif test -z "$END"; then + END=$1 + else + usage + exit 1 + fi + shift + ;; + esac +done + +# Check that image directory, start and end address have been supplied +if test -z "$IMAGE_DIR"; then + usage + exit 2 +fi + +if test -z "$START"; then + usage + exit 2 +fi + +if test -z "$END"; then + END=$START +fi + +if test -z "$SKIP"; then + SKIP='2' +fi + +# Create the start-end address range (step 2) +ADDRS=$(printf '0x%x\n' $(seq "$START" 2 "$END")) + +# For each address run the skip_instruction function on it +for ADDR in $ADDRS; do + skip_instruction $ADDR $SKIP +done diff --git a/bootloader/mcuboot/ci/fih_test_docker/generate_test_report.py b/bootloader/mcuboot/ci/fih_test_docker/generate_test_report.py new file mode 100644 index 0000000..2d68949 --- /dev/null +++ b/bootloader/mcuboot/ci/fih_test_docker/generate_test_report.py @@ -0,0 +1,47 @@ +# Copyright (c) 2020-2023 Arm Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import argparse +from utils import CATEGORIES, parse_yaml_file + + +def print_results(results): + + test_stats, failed_boot_last_lines, exec_fail_reasons = results + + print("{:s}: {:d}.".format(CATEGORIES['TOTAL'], test_stats[CATEGORIES['TOTAL']])) + print("{:s} ({:d}):".format(CATEGORIES['SUCCESS'], test_stats[CATEGORIES['SUCCESS']])) + print(" {:s}: ({:d}):".format(CATEGORIES['ADDRES_NOEXEC'], test_stats[CATEGORIES['ADDRES_NOEXEC']])) + test_with_skip = test_stats[CATEGORIES['SUCCESS']] - test_stats[CATEGORIES['ADDRES_NOEXEC']] + print(" {:s}: ({:d}):".format(CATEGORIES['SKIPPED'], test_with_skip)) + print(" {:s} ({:d}):".format(CATEGORIES['NO_BOOT'], test_with_skip - test_stats[CATEGORIES['BOOT']])) + for last_line in failed_boot_last_lines.keys(): + print(" last line: {:s} ({:d})".format(last_line, failed_boot_last_lines[last_line])) + print(" {:s} ({:d})".format(CATEGORIES['BOOT'], test_stats[CATEGORIES['BOOT']])) + print("{:s} ({:d}):".format(CATEGORIES['FAILED'], test_stats[CATEGORIES['TOTAL']] - test_stats[CATEGORIES['SUCCESS']])) + for reason in exec_fail_reasons.keys(): + print(" {:s} ({:d})".format(reason, exec_fail_reasons[reason])) + + +def main(): + parser = argparse.ArgumentParser(description='''Process a FIH test output yaml file, and output a human readable report''') + parser.add_argument('filename', help='yaml file to process') + + args = parser.parse_args() + results = parse_yaml_file(args.filename) + print_results(results) + + +if __name__ == "__main__": + main() diff --git a/bootloader/mcuboot/ci/fih_test_docker/paths.sh b/bootloader/mcuboot/ci/fih_test_docker/paths.sh new file mode 100644 index 0000000..6afeab7 --- /dev/null +++ b/bootloader/mcuboot/ci/fih_test_docker/paths.sh @@ -0,0 +1,10 @@ +WORK_PATH=/root/work/tfm +MCUBOOT_PATH=$WORK_PATH/mcuboot +TFM_PATH=$WORK_PATH/trusted-firmware-m +TFM_TESTS_PATH=$WORK_PATH/tf-m-tests +TFM_SPE_BUILD_PATH=$TFM_PATH/build_spe +TFM_BUILD_PATH=$TFM_PATH/build +BOOTLOADER_AXF_PATH=$TFM_SPE_BUILD_PATH/bin/bl2.axf +TFM_IMAGE_NAME=tfm_s_ns_signed.bin +TFM_IMAGE_OUTPUT_PATH=$TFM_BUILD_PATH +TFM_IMAGE_PATH=$TFM_IMAGE_OUTPUT_PATH/$TFM_IMAGE_NAME diff --git a/bootloader/mcuboot/ci/fih_test_docker/run_fi_test.sh b/bootloader/mcuboot/ci/fih_test_docker/run_fi_test.sh new file mode 100644 index 0000000..5bf884c --- /dev/null +++ b/bootloader/mcuboot/ci/fih_test_docker/run_fi_test.sh @@ -0,0 +1,88 @@ +#!/bin/bash + +# Copyright (c) 2020 Arm Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +set -e + +# Get the dir this is running in and the dir the script is in. +PWD=$(pwd) +DIR=$( cd "$( dirname "${BASH_SOURCE[0]}" )" >/dev/null 2>&1 && pwd ) + +# PAD is the amount of extra instructions that should be tested on each side of +# the critical region +PAD=6 + +MCUBOOT_AXF=$1 +SKIP_SIZES=$2 +DAMAGE_TYPE=$3 + +source $(dirname "$0")/paths.sh + +# Take an image and make it unbootable. This is done by replacing one of the +# strings in the image with a different string. This causes the signature check +# to fail +function damage_image +{ + local IMAGE_NAME=${TFM_IMAGE_NAME} + local BACKUP_IMAGE_NAME=${TFM_IMAGE_NAME}.orig + local IMAGE=$TFM_IMAGE_OUTPUT_PATH/$IMAGE_NAME + mv $IMAGE $TFM_IMAGE_OUTPUT_PATH/$BACKUP_IMAGE_NAME + + if [ "$DAMAGE_TYPE" = "SIGNATURE" ]; then + DAMAGE_PARAM="--signature" + elif [ "$DAMAGE_TYPE" = "IMAGE_HASH" ]; then + DAMAGE_PARAM="--image-hash" + else + echo "Failed to damage image $IMAGE with param $DAMAGE_TYPE" 1>&2 + exit -1 + fi + + python3 $DIR/damage_image.py -i $TFM_IMAGE_OUTPUT_PATH/$BACKUP_IMAGE_NAME -o $IMAGE $DAMAGE_PARAM 1>&2 +} + +function run_test +{ + local SKIP_SIZE=$1 + + $DIR/fi_make_manifest.sh $MCUBOOT_AXF > $PWD/fih_manifest.csv + + # Load the CSV FI manifest file, and output in START, END lines. Effectively + # join START and END lines together with a comma seperator. + REGIONS=$(sed "N;s/\(0x[[:xdigit:]]*\).*START\n\(0x[[:xdigit:]]*\).*END.*/\1,\2/g;P;D" $PWD/fih_manifest.csv) + # Ignore the first line, which includes the CSV header + REGIONS=$(echo "$REGIONS" | tail -n+2) + + for REGION in $REGIONS; do + #Split the START,END pairs into the two variables + START=$(echo $REGION | cut -d"," -f 1) + END=$(echo $REGION | cut -d"," -f 2) + + # Apply padding, converting back to hex + START=$(printf "0x%X" $((START - PAD))) + END=$(printf "0x%X" $((END + PAD))) + + # Invoke the fi tester script + $DIR/fi_tester_gdb.sh $TFM_IMAGE_OUTPUT_PATH $START $END --skip $SKIP_SIZE + done +} + +damage_image $MCUBOOT_AXF +# Run the run_test function with each skip length between min and max in turn. + +IFS=', ' read -r -a sizes <<< "$SKIP_SIZES" +for size in "${sizes[@]}"; do + echo "Run tests with skip size $size" 1>&2 + run_test $size +done diff --git a/bootloader/mcuboot/ci/fih_test_docker/utils.py b/bootloader/mcuboot/ci/fih_test_docker/utils.py new file mode 100644 index 0000000..cd58f28 --- /dev/null +++ b/bootloader/mcuboot/ci/fih_test_docker/utils.py @@ -0,0 +1,63 @@ +# Copyright (c) 2023 Arm Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import collections +import yaml + +CATEGORIES = { + 'TOTAL': 'Total tests run', + 'SUCCESS': 'Tests executed successfully', + 'FAILED': 'Tests failed to execute successfully', + # the execution never reached the address + 'ADDRES_NOEXEC': 'Address was not executed', + # The address was successfully skipped by the debugger + 'SKIPPED': 'Address was skipped', + 'NO_BOOT': 'System not booted (desired behaviour)', + 'BOOT': 'System booted (undesired behaviour)' +} + + +def parse_yaml_file(filepath): + with open(filepath) as f: + results = yaml.safe_load(f) + + if not results: + raise ValueError("Failed to parse output yaml file.") + + test_stats = collections.Counter() + failed_boot_last_lines = collections.Counter() + exec_fail_reasons = collections.Counter() + + for test in results: + test = test["skip_test"] + + test_stats.update([CATEGORIES['TOTAL']]) + + if test["test_exec_ok"]: + test_stats.update([CATEGORIES['SUCCESS']]) + + if "skipped" in test.keys() and not test["skipped"]: + # The debugger didn't stop at this address + test_stats.update([CATEGORIES['ADDRES_NOEXEC']]) + continue + + if test["boot"]: + test_stats.update([CATEGORIES['BOOT']]) + continue + + failed_boot_last_lines.update([test["last_line"]]) + else: + exec_fail_reasons.update([test["test_exec_fail_reason"]]) + + return test_stats, failed_boot_last_lines, exec_fail_reasons diff --git a/bootloader/mcuboot/ci/fih_test_docker/validate_output.py b/bootloader/mcuboot/ci/fih_test_docker/validate_output.py new file mode 100644 index 0000000..7c334ba --- /dev/null +++ b/bootloader/mcuboot/ci/fih_test_docker/validate_output.py @@ -0,0 +1,39 @@ +# Copyright (c) 2023 Arm Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import argparse +from utils import CATEGORIES, parse_yaml_file + + +def validate_output(test_stats, skip_size, fih_level): + if (test_stats[CATEGORIES['BOOT']] > 0 + and skip_size == "2,4,6" and fih_level == "MEDIUM"): + raise ValueError("The number of sucessful boots was more than zero") + + +def main(): + parser = argparse.ArgumentParser(description='''Process a FIH test output yaml file, + and validate no sucessfull boots have happened''') + parser.add_argument('filename', help='yaml file to process') + parser.add_argument('skip_size', help='instruction skip size') + parser.add_argument('fih_level', nargs="?", + help='fault injection hardening level') + + args = parser.parse_args() + test_stats = parse_yaml_file(args.filename)[0] + validate_output(test_stats, args.skip_size, args.fih_level) + + +if __name__ == "__main__": + main() diff --git a/bootloader/mcuboot/ci/get_features.py b/bootloader/mcuboot/ci/get_features.py new file mode 100644 index 0000000..50da557 --- /dev/null +++ b/bootloader/mcuboot/ci/get_features.py @@ -0,0 +1,43 @@ +#!/usr/bin/env python3 + +# Copyright 2020 JUUL Labs +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import argparse +import os.path +try: + import tomllib +except ModuleNotFoundError: + import tomli as tomllib + +parser = argparse.ArgumentParser(description='Print features from a Cargo.toml.') +parser.add_argument('infile', help='Input file to parse') + +args = parser.parse_args() +if not os.path.isfile(args.infile): + print("File not found") + exit(1) + +try: + cargo_toml = open(args.infile).read() +except Exception: + print("Error reading \"{}\"".format(args.infile)) + exit(1) + +config = tomllib.loads(cargo_toml) +if 'features' not in config: + print("Missing \"[features]\" section") + exit(1) + +print(" ".join([k for k in config['features'] if k != 'default'])) diff --git a/bootloader/mcuboot/ci/imgtool_install.sh b/bootloader/mcuboot/ci/imgtool_install.sh new file mode 100644 index 0000000..66b44cf --- /dev/null +++ b/bootloader/mcuboot/ci/imgtool_install.sh @@ -0,0 +1,23 @@ +#!/bin/bash -x + +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +if [[ $TRAVIS == "true" ]]; then + if [[ $TRAVIS_PULL_REQUEST != "false" || $TRAVIS_BRANCH != "main" ]]; then + echo "Either a PR or not \"main\" branch, exiting" + exit 0 + fi +fi + +pip install setuptools twine packaging wheel +pip install --pre imgtool diff --git a/bootloader/mcuboot/ci/imgtool_run.sh b/bootloader/mcuboot/ci/imgtool_run.sh new file mode 100644 index 0000000..97f0b21 --- /dev/null +++ b/bootloader/mcuboot/ci/imgtool_run.sh @@ -0,0 +1,53 @@ +#!/bin/bash -x + +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +if [[ $TRAVIS == "true" ]]; then + if [[ $TRAVIS_PULL_REQUEST != "false" || $TRAVIS_BRANCH != "main" ]]; then + echo "Either a PR or not \"main\" branch, exiting" + exit 0 + fi +fi + +IMGTOOL_VER_PREFIX="\+imgtool_version = " +IMGTOOL_VER_FILE="imgtool/__init__.py" +DIST_DIR="dist" + +if [[ -z "$TWINE_TOKEN" ]]; then + echo "\$TWINE_TOKEN must be set in Travis or GH settings" + exit 0 +fi + +cd scripts/ + +last_release=$(pip show imgtool | grep "Version: " | cut -d" " -f2) +repo_version=$(grep "imgtool_version = " imgtool/__init__.py | sed 's/^.* = "\(.*\)"/\1/g') + +python ../ci/compare_versions.py --old $last_release --new $repo_version +rc=$? + +if [[ $rc -eq 0 ]]; then + echo "Imgtool version not changed; will not publish" + exit 0 +elif [[ $rc -eq 1 ]]; then + echo "Error parsing versions" + exit 1 +elif [[ $rc -eq 3 ]]; then + echo "Imgtool downgrade detected!" + exit 1 +fi + +rm -rf $DIST_DIR +python setup.py sdist bdist_wheel + +twine upload --username __token__ --password "${TWINE_TOKEN}" "${DIST_DIR}/*" diff --git a/bootloader/mcuboot/ci/mynewt_install.sh b/bootloader/mcuboot/ci/mynewt_install.sh new file mode 100644 index 0000000..3ce73a4 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_install.sh @@ -0,0 +1,83 @@ +#!/bin/bash -x + +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. + +install_newt() { + pushd $HOME + git clone --depth=1 https://github.com/apache/mynewt-newt + [[ $? -ne 0 ]] && exit 1 + + pushd mynewt-newt && ./build.sh + [[ $? -ne 0 ]] && exit 1 + + cp newt/newt $HOME/bin + popd + popd +} + +shallow_clone_mynewt() { + mkdir -p repos/apache-mynewt-core + git clone --depth=1 https://github.com/apache/mynewt-core repos/apache-mynewt-core + [[ $? -ne 0 ]] && exit 1 + + # nrfx is now taken from original repository + git clone --depth=1 --branch v3.3.0 https://github.com/NordicSemiconductor/nrfx.git repos/nordic-nrfx + [[ $? -ne 0 ]] && exit 1 + + # Mbed-TLS is now taken from original repository + git clone --depth=1 --branch v2.28.4 https://github.com/Mbed-TLS/mbedtls.git repos/mbedtls + [[ $? -ne 0 ]] && exit 1 + + # CMSIS is now taken from original repository + git clone --depth=1 --branch 5.4.0 https://github.com/ARM-software/CMSIS_5.git repos/arm-CMSIS_5 + [[ $? -ne 0 ]] && exit 1 +} + +arm_toolchain_install() { + TOOLCHAIN_PATH=$HOME/TOOLCHAIN + + GCC_URL=https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2017q4/gcc-arm-none-eabi-7-2017-q4-major-linux.tar.bz2 + GCC_BASE=gcc-arm-none-eabi-7-2017-q4-major + + mkdir -p $TOOLCHAIN_PATH + + if [ ! -s ${TOOLCHAIN_PATH}/$GCC_BASE/bin/arm-none-eabi-gcc ]; then + wget -O ${TOOLCHAIN_PATH}/${GCC_BASE}.tar.bz2 $GCC_URL + [[ $? -ne 0 ]] && exit 1 + + tar xfj ${TOOLCHAIN_PATH}/${GCC_BASE}.tar.bz2 -C $TOOLCHAIN_PATH + fi + + for i in ${TOOLCHAIN_PATH}/${GCC_BASE}/bin/arm-none-eabi-* ; do + rm -f $HOME/bin/${i##*/} + ln -s $i $HOME/bin/${i##*/} + done +} + +native_test_setup() { + sudo apt-get update + sudo apt-get install -y gcc-multilib +} + +mkdir -p $HOME/bin +export PATH=$HOME/bin:$PATH + +install_newt +shallow_clone_mynewt +arm_toolchain_install +native_test_setup diff --git a/bootloader/mcuboot/ci/mynewt_keys/enc_kw/pkg.yml b/bootloader/mcuboot/ci/mynewt_keys/enc_kw/pkg.yml new file mode 100644 index 0000000..0e993a4 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_keys/enc_kw/pkg.yml @@ -0,0 +1,22 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: keys/enc_kw +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" diff --git a/bootloader/mcuboot/ci/mynewt_keys/enc_kw/src/keys.c b/bootloader/mcuboot/ci/mynewt_keys/enc_kw/src/keys.c new file mode 100644 index 0000000..ae4c5c7 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_keys/enc_kw/src/keys.c @@ -0,0 +1,30 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include +#include +unsigned char enc_key[] = { + 0x96, 0x69, 0xd2, 0xcf, 0x0e, 0xb1, 0xc6, 0x56, 0xf2, 0xa0, 0x1f, 0x46, + 0x06, 0xd3, 0x49, 0x31, +}; +static unsigned int enc_key_len = 16; +const struct bootutil_key bootutil_enc_key = { + .key = enc_key, + .len = &enc_key_len, +}; diff --git a/bootloader/mcuboot/ci/mynewt_keys/enc_rsa/pkg.yml b/bootloader/mcuboot/ci/mynewt_keys/enc_rsa/pkg.yml new file mode 100644 index 0000000..61918f1 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_keys/enc_rsa/pkg.yml @@ -0,0 +1,25 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: keys/enc_rsa +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" + +pkg.cflags: + - '-DMBEDTLS_USER_CONFIG_FILE="mbedtls/config_mynewt.h"' diff --git a/bootloader/mcuboot/ci/mynewt_keys/enc_rsa/src/keys.c b/bootloader/mcuboot/ci/mynewt_keys/enc_rsa/src/keys.c new file mode 100644 index 0000000..201d6ad --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_keys/enc_rsa/src/keys.c @@ -0,0 +1,128 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include +#include +unsigned char enc_key[] = { + 0x30, 0x82, 0x04, 0xa4, 0x02, 0x01, 0x00, 0x02, 0x82, 0x01, 0x01, 0x00, + 0xb4, 0x26, 0x14, 0x49, 0x3d, 0x16, 0x13, 0x3a, 0x6d, 0x9c, 0x84, 0xa9, + 0x8b, 0x6a, 0x10, 0x20, 0x61, 0xef, 0x48, 0x04, 0xa4, 0x4b, 0x24, 0xf3, + 0x00, 0x32, 0xac, 0x22, 0xe0, 0x30, 0x27, 0x70, 0x18, 0xe5, 0x55, 0xc8, + 0xb8, 0x05, 0x34, 0x03, 0xb0, 0xf8, 0xa5, 0x96, 0xd2, 0x48, 0x58, 0xef, + 0x70, 0xb0, 0x09, 0xdb, 0xe3, 0x58, 0x62, 0xef, 0x99, 0x63, 0x01, 0xb2, + 0x89, 0xc4, 0xb3, 0xf6, 0x9e, 0x62, 0xbf, 0x4d, 0xc2, 0x8a, 0xd0, 0xc9, + 0x4d, 0x43, 0xa3, 0xd8, 0xe5, 0x1d, 0xec, 0x62, 0x63, 0x08, 0xe2, 0x20, + 0xa5, 0xfc, 0x78, 0xd0, 0x3e, 0x74, 0xc8, 0xa4, 0x1b, 0x36, 0xad, 0x7b, + 0xf5, 0x06, 0xae, 0x4d, 0x51, 0x9b, 0x40, 0xce, 0x30, 0x4f, 0x6c, 0xea, + 0xf9, 0xe9, 0x74, 0xea, 0x06, 0xee, 0x9c, 0xe4, 0x14, 0x68, 0x20, 0xb9, + 0x3d, 0xe7, 0x11, 0x14, 0x8b, 0x25, 0xa3, 0xff, 0x4c, 0x8a, 0xf3, 0x53, + 0xee, 0x6b, 0x3e, 0xef, 0x34, 0xcd, 0x6a, 0x3f, 0x62, 0x68, 0xc0, 0xff, + 0x78, 0x4c, 0xb0, 0xc3, 0xe6, 0x96, 0x61, 0xfc, 0x1f, 0x18, 0xf1, 0x7a, + 0x82, 0xe2, 0x8f, 0x35, 0xa8, 0x2b, 0x86, 0x16, 0xa4, 0x46, 0xfb, 0xac, + 0x7e, 0x41, 0xdb, 0x02, 0x05, 0x91, 0x6d, 0xdf, 0xc1, 0xde, 0x13, 0x95, + 0x9c, 0xf9, 0x9e, 0x5e, 0x72, 0xba, 0xa7, 0x25, 0x93, 0xfb, 0xdc, 0xe8, + 0xab, 0x86, 0x45, 0x88, 0x47, 0x2d, 0xed, 0xee, 0xee, 0x97, 0x9e, 0xce, + 0x5d, 0x9b, 0x04, 0x04, 0x40, 0x7c, 0xcb, 0x7c, 0x3d, 0x2c, 0x74, 0xab, + 0xa4, 0xcc, 0x64, 0xa3, 0x5c, 0x95, 0x3d, 0xd4, 0xa2, 0xdc, 0x92, 0xb2, + 0xc8, 0x18, 0xcb, 0xf9, 0x00, 0x39, 0x81, 0x8f, 0x8f, 0x40, 0xc2, 0xdf, + 0x99, 0x29, 0xac, 0x8a, 0xc2, 0x3b, 0xd8, 0xa4, 0xf2, 0xad, 0xaf, 0x74, + 0xc0, 0x11, 0xc7, 0x99, 0x02, 0x03, 0x01, 0x00, 0x01, 0x02, 0x82, 0x01, + 0x00, 0x42, 0x47, 0x80, 0x4f, 0x31, 0xda, 0x5d, 0x58, 0xb1, 0xdb, 0x54, + 0x33, 0xcc, 0xc7, 0x49, 0x07, 0xa1, 0x00, 0x98, 0x4e, 0x9c, 0xe3, 0xc8, + 0xc4, 0x5e, 0xde, 0x45, 0xd6, 0xcf, 0x04, 0xe8, 0x7d, 0xa5, 0xab, 0x3a, + 0xd4, 0x8e, 0x5f, 0xdb, 0xb3, 0x3f, 0xf9, 0x3b, 0x73, 0x32, 0x0a, 0xcc, + 0x2d, 0xcc, 0x17, 0xf8, 0x88, 0x9e, 0x2c, 0x76, 0xba, 0x10, 0x85, 0x0c, + 0xaa, 0xd3, 0x65, 0x3b, 0x91, 0x10, 0xd4, 0xe3, 0xed, 0x88, 0x15, 0xea, + 0x9b, 0x25, 0x82, 0x2d, 0x56, 0x2f, 0x75, 0xc2, 0xf2, 0xaf, 0xdd, 0x24, + 0xd5, 0x3e, 0x3c, 0x95, 0x76, 0x88, 0x84, 0x0f, 0x0d, 0xd1, 0xb5, 0x5c, + 0x3e, 0xae, 0xf7, 0xb6, 0x49, 0x5c, 0x2c, 0xf2, 0xba, 0xe9, 0xab, 0x4f, + 0x37, 0x64, 0x9b, 0x30, 0x18, 0xaa, 0x54, 0x40, 0x04, 0xea, 0x3d, 0x25, + 0x4d, 0x02, 0x29, 0x71, 0x6f, 0x4d, 0x82, 0x9b, 0xc3, 0x44, 0x2a, 0x9d, + 0x0c, 0x98, 0xd3, 0xc8, 0x15, 0x0d, 0x04, 0x93, 0x60, 0x30, 0xc7, 0x5e, + 0x79, 0xea, 0x53, 0x9d, 0xc0, 0x0e, 0x81, 0xac, 0x90, 0xbc, 0x9e, 0x1e, + 0xd2, 0x28, 0x0f, 0x10, 0xf5, 0x1f, 0xdf, 0x38, 0x7f, 0x8a, 0x90, 0x8d, + 0x49, 0x07, 0x7d, 0x78, 0xcb, 0xa7, 0xef, 0x92, 0x6d, 0x3b, 0x13, 0x95, + 0x9b, 0xba, 0x83, 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0x38, 0xd6, 0xeb, 0xe6, 0x22, 0x65, 0xc4, 0xaa, 0x4c, + 0xc8, 0xd0, 0x33, 0x1a, 0x1e, 0xbe, 0xbd, 0x73, 0x09, 0x4a, 0xfa, 0x85, + 0x5c, 0xf3, 0x0c, 0x9c, 0x81, 0x56, 0x30, 0xa7, 0xf7, 0x9b, 0xf4, 0x92, + 0x9c, 0x6b, 0x93, 0x6a, 0x00, 0x33, 0xdc, 0x2f, 0x54, 0x1e, 0x78, 0xd4, + 0x97, 0xec, 0x24, 0xa2, 0xdb, 0x3d, 0x03, 0x33, 0x09, 0xb2, 0x2c, 0x03, + 0x05, 0x40, 0xde, 0x52, 0xf2, 0x9b, 0xfa, 0x00, 0x8d, 0x4b, 0xfe, 0x5b, + 0x9b, 0x9c, 0x73, 0xad, 0xfb, 0x7a, 0x00, 0x42, 0x62, 0x9e, 0xa0, 0x95, + 0x55, 0x50, 0x32, 0x87 +}; +static unsigned int enc_key_len = 1192; +const struct bootutil_key bootutil_enc_key = { + .key = enc_key, + .len = &enc_key_len, +}; diff --git a/bootloader/mcuboot/ci/mynewt_run.sh b/bootloader/mcuboot/ci/mynewt_run.sh new file mode 100644 index 0000000..6639662 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_run.sh @@ -0,0 +1,33 @@ +#!/bin/bash -x + +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. + +export PATH=$HOME/bin:$PATH +pwd + +for target in $(ls ci/mynewt_targets); do + newt build $target + [[ $? -ne 0 ]] && exit 1 +done + +mkdir targets +cp -r repos/apache-mynewt-core/targets/unittest targets +newt test boot/boot_serial +[[ $? -ne 0 ]] && exit 1 + +exit 0 diff --git a/bootloader/mcuboot/ci/mynewt_targets/basic/pkg.yml b/bootloader/mcuboot/ci/mynewt_targets/basic/pkg.yml new file mode 100644 index 0000000..736f278 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/basic/pkg.yml @@ -0,0 +1,27 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: "targets/basic" +pkg.type: "target" +pkg.description: +pkg.author: +pkg.homepage: + +pkg.deps: + - "@mcuboot/boot/mynewt" diff --git a/bootloader/mcuboot/ci/mynewt_targets/basic/syscfg.yml b/bootloader/mcuboot/ci/mynewt_targets/basic/syscfg.yml new file mode 100644 index 0000000..e404468 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/basic/syscfg.yml @@ -0,0 +1,45 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +syscfg.vals: + BOOT_SERIAL: 0 + BOOT_SERIAL_DETECT_PIN: 11 + BOOT_SERIAL_DETECT_PIN_VAL: 0 + BOOT_SERIAL_REPORT_PIN: 13 + BOOTUTIL_VALIDATE_SLOT0: 0 + BOOTUTIL_MAX_IMG_SECTORS: 256 + BOOTUTIL_SIGN_EC256: 0 + BOOTUTIL_SIGN_RSA: 0 + BOOTUTIL_ENCRYPT_RSA: 0 + BOOTUTIL_ENCRYPT_KW: 0 + BOOTUTIL_USE_MBED_TLS: 0 + BOOTUTIL_USE_TINYCRYPT: 1 + BOOTUTIL_OVERWRITE_ONLY: 0 + BOOTUTIL_OVERWRITE_ONLY_FAST: 1 + BOOTUTIL_HAVE_LOGGING: 0 + BOOTUTIL_NO_LOGGING: 1 + BOOTUTIL_LOG_LEVEL: 'BOOTUTIL_LOG_LEVEL_INFO' + CONSOLE_COMPAT: 1 + CONSOLE_INPUT: 0 + CONSOLE_UART: 0 + CONSOLE_RTT: 0 + OS_CPUTIME_TIMER_NUM: 0 + TIMER_0: 1 + UART_0: 0 + BOOTUTIL_BOOTSTRAP: 0 + MBEDTLS_NIST_KW_C: 0 diff --git a/bootloader/mcuboot/ci/mynewt_targets/basic/target.yml b/bootloader/mcuboot/ci/mynewt_targets/basic/target.yml new file mode 100644 index 0000000..6cb85a9 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/basic/target.yml @@ -0,0 +1,22 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +target.app: "@mcuboot/boot/mynewt" +target.bsp: "@apache-mynewt-core/hw/bsp/nordic_pca10056" +target.build_profile: "optimized" diff --git a/bootloader/mcuboot/ci/mynewt_targets/bootserial/pkg.yml b/bootloader/mcuboot/ci/mynewt_targets/bootserial/pkg.yml new file mode 100644 index 0000000..b7dd9e2 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/bootserial/pkg.yml @@ -0,0 +1,27 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: "targets/bootserial" +pkg.type: "target" +pkg.description: +pkg.author: +pkg.homepage: + +pkg.deps: + - "@mcuboot/boot/mynewt" diff --git a/bootloader/mcuboot/ci/mynewt_targets/bootserial/syscfg.yml b/bootloader/mcuboot/ci/mynewt_targets/bootserial/syscfg.yml new file mode 100644 index 0000000..304cca5 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/bootserial/syscfg.yml @@ -0,0 +1,24 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +$import: + - '@mcuboot/ci/mynewt_targets/basic/syscfg.yml' + +syscfg.vals: + BOOT_SERIAL: 1 + UART_0: 1 diff --git a/bootloader/mcuboot/ci/mynewt_targets/bootserial/target.yml b/bootloader/mcuboot/ci/mynewt_targets/bootserial/target.yml new file mode 100644 index 0000000..6cb85a9 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/bootserial/target.yml @@ -0,0 +1,22 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +target.app: "@mcuboot/boot/mynewt" +target.bsp: "@apache-mynewt-core/hw/bsp/nordic_pca10056" +target.build_profile: "optimized" diff --git a/bootloader/mcuboot/ci/mynewt_targets/ecdsa/pkg.yml b/bootloader/mcuboot/ci/mynewt_targets/ecdsa/pkg.yml new file mode 100644 index 0000000..81bc2b4 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/ecdsa/pkg.yml @@ -0,0 +1,27 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: "targets/ecdsa" +pkg.type: "target" +pkg.description: +pkg.author: +pkg.homepage: + +pkg.deps: + - "@mcuboot/boot/mynewt" diff --git a/bootloader/mcuboot/ci/mynewt_targets/ecdsa/syscfg.yml b/bootloader/mcuboot/ci/mynewt_targets/ecdsa/syscfg.yml new file mode 100644 index 0000000..5162df8 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/ecdsa/syscfg.yml @@ -0,0 +1,24 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +$import: + - '@mcuboot/ci/mynewt_targets/basic/syscfg.yml' + +syscfg.vals: + BOOTUTIL_VALIDATE_SLOT0: 1 + BOOTUTIL_SIGN_EC256: 1 diff --git a/bootloader/mcuboot/ci/mynewt_targets/ecdsa/target.yml b/bootloader/mcuboot/ci/mynewt_targets/ecdsa/target.yml new file mode 100644 index 0000000..ac122f8 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/ecdsa/target.yml @@ -0,0 +1,23 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +target.app: "@mcuboot/boot/mynewt" +target.bsp: "@apache-mynewt-core/hw/bsp/nordic_pca10056" +target.build_profile: "optimized" +target.key_file: "@mcuboot/root-ec-p256.pem" diff --git a/bootloader/mcuboot/ci/mynewt_targets/ecdsa_kw/pkg.yml b/bootloader/mcuboot/ci/mynewt_targets/ecdsa_kw/pkg.yml new file mode 100644 index 0000000..d56caeb --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/ecdsa_kw/pkg.yml @@ -0,0 +1,28 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: "targets/ecdsa_kw" +pkg.type: "target" +pkg.description: +pkg.author: +pkg.homepage: + +pkg.deps: + - "@mcuboot/boot/mynewt" + - "@mcuboot/keys/enc_kw" diff --git a/bootloader/mcuboot/ci/mynewt_targets/ecdsa_kw/syscfg.yml b/bootloader/mcuboot/ci/mynewt_targets/ecdsa_kw/syscfg.yml new file mode 100644 index 0000000..6065e56 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/ecdsa_kw/syscfg.yml @@ -0,0 +1,25 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +$import: + - '@mcuboot/ci/mynewt_targets/basic/syscfg.yml' + +syscfg.vals: + BOOTUTIL_VALIDATE_SLOT0: 1 + BOOTUTIL_SIGN_EC256: 1 + BOOTUTIL_ENCRYPT_KW: 1 diff --git a/bootloader/mcuboot/ci/mynewt_targets/ecdsa_kw/target.yml b/bootloader/mcuboot/ci/mynewt_targets/ecdsa_kw/target.yml new file mode 100644 index 0000000..ac122f8 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/ecdsa_kw/target.yml @@ -0,0 +1,23 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +target.app: "@mcuboot/boot/mynewt" +target.bsp: "@apache-mynewt-core/hw/bsp/nordic_pca10056" +target.build_profile: "optimized" +target.key_file: "@mcuboot/root-ec-p256.pem" diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa/pkg.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa/pkg.yml new file mode 100644 index 0000000..8e3264c --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa/pkg.yml @@ -0,0 +1,27 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: "targets/rsa" +pkg.type: "target" +pkg.description: +pkg.author: +pkg.homepage: + +pkg.deps: + - "@mcuboot/boot/mynewt" diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa/syscfg.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa/syscfg.yml new file mode 100644 index 0000000..b40d0ab --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa/syscfg.yml @@ -0,0 +1,27 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +$import: + - '@mcuboot/ci/mynewt_targets/basic/syscfg.yml' + +syscfg.vals: + BOOTUTIL_VALIDATE_SLOT0: 1 + BOOTUTIL_SIGN_EC256: 0 + BOOTUTIL_SIGN_RSA: 1 + BOOTUTIL_USE_MBED_TLS: 1 + BOOTUTIL_USE_TINYCRYPT: 0 diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa/target.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa/target.yml new file mode 100644 index 0000000..cbfc8c7 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa/target.yml @@ -0,0 +1,23 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +target.app: "@mcuboot/boot/mynewt" +target.bsp: "@apache-mynewt-core/hw/bsp/nordic_pca10056" +target.build_profile: "optimized" +target.key_file: "@mcuboot/root-rsa-2048.pem" diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_kw/pkg.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_kw/pkg.yml new file mode 100644 index 0000000..99af67b --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_kw/pkg.yml @@ -0,0 +1,28 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: "targets/rsa_kw" +pkg.type: "target" +pkg.description: +pkg.author: +pkg.homepage: + +pkg.deps: + - "@mcuboot/boot/mynewt" + - "@mcuboot/keys/enc_kw" diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_kw/syscfg.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_kw/syscfg.yml new file mode 100644 index 0000000..97dfcb6 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_kw/syscfg.yml @@ -0,0 +1,30 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +$import: + - '@mcuboot/ci/mynewt_targets/basic/syscfg.yml' + +syscfg.vals: + BOOTUTIL_VALIDATE_SLOT0: 1 + BOOTUTIL_SIGN_EC256: 0 + BOOTUTIL_SIGN_RSA: 1 + BOOTUTIL_USE_MBED_TLS: 1 + BOOTUTIL_USE_TINYCRYPT: 0 + BOOTUTIL_ENCRYPT_KW: 1 + MBEDTLS_NIST_KW_C: 1 + MBEDTLS_CIPHER_MODE_CTR: 1 diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_kw/target.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_kw/target.yml new file mode 100644 index 0000000..cbfc8c7 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_kw/target.yml @@ -0,0 +1,23 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +target.app: "@mcuboot/boot/mynewt" +target.bsp: "@apache-mynewt-core/hw/bsp/nordic_pca10056" +target.build_profile: "optimized" +target.key_file: "@mcuboot/root-rsa-2048.pem" diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_overwriteonly/pkg.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_overwriteonly/pkg.yml new file mode 100644 index 0000000..1225607 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_overwriteonly/pkg.yml @@ -0,0 +1,27 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: "targets/rsa_overwriteonly" +pkg.type: "target" +pkg.description: +pkg.author: +pkg.homepage: + +pkg.deps: + - "@mcuboot/boot/mynewt" diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_overwriteonly/syscfg.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_overwriteonly/syscfg.yml new file mode 100644 index 0000000..8dabbe8 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_overwriteonly/syscfg.yml @@ -0,0 +1,28 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +$import: + - '@mcuboot/ci/mynewt_targets/basic/syscfg.yml' + +syscfg.vals: + BOOTUTIL_VALIDATE_SLOT0: 1 + BOOTUTIL_SIGN_EC256: 0 + BOOTUTIL_SIGN_RSA: 1 + BOOTUTIL_USE_MBED_TLS: 1 + BOOTUTIL_USE_TINYCRYPT: 0 + BOOTUTIL_OVERWRITE_ONLY: 1 diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_overwriteonly/target.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_overwriteonly/target.yml new file mode 100644 index 0000000..cbfc8c7 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_overwriteonly/target.yml @@ -0,0 +1,23 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +target.app: "@mcuboot/boot/mynewt" +target.bsp: "@apache-mynewt-core/hw/bsp/nordic_pca10056" +target.build_profile: "optimized" +target.key_file: "@mcuboot/root-rsa-2048.pem" diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep/pkg.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep/pkg.yml new file mode 100644 index 0000000..fc69f10 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep/pkg.yml @@ -0,0 +1,27 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: "targets/rsa_rsaoaep" +pkg.type: "target" +pkg.description: +pkg.author: +pkg.homepage: + +pkg.deps: + - "@mcuboot/boot/mynewt" + - "@mcuboot/keys/enc_rsa" diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep/syscfg.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep/syscfg.yml new file mode 100644 index 0000000..29d7140 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep/syscfg.yml @@ -0,0 +1,29 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +$import: + - '@mcuboot/ci/mynewt_targets/basic/syscfg.yml' + +syscfg.vals: + BOOTUTIL_VALIDATE_SLOT0: 1 + BOOTUTIL_SIGN_EC256: 0 + BOOTUTIL_SIGN_RSA: 1 + BOOTUTIL_USE_MBED_TLS: 1 + BOOTUTIL_USE_TINYCRYPT: 0 + BOOTUTIL_ENCRYPT_RSA: 1 + MBEDTLS_CIPHER_MODE_CTR: 1 diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep/target.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep/target.yml new file mode 100644 index 0000000..cbfc8c7 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep/target.yml @@ -0,0 +1,23 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +target.app: "@mcuboot/boot/mynewt" +target.bsp: "@apache-mynewt-core/hw/bsp/nordic_pca10056" +target.build_profile: "optimized" +target.key_file: "@mcuboot/root-rsa-2048.pem" diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep_bootstrap/pkg.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep_bootstrap/pkg.yml new file mode 100644 index 0000000..d0b3619 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep_bootstrap/pkg.yml @@ -0,0 +1,27 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: "targets/rsa_rsaoaep_bootstrap" +pkg.type: "target" +pkg.description: +pkg.author: +pkg.homepage: + +pkg.deps: + - "@mcuboot/boot/mynewt" + - "@mcuboot/keys/enc_rsa" diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep_bootstrap/syscfg.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep_bootstrap/syscfg.yml new file mode 100644 index 0000000..ddadbbf --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep_bootstrap/syscfg.yml @@ -0,0 +1,30 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +$import: + - '@mcuboot/ci/mynewt_targets/basic/syscfg.yml' + +syscfg.vals: + BOOTUTIL_VALIDATE_SLOT0: 1 + BOOTUTIL_SIGN_EC256: 0 + BOOTUTIL_SIGN_RSA: 1 + BOOTUTIL_USE_MBED_TLS: 1 + BOOTUTIL_USE_TINYCRYPT: 0 + BOOTUTIL_ENCRYPT_RSA: 1 + BOOTUTIL_BOOTSTRAP: 1 + MBEDTLS_CIPHER_MODE_CTR: 1 diff --git a/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep_bootstrap/target.yml b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep_bootstrap/target.yml new file mode 100644 index 0000000..cbfc8c7 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/rsa_rsaoaep_bootstrap/target.yml @@ -0,0 +1,23 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +target.app: "@mcuboot/boot/mynewt" +target.bsp: "@apache-mynewt-core/hw/bsp/nordic_pca10056" +target.build_profile: "optimized" +target.key_file: "@mcuboot/root-rsa-2048.pem" diff --git a/bootloader/mcuboot/ci/mynewt_targets/swap_move/pkg.yml b/bootloader/mcuboot/ci/mynewt_targets/swap_move/pkg.yml new file mode 100644 index 0000000..54924ed --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/swap_move/pkg.yml @@ -0,0 +1,27 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: "targets/swap_move" +pkg.type: "target" +pkg.description: +pkg.author: +pkg.homepage: + +pkg.deps: + - "@mcuboot/boot/mynewt" diff --git a/bootloader/mcuboot/ci/mynewt_targets/swap_move/syscfg.yml b/bootloader/mcuboot/ci/mynewt_targets/swap_move/syscfg.yml new file mode 100644 index 0000000..57c4d54 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/swap_move/syscfg.yml @@ -0,0 +1,46 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +syscfg.vals: + BOOT_SERIAL: 0 + BOOT_SERIAL_DETECT_PIN: 11 + BOOT_SERIAL_DETECT_PIN_VAL: 0 + BOOT_SERIAL_REPORT_PIN: 13 + BOOTUTIL_VALIDATE_SLOT0: 0 + BOOTUTIL_MAX_IMG_SECTORS: 256 + BOOTUTIL_SWAP_USING_MOVE: 1 + BOOTUTIL_SIGN_EC256: 0 + BOOTUTIL_SIGN_RSA: 0 + BOOTUTIL_ENCRYPT_RSA: 0 + BOOTUTIL_ENCRYPT_KW: 0 + BOOTUTIL_USE_MBED_TLS: 0 + BOOTUTIL_USE_TINYCRYPT: 1 + BOOTUTIL_OVERWRITE_ONLY: 0 + BOOTUTIL_OVERWRITE_ONLY_FAST: 1 + BOOTUTIL_HAVE_LOGGING: 0 + BOOTUTIL_NO_LOGGING: 1 + BOOTUTIL_LOG_LEVEL: 'BOOTUTIL_LOG_LEVEL_INFO' + CONSOLE_COMPAT: 1 + CONSOLE_INPUT: 0 + CONSOLE_UART: 0 + CONSOLE_RTT: 0 + OS_CPUTIME_TIMER_NUM: 0 + TIMER_0: 1 + UART_0: 0 + BOOTUTIL_BOOTSTRAP: 0 + MBEDTLS_NIST_KW_C: 0 diff --git a/bootloader/mcuboot/ci/mynewt_targets/swap_move/target.yml b/bootloader/mcuboot/ci/mynewt_targets/swap_move/target.yml new file mode 100644 index 0000000..6cb85a9 --- /dev/null +++ b/bootloader/mcuboot/ci/mynewt_targets/swap_move/target.yml @@ -0,0 +1,22 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +target.app: "@mcuboot/boot/mynewt" +target.bsp: "@apache-mynewt-core/hw/bsp/nordic_pca10056" +target.build_profile: "optimized" diff --git a/bootloader/mcuboot/ci/requirements.txt b/bootloader/mcuboot/ci/requirements.txt new file mode 100644 index 0000000..aab392a --- /dev/null +++ b/bootloader/mcuboot/ci/requirements.txt @@ -0,0 +1 @@ +tomli diff --git a/bootloader/mcuboot/ci/sim_install.sh b/bootloader/mcuboot/ci/sim_install.sh new file mode 100644 index 0000000..8ec96cf --- /dev/null +++ b/bootloader/mcuboot/ci/sim_install.sh @@ -0,0 +1,19 @@ +#!/bin/bash -x + +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +pip3 install --user -r ci/requirements.txt + +pushd sim && cargo fetch +[[ $? -ne 0 ]] && exit 1 +popd diff --git a/bootloader/mcuboot/ci/sim_run.sh b/bootloader/mcuboot/ci/sim_run.sh new file mode 100644 index 0000000..7a9ff2d --- /dev/null +++ b/bootloader/mcuboot/ci/sim_run.sh @@ -0,0 +1,65 @@ +#!/bin/bash -x + +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +GET_FEATURES="$(pwd)/ci/get_features.py" +CARGO_TOML="$(pwd)/sim/Cargo.toml" + +pushd sim + +all_features="$(${GET_FEATURES} ${CARGO_TOML})" +[ $? -ne 0 ] && exit 1 + +EXIT_CODE=0 + +if [[ ! -z $SINGLE_FEATURES ]]; then + if [[ $SINGLE_FEATURES =~ "none" ]]; then + echo "Running cargo with no features" + time cargo test --no-run + time cargo test + rc=$? && [ $rc -ne 0 ] && EXIT_CODE=$rc + fi + + for feature in $all_features; do + if [[ $SINGLE_FEATURES =~ $feature ]]; then + echo "Running cargo for feature=\"${feature}\"" + time cargo test --no-run --features $feature + time cargo test --features $feature + rc=$? && [ $rc -ne 0 ] && EXIT_CODE=$rc + fi + done +fi + +if [[ ! -z $MULTI_FEATURES ]]; then + IFS=',' + read -ra multi_features <<< "$MULTI_FEATURES" + + # psa crypto tests require single thread mode + TEST_ARGS='' + for features in "${multi_features[@]}"; do + if [[ $features =~ "psa" ]]; then + TEST_ARGS='--test-threads=1' + break + fi + done + + for features in "${multi_features[@]}"; do + echo "Running cargo for features=\"${features}\"" + time cargo test --no-run --features "$features" -- $TEST_ARGS + time cargo test --features "$features" -- $TEST_ARGS + rc=$? && [ $rc -ne 0 ] && EXIT_CODE=$rc + done +fi + +popd +exit $EXIT_CODE diff --git a/bootloader/mcuboot/docs/.gitignore b/bootloader/mcuboot/docs/.gitignore new file mode 100644 index 0000000..cf1879a --- /dev/null +++ b/bootloader/mcuboot/docs/.gitignore @@ -0,0 +1,2 @@ +.sass-cache/ +_site/ diff --git a/bootloader/mcuboot/docs/CNAME b/bootloader/mcuboot/docs/CNAME new file mode 100644 index 0000000..64ca4fe --- /dev/null +++ b/bootloader/mcuboot/docs/CNAME @@ -0,0 +1 @@ +docs.mcuboot.com \ No newline at end of file diff --git a/bootloader/mcuboot/docs/Gemfile b/bootloader/mcuboot/docs/Gemfile new file mode 100644 index 0000000..b88481b --- /dev/null +++ b/bootloader/mcuboot/docs/Gemfile @@ -0,0 +1,26 @@ +source "https://rubygems.org" + +# Hello! This is where you manage which Jekyll version is used to run. +# When you want to use a different version, change it below, save the +# file and run `bundle install`. Run Jekyll with `bundle exec`, like so: +# +# bundle exec jekyll serve + +# This is the default theme for new Jekyll sites. You may change this to anything you like. +# gem "jekyll-theme-cayman", "~> 0.1" + +# If you want to use GitHub Pages, remove the "gem "jekyll"" above and +# uncomment the line below. To upgrade, run `bundle update github-pages`. +gem "github-pages", group: :jekyll_plugins + +# If you have any plugins, put them here! +# group :jekyll_plugins do +# gem "jekyll-feed", "~> 0.6" +# end + +# Windows does not include zoneinfo files, so bundle the tzinfo-data gem +gem 'tzinfo-data', platforms: [:mingw, :mswin, :x64_mingw, :jruby] + +gem "jemoji", "~> 0.12.0" + +gem "webrick", "~> 1.8" diff --git a/bootloader/mcuboot/docs/Gemfile.lock b/bootloader/mcuboot/docs/Gemfile.lock new file mode 100644 index 0000000..9ee5e43 --- /dev/null +++ b/bootloader/mcuboot/docs/Gemfile.lock @@ -0,0 +1,266 @@ +GEM + remote: https://rubygems.org/ + specs: + activesupport (7.0.7.2) + concurrent-ruby (~> 1.0, >= 1.0.2) + i18n (>= 1.6, < 2) + minitest (>= 5.1) + tzinfo (~> 2.0) + addressable (2.8.5) + public_suffix (>= 2.0.2, < 6.0) + coffee-script (2.4.1) + coffee-script-source + execjs + coffee-script-source (1.11.1) + colorator (1.1.0) + commonmarker (0.23.10) + concurrent-ruby (1.2.2) + dnsruby (1.70.0) + simpleidn (~> 0.2.1) + em-websocket (0.5.3) + eventmachine (>= 0.12.9) + http_parser.rb (~> 0) + ethon (0.16.0) + ffi (>= 1.15.0) + eventmachine (1.2.7) + execjs (2.8.1) + faraday (2.7.10) + faraday-net_http (>= 2.0, < 3.1) + ruby2_keywords (>= 0.0.4) + faraday-net_http (3.0.2) + ffi (1.15.5) + forwardable-extended (2.6.0) + gemoji (3.0.1) + github-pages (228) + github-pages-health-check (= 1.17.9) + jekyll (= 3.9.3) + jekyll-avatar (= 0.7.0) + jekyll-coffeescript (= 1.1.1) + jekyll-commonmark-ghpages (= 0.4.0) + jekyll-default-layout (= 0.1.4) + jekyll-feed (= 0.15.1) + jekyll-gist (= 1.5.0) + jekyll-github-metadata (= 2.13.0) + jekyll-include-cache (= 0.2.1) + jekyll-mentions (= 1.6.0) + jekyll-optional-front-matter (= 0.3.2) + jekyll-paginate (= 1.1.0) + jekyll-readme-index (= 0.3.0) + jekyll-redirect-from (= 0.16.0) + jekyll-relative-links (= 0.6.1) + jekyll-remote-theme (= 0.4.3) + jekyll-sass-converter (= 1.5.2) + jekyll-seo-tag (= 2.8.0) + jekyll-sitemap (= 1.4.0) + jekyll-swiss (= 1.0.0) + jekyll-theme-architect (= 0.2.0) + jekyll-theme-cayman (= 0.2.0) + jekyll-theme-dinky (= 0.2.0) + jekyll-theme-hacker (= 0.2.0) + jekyll-theme-leap-day (= 0.2.0) + jekyll-theme-merlot (= 0.2.0) + jekyll-theme-midnight (= 0.2.0) + jekyll-theme-minimal (= 0.2.0) + jekyll-theme-modernist (= 0.2.0) + jekyll-theme-primer (= 0.6.0) + jekyll-theme-slate (= 0.2.0) + jekyll-theme-tactile (= 0.2.0) + jekyll-theme-time-machine (= 0.2.0) + jekyll-titles-from-headings (= 0.5.3) + jemoji (= 0.12.0) + kramdown (= 2.3.2) + kramdown-parser-gfm (= 1.1.0) + liquid (= 4.0.4) + mercenary (~> 0.3) + minima (= 2.5.1) + nokogiri (>= 1.13.6, < 2.0) + rouge (= 3.26.0) + terminal-table (~> 1.4) + github-pages-health-check (1.17.9) + addressable (~> 2.3) + dnsruby (~> 1.60) + octokit (~> 4.0) + public_suffix (>= 3.0, < 5.0) + typhoeus (~> 1.3) + html-pipeline (2.14.3) + activesupport (>= 2) + nokogiri (>= 1.4) + http_parser.rb (0.8.0) + i18n (1.14.1) + concurrent-ruby (~> 1.0) + jekyll (3.9.3) + addressable (~> 2.4) + colorator (~> 1.0) + em-websocket (~> 0.5) + i18n (>= 0.7, < 2) + jekyll-sass-converter (~> 1.0) + jekyll-watch (~> 2.0) + kramdown (>= 1.17, < 3) + liquid (~> 4.0) + mercenary (~> 0.3.3) + pathutil (~> 0.9) + rouge (>= 1.7, < 4) + safe_yaml (~> 1.0) + jekyll-avatar (0.7.0) + jekyll (>= 3.0, < 5.0) + jekyll-coffeescript (1.1.1) + coffee-script (~> 2.2) + coffee-script-source (~> 1.11.1) + jekyll-commonmark (1.4.0) + commonmarker (~> 0.22) + jekyll-commonmark-ghpages (0.4.0) + commonmarker (~> 0.23.7) + jekyll (~> 3.9.0) + jekyll-commonmark (~> 1.4.0) + rouge (>= 2.0, < 5.0) + jekyll-default-layout (0.1.4) + jekyll (~> 3.0) + jekyll-feed (0.15.1) + jekyll (>= 3.7, < 5.0) + jekyll-gist (1.5.0) + octokit (~> 4.2) + jekyll-github-metadata (2.13.0) + jekyll (>= 3.4, < 5.0) + octokit (~> 4.0, != 4.4.0) + jekyll-include-cache (0.2.1) + jekyll (>= 3.7, < 5.0) + jekyll-mentions (1.6.0) + html-pipeline (~> 2.3) + jekyll (>= 3.7, < 5.0) + jekyll-optional-front-matter (0.3.2) + jekyll (>= 3.0, < 5.0) + jekyll-paginate (1.1.0) + jekyll-readme-index (0.3.0) + jekyll (>= 3.0, < 5.0) + jekyll-redirect-from (0.16.0) + jekyll (>= 3.3, < 5.0) + jekyll-relative-links (0.6.1) + jekyll (>= 3.3, < 5.0) + jekyll-remote-theme (0.4.3) + addressable (~> 2.0) + jekyll (>= 3.5, < 5.0) + jekyll-sass-converter (>= 1.0, <= 3.0.0, != 2.0.0) + rubyzip (>= 1.3.0, < 3.0) + jekyll-sass-converter (1.5.2) + sass (~> 3.4) + jekyll-seo-tag (2.8.0) + jekyll (>= 3.8, < 5.0) + jekyll-sitemap (1.4.0) + jekyll (>= 3.7, < 5.0) + jekyll-swiss (1.0.0) + jekyll-theme-architect (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-theme-cayman (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-theme-dinky (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-theme-hacker (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-theme-leap-day (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-theme-merlot (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-theme-midnight (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-theme-minimal (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-theme-modernist (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-theme-primer (0.6.0) + jekyll (> 3.5, < 5.0) + jekyll-github-metadata (~> 2.9) + jekyll-seo-tag (~> 2.0) + jekyll-theme-slate (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-theme-tactile (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-theme-time-machine (0.2.0) + jekyll (> 3.5, < 5.0) + jekyll-seo-tag (~> 2.0) + jekyll-titles-from-headings (0.5.3) + jekyll (>= 3.3, < 5.0) + jekyll-watch (2.2.1) + listen (~> 3.0) + jemoji (0.12.0) + gemoji (~> 3.0) + html-pipeline (~> 2.2) + jekyll (>= 3.0, < 5.0) + kramdown (2.3.2) + rexml + kramdown-parser-gfm (1.1.0) + kramdown (~> 2.0) + liquid (4.0.4) + listen (3.8.0) + rb-fsevent (~> 0.10, >= 0.10.3) + rb-inotify (~> 0.9, >= 0.9.10) + mercenary (0.3.6) + mini_portile2 (2.8.6) + minima (2.5.1) + jekyll (>= 3.5, < 5.0) + jekyll-feed (~> 0.9) + jekyll-seo-tag (~> 2.1) + minitest (5.19.0) + nokogiri (1.16.5) + mini_portile2 (~> 2.8.2) + racc (~> 1.4) + octokit (4.25.1) + faraday (>= 1, < 3) + sawyer (~> 0.9) + pathutil (0.16.2) + forwardable-extended (~> 2.6) + public_suffix (4.0.7) + racc (1.7.3) + rb-fsevent (0.11.2) + rb-inotify (0.10.1) + ffi (~> 1.0) + rexml (3.2.8) + strscan (>= 3.0.9) + rouge (3.26.0) + ruby2_keywords (0.0.5) + rubyzip (2.3.2) + safe_yaml (1.0.5) + sass (3.7.4) + sass-listen (~> 4.0.0) + sass-listen (4.0.0) + rb-fsevent (~> 0.9, >= 0.9.4) + rb-inotify (~> 0.9, >= 0.9.7) + sawyer (0.9.2) + addressable (>= 2.3.5) + faraday (>= 0.17.3, < 3) + simpleidn (0.2.1) + unf (~> 0.1.4) + strscan (3.1.0) + terminal-table (1.8.0) + unicode-display_width (~> 1.1, >= 1.1.1) + typhoeus (1.4.0) + ethon (>= 0.9.0) + tzinfo (2.0.6) + concurrent-ruby (~> 1.0) + unf (0.1.4) + unf_ext + unf_ext (0.0.8.2) + unicode-display_width (1.8.0) + webrick (1.8.1) + +PLATFORMS + ruby + +DEPENDENCIES + github-pages + jemoji (~> 0.12.0) + tzinfo-data + webrick (~> 1.8) + +BUNDLED WITH + 1.17.2 diff --git a/bootloader/mcuboot/docs/PORTING.md b/bootloader/mcuboot/docs/PORTING.md new file mode 100644 index 0000000..4804096 --- /dev/null +++ b/bootloader/mcuboot/docs/PORTING.md @@ -0,0 +1,195 @@ +# Porting how-to + +This document describes the requirements and necessary steps required to port +`MCUboot` to a new target `OS`. + +# Requirements + +* `MCUboot` requires a configuration file, which can be included as + mcuboot_config/mcuboot_config.h, which configures various options + (that begin with MCUBOOT_). + +* `MCUboot` requires that the target provides a `flash` API with ability to + get the flash's minimum write size, and read/write/erase individual sectors. + +* `MCUboot` doesn't bundle a cryptographic library, which means the target + OS must already have it bundled. The supported libraries at the moment are + either `Mbed TLS` or the set `tinycrypt` + `Mbed TLS` (where `Mbed TLS` is + used to provide functionality not existing in `tinycrypt`). + +# Steps to port + +## Main app and calling the bootloader + +From the perspective of the target OS, the bootloader can be seen as a library, +so an entry point must be provided. This is likely a typical `app` for the +target OS, and it must call the following function to run the bootloader: + +```c +int boot_go(struct boot_rsp *rsp); +``` + +This function is located at `boot/bootutil/loader.c` and receives a `struct +boot_rsp` pointer. The `struct boot_rsp` is defined as: + +```c +struct boot_rsp { + /** A pointer to the header of the image to be executed. */ + const struct image_header *br_hdr; + + /** + * The flash offset of the image to execute. Indicates the position of + * the image header. + */ + uint8_t br_flash_id; + uint32_t br_image_addr; +}; +``` + +After running the management functions of the bootloader, `boot_go` returns +an initialized `boot_rsp` which has pointers to the location of the image +where the target firmware is located which can be used to jump to. + +## Configuration file + +You must provide a file, mcuboot_config/mcuboot_config.h. This is +included by several files in the "library" portion of MCUboot; it +provides preprocessor definitions that configure the library's +build. + +See the file samples/mcuboot_config/mcuboot_config.template.h for a +starting point and more information. This is a good place to convert +settings in your environment's configuration system to those required +by MCUboot. For example, Mynewt uses MYNEWT_VAL() and Zephyr uses +Kconfig; these configuration systems are converted to MCUBOOT_ options +in the following files: + +- boot/zephyr/include/mcuboot_config/mcuboot_config.h +- boot/mynewt/mcuboot_config/include/mcuboot_config/mcuboot_config.h + +## Flash Map + +The bootloader requires to be able to address flash regions where the code +for MCUboot and images of applications are stored, in system-agnostic way. +For that purpose the MCUboot uses ID, which is integer (uint8_t) number +that should uniquely identify each flash region. +Such flash regions are served by object of `const struct flash_area` type while +layout of these objects is gathered under `flash_map`. +The common code of MCUboot, that is non-system specific, does not directly +access contents of that object and never modifies it, instead it calls +`flash_area_` API to perform any actions on that object. +This way systems are free to implement internal logic of flash map or define +`struct flash_area` as they wish; the only restriction is that ID should be +uniquely tied to region characterized by device, offset and size. + +Changes to common MCUboot code should not affect system specific internals +of flash map, on the other side system specific code, within MCUboot, is +is not restricted from directly accessing `struct flash_area` elements. + + +An implementation of `struct flash_area` may take form of: +```c +struct flash_area { + uint8_t fa_id; /** The slot/scratch identification */ + uint8_t fa_device_id; /** The device id (usually there's only one) */ + uint16_t pad16; + uint32_t fa_off; /** The flash offset from the beginning */ + uint32_t fa_size; /** The size of this sector */ +}; +``` +The above example of structure hold all information that is currently required +by MCUboot, although the MCUboot will not be trying to access them directly, +instead a system is required to provide following mandatory getter functions: + +```c +/*< Obtains ID of the flash area characterized by `fa` */ +int flash_area_get_id(const struct flash_area *fa); +/*< Obtains ID of a device the flash area `fa` described region resides on */ +int flash_area_get_device_id(const struct flash_area *fa) +/*< Obtains offset, from the beginning of a device, the flash area described + * region starts at */ +uint32_t flash_area_get_off(const struct flash_area *fa) +/*< Obtains size, from the offset, of the flash area `fa` characterized region */ +uint32_t flash_area_get_size(const struct flash_area *fa) + +``` + +The MCUboot common code uses following defines that should be defined by system +specific header files and are used to identify destination of flash area by ID: + +```c +/* Independent from multiple image boot */ +#define FLASH_AREA_BOOTLOADER 0 +#define FLASH_AREA_IMAGE_SCRATCH 3 +``` +```c +/* Flash area IDs of the first image in case of multiple images */ +#define FLASH_AREA_IMAGE_PRIMARY 1 +#define FLASH_AREA_IMAGE_SECONDARY 2 +``` +```c +/* Flash area IDs of the second image in case of multiple images */ +#define FLASH_AREA_IMAGE_PRIMARY 5 +#define FLASH_AREA_IMAGE_SECONDARY 6 +``` + +The numbers, given above, are provided as an example and depend on system +implementation. + +The main, also required, set of API functions that perform operations on +flash characterized by `struct flash_area` objects is as follows: + +```c +/*< Opens the area for use. id is one of the `fa_id`s */ +int flash_area_open(uint8_t id, const struct flash_area **); +void flash_area_close(const struct flash_area *); +/*< Reads `len` bytes of flash memory at `off` to the buffer at `dst` */ +int flash_area_read(const struct flash_area *, uint32_t off, void *dst, + uint32_t len); +/*< Writes `len` bytes of flash memory at `off` from the buffer at `src` */ +int flash_area_write(const struct flash_area *, uint32_t off, + const void *src, uint32_t len); +/*< Erases `len` bytes of flash memory at `off` */ +int flash_area_erase(const struct flash_area *, uint32_t off, uint32_t len); +/*< Returns this `flash_area`s alignment */ +uint32_t flash_area_align(const struct flash_area *); +/*< What is value is read from erased flash bytes. */ +uint8_t flash_area_erased_val(const struct flash_area *); +/*< Given flash area ID, return info about sectors within the area. */ +int flash_area_get_sectors(int fa_id, uint32_t *count, + struct flash_sector *sectors); +/*< Returns the `fa_id` for slot, where slot is 0 (primary) or 1 (secondary). + `image_index` (0 or 1) is the index of the image. Image index is + relevant only when multi-image support support is enabled */ +int flash_area_id_from_multi_image_slot(int image_index, int slot); +/*< Returns the slot (0 for primary or 1 for secondary), for the supplied + `image_index` and `area_id`. `area_id` is unique and is represented by + `fa_id` in the `flash_area` struct. */ +int flash_area_id_to_multi_image_slot(int image_index, int area_id); +``` + +--- +***Note*** + +*As of writing, it is possible that MCUboot will open a flash area multiple times simultaneously (through nested calls to `flash_area_open`). As a result, MCUboot may call `flash_area_close` on a flash area that is still opened by another part of MCUboot. As a workaround when porting, it may be necessary to implement a counter of the number of times a given flash area has been opened by MCUboot. The `flash_area_close` implementation should only fully deinitialize the underlying flash area when the open counter is decremented to 0. See [this GitHub PR](https://github.com/mcu-tools/mcuboot/pull/894/) for a more detailed discussion.* + +--- + +## Memory management for Mbed TLS + +`Mbed TLS` employs dynamic allocation of memory, making use of the pair +`calloc/free`. If `Mbed TLS` is to be used for crypto, your target RTOS +needs to provide this pair of function. + +To configure the what functions are called when allocating/deallocating +memory `Mbed TLS` uses the following call: + +``` +int mbedtls_platform_set_calloc_free (void *(*calloc_func)(size_t, size_t), + void (*free_func)(void *)); +``` + +For reference see [Mbed TLS platform.h](https://tls.mbed.org/api/platform_8h.html). +If your system already provides functions with compatible signatures, those can +be used directly here, otherwise create new functions that glue to your +`calloc/free` implementations. diff --git a/bootloader/mcuboot/docs/SECURITY.md b/bootloader/mcuboot/docs/SECURITY.md new file mode 100644 index 0000000..f995385 --- /dev/null +++ b/bootloader/mcuboot/docs/SECURITY.md @@ -0,0 +1,56 @@ +# Project security policy + +The MCUboot team takes security, vulnerabilities, and weaknesses +seriously. + +## Reporting security issues + +The preferred way to report security issues with MCUboot is via the "Report a +security vulnerability" button on the main [security +page](https://github.com/mcu-tools/mcuboot/security). + +You can also directly contact the following maintainers of the project: + +- David Brown: davidb@davidb.org or david.brown@linaro.org +- Fabio Utzig: utzig@apache.org + +If you wish to send an encrypted email, you may use these PGP keys: + +``` + pub rsa4096 2011-10-14 [SC] + DAFD760825AE2636AEA9CB19E6BA9F5C5E54DF82 + uid [ultimate] David Brown + uid [ultimate] David Brown + sub rsa4096 2011-10-14 [E] +``` + +and + +``` + pub rsa4096 2017-07-28 [SC] + 126087C7E725625BC7E89CC7537097EDFD4A7339 + uid [ unknown] Fabio Utzig + uid [ unknown] Fabio Utzig + sub rsa4096 2017-07-28 [E] +``` + +Please include the word "SECURITY" as well as "MCUboot" in the subject +of any message. + +We will make our best effort to respond in a timely manner. Most +vulnerabilities found within published code will undergo an embargo of +90 days to allow time fixes to be developed and deployed. + +## Vulnerability advisories + +Vulnerability reports and published fixes will be reported as follows: + +- Issues will be entered into MCUboot's [security advisory + system](https://github.com/mcu-tools/mcuboot/security/advisories) on GitHub, with + the interested parties (including the reporter) added as viewers. + +- The release notes will contain a reference to any allocated CVE(s). + +- When the embargo is lifted, the security advisory page will be made + public, and the public CVE database will be updated with all + relevant information. diff --git a/bootloader/mcuboot/docs/SubmittingPatches.md b/bootloader/mcuboot/docs/SubmittingPatches.md new file mode 100644 index 0000000..4328272 --- /dev/null +++ b/bootloader/mcuboot/docs/SubmittingPatches.md @@ -0,0 +1,89 @@ +# Patch submission + +The development of MCUboot takes place in the [MCUboot GitHub +repository](https://github.com/mcu-tools/mcuboot). + +To submit patches, use GitHub pull requests. + +Each commit has to have, in the commit message, a "Signed-off-by" line +that mentions the author (and the committer, if that is different). You +must add this line at the end of the commit text, separated by a blank +line. You can also add a line linking the commit to a specific GitHub +issue, as this section supports multiple lines, similarly to RFC-2822. + +The supported trailer lines are structured as follows: + +- A line that indicates that the signer agrees to the "Developer +Certificate of Origin" located at the bottom of this page: + + ``` + Signed-off-by: Developer Name + ``` + +- A line that links this commit to specific GitHub issues, if present: + + ``` + Keyword #GH_issue_number + ``` + + For more details about linking a GitHub pull request to a GitHub issue, + see this [link] + (https://docs.github.com/en/issues/tracking-your-work-with-issues/linking-a-pull-request-to-an-issue). + +## Release notes + +To facilitate creating release notes at release time, all non-trivial +changes must include a release note snippet in the pull request. +This can be either a separate commit, or as part of a single commit +(generally, if there are multiple commits to the pull request, the +release note snippet should be a separate commit, and a pull request +that is a single commit can include the release note snippet in that +commit). In either case, the release notes must be included in the +same PR that makes the given change. + +The release notes should be placed in the `docs/release-notes.d` +directory. Please see the readme file in that directory for specifics. + +## Developer certificate of origin + +The following is the "Developer Certificate of Origin": + +``` +Developer Certificate of Origin +Version 1.1 + +Copyright (C) 2004, 2006 The Linux Foundation and its contributors. +1 Letterman Drive +Suite D4700 +San Francisco, CA, 94129 + +Everyone is permitted to copy and distribute verbatim copies of this +license document, but changing it is not allowed. + + +Developer's Certificate of Origin 1.1 + +By making a contribution to this project, I certify that: + +(a) The contribution was created in whole or in part by me and I + have the right to submit it under the open source license + indicated in the file; or + +(b) The contribution is based upon previous work that, to the best + of my knowledge, is covered under an appropriate open source + license and I have the right under that license to submit that + work with modifications, whether created in whole or in part + by me, under the same open source license (unless I am + permitted to submit under a different license), as indicated + in the file; or + +(c) The contribution was provided directly to me by some other + person who certified (a), (b) or (c) and I have not modified + it. + +(d) I understand and agree that this project and the contribution + are public and that a record of the contribution (including all + personal information I submit with it, including my sign-off) is + maintained indefinitely and may be redistributed consistent with + this project or the open source license(s) involved. +``` diff --git a/bootloader/mcuboot/docs/_config.yml b/bootloader/mcuboot/docs/_config.yml new file mode 100644 index 0000000..be854e8 --- /dev/null +++ b/bootloader/mcuboot/docs/_config.yml @@ -0,0 +1,3 @@ +theme: jekyll-theme-cayman +plugins: + - jemoji diff --git a/bootloader/mcuboot/docs/design.md b/bootloader/mcuboot/docs/design.md new file mode 100644 index 0000000..8539ae0 --- /dev/null +++ b/bootloader/mcuboot/docs/design.md @@ -0,0 +1,1512 @@ + + +# Bootloader + +## [Summary](#summary) + +MCUboot comprises two packages: + +* The bootutil library (boot/bootutil) +* The boot application (each port has its own at boot/) + +The bootutil library performs most of the functions of a bootloader. In +particular, the piece that is missing is the final step of actually jumping to +the main image. This last step is instead implemented by the boot application. +Bootloader functionality is separated in this manner to enable unit testing of +the bootloader. A library can be unit tested, but an application can't. +Therefore, functionality is delegated to the bootutil library when possible. + +## [Limitations](#limitations) + +The bootloader currently only supports images with the following +characteristics: +* Built to run from flash. +* Built to run from a fixed location (i.e., not position-independent). + +## [Image format](#image-format) + +The following definitions describe the image format. + +``` c +#define IMAGE_MAGIC 0x96f3b83d + +#define IMAGE_HEADER_SIZE 32 + +struct image_version { + uint8_t iv_major; + uint8_t iv_minor; + uint16_t iv_revision; + uint32_t iv_build_num; +}; + +/** Image header. All fields are in little endian byte order. */ +struct image_header { + uint32_t ih_magic; + uint32_t ih_load_addr; + uint16_t ih_hdr_size; /* Size of image header (bytes). */ + uint16_t ih_protect_tlv_size; /* Size of protected TLV area (bytes). */ + uint32_t ih_img_size; /* Does not include header. */ + uint32_t ih_flags; /* IMAGE_F_[...]. */ + struct image_version ih_ver; + uint32_t _pad1; +}; + +#define IMAGE_TLV_INFO_MAGIC 0x6907 +#define IMAGE_TLV_PROT_INFO_MAGIC 0x6908 + +/** Image TLV header. All fields in little endian. */ +struct image_tlv_info { + uint16_t it_magic; + uint16_t it_tlv_tot; /* size of TLV area (including tlv_info header) */ +}; + +/** Image trailer TLV format. All fields in little endian. */ +struct image_tlv { + uint8_t it_type; /* IMAGE_TLV_[...]. */ + uint8_t _pad; + uint16_t it_len; /* Data length (not including TLV header). */ +}; + +/* + * Image header flags. + */ +#define IMAGE_F_PIC 0x00000001 /* Not supported. */ +#define IMAGE_F_ENCRYPTED_AES128 0x00000004 /* Encrypted using AES128. */ +#define IMAGE_F_ENCRYPTED_AES256 0x00000008 /* Encrypted using AES256. */ +#define IMAGE_F_NON_BOOTABLE 0x00000010 /* Split image app. */ +#define IMAGE_F_RAM_LOAD 0x00000020 + +/* + * Image trailer TLV types. + */ +#define IMAGE_TLV_KEYHASH 0x01 /* hash of the public key */ +#define IMAGE_TLV_SHA256 0x10 /* SHA256 of image hdr and body */ +#define IMAGE_TLV_RSA2048_PSS 0x20 /* RSA2048 of hash output */ +#define IMAGE_TLV_ECDSA224 0x21 /* ECDSA of hash output - Not supported anymore */ +#define IMAGE_TLV_ECDSA_SIG 0x22 /* ECDSA of hash output */ +#define IMAGE_TLV_RSA3072_PSS 0x23 /* RSA3072 of hash output */ +#define IMAGE_TLV_ED25519 0x24 /* ED25519 of hash output */ +#define IMAGE_TLV_ENC_RSA2048 0x30 /* Key encrypted with RSA-OAEP-2048 */ +#define IMAGE_TLV_ENC_KW 0x31 /* Key encrypted with AES-KW-128 or + 256 */ +#define IMAGE_TLV_ENC_EC256 0x32 /* Key encrypted with ECIES-P256 */ +#define IMAGE_TLV_ENC_X25519 0x33 /* Key encrypted with ECIES-X25519 */ +#define IMAGE_TLV_DEPENDENCY 0x40 /* Image depends on other image */ +#define IMAGE_TLV_SEC_CNT 0x50 /* security counter */ +``` + +Optional type-length-value records (TLVs) containing image metadata are placed +after the end of the image. + +The `ih_protect_tlv_size` field indicates the length of the protected TLV area. +If protected TLVs are present then a TLV info header with magic equal to +`IMAGE_TLV_PROT_INFO_MAGIC` must be present and the protected TLVs (plus the +info header itself) have to be included in the hash calculation. Otherwise the +hash is only calculated over the image header and the image itself. In this +case the value of the `ih_protect_tlv_size` field is 0. + +The `ih_hdr_size` field indicates the length of the header, and therefore the +offset of the image itself. This field provides for backwards compatibility in +case of changes to the format of the image header. + +## [Flash map](#flash-map) + +A device's flash is partitioned according to its _flash map_. At a high +level, the flash map maps numeric IDs to _flash areas_. A flash area is a +region of disk with the following properties: +1. An area can be fully erased without affecting any other areas. +2. A write to one area does not restrict writes to other areas. + +The bootloader uses the following flash area IDs: +```c +/* Independent from multiple image boot */ +#define FLASH_AREA_BOOTLOADER 0 +#define FLASH_AREA_IMAGE_SCRATCH 3 +``` +```c +/* If the bootloader is working with the first image */ +#define FLASH_AREA_IMAGE_PRIMARY 1 +#define FLASH_AREA_IMAGE_SECONDARY 2 +``` +```c +/* If the bootloader is working with the second image */ +#define FLASH_AREA_IMAGE_PRIMARY 5 +#define FLASH_AREA_IMAGE_SECONDARY 6 +``` + +The bootloader area contains the bootloader image itself. The other areas are +described in subsequent sections. The flash could contain multiple executable +images therefore the flash area IDs of primary and secondary areas are mapped +based on the number of the active image (on which the bootloader is currently +working). + +## [Image slots](#image-slots) + +A portion of the flash memory can be partitioned into multiple image areas, each +contains two image slots: a primary slot and a secondary slot. +Normally, the bootloader will only run an image from the primary slot, so +images must be built such that they can run from that fixed location in flash +(the exception to this is the [direct-xip](#direct-xip) and the +[ram-load](#ram-load) upgrade mode). If the bootloader needs to run the +image resident in the secondary slot, it must copy its contents into the primary +slot before doing so, either by swapping the two images or by overwriting the +contents of the primary slot. The bootloader supports either swap- or +overwrite-based image upgrades, but must be configured at build time to choose +one of these two strategies. + +### [Swap using scratch](#image-swap-using-scratch) + +When swap-using-scratch algorithm is used, in addition to the slots of +image areas, the bootloader requires a scratch area to allow for reliable +image swapping. The scratch area must have a size +that is enough to store at least the largest sector that is going to be swapped. +Many devices have small equally sized flash sectors, eg 4K, while others have +variable sized sectors where the largest sectors might be 128K or 256K, so the +scratch must be big enough to store that. The scratch is only ever used when +swapping firmware, which means only when doing an upgrade. Given that, the main +reason for using a larger size for the scratch is that flash wear will be more +evenly distributed, because a single sector would be written twice the number of +times than using two sectors, for example. To evaluate the ideal size of the +scratch for your use case the following parameters are relevant: + +* the ratio of image size / scratch size +* the number of erase cycles supported by the flash hardware + +The image size is used (instead of slot size) because only the slot's sectors +that are actually used for storing the image are copied. The image/scratch ratio +is the number of times the scratch will be erased on every upgrade. The number +of erase cycles divided by the image/scratch ratio will give you the number of +times an upgrade can be performed before the device goes out of spec. + +``` +num_upgrades = number_of_erase_cycles / (image_size / scratch_size) +``` + +Let's assume, for example, a device with 10000 erase cycles, an image size of +150K and a scratch of 4K (usual minimum size of 4K sector devices). This would +result in a total of: + +`10000 / (150 / 4) ~ 267` + +Increasing the scratch to 16K would give us: + +`10000 / (150 / 16) ~ 1067` + +There is no *best* ratio, as the right size is use-case dependent. Factors to +consider include the number of times a device will be upgraded both in the field +and during development, as well as any desired safety margin on the +manufacturer's specified number of erase cycles. In general, using a ratio that +allows hundreds to thousands of field upgrades in production is recommended. + +swap-using scratch algorithm assumes that the primary and the secondary image +slot areas sizes are equal. +The maximum image size available for the application +will be: +``` +maximum-image-size = image-slot-size - image-trailer-size +``` + +Where: + `image-slot-size` is the size of the image slot. + `image-trailer-size` is the size of the image trailer. + +### [Swap without using scratch](#image-swap-no-scratch) + +This algorithm is an alternative to the swap-using-scratch algorithm. +It uses an additional sector in the primary slot to make swap possible. +The algorithm works as follows: + + 1. Moves all sectors of the primary slot up by one sector. + Beginning from N=0: + 2. Copies the N-th sector from the secondary slot to the N-th sector of the + primary slot. + 3. Copies the (N+1)-th sector from the primary slot to the N-th sector of the + secondary slot. + 4. Repeats steps 2. and 3. until all the slots' sectors are swapped. + +This algorithm is designed so that the higher sector of the primary slot is +used only for allowing sectors to move up. Therefore the most +memory-size-effective slot layout is when the primary slot is exactly one sector +larger than the secondary slot, although same-sized slots are allowed as well. +The algorithm is limited to support sectors of the same +sector layout. All slot's sectors should be of the same size. + +When using this algorithm the maximum image size available for the application +will be: +``` +maximum-image-size = (N-1) * slot-sector-size - image-trailer-sectors-size +``` + +Where: + `N` is the number of sectors in the primary slot. + `image-trailer-sectors-size` is the size of the image trailer rounded up to + the total size of sectors its occupied. For instance if the image-trailer-size + is equal to 1056 B and the sector size is equal to 1024 B, then + `image-trailer-sectors-size` will be equal to 2048 B. + +The algorithm does two erase cycles on the primary slot and one on the secondary +slot during each swap. Assuming that receiving a new image by the DFU +application requires 1 erase cycle on the secondary slot, this should result in +leveling the flash wear between the slots. + +The algorithm is enabled using the `MCUBOOT_SWAP_USING_MOVE` option. + +### [Equal slots (direct-xip)](#direct-xip) + +When the direct-xip mode is enabled the active image flag is "moved" between the +slots during image upgrade and in contrast to the above, the bootloader can +run an image directly from either the primary or the secondary slot (without +having to move/copy it into the primary slot). Therefore the image update +client, which downloads the new images must be aware, which slot contains the +active image and which acts as a staging area and it is responsible for loading +the proper images into the proper slot. All this requires that the images be +built to be executed from the corresponding slot. At boot time the bootloader +first looks for images in the slots and then inspects the version numbers in the +image headers. It selects the newest image (with the highest version number) and +then checks its validity (integrity check, signature verification etc.). If the +image is invalid MCUboot erases its memory slot and starts to validate the other +image. After a successful validation of the selected image the bootloader +chain-loads it. + +An additional "revert" mechanism is also supported. For more information, please +read the [corresponding section](#direct-xip-revert). +Handling the primary and secondary slots as equals has its drawbacks. Since the +images are not moved between the slots, the on-the-fly image +encryption/decryption can't be supported (it only applies to storing the image +in an external flash on the device, the transport of encrypted image data is +still feasible). + +The overwrite and the direct-xip upgrade strategies are substantially simpler to +implement than the image swapping strategy, especially since the bootloader must +work properly even when it is reset during the middle of an image swap. For this +reason, the rest of the document describes its behavior when configured to swap +images during an upgrade. + +### [RAM loading](#ram-load) + +In ram-load mode the slots are equal. Like the direct-xip mode, this mode +also selects the newest image by reading the image version numbers in the image +headers. But instead of executing it in place, the newest image is copied to the +RAM for execution. The load address, the location in RAM where the image is +copied to, is stored in the image header. The ram-load upgrade mode can be +useful when there is no internal flash in the SoC, but there is a big enough +internal RAM to hold the images. Usually in this case the images are stored +in an external storage device. Execution from external storage has some +drawbacks (lower execution speed, image is exposed to attacks) therefore the +image is always copied to the internal RAM before the authentication and +execution. Ram-load mode requires the image to be built to be executed from +the RAM address range instead of the storage device address range. If +ram-load is enabled then platform must define the following parameters: + +```c +#define IMAGE_EXECUTABLE_RAM_START +#define IMAGE_EXECUTABLE_RAM_SIZE +``` + +For multiple image load if multiple ram regions are used platform must define +the `MULTIPLE_EXECUTABLE_RAM_REGIONS` flag instead and implement the following +function: + +```c +int boot_get_image_exec_ram_info(uint32_t image_id, + uint32_t *exec_ram_start, + uint32_t *exec_ram_size) +``` + +When ram-load is enabled, the `--load-addr ` option of the `imgtool` +script must also be used when signing the images. This option set the `RAM_LOAD` +flag in the image header which indicates that the image should be loaded to the +RAM and also set the load address in the image header. + +When the encryption option is enabled (`MCUBOOT_ENC_IMAGES`) along with ram-load +the image is checked for encryption. If the image is not encrypted, RAM loading +happens as described above. If the image is encrypted, it is copied in RAM at +the provided address and then decrypted. Finally, the decrypted image is +authenticated in RAM and executed. + +## [Boot swap types](#boot-swap-types) + +When the device first boots under normal circumstances, there is an up-to-date +firmware image in each primary slot, which MCUboot can validate and then +chain-load. In this case, no image swaps are necessary. During device upgrades, +however, new candidate image(s) is present in the secondary slot(s), which +MCUboot must swap into the primary slot(s) before booting as discussed above. + +Upgrading an old image with a new one by swapping can be a two-step process. In +this process, MCUboot performs a "test" swap of image data in flash and boots +the new image or it will be executed during operation. The new image can then +update the contents of flash at runtime to mark itself "OK", and MCUboot will +then still choose to run it during the next boot. When this happens, the swap is +made "permanent". If this doesn't happen, MCUboot will perform a "revert" swap +during the next boot by swapping the image(s) back into its original location(s) +, and attempting to boot the old image(s). + +Depending on the use case, the first swap can also be made permanent directly. +In this case, MCUboot will never attempt to revert the images on the next reset. + +Test swaps are supported to provide a rollback mechanism to prevent devices +from becoming "bricked" by bad firmware. If the device crashes immediately +upon booting a new (bad) image, MCUboot will revert to the old (working) image +at the next device reset, rather than booting the bad image again. This allows +device firmware to make test swaps permanent only after performing a self-test +routine. + +On startup, MCUboot inspects the contents of flash to decide for each images +which of these "swap types" to perform; this decision determines how it +proceeds. + +The possible swap types, and their meanings, are: + +- `BOOT_SWAP_TYPE_NONE`: The "usual" or "no upgrade" case; attempt to boot the + contents of the primary slot. + +- `BOOT_SWAP_TYPE_TEST`: Boot the contents of the secondary slot by swapping + images. Unless the swap is made permanent, revert back on the next boot. + +- `BOOT_SWAP_TYPE_PERM`: Permanently swap images, and boot the upgraded image + firmware. + +- `BOOT_SWAP_TYPE_REVERT`: A previous test swap was not made permanent; + swap back to the old image whose data are now in the secondary slot. If the + old image marks itself "OK" when it boots, the next boot will have swap type + `BOOT_SWAP_TYPE_NONE`. + +- `BOOT_SWAP_TYPE_FAIL`: Swap failed because image to be run is not valid. + +- `BOOT_SWAP_TYPE_PANIC`: Swapping encountered an unrecoverable error. + +The "swap type" is a high-level representation of the outcome of the +boot. Subsequent sections describe how MCUboot determines the swap type from +the bit-level contents of flash. + +### [Revert mechanism in direct-xip mode](#direct-xip-revert) + +The direct-xip mode also supports a "revert" mechanism which is the equivalent +of the swap mode's "revert" swap. When the direct-xip mode is selected it can be +enabled with the MCUBOOT_DIRECT_XIP_REVERT config option and an image trailer +must also be added to the signed images (the "--pad" option of the `imgtool` +script must be used). For more information on this please read the +[Image Trailer](#image-trailer) section and the [imgtool](imgtool.md) +documentation. Making the images permanent (marking them as confirmed in +advance) is also supported just like in swap mode. The individual steps of the +direct-xip mode's "revert" mechanism are the following: + +1. Select the slot which holds the newest potential image. +2. Was the image previously selected to run (during a previous boot)? + + Yes: Did the image mark itself "OK" (was the self-test successful)? + + Yes. + - Proceed to step 3. + + No. + - Erase the image from the slot to prevent it from being selected + again during the next boot. + - Return to step 1 (the bootloader will attempt to select and + possibly boot the previous image if there is one). + + No. + - Mark the image as "selected" (set the copy_done flag in the trailer). + - Proceed to step 3. +3. Proceed to image validation ... + +## [Image trailer](#image-trailer) + +For the bootloader to be able to determine the current state and what actions +should be taken during the current boot operation, it uses metadata stored in +the image flash areas. While swapping, some of this metadata is temporarily +copied into and out of the scratch area. + +This metadata is located at the end of the image flash areas, and is called an +image trailer. An image trailer has the following structure: + +``` + 0 1 2 3 + 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + ~ ~ + ~ Swap status (BOOT_MAX_IMG_SECTORS * min-write-size * 3) ~ + ~ ~ + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Encryption key 0 (16 octets) [*] | + | | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | 0xff padding as needed | + | (BOOT_MAX_ALIGN minus 16 octets from Encryption key 0) [*] | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Encryption key 1 (16 octets) [*] | + | | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | 0xff padding as needed | + | (BOOT_MAX_ALIGN minus 16 octets from Encryption key 1) [*] | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Swap size (4 octets) | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | 0xff padding as needed | + | (BOOT_MAX_ALIGN minus 4 octets from Swap size) | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Swap info | 0xff padding (BOOT_MAX_ALIGN minus 1 octet) | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Copy done | 0xff padding (BOOT_MAX_ALIGN minus 1 octet) | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Image OK | 0xff padding (BOOT_MAX_ALIGN minus 1 octet) | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | 0xff padding as needed | + | (BOOT_MAX_ALIGN minus 16 octets from MAGIC) | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | MAGIC (16 octets) | + | | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ +``` + +[*]: Only present if the encryption option is enabled (`MCUBOOT_ENC_IMAGES`). + +The offset immediately following such a record represents the start of the next +flash area. + +--- +***Note*** + +*"min-write-size" is a property of the flash hardware. If the hardware* +*allows individual bytes to be written at arbitrary addresses, then* +*min-write-size is 1. If the hardware only allows writes at even addresses,* +*then min-write-size is 2, and so on.* + +--- + +An image trailer contains the following fields: + +1. Swap status: A series of records which records the progress of an image + swap. To swap entire images, data are swapped between the two image areas + one or more sectors at a time, like this: + + - sector data in the primary slot is copied into scratch, then erased + - sector data in the secondary slot is copied into the primary slot, + then erased + - sector data in scratch is copied into the secondary slot + +As it swaps images, the bootloader updates the swap status field in a way that +allows it to compute how far this swap operation has progressed for each +sector. The swap status field can thus used to resume a swap operation if the +bootloader is halted while a swap operation is ongoing and later reset. The +`BOOT_MAX_IMG_SECTORS` value is the configurable maximum number of sectors +MCUboot supports for each image; its value defaults to 128, but allows for +either decreasing this size, to limit RAM usage, or to increase it in devices +that have massive amounts of Flash or very small sized sectors and thus require +a bigger configuration to allow for the handling of all slot's sectors. +The factor of min-write-size is due to the behavior of flash hardware. The factor +of 3 is explained below. + +2. Encryption keys: key-encrypting keys (KEKs). These keys are needed for + image encryption and decryption. See the + [encrypted images](encrypted_images.md) document for more information. + +3. Swap size: When beginning a new swap operation, the total size that needs + to be swapped (based on the slot with largest image + TLVs) is written to + this location for easier recovery in case of a reset while performing the + swap. + +4. Swap info: A single byte which encodes the following information: + - Swap type: Stored in bits 0-3. Indicating the type of swap operation in + progress. When MCUboot resumes an interrupted swap, it uses this field to + determine the type of operation to perform. This field contains one of the + following values in the table below. + - Image number: Stored in bits 4-7. It has always 0 value at single image + boot. In case of multi image boot it indicates, which image was swapped when + interrupt happened. The same scratch area is used during in case of all + image swap operation. Therefore this field is used to determine which image + the trailer belongs to if boot status is found on scratch area when the swap + operation is resumed. + +| Name | Value | +| ------------------------- | ----- | +| `BOOT_SWAP_TYPE_TEST` | 2 | +| `BOOT_SWAP_TYPE_PERM` | 3 | +| `BOOT_SWAP_TYPE_REVERT` | 4 | + + +5. Copy done: A single byte indicating whether the image in this slot is + complete (0x01=done; 0xff=not done). + +6. Image OK: A single byte indicating whether the image in this slot has been + confirmed as good by the user (0x01=confirmed; 0xff=not confirmed). + +7. MAGIC: A 16-byte field identifying the image trailer layout. It may assume + distinct values depending on the maximum supported write alignment + (`BOOT_MAX_ALIGN`) of the image, as defined by the following construct: + +``` c +union boot_img_magic_t +{ + struct { + uint16_t align; + uint8_t magic[14]; + }; + uint8_t val[16]; +}; +``` + If `BOOT_MAX_ALIGN` is **8 bytes**, then MAGIC contains the following 16 bytes: + +``` c +const union boot_img_magic_t boot_img_magic = { + .val = { + 0x77, 0xc2, 0x95, 0xf3, + 0x60, 0xd2, 0xef, 0x7f, + 0x35, 0x52, 0x50, 0x0f, + 0x2c, 0xb6, 0x79, 0x80 + } +}; +``` + + In case `BOOT_MAX_ALIGN` is defined to any value different than **8**, then the maximum + supported write alignment value is encoded in the MAGIC field, followed by a fixed + 14-byte pattern: + +``` c +const union boot_img_magic_t boot_img_magic = { + .align = BOOT_MAX_ALIGN, + .magic = { + 0x2d, 0xe1, + 0x5d, 0x29, 0x41, 0x0b, + 0x8d, 0x77, 0x67, 0x9c, + 0x11, 0x0f, 0x1f, 0x8a + } +}; +``` + +--- +***Note*** +Be aware that the image trailers make the ending area of the image slot +unavailable for carrying the image data. In particular, the swap status size +could be huge. For example, for 128 slot sectors with a 4-byte alignment, +it would become 1536 B. + +--- + +## [Image trailers](#image-trailers) + +At startup, the bootloader determines the boot swap type by inspecting the +image trailers. When using the term "image trailers" what is meant is the +aggregate information provided by both image slot's trailers. + +### [New swaps (non-resumes)](#new-swaps-non-resumes) + +For new swaps, MCUboot must inspect a collection of fields to determine which +swap operation to perform. + +The image trailers records are structured around the limitations imposed by +flash hardware. As a consequence, they do not have a very intuitive design, and +it is difficult to get a sense of the state of the device just by looking at the +image trailers. It is better to map all the possible trailer states to the swap +types described above via a set of tables. These tables are reproduced below. + +--- +***Note*** + +*An important caveat about the tables described below is that they must* +*be evaluated in the order presented here. Lower state numbers must have a* +*higher priority when testing the image trailers.* + +--- + +``` + State I + | primary slot | secondary slot | + -----------------+--------------+----------------| + magic | Any | Good | + image-ok | Any | Unset | + copy-done | Any | Any | + -----------------+--------------+----------------' + result: BOOT_SWAP_TYPE_TEST | + -------------------------------------------------' + + + State II + | primary slot | secondary slot | + -----------------+--------------+----------------| + magic | Any | Good | + image-ok | Any | 0x01 | + copy-done | Any | Any | + -----------------+--------------+----------------' + result: BOOT_SWAP_TYPE_PERM | + -------------------------------------------------' + + + State III + | primary slot | secondary slot | + -----------------+--------------+----------------| + magic | Good | Unset | + image-ok | 0xff | Any | + copy-done | 0x01 | Any | + -----------------+--------------+----------------' + result: BOOT_SWAP_TYPE_REVERT | + -------------------------------------------------' +``` + +Any of the above three states results in MCUboot attempting to swap images. + +Otherwise, MCUboot does not attempt to swap images, resulting in one of the +other three swap types, as illustrated by State IV. + +``` + State IV + | primary slot | secondary slot | + -----------------+--------------+----------------| + magic | Any | Any | + image-ok | Any | Any | + copy-done | Any | Any | + -----------------+--------------+----------------' + result: BOOT_SWAP_TYPE_NONE, | + BOOT_SWAP_TYPE_FAIL, or | + BOOT_SWAP_TYPE_PANIC | + -------------------------------------------------' +``` + +In State IV, when no errors occur, MCUboot will attempt to boot the contents of +the primary slot directly, and the result is `BOOT_SWAP_TYPE_NONE`. If the image +in the primary slot is not valid, the result is `BOOT_SWAP_TYPE_FAIL`. If a +fatal error occurs during boot, the result is `BOOT_SWAP_TYPE_PANIC`. If the +result is either `BOOT_SWAP_TYPE_FAIL` or `BOOT_SWAP_TYPE_PANIC`, MCUboot hangs +rather than booting an invalid or compromised image. + +--- +***Note*** + +*An important caveat to the above is the result when a swap is requested* +*and the image in the secondary slot fails to validate, due to a hashing or* +*signing error. This state behaves as State IV with the extra action of* +*marking the image in the primary slot as "OK", to prevent further attempts* +*to swap.* + +--- + +### [Resumed swaps](#resumed-swaps) + +If MCUboot determines that it is resuming an interrupted swap (i.e., a reset +occurred mid-swap), it fully determines the operation to resume by reading the +`swap info` field from the active trailer and extracting the swap type from bits +0-3. The set of tables in the previous section are not necessary in the resume +case. + +## [High-level operation](#high-level-operation) + +With the terms defined, we can now explore the bootloader's operation. First, +a high-level overview of the boot process is presented. Then, the following +sections describe each step of the process in more detail. + +Procedure: + +1. Inspect swap status region; is an interrupted swap being resumed? + + Yes: Complete the partial swap operation; skip to step 3. + + No: Proceed to step 2. + +2. Inspect image trailers; is a swap requested? + + Yes: + 1. Is the requested image valid (integrity and security check)? + + Yes. + a. Perform swap operation. + b. Persist completion of swap procedure to image trailers. + c. Proceed to step 3. + + No. + a. Erase invalid image. + b. Persist failure of swap procedure to image trailers. + c. Proceed to step 3. + + + No: Proceed to step 3. + +3. Boot into image in primary slot. + +### [Multiple image boot](#multiple-image-boot) + +When the flash contains multiple executable images the bootloader's operation +is a bit more complex but similar to the previously described procedure with +one image. Every image can be updated independently therefore the flash is +partitioned further to arrange two slots for each image. +``` ++--------------------+ +| MCUboot | ++--------------------+ + ~~~~~ <- memory might be not contiguous ++--------------------+ +| Image 0 | +| primary slot | ++--------------------+ +| Image 0 | +| secondary slot | ++--------------------+ + ~~~~~ <- memory might be not contiguous ++--------------------+ +| Image N | +| primary slot | ++--------------------+ +| Image N | +| secondary slot | ++--------------------+ +| Scratch | ++--------------------+ +``` +MCUboot is also capable of handling dependencies between images. For example +if an image needs to be reverted it might be necessary to revert another one too +(e.g. due to API incompatibilities) or simply to prevent from being updated +because of an unsatisfied dependency. Therefore all aborted swaps have to be +completed and all the swap types have to be determined for each image before +the dependency checks. Dependency handling is described in more detail in a +following section. The multiple image boot procedure is organized in loops which +iterate over all the firmware images. The high-level overview of the boot +process is presented below. + ++ Loop 1. Iterate over all images + 1. Inspect swap status region of current image; is an interrupted swap being + resumed? + + Yes: + + Review the validity of previously determined swap types + of other images. + + Complete the partial swap operation. + + Mark the swap type as `None`. + + Skip to next image. + + No: Proceed to step 2. + + 2. Inspect image trailers in the primary and secondary slot; is an image + swap requested? + + Yes: Review the validity of previously determined swap types of other + images. Is the requested image valid (integrity and security + check)? + + Yes: + + Set the previously determined swap type for the current image. + + Skip to next image. + + No: + + Erase invalid image. + + Persist failure of swap procedure to image trailers. + + Mark the swap type as `Fail`. + + Skip to next image. + + No: + + Mark the swap type as `None`. + + Skip to next image. + ++ Loop 2. Iterate over all images + 1. Does the current image depend on other image(s)? + + Yes: Are all the image dependencies satisfied? + + Yes: Skip to next image. + + No: + + Modify swap type depending on what the previous type was. + + Restart dependency check from the first image. + + No: Skip to next image. + ++ Loop 3. Iterate over all images + 1. Is an image swap requested? + + Yes: + + Perform image update operation. + + Persist completion of swap procedure to image trailers. + + Skip to next image. + + No: Skip to next image. + ++ Loop 4. Iterate over all images + 1. Validate image in the primary slot (integrity and security check) or + at least do a basic sanity check to avoid booting into an empty flash + area. + ++ Boot into image in the primary slot of the 0th image position\ + (other image in the boot chain is started by another image). + +### [Multiple image boot for RAM loading and direct-xip](#multiple-image-boot-for-ram-loading-and-direct-xip) + +The operation of the bootloader is different when the ram-load or the +direct-xip strategy is chosen. The flash map is very similar to the swap +strategy but there is no need for Scratch area. + ++ Loop 1. Until all images are loaded and all dependencies are satisfied + 1. Subloop 1. Iterate over all images + + Does any of the slots contain an image? + + Yes: + + Choose the newer image. + + Copy it to RAM in case of ram-load strategy. + + Validate the image (integrity and security check). + + If validation fails delete the image from flash and try the other + slot. (Image must be deleted from RAM too in case of ram-load + strategy.) + + No: Return with failure. + + 2. Subloop 2. Iterate over all images + + Does the current image depend on other image(s)? + + Yes: Are all the image dependencies satisfied? + + Yes: Skip to next image. + + No: + + Delete the image from RAM in case of ram-load strategy, but + do not delete it from flash. + + Try to load the image from the other slot. + + Restart dependency check from the first image. + + No: Skip to next image. + ++ Loop 2. Iterate over all images + + Increase the security counter if needed. + + Do the measured boot and the data sharing if needed. + ++ Boot the loaded slot of image 0. + +## [Image swapping](#image-swapping) + +The bootloader swaps the contents of the two image slots for two reasons: + + * User has issued a "set pending" operation; the image in the secondary slot + should be run once (state I) or repeatedly (state II), depending on + whether a permanent swap was specified. + * Test image rebooted without being confirmed; the bootloader should + revert to the original image currently in the secondary slot (state III). + +If the image trailers indicates that the image in the secondary slot should be +run, the bootloader needs to copy it to the primary slot. The image currently +in the primary slot also needs to be retained in flash so that it can be used +later. Furthermore, both images need to be recoverable if the bootloader +resets in the middle of the swap operation. The two images are swapped +according to the following procedure: + +1. Determine if both slots are compatible enough to have their images swapped. + To be compatible, both have to have only sectors that can fit into the + scratch area and if one of them has larger sectors than the other, it must + be able to entirely fit some rounded number of sectors from the other slot. + In the next steps we'll use the terminology "region" for the total amount of + data copied/erased because this can be any amount of sectors depending on + how many the scratch is able to fit for some swap operation. +2. Iterate the list of region indices in descending order (i.e., starting + with the greatest index); only regions that are predetermined to be part of + the image are copied; current element = "index". + + a. Erase scratch area. + + b. Copy secondary_slot[index] to scratch area. + - If this is the last region in the slot, scratch area has a temporary + status area initialized to store the initial state, because the + primary slot's last region will have to be erased. In this case, + only the data that was calculated to amount to the image is copied. + - Else if this is the first swapped region but not the last region in + the slot, initialize the status area in primary slot and copy the + full region contents. + - Else, copy entire region contents. + + c. Write updated swap status (i). + + d. Erase secondary_slot[index] + + e. Copy primary_slot[index] to secondary_slot[index] according to amount + previosly copied at step b. + - If this is not the last region in the slot, erase the trailer in the + secondary slot, to always use the one in the primary slot. + + f. Write updated swap status (ii). + + g. Erase primary_slot[index]. + + h. Copy scratch area to primary_slot[index] according to amount + previously copied at step b. + - If this is the last region in the slot, the status is read from + scratch (where it was stored temporarily) and written anew in the + primary slot. + + i. Write updated swap status (iii). +3. Persist completion of swap procedure to the primary slot image trailer. + +The additional caveats in step 2f are necessary so that the secondary slot image +trailer can be written by the user at a later time. With the image trailer +unwritten, the user can test the image in the secondary slot +(i.e., transition to state I). + +--- +***Note*** + +*If the region being copied contains the last sector, then swap status is* +*temporarily maintained on scratch for the duration of this operation, always* +*using the primary slot's area otherwise.* + +--- +***Note*** + +*The bootloader tries to copy only used sectors (based on largest image* +*installed on any of the slots), minimizing the amount of sectors copied and* +*reducing the amount of time required for a swap operation.* + +--- + +The particulars of step 3 vary depending on whether an image is being tested, +permanently used, reverted or a validation failure of the secondary slot +happened when a swap was requested: + + * test: + o Write primary_slot.copy_done = 1 + (swap caused the following values to be written: + primary_slot.magic = BOOT_MAGIC + secondary_slot.magic = UNSET + primary_slot.image_ok = Unset) + + * permanent: + o Write primary_slot.copy_done = 1 + (swap caused the following values to be written: + primary_slot.magic = BOOT_MAGIC + secondary_slot.magic = UNSET + primary_slot.image_ok = 0x01) + + * revert: + o Write primary_slot.copy_done = 1 + o Write primary_slot.image_ok = 1 + (swap caused the following values to be written: + primary_slot.magic = BOOT_MAGIC) + + * failure to validate the secondary slot: + o Write primary_slot.image_ok = 1 + +After completing the operations as described above the image in the primary slot +should be booted. + +## [Swap status](#swap-status) + +The swap status region allows the bootloader to recover in case it restarts in +the middle of an image swap operation. The swap status region consists of a +series of single-byte records. These records are written independently, and +therefore must be padded according to the minimum write size imposed by the +flash hardware. In the below figure, a min-write-size of 1 is assumed for +simplicity. The structure of the swap status region is illustrated below. In +this figure, a min-write-size of 1 is assumed for simplicity. + +``` + 0 1 2 3 + 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + |sec127,state 0 |sec127,state 1 |sec127,state 2 |sec126,state 0 | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + |sec126,state 1 |sec126,state 2 |sec125,state 0 |sec125,state 1 | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + |sec125,state 2 | | + +-+-+-+-+-+-+-+-+ + + ~ ~ + ~ [Records for indices 124 through 1 ~ + ~ ~ + ~ +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + ~ |sec000,state 0 |sec000,state 1 |sec000,state 2 | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ +``` + +The above is probably not helpful at all; here is a description in English. + +Each image slot is partitioned into a sequence of flash sectors. If we were to +enumerate the sectors in a single slot, starting at 0, we would have a list of +sector indices. Since there are two image slots, each sector index would +correspond to a pair of sectors. For example, sector index 0 corresponds to +the first sector in the primary slot and the first sector in the secondary slot. +Finally, reverse the list of indices such that the list starts with index +`BOOT_MAX_IMG_SECTORS - 1` and ends with 0. The swap status region is a +representation of this reversed list. + +During a swap operation, each sector index transitions through four separate +states: +``` +0. primary slot: image 0, secondary slot: image 1, scratch: N/A +1. primary slot: image 0, secondary slot: N/A, scratch: image 1 (1->s, erase 1) +2. primary slot: N/A, secondary slot: image 0, scratch: image 1 (0->1, erase 0) +3. primary slot: image 1, secondary slot: image 0, scratch: N/A (s->0) +``` + +Each time a sector index transitions to a new state, the bootloader writes a +record to the swap status region. Logically, the bootloader only needs one +record per sector index to keep track of the current swap state. However, due +to limitations imposed by flash hardware, a record cannot be overwritten when +an index's state changes. To solve this problem, the bootloader uses three +records per sector index rather than just one. + +Each sector-state pair is represented as a set of three records. The record +values map to the above four states as follows + +``` + | rec0 | rec1 | rec2 + --------+------+------+------ + state 0 | 0xff | 0xff | 0xff + state 1 | 0x01 | 0xff | 0xff + state 2 | 0x01 | 0x02 | 0xff + state 3 | 0x01 | 0x02 | 0x03 +``` + +The swap status region can accommodate `BOOT_MAX_IMG_SECTORS` sector indices. +Hence, the size of the region, in bytes, is +`BOOT_MAX_IMG_SECTORS * min-write-size * 3`. The only requirement for the index +count is that it is great enough to account for a maximum-sized image +(i.e., at least as great as the total sector count in an image slot). If a +device's image slots have been configured with `BOOT_MAX_IMG_SECTORS: 128` and +use less than 128 sectors, the first record that gets written will be somewhere +in the middle of the region. For example, if a slot uses 64 sectors, the first +sector index that gets swapped is 63, which corresponds to the exact halfway +point within the region. + +--- +***Note*** + +*Since the scratch area only ever needs to record swapping of the last* +*sector, it uses at most min-write-size * 3 bytes for its own status area.* + +--- + +## [Reset recovery](#reset-recovery) + +If the bootloader resets in the middle of a swap operation, the two images may +be discontiguous in flash. Bootutil recovers from this condition by using the +image trailers to determine how the image parts are distributed in flash. + +The first step is determine where the relevant swap status region is located. +Because this region is embedded within the image slots, its location in flash +changes during a swap operation. The below set of tables map image trailers +contents to swap status location. In these tables, the "source" field +indicates where the swap status region is located. In case of multi image boot +the images primary area and the single scratch area is always examined in pairs. +If swap status found on scratch area then it might not belong to the current +image. The swap_info field of swap status stores the corresponding image number. +If it does not match then "source: none" is returned. + +``` + | primary slot | scratch | + ----------+--------------+--------------| + magic | Good | Any | + copy-done | 0x01 | N/A | + ----------+--------------+--------------' + source: none | + ----------------------------------------' + + | primary slot | scratch | + ----------+--------------+--------------| + magic | Good | Any | + copy-done | 0xff | N/A | + ----------+--------------+--------------' + source: primary slot | + ----------------------------------------' + + | primary slot | scratch | + ----------+--------------+--------------| + magic | Any | Good | + copy-done | Any | N/A | + ----------+--------------+--------------' + source: scratch | + ----------------------------------------' + + | primary slot | scratch | + ----------+--------------+--------------| + magic | Unset | Any | + copy-done | 0xff | N/A | + ----------+--------------+--------------| + source: primary slot | + ----------------------------------------+------------------------------+ + This represents one of two cases: | + o No swaps ever (no status to read, so no harm in checking). | + o Mid-revert; status in the primary slot. | + For this reason we assume the primary slot as source, to trigger a | + check of the status area and find out if there was swapping under way. | + -----------------------------------------------------------------------' +``` + +If the swap status region indicates that the images are not contiguous, MCUboot +determines the type of swap operation that was interrupted by reading the `swap +info` field in the active image trailer and extracting the swap type from bits +0-3 then resumes the operation. In other words, it applies the procedure defined +in the previous section, moving image 1 into the primary slot and image 0 into +the secondary slot. If the boot status indicates that an image part is present +in the scratch area, this part is copied into the correct location by starting +at step e or step h in the area-swap procedure, depending on whether the part +belongs to image 0 or image 1. + +After the swap operation has been completed, the bootloader proceeds as though +it had just been started. + +## [Integrity check](#integrity-check) + +An image is checked for integrity immediately before it gets copied into the +primary slot. If the bootloader doesn't perform an image swap, then it can +perform an optional integrity check of the image in the primary slot if +`MCUBOOT_VALIDATE_PRIMARY_SLOT` is set, otherwise it doesn't perform an +integrity check. + +During the integrity check, the bootloader verifies the following aspects of +an image: + + * 32-bit magic number must be correct (`IMAGE_MAGIC`). + * Image must contain an `image_tlv_info` struct, identified by its magic + (`IMAGE_TLV_PROT_INFO_MAGIC` or `IMAGE_TLV_INFO_MAGIC`) exactly following + the firmware (`hdr_size` + `img_size`). If `IMAGE_TLV_PROT_INFO_MAGIC` is + found then after `ih_protect_tlv_size` bytes, another `image_tlv_info` + with magic equal to `IMAGE_TLV_INFO_MAGIC` must be present. + * Image must contain a SHA256 TLV. + * Calculated SHA256 must match SHA256 TLV contents. + * Image *may* contain a signature TLV. If it does, it must also have a + KEYHASH TLV with the hash of the key that was used to sign. The list of + keys will then be iterated over looking for the matching key, which then + will then be used to verify the image contents. + +For low performance MCU's where the validation is a heavy process at boot +(~1-2 seconds on a arm-cortex-M0), the `MCUBOOT_VALIDATE_PRIMARY_SLOT_ONCE` +could be used. This option will cache the validation result as described above +into the magic area of the primary slot. The next boot, the validation will be +skipped if the previous validation was succesfull. This option is reducing the +security level since if an attacker could modify the contents of the flash after +a good image has been validated, the attacker could run his own image without +running validation again. Enabling this option should be done with care. + +## [Security](#security) + +As indicated above, the final step of the integrity check is signature +verification. The bootloader can have one or more public keys embedded in it +at build time. During signature verification, the bootloader verifies that an +image was signed with a private key that corresponds to the embedded KEYHASH +TLV. + +For information on embedding public keys in the bootloader, as well as +producing signed images, see: [signed_images](signed_images.md). + +If you want to enable and use encrypted images, see: +[encrypted_images](encrypted_images.md). + +--- +***Note*** + +*Image encryption is not supported when the direct-xip upgrade strategy* +*is selected.* + +--- + +### [Using hardware keys for verification](#hw-key-support) + +By default, the whole public key is embedded in the bootloader code and its +hash is added to the image manifest as a KEYHASH TLV entry. As an alternative +the bootloader can be made independent of the keys (avoiding the incorporation +of the public key into the code) by using one of the following options: +`MCUBOOT_HW_KEY` or `MCUBOOT_BUILTIN_KEY`. + +Using any of these options makes MCUboot independent from the public key(s). +The key(s) can be provisioned any time and by different parties. + +Hardware KEYs support options details: +- `MCUBOOT_HW_KEY`: In this case the hash of the public key must be +provisioned to the target device and MCUboot must be able to retrieve the +key-hash from there. For this reason the target must provide a definition +for the `boot_retrieve_public_key_hash()` function which is declared in +`boot/bootutil/include/bootutil/sign_key.h`. It is also required to use +the `full` option for the `--public-key-format` imgtool argument in order to +add the whole public key (PUBKEY TLV) to the image manifest instead of its +hash (KEYHASH TLV). During boot the public key is validated before using it for +signature verification, MCUboot calculates the hash of the public key from the +TLV area and compares it with the key-hash that was retrieved from the device. +- `MCUBOOT_BUILTIN_KEY`: With this option the whole public key(s) used for +signature verification must be provisioned to the target device and the used +[cryptographic library](PORTING.md) must support the usage of builtin keys based +on key IDs. In this case, neither the code nor the image metadata needs to +contain any public key data. During image validation only a key ID is passed to +the verifier function. The key handling is entirely the responsibility of the +crypto library and the details of the key handling mechanism are abstracted away +from the boot code.\ +***Note:*** *At the moment the usage of builtin keys is only available with the* +*PSA Crypto API based crypto backend (`MCUBOOT_USE_PSA_CRYPTO`) for ECDSA* +*signatures.* + +## [Protected TLVs](#protected-tlvs) + +If the TLV area contains protected TLV entries, by beginning with a `struct +image_tlv_info` with a magic value of `IMAGE_TLV_PROT_INFO_MAGIC` then the +data of those TLVs must also be integrity and authenticity protected. Beyond +the full size of the protected TLVs being stored in the `image_tlv_info`, +the size of the protected TLVs together with the size of the `image_tlv_info` +struct itself are also saved in the `ih_protected_size` field inside the +header. + +Whenever an image has protected TLVs the SHA256 has to be calculated over +not just the image header and the image but also the TLV info header and the +protected TLVs. + +``` +A +---------------------+ + | Header | <- struct image_header + +---------------------+ + | Payload | + +---------------------+ + | TLV area | + | +-----------------+ | struct image_tlv_info with + | | TLV area header | | <- IMAGE_TLV_PROT_INFO_MAGIC (optional) + | +-----------------+ | + | | Protected TLVs | | <- Protected TLVs (struct image_tlv) +B | +-----------------+ | + | | TLV area header | | <- struct image_tlv_info with IMAGE_TLV_INFO_MAGIC +C | +-----------------+ | + | | SHA256 hash | | <- hash from A - B (struct image_tlv) +D | +-----------------+ | + | | Keyhash | | <- indicates which pub. key for sig (struct image_tlv) + | +-----------------+ | + | | Signature | | <- signature from C - D (struct image_tlv), only hash + | +-----------------+ | + +---------------------+ +``` + +## [Dependency check](#dependency-check) + +MCUboot can handle multiple firmware images. It is possible to update them +independently but in many cases it can be desired to be able to describe +dependencies between the images (e.g. to ensure API compliance and avoid +interoperability issues). + +The dependencies between images can be described with additional TLV entries in +the protected TLV area after the end of an image. There can be more than one +dependency entry, but in practice if the platform only supports two individual +images then there can be maximum one entry which reflects to the other image. + +At the phase of dependency check all aborted swaps are finalized if there were +any. During the dependency check the bootloader verifies whether the image +dependencies are all satisfied. If at least one of the dependencies of an image +is not fulfilled then the swap type of that image has to be modified +accordingly and the dependency check needs to be restarted. This way the number +of unsatisfied dependencies will decrease or remain the same. There is always at +least 1 valid configuration. In worst case, the system returns to the initial +state after dependency check. + +For more information on adding dependency entries to an image, +see: [imgtool](imgtool.md). + +## [Downgrade prevention](#downgrade-prevention) + +Downgrade prevention is a feature which enforces that the new image must have a +higher version/security counter number than the image it is replacing, thus +preventing the malicious downgrading of the device to an older and possibly +vulnerable version of its firmware. + +### [Software-based downgrade prevention](#sw-downgrade-prevention) + +During the software based downgrade prevention the image version numbers are +compared. This feature is enabled with the `MCUBOOT_DOWNGRADE_PREVENTION` +option. In this case downgrade prevention is only available when the +overwrite-based image update strategy is used (i.e. `MCUBOOT_OVERWRITE_ONLY` +is set). + +### [Hardware-based downgrade prevention](#hw-downgrade-prevention) + +Each signed image can contain a security counter in its protected TLV area, which +can be added to the image using the `-s` option of the [imgtool](imgtool.md) script. +During the hardware based downgrade prevention (alias rollback protection) the +new image's security counter will be compared with the currently active security +counter value which must be stored in a non-volatile and trusted component of +the device. It is beneficial to handle this counter independently from image +version number: + + * It does not need to increase with each software release, + * It makes it possible to do software downgrade to some extent: if the + security counter has the same value in the older image then it is accepted. + +It is an optional step of the image validation process and can be enabled with +the `MCUBOOT_HW_ROLLBACK_PROT` config option. When enabled, the target must +provide an implementation of the security counter interface defined in +`boot/bootutil/include/security_cnt.h`. + +## [Measured boot and data sharing](#boot-data-sharing) + +MCUboot defines a mechanism for sharing boot status information (also known as +measured boot) and an interface for sharing application specific information +with the runtime software. If any of these are enabled the target must provide +a shared data area between the bootloader and runtime firmware and define the +following parameters: + +```c +#define MCUBOOT_SHARED_DATA_BASE +#define MCUBOOT_SHARED_DATA_SIZE +``` + +In the shared memory area all data entries are stored in a type-length-value +(TLV) format. Before adding the first data entry, the whole area is overwritten +with zeros and a TLV header is added at the beginning of the area during an +initialization phase. This TLV header contains a `tlv_magic` field with a value +of `SHARED_DATA_TLV_INFO_MAGIC` and a `tlv_tot_len` field which is indicating +the total length of shared TLV area including this header. The header is +followed by the the data TLV entries which are composed from a +`shared_data_tlv_entry` header and the data itself. In the data header there is +a `tlv_type` field which identifies the consumer of the entry (in the runtime +software) and specifies the subtype of that data item. More information about +the `tlv_type` field and data types can be found in the +`boot/bootutil/include/bootutil/boot_status.h` file. The type is followed by a +`tlv_len` field which indicates the size of the data entry in bytes, not +including the entry header. After this header structure comes the actual data. + +```c +/** Shared data TLV header. All fields in little endian. */ +struct shared_data_tlv_header { + uint16_t tlv_magic; + uint16_t tlv_tot_len; /* size of whole TLV area (including this header) */ +}; + +/** Shared data TLV entry header format. All fields in little endian. */ +struct shared_data_tlv_entry { + uint16_t tlv_type; + uint16_t tlv_len; /* TLV data length (not including this header). */ +}; +``` + +The measured boot can be enabled with the `MCUBOOT_MEASURED_BOOT` config option. +When enabled, the `--boot_record` argument of the imgtool script must also be +used during the image signing process to add a BOOT_RECORD TLV to the image +manifest. This TLV contains the following attributes/measurements of the +image in CBOR encoded format: + + * Software type (role of the software component) + * Software version + * Signer ID (identifies the signing authority) + * Measurement value (hash of the image) + * Measurement type (algorithm used to calculate the measurement value) + +The `sw_type` string that is passed as the `--boot_record` option's parameter +will be the value of the "Software type" attribute in the generated BOOT_RECORD +TLV. The target must also define the `MAX_BOOT_RECORD_SZ` macro which indicates +the maximum size of the CBOR encoded boot record in bytes. +During boot, MCUboot will look for these TLVs (in case of multiple images) in +the manifests of the active images (the latest and validated) and copy the CBOR +encoded binary data to the shared data area. Preserving all these image +attributes from the boot stage for use by later runtime services (such as an +attestation service) is known as a measured boot. + +Setting the `MCUBOOT_DATA_SHARING` option enables the sharing of application +specific data using the same shared data area as for the measured boot. For +this, the target must provide a definition for the `boot_save_shared_data()` +function which is declared in `boot/bootutil/include/bootutil/boot_record.h`. +The `boot_add_data_to_shared_area()` function can be used for adding new TLV +entries to the shared data area. Alternatively, setting the +`MCUBOOT_DATA_SHARING_BOOTINFO` option will provide a default function for +this which saves information such as the maximum application size, bootloader +version (if available), running slot number, if recovery is part of MCUboot +and the signature type. Details of the TLVs for this information can be found +in `boot/bootutil/include/bootutil/boot_status.h` with `BLINFO_` prefixes. + +## [Testing in CI](#testing-in-ci) + +### [Testing Fault Injection Hardening (FIH)](#testing-fih) + +The CI currently tests the Fault Injection Hardening feature of MCUboot by +executing instruction skip during execution, and looking at whether a corrupted +image was booted by the bootloader or not. + +The main idea is that instruction skipping can be automated by scripting a +debugger to automatically execute the following steps: + +- Set breakpoint at specified address. +- Continue execution. +- On breakpoint hit increase the Program Counter. +- Continue execution. +- Detach from target after a timeout reached. + +Whether or not the corrupted image was booted or not can be decided by looking +for certain entries in the log. + +As MCUboot is deployed on a microcontroller, testing FI would not make much +sense in the simulator environment running on a host machine with different +architecture than the MCU's, as the degree of hardening depends on compiler +behavior. For example, (a bit counterintuitively) the code produced by gcc +with `-O0` optimisation is more resilient against FI attacks than the code +generated with `-O3` or `-Os` optimizations. + +To run on a desired architecture in the CI, the tests need to be executed on an +emulator (as real devices are not available in the CI environment). For this +implementation QEMU is selected. + +For the tests MCUboot needs a set of drivers and an implementation of a main +function. For the purpose of this test Trusted-Firmware-M has been selected as +it supports Armv8-M platforms that are also emulated by QEMU. + +The tests run in a docker container inside the CI VMs, to make it more easy to +deploy build and test environment (QEMU, compilers, interpreters). The CI VMs +seems to be using quite old Ubuntu (16.04). + +The sequence of the testing is the following (pseudo code): + +```sh +fn main() + # Implemented in ci/fih-tests_install.sh + generate_docker_image(Dockerfile) + + # See details below. Implemented in ci/fih-tests_run.sh. + # Calling the function with different parameters is done by Travis CI based on + # the values provided in the .travis.yaml + start_docker_image(skip_sizes, build_type, damage_type, fih_level) + +fn start_docker_image(skip_sizes, build_type, damage_type, fih_level) + # implemented in ci/fih_test_docker/execute_test.sh + compile_mcuboot(build_type) + + # implemented in ci/fih_test_docker/damage_image.py + damage_image(damage_type) + + # implemented in ci/fih_test_docker/run_fi_test.sh + ranges = generate_address_ranges() + for s in skip_sizes + for r in ranges + do_skip_in_qemu(s, r) # See details below + evaluate_logs() + +fn do_skip_in_qemu(size, range) + for a in r + run_qemu(a, size) # See details below + +# this part is implemented in ci/fih_test_docker/fi_tester_gdb.sh +fn run_qemu(a, size) + script = create_debugger_script(a, size) + start_qemu_in_bacground() # logs serial out to a file + gdb_attach_to_qemu(script) + kill_qemu() + + # This checks the debugger and the quemu logs, and decides whether the tets + # was executed successfully, and whether the image is booted or not. Then + # emits a yaml fragment on the standard out to be processed by the caller + # script + evaluate_run(qemu_log_file) +``` + +Further notes: + +- The image is corrupted by changing its signature. +- MCUBOOT_FIH_PROFILE_MAX is not tested as it requires TRNG, and the AN521 +platform has no support for it. However this profile adds the random +execution delay to the code, so should not affect the instruction skip results +too much, because break point is placed at exact address. But in practice this +makes harder the accurate timing of the attack. +- The test cases defined in .travis.yml always return `passed`, if they were +executed successfully. A yaml file is created during test execution with the +details of the test execution results. A summary of the collected results is +printed in the log at the end of the test. + +An advantage of having the tests running in a docker image is that it is +possible to run the tests on a local machine that has git and docker, without +installing any additional software. + +So, running the test on the host looks like the following (The commands below +are issued from the MCUboot source directory): + +```sh +$ mkdir docker +$ ./ci/fih-tests_install.sh +$ FIH_LEVEL=MEDIUM BUILD_TYPE=RELEASE SKIP_SIZE=2 DAMAGE_TYPE=SIGNATURE \ + ./ci/fih-tests_run.sh +``` +On the travis CI the environment variables in the last command are set based on +the configs provided in the `.travis.yaml` + +This starts the tests, however the shell that it is running in is not +interactive, it is not possible to examine the results of the test run. To have +an interactive shell where the results can be examined, the following can be +done: + +- The docker image needs to be built with `ci/fih-tests_install.sh` as described + above. +- Start the docker image with the following command: + `docker run -i -t mcuboot/fih-test`. +- Execute the test with a command similar to the following: + `/root/execute_test.sh 8 RELEASE SIGNATURE MEDIUM`. After the test finishes, + the shell returns, and it is possible to investigate the results. It is also + possible to stop the test with _Ctrl+c_. The parameters to the + `execute_test.sh` are `SKIP_SIZE`, `BUILD_TYPE`, `DAMAGE_TYPE`, `FIH_LEVEL` in + order. diff --git a/bootloader/mcuboot/docs/ecdsa.md b/bootloader/mcuboot/docs/ecdsa.md new file mode 100644 index 0000000..d3a5a25 --- /dev/null +++ b/bootloader/mcuboot/docs/ecdsa.md @@ -0,0 +1,90 @@ +# ECDSA signature format + +When the ECDSA SECP256R1 (EC256) signature support was added to MCUboot, a +shortcut was taken, and these signatures were padded to make them +always a fixed length. Unfortunately, this padding was done in a way +that is not easily reversible. Some crypto libraries (specifically, Mbed +TLS) are fairly strict about the formatting of the ECDSA signature. + +There are two ways to fix this: + + - Use a reversible padding scheme. This solution requires + at least one pad byte to always be added (to set the length). This + padding would be somewhat incompatible across versions (older + EC256 would work, while newer MCUboot code would reject old + signatures. The EC code would work reliably only in the new + combination). + + - Remove the padding entirely. Depending on the tool used, this solution + requires some rethinking of how TLV generation is implemented so + that the length does not need to be known until the signature is + generated. These tools are usually written in higher-level + languages, so this change should not be difficult. + + However, this will also break compatibility with older versions, + because images generated with newer tools will not + work with older versions of MCUboot. + +This document proposes a multi-stage approach to give a transition +period: + + 1. Add a `--no-pad-sig` argument to the sign command in + `imgtool.py`. + + Without this argument, the images are padded with the + existing scheme. With this argument, the ECDSA is encoded + without any padding. The `--pad-sig` argument is also + accepted, but it is already the default. + + 2. MCUboot will be modified to allow unpadded signatures right away. + The existing EC256 implementations will still work (with or + without padding), and the existing EC implementation will be able + to accept padded and unpadded signatures. + + 3. An Mbed TLS implementation of EC256 can be added, but it will require + the `--no-pad-sig` signature to be able to boot all generated + images. Without the argument, 3 out of 4 images generated will have + padding and will be considered invalid. + +After one or more MCUboot release cycles and announcements in the +relevant channels, the arguments to `imgtool.py` will change: + + - `--no-pad-sig` will still be accepted but will have no effect. + + - `--pad-sig` will now bring back the old padding behavior. + +This will require an update to any scripts that will rely on the default +behavior, but will not specify a specific version of imgtool. + +The signature generation in the simulator can be changed at the same +time the boot code begins to accept unpadded signatures. The simulator is +always run out of the same tree as the MCUboot code, so there should +not be any compatibility issues. + +## Background + +ECDSA signatures are encoded as ASN.1, notably with the signature +itself encoded as follows: + +``` + ECDSA-Sig-Value ::= SEQUENCE { + r INTEGER, + s INTEGER + } +``` + +Both `r` and `s` are 256-bit numbers. Because these are +unsigned numbers that are being encoded in ASN.1 as signed values, if +the high bit of the number is set, the DER-encoded representation will +require 33 bytes instead of 32. This means that the length of the +signature will vary by a couple of bytes, depending on whether one or +both of these numbers have the high bit set. + +Originally, MCUboot added padding to the entire signature and just +removed any trailing 0 bytes from the data block. This turned out to be fine 255 out of 256 +times, each time the last byte of the signature was non-zero, but if the +signature ended in a zero, MCUboot would remove too many bytes and render the +signature invalid. + +The correct approach here is to accept that ECDSA signatures are of +variable length, and to make sure that we can handle them as such. diff --git a/bootloader/mcuboot/docs/encrypted_images.md b/bootloader/mcuboot/docs/encrypted_images.md new file mode 100644 index 0000000..85d26d8 --- /dev/null +++ b/bootloader/mcuboot/docs/encrypted_images.md @@ -0,0 +1,175 @@ + + +# Encrypted images + +## [Rationale](#rationale) + +To provide confidentiality of image data while in transport to the +device or while residing on an external flash, `MCUboot` has support +for encrypting/decrypting images on-the-fly while upgrading. + +The image header needs to flag this image as `ENCRYPTED` (0x04) and +a TLV with the key must be present in the image. When upgrading the +image from the `secondary slot` to the `primary slot` it is automatically +decrypted (after validation). If swap upgrades are enabled, the image +located in the `primary slot`, also having the `ENCRYPTED` flag set and the +TLV present, is re-encrypted while swapping to the `secondary slot`. + +## [Threat model](#threat-model) + +The encrypted image support is supposed to allow for confidentiality +if the image is not residing on the device or is written to external +storage, eg a SPI flash being used for the secondary slot. + +It does not protect against the possibility of attaching a JTAG and +reading the internal flash memory, or using some attack vector that +enables dumping the internal flash in any way. + +Since decrypting requires a private key (or secret if using symmetric +crypto) to reside inside the device, it is the responsibility of the +device manufacturer to guarantee that this key is already in the device +and not possible to extract. + +## [Design](#design) + +When encrypting an image, only the payload (FW) is encrypted. The header, +TLVs are still sent as plain data. + +Hashing and signing also remain functionally the same way as before, +applied over the un-encrypted data. Validation on encrypted images, checks +that the encrypted flag is set and TLV data is OK, then it decrypts each +image block before sending the data to the hash routines. + +The image is encrypted using AES-CTR-128 or AES-CTR-256, with a counter +that starts from zero (over the payload blocks) and increments by 1 for each +16-byte block. AES-CTR was chosen for speed/simplicity and allowing for any +block to be encrypted/decrypted without requiring knowledge of any other +block (allowing for simple resume operations on swap interruptions). + +The key used is a randomized when creating a new image, by `imgtool` or +`newt`. This key should never be reused and no checks are done for this, +but randomizing a 16-byte block with a TRNG should make it highly +improbable that duplicates ever happen. + +To distribute this AES-CTR key, new TLVs were defined. The key can be +encrypted using either RSA-OAEP, AES-KW (128 or 256 bits depending on the +AES-CTR key length), ECIES-P256 or ECIES-X25519. + +For RSA-OAEP a new TLV with value `0x30` is added to the image, for +AES-KW a new TLV with value `0x31` is added to the image, for +ECIES-P256 a new TLV with value `0x32` is added, and for ECIES-X25519 a +newt TLV with value `0x33` is added. The contents of those TLVs +are the results of applying the given operations over the AES-CTR key. + +## [ECIES encryption](#ecies-encryption) + +ECIES follows a well defined protocol to generate an encryption key. There are +multiple standards which differ only on which building blocks are used; for +MCUboot we settled on some primitives that are easily found on our crypto +libraries. The whole key encryption can be summarized as: + +* Generate a new private key and derive the public key; when using ECIES-P256 + this is a secp256r1 keypair, when using ECIES-X25519 this will be a x25519 + keypair. Those keys will be our ephemeral keys. +* Generate a new secret (DH) using the ephemeral private key and the public key + that corresponds to the private key embedded in the HW. +* Derive the new keys from the secret using HKDF (built on HMAC-SHA256). We + are not using a `salt` and using an `info` of `MCUBoot_ECIES_v1`, generating + 48 bytes of key material. +* A new random encryption key is generated (for AES). This is + the AES key used to encrypt the images. +* The key is encrypted with AES-128-CTR or AES-256-CTR and a `nonce` of 0 using + the first 16 bytes of key material generated previously by the HKDF. +* The encrypted key now goes through a HMAC-SHA256 using the remaining 32 + bytes of key material from the HKDF. + +The final TLV is built from the 65 bytes for ECIES-P256 or 32 bytes for +ECIES-X25519, which correspond to the ephemeral public key, followed by the +32 bytes of MAC tag and the 16 or 32 bytes of the encrypted key, resulting in +a TLV of 113 or 129 bytes for ECIES-P256 and 80 or 96 bytes for ECIES-X25519. + +The implemenation of ECIES-P256 is named ENC_EC256 in the source code and +artifacts while ECIES-X25519 is named ENC_X25519. + +## [Upgrade process](#upgrade-process) + +When starting a new upgrade process, `MCUboot` checks that the image in the +`secondary slot` has the `ENCRYPTED` flag set and has the required TLV with the +encrypted key. It then uses its internal private/secret key to decrypt +the TLV containing the key. Given that no errors are found, it will then +start the validation process, decrypting the blocks before check. A good +image being determined, the upgrade consists in reading the blocks from +the `secondary slot`, decrypting and writing to the `primary slot`. + +If swap using scratch is used for the upgrade process, the decryption happens +when copying the content of the scratch area to the `primary slot`, which means +the scratch area does not contain the image unencrypted. However, unless +`MCUBOOT_SWAP_SAVE_ENCTLV` is enabled, the decryption keys are stored in +plaintext in the scratch area. Therefore, `MCUBOOT_SWAP_SAVE_ENCTLV` must be +enabled if the scratch area does not reside in the internal flash memory of the +MCU, to avoid attacks that could interrupt the upgrade and read the plaintext +decryption keys from external flash memory. + +Also when swap is used, the image in the `primary slot` is checked for +presence of the `ENCRYPTED` flag and the key TLV. If those are present the +sectors are re-encrypted when copying from the `primary slot` to +the `secondary slot`. + +--- +***Note*** + +*Each encrypted image must have its own key TLV that should be unique* +*and used only for this particular image.* + +--- + +Also when swap method is employed, the sizes of both images are saved to +the status area just before starting the upgrade process, because it +would be very hard to determine this information when an interruption +occurs and the information is spread across multiple areas. + +## [Creating your keys with imgtool](#creating-your-keys-with-imgtool) + +`imgtool` can generate keys by using `imgtool keygen -k -t `, + where type can be one of `rsa-2048`, `rsa-3072`, `ecdsa-p256` +or `ed25519`. This will generate a keypair or private key. + +To extract the public key in source file form, use +`imgtool getpub -k -e `, where `encoding` can be one of +`lang-c` or `lang-rust` (defaults to `lang-c`). To extract a public key in PEM +format, use `imgtool getpub -k -e pem`. + +If using AES-KW, follow the steps in the next section to generate the +required keys. + +## [Creating your keys with Unix tooling](#creating-your-keys-with-unix-tooling) + +* If using RSA-OAEP, generate a keypair following steps similar to those + described in [signed_images](signed_images.md) to create RSA keys. +* If using ECIES-P256, generate a keypair following steps similar to those + described in [signed_images](signed_images.md) to create ECDSA256 keys. +* If using ECIES-X25519, generate a private key passing the option `-t x25519` + to `imgtool keygen` command. To generate public key PEM file the following + command can be used: `openssl pkey -in -pubout` +* If using AES-KW (`newt` only), the `kek` can be generated with a + command like (change count to 32 for a 256 bit key) + `dd if=/dev/urandom bs=1 count=16 | base64 > my_kek.b64` diff --git a/bootloader/mcuboot/docs/imgtool.md b/bootloader/mcuboot/docs/imgtool.md new file mode 100644 index 0000000..b4dc3b5 --- /dev/null +++ b/bootloader/mcuboot/docs/imgtool.md @@ -0,0 +1,135 @@ +# Image tool + +The Python program `scripts/imgtool.py` can be used to perform the +operations that are necessary to manage keys and sign images. Using +this script should be preferred to the manual steps described in +`doc/signed_images.md`. + +This program is written for Python3, and has several dependencies on +Python libraries. These can be installed using 'pip3': + + pip3 install --user -r scripts/requirements.txt + +## [Managing keys](#managing-keys) + +This tool currently supports rsa-2048, rsa-3072, ecdsa-p256 and ed25519 keys. +You can generate a keypair for one of these types using the 'keygen' command: + + ./scripts/imgtool.py keygen -k filename.pem -t rsa-2048 + +or use rsa-3072, ecdsa-p256, or ed25519 for the type. The key type used +should match what MCUboot is configured to verify. + +This key file is what is used to sign images, this file should be +protected, and not widely distributed. + +You can add the `-p` argument to `keygen`, which will cause it to +prompt for a password. You will need to enter this password in every +time you use the private key. + +## [Incorporating the public key into the code](#incorporating-the-public-key-into-the-code) + +There is a development key distributed with MCUboot that can be used +for testing. Since this private key is widely distributed, it should +never be used for production. Once you have generated a production +key, as described above, you should replace the public key in the +bootloader with the generated one. + +For Zephyr, the keys live in the file `boot/zephyr/keys.c`. For +mynewt, follow the instructions in `doc/signed_images.md` to generate +the key file. + + ./scripts/imgtool.py getpub -k filename.pem + +will extract the public key from the given private key file, and +output it as a C data structure. You can replace or insert this code +into the key file. However, when the `MCUBOOT_HW_KEY` config option is +enabled, this last step is unnecessary and can be skipped. + +## [Signing images](#signing-images) + +Image signing takes an image in binary or Intel Hex format intended for the +primary slot and adds a header and trailer that the bootloader is expecting: + + Usage: imgtool.py sign [OPTIONS] INFILE OUTFILE + + Create a signed or unsigned image + + INFILE and OUTFILE are parsed as Intel HEX if the params have .hex + extension, otherwise binary format is used + + Options: + -k, --key filename + --public-key-format [hash|full] + --align [1|2|4|8|16|32] Alignment used by swap update modes. + -v, --version TEXT [required] + -s, --security-counter TEXT Specify the value of security counter. Use + the `auto` keyword to automatically generate + it from the image version. + -d, --dependencies TEXT + --pad-sig Add 0-2 bytes of padding to ECDSA signature + (for MCUboot <1.5) + -H, --header-size INTEGER [required] + --pad-header Add --header-size zeroed bytes at the + beginning of the image + -S, --slot-size INTEGER Size of the slot where the image will be + written [required] + --pad Pad image to --slot-size bytes, adding + trailer magic + --confirm When padding the image, mark it as confirmed + -M, --max-sectors INTEGER When padding allow for this amount of + sectors (defaults to 128) + --boot-record sw_type Create CBOR encoded boot record TLV. The + sw_type represents the role of the software + component (e.g. CoFM for coprocessor + firmware). [max. 12 characters] + --overwrite-only Use overwrite-only instead of swap upgrades + -e, --endian [little|big] Select little or big endian + -E, --encrypt filename Encrypt image using the provided public key + --save-enctlv When upgrading, save encrypted key TLVs + instead of plain keys. Enable when + BOOT_SWAP_SAVE_ENCTLV config option was set. + -L, --load-addr INTEGER Load address for image when it should run + from RAM. + -x, --hex-addr INTEGER Adjust address in hex output file. + -R, --erased-val [0|0xff] The value that is read back from erased + flash. + -h, --help Show this message and exit. + +The main arguments given are the key file generated above, a version +field to place in the header (1.2.3 for example), the alignment of the +flash device in question, and the header size. + +The header size depends on the operating system and the particular +flash device. For Zephyr, it will be configured as part of the build, +and will be a small power of two. By default, the Zephyr build system will +already prepended a zeroed header to the image. If another build system is +in use that does not automatically add this zeroed header, `--pad-header` can +be passed and the `--header-size` will be added by imgtool. If `--pad-header` +is used with an Intel Hex file, `--header-size` bytes will be subtracted from +the load address (in Intel Hex terms, the Extended Linear Address record) to +adjust for the new bytes prepended to the file. The load address of all data +existing in the file should not change. + +The `--slot-size` argument is required and used to check that the firmware +does not overflow into the swap status area (metadata). If swap upgrades are +not being used, `--overwrite-only` can be passed to avoid adding the swap +status area size when calculating overflow. + +The optional `--pad` argument will place a trailer on the image that +indicates that the image should be considered an upgrade. Writing this image +in the secondary slot will then cause the bootloader to upgrade to it. + +A dependency can be specified in the following way: +`-d "(image_id, image_version)"`. The `image_id` is the number of the image +which the current image depends on. The `image_version` is the minimum version +of that image to satisfy compliance. For example `-d "(1, 1.2.3+0)"` means this +image depends on Image 1 which version has to be at least 1.2.3+0. + +The `--public-key-format` argument can be used to distinguish where the public +key is stored for image authentication. The `hash` option is used by default, in +which case only the hash of the public key is added to the TLV area (the full +public key is incorporated into the bootloader). When the `full` option is used +instead, the TLV area will contain the whole public key and thus the bootloader +can be independent from the key(s). For more information on the additional +requirements of this option, see the [design](design.md) document. diff --git a/bootloader/mcuboot/docs/index.md b/bootloader/mcuboot/docs/index.md new file mode 100644 index 0000000..05ef174 --- /dev/null +++ b/bootloader/mcuboot/docs/index.md @@ -0,0 +1,93 @@ +# MCUboot + +MCUboot is a secure bootloader for 32-bits microcontrollers. + +## Overview + +MCUboot defines a common infrastructure for the bootloader and the system flash +layout on microcontroller systems, and provides a secure bootloader that +enables easy software upgrade. + +MCUboot is not dependent on any specific operating system and hardware and +relies on hardware porting layers from the operating system it works with. +Currently MCUboot works with the following operating systems and SoCs: +- [Zephyr](https://www.zephyrproject.org/) +- [Apache Mynewt](https://mynewt.apache.org/) +- [Apache NuttX](https://nuttx.apache.org/) +- [RIOT](https://www.riot-os.org/) +- [Mbed OS](https://os.mbed.com/) +- [Espressif](https://www.espressif.com/) +- [Cypress/Infineon](https://www.cypress.com/) + +RIOT is supported only as a boot target. We will accept any new port +contributed by the community once it is good enough. + +MCUboot is an open governance project. See the [membership +list](https://github.com/mcu-tools/mcuboot/wiki/Members) for current +members, and the +[project charter](https://github.com/mcu-tools/mcuboot/wiki/MCUboot-Project-Charter) +for more details. + +## Documentation + +The MCUboot documentation is composed of the following pages: + +- General - this document +- [Release notes](release-notes.md) +- [Bootloader design](design.md) +- [Encrypted images](encrypted_images.md) +- [imgtool](imgtool.md) - image signing and key management +- [ECDSA](ecdsa.md) - information about ECDSA signature formats +- [Serial Recovery](serial_recovery.md) - MCUmgr as the serial recovery protocol +- Usage instructions: + - [Zephyr](readme-zephyr.md) + - [Apache Mynewt](readme-mynewt.md) + - [Apache NuttX](readme-nuttx.md) + - [RIOT](readme-riot.md) + - [Mbed OS](readme-mbed.md) + - [Espressif](readme-espressif.md) + - [Cypress/Infineon](https://github.com/mcu-tools/mcuboot/tree/main/boot/cypress/README.md) + - [Simulator](https://github.com/mcu-tools/mcuboot/tree/main/sim/README.rst) +- Testing + - [Zephyr](testplan-zephyr.md) - Zephyr test plan + - [Apache Mynewt](testplan-mynewt.md) - Apache Mynewt test plan +- [Release process](release.md) +- [Project security policy](SECURITY.md) +- [Patch submission](SubmittingPatches.md) - information + on how to contribute to MCUboot + +The documentation page about [signed images](signed_images.md) is currently +outdated. Follow the instructions in [imgtool](imgtool.md) instead. + +## Roadmap + +The issues being planned and worked on are tracked using GitHub issues. To +give your input, visit [MCUboot GitHub +Issues](https://github.com/mcu-tools/mcuboot/issues). + +## Source files + +You can find additional documentation on the bootloader in the source files. +For more information, use the following links: +- [boot/bootutil](https://github.com/mcu-tools/mcuboot/tree/main/boot/bootutil) - The core of the bootloader itself. +- [boot/boot\_serial](https://github.com/mcu-tools/mcuboot/tree/main/boot/boot_serial) - Support for serial upgrade within the bootloader itself. +- [boot/zephyr](https://github.com/mcu-tools/mcuboot/tree/main/boot/zephyr) - Port of the bootloader to Zephyr. +- [boot/mynewt](https://github.com/mcu-tools/mcuboot/tree/main/boot/mynewt) - Bootloader application for Apache Mynewt. +- [boot/nuttx](https://github.com/mcu-tools/mcuboot/tree/main/boot/nuttx) - Bootloader application and port of MCUboot interfaces for Apache NuttX. +- [boot/mbed](https://github.com/mcu-tools/mcuboot/tree/main/boot/mbed) - Port of the bootloader to Mbed OS. +- [boot/espressif](https://github.com/mcu-tools/mcuboot/tree/main/boot/espressif) - Bootloader application and MCUboot port for Espressif SoCs. +- [boot/cypress](https://github.com/mcu-tools/mcuboot/tree/main/boot/cypress) - Bootloader application and MCUboot port for Cypress/Infineon SoCs. +- [imgtool](https://github.com/mcu-tools/mcuboot/tree/main/scripts/imgtool.py) - A tool to securely sign firmware images for booting by MCUboot. +- [sim](https://github.com/mcu-tools/mcuboot/tree/main/sim) - A bootloader simulator for testing and regression. + +## Joining the project + +Developers are welcome! + +Use the following links to join or see more about the project: + +* [Our developer mailing list](https://groups.io/g/MCUBoot) +* [Our Discord channel](https://discord.com/channels/1106321706588577904/1106322802308550716)
+ Get [your invite](https://discord.com/invite/5PpXhvda5p) +* [Current members](https://github.com/mcu-tools/mcuboot/wiki/Members) +* [Project charter](https://github.com/mcu-tools/mcuboot/wiki/MCUboot-Project-Charter) diff --git a/bootloader/mcuboot/docs/readme-espressif.md b/bootloader/mcuboot/docs/readme-espressif.md new file mode 100644 index 0000000..21004df --- /dev/null +++ b/bootloader/mcuboot/docs/readme-espressif.md @@ -0,0 +1,1253 @@ +# [Building and using MCUboot with Espressif's chips](#building-and-using-mcuboot-with-espressifs-chips) + +The MCUBoot Espressif's port depends on HAL (Hardware Abstraction Layer) sources based on ESP-IDF +or 3rd party frameworks as such as Zephyr-RTOS (`zephyrproject-rtos/hal_espressif/`) or NuttX RTOS +(`espressif/esp-hal-3rdparty`). Building the MCUboot Espressif's port and its features is platform +dependent, therefore, the system environment including toolchains, must be set accordingly. A +standalone build version means that ESP-IDF and its toolchain are used as source. For 3rd parties +framework, HAL path and toolchain must be set. + +Documentation about the MCUboot bootloader design, operation and features can be found in the +[design document](design.md). + +## [SoC support availability](#soc-support-availability) + +The current port is available for use in the following SoCs within the OSes: + +| | ESP32 | ESP32-S2 | ESP32-C3 | ESP32-S3 | ESP32-C2 | ESP32-C6 | ESP32-H2 | +| :----: | :-----: | :-----: | :-----: | :-----: | :---------: | :-----: | :-----: | +| Zephyr | Supported | Supported | Supported | Supported | In progress | In progress | In progress | +| NuttX | Supported | Supported | Supported | Supported | In progress | In progress | In progress | + +Notice that any customization in the memory layout from the OS application must be done aware of +the bootloader own memory layout to avoid overlapping. More information on the section +[Memory map organization for OS compatibility](#memory-map-organization-for-os-compatibility). + +## [Installing requirements and dependencies](#installing-requirements-and-dependencies) + +The following instructions considers a MCUboot Espressif port standalone build. + +1. Install additional packages required for development with MCUboot: + + ```bash + cd ~/mcuboot # or to your directory where MCUboot is cloned + ``` + + ```bash + pip3 install --user -r scripts/requirements.txt + ``` + +2. Update the Mbed TLS submodule required by MCUboot: + + ```bash + git submodule update --init --recursive ext/mbedtls + ``` + +3. If ESP-IDF is the chosen option for use as HAL layer and the system already have ESP-IDF + installed, ensure that the environment is set: + + ```bash + /install.sh + ``` + + ```bash + . /export.sh + ``` + + --- + ***Note*** + + *If desirable, instructions for ESP-IDF installation can be found + [here](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html#manual-installation)* + + --- + + --- + ***Note*** + + *The other HALs mentioned above like `hal_espressif` from Zephyr RTOS or `esp-hal-3rdparty` + from NuttX RTOS environments also can be used for the bootloader standalone build, however as + eventually code revision may differ from what is currently expected, it is recommended using + them only within their RTOS build system.* + + --- + +4. If ESP-IDF is not installed and will not be used, install `esptool`: + + ```bash + pip3 install esptool + ``` + +## [Building the bootloader itself](#building-the-bootloader-itself) + +The MCUboot Espressif port bootloader is built using the toolchain and tools provided by Espressif. +Additional configuration related to MCUboot features and slot partitioning may be made using the +`port//bootloader.conf` file or passing a custom config file using the +`-DMCUBOOT_CONFIG_FILE` argument on the first step below. + +--- +***Note*** + +*Replace `` with the target ESP32 family (like `esp32`, `esp32s2` and others).* + +--- + +1. Compile and generate the BIN: + + ```bash + cmake -DCMAKE_TOOLCHAIN_FILE=tools/toolchain-.cmake -DMCUBOOT_TARGET= -DESP_HAL_PATH= -DMCUBOOT_FLASH_PORT= -B build -GNinja + ``` + + ```bash + ninja -C build/ + ``` + + --- + ***Note*** + + *If using ESP-IDF as HAL layer source, `ESP_HAL_PATH` can be ommited.* + + *If desirable, `` can be defined with the path for a different compatible + toolchain, however it is recommended to actually create a CMake toolchain file and + pass it through `` variable since it may require a distinct set of + compilation flags.* + + --- + +2. Flash MCUboot in your device: + + ```bash + ninja -C build/ flash + ``` + + If `MCUBOOT_FLASH_PORT` arg was not passed to `cmake`, the default `PORT` for flashing will be + `/dev/ttyUSB0`. + + Alternatively: + + ```bash + esptool.py -p -b --before default_reset --after no_reset --chip write_flash --flash_mode dio --flash_size --flash_freq 40m build/mcuboot_.bin + ``` + + --- + ***Note*** + + You may adjust the port `` (like `/dev/ttyUSB0`) and baud rate `` (like `2000000`) + according to the connection with your board. You can also skip `` and `` parameters + so that esptool tries to automatically detect it. + + *`` can be found using the command below:* + + ```bash + esptool.py -p -b flash_id + ``` + + The output contains device information and its flash size: + + ``` + Detected flash size: 4MB + ``` + + *`` value must follow one of the addresses below:* + + | ESP32 | ESP32-S2 | ESP32-C3 | ESP32-S3 | ESP32-C2 | ESP32-C6 | ESP32-H2 | + | :-----: | :-----: | :-----: | :-----: | :-----: | :-----: | :-----: | + | 0x1000 | 0x1000 | 0x0000 | 0x0000 | 0x0000 | 0x0000 | 0x0000 | + + --- + +3. Reset your device + +## [Signing and flashing an application](#signing-and-flashing-an-application) + +1. Images can be regularly signed with the `scripts/imgtool.py` script: + + ```bash + imgtool.py sign --align 4 -v 0 -H 32 --pad-header -S + ``` + + --- + + ***Note*** + + `` is the size of the slot to be used. + Default slot0 size is `0x100000`, but it can change as per application flash partitions. + + For Zephyr images, `--pad-header` is not needed as it already has the padding for MCUboot + header. + + --- + + :warning: ***ATTENTION*** + + *This is the basic signing needed for adding MCUboot headers and trailers. + For signing with a crypto key and guarantee the authenticity of the image being booted, see the + section [MCUboot image signature verification](#mcuboot-image-signature-verification) below.* + + --- + +2. Flash the signed application: + + ```bash + esptool.py -p -b --before default_reset --after hard_reset --chip write_flash --flash_mode dio --flash_size --flash_freq 40m + ``` + +# [Downgrade prevention](#downgrade-prevention) + +Downgrade prevention (avoid updating of images to an older version) can be enabled using the +following configuration: + +``` +CONFIG_ESP_DOWNGRADE_PREVENTION=y +``` + +MCUboot will then verify and compare the new image version number with the current one before +perform an update swap. + +Version number is added to the image when signing it with `imgtool` (`-v` parameter, e.g. +`-v 1.0.0`). + +### [Downgrade prevention with security counter](#downgrade-prevention-with-security-counter) + +It is also possible to rely on a security counter, also added to the image when signing with +`imgtool` (`-s` parameter), apart from version number. This allows image downgrade at some extent, +since any update must have greater or equal security counter value. Enable using the following +configuration: + +``` +CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y +``` + +E.g.: if the current image was signed using `-s 1` parameter, an eventual update image must have +been signed using security counter `-s 1` or greater. + +# [Security Chain on Espressif port](#security-chain-on-espressif-port) + +[MCUboot encrypted images](encrypted_images.md) do not provide full code confidentiality when only +external storage is available (see [Threat model](encrypted_images.md#threat-model)) since by +MCUboot design the image in Primary Slot, from where the image is executed, is stored plaintext. +Espressif chips have off-chip flash memory, so to ensure a security chain along with MCUboot image +signature verification, the hardware-assisted Secure Boot and Flash Encryption were made available +on the MCUboot Espressif port. + +## [MCUboot image signature verification](#mcuboot-image-signature-verification) + +The image that MCUboot is booting can be signed with 4 types of keys: RSA-2048, RSA-3072, EC256 and +ED25519. In order to enable the feature, the **bootloader** must be compiled with the following +configurations: + +--- +***Note*** + +*It is strongly recommended to generate a new signing key using `imgtool` instead of use the +existent samples.* + +--- + +#### For EC256 algorithm use + +``` +CONFIG_ESP_SIGN_EC256=y + +# Use Tinycrypt lib for EC256 or ED25519 signing +CONFIG_ESP_USE_TINYCRYPT=y + +CONFIG_ESP_SIGN_KEY_FILE= +``` + +#### For ED25519 algorithm use + +``` +CONFIG_ESP_SIGN_ED25519=y + +# Use Tinycrypt lib for EC256 or ED25519 signing +CONFIG_ESP_USE_TINYCRYPT=y + +CONFIG_ESP_SIGN_KEY_FILE= +``` + +#### For RSA (2048 or 3072) algorithm use + +``` +CONFIG_ESP_SIGN_RSA=y +# RSA_LEN is 2048 or 3072 +CONFIG_ESP_SIGN_RSA_LEN= + +# Use Mbed TLS lib for RSA image signing +CONFIG_ESP_USE_MBEDTLS=y + +CONFIG_ESP_SIGN_KEY_FILE= +``` + +Notice that the public key will be embedded in the bootloader code, since the hardware key storage +is not supported by Espressif port. + +### [Signing the image](#signing-the-image) + +Now you need to sign the **image binary**, use the `imgtool` with `-k` parameter: + +```bash +imgtool.py sign -k --pad --pad-sig --align 4 -v 0 -H 32 --pad-header -S 0x00100000 +``` + +If signing a Zephyr image, the `--pad-header` is not needed, as it already have the padding for +MCUboot header. + + +## [Secure Boot](#secure-boot) + +The Secure Boot implementation is based on +[IDF's Secure Boot V2](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/secure-boot-v2.html), +is hardware-assisted and RSA based - except ESP32-C2 that uses ECDSA signing scheme - and has the +role for ensuring that only authorized code will be executed on the device. This is done through +bootloader signature checking by the ROM bootloader. + +***Note***: ROM bootloader is the First Stage Bootloader, while the Espressif MCUboot port is the +Second Stage Bootloader. + +### [Building bootloader with Secure Boot](#building-bootloader-with-secure-boot) + +In order to build the bootloader with the feature on, the following configurations must be enabled: + +``` +CONFIG_SECURE_BOOT=1 +CONFIG_SECURE_BOOT_V2_ENABLED=1 +CONFIG_SECURE_SIGNED_ON_BOOT=1 +``` + +For the currently supported chips, with exception of ESP32-C2, enable RSA signing scheme: + +``` +CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 +CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 +``` + +For ESP32-C2, enable ECDSA signing scheme and, if working with Flash Encryption too, enable the +configuration to burn keys to efuse together: + +``` +CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME=1 + +CONFIG_SECURE_BOOT_FLASH_ENC_KEYS_BURN_TOGETHER=1 +``` + +--- +:warning: ***ATTENTION*** + +*On development phase is recommended add the following configuration in order to keep the debugging +enabled and also to avoid any unrecoverable/permanent state change:* + +``` +CONFIG_SECURE_BOOT_ALLOW_JTAG=1 +CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1 + +# Options for enabling eFuse emulation in Flash +CONFIG_EFUSE_VIRTUAL=1 +CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1 +``` +--- + +--- +:warning: ***ATTENTION*** + +*You can disable UART Download Mode by adding the following configuration:* + +``` +CONFIG_SECURE_DISABLE_ROM_DL_MODE=1 +``` + +*This may be suitable for __production__ builds. __After disabling UART Download Mode you will not +be able to flash other images through UART.__* + +*Otherwise, you can switch the UART ROM Download Mode to the Secure Download Mode. It will limit +the use of Download Mode functions to simple flash read, write and erase operations.* + +``` +CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE=1 +``` + +*Once the device makes its first full boot, these configurations cannot be reverted* + +--- + +Once the **bootloader image** is built, the resulting binary file is required to be signed with +`espsecure.py` tool. + +First create a signing key: + +```bash +espsecure.py generate_signing_key --version 2 +``` + +Then sign the bootloader image: + +```bash +espsecure.py sign_data --version 2 --keyfile -o +``` + +--- +:warning: ***ATTENTION*** + +*Once the bootloader is flashed and the device resets, the **first boot will enable Secure Boot** +and the bootloader and key **no longer can be modified**. So **ENSURE** that both bootloader and +key are correct and you did not forget anything before flashing.* + +--- + +Flash the bootloader as following, with `--after no_reset` flag, so you can reset the device only +when assured: + +```bash +esptool.py -p -b 2000000 --after no_reset --chip write_flash --flash_mode dio --flash_size --flash_freq 40m +``` + +### [Secure Boot Process](#secure-boot-process) + +Secure boot uses a signature block appended to the bootloader image in order to verify the +authenticity. The signature block contains the RSA-3072 signature of that image and the RSA-3072 +public key. + +On its **first boot** the Secure Boot is not enabled on the device eFuses yet, neither the key nor +digests. So the first boot will have the following process: + +1. On startup, since it is the first boot, the ROM bootloader will not verify the bootloader image + (the Secure Boot bit in the eFuse is disabled) yet, so it proceeds to execute it (our MCUboot + bootloader port). +2. Bootloader calculates the SHA-256 hash digest of the public key and writes the result to eFuse. +3. Bootloader validates the application images and prepare the booting process (MCUboot phase). +4. Bootloader burns eFuse to enable Secure Boot V2. +5. Bootloader proceeds to load the Primary image. + +After that the Secure Boot feature is permanently enabled and on every next boot the ROM bootloader +will verify the MCUboot bootloader image. The process of an usual boot: + +1. On startup, the ROM bootloader checks the Secure Boot enable bit in the eFuse. If it is enabled, + the boot will proceed as following. +2. ROM bootloader verifies the bootloader's signature block integrity (magic number and CRC). + Interrupt boot if it fails. +3. ROM bootloader verifies the bootloader image, interrupt boot if any step fails: + 1. Compare the SHA-256 hash digest of the public key embedded in the bootloader’s signature + block with the digest saved in the eFuses. + 2. Generate the application image digest and match it with the image digest in the signature + block. + 3. Use the public key to verify the signature of the bootloader image, using RSA-PSS with the + image digest calculated from previous step for comparison. +4. ROM bootloader executes the bootloader image. +5. Bootloader does the usual verification (MCUboot phase). +6. Proceeds to boot the Primary image. + +## [Flash Encryption](#flash-encryption) + +The Espressif Flash Encryption is hardware-assisted, transparent to the MCUboot process and is an +additional security measure beyond MCUboot existent features. +The Flash Encryption implementation is also based on +[IDF](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/flash-encryption.html) +and is intended for encrypting off-chip flash memory contents, so it is protected against physical +reading. + +When enabling the Flash Encryption, the user can encrypt the content either using a **device +generated key** (remains unknown and unreadable) or a **host generated key** (owner is responsible +for keeping the key private and safe). After the flash encryption gets enabled through eFuse +burning on the device, all read and write operations are decrypted/encrypted in runtime. + +### [Building bootloader with Flash Encryption](#building-bootloader-with-flash-encryption) + +In order to build the bootloader with the feature on, the following configurations must be enabled: + +For **release mode**: + +``` +CONFIG_SECURE_FLASH_ENC_ENABLED=1 +CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE=1 +``` + +For **development mode**: + +``` +CONFIG_SECURE_FLASH_ENC_ENABLED=1 +CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1 +``` + +--- +:warning: ***ATTENTION*** + +*On development phase is strongly recommended adding the following configuration in order to keep +the debugging enabled and also to avoid any unrecoverable/permanent state change:* + +``` +CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1 +CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1 +CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1 +CONFIG_SECURE_BOOT_ALLOW_JTAG=1 + +# Options for enabling eFuse emulation in Flash +CONFIG_EFUSE_VIRTUAL=1 +CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1 +``` +--- + +--- +:warning: ***ATTENTION*** + +*Unless the recommended flags for __DEVELOPMENT MODE__ were enabled, the actions made by Flash +Encryption process are __PERMANENT__.* \ +*Once the bootloader is flashed and the device resets, the __first boot will enable Flash +Encryption, encrypt the flash content including bootloader and image slots, burn the eFuses that no +longer can be modified__ and if device generated the key __it will not be recoverable__.* \ +*When on __RELEASE MODE__, __ENSURE__ that the application with an update agent is flashed before +reset the device.* + +*In the same way as Secure Boot feature, you can disable UART Download Mode by adding the following +configuration:* + +``` +CONFIG_SECURE_DISABLE_ROM_DL_MODE=1 +``` + +*This may be suitable for __production__ builds. __After disabling UART Download Mode you will not +be able to flash other images through UART.__* + +*Otherwise, you can switch the UART Download Mode to the Secure Download Mode. It will limit the +use of Download Mode functions to simple flash read, write and erase operations.* + +``` +CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE=1 +``` + +*These configurations cannot be reverted after the device's first boot* + +--- + +### [Signing the image when working with Flash Encryption](#signing-the-image-when-working-with-flash-encryption) + +When enabling flash encryption, it is required to signed the image using 32-byte alignment: +`--align 32 --max-align 32`. + +Command example: + +```bash +imgtool.py sign -k --pad --pad-sig --align 32 --max-align 32 -v 0 -H 32 --pad-header -S +``` + +### [Device generated key](#device-generated-key) + +First ensure that the application image is able to perform encrypted read and write operations to +the SPI Flash. Flash the bootloader and application normally: + +```bash +esptool.py -p -b 2000000 --after no_reset --chip write_flash --flash_mode dio --flash_size --flash_freq 40m +``` + +```bash +esptool.py -p -b 2000000 --after no_reset --chip write_flash --flash_mode dio --flash_size --flash_freq 40m +``` + +On the **first boot**, the bootloader will: + +1. Generate Flash Encryption key and write to eFuse. +2. Encrypt flash in-place including bootloader, image primary/secondary slot and scratch. +3. Burn eFuse to enable Flash Encryption. +4. Reset system to ensure Flash Encryption cache resets properly. + +### [Host generated key](#host-generated-key) + +First ensure that the application image is able to perform encrypted read and write operations to +the SPI Flash. Also ensure that the **UART ROM Download Mode is not disabled** - or that the +**Secure Download Mode is enabled**. Before flashing, generate the encryption key using +`espsecure.py` tool: + +```bash +espsecure.py generate_flash_encryption_key +``` + +Burn the key into the device's eFuse (keep a copy on the host), this action can be done **only +once**: + +--- +:warning: ***ATTENTION*** + +*eFuse emulation in Flash configuration options do not have any effect, so if the key burning +command below is used, it will actually burn the physical eFuse.* + +--- + +- ESP32 + +```bash +espefuse.py --port PORT burn_key flash_encryption +``` + +- ESP32S2, ESP32C3 and ESP32S3 + +```bash +espefuse.py --port PORT burn_key BLOCK +``` + +`BLOCK` is a free keyblock between `BLOCK_KEY0` and `BLOCK_KEY5`. And `KEYPURPOSE` is either +`XTS_AES_128_KEY`, `XTS_AES_256_KEY_1`, `XTS_AES_256_KEY_2` (AES XTS 256 is available only in +ESP32S2). + +Now, similar as the Device generated key, the bootloader and application can be flashed plaintext. +The **first boot** will encrypt the flash content using the host key burned in the eFuse instead +of generate a new one. + +Flashing the bootloader and application: + +```bash +esptool.py -p -b 2000000 --after no_reset --chip write_flash --flash_mode dio --flash_size --flash_freq 40m +``` + +```bash +esptool.py -p -b 2000000 --after no_reset --chip write_flash --flash_mode dio --flash_size --flash_freq 40m +``` + +On the **first boot**, the bootloader will: + +1. Encrypt flash in-place including bootloader, image primary/secondary slot and scratch using the + written key. +2. Burn eFuse to enable Flash Encryption. +3. Reset system to ensure Flash Encryption cache resets properly. + +Encrypting data on the host: + +- ESP32 + +```bash +espsecure.py encrypt_flash_data --keyfile --address --output +``` + +- ESP32-S2, ESP32-C3 and ESP32-S3 + +```bash +espsecure.py encrypt_flash_data --aes_xts --keyfile --address --output +``` + +--- +***Note*** + +OTA updates are required to be sent plaintext. The reason is that, as said before, after the Flash +Encryption is enabled all read/write operations are decrypted/encrypted in runtime, so as e.g. if +pre-encrypted data is sent for an OTA update, it would be wrongly double-encrypted when the update +agent writes to the flash. + +For updating with an image encrypted on the host, flash it through serial using `esptool.py` as +above. **UART ROM Download Mode must not be disabled**. + +--- + +## [Security Chain scheme](#security-chain-scheme) + +Using the 3 features, Secure Boot, Image signature verification and Flash Encryption, a Security +Chain can be established so only trusted code is executed, and also the code and content residing +in the off-chip flash are protected against undesirable reading. + +The overall final process when all features are enabled: + +1. ROM bootloader validates the MCUboot bootloader using RSA signature verification. +2. MCUboot bootloader validates the image using the chosen algorithm EC256/RSA/ED25519. It also + validates an upcoming image when updating. +3. Flash Encryption guarantees that code and data are not exposed. + +### [Size Limitation](#size-limitation) + +When all 3 features are enable at same time, the bootloader size may exceed the fixed limit for +the ROM bootloader checking on the Espressif chips **depending on which algorithm** was chosen for +MCUboot image signing. The issue was created to +track this limitation. + +## [Multi image](#multi-image) + +The multi image feature (currently limited to 2 images) allows the images to be updated separately +(each one has its own primary and secondary slot) by MCUboot. + +The Espressif port bootloader handles the boot in two different approaches: + +### [Host OS boots second image](#host-os-boots-second-image) + +Host OS from the *first image* is responsible for booting the *second image*, therefore the +bootloader is aware of the second image regions and can update it, however it does not load +neither boots it. + +Configuration example (`bootloader.conf`): + +``` +CONFIG_ESP_BOOTLOADER_SIZE=0xF000 +CONFIG_ESP_MCUBOOT_WDT_ENABLE=y + +# Enables multi image, if it is not defined, its assumed +# only one updatable image +CONFIG_ESP_IMAGE_NUMBER=2 + +# Example of values to be used when multi image is enabled +# Notice that the OS layer and update agent must be aware +# of these regions +CONFIG_ESP_APPLICATION_SIZE=0x50000 +CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x60000 +CONFIG_ESP_IMAGE1_PRIMARY_START_ADDRESS=0xB0000 +CONFIG_ESP_IMAGE1_SECONDARY_START_ADDRESS=0x100000 +CONFIG_ESP_SCRATCH_OFFSET=0x150000 +CONFIG_ESP_SCRATCH_SIZE=0x40000 +``` + +### [Multi boot](#multi-boot) + +In the multi boot approach the bootloader is responsible for booting two different images in two +different CPUs, firstly the *second image* on the APP CPU and then the *first image* on the PRO +CPU (current CPU), it is also responsible for update both images as well. Thus multi boot will be +only supported by Espressif multi core chips - currently only ESP32 is implemented. + +--- +***Note*** + +*The host OSes in each CPU must handle how the resources are divided/controlled between then.* + +--- + +Configuration example: + +``` +CONFIG_ESP_BOOTLOADER_SIZE=0xF000 +CONFIG_ESP_MCUBOOT_WDT_ENABLE=y + +# Enables multi image, if it is not defined, its assumed +# only one updatable image +CONFIG_ESP_IMAGE_NUMBER=2 + +# Enables multi image boot on independent processors +# (main host OS is not responsible for booting the second image) +# Use only with CONFIG_ESP_IMAGE_NUMBER=2 +CONFIG_ESP_MULTI_PROCESSOR_BOOT=y + +# Example of values to be used when multi image is enabled +# Notice that the OS layer and update agent must be aware +# of these regions +CONFIG_ESP_APPLICATION_SIZE=0x50000 +CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 +CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x60000 +CONFIG_ESP_IMAGE1_PRIMARY_START_ADDRESS=0xB0000 +CONFIG_ESP_IMAGE1_SECONDARY_START_ADDRESS=0x100000 +CONFIG_ESP_SCRATCH_OFFSET=0x150000 +CONFIG_ESP_SCRATCH_SIZE=0x40000 +``` + +### [Image version dependency](#image-version-dependency) + +MCUboot allows version dependency check between the images when updating them. As `imgtool.py` +allows a version assigment when signing an image, it is also possible to add the version +dependency constraint: + +```bash +imgtool.py sign --align 4 -v -d "(, )" -H 32 --pad-header -S +``` + +- `` defines the version of the image being signed. +- `"(, )"` defines the minimum version and from which image is + needed to satisfy the dependency. + +--- +Example: + +```bash +imgtool.py sign --align 4 -v 1.0.0 -d "(1, 0.0.1+0)" -H 32 --pad-header -S 0x100000 image0.bin image0-signed.bin +``` + +Supposing that the image 0 is being signed, its version is 1.0.0 and it depends on image 1 with +version at least 0.0.1+0. + +--- + +## [Serial recovery mode](#serial-recovery-mode) + +Serial recovery mode allows management through MCUMGR (more information and how to install it: +) for communicating and uploading a firmware to the +device. + +Configuration example: + +``` +# Enables the MCUboot Serial Recovery, that allows the use of +# MCUMGR to upload a firmware through the serial port +CONFIG_ESP_MCUBOOT_SERIAL=y +# GPIO used to boot on Serial Recovery +CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=32 +# GPIO input type (0 for Pull-down, 1 for Pull-up) +CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0 +# GPIO signal value +CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1 +# Delay time for identify the GPIO signal +CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5 +# UART port used for serial communication +CONFIG_ESP_SERIAL_BOOT_UART_NUM=1 +# GPIO for Serial RX signal +CONFIG_ESP_SERIAL_BOOT_GPIO_RX=25 +# GPIO for Serial TX signal +CONFIG_ESP_SERIAL_BOOT_GPIO_TX=26 +``` + +When enabled, the bootloader checks the if the GPIO `` +configured has the signal value `` for approximately +`` seconds for entering the Serial recovery mode. Example: +a button configured on GPIO 32 pressed for 5 seconds. + +Serial mode then uses the UART port configured for communication +(``, pins ``, +``). + +### [Serial Recovery through USB JTAG Serial port](#serial-recovery-through-usb-jtag-serial-port) + +Some chips, like ESP32-C3 and ESP32-S3 have an integrated USB JTAG Serial Controller that +implements a serial port (CDC) that can also be used for handling MCUboot Serial Recovery. +More information about the USB pins and hardware configuration: + +- ESP32-C3: +- ESP32-S3: +- ESP32-C6: +- ESP32-H2: + +Configuration example: + +``` +# Use Serial through USB JTAG Serial port for Serial Recovery +CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG=y +# Use sector erasing (recommended) instead of entire image size +# erasing when uploading through Serial Recovery +CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y +# GPIO used to boot on Serial Recovery +CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 +# GPIO input type (0 for Pull-down, 1 for Pull-up) +CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0 +# GPIO signal value +CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1 +# Delay time for identify the GPIO signal +CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5 +``` + +--- +:warning: ***ATTENTION*** + +*When working with Flash Encryption enabled, `CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY` must be +__disabled__, although it is recommended for common Serial Recovery usage* + +--- + +### [MCUMGR image upload example](#mcumgr-image-upload-example) + +After entering the Serial recovery mode on the device, MCUMGR can be used as following: + +Configure the connection: +```bash +mcumgr conn add esp type="serial" connstring="dev=,baud=115200,mtu=256" +``` + +Upload the image (the process may take some time): +```bash +mcumgr -c esp image upload +``` + +Reset the device: +```bash +mcumgr -c esp reset +``` + +--- +:warning: ***ATTENTION*** + +*Serial recovery mode uploads the image to the PRIMARY_SLOT, therefore if the upload process gets +interrupted the image may be corrupted and unable to boot* + +--- + +## [Memory map organization for OS compatibility](#memory-map-organization-for-os-compatibility) + +When adding support for this MCUboot port to an OS or even customizing an already supported +application memory layout, it is mandatory for the OS linker script to avoid overlaping on +`iram_loader_seg` and `dram_seg` bootloader RAM regions. Although part of the RAM becomes initially +unavailable, it is reclaimable by the OS after boot as heap. + +Therefore, the application must be designed aware of the bootloader memory usage. + +--- +***Note*** + +*Mostly of the Espressif chips have a separation on the address space for the same physical memory +ammount: IRAM (accessed by the instruction bus) and DRAM (accessed by the data bus), which means +that they need to be accessed by different addresses ranges depending on type, but refer to the +same region. More information on the +[Espressif TRMs](https://www.espressif.com/en/support/documents/technical-documents?keys=&field_download_document_type_tid%5B%5D=963).* + +--- + +The following diagrams illustrate a memory organization from the bootloader point of view (notice +that the addresses and sizes may vary depending on the chip), they reflect the linker script +`boot/espressif/port//ld/bootloader.ld`: + +### ESP32 + +#### ESP32 standard + +``` + SRAM0 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x40070000 / --------- - SRAM0 START + * | ^ | + * | | PRO CPU Cache | *NOT CLAIMABLE BY OS RAM + * | v | + * +--------+--------------+------+ 0x40078000 / ---------- + * | ^ | + * | | | *NOT CLAIMABLE BY OS RAM + * | | iram_loader_seg | *Region usable as iram_loader_seg during boot + * | | (APP CPU Cache) | as APP CPU is not initialized yet + * | | | + * | v | + * +--------+--------------+------+ 0x40080000 / ---------- + * | ^ | + * | | FREE | *CLAIMABLE BY OS RAM + * | v | + * +------------------------------+ 0x40090000 / ---------- + * | ^ | + * | | iram_seg | *CLAIMABLE BY OS RAM + * | | | + * | v | + * +--------+--------------+------+ 0x40099000 / ---------- + * | | FREE | *CLAIMABLE BY OS RAM + * +------------------------------+ 0x4009FFFF / ---------- - SRAM0 END + + SRAM1 + IRAM ADDR / DRAM ADDR + * +------------------------------+ 0x400A0000 / 0x3FFFFFFF - SRAM1 START + * | ^ | + * | | | *** SHOULD NOT BE OVERLAPPED *** + * | | dram_seg | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | v | + * +--------+--------------+------+ 0x400AB900 / 0x3FFF4700 + * | ^ | + * | | | + * | | | + * | | FREE | *CLAIMABLE BY OS RAM + * | | | + * | | | + * | v | + * +--------+--------------+------+ 0x400BFFFF / 0x3FFE0000 - SRAM1 END + Note: On ESP32 the SRAM1 addresses are accessed in reverse order comparing Instruction + bus (IRAM) and Data bus (DRAM), but refer to the same location. See the TRM for more + information. + + SRAM2 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ ---------- / 0x3FFAE000 - SRAM2 START + * | | FREE | *CLAIMABLE BY OS RAM + * +--------+--------------+------+ ---------- / 0x3FFDFFFF - SRAM2 END +``` + +#### ESP32 Multi Processor Boot + +This is the linker script mapping when the `CONFIG_ESP_MULTI_PROCESSOR_BOOT` is enabled +([Multi boot](#multi-boot)) since APP CPU Cache region cannot be used for `iram_loader_seg` region +as there would be conflict when the bootloader starts the APP CPU before jump to the main +application. + +``` + SRAM0 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x40070000 / --------- - SRAM0 START + * | ^ | + * | | | + * | | Cache | *Used by PRO CPU and APP CPU as Cache + * | | | + * | v | + * +--------+--------------+------+ 0x40080000 / ---------- + * | ^ | + * | | FREE | *CLAIMABLE BY OS RAM + * | v | + * +------------------------------+ 0x40090000 / ---------- + * | ^ | + * | | iram_seg | *CLAIMABLE BY OS RAM + * | | | + * | v | + * +--------+--------------+------+ 0x40099000 / ---------- + * | | FREE | *CLAIMABLE BY OS RAM + * +------------------------------+ 0x4009FFFF / ---------- - SRAM0 END + + SRAM1 + IRAM ADDR / DRAM ADDR + * +------------------------------+ 0x400A0000 / 0x3FFFFFFF - SRAM1 START + * | ^ | + * | | | *** SHOULD NOT BE OVERLAPPED *** + * | | dram_seg | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | v | + * +--------+--------------+------+ 0x400AB900 / 0x3FFF4700 + * | ^ | + * | | | *** SHOULD NOT BE OVERLAPPED *** + * | | iram_loader_seg | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | | | + * | v | + * +------------------------------+ 0x400B1E00 / 0x3FFEE200 + * | ^ | + * | | | + * | | FREE | *CLAIMABLE BY OS RAM + * | | | + * | v | + * +--------+--------------+------+ 0x400BFFFF / 0x3FFE0000 - SRAM1 END + Note: On ESP32 the SRAM1 addresses are accessed in reverse order comparing Instruction + bus (IRAM) and Data bus (DRAM), but refer to the same location. See the TRM for more + information. + + SRAM2 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ ---------- / 0x3FFAE000 - SRAM2 START + * | | FREE | *CLAIMABLE BY OS RAM + * +--------+--------------+------+ ---------- / 0x3FFDFFFF - SRAM2 END +``` + +### ESP32-S2 + +``` + SRAM0 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x40020000 / 0x3FFB0000 - SRAM0 START + * | | FREE | *CLAIMABLE BY OS RAM + * +--------+--------------+------+ 0x40027FFF / 0x3FFB7FFF - SRAM0 END + + SRAM1 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x40028000 / 0x3FFB8000 - SRAM1 START + * | ^ | + * | | | + * | | FREE | *CLAIMABLE BY OS RAM + * | | | + * | v | + * +--------+--------------+------+ 0x40047000 / 0x3FFD7000 + * | ^ | + * | | | + * | | | + * | | iram_seg | *CLAIMABLE BY OS RAM + * | | | + * | | | + * | v | + * +------------------------------+ 0x40050000 / 0x3FFE0000 + * | ^ | + * | | | + * | | | + * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | | | + * | v | + * +------------------------------+ 0x40056000 / 0x3FFE6000 + * | ^ | + * | | | + * | | dram_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | v | + * +--------+--------------+------+ 0x4006FFFF / 0x3FFFFFFF - SRAM1 END +``` + +### ESP32-S3 + +``` + SRAM0 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x40370000 / ---------- - SRAM0 START + * | | FREE | *CLAIMABLE BY OS RAM + * +--------+--------------+------+ 0x40377FFF / ---------- - SRAM0 END + + SRAM1 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x40378000 / 0x3FC88000 - SRAM1 START + * | ^ | + * | | | + * | | FREE | *CLAIMABLE BY OS RAM + * | | | + * | v | + * +--------+--------------+------+ 0x403B0000 / 0x3FCC0000 + * | ^ | + * | | | + * | | | + * | | iram_seg | *CLAIMABLE BY OS RAM + * | | | + * | | | + * | v | + * +------------------------------+ 0x403BA000 / 0x3FCCA000 + * | ^ | + * | | | + * | | | + * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | | | + * | v | + * +------------------------------+ 0x403C0000 / 0x3FCD0000 + * | ^ | + * | | | + * | | dram_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | v | + * +--------+--------------+------+ 0x403DFFFF / 0x3FCEFFFF - SRAM1 END + + SRAM2 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ ---------- / 0x3FCF0000 - SRAM2 START + * | | FREE | *CLAIMABLE BY OS RAM + * +--------+--------------+------+ ---------- / 0x3FCFFFFF - SRAM2 END +``` + +### ESP32-C2 + +``` + SRAM0 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x4037C000 / ---------- - SRAM0 START + * | | FREE | *CLAIMABLE BY OS RAM + * +--------+--------------+------+ 0x4037FFFF / ---------- - SRAM0 END + + SRAM1 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x40380000 / 0x3FCA0000 - SRAM1 START + * | ^ | + * | | | + * | | | + * | | FREE | *CLAIMABLE BY OS RAM + * | | | + * | | | + * | v | + * +--------+--------------+------+ 0x403A1370 / 0x3FCC1370 + * | ^ | + * | | | + * | | | + * | | iram_seg | *CLAIMABLE BY OS RAM + * | | | + * | | | + * | v | + * +------------------------------+ 0x403A9B70 / 0x3FCC9B70 + * | ^ | + * | | | + * | | | + * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | | | + * | v | + * +------------------------------+ 0x403B0B70 / 0x3FCD0B70 + * | ^ | + * | | | + * | | dram_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | v | + * +--------+--------------+------+ 0x403BFFFF / 0x3FCDFFFF - SRAM1 END +``` + +### ESP32-C3 + +``` + SRAM0 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x4037C000 / ---------- - SRAM0 START + * | | FREE | *CLAIMABLE BY OS RAM + * +--------+--------------+------+ 0x4037FFFF / ---------- - SRAM0 END + + SRAM1 + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x40380000 / 0x3FC80000 - SRAM1 START + * | ^ | + * | | | + * | | | + * | | FREE | *CLAIMABLE BY OS RAM + * | | | + * | | | + * | v | + * +--------+--------------+------+ 0x403C7000 / 0x3FCC7000 + * | ^ | + * | | | + * | | | + * | | iram_seg | *CLAIMABLE BY OS RAM + * | | | + * | | | + * | v | + * +------------------------------+ 0x403D0000 / 0x3FCD0000 + * | ^ | + * | | | + * | | | + * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | | | + * | v | + * +------------------------------+ 0x403D5400 / 0x3FCD5400 + * | ^ | + * | | | + * | | dram_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | v | + * +--------+--------------+------+ 0x403DFFFF / 0x3FCDFFFF - SRAM1 END +``` + +### ESP32-C6 + +``` + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x40800000 / 0x40800000 - HP SRAM START + * | ^ | + * | | | + * | | | + * | | FREE | *CLAIMABLE BY OS RAM + * | | | + * | | | + * | v | + * +--------+--------------+------+ 0x40860610 / 0x40860610 + * | ^ | + * | | | + * | | | + * | | iram_seg | *CLAIMABLE BY OS RAM + * | | | + * | | | + * | v | + * +------------------------------+ 0x40869610 / 0x40869610 + * | ^ | + * | | | + * | | | + * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | | | + * | v | + * +------------------------------+ 0x40870610 / 0x40870610 + * | ^ | + * | | | + * | | dram_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | v | + * +--------+--------------+------+ 0x4087FFFF / 0x4087FFFF - HP SRAM END +``` + +### ESP32-H2 + +``` + IRAM ADDR / DRAM ADDR + * +--------+--------------+------+ 0x40800000 / 0x40800000 - HP SRAM START + * | ^ | + * | | | + * | | | + * | | FREE | *CLAIMABLE BY OS RAM + * | | | + * | | | + * | v | + * +--------+--------------+------+ 0x408317D0 / 0x408317D0 + * | ^ | + * | | | + * | | | + * | | iram_seg | *CLAIMABLE BY OS RAM + * | | | + * | | | + * | v | + * +------------------------------+ 0x40839FD0 / 0x40839FD0 + * | ^ | + * | | | + * | | | + * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | | | + * | v | + * +------------------------------+ 0x40840FD0 / 0x40840FD0 + * | ^ | + * | | | + * | | dram_seg | *** SHOULD NOT BE OVERLAPPED *** + * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP *** + * | v | + * +--------+--------------+------+ 0x4084FFFF / 0x4084FFFF - HP SRAM END +``` diff --git a/bootloader/mcuboot/docs/readme-mbed.md b/bootloader/mcuboot/docs/readme-mbed.md new file mode 100644 index 0000000..2162678 --- /dev/null +++ b/bootloader/mcuboot/docs/readme-mbed.md @@ -0,0 +1,41 @@ +# MCUboot port for Mbed OS + +This is an MCUboot port for Mbed OS. + +## Using MCUboot + +Note: The following is a general overview. It does not cover MCUboot or Mbed OS basics. + +See https://github.com/AGlass0fMilk/mbed-mcuboot-demo as a detailed example. + +### Basic configurations + +To use MCUboot, you need to create an Mbed OS project with the following configurations: +* `"mcuboot.primary-slot-address"`: address of the primary slot in the internal flash +* `"mcuboot.slot-size"`: size of an image slot (only one image, two slots are currently supported) +* `"mcuboot.max-img-sectors"`: maximum number of sectors, should be at least the number of sectors in each slot +* `"target.restrict_size"`: the maximum size of the bootloader, such that it does not overlap with the primary slot + +More configurations such as signing algorithm, slot swapping, etc. can be found in [mbed_lib.json](https://github.com/mcu-tools/mcuboot/tree/main/boot/mbed/mbed_lib.json). Please note that certain features are not currently supported. + +### Providing a secondary slot + +You need to provide an instance of `mbed::BlockDevice` as the secondary slot. It can be any types of internal or external storage provided that: +* Its size equals the `"mcuboot.slot-size"` you have set +* Its minimum supported read and write sizes (granularities) are _no larger than_ 16 byte, which MCUboot's read/write operations are aligned to. If the read size is larger than _one byte_, you need to set `"mcuboot.read-granularity"` to the read size of the storage - this buffers smaller read operations. + +In order for MCUboot to access your secondary slot, the interface to implement is +```cpp +mbed::BlockDevice* get_secondary_bd(void); +``` +which should return an uninitialized instance of BlockDevice. + +### Building the bootloader + +To build a bootloader based on MCUboot, make sure `"mcuboot.bootloader-build"` is `true` (already the default) and you have provided configurations and a secondary slot BlockDevice as explained above. + +### Building a user application + +To build a user application, set `"mcuboot.bootloader-build"` to `false` so MCUboot is built as a _library only_ without a bootloader application. This is useful if your user application needs to confirm the current image with `boot_set_confirmed()` after an update, or set a new image in the secondary slot as pending with `boot_set_pending()` in order to trigger an update upon reboot. + +As your application starts in the primary slots (instead of the beginning of the whole flash), you need to set the start address (`"target.mbed_app_start"`) to be equal to `"mcuboot.primary-slot-address"` + `"mcuboot.header-size"` of your bootloader. And its size (`"target.mbed_app_size"`) must be no larger than `"mcuboot.slot-size"` - `"mcuboot.header-size"`, and some space must be left for the image trailer too (see [this](design.md#image-trailer)). diff --git a/bootloader/mcuboot/docs/readme-mynewt.md b/bootloader/mcuboot/docs/readme-mynewt.md new file mode 100644 index 0000000..0ead2a4 --- /dev/null +++ b/bootloader/mcuboot/docs/readme-mynewt.md @@ -0,0 +1,52 @@ +# Running mynewt apps with MCUboot + +Due to small differences between Mynewt's bundled bootloader and MCUboot, +when building an app that will be run with MCUboot as the bootloader and +which at the same time requires to use `newtmgr` to manage images, MCUboot +must be added as a new dependency for this app. + +First you need to add the repo to your `project.yml`: + +``` + project.repositories: + - mcuboot + + repository.mcuboot: + type: github + vers: 0-dev + user: mcu-tools + repo: mcuboot +``` + +Then update your app's `pkg.yml` adding the extra dependency: + +``` + pkg.deps: + - "@mcuboot/boot/bootutil" +``` + +Also remove any dependency on `boot/bootutil` (mynewt's bundled bootloader) +which might exist. + +To configure MCUboot check all the options available in +`boot/mynewt/mcuboot_config/syscfg.yml`. + +Also, MCUboot uses a different image header struct as well as slightly +different TLV structure, so images created by `newt` have to be generated +in this new format. That is done by passing the extra parameter `-2` as in: + +`newt create-image -2` + +# Boot serial functionality with Mynewt + +Building with `BOOT_SERIAL: 1` enables some basic management functionality +like listing images and uploading a new image to `slot0`. The serial bootloader +requires that `mtu` is set to a value that is less than or equal to `256`. +This can be done either by editing `~/.newtmgr.cp.json` and setting the `mtu` +for the connection profile, or specifying you connection string manually as in: + +``` +newtmgr --conntype serial --connstring "dev=/dev/ttyUSB0,mtu=256" image upload -e blinky.img +``` + +where `/dev/ttyUSB0` is your serial port. diff --git a/bootloader/mcuboot/docs/readme-nuttx.md b/bootloader/mcuboot/docs/readme-nuttx.md new file mode 100644 index 0000000..1c06964 --- /dev/null +++ b/bootloader/mcuboot/docs/readme-nuttx.md @@ -0,0 +1,52 @@ +# MCUboot port for NuttX + +## Description + +The NuttX port of MCUboot secure boot library expects that the platform provides a Flash storage with the following partitions: +- `CONFIG_MCUBOOT_PRIMARY_SLOT_PATH`: MTD partition for the application firmware image PRIMARY slot; +- `CONFIG_MCUBOOT_SECONDARY_SLOT_PATH`: MTD partition for the application firmware image SECONDARY slot; +- `CONFIG_MCUBOOT_SCRATCH_PATH`: MTD partition for the Scratch area; + +Also, these are optional features that may be enabled: + +- `CONFIG_MCUBOOT_WATCHDOG`: If `CONFIG_WATCHDOG` is enabled, MCUboot shall reset the watchdog timer indicated by `CONFIG_MCUBOOT_WATCHDOG_DEVPATH` to the current timeout value, preventing any imminent watchdog timeouts. + +The porting layer of MCUboot library consists of the following interfaces: +- ``, for enabling MCUboot to manage the application firmware image slots in the device storage. +- ``, for configuration of MCUboot's features. +- ``, for providing logging capabilities. +- ``, for providing MCUboot access to the OS memory management interfaces. +- ``, for configuration of the system's flash area organization. + +The NuttX port of MCUboot is implemented at application-level and requires minimal knowledge about characteristics of the underlying storage device. This is achieved by means of the `BCH` and `FTL` subsystems, which enable MCUboot to manage MTD partitions via character device drivers using standard POSIX filesystem operations (e.g. `open()` / `close()` / `read()` / `write()`). + +## Creating MCUboot-compatible application firmware images + +One common use case for MCUboot is to integrate it to a firmware update agent, which is an important component of a secure firmware update subsystem. Through MCUboot APIs an application is able to install a newly received application firmware image and, once this application firmware image is assured to be valid, the application may confirm it as a stable image. In case that application firmware image is deemed bogus, MCUboot provides an API for invalidating that update, which will induce a rollback procedure to the most recent stable application firmware image. + +The `CONFIG_MCUBOOT_UPDATE_AGENT_EXAMPLE` example demonstrates this workflow by downloading an application firmware image from a webserver, installing it and triggering the firmware update process for the next boot after a system reset. There is also the `CONFIG_MCUBOOT_SLOT_CONFIRM_EXAMPLE`, which is a fairly simple example that just calls an MCUboot API for confirming the executing application firmware image as stable. + +## Using MCUboot on NuttX as a secure boot solution + +NuttX port for MCUboot also enables the creation of a secure bootloader application requiring minimal platform-specific implementation. The logical implementation for the secure boot is performed at application-level by the MCUboot library. Once MCUboot validates the application firmware image, it delegates the loading and execution of the application firmware image to a platform-specific routine, which is accessed via `boardctl(BOARDIOC_BOOT_IMAGE)` call. Each platform must then provide an implementation for the `board_boot_image()` for executing the required actions in order to boot a new application firmware image (e.g. deinitialize peripherals, load the Program Counter register with the application firmware image entry point address). + +The MCUboot bootloader application may be enabled by selecting the `CONFIG_MCUBOOT_BOOTLOADER` option. + +## Assumptions + +### IOCTL MTD commands + +The implementation of `` expects that the MTD driver for a given image partition handles the following `ioctl` commands: +- `MTDIOC_GEOMETRY`, for retrieving information about the geometry of the MTD, required for the configuration of the size of each flash area. +- `MTDIOC_ERASESTATE`, for retrieving the byte value of an erased cell of the MTD, required for the implementation of `flash_area_erased_val()` interface. + +### Write access alignment + +Through `flash_area_align()` interface MCUboot expects that the implementation provides the shortest data length that may be written via `flash_area_write()` interface. The NuttX implementation passes through the `BCH` and `FTL` layers, which appropriately handle the write alignment restrictions of the underlying MTD. So The NuttX implementation of `flash_area_align()` is able to return a fixed value of 1 byte, even if the MTD does not support byte operations. + +## Limitations + +### `` functions are not multitasking-safe + +MCUboot's documentation imposes no restrictions regarding the usage of its public interfaces, which doesn't mean they are thread-safe. +But, regarding NuttX implementation of the ``, it is safe to state that they are **not** multitasking-safe. NuttX implementation manages the MTD partitions via character device drivers. As file-descriptors cannot be shared between different tasks, if one task calls `flash_area_open` and another task calls `flash_area_` passing the same `struct flash_area` instance, it will result in failure. diff --git a/bootloader/mcuboot/docs/readme-riot.md b/bootloader/mcuboot/docs/readme-riot.md new file mode 100644 index 0000000..3aba53b --- /dev/null +++ b/bootloader/mcuboot/docs/readme-riot.md @@ -0,0 +1,47 @@ +# Building and using MCUboot with RIOT + +MCUboot began its life as the bootloader for Mynewt. It has since +acquired the ability to be used as a bootloader for RIOT as well. +Currently the support is limited to the nrf52dk platform. + +## Building the bootloader itself + +In this first version, a prebuilt Mynewt binary is downloaded at +compile time. This binary was compiled to do an integrity check, but +not a signature check. In order to configure the bootloader for +signature check it is necessary to re-compile it either with Mynewt +or Zephyr, following the provided instructions. + +In the next version, it is planned to compile MCUboot using RIOT, +which should be able to boot any of the supported OS images. + +## Building applications for the bootloader + +A compatible MCUboot image can be compiled by typing: `make mcuboot`. + +The only variable which needs to be set is `IMAGE_VERSION` loaded +with a valid formatted value. The format is `major.minor.patch+other` +(e.g. `export IMAGE_VERSION= 1.1.1+1`. This variable can be either +exported in the Makefile or manually, prior to the compilation process. + +The goal is to produce an ELF file which is linked to be flashed at a +`BOOTLOADER_OFFSET` offset rather than the beginning of ROM. MCUboot +also expects an image padded with some specific headers containing the +version information, and trailer type-length-value records (TLVs) with +hash and signing information. This is done through the imgtool.py +application, which is executed automatically by the RIOT build system. + +### Signing the application + +The application will be automatically signed with the provided key. +If no key is provided, a new key will be automatically generated. The +default key type is RSA-2048. + +In order to use your provided key, you need to recompile the bootloader +using you public key, either in Zephyr or Mynewt by following the +provided procedure for the selected OS. + +### Flashing the application + +The application can be flashed by typing: `make flash-mcuboot`. +This will flash both the bootloader and the application. diff --git a/bootloader/mcuboot/docs/readme-zephyr.md b/bootloader/mcuboot/docs/readme-zephyr.md new file mode 100644 index 0000000..1e55ea7 --- /dev/null +++ b/bootloader/mcuboot/docs/readme-zephyr.md @@ -0,0 +1,256 @@ +# Building and using MCUboot with Zephyr + +MCUboot began its life as the bootloader for Mynewt. It has since +acquired the ability to be used as a bootloader for Zephyr as well. +There are some pretty significant differences in how apps are built +for Zephyr, and these are documented here. + +Please see the [design document](design.md) for documentation on the design +and operation of the bootloader itself. This functionality should be the same +on all supported RTOSs. + +The first step required for Zephyr is making sure your board has flash +partitions defined in its device tree. These partitions are: + +- `boot_partition`: for MCUboot itself +- `slot0_partition`: the primary slot of Image 0 +- `slot1_partition`: the secondary slot of Image 0 + +It is not recommended to use the swap-using-scratch algorithm of MCUboot, but +if this operating mode is desired then the following flash partition is also +needed (see end of this help file for details on creating a scratch partition +and how to use the swap-using-scratch algorithm): + +- `scratch_partition`: the scratch slot + +Currently, the two image slots must be contiguous. If you are running +MCUboot as your stage 1 bootloader, `boot_partition` must be configured +so your SoC runs it out of reset. If there are multiple updateable images +then the corresponding primary and secondary partitions must be defined for +the rest of the images too (for example, `slot2_partition` and +`slot3_partition` for Image 1). + +The flash partitions are typically defined in the Zephyr boards folder, in a +file named `boards///.dts`. An example `.dts` file with +flash partitions defined is the frdm_k64f's in +`boards/arm/frdm_k64f/frdm_k64f.dts`. Make sure the DT node labels in your board's +`.dts` file match the ones used there. + +## Installing requirements and dependencies + +Install additional packages required for development with MCUboot: + +``` + cd ~/mcuboot # or to your directory where MCUboot is cloned + pip3 install --user -r scripts/requirements.txt +``` + +## Building the bootloader itself + +The bootloader is an ordinary Zephyr application, at least from +Zephyr's point of view. There is a bit of configuration that needs to +be made before building it. Most of this can be done as documented in +the `CMakeLists.txt` file in boot/zephyr. There are comments there for +guidance. It is important to select a signature algorithm, and decide +if the primary slot should be validated on every boot. + +To build MCUboot, create a build directory in boot/zephyr, and build +it as usual: + +``` + cd boot/zephyr + west build -b +``` + +In addition to the partitions defined in DTS, some additional +information about the flash layout is currently required to build +MCUboot itself. All the needed configuration is collected in +`boot/zephyr/include/target.h`. Depending on the board, this information +may come from board-specific headers, Device Tree, or be configured by +MCUboot on a per-SoC family basis. + +After building the bootloader, the binaries should reside in +`build/zephyr/zephyr.{bin,hex,elf}`, where `build` is the build +directory you chose when running `west build`. Use `west flash` +to flash these binaries from the build directory. Depending +on the target and flash tool used, this might erase the whole of the flash +memory (mass erase) or only the sectors where the bootloader resides prior to +programming the bootloader image itself. + +## Building applications for the bootloader + +In addition to flash partitions in DTS, some additional configuration +is required to build applications for MCUboot. + +This is handled internally by the Zephyr configuration system and is wrapped +in the `CONFIG_BOOTLOADER_MCUBOOT` Kconfig variable, which must be enabled in +the application's `prj.conf` file. + +The directory `samples/zephyr/hello-world` in the MCUboot tree contains +a simple application with everything you need. You can try it on your +board and then just make a copy of it to get started on your own +application; see samples/zephyr/README.md for a tutorial. + +The Zephyr `CONFIG_BOOTLOADER_MCUBOOT` configuration option +[documentation](https://docs.zephyrproject.org/latest/kconfig.html#CONFIG_BOOTLOADER_MCUBOOT) +provides additional details regarding the changes it makes to the image +placement and generation in order for an application to be bootable by MCUboot. + +With this, build the application as your normally would. + +### Signing the application + +In order to upgrade to an image (or even boot it, if +`MCUBOOT_VALIDATE_PRIMARY_SLOT` is enabled), the images must be signed. +To make development easier, MCUboot is distributed with some example +keys. It is important to stress that these should never be used for +production, since the private key is publicly available in this +repository. See below on how to make your own signatures. + +Images can be signed with the `scripts/imgtool.py` script. It is best +to look at `samples/zephyr/Makefile` for examples on how to use this. + +### Flashing the application + +The application itself can flashed with regular flash tools, but will +need to be programmed at the offset of the primary slot for this particular +target. Depending on the platform and flash tool you might need to manually +specify a flash offset corresponding to the primary slot starting address. This +is usually not relevant for flash tools that use Intel Hex images (.hex) instead +of raw binary images (.bin) since the former include destination address +information. Additionally you will need to make sure that the flash tool does +not perform a mass erase (erasing the whole of the flash) or else you would be +deleting MCUboot. +These images can also be marked for upgrade, and loaded into the secondary slot, +at which point the bootloader should perform an upgrade. It is up to +the image to mark the primary slot as "image ok" before the next reboot, +otherwise the bootloader will revert the application. + +## Managing signing keys + +The signing keys used by MCUboot are represented in standard formats, +and can be generated and processed using conventional tools. However, +`scripts/imgtool.py` is able to generate key pairs in all of the +supported formats. See [the docs](imgtool.md) for more details on +this tool. + +### Generating a new keypair + +Generating a keypair with imgtool is a matter of running the keygen +subcommand: + +``` + $ ./scripts/imgtool.py keygen -k mykey.pem -t rsa-2048 +``` + +The argument to `-t` should be the desired key type. See the +[the docs](imgtool.md) for more details on the possible key types. + +### Extracting the public key + +The generated keypair above contains both the public and the private +key. It is necessary to extract the public key and insert it into the +bootloader. Use the ``CONFIG_BOOT_SIGNATURE_KEY_FILE`` Kconfig option to +provide the path to the key file so the build system can extract +the public key in a format usable by the C compiler. +The generated public key is saved in `build/zephyr/autogen-pubkey.h`, which is included +by the `boot/zephyr/keys.c`. + +Currently, the Zephyr RTOS port limits its support to one keypair at the time, +although MCUboot's key management infrastructure supports multiple keypairs. + +Once MCUboot is built, this new keypair file (`mykey.pem` in this +example) can be used to sign images. + +## Using swap-using-scratch flash algorithm + +To use the swap-using-scratch flash algorithm, a scratch partition needs to be +present for the target board which is used for holding the data being swapped +from both slots, this section must be at least as big as the largest sector +size of the 2 partitions (e.g. if a device has a primary slot in main flash +with a sector size of 512 bytes and secondar slot in external off-chip flash +with a sector size of 4KB then the scratch area must be at least 4KB in size). +The number of sectors must also be evenly divisable by this sector size, e.g. +4KB, 8KB, 12KB, 16KB are allowed, 7KB, 7.5KB are not. This scratch partition +needs adding to the .dts file for the board, e.g. for the nrf52dk_nrf52832 +board thus would involve updating +`/boards/nordic/nrf52dk/nrf52dk_nrf52832.dts` with: + +``` + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 0xc000>; + }; + slot0_partition: partition@c000 { + label = "image-0"; + reg = <0x0000C000 0x37000>; + }; + slot1_partition: partition@43000 { + label = "image-1"; + reg = <0x00043000 0x37000>; + }; + scratch_partition: partition@7a000 { + label = "image-scratch"; + reg = <0x0007a000 0x00006000>; + }; +``` + +Which would make the application size 220KB and scratch size 24KB (the nRF52832 +has a 4KB sector size so the size of the scratch partition can be reduced at +the cost of vastly reducing flash lifespan, e.g. for a 32KB firmware update +with an 8KB scratch area, the scratch area would be erased and programmed 8 +times per image upgrade/revert). To configure MCUboot to work in +swap-using-scratch mode, the Kconfig value must be set when building it: +`CONFIG_BOOT_SWAP_USING_SCRATCH=y`. + +Note that it is possible for an application to get into a stuck state when +swap-using-scratch is used whereby an application has loaded a firmware update +and marked it as test/confirmed but MCUboot will not swap the images and +erasing the secondary slot from the zephyr application returns an error +because the slot is marked for upgrade. + +## Serial recovery + +### Interface selection + +A serial recovery protocol is available over either a hardware serial port or a USB CDC ACM virtual serial port. +The SMP server implementation can be enabled by the ``CONFIG_MCUBOOT_SERIAL=y`` Kconfig option. +To set a type of an interface, use the ``BOOT_SERIAL_DEVICE`` Kconfig choice, and select either the ``CONFIG_BOOT_SERIAL_UART`` or the ``CONFIG_BOOT_SERIAL_CDC_ACM`` value. +Which interface belongs to the protocol shall be set by the devicetree-chosen node: +- `zephyr,console` - If a hardware serial port is used. +- `zephyr,cdc-acm-uart` - If a virtual serial port is used. + +### Entering the serial recovery mode + +To enter the serial recovery mode, the device has to initiate rebooting, and a triggering event has to occur (for example, pressing a button). + +By default, the serial recovery GPIO pin active state enters the serial recovery mode. +Use the ``mcuboot_button0`` devicetree button alias to assign the GPIO pin to the MCUboot. + +Alternatively, MCUboot can wait for a limited time to check if DFU is invoked by receiving an MCUmgr command. +Select ``CONFIG_BOOT_SERIAL_WAIT_FOR_DFU=y`` to use this mode. ``CONFIG_BOOT_SERIAL_WAIT_FOR_DFU_TIMEOUT`` option defines +the amount of time in milliseconds the device will wait for the trigger. + +### Direct image upload + +By default, the SMP server implementation will only use the first slot. +To change it, invoke the `image upload` MCUmgr command with a selected image number, and make sure the ``CONFIG_MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD=y`` Kconfig option is enabled. +Note that the ``CONFIG_UPDATEABLE_IMAGE_NUMBER`` Kconfig option adjusts the number of image-pairs supported by the MCUboot. + +The mapping of image number to partition is as follows: +* 0 and 1 - image-0, the primary slot of the first image. +* 2 - image-1, the secondary slot of the first image. +* 3 - image-2. +* 4 - image-3. + +0 is a default upload target when no explicit selection is done. + +### System-specific commands + +Use the ``CONFIG_ENABLE_MGMT_PERUSER=y`` Kconfig option to enable the following additional commands: +* Storage erase - This command allows erasing the storage partition (enable with ``CONFIG_BOOT_MGMT_CUSTOM_STORAGE_ERASE=y``). +* Custom image list - This command allows fetching version and installation status (custom properties) for all images (enable with ``CONFIG_BOOT_MGMT_CUSTOM_IMG_LIST=y``). + +### More configuration + +For details on other available configuration options for the serial recovery protocol, check the Kconfig options (for example by using ``menuconfig``). diff --git a/bootloader/mcuboot/docs/release-notes.d/00readme.md b/bootloader/mcuboot/docs/release-notes.d/00readme.md new file mode 100644 index 0000000..12b8c12 --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/00readme.md @@ -0,0 +1,29 @@ +# Pending release notes directory + +This directory contains release note entries that have not been merged +into the main release-notes.md document. + +Generally a release note entry should be created for changes that: + +- Fix bugs in the code. +- Implement new features. +- Change existing behavior. + +Release notes are generally not needed for: + +- Some documentation improvements. +- Strictly internal changes to the code that won't be visible to users + of the code. + +## Release note format + +Release notes are included in files under this `docs/release-notes.d` +directory and have a name of `*.md`. They will be included in the +`release-notes.md` file, and should be formatted as a Markdown list +entry. (A script will be developed to collect these, ordered by when +the commits were added to the tree.) + +Choose a filename that is related to what this change does. The names +are not used for anything in particular, but to keep the files +distinct so that there isn't a concern with merge conflicts as +different pull requests merge in different orders. diff --git a/bootloader/mcuboot/docs/release-notes.d/bootutil-enc-hw-keys.md b/bootloader/mcuboot/docs/release-notes.d/bootutil-enc-hw-keys.md new file mode 100644 index 0000000..2640b67 --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/bootutil-enc-hw-keys.md @@ -0,0 +1,2 @@ +- Added support for retrieving hw embed private keys for image encryption + (The private key can be retrieved from trusted sources like OTP, TPM.). diff --git a/bootloader/mcuboot/docs/release-notes.d/bootutil-image-verification.md b/bootloader/mcuboot/docs/release-notes.d/bootutil-image-verification.md new file mode 100644 index 0000000..a1cc588 --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/bootutil-image-verification.md @@ -0,0 +1,4 @@ +- Changed bootutil's order of events to verify the image header + before checking the image. +- Added the bootloader state object to the bootutil + boot_is_header_valid() function diff --git a/bootloader/mcuboot/docs/release-notes.d/encrypted-scratch-partition.md b/bootloader/mcuboot/docs/release-notes.d/encrypted-scratch-partition.md new file mode 100644 index 0000000..ea51605 --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/encrypted-scratch-partition.md @@ -0,0 +1,3 @@ +- When using swap with scratch, the image is now decrypted when copying from + the scratch partition to the primary slot. Therefore, the sratch partition + doesn't contain plaintext firmware data anymore. diff --git a/bootloader/mcuboot/docs/release-notes.d/fix-nordic.md b/bootloader/mcuboot/docs/release-notes.d/fix-nordic.md new file mode 100644 index 0000000..9706f8a --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/fix-nordic.md @@ -0,0 +1,2 @@ +- Fixed errors when building for ``thingy52``, ``thingy53`` and + ``nrf9160dk`` boards. diff --git a/bootloader/mcuboot/docs/release-notes.d/fix-ram-load-zephyr-address.md b/bootloader/mcuboot/docs/release-notes.d/fix-ram-load-zephyr-address.md new file mode 100644 index 0000000..c636bc9 --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/fix-ram-load-zephyr-address.md @@ -0,0 +1,2 @@ +- Fixed chain load address output log message for RAM load + mode in Zephyr diff --git a/bootloader/mcuboot/docs/release-notes.d/fix-zephyr-sysbuild-name.md b/bootloader/mcuboot/docs/release-notes.d/fix-zephyr-sysbuild-name.md new file mode 100644 index 0000000..1e241b6 --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/fix-zephyr-sysbuild-name.md @@ -0,0 +1,2 @@ +- Fixed clash when using sysbuild with other + applications (i.e. tests) using the name sysbuild diff --git a/bootloader/mcuboot/docs/release-notes.d/imgtool_sanity_test.md b/bootloader/mcuboot/docs/release-notes.d/imgtool_sanity_test.md new file mode 100644 index 0000000..5123921 --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/imgtool_sanity_test.md @@ -0,0 +1,2 @@ +- imgtool: added initial sanity tests for imgtool commands, +- imgtool: added and enabled unittests in GitGub workflow, diff --git a/bootloader/mcuboot/docs/release-notes.d/max-app-size-changes.md b/bootloader/mcuboot/docs/release-notes.d/max-app-size-changes.md new file mode 100644 index 0000000..21d25db --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/max-app-size-changes.md @@ -0,0 +1,4 @@ +- Fixed wrong maximum application size calculation when + operating in swap using move mode +- Added additional images max size support to shared data + function diff --git a/bootloader/mcuboot/docs/release-notes.d/serial-recovery-slot-info.md b/bootloader/mcuboot/docs/release-notes.d/serial-recovery-slot-info.md new file mode 100644 index 0000000..fbd3335 --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/serial-recovery-slot-info.md @@ -0,0 +1 @@ +- Added slot info command support to serial recovery mode diff --git a/bootloader/mcuboot/docs/release-notes.d/zephyr-auto-max-sectors.md b/bootloader/mcuboot/docs/release-notes.d/zephyr-auto-max-sectors.md new file mode 100644 index 0000000..a45aeb0 --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/zephyr-auto-max-sectors.md @@ -0,0 +1,5 @@ +- Added support for automatically calculating the maximum number + of sectors that are needed for a build by checking the erase + sizes of the partitions using CMake for Zephyr. This behaviour + can be reverted to the old manual behaviour by disabling + ``CONFIG_BOOT_MAX_IMG_SECTORS_AUTO`` diff --git a/bootloader/mcuboot/docs/release-notes.d/zephyr-compression.md b/bootloader/mcuboot/docs/release-notes.d/zephyr-compression.md new file mode 100644 index 0000000..ba9ec2a --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.d/zephyr-compression.md @@ -0,0 +1,7 @@ +- Added protected TLV size to image size check in bootutil +- Added Kconfig for decompression support in Zephyr +- Added compressed image flags and TLV to bootutil +- Added support for removing images with conflicting flags in + bootutil +- Added support for removing encrypted/compressed images when + MCUboot is compiled without support for them diff --git a/bootloader/mcuboot/docs/release-notes.md b/bootloader/mcuboot/docs/release-notes.md new file mode 100644 index 0000000..728a5b4 --- /dev/null +++ b/bootloader/mcuboot/docs/release-notes.md @@ -0,0 +1,553 @@ +# MCUboot release notes + +- Table of Contents +{:toc} + +## Version 2.1.0 + +- Boot serial: Add response to echo command if support is not + enabled, previously the command would have been accepted but no + response indicating that the command is not supported would have + been sent. +- Added support for using builtin keys for image validation + (available with the PSA Crypto API based crypto backend for ECDSA signatures). +- Enforce that TLV entries that should be protected are. + This can be disabled by defining `ALLOW_ROGUE_TLVS` +- bootutil: Fixed issue with comparing sector sizes for + compatibility, this now also checks against the number of usable + sectors (which is the slot size minus the swap status and moved + up by one sector). +- bootutil: Added debug logging to show write location of swap status + and details on sectors including if slot sizes are not optimal for + a given board. +- Update ptest to support test selection. Ptest can now be invoked with `list` + to show the available tests and `run` to run them. The `-t` argument will + select specific tests to run. +- Allow sim tests to skip slow tests. By setting `MCUBOOT_SKIP_SLOW_TESTS` in + the environment, the sim will skip two tests that are very slow. In one + instance this reduces the test time from 2 hours to about 5 minutes. These + slow tests are useful, in that they test bad powerdown recovery, but are + inconvenient when testing other areas. +- Zephyr: Fixes support for disabling instruction/data caches prior + to chain-loading an application, this will be automatically + enabled if one or both of these caches are present. This feature + can be disabled by setting `CONFIG_BOOT_DISABLE_CACHES` to `n`. +- Zephyr: Fix issue with single application slot mode, serial + recovery and encryption whereby an encrypted image is loaded + and being wrongly treated as encrypted after decryption. +- Zephyr: Add estimated image footer size to cache in sysbuild. +- Added firmware loader configuration type support for Zephyr, this + allows for a single application slot and firmware loader image in + the secondary slot which is used to update the primary image + (loading it in any way it sees fit e.g. via Bluetooth). +- Zephyr: Remove deprecated ZEPHYR_TRY_MASS_ERASE Kconfig option. +- Zephyr: Prevent MBEDTLS Kconfig selection when tinycrypt is used. +- Zephyr: Add USB CDC serial recovery check that now causes a build + failure if console is enabled and device is the same as the USB + CDC device. +- Zephyr: Add USB CDC serial recovery check that now causes a build + failure if the main thread priority is below 0 (cooperative + thread), this would prevent USB CDC from working as the driver + would not have been able to fire callbacks. +- Use general flash operations to determine the flash reset vector. This + improves support a bit for some configurations of external flash. +- fix a memory leak in the HKDF implementation. +- Zephyr: Added a MCUboot banner which displays the version of + MCUboot being used and the version of zephyr. This can be + disabled by setting ``CONFIG_MCUBOOT_BOOT_BANNER=n`` which + will revert back to the default zephyr boot banner. + +## Version 2.0.0 + +Note that this release, 2.0.0 is a new major number, and contains a small API +change in the interface between mcuboot and the platform. All platforms +contained within the MCUboot tree have been updated, but any external platforms +will have to be adjusted. The following commit makes the API change, in the +function `boot_save_shared_data`. + + commit 3016d00cd765e7c09a14af55fb4dcad945e4b982 + Author: Jamie McCrae + Date: Tue Mar 14 12:35:51 2023 +0000 + + bootutil: Add active slot number and max app size to shared data + +### About this release + +- Add error when flash device fails to open. +- Panic bootloader when flash device fails to open. +- Fixed issue with serial recovery not showing image details for + decrypted images. +- Fixes issue with serial recovery in single slot mode wrongly + iterating over 2 image slots. +- CDDL auto-generated function code has been replaced with zcbor function + calls, this now allows the parameters to be supplied in any order. +- Added currently running slot ID and maximum application size to + shared data function definition. +- Make the ECDSA256 TLV curve agnostic and rename it to ECDSA_SIG. +- imgtool: add P384 support along with SHA384. +- espressif: refactor after removing IDF submodule +- espressif: add ESP32-C6, ESP32-C2 and ESP32-H2 new chips support +- espressif: adjustments after IDF v5.1 compatibility, secure boot build and memory map organization +- Serial recovery image state and image set state optional commands added +- imgtool: add 'dumpinfo' command for signed image parsing. +- imgtool: add 'getpubhash' command to dump the sha256 hash of the public key +- imgtool's getpub can print the output to a file +- imgtool can dump the raw versions of the public keys +- Drop ECDSA P224 support +- Fixed an issue with boot_serial repeats not being processed when + output was sent, this would lead to a divergence of commands + whereby later commands being sent would have the previous command + output sent instead. +- Fixed an issue with the boot_serial zcbor setup encoder function + wrongly including the buffer address in the size which caused + serial recovery to fail on some platforms. +- zcbor library files have been updated to version 0.7.0 +- Reworked boot serial extensions so that they can be used by modules + or from user repositories by switching to iterable sections. +- Removed Zephyr custom img list boot serial extension support. +- (Zephyr) Adds support for sharing boot information with + application via retention subsystem +- Zephyr no longer builds in optimize for debug mode, this saves a + significant amount of flash space. +- Reworked image encryption support for Zephyr, static dummy key files + are no longer in the code, a pem file must be supplied to extract + the private and public keys. The Kconfig menu has changed to only + show a single option for enabling encryption and selecting the key + file. +- Serial recovery can now read and handle encrypted seondary slot + partitions. +- Serial recovery with MBEDTLS no longer has undefined operations which + led to usage faults when the secondary slot image was encrypted. +- espressif: allow the use of a different toolchain for building + +## Version 1.10.0 + +The 1.10.0 release of MCUboot contains... + +### About this release + +- Various fixes to boot serial. +- Various fixes to the mbed target. +- Various fixes to the Espressif native target. +- Various fixes to the Zephyr target. +- Workflow improvements with Zephyr CI. +- Add multi image support to the espressif esp32 target. +- Improvements and corrections to the simulator. +- Improve imgtool, including adding 3rd party signing support. +- Various fixes to the mynewt target. +- Various fixes to the nuttx target. +- Dates to dependencies for doc generation. +- Add downgrade prevention for modes using swap. +- Various general fixes to the boot code. +- Prefer swap move on zephyr if the scratch partition is not enabled. +- Upgrade fault-injection hardening, improving cases injections are detected. +- Add a new flash api `flash_area_get_sector`, along with support for each + target, that replaces `flash_area_sector_from_off`. This is a step in cleaning + up the flash API used by MCUboot. + +### Security fixes + +There are no security vulnerabilities reported on the MCUboot code for this +release. There have been several updates to the dependencies in the Ruby code +used to generate the documentation. This should only affect users that generate +their own documentation. + +## Version 1.9.0 + +The 1.9.0 release of MCUboot contains various bug fixes, improves +support on some recent targets, and adds support for devices with a +write alignment larger than 8. + +This change introduces a potentially incompatible change to the format +of the image trailer. If `BOOT_MAX_ALIGN` is kept at 8, the trailer +format does not change. However, to support larger write alignments, +this value can be increased, which will result in a different magic +number value. These targets were previously unsupported in MCUboot, +so this change should not affect any existing targets. The change has +been tested with a `BOOT_MAX_ALIGN` up to 32 bytes. + +### About this release + +- Add native flash encryption to Espressif targets +- Numerous documentation improvements +- Increase coverage of large images in the simulator +- Add stm32 watchdog support +- Add support for the `mimxrt685_evk` board +- Add support for "partial multi-image booting" +- Add support for clear image generation with encryption capability to + imgtool +- Fix Zephyr when `CONFIG_BOOT_ENCRYPTION_KEY_FILE` is not defined +- Remove zephyr example test running in shell. The Go version is + primary and much more featureful. +- imgtool: make `--max-align` default reasonable in most cases. +- Implement the mcumgr echo command in serial boot mode + +### Security fixes + +## Version 1.8.0 + +The 1.8.0 release of MCUboot contains numerous fixes, and adds support +for the NuttX RTOS, and the Espressif ESP32 SDK. + +### About this release + +- Add support for the NuttX RTOS. +- Add support for the Espressif ESP32 SDK. +- `boot_serial` changed to use cddl-gen, which removes the dependency + on tinycbor. +- Add various hooks to be able to change how image data is accessed. +- Cypress supports Mbed TLS for encryption. +- Support using Mbed TLS for ECDSA. This can be useful if Mbed TLS is + brought in for another reason. +- Add simulator support for testing direct-XIP and ramload. +- Support Mbed TLS 3.0. Updates the submodule for Mbed TLS to 3.0. +- Enable direct-xip mode in Mbed-OS port. +- extract `bootutil_public` library, a common interface for MCUboot + and the application. +- Allow to boot primary image if secondary one is unreachable. +- Add AES256 image encryption support. +- Add Multiimage boot for direct-xip and ram-load mode. +- Cargo files moved to top level, now `cargo test` can be run from the + top level directory. +- Fault injection tests use updated TF-M. +- Thingy:53 now supports multi-image DFU. +- ram load and image encryption can be used together, allowing the + entire contents of flash to always remain encrypted. + +### Security fixes + +- [GHSA-gcxh-546h-phg4](https://github.com/mcu-tools/mcuboot/security/advisories/GHSA-gcxh-546h-phg4) + has been published. There is not a fix at this time, but a caution + to be sure to follow the instructions carefully, and make sure that + the development keys in the repo are never used in a production + system. + +## Version 1.7.0 + +The 1.7.0 release of MCUboot adds support for the Mbed-OS platform, +Equal slots (direct-xip) upgrade mode, RAM loading upgrade mode, +hardening against hardware level fault injection and timing attacks +and single image mode. +There are bug fixes, and associated imgtool updates as well. + +### About this release + +- Initial support for the Mbed-OS platform. +- Added possibility to enter deep sleep mode after MCUboot app execution + for cypress platform. +- Added hardening against hardware level fault injection and timing attacks. +- Introduced Abstract crypto primitives to simplify porting. +- Added RAM-load upgrade mode. +- Renamed single-image mode to single-slot mode. +- Allow larger primary slot in swap-move +- Fixed boostrapping in swap-move mode. +- Fixed issue causing that interrupted swap-move operation might brick device + if the primary image was padded. +- Abstracting MCUboot crypto functions for cleaner porting +- Droped flash_area_read_is_empty() porting API. +- boot/zephyr: Added watchdog feed on nRF devices. + See `CONFIG_BOOT_WATCHDOG_FEED` option. +- boot/zephyr: Added patch for turning off cache for Cortex M7 before + chain-loading. +- boot/zephyr: added option to relocate interrupts to application +- boot/zephyr: clean ARM core configuration only when selected by user +- boot/boot_serial: allow nonaligned last image data chunk +- imgtool: added custom TLV support. +- imgtool: added possibility to set confirm flag for hex files as well. +- imgtool: Print image digest during verify. + +### Zephyr-RTOS compatibility + +This release of MCUboot works with the Zephyr "main" at the time of the +release. It was tested as of has 7a3b253ce. This version of MCUboot also +works with the Zephyr v2.4.0, however it is recommended to enable +`CONFIG_MCUBOOT_CLEANUP_ARM_CORE` while using that version. + +## Version 1.6.0 + +The 1.6.0 release of MCUboot adds support for the PSOC6 platform, +X25519 encrypted images, rollback protection, hardware keys, and a +shared boot record to communicate boot attestation information to +later boot stages. There are bug fixes, and associated imgtool +updates as well. + +### About this release + +- Initial support for the Cypress PSOC6 plaformt. This platform + builds using the Cypress SDK, which has been added as submodules. +- CBOR decoding in serial recovery replaced by code generated from a + CDDL description. +- Add support for X25519 encrypted images. +- Add rollback protection. There is support for a HW rollback counter + (which must be provided as part of the platform), as well as a SW + solution that protects against some types of rollback. +- Add an optional boot record in shared memory to communicate boot + attributes to later-run code. +- Add support for hardware keys. +- Various fixes to work with the latest Zephyr version. + +### Security issues addressed + +- CVE-2020-7595 "xmlStringLenDecodeEntities in parser.c in libxml2 + 2.9.10 has an infinite loop in a certain end-of-file situation." Fix + by updating a dependency in documentation generation. + +### Zephyr-RTOS compatibility + +This release of MCUboot works the Zephyr "main" at the time of the +release. It was tested as of has 1a89ca1238. When Zephyr v2.3.0 is +released, there will be a possible 1.6.1 or similar release of Zephyr +if needed to address any issues. There also may be branch releases of +MCUboot specifically for the current version of Zephyr, e.g. +v1.6.0-zephyr-2.2.1. + +## Version 1.5.0 + +The 1.5.0 release of MCUboot adds support for encrypted images using +ECIES with secp256r1 as an Elliptic Curve alternative to RSA-OAEP. A +new swap method was added which allows for upgrades without using a +scratch partition. There are also lots of bug fixes, extra simulator +testing coverage and some imgtool updates. + +### About this release + +- TLVs were updated to use 16-bit lengths (from previous 8). This + should work with no changes for little-endian targets, but will + break compatibility with big-endian targets. +- A benchmark framework was added to Zephyr +- ed25519 signature validation can now build without using Mbed TLS + by relying on a bundled tinycrypt based sha-512 implementation. +- imgtool was updated to correctly detect trailer overruns by image. +- Encrypted image TLVs can be saved in swap metadata during a swap + upgrade instead of the plain AES key. +- imgtool can dump private keys in C format (getpriv command), which + can be added as decryption keys. Optionally can remove superfluous + fields from the ASN1 by passing it `--minimal`. +- Lots of other smaller bugs fixes. +- Added downgrade prevention feature (available when the overwrite-based + image update strategy is used) + +### Known issues + +- TLV size change breaks compatibility with big-endian targets. + +## Version 1.4.0 + +The 1.4.0 release of MCUboot primarily adds support for multi-image +booting. With this release, MCUboot can manage two images that can be +updated independently. With this, it also supports additions to the +TLV that allow these dependencies to be specified. + +Multi-image support adds backward-incompatible changes to the format +of the images: specifically adding support for protected TLV entries. +If multiple images and dependencies are not used, the images will be +compatible with previous releases of MCUboot. + +### About this release + +- Fixed CVE-2019-5477, and CVE-2019-16892. These fix issue with + dependencies used in the generation of the documentation on github. +- Numerous code cleanups and refactorings +- Documentation updates for multi-image features +- Update imgtool.py to support the new features +- Updated the Mbed TLS submodule to current stable version 2.16.3 +- Moved the Mbed TLS submodule from within sim/mcuboot-sys to ext. + This will make it easier for other board supports to use this code. +- Added some additional overflow and bound checks to data in the image + header, and TLV data. +- Add a `-x` (or `--hex_addr`) flag to imgtool to set the base address + written to a hex-format image. This allows the image to be flashed + at an offset, without having to use additional tools to modify the + image. + +## Version 1.3.1 + +The 1.3.1 release of MCUboot consists mostly of small bug fixes and updates. +There are no breaking changes in functionality. This release should work with +Mynewt 1.6.0 and up, and any Zephyr `main` after sha +f51e3c296040f73bca0e8fe1051d5ee63ce18e0d. + +### About this release + +- Fixed a revert interruption bug +- Added ed25519 signing support +- Added RSA-3072 signing support +- Allow ec256 to run on CC310 interface +- Some preparation work was done to allow for multi image support, which + should land in 1.4.0. This includes a simulator update for testing + multi-images, and a new name for slot0/slot1 which are now called + "primary slot" and "secondary slot". +- Other minor bugfixes and improvements + +## Version 1.3.0 + +The 1.3.0 release of MCUboot brings in many fixes and updates. There +are no breaking changes in functionality. Many of the changes are +refactorings that will make the code easier to maintain going forward. +In addition, support has been added for encrypted images. See [the +docs](encrypted_images.md) for more information. + +### About this release + +- Modernize the Zephyr build scripts. +- Add a `ptest` utility to help run the simulator in different + configurations. +- Migrate the simulator to Rust 2018 edition. The sim now requires at + least Rust 1.32 to build. +- Simulator cleanups. The simulator code is now built the same way + for every configuration, and queries the MCUboot code for how it was + compiled. +- Abstract logging in MCUboot. This was needed to support the new + logging system used in Zephyr. +- Add multiple flash support. Allows slot1/scratch to be stored in an + external flash device. +- Add support for [encrypted images](encrypted_images.md). +- Add support for flash devices that read as '0' when erased. +- Add support to Zephyr for the `nrf52840_pca10059`. This board + supports serial recovery over USB with CDC ACM. +- imgtool is now also available as a python package on pypi.org. +- Add an option to erase flash pages progressively during recovery to + avoid possible timeouts (required especially by serial recovery + using USB with CDC ACM). +- imgtool: big-endian support +- imgtool: saves in intel-hex format when output filename has `.hex` + extension; otherwise saves in binary format. + +## Version 1.2.0 + +The 1.2.0 release of MCUboot brings a lot of fixes/updates, where much of the +changes were on the boot serial functionality and imgtool utility. There are +no breaking changes in MCUboot functionality, but some of the CLI parameters +in imgtool were changed (either removed or added or updated). + +### About this release + +- imgtool accepts .hex formatted input +- Logging system is now configurable +- Most Zephyr configuration has been switched to Kconfig +- Build system accepts .pem files in build system to autogenerate required + key arrays used internally +- Zephyr build switched to using built-in flash_map and TinyCBOR modules +- Serial boot has substantially decreased in space usage after refactorings +- Serial boot build doesn't require newlib-c anymore on Zephyr +- imgtool updates: + + "create" subcommand can be used as an alias for "sign" + + To allow imgtool to always perform the check that firmware does not + overflow the status area, `--slot-size` was added and `--pad` was updated + to act as a flag parameter. + + `--overwrite-only` can be passed if not using swap upgrades + + `--max-sectors` can be used to adjust the maximum amount of sectors that + a swap can handle; this value must also be configured for the bootloader + + `--pad-header` substitutes `--included-header` with reverted semantics, + so it's not required for firmware built by Zephyr build system + +### Known issues + +None + +## Version 1.1.0 + +The 1.1.0 release of MCUboot brings a lot of fixes/updates to its +inner workings, specially to its testing infrastructure which now +enables a more thorough quality assurance of many of the available +options. As expected of the 1.x.x release cycle, no breaking changes +were made. From the tooling perpective the main addition is +newt/imgtool support for password protected keys. + +### About this release + +- serial recovery functionality support under Zephyr +- simulator: lots of refactors were applied, which result in the + simulator now leveraging the Rust testing infrastructure; testing + of ecdsa (secp256r1) was added +- imgtool: removed PKCS1.5 support, added support for password + protected keys +- tinycrypt 0.2.8 and the Mbed TLS ASN1 parser are now bundled with + MCUboot (eg secp256r1 is now free of external dependencies!) +- Overwrite-only mode was updated to erase/copy only sectors that + actually store firmware +- A lot of small code and documentation fixes and updates. + +### Known issues + +None + +## Version 1.0.0 + +The 1.0.0 release of MCUboot introduces a format change. It is +important to either use the `imgtool.py` also from this release, or +pass the `-2` to recent versions of the `newt` tool in order to +generate image headers with the new format. There should be no +incompatible format changes throughout the 1.x.y release series. + +### About this release + +- Header format change. This change was made to move all of the + information about signatures out of the header and into the TLV + block appended to the image. This allows + - The signature to be replaced without changing the image. + - Multiple signatures to be applied. This can be used, for example, + to sign an image with two algorithms, to support different + bootloader configurations based on these image. + - The public key is referred to by its SHA1 hash (or a prefix of the + hash), instead of an index that has to be maintained with the + bootloader. + - Allow new types of signatures in the future. +- Support for PKCS#1 v1.5 signatures has been dropped. All RSA + signatures should be made with PSS. The tools have been changed to + reflect this. +- The source for Tinycrypt has been placed in the MCUboot tree. A + recent version of Tinycrypt introduced breaking API changes. To + allow MCUboot to work across various platforms, we stop using the + Tinycrypt bundled with the OS platform, and use our own version. A + future release of MCUboot will update the Tinycrypt version. +- Support for some new targets: + - Nordic nRF51 and nRF52832 dev kits + - Hexiwear K64 +- Clearer sample applications have been added under `samples`. +- Test plans for [zephyr](testplan-zephyr.md), and + [mynewt](testplan-mynewt.md). +- The simulator is now able to test RSA signatures. +- There is an unimplemented `load_addr` header for future support for + RAM loading in the bootloader. +- Numerous documentation. + +### Known issues + +None + +## Version 0.9.0 + +This is the first release of MCUboot, a secure bootloader for 32-bit MCUs. +It is designed to be operating system-agnostic and works over any transport - +wired or wireless. It is also hardware independent, and relies on hardware +porting layers from the operating system it works with. For the first release, +we have support for three open source operating systems: Apache Mynewt, Zephyr +and RIOT. + +### About this release + +- This release supports building with and running Apache Mynewt and Zephyr + targets. +- RIOT is supported as a running target. +- Image integrity is provided with SHA256. +- Image originator authenticity is provided supporting the following + signature algorithms: + - RSA 2048 and RSA PKCS#1 v1.5 or v2.1 + - Elliptic curve DSA with secp224r1 and secp256r1 +- Two firmware upgrade algorithms are provided: + - An overwrite only which upgrades slot 0 with the image in slot 1. + - A swapping upgrade which enables image test, allowing for rollback to a + previous known good image. +- Supports both Mbed TLS and tinycrypt as backend crypto libraries. One of them + must be defined and the chosen signing algorithm will require a particular + library according to this list: + - RSA 2048 needs Mbed TLS + - ECDSA secp224r1 needs Mbed TLS + - ECDSA secp256r1 needs tinycrypt as well as the ASN.1 code from Mbed TLS + (so still needs that present). + +### Known issues + +- The image header and TLV formats are planned to change with release 1.0: + https://runtimeco.atlassian.net/browse/MCUB-66 diff --git a/bootloader/mcuboot/docs/release.md b/bootloader/mcuboot/docs/release.md new file mode 100644 index 0000000..c6e88b8 --- /dev/null +++ b/bootloader/mcuboot/docs/release.md @@ -0,0 +1,133 @@ +# Release process + +This page describes the release process used with MCUboot. + +## Version numbering + +MCUboot uses [semantic versioning][semver], where version numbers +follow a `MAJOR.MINOR.PATCH` format with the following guidelines on +incrementing the numbers: + +1. MAJOR version when there are incompatible API changes. +2. MINOR version when new functionalities were added in a + backward-compatible manner. +3. PATCH version when there are backward-compatible bug fixes. + +We add pre-release tags using the format `MAJOR.MINOR.PATCH-rc1`. + +In the documentation, we mark an MCUBoot development version using the +format `MAJOR.MINOR.PATCH-dev`. + +## Release notes + +Before making a release, update the `docs/release-notes.md` file +to describe the release. This should be a high-level description of +the changes, not a list of the git commits. + +Provided that changes going into the release have followed the +contribution guidelines, this should mostly consist of collecting the +various snippets in the `docs/release-notes.d` directory. After +incorporating these snippets into the release notes, the snippet files +should be removed to ready the directory for the next release cycle. + +## Release candidates + +Before each release, tags are made (see below) for at least one +release candidate (a.b.c-rc1, followed by a.b.c-rc2 and the subsequent +release candidates, followed by the official a.b.c release). The intent +is to freeze the code and allow testing. + +During the time between the rc1 and the final release, the only changes +that should be merged into the main branch are those to fix bugs found +in the RC and in the Mynewt metadata, as described in the next section. + +## Imgtool release + +imgtool is released through pypi.org (The Python package index). +It requires its version to be updated by editing +`scripts/imgtool/__init__.py` and modifying the exported version: +``` +imgtool_version = "A.B.CrcN" +``` + +This version should match the current release number of MCUboot. The +suffix `rcN` (with no dash) is accepted only for the pre-release versions +under test, while numbers are accepted only for the final releases. + +For more information, see [this +link](https://www.python.org/dev/peps/pep-0440/#pre-releases). + +## Mynewt release information + +On Mynewt, `newt` always fetches a versioned MCUboot release, so after +the RC step is finished, the release needs to be exported by modifying +`repository.yml` in the root directory; it must be updated with the +new release version, including updates to the pseudo keys +(`*-(latest|dev)`). + +## Zephyr release information + +There is a version file used by Zephyr builds to indicate the version +of MCUboot being used which needs to be updated at +`boot/zephyr/VERSION`. For alignment with Zephyr versions, development +versions should set `PATCHLEVEL` to `99` and `EXTRAVERSION` to `dev`, +whilst production versions should correctly set `PATCHLEVEL` and clear +`EXTRAVERSION`. + +## Tagging and release + +To make a release, make sure your local repo is on the tip version by +fetching from origin. Typically, the releaser should create a branch +named after the particular release. + +Create a commit on top of the branch that modifies the version number +in the top-level `README.md`, and create a commit, with just this +change, with a commit text similar to "Bump to version a.b.c". +Having the version bump helps to make the releases +easier to find, as each release has a commit associated with it, and +not just a tag pointing to another commit. + +Once this is done, the release should create a signed tag with the +appropriate tag name: +``` bash +git tag -s va.b.c-rcn +``` +The releaser will need to make sure that git is configured to use the +proper signing key, and that the public key is signed by enough parties to +be trusted. + +At this point, the tag can be pushed to GitHub to make the actual release +happen: +``` bash +git push origin HEAD:refs/heads/main +git push origin va.b.c-rcn +``` + +## Branching after a release + +After the final (non-`rc`) a.b.0 release is made, a new branch must +be created and pushed: + +``` bash +git checkout va.b.c +git checkout -b va.b-branch +git push origin va.b-branch +``` + +This branch will be used to generate new incremental `PATCH` releases +for bug fixes or required minor updates (for example, new `imgtool` features). + +## Post release actions + +Mark the MCUboot version as a development version. + +The version number used should be specified for the next expected release. +It should be larger than the last release version by incrementing the MAJOR or +the MINOR number. It is not necessary to define the next version precisely as +the next release version might still be different as it might be needed to do: + +- a patch release +- a MINOR release while a MAJOR release was expected +- a MAJOR release while a MINOR release was expected + +[semver]: http://semver.org/ diff --git a/bootloader/mcuboot/docs/serial_recovery.md b/bootloader/mcuboot/docs/serial_recovery.md new file mode 100644 index 0000000..ade2419 --- /dev/null +++ b/bootloader/mcuboot/docs/serial_recovery.md @@ -0,0 +1,128 @@ + + +# Serial recovery + +MCUboot implements a Simple Management Protocol (SMP) server. +SMP is a basic transfer encoding for use with the MCUmgr management protocol. +See the Zephyr [Device Management](https://docs.zephyrproject.org/latest/services/device_mgmt/index.html#device-mgmt) documentation for more information about MCUmgr and SMP. + +MCUboot supports the following subset of the MCUmgr commands: +* echo (OS group) +* reset (OS group) +* image list (IMG group) +* image upload (IMG group) + +It can also support system-specific MCUmgr commands depending on the given mcuboot-port +if the ``MCUBOOT_PERUSER_MGMT_GROUP_ENABLED`` option is enabled. + +The serial recovery feature can use any serial interface provided by the platform. + +## Image uploading + +Uploading an image is targeted to the primary slot by default. + +An image can be loaded to other slots only when the ``MCUBOOT_SERIAL_DIRECT_IMAGE_UPLOAD`` option is enabled for the platform. + +MCUboot supports progressive erasing of a slot to which an image is uploaded to if the ``MCUBOOT_ERASE_PROGRESSIVELY`` option is enabled. +As a result, a device can receive images smoothly, and can erase required part of a flash automatically. + +## Configuration of serial recovery + +How to enable and configure the serial recovery feature depends on the given mcuboot-port implementation. +Refer to the respective documentation and source code for more details. + +## Entering serial recovery mode + +Entering the serial recovery mode is usually possible right after a device reset, for instance as a reaction on a GPIO pin state. +Refer to the given mcuboot-port details to get information on how to enter the serial recovery mode. + +## Serial recovery mode usage + +### MCU Manager CLI installation + +The MCUmgr command line tool can be used as an SMP client for evaluation purposes. +The tool is available under the [MCU Manager](https://github.com/apache/mynewt-mcumgr-cli) +Github page and is described in the Zephyr +[MCU Manager CLI](https://docs.zephyrproject.org/latest/services/device_mgmt/mcumgr.html#mcumgr-cli) documentation. + +Use the following command to install the MCU Manager CLI tool: +``` console +go install github.com/apache/mynewt-mcumgr-cli/mcumgr@latest +``` +Enter serial recovery mode in the device and use an SMP client application for communication with the MCUboot's SMP server. + +### Connection configuration + +Use the following command to set the connection configuration, +for linux: +``` console +mcumgr conn add serial_1 type="serial" connstring="dev=/dev/ttyACM0,baud=115200" +``` +for windows: +``` console +mcumgr conn add serial_1 type="serial" connstring="COM1,baud=115200" +``` + +### Image management + +The connection configuration must be established to perform the following image-related commands: + +* Upload the image: + ``` console + mcumgr image upload -c serial_1 + ``` + + Once done successfully, the following notification will be displayed: + ``` console + 20.25 KiB / 20.25 KiB [=================================] 100.00% 3.08 KiB/s 6s + Done + ``` + +* List all images: + ``` console + mcumgr image list -c serial_1 + ``` + The terminal will show the response from the module: + ``` console + Images: + image=0 slot=0 + version: 0.0.0.0 + bootable: false + flags: + hash: Unavailable + Split status: N/A (0) + ``` + +### Device reset + +Reset your device with the following command: +``` console +mcumgr reset -c serial_1 +``` +The terminal should respond: +``` console +Done +``` diff --git a/bootloader/mcuboot/docs/signed_images.md b/bootloader/mcuboot/docs/signed_images.md new file mode 100644 index 0000000..bcc201b --- /dev/null +++ b/bootloader/mcuboot/docs/signed_images.md @@ -0,0 +1,100 @@ + + +## Image signing + +This signs the image by computing hash over the image, and then +signing that hash. Signature is computed by newt tool when it's +creating the image. This signature is placed in the image trailer. + +The public key of this keypair must be included in the bootloader, +as it verifies it before allowing the image to run. + +This facility allows you to use multiple signing keys. This would +be useful when you want to prevent production units from booting +development images, but want development units to be able to boot +both production images and development images. + +For an alternative solution when the public key(s) doesn't need to be +included in the bootloader, see the [design](design.md) document. + +## Creating signing keys +First you need a keypair to use for signing. You can create +one with openssl command line tool. + +openssl genrsa -out image_sign.pem 2048 + +This created a file which contains both the private and public key, +and will be used when signing images. + +Then you need to extract the public key from this to include it +in the bootloader. Bootloader need to keep key parsing minimal, +so it expects simple key format. + +openssl rsa -in image_sign.pem -pubout -out image_sign_pub.der -outform DER -RSAPublicKey_out + +Now the public key is in file called image_sign_pub.der. + +For ECDSA256 these commands are similar. +openssl ecparam -name prime256v1 -genkey -noout -out image_sign.pem +openssl ec -in image_sign.pem -pubout -outform DER -out image_sign_pub.der + +## Creating a key package + +xxd -i image_sign_pub.der image_sign_pub.c.import + +Then you need to create a package containing this key, or keys. + +## Sample pkg.yml +This gets bootutil to turn on image signature validation. + + pkg.name: libs/mykeys + pkg.deps: + - "@apache-mynewt-core/boot/bootutil" + +## Sample source file +This exports the keys. + + #include + + #include "image_sign_pub.c.import" + + const struct bootutil_key bootutil_keys[] = { + [0] = { + .key = image_sign_pub_der, + .len = &image_sign_pub_der_len, + } + }; + + const int bootutil_key_cnt = sizeof(bootutil_keys) / sizeof(bootutil_keys[0]); + +## Building the bootloader + +Enable the BOOTUTIL_SIGN_RSA syscfg setting in your app or target syscfg.yml +file + + syscfg.vals: + BOOTUTIL_SIGN_RSA: 1 + +After you've created the key package, you must include it in the build +for bootloader. So modify the pkg.yml for apps/boot to include it. + +The syscfg variable to enable ECDSA256 is BOOTUTIL_SIGN_EC256. diff --git a/bootloader/mcuboot/docs/testplan-mynewt.md b/bootloader/mcuboot/docs/testplan-mynewt.md new file mode 100644 index 0000000..402a493 --- /dev/null +++ b/bootloader/mcuboot/docs/testplan-mynewt.md @@ -0,0 +1,162 @@ +## MCUboot test plan + +The current target for running the tests is the Freedom K64F board. + +### Basic sign support (RSA/EC/EC256) + +For each supported signing algorithm, check that non-signed, and signed +with wrong key images are not swapped to, and image signed with correct key +is swapped to. + +For the 3 algorithms supported, rsa, ec and ec256, two files are provided: +key_.pem, key__2.pem. And a keys file with the C public +key data for key_.pem. + +Build and load MCUboot: + +* `newt build k64f_boot_` +* `newt load k64f_boot_` + +Build and load good image in slot 0: + +* `newt create-image k64f_blinky 1.0.1 key_.pem` +* `newt load k64f_blinky` + +--- +***Note*** + +*If testing RSA/PSS `newt create-image` needs to be passed in the extra* +*flag `--rsa-pss` eg:* + +`newt create-image k64f_blinky 1.0.1 key_rsa.pem --rsa-pss` + +--- + +Build and load image in slot 1 with no signing, signed with +key__2.pem and signed with key_.pem. Mark each one as +test image and check that swap only happens for image signed with +key_.pem. Both others should be erased. + +* `newt create-image k64f_blinky2 1.0.2 ` +* `newtmgr image upload k64f_blinky2` +* `newtmgr image list` +* `newtmgr image test ` + +### Image signed with more than one key + +FIXME: this is currently not functional, skip this section! + +Build and load MCUboot: + +* `newt build k64f_boot_rsa_ec` +* `newt load k64f_boot_rsa_ec` + +Build and load good image in slot 0: + +* `newt create-image k64f_blinky 1.0.1 key_rsa.pem` +* `newt load k64f_blinky` + +Build and load image in slot 1 with no signing, signed with +key__2.pem and signed with key_.pem. Mark each one as +test image and check that swap only happens for image signed with +key_.pem. Both others should be erased. + +Use all of this options: + +* `newt create-image k64f_blinky2 1.0.2` + +And load + +* `newtmgr image upload k64f_blinky2` +* `newtmgr image list` +* `newtmgr image test ` + +### Overwrite only functionality + +Build/load MCUboot: + +* `newt build k64f_boot_rsa_noswap` +* `newt load k64f_boot_rsa_noswap` + +Build/load blinky to slot 0: + +* `newt create-image k64f_blinky 1.0.1 key_rsa.pem` +* `newt load k64f_blinky` + +Build/load blinky2 both with bad and good key, followed by a permanent swap +request: + +* `newt create-image k64f_blinky2 1.0.2 .pem` +* `newtmgr image upload k64f_blinky2` +* `newtmgr image list` +* `newtmgr image confirm ` + +This should not swap and delete the image in slot 1 when signed with the wrong +key, otherwise the image in slot 1 should be *moved* to slot 0 and slot 1 should +be empty. + +### Validate slot 0 option + +Build/load MCUboot: + +* `newt build k64f_boot_rsa_validate0` +* `newt load k64f_boot_rsa_validate0` + +Build non-signed image: + +* `newt create-image k64f_blinky 1.0.1` +* `newt load k64f_blinky` +* Reset and no image should be run + +Build signed image with invalid key: + +* `newt create-image k64f_blinky 1.0.1 key_rsa_2.pem` +* `newt load k64f_blinky` +* Reset and no image should be run + +Build signed image with *valid* key: + +* `newt create-image k64f_blinky 1.0.1 key_rsa.pem` +* `newt load k64f_blinky` +* Reset and image *should* run + +### Swap with random failures + +DISCLAIMER: be careful with copy/paste of commands, this test uses another +target/app! + +Build/load MCUboot: + +* `newt build k64f_boot_rsa` +* `newt load k64f_boot_rsa` + +Build/load slinky to slot 0: + +* `newt create-image k64f_slinky 1.0.1 key_rsa.pem` +* `newt load k64f_slinky` + +Build/load slinky2 to slot 1: + +* `newt create-image k64f_slinky2 1.0.2 key_rsa.pem` +* `newtmgr image upload k64f_slinky2` + +Confirm that both images are installed, request a permanent request to the +image in slot 1 and check that it works. + +* `newtmgr image list` +* `newtmgr image confirm ` + +If everything works, now proceed with requests for permanent swap to the image +in slot 1 and do random swaps (as much as you like!). When the swap finishes +confirm that the swap was finished with the previous slot 1 image now in +slot 0 and vice-versa. + +### Help + +* Mass erase MCU + + $ pyocd erase --chip + +* Flashing image in slot 1: + + $ pyocd flash -e sector -a 0x80000 ${IMG_FILE} bin diff --git a/bootloader/mcuboot/docs/testplan-zephyr.md b/bootloader/mcuboot/docs/testplan-zephyr.md new file mode 100644 index 0000000..9b70151 --- /dev/null +++ b/bootloader/mcuboot/docs/testplan-zephyr.md @@ -0,0 +1,71 @@ +# Zephyr test plan + +The following roughly describes how MCUboot is tested on Zephyr. The +testing is done with the code in `samples/zephyr`. These examples +were written using the FRDM-K64F, but other boards should be similar. +At this time, however, the partitions are hardcoded in the Makefile +targets to flash. + +Note that the script "run-tests.sh" in that directory is helpful for +automating the process, and provides simple "y or n" prompts for each +test case and expected result. + +## Building and running. + +The tests are build using the various `test-*` targets in +`samples/zephyr/Makefile`. For each test, invoke `make` with that +target: + + $ make test-good-rsa + +Begin by doing a full erase, and programming the bootloader itself: + + $ pyocd erase --chip + $ make flash_boot + +After it resets, look for "main: Starting bootloader", a few debug +messages, and lastly: "main: Unable to find bootable image". + +Then, load hello1: + + $ make flash_hello1 + +This should print "main: Jumping to the first image slot", and you +should get an image "hello1". + +Note that there are comments with each test target describing the +intended behavior for each of these steps. Sometimes an upgrade will +happen and sometimes it will not. + + $ make flash_hello2 + +This should print a message: `boot_swap_type: Swap type: test`, and +you should see "hello2". + +Now reset the target:: + + $ pyocd commander -c reset + +And you should see a revert and "hello1" running. + +## Testing that mark ok works + +Repeat this, to make sure we can mark the image as OK, and that a +revert doesn't happen: + + $ make flash_hello1 + $ make flash_hello2 + +We should have just booted the hello2. Mark this as OK: + + $ pyocd flash -a 0x7ffe8 image_ok.bin + $ pyocd commander -c reset + +And make sure this stays in the "hello2" image. + +This step doesn't make sense on the tests where the upgrade doesn't +happen. + +## Testing all configurations + +Repeat these steps for each of the `test-*` targest in the Makefile. diff --git a/bootloader/mcuboot/enc-aes128kw.b64 b/bootloader/mcuboot/enc-aes128kw.b64 new file mode 100644 index 0000000..ed2c9fb --- /dev/null +++ b/bootloader/mcuboot/enc-aes128kw.b64 @@ -0,0 +1 @@ +0VoElcTCqP8weM5Jtfyy3Q== diff --git a/bootloader/mcuboot/enc-aes256kw.b64 b/bootloader/mcuboot/enc-aes256kw.b64 new file mode 100644 index 0000000..866aa6d --- /dev/null +++ b/bootloader/mcuboot/enc-aes256kw.b64 @@ -0,0 +1 @@ +5FxRRtIcgjXMGhmvofKqIMiMf0Bs2yKqarXLqvixW7Q= diff --git a/bootloader/mcuboot/enc-ec256-priv.pem b/bootloader/mcuboot/enc-ec256-priv.pem new file mode 100644 index 0000000..352615a --- /dev/null +++ b/bootloader/mcuboot/enc-ec256-priv.pem @@ -0,0 +1,5 @@ +-----BEGIN PRIVATE KEY----- +MIGHAgEAMBMGByqGSM49AgEGCCqGSM49AwEHBG0wawIBAQQg9h5Rnfj63aG32alk +ZDtU0D3QH+V42ReYpSjKzGtnngahRANCAASKRHMAlMmAJzENIzZr6Wmfy8V8yEQa +k+bufYamrl6TcnTZ4Vocm2UaK2FBKAJzhBKXOi2ioGd3AtpnGkvd13HM +-----END PRIVATE KEY----- diff --git a/bootloader/mcuboot/enc-ec256-pub.pem b/bootloader/mcuboot/enc-ec256-pub.pem new file mode 100644 index 0000000..dfd21e1 --- /dev/null +++ b/bootloader/mcuboot/enc-ec256-pub.pem @@ -0,0 +1,4 @@ +-----BEGIN PUBLIC KEY----- +MFkwEwYHKoZIzj0CAQYIKoZIzj0DAQcDQgAEikRzAJTJgCcxDSM2a+lpn8vFfMhE +GpPm7n2Gpq5ek3J02eFaHJtlGithQSgCc4QSlzotoqBndwLaZxpL3ddxzA== +-----END PUBLIC KEY----- diff --git a/bootloader/mcuboot/enc-rsa2048-priv.pem b/bootloader/mcuboot/enc-rsa2048-priv.pem new file mode 100644 index 0000000..a2bf0cb --- /dev/null +++ b/bootloader/mcuboot/enc-rsa2048-priv.pem @@ -0,0 +1,27 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIEpAIBAAKCAQEAtCYUST0WEzptnISpi2oQIGHvSASkSyTzADKsIuAwJ3AY5VXI +uAU0A7D4pZbSSFjvcLAJ2+NYYu+ZYwGyicSz9p5iv03CitDJTUOj2OUd7GJjCOIg +pfx40D50yKQbNq179QauTVGbQM4wT2zq+el06gbunOQUaCC5PecRFIslo/9MivNT +7ms+7zTNaj9iaMD/eEyww+aWYfwfGPF6guKPNagrhhakRvusfkHbAgWRbd/B3hOV +nPmeXnK6pyWT+9zoq4ZFiEct7e7ul57OXZsEBEB8y3w9LHSrpMxko1yVPdSi3JKy +yBjL+QA5gY+PQMLfmSmsisI72KTyra90wBHHmQIDAQABAoIBAEJHgE8x2l1YsdtU +M8zHSQehAJhOnOPIxF7eRdbPBOh9pas61I5f27M/+TtzMgrMLcwX+IieLHa6EIUM +qtNlO5EQ1OPtiBXqmyWCLVYvdcLyr90k1T48lXaIhA8N0bVcPq73tklcLPK66atP +N2SbMBiqVEAE6j0lTQIpcW9NgpvDRCqdDJjTyBUNBJNgMMdeeepTncAOgayQvJ4e +0igPEPUf3zh/ipCNSQd9eMun75JtOxOVm7qDxrNxJScHmVSCPezF+LSgOHpZagvK +aWwXpBjgtKqJmY/LcTQJG27mhwC1unCKKT2aBhgtZl5hN+vdXsgokgUw/bhlsX+/ +LVUSkcECgYEA2mXaOHwY+wARYOs3ZbiDYojEOk5kavM+TsA0GYrLSsovXVB6rPee +h1r8TUnX+SH1C29XQT2PuOx/zJIJvtOkwxSFIV0Fo6og9mJEUANeU0rNarZljk5L +PyXGFjH1mRN3QtrccE1lsJkP31qxRfC5jqCuT01lCYS1OCm/aeCIHycCgYEA0ypZ +7CjDDU+SlspnlPwupoZoRVOSzIZ/iuFd6B2eux4AJh2AEv+cEQq9psONSNr8EPd6 +FgcVoDrTlPtShznu58QmSRbGwIMlv2pOjAsQhWarfq6sTGk8ROvN6fZki0rYak1t +R6m4VXLB/fSBTGa+SfJ1T4DxIDi4aht1QTAPGz8CgYAJNfp6H2G+VEZnXAQ+GgYQ +hcwg2WWKzS93isunuB7SzKwqt1Y1LUxWURQK/m5JZ5E6Jjv72GjTV8YcDpyym6J7 +R8ZFnfK68FXrjkFrTnkP8juvoHmwAsVRqHouPXUqO5PwEeLyKZF8XTg6J00Kshhh +V42CcrUsLZinAbu872dOSQKBgQCycFNUcI2Crf8dVSR6jS+OoH10N88Q7YbRgOet +wXnkfNF7Y+paI41qCT2BsjWtnv7qB3YvLwVjRNKOTmHKy3XKe8IueQSyoSBAxEBj +ruXjFINOpaQLXdIEG48BaahE3JZMHel+aTjPXA3536dzPE8Ihc4DxN39cHDFmTZY +Q5hAWQKBgQDVqvvsjcbd+itaJNDaWL2HkhopYhMdS3kbvnl9rXnKF3Xa6DLooJ6o +d1OsONbr5iJlxKpMyNAzGh6+vXMJSvqFXPMMnIFWMKf3m/SSnGuTagAz3C9UHnjU +l+wkots9AzMJsiwDBUDeUvKb+gCNS/5bm5xzrft6AEJinqCVVVAyhw== +-----END RSA PRIVATE KEY----- diff --git a/bootloader/mcuboot/enc-rsa2048-pub.pem b/bootloader/mcuboot/enc-rsa2048-pub.pem new file mode 100644 index 0000000..adc2adb --- /dev/null +++ b/bootloader/mcuboot/enc-rsa2048-pub.pem @@ -0,0 +1,9 @@ +-----BEGIN PUBLIC KEY----- +MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAtCYUST0WEzptnISpi2oQ +IGHvSASkSyTzADKsIuAwJ3AY5VXIuAU0A7D4pZbSSFjvcLAJ2+NYYu+ZYwGyicSz +9p5iv03CitDJTUOj2OUd7GJjCOIgpfx40D50yKQbNq179QauTVGbQM4wT2zq+el0 +6gbunOQUaCC5PecRFIslo/9MivNT7ms+7zTNaj9iaMD/eEyww+aWYfwfGPF6guKP +NagrhhakRvusfkHbAgWRbd/B3hOVnPmeXnK6pyWT+9zoq4ZFiEct7e7ul57OXZsE +BEB8y3w9LHSrpMxko1yVPdSi3JKyyBjL+QA5gY+PQMLfmSmsisI72KTyra90wBHH +mQIDAQAB +-----END PUBLIC KEY----- diff --git a/bootloader/mcuboot/enc-x25519-priv.pem b/bootloader/mcuboot/enc-x25519-priv.pem new file mode 100644 index 0000000..cb92491 --- /dev/null +++ b/bootloader/mcuboot/enc-x25519-priv.pem @@ -0,0 +1,3 @@ +-----BEGIN PRIVATE KEY----- +MC4CAQAwBQYDK2VuBCIEICiAL+/vgpVQ8UGTA2wbuUlsUeUmh493B/i0HwRFbYRP +-----END PRIVATE KEY----- diff --git a/bootloader/mcuboot/enc-x25519-pub.pem b/bootloader/mcuboot/enc-x25519-pub.pem new file mode 100644 index 0000000..80d89a6 --- /dev/null +++ b/bootloader/mcuboot/enc-x25519-pub.pem @@ -0,0 +1,3 @@ +-----BEGIN PUBLIC KEY----- +MCowBQYDK2VuAyEApnrfU1lvc6n45HmsC6ogwvmJkv+Wltehx3CxYYsqD3A= +-----END PUBLIC KEY----- diff --git a/bootloader/mcuboot/ext/fiat/LICENSE b/bootloader/mcuboot/ext/fiat/LICENSE new file mode 100644 index 0000000..bd46c61 --- /dev/null +++ b/bootloader/mcuboot/ext/fiat/LICENSE @@ -0,0 +1,22 @@ +The MIT License (MIT) + +Copyright (c) 2015-2016 the fiat-crypto authors (see +https://github.com/mit-plv/fiat-crypto/blob/master/AUTHORS). + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. diff --git a/bootloader/mcuboot/ext/fiat/METADATA b/bootloader/mcuboot/ext/fiat/METADATA new file mode 100644 index 0000000..0e4012f --- /dev/null +++ b/bootloader/mcuboot/ext/fiat/METADATA @@ -0,0 +1,13 @@ +name: "fiat" +description: "Fiat-Crypto: Synthesizing Correct-by-Construction Code for Cryptographic Primitives." + +third_party { + url { + type: GIT + value: "https://github.com/mit-plv/fiat-crypto" + } + version: "4441785fb44b88bb6943ddbf639d872c8c903281" + last_upgrade_date { year: 2019 month: 1 day: 16 } + + local_modifications: "Fiat-generated code has been integrated into existing BoringSSL code" +} diff --git a/bootloader/mcuboot/ext/fiat/README.chromium b/bootloader/mcuboot/ext/fiat/README.chromium new file mode 100644 index 0000000..73c5ba2 --- /dev/null +++ b/bootloader/mcuboot/ext/fiat/README.chromium @@ -0,0 +1,10 @@ +Name: Fiat-Crypto: Synthesizing Correct-by-Construction Code for Cryptographic Primitives +Short Name: fiat-crypto +URL: https://github.com/mit-plv/fiat-crypto +Version: git (see METADATA) +License: MIT +License File: LICENSE +Security Critical: yes + +Description: +See README.md and METADATA. diff --git a/bootloader/mcuboot/ext/fiat/README.md b/bootloader/mcuboot/ext/fiat/README.md new file mode 100644 index 0000000..cf66900 --- /dev/null +++ b/bootloader/mcuboot/ext/fiat/README.md @@ -0,0 +1,47 @@ +# Fiat + +Some of the code in this directory is generated by +[Fiat](https://github.com/mit-plv/fiat-crypto) and thus these files are +licensed under the MIT license. (See LICENSE file.) + +## Curve25519 + +To generate the field arithmetic procedures in `curve25519.c` from a fiat-crypto +checkout (as of `7892c66d5e0e5770c79463ce551193ceef870641`), run +`make src/Specific/solinas32_2e255m19_10limbs/femul.c` (replacing `femul` with +the desired field operation). The "source" file specifying the finite field and +referencing the desired implementation strategy is +`src/Specific/solinas32_2e255m19_10limbs/CurveParameters.v`, specifying roughly +"unsaturated arithmetic modulo 2^255-19 using 10 limbs of radix 2^25.5 in 32-bit +unsigned integers with a single carry chain and two wraparound carries" where +only the prime is considered normative and everything else is treated as +"compiler hints". + +The 64-bit implementation uses 5 limbs of radix 2^51 with instruction scheduling +taken from curve25519-donna-c64. It is found in +`src/Specific/solinas64_2e255m19_5limbs_donna`. + +## P256 + +To generate the field arithmetic procedures in `p256.c` from a fiat-crypto +checkout, run +`make src/Specific/montgomery64_2e256m2e224p2e192p2e96m1_4limbs/femul.c`. +The corresponding "source" file is +`src/Specific/montgomery64_2e256m2e224p2e192p2e96m1_4limbs/CurveParameters.v`, +specifying roughly "64-bit saturated word-by-word Montgomery reduction modulo +2^256 - 2^224 + 2^192 + 2^96 - 1". Again, everything except for the prime is +untrusted. There is currently a known issue where `fesub.c` for p256 does not +manage to complete the build (specialization) within a week on Coq 8.7.0. + +does manage to build that file, but the work on that branch was never finished +(the correctness proofs of implementation templates still apply, but the +now abandoned prototype specialization facilities there are unverified). + +## Working With Fiat Crypto Field Arithmetic + +The fiat-crypto readme +contains an overview of the implementation templates followed by a tour of the +specialization machinery. It may be helpful to first read about the less messy +parts of the system from chapter 3 of . +There is work ongoing to replace the entire specialization mechanism with +something much more principled . diff --git a/bootloader/mcuboot/ext/fiat/pkg.yml b/bootloader/mcuboot/ext/fiat/pkg.yml new file mode 100644 index 0000000..73a6559 --- /dev/null +++ b/bootloader/mcuboot/ext/fiat/pkg.yml @@ -0,0 +1,24 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: ext/fiat +pkg.description: "MCUboot's bundled fiat-crypto" +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: diff --git a/bootloader/mcuboot/ext/fiat/src/curve25519.c b/bootloader/mcuboot/ext/fiat/src/curve25519.c new file mode 100644 index 0000000..765e0ca --- /dev/null +++ b/bootloader/mcuboot/ext/fiat/src/curve25519.c @@ -0,0 +1,1314 @@ +// The MIT License (MIT) +// +// Copyright (c) 2015-2016 the fiat-crypto authors (see the AUTHORS file). +// +// Permission is hereby granted, free of charge, to any person obtaining a copy +// of this software and associated documentation files (the "Software"), to deal +// in the Software without restriction, including without limitation the rights +// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +// copies of the Software, and to permit persons to whom the Software is +// furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in all +// copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +// SOFTWARE. + +// Some of this code is taken from the ref10 version of Ed25519 in SUPERCOP +// 20141124 (http://bench.cr.yp.to/supercop.html). That code is released as +// public domain but parts have been replaced with code generated by Fiat +// (https://github.com/mit-plv/fiat-crypto), which is MIT licensed. +// +// The field functions are shared by Ed25519 and X25519 where possible. + +#include +#include + +#include + +#if defined(MCUBOOT_USE_MBED_TLS) +#include +#include +#include + #if MBEDTLS_VERSION_NUMBER >= 0x03000000 + #include + #endif +#else +#include +#include +#include +#endif + +#include "curve25519.h" +// Various pre-computed constants. +#include "curve25519_tables.h" + +#define SHA512_DIGEST_LENGTH 64 + +// Low-level intrinsic operations + +static uint64_t load_3(const uint8_t *in) { + uint64_t result; + result = (uint64_t)in[0]; + result |= ((uint64_t)in[1]) << 8; + result |= ((uint64_t)in[2]) << 16; + return result; +} + +static uint64_t load_4(const uint8_t *in) { + uint64_t result; + result = (uint64_t)in[0]; + result |= ((uint64_t)in[1]) << 8; + result |= ((uint64_t)in[2]) << 16; + result |= ((uint64_t)in[3]) << 24; + return result; +} + + +// Field operations. + +typedef uint32_t fe_limb_t; +#define FE_NUM_LIMBS 10 + +// assert_fe asserts that |f| satisfies bounds: +// +// [[0x0 ~> 0x4666666], [0x0 ~> 0x2333333], +// [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], +// [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], +// [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], +// [0x0 ~> 0x4666666], [0x0 ~> 0x2333333]] +// +// See comments in curve25519_32.h for which functions use these bounds for +// inputs or outputs. +#define assert_fe(f) \ + do { \ + for (unsigned _assert_fe_i = 0; _assert_fe_i < 10; _assert_fe_i++) { \ + assert(f[_assert_fe_i] <= \ + ((_assert_fe_i & 1) ? 0x2333333u : 0x4666666u)); \ + } \ + } while (0) + +// assert_fe_loose asserts that |f| satisfies bounds: +// +// [[0x0 ~> 0xd333332], [0x0 ~> 0x6999999], +// [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], +// [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], +// [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], +// [0x0 ~> 0xd333332], [0x0 ~> 0x6999999]] +// +// See comments in curve25519_32.h for which functions use these bounds for +// inputs or outputs. +#define assert_fe_loose(f) \ + do { \ + for (unsigned _assert_fe_i = 0; _assert_fe_i < 10; _assert_fe_i++) { \ + assert(f[_assert_fe_i] <= \ + ((_assert_fe_i & 1) ? 0x6999999u : 0xd333332u)); \ + } \ + } while (0) + +//FIXME: use Zephyr macro +_Static_assert(sizeof(fe) == sizeof(fe_limb_t) * FE_NUM_LIMBS, + "fe_limb_t[FE_NUM_LIMBS] is inconsistent with fe"); + +static void fe_frombytes_strict(fe *h, const uint8_t s[32]) { + // |fiat_25519_from_bytes| requires the top-most bit be clear. + assert((s[31] & 0x80) == 0); + fiat_25519_from_bytes(h->v, s); + assert_fe(h->v); +} + +static void fe_frombytes(fe *h, const uint8_t s[32]) { + uint8_t s_copy[32]; + memcpy(s_copy, s, 32); + s_copy[31] &= 0x7f; + fe_frombytes_strict(h, s_copy); +} + +static void fe_tobytes(uint8_t s[32], const fe *f) { + assert_fe(f->v); + fiat_25519_to_bytes(s, f->v); +} + +// h = 0 +static void fe_0(fe *h) { +#if defined(MCUBOOT_USE_MBED_TLS) + mbedtls_platform_zeroize(h, sizeof(fe)); +#else + _set(h, 0, sizeof(fe)); +#endif +} + +// h = 1 +static void fe_1(fe *h) { +#if defined(MCUBOOT_USE_MBED_TLS) + mbedtls_platform_zeroize(h, sizeof(fe)); +#else + _set(h, 0, sizeof(fe)); +#endif + h->v[0] = 1; +} + +// h = f + g +// Can overlap h with f or g. +static void fe_add(fe_loose *h, const fe *f, const fe *g) { + assert_fe(f->v); + assert_fe(g->v); + fiat_25519_add(h->v, f->v, g->v); + assert_fe_loose(h->v); +} + +// h = f - g +// Can overlap h with f or g. +static void fe_sub(fe_loose *h, const fe *f, const fe *g) { + assert_fe(f->v); + assert_fe(g->v); + fiat_25519_sub(h->v, f->v, g->v); + assert_fe_loose(h->v); +} + +static void fe_carry(fe *h, const fe_loose* f) { + assert_fe_loose(f->v); + fiat_25519_carry(h->v, f->v); + assert_fe(h->v); +} + +static void fe_mul_impl(fe_limb_t out[FE_NUM_LIMBS], + const fe_limb_t in1[FE_NUM_LIMBS], + const fe_limb_t in2[FE_NUM_LIMBS]) { + assert_fe_loose(in1); + assert_fe_loose(in2); + fiat_25519_carry_mul(out, in1, in2); + assert_fe(out); +} + +static void fe_mul_ltt(fe_loose *h, const fe *f, const fe *g) { + fe_mul_impl(h->v, f->v, g->v); +} + +static void fe_mul_ttt(fe *h, const fe *f, const fe *g) { + fe_mul_impl(h->v, f->v, g->v); +} + +static void fe_mul_tlt(fe *h, const fe_loose *f, const fe *g) { + fe_mul_impl(h->v, f->v, g->v); +} + +static void fe_mul_ttl(fe *h, const fe *f, const fe_loose *g) { + fe_mul_impl(h->v, f->v, g->v); +} + +static void fe_mul_tll(fe *h, const fe_loose *f, const fe_loose *g) { + fe_mul_impl(h->v, f->v, g->v); +} + +static void fe_sq_tl(fe *h, const fe_loose *f) { + assert_fe_loose(f->v); + fiat_25519_carry_square(h->v, f->v); + assert_fe(h->v); +} + +static void fe_sq_tt(fe *h, const fe *f) { + assert_fe_loose(f->v); + fiat_25519_carry_square(h->v, f->v); + assert_fe(h->v); +} + +// h = -f +static void fe_neg(fe_loose *h, const fe *f) { + assert_fe(f->v); + fiat_25519_opp(h->v, f->v); + assert_fe_loose(h->v); +} + +// h = f +static void fe_copy(fe *h, const fe *f) { + memmove(h, f, sizeof(fe)); +} + +static void fe_copy_lt(fe_loose *h, const fe *f) { + //FIXME: use Zephyr macro + _Static_assert(sizeof(fe_loose) == sizeof(fe), "fe and fe_loose mismatch"); + memmove(h, f, sizeof(fe)); +} + +static void fe_loose_invert(fe *out, const fe_loose *z) { + fe t0; + fe t1; + fe t2; + fe t3; + int i; + + fe_sq_tl(&t0, z); + fe_sq_tt(&t1, &t0); + for (i = 1; i < 2; ++i) { + fe_sq_tt(&t1, &t1); + } + fe_mul_tlt(&t1, z, &t1); + fe_mul_ttt(&t0, &t0, &t1); + fe_sq_tt(&t2, &t0); + fe_mul_ttt(&t1, &t1, &t2); + fe_sq_tt(&t2, &t1); + for (i = 1; i < 5; ++i) { + fe_sq_tt(&t2, &t2); + } + fe_mul_ttt(&t1, &t2, &t1); + fe_sq_tt(&t2, &t1); + for (i = 1; i < 10; ++i) { + fe_sq_tt(&t2, &t2); + } + fe_mul_ttt(&t2, &t2, &t1); + fe_sq_tt(&t3, &t2); + for (i = 1; i < 20; ++i) { + fe_sq_tt(&t3, &t3); + } + fe_mul_ttt(&t2, &t3, &t2); + fe_sq_tt(&t2, &t2); + for (i = 1; i < 10; ++i) { + fe_sq_tt(&t2, &t2); + } + fe_mul_ttt(&t1, &t2, &t1); + fe_sq_tt(&t2, &t1); + for (i = 1; i < 50; ++i) { + fe_sq_tt(&t2, &t2); + } + fe_mul_ttt(&t2, &t2, &t1); + fe_sq_tt(&t3, &t2); + for (i = 1; i < 100; ++i) { + fe_sq_tt(&t3, &t3); + } + fe_mul_ttt(&t2, &t3, &t2); + fe_sq_tt(&t2, &t2); + for (i = 1; i < 50; ++i) { + fe_sq_tt(&t2, &t2); + } + fe_mul_ttt(&t1, &t2, &t1); + fe_sq_tt(&t1, &t1); + for (i = 1; i < 5; ++i) { + fe_sq_tt(&t1, &t1); + } + fe_mul_ttt(out, &t1, &t0); +} + +static void fe_invert(fe *out, const fe *z) { + fe_loose l; + fe_copy_lt(&l, z); + fe_loose_invert(out, &l); +} + +static int CRYPTO_memcmp(const void *in_a, const void *in_b, size_t len) { + const uint8_t *a = in_a; + const uint8_t *b = in_b; + uint8_t x = 0; + + for (size_t i = 0; i < len; i++) { + x |= a[i] ^ b[i]; + } + + return x; +} + +// return 0 if f == 0 +// return 1 if f != 0 +static int fe_isnonzero(const fe_loose *f) { + fe tight; + fe_carry(&tight, f); + uint8_t s[32]; + fe_tobytes(s, &tight); + + static const uint8_t zero[32] = {0}; + return CRYPTO_memcmp(s, zero, sizeof(zero)) != 0; +} + +// return 1 if f is in {1,3,5,...,q-2} +// return 0 if f is in {0,2,4,...,q-1} +static int fe_isnegative(const fe *f) { + uint8_t s[32]; + fe_tobytes(s, f); + return s[0] & 1; +} + +static void fe_sq2_tt(fe *h, const fe *f) { + // h = f^2 + fe_sq_tt(h, f); + + // h = h + h + fe_loose tmp; + fe_add(&tmp, h, h); + fe_carry(h, &tmp); +} + +static void fe_pow22523(fe *out, const fe *z) { + fe t0; + fe t1; + fe t2; + int i; + + fe_sq_tt(&t0, z); + fe_sq_tt(&t1, &t0); + for (i = 1; i < 2; ++i) { + fe_sq_tt(&t1, &t1); + } + fe_mul_ttt(&t1, z, &t1); + fe_mul_ttt(&t0, &t0, &t1); + fe_sq_tt(&t0, &t0); + fe_mul_ttt(&t0, &t1, &t0); + fe_sq_tt(&t1, &t0); + for (i = 1; i < 5; ++i) { + fe_sq_tt(&t1, &t1); + } + fe_mul_ttt(&t0, &t1, &t0); + fe_sq_tt(&t1, &t0); + for (i = 1; i < 10; ++i) { + fe_sq_tt(&t1, &t1); + } + fe_mul_ttt(&t1, &t1, &t0); + fe_sq_tt(&t2, &t1); + for (i = 1; i < 20; ++i) { + fe_sq_tt(&t2, &t2); + } + fe_mul_ttt(&t1, &t2, &t1); + fe_sq_tt(&t1, &t1); + for (i = 1; i < 10; ++i) { + fe_sq_tt(&t1, &t1); + } + fe_mul_ttt(&t0, &t1, &t0); + fe_sq_tt(&t1, &t0); + for (i = 1; i < 50; ++i) { + fe_sq_tt(&t1, &t1); + } + fe_mul_ttt(&t1, &t1, &t0); + fe_sq_tt(&t2, &t1); + for (i = 1; i < 100; ++i) { + fe_sq_tt(&t2, &t2); + } + fe_mul_ttt(&t1, &t2, &t1); + fe_sq_tt(&t1, &t1); + for (i = 1; i < 50; ++i) { + fe_sq_tt(&t1, &t1); + } + fe_mul_ttt(&t0, &t1, &t0); + fe_sq_tt(&t0, &t0); + for (i = 1; i < 2; ++i) { + fe_sq_tt(&t0, &t0); + } + fe_mul_ttt(out, &t0, z); +} + + +// Group operations. + +void x25519_ge_tobytes(uint8_t s[32], const ge_p2 *h) { + fe recip; + fe x; + fe y; + + fe_invert(&recip, &h->Z); + fe_mul_ttt(&x, &h->X, &recip); + fe_mul_ttt(&y, &h->Y, &recip); + fe_tobytes(s, &y); + s[31] ^= fe_isnegative(&x) << 7; +} + +int x25519_ge_frombytes_vartime(ge_p3 *h, const uint8_t s[32]) { + fe u; + fe_loose v; + fe v3; + fe vxx; + fe_loose check; + + fe_frombytes(&h->Y, s); + fe_1(&h->Z); + fe_sq_tt(&v3, &h->Y); + fe_mul_ttt(&vxx, &v3, &d); + fe_sub(&v, &v3, &h->Z); // u = y^2-1 + fe_carry(&u, &v); + fe_add(&v, &vxx, &h->Z); // v = dy^2+1 + + fe_sq_tl(&v3, &v); + fe_mul_ttl(&v3, &v3, &v); // v3 = v^3 + fe_sq_tt(&h->X, &v3); + fe_mul_ttl(&h->X, &h->X, &v); + fe_mul_ttt(&h->X, &h->X, &u); // x = uv^7 + + fe_pow22523(&h->X, &h->X); // x = (uv^7)^((q-5)/8) + fe_mul_ttt(&h->X, &h->X, &v3); + fe_mul_ttt(&h->X, &h->X, &u); // x = uv^3(uv^7)^((q-5)/8) + + fe_sq_tt(&vxx, &h->X); + fe_mul_ttl(&vxx, &vxx, &v); + fe_sub(&check, &vxx, &u); + if (fe_isnonzero(&check)) { + fe_add(&check, &vxx, &u); + if (fe_isnonzero(&check)) { + return 0; + } + fe_mul_ttt(&h->X, &h->X, &sqrtm1); + } + + if (fe_isnegative(&h->X) != (s[31] >> 7)) { + fe_loose t; + fe_neg(&t, &h->X); + fe_carry(&h->X, &t); + } + + fe_mul_ttt(&h->T, &h->X, &h->Y); + return 1; +} + +static void ge_p2_0(ge_p2 *h) { + fe_0(&h->X); + fe_1(&h->Y); + fe_1(&h->Z); +} + +// r = p +static void ge_p3_to_p2(ge_p2 *r, const ge_p3 *p) { + fe_copy(&r->X, &p->X); + fe_copy(&r->Y, &p->Y); + fe_copy(&r->Z, &p->Z); +} + +// r = p +void x25519_ge_p3_to_cached(ge_cached *r, const ge_p3 *p) { + fe_add(&r->YplusX, &p->Y, &p->X); + fe_sub(&r->YminusX, &p->Y, &p->X); + fe_copy_lt(&r->Z, &p->Z); + fe_mul_ltt(&r->T2d, &p->T, &d2); +} + +// r = p +void x25519_ge_p1p1_to_p2(ge_p2 *r, const ge_p1p1 *p) { + fe_mul_tll(&r->X, &p->X, &p->T); + fe_mul_tll(&r->Y, &p->Y, &p->Z); + fe_mul_tll(&r->Z, &p->Z, &p->T); +} + +// r = p +void x25519_ge_p1p1_to_p3(ge_p3 *r, const ge_p1p1 *p) { + fe_mul_tll(&r->X, &p->X, &p->T); + fe_mul_tll(&r->Y, &p->Y, &p->Z); + fe_mul_tll(&r->Z, &p->Z, &p->T); + fe_mul_tll(&r->T, &p->X, &p->Y); +} + +// r = 2 * p +static void ge_p2_dbl(ge_p1p1 *r, const ge_p2 *p) { + fe trX, trZ, trT; + fe t0; + + fe_sq_tt(&trX, &p->X); + fe_sq_tt(&trZ, &p->Y); + fe_sq2_tt(&trT, &p->Z); + fe_add(&r->Y, &p->X, &p->Y); + fe_sq_tl(&t0, &r->Y); + + fe_add(&r->Y, &trZ, &trX); + fe_sub(&r->Z, &trZ, &trX); + fe_carry(&trZ, &r->Y); + fe_sub(&r->X, &t0, &trZ); + fe_carry(&trZ, &r->Z); + fe_sub(&r->T, &trT, &trZ); +} + +// r = 2 * p +static void ge_p3_dbl(ge_p1p1 *r, const ge_p3 *p) { + ge_p2 q; + ge_p3_to_p2(&q, p); + ge_p2_dbl(r, &q); +} + +// r = p + q +static void ge_madd(ge_p1p1 *r, const ge_p3 *p, const ge_precomp *q) { + fe trY, trZ, trT; + + fe_add(&r->X, &p->Y, &p->X); + fe_sub(&r->Y, &p->Y, &p->X); + fe_mul_tll(&trZ, &r->X, &q->yplusx); + fe_mul_tll(&trY, &r->Y, &q->yminusx); + fe_mul_tlt(&trT, &q->xy2d, &p->T); + fe_add(&r->T, &p->Z, &p->Z); + fe_sub(&r->X, &trZ, &trY); + fe_add(&r->Y, &trZ, &trY); + fe_carry(&trZ, &r->T); + fe_add(&r->Z, &trZ, &trT); + fe_sub(&r->T, &trZ, &trT); +} + +// r = p - q +static void ge_msub(ge_p1p1 *r, const ge_p3 *p, const ge_precomp *q) { + fe trY, trZ, trT; + + fe_add(&r->X, &p->Y, &p->X); + fe_sub(&r->Y, &p->Y, &p->X); + fe_mul_tll(&trZ, &r->X, &q->yminusx); + fe_mul_tll(&trY, &r->Y, &q->yplusx); + fe_mul_tlt(&trT, &q->xy2d, &p->T); + fe_add(&r->T, &p->Z, &p->Z); + fe_sub(&r->X, &trZ, &trY); + fe_add(&r->Y, &trZ, &trY); + fe_carry(&trZ, &r->T); + fe_sub(&r->Z, &trZ, &trT); + fe_add(&r->T, &trZ, &trT); +} + +// r = p + q +void x25519_ge_add(ge_p1p1 *r, const ge_p3 *p, const ge_cached *q) { + fe trX, trY, trZ, trT; + + fe_add(&r->X, &p->Y, &p->X); + fe_sub(&r->Y, &p->Y, &p->X); + fe_mul_tll(&trZ, &r->X, &q->YplusX); + fe_mul_tll(&trY, &r->Y, &q->YminusX); + fe_mul_tlt(&trT, &q->T2d, &p->T); + fe_mul_ttl(&trX, &p->Z, &q->Z); + fe_add(&r->T, &trX, &trX); + fe_sub(&r->X, &trZ, &trY); + fe_add(&r->Y, &trZ, &trY); + fe_carry(&trZ, &r->T); + fe_add(&r->Z, &trZ, &trT); + fe_sub(&r->T, &trZ, &trT); +} + +// r = p - q +void x25519_ge_sub(ge_p1p1 *r, const ge_p3 *p, const ge_cached *q) { + fe trX, trY, trZ, trT; + + fe_add(&r->X, &p->Y, &p->X); + fe_sub(&r->Y, &p->Y, &p->X); + fe_mul_tll(&trZ, &r->X, &q->YminusX); + fe_mul_tll(&trY, &r->Y, &q->YplusX); + fe_mul_tlt(&trT, &q->T2d, &p->T); + fe_mul_ttl(&trX, &p->Z, &q->Z); + fe_add(&r->T, &trX, &trX); + fe_sub(&r->X, &trZ, &trY); + fe_add(&r->Y, &trZ, &trY); + fe_carry(&trZ, &r->T); + fe_sub(&r->Z, &trZ, &trT); + fe_add(&r->T, &trZ, &trT); +} + +static void slide(signed char *r, const uint8_t *a) { + int i; + int b; + int k; + + for (i = 0; i < 256; ++i) { + r[i] = 1 & (a[i >> 3] >> (i & 7)); + } + + for (i = 0; i < 256; ++i) { + if (r[i]) { + for (b = 1; b <= 6 && i + b < 256; ++b) { + if (r[i + b]) { + if (r[i] + (r[i + b] << b) <= 15) { + r[i] += r[i + b] << b; + r[i + b] = 0; + } else if (r[i] - (r[i + b] << b) >= -15) { + r[i] -= r[i + b] << b; + for (k = i + b; k < 256; ++k) { + if (!r[k]) { + r[k] = 1; + break; + } + r[k] = 0; + } + } else { + break; + } + } + } + } + } +} + +// r = a * A + b * B +// where a = a[0]+256*a[1]+...+256^31 a[31]. +// and b = b[0]+256*b[1]+...+256^31 b[31]. +// B is the Ed25519 base point (x,4/5) with x positive. +static void ge_double_scalarmult_vartime(ge_p2 *r, const uint8_t *a, + const ge_p3 *A, const uint8_t *b) { + signed char aslide[256]; + signed char bslide[256]; + ge_cached Ai[8]; // A,3A,5A,7A,9A,11A,13A,15A + ge_p1p1 t; + ge_p3 u; + ge_p3 A2; + int i; + + slide(aslide, a); + slide(bslide, b); + + x25519_ge_p3_to_cached(&Ai[0], A); + ge_p3_dbl(&t, A); + x25519_ge_p1p1_to_p3(&A2, &t); + x25519_ge_add(&t, &A2, &Ai[0]); + x25519_ge_p1p1_to_p3(&u, &t); + x25519_ge_p3_to_cached(&Ai[1], &u); + x25519_ge_add(&t, &A2, &Ai[1]); + x25519_ge_p1p1_to_p3(&u, &t); + x25519_ge_p3_to_cached(&Ai[2], &u); + x25519_ge_add(&t, &A2, &Ai[2]); + x25519_ge_p1p1_to_p3(&u, &t); + x25519_ge_p3_to_cached(&Ai[3], &u); + x25519_ge_add(&t, &A2, &Ai[3]); + x25519_ge_p1p1_to_p3(&u, &t); + x25519_ge_p3_to_cached(&Ai[4], &u); + x25519_ge_add(&t, &A2, &Ai[4]); + x25519_ge_p1p1_to_p3(&u, &t); + x25519_ge_p3_to_cached(&Ai[5], &u); + x25519_ge_add(&t, &A2, &Ai[5]); + x25519_ge_p1p1_to_p3(&u, &t); + x25519_ge_p3_to_cached(&Ai[6], &u); + x25519_ge_add(&t, &A2, &Ai[6]); + x25519_ge_p1p1_to_p3(&u, &t); + x25519_ge_p3_to_cached(&Ai[7], &u); + + ge_p2_0(r); + + for (i = 255; i >= 0; --i) { + if (aslide[i] || bslide[i]) { + break; + } + } + + for (; i >= 0; --i) { + ge_p2_dbl(&t, r); + + if (aslide[i] > 0) { + x25519_ge_p1p1_to_p3(&u, &t); + x25519_ge_add(&t, &u, &Ai[aslide[i] / 2]); + } else if (aslide[i] < 0) { + x25519_ge_p1p1_to_p3(&u, &t); + x25519_ge_sub(&t, &u, &Ai[(-aslide[i]) / 2]); + } + + if (bslide[i] > 0) { + x25519_ge_p1p1_to_p3(&u, &t); + ge_madd(&t, &u, &Bi[bslide[i] / 2]); + } else if (bslide[i] < 0) { + x25519_ge_p1p1_to_p3(&u, &t); + ge_msub(&t, &u, &Bi[(-bslide[i]) / 2]); + } + + x25519_ge_p1p1_to_p2(r, &t); + } +} + +// int64_lshift21 returns |a << 21| but is defined when shifting bits into the +// sign bit. This works around a language flaw in C. +static inline int64_t int64_lshift21(int64_t a) { + return (int64_t)((uint64_t)a << 21); +} + +// The set of scalars is \Z/l +// where l = 2^252 + 27742317777372353535851937790883648493. + +// Input: +// s[0]+256*s[1]+...+256^63*s[63] = s +// +// Output: +// s[0]+256*s[1]+...+256^31*s[31] = s mod l +// where l = 2^252 + 27742317777372353535851937790883648493. +// Overwrites s in place. +void x25519_sc_reduce(uint8_t s[64]) { + int64_t s0 = 2097151 & load_3(s); + int64_t s1 = 2097151 & (load_4(s + 2) >> 5); + int64_t s2 = 2097151 & (load_3(s + 5) >> 2); + int64_t s3 = 2097151 & (load_4(s + 7) >> 7); + int64_t s4 = 2097151 & (load_4(s + 10) >> 4); + int64_t s5 = 2097151 & (load_3(s + 13) >> 1); + int64_t s6 = 2097151 & (load_4(s + 15) >> 6); + int64_t s7 = 2097151 & (load_3(s + 18) >> 3); + int64_t s8 = 2097151 & load_3(s + 21); + int64_t s9 = 2097151 & (load_4(s + 23) >> 5); + int64_t s10 = 2097151 & (load_3(s + 26) >> 2); + int64_t s11 = 2097151 & (load_4(s + 28) >> 7); + int64_t s12 = 2097151 & (load_4(s + 31) >> 4); + int64_t s13 = 2097151 & (load_3(s + 34) >> 1); + int64_t s14 = 2097151 & (load_4(s + 36) >> 6); + int64_t s15 = 2097151 & (load_3(s + 39) >> 3); + int64_t s16 = 2097151 & load_3(s + 42); + int64_t s17 = 2097151 & (load_4(s + 44) >> 5); + int64_t s18 = 2097151 & (load_3(s + 47) >> 2); + int64_t s19 = 2097151 & (load_4(s + 49) >> 7); + int64_t s20 = 2097151 & (load_4(s + 52) >> 4); + int64_t s21 = 2097151 & (load_3(s + 55) >> 1); + int64_t s22 = 2097151 & (load_4(s + 57) >> 6); + int64_t s23 = (load_4(s + 60) >> 3); + int64_t carry0; + int64_t carry1; + int64_t carry2; + int64_t carry3; + int64_t carry4; + int64_t carry5; + int64_t carry6; + int64_t carry7; + int64_t carry8; + int64_t carry9; + int64_t carry10; + int64_t carry11; + int64_t carry12; + int64_t carry13; + int64_t carry14; + int64_t carry15; + int64_t carry16; + + s11 += s23 * 666643; + s12 += s23 * 470296; + s13 += s23 * 654183; + s14 -= s23 * 997805; + s15 += s23 * 136657; + s16 -= s23 * 683901; + s23 = 0; + + s10 += s22 * 666643; + s11 += s22 * 470296; + s12 += s22 * 654183; + s13 -= s22 * 997805; + s14 += s22 * 136657; + s15 -= s22 * 683901; + s22 = 0; + + s9 += s21 * 666643; + s10 += s21 * 470296; + s11 += s21 * 654183; + s12 -= s21 * 997805; + s13 += s21 * 136657; + s14 -= s21 * 683901; + s21 = 0; + + s8 += s20 * 666643; + s9 += s20 * 470296; + s10 += s20 * 654183; + s11 -= s20 * 997805; + s12 += s20 * 136657; + s13 -= s20 * 683901; + s20 = 0; + + s7 += s19 * 666643; + s8 += s19 * 470296; + s9 += s19 * 654183; + s10 -= s19 * 997805; + s11 += s19 * 136657; + s12 -= s19 * 683901; + s19 = 0; + + s6 += s18 * 666643; + s7 += s18 * 470296; + s8 += s18 * 654183; + s9 -= s18 * 997805; + s10 += s18 * 136657; + s11 -= s18 * 683901; + s18 = 0; + + carry6 = (s6 + (1 << 20)) >> 21; + s7 += carry6; + s6 -= int64_lshift21(carry6); + carry8 = (s8 + (1 << 20)) >> 21; + s9 += carry8; + s8 -= int64_lshift21(carry8); + carry10 = (s10 + (1 << 20)) >> 21; + s11 += carry10; + s10 -= int64_lshift21(carry10); + carry12 = (s12 + (1 << 20)) >> 21; + s13 += carry12; + s12 -= int64_lshift21(carry12); + carry14 = (s14 + (1 << 20)) >> 21; + s15 += carry14; + s14 -= int64_lshift21(carry14); + carry16 = (s16 + (1 << 20)) >> 21; + s17 += carry16; + s16 -= int64_lshift21(carry16); + + carry7 = (s7 + (1 << 20)) >> 21; + s8 += carry7; + s7 -= int64_lshift21(carry7); + carry9 = (s9 + (1 << 20)) >> 21; + s10 += carry9; + s9 -= int64_lshift21(carry9); + carry11 = (s11 + (1 << 20)) >> 21; + s12 += carry11; + s11 -= int64_lshift21(carry11); + carry13 = (s13 + (1 << 20)) >> 21; + s14 += carry13; + s13 -= int64_lshift21(carry13); + carry15 = (s15 + (1 << 20)) >> 21; + s16 += carry15; + s15 -= int64_lshift21(carry15); + + s5 += s17 * 666643; + s6 += s17 * 470296; + s7 += s17 * 654183; + s8 -= s17 * 997805; + s9 += s17 * 136657; + s10 -= s17 * 683901; + s17 = 0; + + s4 += s16 * 666643; + s5 += s16 * 470296; + s6 += s16 * 654183; + s7 -= s16 * 997805; + s8 += s16 * 136657; + s9 -= s16 * 683901; + s16 = 0; + + s3 += s15 * 666643; + s4 += s15 * 470296; + s5 += s15 * 654183; + s6 -= s15 * 997805; + s7 += s15 * 136657; + s8 -= s15 * 683901; + s15 = 0; + + s2 += s14 * 666643; + s3 += s14 * 470296; + s4 += s14 * 654183; + s5 -= s14 * 997805; + s6 += s14 * 136657; + s7 -= s14 * 683901; + s14 = 0; + + s1 += s13 * 666643; + s2 += s13 * 470296; + s3 += s13 * 654183; + s4 -= s13 * 997805; + s5 += s13 * 136657; + s6 -= s13 * 683901; + s13 = 0; + + s0 += s12 * 666643; + s1 += s12 * 470296; + s2 += s12 * 654183; + s3 -= s12 * 997805; + s4 += s12 * 136657; + s5 -= s12 * 683901; + s12 = 0; + + carry0 = (s0 + (1 << 20)) >> 21; + s1 += carry0; + s0 -= int64_lshift21(carry0); + carry2 = (s2 + (1 << 20)) >> 21; + s3 += carry2; + s2 -= int64_lshift21(carry2); + carry4 = (s4 + (1 << 20)) >> 21; + s5 += carry4; + s4 -= int64_lshift21(carry4); + carry6 = (s6 + (1 << 20)) >> 21; + s7 += carry6; + s6 -= int64_lshift21(carry6); + carry8 = (s8 + (1 << 20)) >> 21; + s9 += carry8; + s8 -= int64_lshift21(carry8); + carry10 = (s10 + (1 << 20)) >> 21; + s11 += carry10; + s10 -= int64_lshift21(carry10); + + carry1 = (s1 + (1 << 20)) >> 21; + s2 += carry1; + s1 -= int64_lshift21(carry1); + carry3 = (s3 + (1 << 20)) >> 21; + s4 += carry3; + s3 -= int64_lshift21(carry3); + carry5 = (s5 + (1 << 20)) >> 21; + s6 += carry5; + s5 -= int64_lshift21(carry5); + carry7 = (s7 + (1 << 20)) >> 21; + s8 += carry7; + s7 -= int64_lshift21(carry7); + carry9 = (s9 + (1 << 20)) >> 21; + s10 += carry9; + s9 -= int64_lshift21(carry9); + carry11 = (s11 + (1 << 20)) >> 21; + s12 += carry11; + s11 -= int64_lshift21(carry11); + + s0 += s12 * 666643; + s1 += s12 * 470296; + s2 += s12 * 654183; + s3 -= s12 * 997805; + s4 += s12 * 136657; + s5 -= s12 * 683901; + s12 = 0; + + carry0 = s0 >> 21; + s1 += carry0; + s0 -= int64_lshift21(carry0); + carry1 = s1 >> 21; + s2 += carry1; + s1 -= int64_lshift21(carry1); + carry2 = s2 >> 21; + s3 += carry2; + s2 -= int64_lshift21(carry2); + carry3 = s3 >> 21; + s4 += carry3; + s3 -= int64_lshift21(carry3); + carry4 = s4 >> 21; + s5 += carry4; + s4 -= int64_lshift21(carry4); + carry5 = s5 >> 21; + s6 += carry5; + s5 -= int64_lshift21(carry5); + carry6 = s6 >> 21; + s7 += carry6; + s6 -= int64_lshift21(carry6); + carry7 = s7 >> 21; + s8 += carry7; + s7 -= int64_lshift21(carry7); + carry8 = s8 >> 21; + s9 += carry8; + s8 -= int64_lshift21(carry8); + carry9 = s9 >> 21; + s10 += carry9; + s9 -= int64_lshift21(carry9); + carry10 = s10 >> 21; + s11 += carry10; + s10 -= int64_lshift21(carry10); + carry11 = s11 >> 21; + s12 += carry11; + s11 -= int64_lshift21(carry11); + + s0 += s12 * 666643; + s1 += s12 * 470296; + s2 += s12 * 654183; + s3 -= s12 * 997805; + s4 += s12 * 136657; + s5 -= s12 * 683901; + s12 = 0; + + carry0 = s0 >> 21; + s1 += carry0; + s0 -= int64_lshift21(carry0); + carry1 = s1 >> 21; + s2 += carry1; + s1 -= int64_lshift21(carry1); + carry2 = s2 >> 21; + s3 += carry2; + s2 -= int64_lshift21(carry2); + carry3 = s3 >> 21; + s4 += carry3; + s3 -= int64_lshift21(carry3); + carry4 = s4 >> 21; + s5 += carry4; + s4 -= int64_lshift21(carry4); + carry5 = s5 >> 21; + s6 += carry5; + s5 -= int64_lshift21(carry5); + carry6 = s6 >> 21; + s7 += carry6; + s6 -= int64_lshift21(carry6); + carry7 = s7 >> 21; + s8 += carry7; + s7 -= int64_lshift21(carry7); + carry8 = s8 >> 21; + s9 += carry8; + s8 -= int64_lshift21(carry8); + carry9 = s9 >> 21; + s10 += carry9; + s9 -= int64_lshift21(carry9); + carry10 = s10 >> 21; + s11 += carry10; + s10 -= int64_lshift21(carry10); + + s[0] = s0 >> 0; + s[1] = s0 >> 8; + s[2] = (s0 >> 16) | (s1 << 5); + s[3] = s1 >> 3; + s[4] = s1 >> 11; + s[5] = (s1 >> 19) | (s2 << 2); + s[6] = s2 >> 6; + s[7] = (s2 >> 14) | (s3 << 7); + s[8] = s3 >> 1; + s[9] = s3 >> 9; + s[10] = (s3 >> 17) | (s4 << 4); + s[11] = s4 >> 4; + s[12] = s4 >> 12; + s[13] = (s4 >> 20) | (s5 << 1); + s[14] = s5 >> 7; + s[15] = (s5 >> 15) | (s6 << 6); + s[16] = s6 >> 2; + s[17] = s6 >> 10; + s[18] = (s6 >> 18) | (s7 << 3); + s[19] = s7 >> 5; + s[20] = s7 >> 13; + s[21] = s8 >> 0; + s[22] = s8 >> 8; + s[23] = (s8 >> 16) | (s9 << 5); + s[24] = s9 >> 3; + s[25] = s9 >> 11; + s[26] = (s9 >> 19) | (s10 << 2); + s[27] = s10 >> 6; + s[28] = (s10 >> 14) | (s11 << 7); + s[29] = s11 >> 1; + s[30] = s11 >> 9; + s[31] = s11 >> 17; +} + +int ED25519_verify(const uint8_t *message, size_t message_len, + const uint8_t signature[64], const uint8_t public_key[32]) { + ge_p3 A; + if ((signature[63] & 224) != 0 || + !x25519_ge_frombytes_vartime(&A, public_key)) { + return 0; + } + + fe_loose t; + fe_neg(&t, &A.X); + fe_carry(&A.X, &t); + fe_neg(&t, &A.T); + fe_carry(&A.T, &t); + + uint8_t pkcopy[32]; + memcpy(pkcopy, public_key, 32); + uint8_t rcopy[32]; + memcpy(rcopy, signature, 32); + union { + uint64_t u64[4]; + uint8_t u8[32]; + } scopy; + memcpy(&scopy.u8[0], signature + 32, 32); + + // https://tools.ietf.org/html/rfc8032#section-5.1.7 requires that s be in + // the range [0, order) in order to prevent signature malleability. + + // kOrder is the order of Curve25519 in little-endian form. + static const uint64_t kOrder[4] = { + UINT64_C(0x5812631a5cf5d3ed), + UINT64_C(0x14def9dea2f79cd6), + 0, + UINT64_C(0x1000000000000000), + }; + for (size_t i = 3;; i--) { + if (scopy.u64[i] > kOrder[i]) { + return 0; + } else if (scopy.u64[i] < kOrder[i]) { + break; + } else if (i == 0) { + return 0; + } + } + +#if defined(MCUBOOT_USE_MBED_TLS) + + mbedtls_sha512_context ctx; + int ret; + + mbedtls_sha512_init(&ctx); + + ret = mbedtls_sha512_starts_ret(&ctx, 0); + assert(ret == 0); + + ret = mbedtls_sha512_update_ret(&ctx, signature, 32); + assert(ret == 0); + ret = mbedtls_sha512_update_ret(&ctx, public_key, 32); + assert(ret == 0); + ret = mbedtls_sha512_update_ret(&ctx, message, message_len); + assert(ret == 0); + + uint8_t h[SHA512_DIGEST_LENGTH]; + ret = mbedtls_sha512_finish_ret(&ctx, h); + assert(ret == 0); + mbedtls_sha512_free(&ctx); + +#else + + struct tc_sha512_state_struct s; + int rc; + + rc = tc_sha512_init(&s); + assert(rc == TC_CRYPTO_SUCCESS); + + rc = tc_sha512_update(&s, signature, 32); + assert(rc == TC_CRYPTO_SUCCESS); + rc = tc_sha512_update(&s, public_key, 32); + assert(rc == TC_CRYPTO_SUCCESS); + rc = tc_sha512_update(&s, message, message_len); + assert(rc == TC_CRYPTO_SUCCESS); + + uint8_t h[TC_SHA512_DIGEST_SIZE]; + rc = tc_sha512_final(h, &s); + assert(rc == TC_CRYPTO_SUCCESS); + +#endif + + x25519_sc_reduce(h); + + ge_p2 R; + ge_double_scalarmult_vartime(&R, h, &A, scopy.u8); + + uint8_t rcheck[32]; + x25519_ge_tobytes(rcheck, &R); + + return CRYPTO_memcmp(rcheck, rcopy, sizeof(rcheck)) == 0; +} + +static void fe_cswap(fe *f, fe *g, fe_limb_t b) { + b = 0-b; + for (unsigned i = 0; i < FE_NUM_LIMBS; i++) { + fe_limb_t x = f->v[i] ^ g->v[i]; + x &= b; + f->v[i] ^= x; + g->v[i] ^= x; + } +} + +static void fiat_25519_carry_scmul_121666(uint32_t out1[10], const uint32_t arg1[10]) { + uint64_t x1 = ((uint64_t)UINT32_C(0x1db42) * (arg1[9])); + uint64_t x2 = ((uint64_t)UINT32_C(0x1db42) * (arg1[8])); + uint64_t x3 = ((uint64_t)UINT32_C(0x1db42) * (arg1[7])); + uint64_t x4 = ((uint64_t)UINT32_C(0x1db42) * (arg1[6])); + uint64_t x5 = ((uint64_t)UINT32_C(0x1db42) * (arg1[5])); + uint64_t x6 = ((uint64_t)UINT32_C(0x1db42) * (arg1[4])); + uint64_t x7 = ((uint64_t)UINT32_C(0x1db42) * (arg1[3])); + uint64_t x8 = ((uint64_t)UINT32_C(0x1db42) * (arg1[2])); + uint64_t x9 = ((uint64_t)UINT32_C(0x1db42) * (arg1[1])); + uint64_t x10 = ((uint64_t)UINT32_C(0x1db42) * (arg1[0])); + uint32_t x11 = (uint32_t)(x10 >> 26); + uint32_t x12 = (uint32_t)(x10 & UINT32_C(0x3ffffff)); + uint64_t x13 = (x11 + x9); + uint32_t x14 = (uint32_t)(x13 >> 25); + uint32_t x15 = (uint32_t)(x13 & UINT32_C(0x1ffffff)); + uint64_t x16 = (x14 + x8); + uint32_t x17 = (uint32_t)(x16 >> 26); + uint32_t x18 = (uint32_t)(x16 & UINT32_C(0x3ffffff)); + uint64_t x19 = (x17 + x7); + uint32_t x20 = (uint32_t)(x19 >> 25); + uint32_t x21 = (uint32_t)(x19 & UINT32_C(0x1ffffff)); + uint64_t x22 = (x20 + x6); + uint32_t x23 = (uint32_t)(x22 >> 26); + uint32_t x24 = (uint32_t)(x22 & UINT32_C(0x3ffffff)); + uint64_t x25 = (x23 + x5); + uint32_t x26 = (uint32_t)(x25 >> 25); + uint32_t x27 = (uint32_t)(x25 & UINT32_C(0x1ffffff)); + uint64_t x28 = (x26 + x4); + uint32_t x29 = (uint32_t)(x28 >> 26); + uint32_t x30 = (uint32_t)(x28 & UINT32_C(0x3ffffff)); + uint64_t x31 = (x29 + x3); + uint32_t x32 = (uint32_t)(x31 >> 25); + uint32_t x33 = (uint32_t)(x31 & UINT32_C(0x1ffffff)); + uint64_t x34 = (x32 + x2); + uint32_t x35 = (uint32_t)(x34 >> 26); + uint32_t x36 = (uint32_t)(x34 & UINT32_C(0x3ffffff)); + uint64_t x37 = (x35 + x1); + uint32_t x38 = (uint32_t)(x37 >> 25); + uint32_t x39 = (uint32_t)(x37 & UINT32_C(0x1ffffff)); + uint32_t x40 = (x38 * (uint32_t)UINT8_C(0x13)); + uint32_t x41 = (x12 + x40); + uint32_t x42 = (x41 >> 26); + uint32_t x43 = (x41 & UINT32_C(0x3ffffff)); + uint32_t x44 = (x42 + x15); + uint32_t x45 = (x44 >> 25); + uint32_t x46 = (x44 & UINT32_C(0x1ffffff)); + uint32_t x47 = (x45 + x18); + out1[0] = x43; + out1[1] = x46; + out1[2] = x47; + out1[3] = x21; + out1[4] = x24; + out1[5] = x27; + out1[6] = x30; + out1[7] = x33; + out1[8] = x36; + out1[9] = x39; +} + +static void fe_mul121666(fe *h, const fe_loose *f) { + assert_fe_loose(f->v); + fiat_25519_carry_scmul_121666(h->v, f->v); + assert_fe(h->v); +} + +static void x25519_scalar_mult_generic(uint8_t out[32], + const uint8_t scalar[32], + const uint8_t point[32]) { + fe x1, x2, z2, x3, z3, tmp0, tmp1; + fe_loose x2l, z2l, x3l, tmp0l, tmp1l; + + uint8_t e[32]; + memcpy(e, scalar, 32); + e[0] &= 248; + e[31] &= 127; + e[31] |= 64; + + // The following implementation was transcribed to Coq and proven to + // correspond to unary scalar multiplication in affine coordinates given that + // x1 != 0 is the x coordinate of some point on the curve. It was also checked + // in Coq that doing a ladderstep with x1 = x3 = 0 gives z2' = z3' = 0, and z2 + // = z3 = 0 gives z2' = z3' = 0. The statement was quantified over the + // underlying field, so it applies to Curve25519 itself and the quadratic + // twist of Curve25519. It was not proven in Coq that prime-field arithmetic + // correctly simulates extension-field arithmetic on prime-field values. + // The decoding of the byte array representation of e was not considered. + // Specification of Montgomery curves in affine coordinates: + // + // Proof that these form a group that is isomorphic to a Weierstrass curve: + // + // Coq transcription and correctness proof of the loop (where scalarbits=255): + // + // + // preconditions: 0 <= e < 2^255 (not necessarily e < order), fe_invert(0) = 0 + fe_frombytes(&x1, point); + fe_1(&x2); + fe_0(&z2); + fe_copy(&x3, &x1); + fe_1(&z3); + + unsigned swap = 0; + int pos; + for (pos = 254; pos >= 0; --pos) { + // loop invariant as of right before the test, for the case where x1 != 0: + // pos >= -1; if z2 = 0 then x2 is nonzero; if z3 = 0 then x3 is nonzero + // let r := e >> (pos+1) in the following equalities of projective points: + // to_xz (r*P) === if swap then (x3, z3) else (x2, z2) + // to_xz ((r+1)*P) === if swap then (x2, z2) else (x3, z3) + // x1 is the nonzero x coordinate of the nonzero point (r*P-(r+1)*P) + unsigned b = 1 & (e[pos / 8] >> (pos & 7)); + swap ^= b; + fe_cswap(&x2, &x3, swap); + fe_cswap(&z2, &z3, swap); + swap = b; + // Coq transcription of ladderstep formula (called from transcribed loop): + // + // + // x1 != 0 + // x1 = 0 + fe_sub(&tmp0l, &x3, &z3); + fe_sub(&tmp1l, &x2, &z2); + fe_add(&x2l, &x2, &z2); + fe_add(&z2l, &x3, &z3); + fe_mul_tll(&z3, &tmp0l, &x2l); + fe_mul_tll(&z2, &z2l, &tmp1l); + fe_sq_tl(&tmp0, &tmp1l); + fe_sq_tl(&tmp1, &x2l); + fe_add(&x3l, &z3, &z2); + fe_sub(&z2l, &z3, &z2); + fe_mul_ttt(&x2, &tmp1, &tmp0); + fe_sub(&tmp1l, &tmp1, &tmp0); + fe_sq_tl(&z2, &z2l); + fe_mul121666(&z3, &tmp1l); + fe_sq_tl(&x3, &x3l); + fe_add(&tmp0l, &tmp0, &z3); + fe_mul_ttt(&z3, &x1, &z2); + fe_mul_tll(&z2, &tmp1l, &tmp0l); + } + // here pos=-1, so r=e, so to_xz (e*P) === if swap then (x3, z3) else (x2, z2) + fe_cswap(&x2, &x3, swap); + fe_cswap(&z2, &z3, swap); + + fe_invert(&z2, &z2); + fe_mul_ttt(&x2, &x2, &z2); + fe_tobytes(out, &x2); +} + +int X25519(uint8_t out_shared_key[32], const uint8_t private_key[32], + const uint8_t peer_public_value[32]) { + static const uint8_t kZeros[32] = {0}; + x25519_scalar_mult_generic(out_shared_key, private_key, peer_public_value); + // The all-zero output results when the input is a point of small order. + return CRYPTO_memcmp(kZeros, out_shared_key, 32) != 0; +} diff --git a/bootloader/mcuboot/ext/fiat/src/curve25519.h b/bootloader/mcuboot/ext/fiat/src/curve25519.h new file mode 100644 index 0000000..e98334a --- /dev/null +++ b/bootloader/mcuboot/ext/fiat/src/curve25519.h @@ -0,0 +1,884 @@ +/* Autogenerated */ +/* curve description: 25519 */ +/* requested operations: carry_mul, carry_square, carry_scmul121666, carry, add, sub, opp, selectznz, to_bytes, from_bytes */ +/* n = 10 (from "10") */ +/* s = 0x8000000000000000000000000000000000000000000000000000000000000000 (from "2^255") */ +/* c = [(1, 19)] (from "1,19") */ +/* machine_wordsize = 32 (from "32") */ + +#include + +#ifndef UINT64_C +#define UINT64_C(x) x##ULL +#endif +#ifndef UINT32_C +#define UINT32_C(x) x##UL +#endif +#ifndef UINT8_C +#define UINT8_C(x) (x) +#endif + +// fe means field element. Here the field is \Z/(2^255-19). An element t, +// entries t[0]...t[9], represents the integer t[0]+2^26 t[1]+2^51 t[2]+2^77 +// t[3]+2^102 t[4]+...+2^230 t[9]. +// fe limbs are bounded by 1.125*2^26,1.125*2^25,1.125*2^26,1.125*2^25,etc. +// Multiplication and carrying produce fe from fe_loose. +typedef struct fe { uint32_t v[10]; } fe; + +// fe_loose limbs are bounded by 3.375*2^26,3.375*2^25,3.375*2^26,3.375*2^25,etc. +// Addition and subtraction produce fe_loose from (fe, fe). +typedef struct fe_loose { uint32_t v[10]; } fe_loose; + +// ge means group element. +// +// Here the group is the set of pairs (x,y) of field elements (see fe.h) +// satisfying -x^2 + y^2 = 1 + d x^2y^2 +// where d = -121665/121666. +// +// Representations: +// ge_p2 (projective): (X:Y:Z) satisfying x=X/Z, y=Y/Z +// ge_p3 (extended): (X:Y:Z:T) satisfying x=X/Z, y=Y/Z, XY=ZT +// ge_p1p1 (completed): ((X:Z),(Y:T)) satisfying x=X/Z, y=Y/T +// ge_precomp (Duif): (y+x,y-x,2dxy) + +typedef struct { + fe X; + fe Y; + fe Z; +} ge_p2; + +typedef struct { + fe X; + fe Y; + fe Z; + fe T; +} ge_p3; + +typedef struct { + fe_loose X; + fe_loose Y; + fe_loose Z; + fe_loose T; +} ge_p1p1; + +typedef struct { + fe_loose yplusx; + fe_loose yminusx; + fe_loose xy2d; +} ge_precomp; + +typedef struct { + fe_loose YplusX; + fe_loose YminusX; + fe_loose Z; + fe_loose T2d; +} ge_cached; + +typedef unsigned char fiat_25519_uint1; +typedef signed char fiat_25519_int1; + +/* + * Input Bounds: + * arg1: [0x0 ~> 0x1] + * arg2: [0x0 ~> 0x3ffffff] + * arg3: [0x0 ~> 0x3ffffff] + * Output Bounds: + * out1: [0x0 ~> 0x3ffffff] + * out2: [0x0 ~> 0x1] + */ +static void fiat_25519_addcarryx_u26(uint32_t* out1, fiat_25519_uint1* out2, fiat_25519_uint1 arg1, uint32_t arg2, uint32_t arg3) { + uint32_t x1 = ((arg1 + arg2) + arg3); + uint32_t x2 = (x1 & UINT32_C(0x3ffffff)); + fiat_25519_uint1 x3 = (fiat_25519_uint1)(x1 >> 26); + *out1 = x2; + *out2 = x3; +} + +/* + * Input Bounds: + * arg1: [0x0 ~> 0x1] + * arg2: [0x0 ~> 0x3ffffff] + * arg3: [0x0 ~> 0x3ffffff] + * Output Bounds: + * out1: [0x0 ~> 0x3ffffff] + * out2: [0x0 ~> 0x1] + */ +static void fiat_25519_subborrowx_u26(uint32_t* out1, fiat_25519_uint1* out2, fiat_25519_uint1 arg1, uint32_t arg2, uint32_t arg3) { + int32_t x1 = ((int32_t)(arg2 - arg1) - (int32_t)arg3); + fiat_25519_int1 x2 = (fiat_25519_int1)(x1 >> 26); + uint32_t x3 = (x1 & UINT32_C(0x3ffffff)); + *out1 = x3; + *out2 = (fiat_25519_uint1)(0x0 - x2); +} + +/* + * Input Bounds: + * arg1: [0x0 ~> 0x1] + * arg2: [0x0 ~> 0x1ffffff] + * arg3: [0x0 ~> 0x1ffffff] + * Output Bounds: + * out1: [0x0 ~> 0x1ffffff] + * out2: [0x0 ~> 0x1] + */ +static void fiat_25519_addcarryx_u25(uint32_t* out1, fiat_25519_uint1* out2, fiat_25519_uint1 arg1, uint32_t arg2, uint32_t arg3) { + uint32_t x1 = ((arg1 + arg2) + arg3); + uint32_t x2 = (x1 & UINT32_C(0x1ffffff)); + fiat_25519_uint1 x3 = (fiat_25519_uint1)(x1 >> 25); + *out1 = x2; + *out2 = x3; +} + +/* + * Input Bounds: + * arg1: [0x0 ~> 0x1] + * arg2: [0x0 ~> 0x1ffffff] + * arg3: [0x0 ~> 0x1ffffff] + * Output Bounds: + * out1: [0x0 ~> 0x1ffffff] + * out2: [0x0 ~> 0x1] + */ +static void fiat_25519_subborrowx_u25(uint32_t* out1, fiat_25519_uint1* out2, fiat_25519_uint1 arg1, uint32_t arg2, uint32_t arg3) { + int32_t x1 = ((int32_t)(arg2 - arg1) - (int32_t)arg3); + fiat_25519_int1 x2 = (fiat_25519_int1)(x1 >> 25); + uint32_t x3 = (x1 & UINT32_C(0x1ffffff)); + *out1 = x3; + *out2 = (fiat_25519_uint1)(0x0 - x2); +} + +// value_barrier_u32 returns |a|, but prevents GCC and Clang from reasoning about +// the returned value. This is used to mitigate compilers undoing constant-time +// code, until we can express our requirements directly in the language. +// +// Note the compiler is aware that |value_barrier_u32| has no side effects and +// always has the same output for a given input. This allows it to eliminate +// dead code, move computations across loops, and vectorize. +static inline uint32_t value_barrier_u32(uint32_t a) { +#if !defined(OPENSSL_NO_ASM) && (defined(__GNUC__) || defined(__clang__)) + __asm__("" : "+r"(a) : /* no inputs */); +#endif + return a; +} + +/* + * Input Bounds: + * arg1: [0x0 ~> 0x1] + * arg2: [0x0 ~> 0xffffffff] + * arg3: [0x0 ~> 0xffffffff] + * Output Bounds: + * out1: [0x0 ~> 0xffffffff] + */ +static void fiat_25519_cmovznz_u32(uint32_t* out1, fiat_25519_uint1 arg1, uint32_t arg2, uint32_t arg3) { + fiat_25519_uint1 x1 = (!(!arg1)); + uint32_t x2 = ((fiat_25519_int1)(0x0 - x1) & UINT32_C(0xffffffff)); + // Note this line has been patched from the synthesized code to add value + // barriers. + // + // Clang recognizes this pattern as a select. While it usually transforms it + // to a cmov, it sometimes further transforms it into a branch, which we do + // not want. + uint32_t x3 = ((value_barrier_u32(x2) & arg3) | (value_barrier_u32(~x2) & arg2)); + *out1 = x3; +} + +/* + * Input Bounds: + * arg1: [[0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999]] + * arg2: [[0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999]] + * Output Bounds: + * out1: [[0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333]] + */ +static void fiat_25519_carry_mul(uint32_t out1[10], const uint32_t arg1[10], const uint32_t arg2[10]) { + uint64_t x1 = ((uint64_t)(arg1[9]) * ((arg2[9]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x2 = ((uint64_t)(arg1[9]) * ((arg2[8]) * (uint32_t)UINT8_C(0x13))); + uint64_t x3 = ((uint64_t)(arg1[9]) * ((arg2[7]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x4 = ((uint64_t)(arg1[9]) * ((arg2[6]) * (uint32_t)UINT8_C(0x13))); + uint64_t x5 = ((uint64_t)(arg1[9]) * ((arg2[5]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x6 = ((uint64_t)(arg1[9]) * ((arg2[4]) * (uint32_t)UINT8_C(0x13))); + uint64_t x7 = ((uint64_t)(arg1[9]) * ((arg2[3]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x8 = ((uint64_t)(arg1[9]) * ((arg2[2]) * (uint32_t)UINT8_C(0x13))); + uint64_t x9 = ((uint64_t)(arg1[9]) * ((arg2[1]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x10 = ((uint64_t)(arg1[8]) * ((arg2[9]) * (uint32_t)UINT8_C(0x13))); + uint64_t x11 = ((uint64_t)(arg1[8]) * ((arg2[8]) * (uint32_t)UINT8_C(0x13))); + uint64_t x12 = ((uint64_t)(arg1[8]) * ((arg2[7]) * (uint32_t)UINT8_C(0x13))); + uint64_t x13 = ((uint64_t)(arg1[8]) * ((arg2[6]) * (uint32_t)UINT8_C(0x13))); + uint64_t x14 = ((uint64_t)(arg1[8]) * ((arg2[5]) * (uint32_t)UINT8_C(0x13))); + uint64_t x15 = ((uint64_t)(arg1[8]) * ((arg2[4]) * (uint32_t)UINT8_C(0x13))); + uint64_t x16 = ((uint64_t)(arg1[8]) * ((arg2[3]) * (uint32_t)UINT8_C(0x13))); + uint64_t x17 = ((uint64_t)(arg1[8]) * ((arg2[2]) * (uint32_t)UINT8_C(0x13))); + uint64_t x18 = ((uint64_t)(arg1[7]) * ((arg2[9]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x19 = ((uint64_t)(arg1[7]) * ((arg2[8]) * (uint32_t)UINT8_C(0x13))); + uint64_t x20 = ((uint64_t)(arg1[7]) * ((arg2[7]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x21 = ((uint64_t)(arg1[7]) * ((arg2[6]) * (uint32_t)UINT8_C(0x13))); + uint64_t x22 = ((uint64_t)(arg1[7]) * ((arg2[5]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x23 = ((uint64_t)(arg1[7]) * ((arg2[4]) * (uint32_t)UINT8_C(0x13))); + uint64_t x24 = ((uint64_t)(arg1[7]) * ((arg2[3]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x25 = ((uint64_t)(arg1[6]) * ((arg2[9]) * (uint32_t)UINT8_C(0x13))); + uint64_t x26 = ((uint64_t)(arg1[6]) * ((arg2[8]) * (uint32_t)UINT8_C(0x13))); + uint64_t x27 = ((uint64_t)(arg1[6]) * ((arg2[7]) * (uint32_t)UINT8_C(0x13))); + uint64_t x28 = ((uint64_t)(arg1[6]) * ((arg2[6]) * (uint32_t)UINT8_C(0x13))); + uint64_t x29 = ((uint64_t)(arg1[6]) * ((arg2[5]) * (uint32_t)UINT8_C(0x13))); + uint64_t x30 = ((uint64_t)(arg1[6]) * ((arg2[4]) * (uint32_t)UINT8_C(0x13))); + uint64_t x31 = ((uint64_t)(arg1[5]) * ((arg2[9]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x32 = ((uint64_t)(arg1[5]) * ((arg2[8]) * (uint32_t)UINT8_C(0x13))); + uint64_t x33 = ((uint64_t)(arg1[5]) * ((arg2[7]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x34 = ((uint64_t)(arg1[5]) * ((arg2[6]) * (uint32_t)UINT8_C(0x13))); + uint64_t x35 = ((uint64_t)(arg1[5]) * ((arg2[5]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x36 = ((uint64_t)(arg1[4]) * ((arg2[9]) * (uint32_t)UINT8_C(0x13))); + uint64_t x37 = ((uint64_t)(arg1[4]) * ((arg2[8]) * (uint32_t)UINT8_C(0x13))); + uint64_t x38 = ((uint64_t)(arg1[4]) * ((arg2[7]) * (uint32_t)UINT8_C(0x13))); + uint64_t x39 = ((uint64_t)(arg1[4]) * ((arg2[6]) * (uint32_t)UINT8_C(0x13))); + uint64_t x40 = ((uint64_t)(arg1[3]) * ((arg2[9]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x41 = ((uint64_t)(arg1[3]) * ((arg2[8]) * (uint32_t)UINT8_C(0x13))); + uint64_t x42 = ((uint64_t)(arg1[3]) * ((arg2[7]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x43 = ((uint64_t)(arg1[2]) * ((arg2[9]) * (uint32_t)UINT8_C(0x13))); + uint64_t x44 = ((uint64_t)(arg1[2]) * ((arg2[8]) * (uint32_t)UINT8_C(0x13))); + uint64_t x45 = ((uint64_t)(arg1[1]) * ((arg2[9]) * ((uint32_t)0x2 * UINT8_C(0x13)))); + uint64_t x46 = ((uint64_t)(arg1[9]) * (arg2[0])); + uint64_t x47 = ((uint64_t)(arg1[8]) * (arg2[1])); + uint64_t x48 = ((uint64_t)(arg1[8]) * (arg2[0])); + uint64_t x49 = ((uint64_t)(arg1[7]) * (arg2[2])); + uint64_t x50 = ((uint64_t)(arg1[7]) * ((arg2[1]) * (uint32_t)0x2)); + uint64_t x51 = ((uint64_t)(arg1[7]) * (arg2[0])); + uint64_t x52 = ((uint64_t)(arg1[6]) * (arg2[3])); + uint64_t x53 = ((uint64_t)(arg1[6]) * (arg2[2])); + uint64_t x54 = ((uint64_t)(arg1[6]) * (arg2[1])); + uint64_t x55 = ((uint64_t)(arg1[6]) * (arg2[0])); + uint64_t x56 = ((uint64_t)(arg1[5]) * (arg2[4])); + uint64_t x57 = ((uint64_t)(arg1[5]) * ((arg2[3]) * (uint32_t)0x2)); + uint64_t x58 = ((uint64_t)(arg1[5]) * (arg2[2])); + uint64_t x59 = ((uint64_t)(arg1[5]) * ((arg2[1]) * (uint32_t)0x2)); + uint64_t x60 = ((uint64_t)(arg1[5]) * (arg2[0])); + uint64_t x61 = ((uint64_t)(arg1[4]) * (arg2[5])); + uint64_t x62 = ((uint64_t)(arg1[4]) * (arg2[4])); + uint64_t x63 = ((uint64_t)(arg1[4]) * (arg2[3])); + uint64_t x64 = ((uint64_t)(arg1[4]) * (arg2[2])); + uint64_t x65 = ((uint64_t)(arg1[4]) * (arg2[1])); + uint64_t x66 = ((uint64_t)(arg1[4]) * (arg2[0])); + uint64_t x67 = ((uint64_t)(arg1[3]) * (arg2[6])); + uint64_t x68 = ((uint64_t)(arg1[3]) * ((arg2[5]) * (uint32_t)0x2)); + uint64_t x69 = ((uint64_t)(arg1[3]) * (arg2[4])); + uint64_t x70 = ((uint64_t)(arg1[3]) * ((arg2[3]) * (uint32_t)0x2)); + uint64_t x71 = ((uint64_t)(arg1[3]) * (arg2[2])); + uint64_t x72 = ((uint64_t)(arg1[3]) * ((arg2[1]) * (uint32_t)0x2)); + uint64_t x73 = ((uint64_t)(arg1[3]) * (arg2[0])); + uint64_t x74 = ((uint64_t)(arg1[2]) * (arg2[7])); + uint64_t x75 = ((uint64_t)(arg1[2]) * (arg2[6])); + uint64_t x76 = ((uint64_t)(arg1[2]) * (arg2[5])); + uint64_t x77 = ((uint64_t)(arg1[2]) * (arg2[4])); + uint64_t x78 = ((uint64_t)(arg1[2]) * (arg2[3])); + uint64_t x79 = ((uint64_t)(arg1[2]) * (arg2[2])); + uint64_t x80 = ((uint64_t)(arg1[2]) * (arg2[1])); + uint64_t x81 = ((uint64_t)(arg1[2]) * (arg2[0])); + uint64_t x82 = ((uint64_t)(arg1[1]) * (arg2[8])); + uint64_t x83 = ((uint64_t)(arg1[1]) * ((arg2[7]) * (uint32_t)0x2)); + uint64_t x84 = ((uint64_t)(arg1[1]) * (arg2[6])); + uint64_t x85 = ((uint64_t)(arg1[1]) * ((arg2[5]) * (uint32_t)0x2)); + uint64_t x86 = ((uint64_t)(arg1[1]) * (arg2[4])); + uint64_t x87 = ((uint64_t)(arg1[1]) * ((arg2[3]) * (uint32_t)0x2)); + uint64_t x88 = ((uint64_t)(arg1[1]) * (arg2[2])); + uint64_t x89 = ((uint64_t)(arg1[1]) * ((arg2[1]) * (uint32_t)0x2)); + uint64_t x90 = ((uint64_t)(arg1[1]) * (arg2[0])); + uint64_t x91 = ((uint64_t)(arg1[0]) * (arg2[9])); + uint64_t x92 = ((uint64_t)(arg1[0]) * (arg2[8])); + uint64_t x93 = ((uint64_t)(arg1[0]) * (arg2[7])); + uint64_t x94 = ((uint64_t)(arg1[0]) * (arg2[6])); + uint64_t x95 = ((uint64_t)(arg1[0]) * (arg2[5])); + uint64_t x96 = ((uint64_t)(arg1[0]) * (arg2[4])); + uint64_t x97 = ((uint64_t)(arg1[0]) * (arg2[3])); + uint64_t x98 = ((uint64_t)(arg1[0]) * (arg2[2])); + uint64_t x99 = ((uint64_t)(arg1[0]) * (arg2[1])); + uint64_t x100 = ((uint64_t)(arg1[0]) * (arg2[0])); + uint64_t x101 = (x100 + (x45 + (x44 + (x42 + (x39 + (x35 + (x30 + (x24 + (x17 + x9))))))))); + uint64_t x102 = (x101 >> 26); + uint32_t x103 = (uint32_t)(x101 & UINT32_C(0x3ffffff)); + uint64_t x104 = (x91 + (x82 + (x74 + (x67 + (x61 + (x56 + (x52 + (x49 + (x47 + x46))))))))); + uint64_t x105 = (x92 + (x83 + (x75 + (x68 + (x62 + (x57 + (x53 + (x50 + (x48 + x1))))))))); + uint64_t x106 = (x93 + (x84 + (x76 + (x69 + (x63 + (x58 + (x54 + (x51 + (x10 + x2))))))))); + uint64_t x107 = (x94 + (x85 + (x77 + (x70 + (x64 + (x59 + (x55 + (x18 + (x11 + x3))))))))); + uint64_t x108 = (x95 + (x86 + (x78 + (x71 + (x65 + (x60 + (x25 + (x19 + (x12 + x4))))))))); + uint64_t x109 = (x96 + (x87 + (x79 + (x72 + (x66 + (x31 + (x26 + (x20 + (x13 + x5))))))))); + uint64_t x110 = (x97 + (x88 + (x80 + (x73 + (x36 + (x32 + (x27 + (x21 + (x14 + x6))))))))); + uint64_t x111 = (x98 + (x89 + (x81 + (x40 + (x37 + (x33 + (x28 + (x22 + (x15 + x7))))))))); + uint64_t x112 = (x99 + (x90 + (x43 + (x41 + (x38 + (x34 + (x29 + (x23 + (x16 + x8))))))))); + uint64_t x113 = (x102 + x112); + uint64_t x114 = (x113 >> 25); + uint32_t x115 = (uint32_t)(x113 & UINT32_C(0x1ffffff)); + uint64_t x116 = (x114 + x111); + uint64_t x117 = (x116 >> 26); + uint32_t x118 = (uint32_t)(x116 & UINT32_C(0x3ffffff)); + uint64_t x119 = (x117 + x110); + uint64_t x120 = (x119 >> 25); + uint32_t x121 = (uint32_t)(x119 & UINT32_C(0x1ffffff)); + uint64_t x122 = (x120 + x109); + uint64_t x123 = (x122 >> 26); + uint32_t x124 = (uint32_t)(x122 & UINT32_C(0x3ffffff)); + uint64_t x125 = (x123 + x108); + uint64_t x126 = (x125 >> 25); + uint32_t x127 = (uint32_t)(x125 & UINT32_C(0x1ffffff)); + uint64_t x128 = (x126 + x107); + uint64_t x129 = (x128 >> 26); + uint32_t x130 = (uint32_t)(x128 & UINT32_C(0x3ffffff)); + uint64_t x131 = (x129 + x106); + uint64_t x132 = (x131 >> 25); + uint32_t x133 = (uint32_t)(x131 & UINT32_C(0x1ffffff)); + uint64_t x134 = (x132 + x105); + uint64_t x135 = (x134 >> 26); + uint32_t x136 = (uint32_t)(x134 & UINT32_C(0x3ffffff)); + uint64_t x137 = (x135 + x104); + uint64_t x138 = (x137 >> 25); + uint32_t x139 = (uint32_t)(x137 & UINT32_C(0x1ffffff)); + uint64_t x140 = (x138 * (uint64_t)UINT8_C(0x13)); + uint64_t x141 = (x103 + x140); + uint32_t x142 = (uint32_t)(x141 >> 26); + uint32_t x143 = (uint32_t)(x141 & UINT32_C(0x3ffffff)); + uint32_t x144 = (x142 + x115); + uint32_t x145 = (x144 >> 25); + uint32_t x146 = (x144 & UINT32_C(0x1ffffff)); + uint32_t x147 = (x145 + x118); + out1[0] = x143; + out1[1] = x146; + out1[2] = x147; + out1[3] = x121; + out1[4] = x124; + out1[5] = x127; + out1[6] = x130; + out1[7] = x133; + out1[8] = x136; + out1[9] = x139; +} + +/* + * Input Bounds: + * arg1: [[0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999]] + * Output Bounds: + * out1: [[0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333]] + */ +static void fiat_25519_carry_square(uint32_t out1[10], const uint32_t arg1[10]) { + uint32_t x1 = ((arg1[9]) * (uint32_t)UINT8_C(0x13)); + uint32_t x2 = (x1 * (uint32_t)0x2); + uint32_t x3 = ((arg1[9]) * (uint32_t)0x2); + uint32_t x4 = ((arg1[8]) * (uint32_t)UINT8_C(0x13)); + uint64_t x5 = (x4 * (uint64_t)0x2); + uint32_t x6 = ((arg1[8]) * (uint32_t)0x2); + uint32_t x7 = ((arg1[7]) * (uint32_t)UINT8_C(0x13)); + uint32_t x8 = (x7 * (uint32_t)0x2); + uint32_t x9 = ((arg1[7]) * (uint32_t)0x2); + uint32_t x10 = ((arg1[6]) * (uint32_t)UINT8_C(0x13)); + uint64_t x11 = (x10 * (uint64_t)0x2); + uint32_t x12 = ((arg1[6]) * (uint32_t)0x2); + uint32_t x13 = ((arg1[5]) * (uint32_t)UINT8_C(0x13)); + uint32_t x14 = ((arg1[5]) * (uint32_t)0x2); + uint32_t x15 = ((arg1[4]) * (uint32_t)0x2); + uint32_t x16 = ((arg1[3]) * (uint32_t)0x2); + uint32_t x17 = ((arg1[2]) * (uint32_t)0x2); + uint32_t x18 = ((arg1[1]) * (uint32_t)0x2); + uint64_t x19 = ((uint64_t)(arg1[9]) * (x1 * (uint32_t)0x2)); + uint64_t x20 = ((uint64_t)(arg1[8]) * x2); + uint64_t x21 = ((uint64_t)(arg1[8]) * x4); + uint64_t x22 = ((arg1[7]) * (x2 * (uint64_t)0x2)); + uint64_t x23 = ((arg1[7]) * x5); + uint64_t x24 = ((uint64_t)(arg1[7]) * (x7 * (uint32_t)0x2)); + uint64_t x25 = ((uint64_t)(arg1[6]) * x2); + uint64_t x26 = ((arg1[6]) * x5); + uint64_t x27 = ((uint64_t)(arg1[6]) * x8); + uint64_t x28 = ((uint64_t)(arg1[6]) * x10); + uint64_t x29 = ((arg1[5]) * (x2 * (uint64_t)0x2)); + uint64_t x30 = ((arg1[5]) * x5); + uint64_t x31 = ((arg1[5]) * (x8 * (uint64_t)0x2)); + uint64_t x32 = ((arg1[5]) * x11); + uint64_t x33 = ((uint64_t)(arg1[5]) * (x13 * (uint32_t)0x2)); + uint64_t x34 = ((uint64_t)(arg1[4]) * x2); + uint64_t x35 = ((arg1[4]) * x5); + uint64_t x36 = ((uint64_t)(arg1[4]) * x8); + uint64_t x37 = ((arg1[4]) * x11); + uint64_t x38 = ((uint64_t)(arg1[4]) * x14); + uint64_t x39 = ((uint64_t)(arg1[4]) * (arg1[4])); + uint64_t x40 = ((arg1[3]) * (x2 * (uint64_t)0x2)); + uint64_t x41 = ((arg1[3]) * x5); + uint64_t x42 = ((arg1[3]) * (x8 * (uint64_t)0x2)); + uint64_t x43 = ((uint64_t)(arg1[3]) * x12); + uint64_t x44 = ((uint64_t)(arg1[3]) * (x14 * (uint32_t)0x2)); + uint64_t x45 = ((uint64_t)(arg1[3]) * x15); + uint64_t x46 = ((uint64_t)(arg1[3]) * ((arg1[3]) * (uint32_t)0x2)); + uint64_t x47 = ((uint64_t)(arg1[2]) * x2); + uint64_t x48 = ((arg1[2]) * x5); + uint64_t x49 = ((uint64_t)(arg1[2]) * x9); + uint64_t x50 = ((uint64_t)(arg1[2]) * x12); + uint64_t x51 = ((uint64_t)(arg1[2]) * x14); + uint64_t x52 = ((uint64_t)(arg1[2]) * x15); + uint64_t x53 = ((uint64_t)(arg1[2]) * x16); + uint64_t x54 = ((uint64_t)(arg1[2]) * (arg1[2])); + uint64_t x55 = ((arg1[1]) * (x2 * (uint64_t)0x2)); + uint64_t x56 = ((uint64_t)(arg1[1]) * x6); + uint64_t x57 = ((uint64_t)(arg1[1]) * (x9 * (uint32_t)0x2)); + uint64_t x58 = ((uint64_t)(arg1[1]) * x12); + uint64_t x59 = ((uint64_t)(arg1[1]) * (x14 * (uint32_t)0x2)); + uint64_t x60 = ((uint64_t)(arg1[1]) * x15); + uint64_t x61 = ((uint64_t)(arg1[1]) * (x16 * (uint32_t)0x2)); + uint64_t x62 = ((uint64_t)(arg1[1]) * x17); + uint64_t x63 = ((uint64_t)(arg1[1]) * ((arg1[1]) * (uint32_t)0x2)); + uint64_t x64 = ((uint64_t)(arg1[0]) * x3); + uint64_t x65 = ((uint64_t)(arg1[0]) * x6); + uint64_t x66 = ((uint64_t)(arg1[0]) * x9); + uint64_t x67 = ((uint64_t)(arg1[0]) * x12); + uint64_t x68 = ((uint64_t)(arg1[0]) * x14); + uint64_t x69 = ((uint64_t)(arg1[0]) * x15); + uint64_t x70 = ((uint64_t)(arg1[0]) * x16); + uint64_t x71 = ((uint64_t)(arg1[0]) * x17); + uint64_t x72 = ((uint64_t)(arg1[0]) * x18); + uint64_t x73 = ((uint64_t)(arg1[0]) * (arg1[0])); + uint64_t x74 = (x73 + (x55 + (x48 + (x42 + (x37 + x33))))); + uint64_t x75 = (x74 >> 26); + uint32_t x76 = (uint32_t)(x74 & UINT32_C(0x3ffffff)); + uint64_t x77 = (x64 + (x56 + (x49 + (x43 + x38)))); + uint64_t x78 = (x65 + (x57 + (x50 + (x44 + (x39 + x19))))); + uint64_t x79 = (x66 + (x58 + (x51 + (x45 + x20)))); + uint64_t x80 = (x67 + (x59 + (x52 + (x46 + (x22 + x21))))); + uint64_t x81 = (x68 + (x60 + (x53 + (x25 + x23)))); + uint64_t x82 = (x69 + (x61 + (x54 + (x29 + (x26 + x24))))); + uint64_t x83 = (x70 + (x62 + (x34 + (x30 + x27)))); + uint64_t x84 = (x71 + (x63 + (x40 + (x35 + (x31 + x28))))); + uint64_t x85 = (x72 + (x47 + (x41 + (x36 + x32)))); + uint64_t x86 = (x75 + x85); + uint64_t x87 = (x86 >> 25); + uint32_t x88 = (uint32_t)(x86 & UINT32_C(0x1ffffff)); + uint64_t x89 = (x87 + x84); + uint64_t x90 = (x89 >> 26); + uint32_t x91 = (uint32_t)(x89 & UINT32_C(0x3ffffff)); + uint64_t x92 = (x90 + x83); + uint64_t x93 = (x92 >> 25); + uint32_t x94 = (uint32_t)(x92 & UINT32_C(0x1ffffff)); + uint64_t x95 = (x93 + x82); + uint64_t x96 = (x95 >> 26); + uint32_t x97 = (uint32_t)(x95 & UINT32_C(0x3ffffff)); + uint64_t x98 = (x96 + x81); + uint64_t x99 = (x98 >> 25); + uint32_t x100 = (uint32_t)(x98 & UINT32_C(0x1ffffff)); + uint64_t x101 = (x99 + x80); + uint64_t x102 = (x101 >> 26); + uint32_t x103 = (uint32_t)(x101 & UINT32_C(0x3ffffff)); + uint64_t x104 = (x102 + x79); + uint64_t x105 = (x104 >> 25); + uint32_t x106 = (uint32_t)(x104 & UINT32_C(0x1ffffff)); + uint64_t x107 = (x105 + x78); + uint64_t x108 = (x107 >> 26); + uint32_t x109 = (uint32_t)(x107 & UINT32_C(0x3ffffff)); + uint64_t x110 = (x108 + x77); + uint64_t x111 = (x110 >> 25); + uint32_t x112 = (uint32_t)(x110 & UINT32_C(0x1ffffff)); + uint64_t x113 = (x111 * (uint64_t)UINT8_C(0x13)); + uint64_t x114 = (x76 + x113); + uint32_t x115 = (uint32_t)(x114 >> 26); + uint32_t x116 = (uint32_t)(x114 & UINT32_C(0x3ffffff)); + uint32_t x117 = (x115 + x88); + uint32_t x118 = (x117 >> 25); + uint32_t x119 = (x117 & UINT32_C(0x1ffffff)); + uint32_t x120 = (x118 + x91); + out1[0] = x116; + out1[1] = x119; + out1[2] = x120; + out1[3] = x94; + out1[4] = x97; + out1[5] = x100; + out1[6] = x103; + out1[7] = x106; + out1[8] = x109; + out1[9] = x112; +} + +/* + * Input Bounds: + * arg1: [[0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999]] + * Output Bounds: + * out1: [[0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333]] + */ +static void fiat_25519_carry(uint32_t out1[10], const uint32_t arg1[10]) { + uint32_t x1 = (arg1[0]); + uint32_t x2 = ((x1 >> 26) + (arg1[1])); + uint32_t x3 = ((x2 >> 25) + (arg1[2])); + uint32_t x4 = ((x3 >> 26) + (arg1[3])); + uint32_t x5 = ((x4 >> 25) + (arg1[4])); + uint32_t x6 = ((x5 >> 26) + (arg1[5])); + uint32_t x7 = ((x6 >> 25) + (arg1[6])); + uint32_t x8 = ((x7 >> 26) + (arg1[7])); + uint32_t x9 = ((x8 >> 25) + (arg1[8])); + uint32_t x10 = ((x9 >> 26) + (arg1[9])); + uint32_t x11 = ((x1 & UINT32_C(0x3ffffff)) + ((x10 >> 25) * (uint32_t)UINT8_C(0x13))); + uint32_t x12 = ((x11 >> 26) + (x2 & UINT32_C(0x1ffffff))); + uint32_t x13 = (x11 & UINT32_C(0x3ffffff)); + uint32_t x14 = (x12 & UINT32_C(0x1ffffff)); + uint32_t x15 = ((x12 >> 25) + (x3 & UINT32_C(0x3ffffff))); + uint32_t x16 = (x4 & UINT32_C(0x1ffffff)); + uint32_t x17 = (x5 & UINT32_C(0x3ffffff)); + uint32_t x18 = (x6 & UINT32_C(0x1ffffff)); + uint32_t x19 = (x7 & UINT32_C(0x3ffffff)); + uint32_t x20 = (x8 & UINT32_C(0x1ffffff)); + uint32_t x21 = (x9 & UINT32_C(0x3ffffff)); + uint32_t x22 = (x10 & UINT32_C(0x1ffffff)); + out1[0] = x13; + out1[1] = x14; + out1[2] = x15; + out1[3] = x16; + out1[4] = x17; + out1[5] = x18; + out1[6] = x19; + out1[7] = x20; + out1[8] = x21; + out1[9] = x22; +} + +/* + * Input Bounds: + * arg1: [[0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333]] + * arg2: [[0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333]] + * Output Bounds: + * out1: [[0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999]] + */ +static void fiat_25519_add(uint32_t out1[10], const uint32_t arg1[10], const uint32_t arg2[10]) { + uint32_t x1 = ((arg1[0]) + (arg2[0])); + uint32_t x2 = ((arg1[1]) + (arg2[1])); + uint32_t x3 = ((arg1[2]) + (arg2[2])); + uint32_t x4 = ((arg1[3]) + (arg2[3])); + uint32_t x5 = ((arg1[4]) + (arg2[4])); + uint32_t x6 = ((arg1[5]) + (arg2[5])); + uint32_t x7 = ((arg1[6]) + (arg2[6])); + uint32_t x8 = ((arg1[7]) + (arg2[7])); + uint32_t x9 = ((arg1[8]) + (arg2[8])); + uint32_t x10 = ((arg1[9]) + (arg2[9])); + out1[0] = x1; + out1[1] = x2; + out1[2] = x3; + out1[3] = x4; + out1[4] = x5; + out1[5] = x6; + out1[6] = x7; + out1[7] = x8; + out1[8] = x9; + out1[9] = x10; +} + +/* + * Input Bounds: + * arg1: [[0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333]] + * arg2: [[0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333]] + * Output Bounds: + * out1: [[0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999]] + */ +static void fiat_25519_sub(uint32_t out1[10], const uint32_t arg1[10], const uint32_t arg2[10]) { + uint32_t x1 = ((UINT32_C(0x7ffffda) + (arg1[0])) - (arg2[0])); + uint32_t x2 = ((UINT32_C(0x3fffffe) + (arg1[1])) - (arg2[1])); + uint32_t x3 = ((UINT32_C(0x7fffffe) + (arg1[2])) - (arg2[2])); + uint32_t x4 = ((UINT32_C(0x3fffffe) + (arg1[3])) - (arg2[3])); + uint32_t x5 = ((UINT32_C(0x7fffffe) + (arg1[4])) - (arg2[4])); + uint32_t x6 = ((UINT32_C(0x3fffffe) + (arg1[5])) - (arg2[5])); + uint32_t x7 = ((UINT32_C(0x7fffffe) + (arg1[6])) - (arg2[6])); + uint32_t x8 = ((UINT32_C(0x3fffffe) + (arg1[7])) - (arg2[7])); + uint32_t x9 = ((UINT32_C(0x7fffffe) + (arg1[8])) - (arg2[8])); + uint32_t x10 = ((UINT32_C(0x3fffffe) + (arg1[9])) - (arg2[9])); + out1[0] = x1; + out1[1] = x2; + out1[2] = x3; + out1[3] = x4; + out1[4] = x5; + out1[5] = x6; + out1[6] = x7; + out1[7] = x8; + out1[8] = x9; + out1[9] = x10; +} + +/* + * Input Bounds: + * arg1: [[0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333]] + * Output Bounds: + * out1: [[0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999], [0x0 ~> 0xd333332], [0x0 ~> 0x6999999]] + */ +static void fiat_25519_opp(uint32_t out1[10], const uint32_t arg1[10]) { + uint32_t x1 = (UINT32_C(0x7ffffda) - (arg1[0])); + uint32_t x2 = (UINT32_C(0x3fffffe) - (arg1[1])); + uint32_t x3 = (UINT32_C(0x7fffffe) - (arg1[2])); + uint32_t x4 = (UINT32_C(0x3fffffe) - (arg1[3])); + uint32_t x5 = (UINT32_C(0x7fffffe) - (arg1[4])); + uint32_t x6 = (UINT32_C(0x3fffffe) - (arg1[5])); + uint32_t x7 = (UINT32_C(0x7fffffe) - (arg1[6])); + uint32_t x8 = (UINT32_C(0x3fffffe) - (arg1[7])); + uint32_t x9 = (UINT32_C(0x7fffffe) - (arg1[8])); + uint32_t x10 = (UINT32_C(0x3fffffe) - (arg1[9])); + out1[0] = x1; + out1[1] = x2; + out1[2] = x3; + out1[3] = x4; + out1[4] = x5; + out1[5] = x6; + out1[6] = x7; + out1[7] = x8; + out1[8] = x9; + out1[9] = x10; +} + +/* + * Input Bounds: + * arg1: [[0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333]] + * Output Bounds: + * out1: [[0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0x7f]] + */ +static void fiat_25519_to_bytes(uint8_t out1[32], const uint32_t arg1[10]) { + uint32_t x1; + fiat_25519_uint1 x2; + fiat_25519_subborrowx_u26(&x1, &x2, 0x0, (arg1[0]), UINT32_C(0x3ffffed)); + uint32_t x3; + fiat_25519_uint1 x4; + fiat_25519_subborrowx_u25(&x3, &x4, x2, (arg1[1]), UINT32_C(0x1ffffff)); + uint32_t x5; + fiat_25519_uint1 x6; + fiat_25519_subborrowx_u26(&x5, &x6, x4, (arg1[2]), UINT32_C(0x3ffffff)); + uint32_t x7; + fiat_25519_uint1 x8; + fiat_25519_subborrowx_u25(&x7, &x8, x6, (arg1[3]), UINT32_C(0x1ffffff)); + uint32_t x9; + fiat_25519_uint1 x10; + fiat_25519_subborrowx_u26(&x9, &x10, x8, (arg1[4]), UINT32_C(0x3ffffff)); + uint32_t x11; + fiat_25519_uint1 x12; + fiat_25519_subborrowx_u25(&x11, &x12, x10, (arg1[5]), UINT32_C(0x1ffffff)); + uint32_t x13; + fiat_25519_uint1 x14; + fiat_25519_subborrowx_u26(&x13, &x14, x12, (arg1[6]), UINT32_C(0x3ffffff)); + uint32_t x15; + fiat_25519_uint1 x16; + fiat_25519_subborrowx_u25(&x15, &x16, x14, (arg1[7]), UINT32_C(0x1ffffff)); + uint32_t x17; + fiat_25519_uint1 x18; + fiat_25519_subborrowx_u26(&x17, &x18, x16, (arg1[8]), UINT32_C(0x3ffffff)); + uint32_t x19; + fiat_25519_uint1 x20; + fiat_25519_subborrowx_u25(&x19, &x20, x18, (arg1[9]), UINT32_C(0x1ffffff)); + uint32_t x21; + fiat_25519_cmovznz_u32(&x21, x20, 0x0, UINT32_C(0xffffffff)); + uint32_t x22; + fiat_25519_uint1 x23; + fiat_25519_addcarryx_u26(&x22, &x23, 0x0, (x21 & UINT32_C(0x3ffffed)), x1); + uint32_t x24; + fiat_25519_uint1 x25; + fiat_25519_addcarryx_u25(&x24, &x25, x23, (x21 & UINT32_C(0x1ffffff)), x3); + uint32_t x26; + fiat_25519_uint1 x27; + fiat_25519_addcarryx_u26(&x26, &x27, x25, (x21 & UINT32_C(0x3ffffff)), x5); + uint32_t x28; + fiat_25519_uint1 x29; + fiat_25519_addcarryx_u25(&x28, &x29, x27, (x21 & UINT32_C(0x1ffffff)), x7); + uint32_t x30; + fiat_25519_uint1 x31; + fiat_25519_addcarryx_u26(&x30, &x31, x29, (x21 & UINT32_C(0x3ffffff)), x9); + uint32_t x32; + fiat_25519_uint1 x33; + fiat_25519_addcarryx_u25(&x32, &x33, x31, (x21 & UINT32_C(0x1ffffff)), x11); + uint32_t x34; + fiat_25519_uint1 x35; + fiat_25519_addcarryx_u26(&x34, &x35, x33, (x21 & UINT32_C(0x3ffffff)), x13); + uint32_t x36; + fiat_25519_uint1 x37; + fiat_25519_addcarryx_u25(&x36, &x37, x35, (x21 & UINT32_C(0x1ffffff)), x15); + uint32_t x38; + fiat_25519_uint1 x39; + fiat_25519_addcarryx_u26(&x38, &x39, x37, (x21 & UINT32_C(0x3ffffff)), x17); + uint32_t x40; + fiat_25519_uint1 x41; + fiat_25519_addcarryx_u25(&x40, &x41, x39, (x21 & UINT32_C(0x1ffffff)), x19); + uint32_t x42 = (x40 << 6); + uint32_t x43 = (x38 << 4); + uint32_t x44 = (x36 << 3); + uint32_t x45 = (x34 * (uint32_t)0x2); + uint32_t x46 = (x30 << 6); + uint32_t x47 = (x28 << 5); + uint32_t x48 = (x26 << 3); + uint32_t x49 = (x24 << 2); + uint32_t x50 = (x22 >> 8); + uint8_t x51 = (uint8_t)(x22 & UINT8_C(0xff)); + uint32_t x52 = (x50 >> 8); + uint8_t x53 = (uint8_t)(x50 & UINT8_C(0xff)); + uint8_t x54 = (uint8_t)(x52 >> 8); + uint8_t x55 = (uint8_t)(x52 & UINT8_C(0xff)); + uint32_t x56 = (x54 + x49); + uint32_t x57 = (x56 >> 8); + uint8_t x58 = (uint8_t)(x56 & UINT8_C(0xff)); + uint32_t x59 = (x57 >> 8); + uint8_t x60 = (uint8_t)(x57 & UINT8_C(0xff)); + uint8_t x61 = (uint8_t)(x59 >> 8); + uint8_t x62 = (uint8_t)(x59 & UINT8_C(0xff)); + uint32_t x63 = (x61 + x48); + uint32_t x64 = (x63 >> 8); + uint8_t x65 = (uint8_t)(x63 & UINT8_C(0xff)); + uint32_t x66 = (x64 >> 8); + uint8_t x67 = (uint8_t)(x64 & UINT8_C(0xff)); + uint8_t x68 = (uint8_t)(x66 >> 8); + uint8_t x69 = (uint8_t)(x66 & UINT8_C(0xff)); + uint32_t x70 = (x68 + x47); + uint32_t x71 = (x70 >> 8); + uint8_t x72 = (uint8_t)(x70 & UINT8_C(0xff)); + uint32_t x73 = (x71 >> 8); + uint8_t x74 = (uint8_t)(x71 & UINT8_C(0xff)); + uint8_t x75 = (uint8_t)(x73 >> 8); + uint8_t x76 = (uint8_t)(x73 & UINT8_C(0xff)); + uint32_t x77 = (x75 + x46); + uint32_t x78 = (x77 >> 8); + uint8_t x79 = (uint8_t)(x77 & UINT8_C(0xff)); + uint32_t x80 = (x78 >> 8); + uint8_t x81 = (uint8_t)(x78 & UINT8_C(0xff)); + uint8_t x82 = (uint8_t)(x80 >> 8); + uint8_t x83 = (uint8_t)(x80 & UINT8_C(0xff)); + uint8_t x84 = (uint8_t)(x82 & UINT8_C(0xff)); + uint32_t x85 = (x32 >> 8); + uint8_t x86 = (uint8_t)(x32 & UINT8_C(0xff)); + uint32_t x87 = (x85 >> 8); + uint8_t x88 = (uint8_t)(x85 & UINT8_C(0xff)); + fiat_25519_uint1 x89 = (fiat_25519_uint1)(x87 >> 8); + uint8_t x90 = (uint8_t)(x87 & UINT8_C(0xff)); + uint32_t x91 = (x89 + x45); + uint32_t x92 = (x91 >> 8); + uint8_t x93 = (uint8_t)(x91 & UINT8_C(0xff)); + uint32_t x94 = (x92 >> 8); + uint8_t x95 = (uint8_t)(x92 & UINT8_C(0xff)); + uint8_t x96 = (uint8_t)(x94 >> 8); + uint8_t x97 = (uint8_t)(x94 & UINT8_C(0xff)); + uint32_t x98 = (x96 + x44); + uint32_t x99 = (x98 >> 8); + uint8_t x100 = (uint8_t)(x98 & UINT8_C(0xff)); + uint32_t x101 = (x99 >> 8); + uint8_t x102 = (uint8_t)(x99 & UINT8_C(0xff)); + uint8_t x103 = (uint8_t)(x101 >> 8); + uint8_t x104 = (uint8_t)(x101 & UINT8_C(0xff)); + uint32_t x105 = (x103 + x43); + uint32_t x106 = (x105 >> 8); + uint8_t x107 = (uint8_t)(x105 & UINT8_C(0xff)); + uint32_t x108 = (x106 >> 8); + uint8_t x109 = (uint8_t)(x106 & UINT8_C(0xff)); + uint8_t x110 = (uint8_t)(x108 >> 8); + uint8_t x111 = (uint8_t)(x108 & UINT8_C(0xff)); + uint32_t x112 = (x110 + x42); + uint32_t x113 = (x112 >> 8); + uint8_t x114 = (uint8_t)(x112 & UINT8_C(0xff)); + uint32_t x115 = (x113 >> 8); + uint8_t x116 = (uint8_t)(x113 & UINT8_C(0xff)); + uint8_t x117 = (uint8_t)(x115 >> 8); + uint8_t x118 = (uint8_t)(x115 & UINT8_C(0xff)); + out1[0] = x51; + out1[1] = x53; + out1[2] = x55; + out1[3] = x58; + out1[4] = x60; + out1[5] = x62; + out1[6] = x65; + out1[7] = x67; + out1[8] = x69; + out1[9] = x72; + out1[10] = x74; + out1[11] = x76; + out1[12] = x79; + out1[13] = x81; + out1[14] = x83; + out1[15] = x84; + out1[16] = x86; + out1[17] = x88; + out1[18] = x90; + out1[19] = x93; + out1[20] = x95; + out1[21] = x97; + out1[22] = x100; + out1[23] = x102; + out1[24] = x104; + out1[25] = x107; + out1[26] = x109; + out1[27] = x111; + out1[28] = x114; + out1[29] = x116; + out1[30] = x118; + out1[31] = x117; +} + +/* + * Input Bounds: + * arg1: [[0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0xff], [0x0 ~> 0x7f]] + * Output Bounds: + * out1: [[0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333], [0x0 ~> 0x4666666], [0x0 ~> 0x2333333]] + */ +static void fiat_25519_from_bytes(uint32_t out1[10], const uint8_t arg1[32]) { + uint32_t x1 = ((uint32_t)(arg1[31]) << 18); + uint32_t x2 = ((uint32_t)(arg1[30]) << 10); + uint32_t x3 = ((uint32_t)(arg1[29]) << 2); + uint32_t x4 = ((uint32_t)(arg1[28]) << 20); + uint32_t x5 = ((uint32_t)(arg1[27]) << 12); + uint32_t x6 = ((uint32_t)(arg1[26]) << 4); + uint32_t x7 = ((uint32_t)(arg1[25]) << 21); + uint32_t x8 = ((uint32_t)(arg1[24]) << 13); + uint32_t x9 = ((uint32_t)(arg1[23]) << 5); + uint32_t x10 = ((uint32_t)(arg1[22]) << 23); + uint32_t x11 = ((uint32_t)(arg1[21]) << 15); + uint32_t x12 = ((uint32_t)(arg1[20]) << 7); + uint32_t x13 = ((uint32_t)(arg1[19]) << 24); + uint32_t x14 = ((uint32_t)(arg1[18]) << 16); + uint32_t x15 = ((uint32_t)(arg1[17]) << 8); + uint8_t x16 = (arg1[16]); + uint32_t x17 = ((uint32_t)(arg1[15]) << 18); + uint32_t x18 = ((uint32_t)(arg1[14]) << 10); + uint32_t x19 = ((uint32_t)(arg1[13]) << 2); + uint32_t x20 = ((uint32_t)(arg1[12]) << 19); + uint32_t x21 = ((uint32_t)(arg1[11]) << 11); + uint32_t x22 = ((uint32_t)(arg1[10]) << 3); + uint32_t x23 = ((uint32_t)(arg1[9]) << 21); + uint32_t x24 = ((uint32_t)(arg1[8]) << 13); + uint32_t x25 = ((uint32_t)(arg1[7]) << 5); + uint32_t x26 = ((uint32_t)(arg1[6]) << 22); + uint32_t x27 = ((uint32_t)(arg1[5]) << 14); + uint32_t x28 = ((uint32_t)(arg1[4]) << 6); + uint32_t x29 = ((uint32_t)(arg1[3]) << 24); + uint32_t x30 = ((uint32_t)(arg1[2]) << 16); + uint32_t x31 = ((uint32_t)(arg1[1]) << 8); + uint8_t x32 = (arg1[0]); + uint32_t x33 = (x32 + (x31 + (x30 + x29))); + uint8_t x34 = (uint8_t)(x33 >> 26); + uint32_t x35 = (x33 & UINT32_C(0x3ffffff)); + uint32_t x36 = (x3 + (x2 + x1)); + uint32_t x37 = (x6 + (x5 + x4)); + uint32_t x38 = (x9 + (x8 + x7)); + uint32_t x39 = (x12 + (x11 + x10)); + uint32_t x40 = (x16 + (x15 + (x14 + x13))); + uint32_t x41 = (x19 + (x18 + x17)); + uint32_t x42 = (x22 + (x21 + x20)); + uint32_t x43 = (x25 + (x24 + x23)); + uint32_t x44 = (x28 + (x27 + x26)); + uint32_t x45 = (x34 + x44); + uint8_t x46 = (uint8_t)(x45 >> 25); + uint32_t x47 = (x45 & UINT32_C(0x1ffffff)); + uint32_t x48 = (x46 + x43); + uint8_t x49 = (uint8_t)(x48 >> 26); + uint32_t x50 = (x48 & UINT32_C(0x3ffffff)); + uint32_t x51 = (x49 + x42); + uint8_t x52 = (uint8_t)(x51 >> 25); + uint32_t x53 = (x51 & UINT32_C(0x1ffffff)); + uint32_t x54 = (x52 + x41); + uint32_t x55 = (x54 & UINT32_C(0x3ffffff)); + uint8_t x56 = (uint8_t)(x40 >> 25); + uint32_t x57 = (x40 & UINT32_C(0x1ffffff)); + uint32_t x58 = (x56 + x39); + uint8_t x59 = (uint8_t)(x58 >> 26); + uint32_t x60 = (x58 & UINT32_C(0x3ffffff)); + uint32_t x61 = (x59 + x38); + uint8_t x62 = (uint8_t)(x61 >> 25); + uint32_t x63 = (x61 & UINT32_C(0x1ffffff)); + uint32_t x64 = (x62 + x37); + uint8_t x65 = (uint8_t)(x64 >> 26); + uint32_t x66 = (x64 & UINT32_C(0x3ffffff)); + uint32_t x67 = (x65 + x36); + out1[0] = x35; + out1[1] = x47; + out1[2] = x50; + out1[3] = x53; + out1[4] = x55; + out1[5] = x57; + out1[6] = x60; + out1[7] = x63; + out1[8] = x66; + out1[9] = x67; +} + diff --git a/bootloader/mcuboot/ext/fiat/src/curve25519_tables.h b/bootloader/mcuboot/ext/fiat/src/curve25519_tables.h new file mode 100644 index 0000000..bfefc1c --- /dev/null +++ b/bootloader/mcuboot/ext/fiat/src/curve25519_tables.h @@ -0,0 +1,107 @@ +// The MIT License (MIT) +// +// Copyright (c) 2015-2016 the fiat-crypto authors (see the AUTHORS file). +// +// Permission is hereby granted, free of charge, to any person obtaining a copy +// of this software and associated documentation files (the "Software"), to deal +// in the Software without restriction, including without limitation the rights +// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +// copies of the Software, and to permit persons to whom the Software is +// furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +// SOFTWARE. + +// This file is generated from +// ./make_curve25519_tables.py > curve25519_tables.h + +static const fe d = {{ + 56195235, 13857412, 51736253, 6949390, 114729, 24766616, + 60832955, 30306712, 48412415, 21499315 +}}; + +static const fe sqrtm1 = {{ + 34513072, 25610706, 9377949, 3500415, 12389472, + 33281959, 41962654, 31548777, 326685, 11406482 +}}; + +static const fe d2 = {{ + 45281625, 27714825, 36363642, 13898781, 229458, 15978800, + 54557047, 27058993, 29715967, 9444199 +}}; + +// Bi[i] = (2*i+1)*B +static const ge_precomp Bi[8] = { + { + {{25967493, 19198397, 29566455, 3660896, 54414519, 4014786, 27544626, + 21800161, 61029707, 2047604}}, + {{54563134, 934261, 64385954, 3049989, 66381436, 9406985, 12720692, + 5043384, 19500929, 18085054}}, + {{58370664, 4489569, 9688441, 18769238, 10184608, 21191052, 29287918, + 11864899, 42594502, 29115885}}, + }, + { + {{15636272, 23865875, 24204772, 25642034, 616976, 16869170, 27787599, + 18782243, 28944399, 32004408}}, + {{16568933, 4717097, 55552716, 32452109, 15682895, 21747389, 16354576, + 21778470, 7689661, 11199574}}, + {{30464137, 27578307, 55329429, 17883566, 23220364, 15915852, 7512774, + 10017326, 49359771, 23634074}}, + }, + { + {{10861363, 11473154, 27284546, 1981175, 37044515, 12577860, 32867885, + 14515107, 51670560, 10819379}}, + {{4708026, 6336745, 20377586, 9066809, 55836755, 6594695, 41455196, + 12483687, 54440373, 5581305}}, + {{19563141, 16186464, 37722007, 4097518, 10237984, 29206317, 28542349, + 13850243, 43430843, 17738489}}, + }, + { + {{5153727, 9909285, 1723747, 30776558, 30523604, 5516873, 19480852, + 5230134, 43156425, 18378665}}, + {{36839857, 30090922, 7665485, 10083793, 28475525, 1649722, 20654025, + 16520125, 30598449, 7715701}}, + {{28881826, 14381568, 9657904, 3680757, 46927229, 7843315, 35708204, + 1370707, 29794553, 32145132}}, + }, + { + {{44589871, 26862249, 14201701, 24808930, 43598457, 8844725, 18474211, + 32192982, 54046167, 13821876}}, + {{60653668, 25714560, 3374701, 28813570, 40010246, 22982724, 31655027, + 26342105, 18853321, 19333481}}, + {{4566811, 20590564, 38133974, 21313742, 59506191, 30723862, 58594505, + 23123294, 2207752, 30344648}}, + }, + { + {{41954014, 29368610, 29681143, 7868801, 60254203, 24130566, 54671499, + 32891431, 35997400, 17421995}}, + {{25576264, 30851218, 7349803, 21739588, 16472781, 9300885, 3844789, + 15725684, 171356, 6466918}}, + {{23103977, 13316479, 9739013, 17404951, 817874, 18515490, 8965338, + 19466374, 36393951, 16193876}}, + }, + { + {{33587053, 3180712, 64714734, 14003686, 50205390, 17283591, 17238397, + 4729455, 49034351, 9256799}}, + {{41926547, 29380300, 32336397, 5036987, 45872047, 11360616, 22616405, + 9761698, 47281666, 630304}}, + {{53388152, 2639452, 42871404, 26147950, 9494426, 27780403, 60554312, + 17593437, 64659607, 19263131}}, + }, + { + {{63957664, 28508356, 9282713, 6866145, 35201802, 32691408, 48168288, + 15033783, 25105118, 25659556}}, + {{42782475, 15950225, 35307649, 18961608, 55446126, 28463506, 1573891, + 30928545, 2198789, 17749813}}, + {{64009494, 10324966, 64867251, 7453182, 61661885, 30818928, 53296841, + 17317989, 34647629, 21263748}}, + }, +}; diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/README b/bootloader/mcuboot/ext/mbedtls-asn1/README new file mode 100644 index 0000000..b6b4dcb --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/README @@ -0,0 +1,3 @@ +This bundles the asn1 parser from mbed-tls into mcuboot, which allows +adding EC crypto (tinycrypt based) functionality for target OSes that +don't bundle mbed-tls. diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/common.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/common.h new file mode 100644 index 0000000..a2c8a1e --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/common.h @@ -0,0 +1,56 @@ +/** + * \file common.h + * + * \brief Utility macros for internal use in the library + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_LIBRARY_COMMON_H +#define MBEDTLS_LIBRARY_COMMON_H + +#include "mbedtls/build_info.h" + +/** Helper to define a function as static except when building invasive tests. + * + * If a function is only used inside its own source file and should be + * declared `static` to allow the compiler to optimize for code size, + * but that function has unit tests, define it with + * ``` + * MBEDTLS_STATIC_TESTABLE int mbedtls_foo(...) { ... } + * ``` + * and declare it in a header in the `library/` directory with + * ``` + * #if defined(MBEDTLS_TEST_HOOKS) + * int mbedtls_foo(...); + * #endif + * ``` + */ +#if defined(MBEDTLS_TEST_HOOKS) +#define MBEDTLS_STATIC_TESTABLE +#else +#define MBEDTLS_STATIC_TESTABLE static +#endif + +/** Allow library to access its structs' private members. + * + * Although structs defined in header files are publicly available, + * their members are private and should not be accessed by the user. + */ +#define MBEDTLS_ALLOW_PRIVATE_ACCESS + +#endif /* MBEDTLS_LIBRARY_COMMON_H */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/asn1.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/asn1.h new file mode 100644 index 0000000..4668581 --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/asn1.h @@ -0,0 +1,604 @@ +/** + * \file asn1.h + * + * \brief Generic ASN.1 parsing + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBEDTLS_ASN1_H +#define MBEDTLS_ASN1_H +#include "mbedtls/private_access.h" + +#include "mbedtls/build_info.h" + +#include + +#if defined(MBEDTLS_BIGNUM_C) +#include "mbedtls/bignum.h" +#endif + +/** + * \addtogroup asn1_module + * \{ + */ + +/** + * \name ASN1 Error codes + * These error codes are OR'ed to X509 error codes for + * higher error granularity. + * ASN1 is a standard to specify data structures. + * \{ + */ +#define MBEDTLS_ERR_ASN1_OUT_OF_DATA -0x0060 /**< Out of data when parsing an ASN1 data structure. */ +#define MBEDTLS_ERR_ASN1_UNEXPECTED_TAG -0x0062 /**< ASN1 tag was of an unexpected value. */ +#define MBEDTLS_ERR_ASN1_INVALID_LENGTH -0x0064 /**< Error when trying to determine the length or invalid length. */ +#define MBEDTLS_ERR_ASN1_LENGTH_MISMATCH -0x0066 /**< Actual length differs from expected length. */ +#define MBEDTLS_ERR_ASN1_INVALID_DATA -0x0068 /**< Data is invalid. */ +#define MBEDTLS_ERR_ASN1_ALLOC_FAILED -0x006A /**< Memory allocation failed */ +#define MBEDTLS_ERR_ASN1_BUF_TOO_SMALL -0x006C /**< Buffer too small when writing ASN.1 data structure. */ + +/* \} name */ + +/** + * \name DER constants + * These constants comply with the DER encoded ASN.1 type tags. + * DER encoding uses hexadecimal representation. + * An example DER sequence is:\n + * - 0x02 -- tag indicating INTEGER + * - 0x01 -- length in octets + * - 0x05 -- value + * Such sequences are typically read into \c ::mbedtls_x509_buf. + * \{ + */ +#define MBEDTLS_ASN1_BOOLEAN 0x01 +#define MBEDTLS_ASN1_INTEGER 0x02 +#define MBEDTLS_ASN1_BIT_STRING 0x03 +#define MBEDTLS_ASN1_OCTET_STRING 0x04 +#define MBEDTLS_ASN1_NULL 0x05 +#define MBEDTLS_ASN1_OID 0x06 +#define MBEDTLS_ASN1_ENUMERATED 0x0A +#define MBEDTLS_ASN1_UTF8_STRING 0x0C +#define MBEDTLS_ASN1_SEQUENCE 0x10 +#define MBEDTLS_ASN1_SET 0x11 +#define MBEDTLS_ASN1_PRINTABLE_STRING 0x13 +#define MBEDTLS_ASN1_T61_STRING 0x14 +#define MBEDTLS_ASN1_IA5_STRING 0x16 +#define MBEDTLS_ASN1_UTC_TIME 0x17 +#define MBEDTLS_ASN1_GENERALIZED_TIME 0x18 +#define MBEDTLS_ASN1_UNIVERSAL_STRING 0x1C +#define MBEDTLS_ASN1_BMP_STRING 0x1E +#define MBEDTLS_ASN1_PRIMITIVE 0x00 +#define MBEDTLS_ASN1_CONSTRUCTED 0x20 +#define MBEDTLS_ASN1_CONTEXT_SPECIFIC 0x80 + +/* Slightly smaller way to check if tag is a string tag + * compared to canonical implementation. */ +#define MBEDTLS_ASN1_IS_STRING_TAG( tag ) \ + ( ( tag ) < 32u && ( \ + ( ( 1u << ( tag ) ) & ( ( 1u << MBEDTLS_ASN1_BMP_STRING ) | \ + ( 1u << MBEDTLS_ASN1_UTF8_STRING ) | \ + ( 1u << MBEDTLS_ASN1_T61_STRING ) | \ + ( 1u << MBEDTLS_ASN1_IA5_STRING ) | \ + ( 1u << MBEDTLS_ASN1_UNIVERSAL_STRING ) | \ + ( 1u << MBEDTLS_ASN1_PRINTABLE_STRING ) | \ + ( 1u << MBEDTLS_ASN1_BIT_STRING ) ) ) != 0 ) ) + +/* + * Bit masks for each of the components of an ASN.1 tag as specified in + * ITU X.690 (08/2015), section 8.1 "General rules for encoding", + * paragraph 8.1.2.2: + * + * Bit 8 7 6 5 1 + * +-------+-----+------------+ + * | Class | P/C | Tag number | + * +-------+-----+------------+ + */ +#define MBEDTLS_ASN1_TAG_CLASS_MASK 0xC0 +#define MBEDTLS_ASN1_TAG_PC_MASK 0x20 +#define MBEDTLS_ASN1_TAG_VALUE_MASK 0x1F + +/* \} name */ +/* \} addtogroup asn1_module */ + +/** Returns the size of the binary string, without the trailing \\0 */ +#define MBEDTLS_OID_SIZE(x) (sizeof(x) - 1) + +/** + * Compares an mbedtls_asn1_buf structure to a reference OID. + * + * Only works for 'defined' oid_str values (MBEDTLS_OID_HMAC_SHA1), you cannot use a + * 'unsigned char *oid' here! + */ +#define MBEDTLS_OID_CMP(oid_str, oid_buf) \ + ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf)->len ) || \ + memcmp( (oid_str), (oid_buf)->p, (oid_buf)->len) != 0 ) + +#define MBEDTLS_OID_CMP_RAW(oid_str, oid_buf, oid_buf_len) \ + ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf_len) ) || \ + memcmp( (oid_str), (oid_buf), (oid_buf_len) ) != 0 ) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \name Functions to parse ASN.1 data structures + * \{ + */ + +/** + * Type-length-value structure that allows for ASN1 using DER. + */ +typedef struct mbedtls_asn1_buf +{ + int MBEDTLS_PRIVATE(tag); /**< ASN1 type, e.g. MBEDTLS_ASN1_UTF8_STRING. */ + size_t MBEDTLS_PRIVATE(len); /**< ASN1 length, in octets. */ + unsigned char *MBEDTLS_PRIVATE(p); /**< ASN1 data, e.g. in ASCII. */ +} +mbedtls_asn1_buf; + +/** + * Container for ASN1 bit strings. + */ +typedef struct mbedtls_asn1_bitstring +{ + size_t MBEDTLS_PRIVATE(len); /**< ASN1 length, in octets. */ + unsigned char MBEDTLS_PRIVATE(unused_bits); /**< Number of unused bits at the end of the string */ + unsigned char *MBEDTLS_PRIVATE(p); /**< Raw ASN1 data for the bit string */ +} +mbedtls_asn1_bitstring; + +/** + * Container for a sequence of ASN.1 items + */ +typedef struct mbedtls_asn1_sequence +{ + mbedtls_asn1_buf MBEDTLS_PRIVATE(buf); /**< Buffer containing the given ASN.1 item. */ + struct mbedtls_asn1_sequence *MBEDTLS_PRIVATE(next); /**< The next entry in the sequence. */ +} +mbedtls_asn1_sequence; + +/** + * Container for a sequence or list of 'named' ASN.1 data items + */ +typedef struct mbedtls_asn1_named_data +{ + mbedtls_asn1_buf MBEDTLS_PRIVATE(oid); /**< The object identifier. */ + mbedtls_asn1_buf MBEDTLS_PRIVATE(val); /**< The named value. */ + struct mbedtls_asn1_named_data *MBEDTLS_PRIVATE(next); /**< The next entry in the sequence. */ + unsigned char MBEDTLS_PRIVATE(next_merged); /**< Merge next item into the current one? */ +} +mbedtls_asn1_named_data; + +/** + * \brief Get the length of an ASN.1 element. + * Updates the pointer to immediately behind the length. + * + * \param p On entry, \c *p points to the first byte of the length, + * i.e. immediately after the tag. + * On successful completion, \c *p points to the first byte + * after the length, i.e. the first byte of the content. + * On error, the value of \c *p is undefined. + * \param end End of data. + * \param len On successful completion, \c *len contains the length + * read from the ASN.1 input. + * + * \return 0 if successful. + * \return #MBEDTLS_ERR_ASN1_OUT_OF_DATA if the ASN.1 element + * would end beyond \p end. + * \return #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the length is unparseable. + */ +int mbedtls_asn1_get_len( unsigned char **p, + const unsigned char *end, + size_t *len ); + +/** + * \brief Get the tag and length of the element. + * Check for the requested tag. + * Updates the pointer to immediately behind the tag and length. + * + * \param p On entry, \c *p points to the start of the ASN.1 element. + * On successful completion, \c *p points to the first byte + * after the length, i.e. the first byte of the content. + * On error, the value of \c *p is undefined. + * \param end End of data. + * \param len On successful completion, \c *len contains the length + * read from the ASN.1 input. + * \param tag The expected tag. + * + * \return 0 if successful. + * \return #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the data does not start + * with the requested tag. + * \return #MBEDTLS_ERR_ASN1_OUT_OF_DATA if the ASN.1 element + * would end beyond \p end. + * \return #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the length is unparseable. + */ +int mbedtls_asn1_get_tag( unsigned char **p, + const unsigned char *end, + size_t *len, int tag ); + +/** + * \brief Retrieve a boolean ASN.1 tag and its value. + * Updates the pointer to immediately behind the full tag. + * + * \param p On entry, \c *p points to the start of the ASN.1 element. + * On successful completion, \c *p points to the first byte + * beyond the ASN.1 element. + * On error, the value of \c *p is undefined. + * \param end End of data. + * \param val On success, the parsed value (\c 0 or \c 1). + * + * \return 0 if successful. + * \return An ASN.1 error code if the input does not start with + * a valid ASN.1 BOOLEAN. + */ +int mbedtls_asn1_get_bool( unsigned char **p, + const unsigned char *end, + int *val ); + +/** + * \brief Retrieve an integer ASN.1 tag and its value. + * Updates the pointer to immediately behind the full tag. + * + * \param p On entry, \c *p points to the start of the ASN.1 element. + * On successful completion, \c *p points to the first byte + * beyond the ASN.1 element. + * On error, the value of \c *p is undefined. + * \param end End of data. + * \param val On success, the parsed value. + * + * \return 0 if successful. + * \return An ASN.1 error code if the input does not start with + * a valid ASN.1 INTEGER. + * \return #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does + * not fit in an \c int. + */ +int mbedtls_asn1_get_int( unsigned char **p, + const unsigned char *end, + int *val ); + +/** + * \brief Retrieve an enumerated ASN.1 tag and its value. + * Updates the pointer to immediately behind the full tag. + * + * \param p On entry, \c *p points to the start of the ASN.1 element. + * On successful completion, \c *p points to the first byte + * beyond the ASN.1 element. + * On error, the value of \c *p is undefined. + * \param end End of data. + * \param val On success, the parsed value. + * + * \return 0 if successful. + * \return An ASN.1 error code if the input does not start with + * a valid ASN.1 ENUMERATED. + * \return #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does + * not fit in an \c int. + */ +int mbedtls_asn1_get_enum( unsigned char **p, + const unsigned char *end, + int *val ); + +/** + * \brief Retrieve a bitstring ASN.1 tag and its value. + * Updates the pointer to immediately behind the full tag. + * + * \param p On entry, \c *p points to the start of the ASN.1 element. + * On successful completion, \c *p is equal to \p end. + * On error, the value of \c *p is undefined. + * \param end End of data. + * \param bs On success, ::mbedtls_asn1_bitstring information about + * the parsed value. + * + * \return 0 if successful. + * \return #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input contains + * extra data after a valid BIT STRING. + * \return An ASN.1 error code if the input does not start with + * a valid ASN.1 BIT STRING. + */ +int mbedtls_asn1_get_bitstring( unsigned char **p, const unsigned char *end, + mbedtls_asn1_bitstring *bs ); + +/** + * \brief Retrieve a bitstring ASN.1 tag without unused bits and its + * value. + * Updates the pointer to the beginning of the bit/octet string. + * + * \param p On entry, \c *p points to the start of the ASN.1 element. + * On successful completion, \c *p points to the first byte + * of the content of the BIT STRING. + * On error, the value of \c *p is undefined. + * \param end End of data. + * \param len On success, \c *len is the length of the content in bytes. + * + * \return 0 if successful. + * \return #MBEDTLS_ERR_ASN1_INVALID_DATA if the input starts with + * a valid BIT STRING with a nonzero number of unused bits. + * \return An ASN.1 error code if the input does not start with + * a valid ASN.1 BIT STRING. + */ +int mbedtls_asn1_get_bitstring_null( unsigned char **p, + const unsigned char *end, + size_t *len ); + +/** + * \brief Parses and splits an ASN.1 "SEQUENCE OF ". + * Updates the pointer to immediately behind the full sequence tag. + * + * This function allocates memory for the sequence elements. You can free + * the allocated memory with mbedtls_asn1_sequence_free(). + * + * \note On error, this function may return a partial list in \p cur. + * You must set `cur->next = NULL` before calling this function! + * Otherwise it is impossible to distinguish a previously non-null + * pointer from a pointer to an object allocated by this function. + * + * \note If the sequence is empty, this function does not modify + * \c *cur. If the sequence is valid and non-empty, this + * function sets `cur->buf.tag` to \p tag. This allows + * callers to distinguish between an empty sequence and + * a one-element sequence. + * + * \param p On entry, \c *p points to the start of the ASN.1 element. + * On successful completion, \c *p is equal to \p end. + * On error, the value of \c *p is undefined. + * \param end End of data. + * \param cur A ::mbedtls_asn1_sequence which this function fills. + * When this function returns, \c *cur is the head of a linked + * list. Each node in this list is allocated with + * mbedtls_calloc() apart from \p cur itself, and should + * therefore be freed with mbedtls_free(). + * The list describes the content of the sequence. + * The head of the list (i.e. \c *cur itself) describes the + * first element, `*cur->next` describes the second element, etc. + * For each element, `buf.tag == tag`, `buf.len` is the length + * of the content of the content of the element, and `buf.p` + * points to the first byte of the content (i.e. immediately + * past the length of the element). + * Note that list elements may be allocated even on error. + * \param tag Each element of the sequence must have this tag. + * + * \return 0 if successful. + * \return #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input contains + * extra data after a valid SEQUENCE OF \p tag. + * \return #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the input starts with + * an ASN.1 SEQUENCE in which an element has a tag that + * is different from \p tag. + * \return #MBEDTLS_ERR_ASN1_ALLOC_FAILED if a memory allocation failed. + * \return An ASN.1 error code if the input does not start with + * a valid ASN.1 SEQUENCE. + */ +int mbedtls_asn1_get_sequence_of( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_sequence *cur, + int tag ); +/** + * \brief Free a heap-allocated linked list presentation of + * an ASN.1 sequence, including the first element. + * + * There are two common ways to manage the memory used for the representation + * of a parsed ASN.1 sequence: + * - Allocate a head node `mbedtls_asn1_sequence *head` with mbedtls_calloc(). + * Pass this node as the `cur` argument to mbedtls_asn1_get_sequence_of(). + * When you have finished processing the sequence, + * call mbedtls_asn1_sequence_free() on `head`. + * - Allocate a head node `mbedtls_asn1_sequence *head` in any manner, + * for example on the stack. Make sure that `head->next == NULL`. + * Pass `head` as the `cur` argument to mbedtls_asn1_get_sequence_of(). + * When you have finished processing the sequence, + * call mbedtls_asn1_sequence_free() on `head->cur`, + * then free `head` itself in the appropriate manner. + * + * \param seq The address of the first sequence component. This may + * be \c NULL, in which case this functions returns + * immediately. + */ +void mbedtls_asn1_sequence_free( mbedtls_asn1_sequence *seq ); + +/** + * \brief Traverse an ASN.1 SEQUENCE container and + * call a callback for each entry. + * + * This function checks that the input is a SEQUENCE of elements that + * each have a "must" tag, and calls a callback function on the elements + * that have a "may" tag. + * + * For example, to validate that the input is a SEQUENCE of `tag1` and call + * `cb` on each element, use + * ``` + * mbedtls_asn1_traverse_sequence_of(&p, end, 0xff, tag1, 0, 0, cb, ctx); + * ``` + * + * To validate that the input is a SEQUENCE of ANY and call `cb` on + * each element, use + * ``` + * mbedtls_asn1_traverse_sequence_of(&p, end, 0, 0, 0, 0, cb, ctx); + * ``` + * + * To validate that the input is a SEQUENCE of CHOICE {NULL, OCTET STRING} + * and call `cb` on each element that is an OCTET STRING, use + * ``` + * mbedtls_asn1_traverse_sequence_of(&p, end, 0xfe, 0x04, 0xff, 0x04, cb, ctx); + * ``` + * + * The callback is called on the elements with a "may" tag from left to + * right. If the input is not a valid SEQUENCE of elements with a "must" tag, + * the callback is called on the elements up to the leftmost point where + * the input is invalid. + * + * \warning This function is still experimental and may change + * at any time. + * + * \param p The address of the pointer to the beginning of + * the ASN.1 SEQUENCE header. This is updated to + * point to the end of the ASN.1 SEQUENCE container + * on a successful invocation. + * \param end The end of the ASN.1 SEQUENCE container. + * \param tag_must_mask A mask to be applied to the ASN.1 tags found within + * the SEQUENCE before comparing to \p tag_must_value. + * \param tag_must_val The required value of each ASN.1 tag found in the + * SEQUENCE, after masking with \p tag_must_mask. + * Mismatching tags lead to an error. + * For example, a value of \c 0 for both \p tag_must_mask + * and \p tag_must_val means that every tag is allowed, + * while a value of \c 0xFF for \p tag_must_mask means + * that \p tag_must_val is the only allowed tag. + * \param tag_may_mask A mask to be applied to the ASN.1 tags found within + * the SEQUENCE before comparing to \p tag_may_value. + * \param tag_may_val The desired value of each ASN.1 tag found in the + * SEQUENCE, after masking with \p tag_may_mask. + * Mismatching tags will be silently ignored. + * For example, a value of \c 0 for \p tag_may_mask and + * \p tag_may_val means that any tag will be considered, + * while a value of \c 0xFF for \p tag_may_mask means + * that all tags with value different from \p tag_may_val + * will be ignored. + * \param cb The callback to trigger for each component + * in the ASN.1 SEQUENCE that matches \p tag_may_val. + * The callback function is called with the following + * parameters: + * - \p ctx. + * - The tag of the current element. + * - A pointer to the start of the current element's + * content inside the input. + * - The length of the content of the current element. + * If the callback returns a non-zero value, + * the function stops immediately, + * forwarding the callback's return value. + * \param ctx The context to be passed to the callback \p cb. + * + * \return \c 0 if successful the entire ASN.1 SEQUENCE + * was traversed without parsing or callback errors. + * \return #MBEDTLS_ERR_ASN1_LENGTH_MISMATCH if the input + * contains extra data after a valid SEQUENCE + * of elements with an accepted tag. + * \return #MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if the input starts + * with an ASN.1 SEQUENCE in which an element has a tag + * that is not accepted. + * \return An ASN.1 error code if the input does not start with + * a valid ASN.1 SEQUENCE. + * \return A non-zero error code forwarded from the callback + * \p cb in case the latter returns a non-zero value. + */ +int mbedtls_asn1_traverse_sequence_of( + unsigned char **p, + const unsigned char *end, + unsigned char tag_must_mask, unsigned char tag_must_val, + unsigned char tag_may_mask, unsigned char tag_may_val, + int (*cb)( void *ctx, int tag, + unsigned char* start, size_t len ), + void *ctx ); + +#if defined(MBEDTLS_BIGNUM_C) +/** + * \brief Retrieve an integer ASN.1 tag and its value. + * Updates the pointer to immediately behind the full tag. + * + * \param p On entry, \c *p points to the start of the ASN.1 element. + * On successful completion, \c *p points to the first byte + * beyond the ASN.1 element. + * On error, the value of \c *p is undefined. + * \param end End of data. + * \param X On success, the parsed value. + * + * \return 0 if successful. + * \return An ASN.1 error code if the input does not start with + * a valid ASN.1 INTEGER. + * \return #MBEDTLS_ERR_ASN1_INVALID_LENGTH if the parsed value does + * not fit in an \c int. + * \return An MPI error code if the parsed value is too large. + */ +int mbedtls_asn1_get_mpi( unsigned char **p, + const unsigned char *end, + mbedtls_mpi *X ); +#endif /* MBEDTLS_BIGNUM_C */ + +/** + * \brief Retrieve an AlgorithmIdentifier ASN.1 sequence. + * Updates the pointer to immediately behind the full + * AlgorithmIdentifier. + * + * \param p On entry, \c *p points to the start of the ASN.1 element. + * On successful completion, \c *p points to the first byte + * beyond the AlgorithmIdentifier element. + * On error, the value of \c *p is undefined. + * \param end End of data. + * \param alg The buffer to receive the OID. + * \param params The buffer to receive the parameters. + * This is zeroized if there are no parameters. + * + * \return 0 if successful or a specific ASN.1 or MPI error code. + */ +int mbedtls_asn1_get_alg( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_buf *alg, mbedtls_asn1_buf *params ); + +/** + * \brief Retrieve an AlgorithmIdentifier ASN.1 sequence with NULL or no + * params. + * Updates the pointer to immediately behind the full + * AlgorithmIdentifier. + * + * \param p On entry, \c *p points to the start of the ASN.1 element. + * On successful completion, \c *p points to the first byte + * beyond the AlgorithmIdentifier element. + * On error, the value of \c *p is undefined. + * \param end End of data. + * \param alg The buffer to receive the OID. + * + * \return 0 if successful or a specific ASN.1 or MPI error code. + */ +int mbedtls_asn1_get_alg_null( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_buf *alg ); + +/** + * \brief Find a specific named_data entry in a sequence or list based on + * the OID. + * + * \param list The list to seek through + * \param oid The OID to look for + * \param len Size of the OID + * + * \return NULL if not found, or a pointer to the existing entry. + */ +const mbedtls_asn1_named_data *mbedtls_asn1_find_named_data( const mbedtls_asn1_named_data *list, + const char *oid, size_t len ); + +/** + * \brief Free a mbedtls_asn1_named_data entry + * + * \param entry The named data entry to free. + * This function calls mbedtls_free() on + * `entry->oid.p` and `entry->val.p`. + */ +void mbedtls_asn1_free_named_data( mbedtls_asn1_named_data *entry ); + +/** + * \brief Free all entries in a mbedtls_asn1_named_data list. + * + * \param head Pointer to the head of the list of named data entries to free. + * This function calls mbedtls_asn1_free_named_data() and + * mbedtls_free() on each list element and + * sets \c *head to \c NULL. + */ +void mbedtls_asn1_free_named_data_list( mbedtls_asn1_named_data **head ); + +#ifdef __cplusplus +} +#endif + +#endif /* asn1.h */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/bignum.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/bignum.h new file mode 100644 index 0000000..5187d86 --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/bignum.h @@ -0,0 +1,1021 @@ +/** + * \file bignum.h + * + * \brief Multi-precision integer library + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBEDTLS_BIGNUM_H +#define MBEDTLS_BIGNUM_H +#include "mbedtls/private_access.h" + +#include "mbedtls/build_info.h" + +#include +#include + +#if defined(MBEDTLS_FS_IO) +#include +#endif + +#define MBEDTLS_ERR_MPI_FILE_IO_ERROR -0x0002 /**< An error occurred while reading from or writing to a file. */ +#define MBEDTLS_ERR_MPI_BAD_INPUT_DATA -0x0004 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_MPI_INVALID_CHARACTER -0x0006 /**< There is an invalid character in the digit string. */ +#define MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL -0x0008 /**< The buffer is too small to write to. */ +#define MBEDTLS_ERR_MPI_NEGATIVE_VALUE -0x000A /**< The input arguments are negative or result in illegal output. */ +#define MBEDTLS_ERR_MPI_DIVISION_BY_ZERO -0x000C /**< The input argument for division is zero, which is not allowed. */ +#define MBEDTLS_ERR_MPI_NOT_ACCEPTABLE -0x000E /**< The input arguments are not acceptable. */ +#define MBEDTLS_ERR_MPI_ALLOC_FAILED -0x0010 /**< Memory allocation failed. */ + +#define MBEDTLS_MPI_CHK(f) \ + do \ + { \ + if( ( ret = (f) ) != 0 ) \ + goto cleanup; \ + } while( 0 ) + +/* + * Maximum size MPIs are allowed to grow to in number of limbs. + */ +#define MBEDTLS_MPI_MAX_LIMBS 10000 + +#if !defined(MBEDTLS_MPI_WINDOW_SIZE) +/* + * Maximum window size used for modular exponentiation. Default: 6 + * Minimum value: 1. Maximum value: 6. + * + * Result is an array of ( 2 ** MBEDTLS_MPI_WINDOW_SIZE ) MPIs used + * for the sliding window calculation. (So 64 by default) + * + * Reduction in size, reduces speed. + */ +#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum window size used. */ +#endif /* !MBEDTLS_MPI_WINDOW_SIZE */ + +#if !defined(MBEDTLS_MPI_MAX_SIZE) +/* + * Maximum size of MPIs allowed in bits and bytes for user-MPIs. + * ( Default: 512 bytes => 4096 bits, Maximum tested: 2048 bytes => 16384 bits ) + * + * Note: Calculations can temporarily result in larger MPIs. So the number + * of limbs required (MBEDTLS_MPI_MAX_LIMBS) is higher. + */ +#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */ +#endif /* !MBEDTLS_MPI_MAX_SIZE */ + +#define MBEDTLS_MPI_MAX_BITS ( 8 * MBEDTLS_MPI_MAX_SIZE ) /**< Maximum number of bits for usable MPIs. */ + +/* + * When reading from files with mbedtls_mpi_read_file() and writing to files with + * mbedtls_mpi_write_file() the buffer should have space + * for a (short) label, the MPI (in the provided radix), the newline + * characters and the '\0'. + * + * By default we assume at least a 10 char label, a minimum radix of 10 + * (decimal) and a maximum of 4096 bit numbers (1234 decimal chars). + * Autosized at compile time for at least a 10 char label, a minimum radix + * of 10 (decimal) for a number of MBEDTLS_MPI_MAX_BITS size. + * + * This used to be statically sized to 1250 for a maximum of 4096 bit + * numbers (1234 decimal chars). + * + * Calculate using the formula: + * MBEDTLS_MPI_RW_BUFFER_SIZE = ceil(MBEDTLS_MPI_MAX_BITS / ln(10) * ln(2)) + + * LabelSize + 6 + */ +#define MBEDTLS_MPI_MAX_BITS_SCALE100 ( 100 * MBEDTLS_MPI_MAX_BITS ) +#define MBEDTLS_LN_2_DIV_LN_10_SCALE100 332 +#define MBEDTLS_MPI_RW_BUFFER_SIZE ( ((MBEDTLS_MPI_MAX_BITS_SCALE100 + MBEDTLS_LN_2_DIV_LN_10_SCALE100 - 1) / MBEDTLS_LN_2_DIV_LN_10_SCALE100) + 10 + 6 ) + +/* + * Define the base integer type, architecture-wise. + * + * 32 or 64-bit integer types can be forced regardless of the underlying + * architecture by defining MBEDTLS_HAVE_INT32 or MBEDTLS_HAVE_INT64 + * respectively and undefining MBEDTLS_HAVE_ASM. + * + * Double-width integers (e.g. 128-bit in 64-bit architectures) can be + * disabled by defining MBEDTLS_NO_UDBL_DIVISION. + */ +#if !defined(MBEDTLS_HAVE_INT32) + #if defined(_MSC_VER) && defined(_M_AMD64) + /* Always choose 64-bit when using MSC */ + #if !defined(MBEDTLS_HAVE_INT64) + #define MBEDTLS_HAVE_INT64 + #endif /* !MBEDTLS_HAVE_INT64 */ + typedef int64_t mbedtls_mpi_sint; + typedef uint64_t mbedtls_mpi_uint; + #elif defined(__GNUC__) && ( \ + defined(__amd64__) || defined(__x86_64__) || \ + defined(__ppc64__) || defined(__powerpc64__) || \ + defined(__ia64__) || defined(__alpha__) || \ + ( defined(__sparc__) && defined(__arch64__) ) || \ + defined(__s390x__) || defined(__mips64) || \ + defined(__aarch64__) ) + #if !defined(MBEDTLS_HAVE_INT64) + #define MBEDTLS_HAVE_INT64 + #endif /* MBEDTLS_HAVE_INT64 */ + typedef int64_t mbedtls_mpi_sint; + typedef uint64_t mbedtls_mpi_uint; + #if !defined(MBEDTLS_NO_UDBL_DIVISION) + /* mbedtls_t_udbl defined as 128-bit unsigned int */ + typedef unsigned int mbedtls_t_udbl __attribute__((mode(TI))); + #define MBEDTLS_HAVE_UDBL + #endif /* !MBEDTLS_NO_UDBL_DIVISION */ + #elif defined(__ARMCC_VERSION) && defined(__aarch64__) + /* + * __ARMCC_VERSION is defined for both armcc and armclang and + * __aarch64__ is only defined by armclang when compiling 64-bit code + */ + #if !defined(MBEDTLS_HAVE_INT64) + #define MBEDTLS_HAVE_INT64 + #endif /* !MBEDTLS_HAVE_INT64 */ + typedef int64_t mbedtls_mpi_sint; + typedef uint64_t mbedtls_mpi_uint; + #if !defined(MBEDTLS_NO_UDBL_DIVISION) + /* mbedtls_t_udbl defined as 128-bit unsigned int */ + typedef __uint128_t mbedtls_t_udbl; + #define MBEDTLS_HAVE_UDBL + #endif /* !MBEDTLS_NO_UDBL_DIVISION */ + #elif defined(MBEDTLS_HAVE_INT64) + /* Force 64-bit integers with unknown compiler */ + typedef int64_t mbedtls_mpi_sint; + typedef uint64_t mbedtls_mpi_uint; + #endif +#endif /* !MBEDTLS_HAVE_INT32 */ + +#if !defined(MBEDTLS_HAVE_INT64) + /* Default to 32-bit compilation */ + #if !defined(MBEDTLS_HAVE_INT32) + #define MBEDTLS_HAVE_INT32 + #endif /* !MBEDTLS_HAVE_INT32 */ + typedef int32_t mbedtls_mpi_sint; + typedef uint32_t mbedtls_mpi_uint; + #if !defined(MBEDTLS_NO_UDBL_DIVISION) + typedef uint64_t mbedtls_t_udbl; + #define MBEDTLS_HAVE_UDBL + #endif /* !MBEDTLS_NO_UDBL_DIVISION */ +#endif /* !MBEDTLS_HAVE_INT64 */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief MPI structure + */ +typedef struct mbedtls_mpi +{ + int MBEDTLS_PRIVATE(s); /*!< Sign: -1 if the mpi is negative, 1 otherwise */ + size_t MBEDTLS_PRIVATE(n); /*!< total # of limbs */ + mbedtls_mpi_uint *MBEDTLS_PRIVATE(p); /*!< pointer to limbs */ +} +mbedtls_mpi; + +/** + * \brief Initialize an MPI context. + * + * This makes the MPI ready to be set or freed, + * but does not define a value for the MPI. + * + * \param X The MPI context to initialize. This must not be \c NULL. + */ +void mbedtls_mpi_init( mbedtls_mpi *X ); + +/** + * \brief This function frees the components of an MPI context. + * + * \param X The MPI context to be cleared. This may be \c NULL, + * in which case this function is a no-op. If it is + * not \c NULL, it must point to an initialized MPI. + */ +void mbedtls_mpi_free( mbedtls_mpi *X ); + +/** + * \brief Enlarge an MPI to the specified number of limbs. + * + * \note This function does nothing if the MPI is + * already large enough. + * + * \param X The MPI to grow. It must be initialized. + * \param nblimbs The target number of limbs. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_mpi_grow( mbedtls_mpi *X, size_t nblimbs ); + +/** + * \brief This function resizes an MPI downwards, keeping at least the + * specified number of limbs. + * + * If \c X is smaller than \c nblimbs, it is resized up + * instead. + * + * \param X The MPI to shrink. This must point to an initialized MPI. + * \param nblimbs The minimum number of limbs to keep. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed + * (this can only happen when resizing up). + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_mpi_shrink( mbedtls_mpi *X, size_t nblimbs ); + +/** + * \brief Make a copy of an MPI. + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param Y The source MPI. This must point to an initialized MPI. + * + * \note The limb-buffer in the destination MPI is enlarged + * if necessary to hold the value in the source MPI. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_mpi_copy( mbedtls_mpi *X, const mbedtls_mpi *Y ); + +/** + * \brief Swap the contents of two MPIs. + * + * \param X The first MPI. It must be initialized. + * \param Y The second MPI. It must be initialized. + */ +void mbedtls_mpi_swap( mbedtls_mpi *X, mbedtls_mpi *Y ); + +/** + * \brief Perform a safe conditional copy of MPI which doesn't + * reveal whether the condition was true or not. + * + * \param X The MPI to conditionally assign to. This must point + * to an initialized MPI. + * \param Y The MPI to be assigned from. This must point to an + * initialized MPI. + * \param assign The condition deciding whether to perform the + * assignment or not. Possible values: + * * \c 1: Perform the assignment `X = Y`. + * * \c 0: Keep the original value of \p X. + * + * \note This function is equivalent to + * `if( assign ) mbedtls_mpi_copy( X, Y );` + * except that it avoids leaking any information about whether + * the assignment was done or not (the above code may leak + * information through branch prediction and/or memory access + * patterns analysis). + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_mpi_safe_cond_assign( mbedtls_mpi *X, const mbedtls_mpi *Y, unsigned char assign ); + +/** + * \brief Perform a safe conditional swap which doesn't + * reveal whether the condition was true or not. + * + * \param X The first MPI. This must be initialized. + * \param Y The second MPI. This must be initialized. + * \param assign The condition deciding whether to perform + * the swap or not. Possible values: + * * \c 1: Swap the values of \p X and \p Y. + * * \c 0: Keep the original values of \p X and \p Y. + * + * \note This function is equivalent to + * if( assign ) mbedtls_mpi_swap( X, Y ); + * except that it avoids leaking any information about whether + * the assignment was done or not (the above code may leak + * information through branch prediction and/or memory access + * patterns analysis). + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed. + * \return Another negative error code on other kinds of failure. + * + */ +int mbedtls_mpi_safe_cond_swap( mbedtls_mpi *X, mbedtls_mpi *Y, unsigned char assign ); + +/** + * \brief Store integer value in MPI. + * + * \param X The MPI to set. This must be initialized. + * \param z The value to use. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_mpi_lset( mbedtls_mpi *X, mbedtls_mpi_sint z ); + +/** + * \brief Get a specific bit from an MPI. + * + * \param X The MPI to query. This must be initialized. + * \param pos Zero-based index of the bit to query. + * + * \return \c 0 or \c 1 on success, depending on whether bit \c pos + * of \c X is unset or set. + * \return A negative error code on failure. + */ +int mbedtls_mpi_get_bit( const mbedtls_mpi *X, size_t pos ); + +/** + * \brief Modify a specific bit in an MPI. + * + * \note This function will grow the target MPI if necessary to set a + * bit to \c 1 in a not yet existing limb. It will not grow if + * the bit should be set to \c 0. + * + * \param X The MPI to modify. This must be initialized. + * \param pos Zero-based index of the bit to modify. + * \param val The desired value of bit \c pos: \c 0 or \c 1. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_mpi_set_bit( mbedtls_mpi *X, size_t pos, unsigned char val ); + +/** + * \brief Return the number of bits of value \c 0 before the + * least significant bit of value \c 1. + * + * \note This is the same as the zero-based index of + * the least significant bit of value \c 1. + * + * \param X The MPI to query. + * + * \return The number of bits of value \c 0 before the least significant + * bit of value \c 1 in \p X. + */ +size_t mbedtls_mpi_lsb( const mbedtls_mpi *X ); + +/** + * \brief Return the number of bits up to and including the most + * significant bit of value \c 1. + * + * * \note This is same as the one-based index of the most + * significant bit of value \c 1. + * + * \param X The MPI to query. This must point to an initialized MPI. + * + * \return The number of bits up to and including the most + * significant bit of value \c 1. + */ +size_t mbedtls_mpi_bitlen( const mbedtls_mpi *X ); + +/** + * \brief Return the total size of an MPI value in bytes. + * + * \param X The MPI to use. This must point to an initialized MPI. + * + * \note The value returned by this function may be less than + * the number of bytes used to store \p X internally. + * This happens if and only if there are trailing bytes + * of value zero. + * + * \return The least number of bytes capable of storing + * the absolute value of \p X. + */ +size_t mbedtls_mpi_size( const mbedtls_mpi *X ); + +/** + * \brief Import an MPI from an ASCII string. + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param radix The numeric base of the input string. + * \param s Null-terminated string buffer. + * + * \return \c 0 if successful. + * \return A negative error code on failure. + */ +int mbedtls_mpi_read_string( mbedtls_mpi *X, int radix, const char *s ); + +/** + * \brief Export an MPI to an ASCII string. + * + * \param X The source MPI. This must point to an initialized MPI. + * \param radix The numeric base of the output string. + * \param buf The buffer to write the string to. This must be writable + * buffer of length \p buflen Bytes. + * \param buflen The available size in Bytes of \p buf. + * \param olen The address at which to store the length of the string + * written, including the final \c NULL byte. This must + * not be \c NULL. + * + * \note You can call this function with `buflen == 0` to obtain the + * minimum required buffer size in `*olen`. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if the target buffer \p buf + * is too small to hold the value of \p X in the desired base. + * In this case, `*olen` is nonetheless updated to contain the + * size of \p buf required for a successful call. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_write_string( const mbedtls_mpi *X, int radix, + char *buf, size_t buflen, size_t *olen ); + +#if defined(MBEDTLS_FS_IO) +/** + * \brief Read an MPI from a line in an opened file. + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param radix The numeric base of the string representation used + * in the source line. + * \param fin The input file handle to use. This must not be \c NULL. + * + * \note On success, this function advances the file stream + * to the end of the current line or to EOF. + * + * The function returns \c 0 on an empty line. + * + * Leading whitespaces are ignored, as is a + * '0x' prefix for radix \c 16. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if the file read buffer + * is too small. + * \return Another negative error code on failure. + */ +int mbedtls_mpi_read_file( mbedtls_mpi *X, int radix, FILE *fin ); + +/** + * \brief Export an MPI into an opened file. + * + * \param p A string prefix to emit prior to the MPI data. + * For example, this might be a label, or "0x" when + * printing in base \c 16. This may be \c NULL if no prefix + * is needed. + * \param X The source MPI. This must point to an initialized MPI. + * \param radix The numeric base to be used in the emitted string. + * \param fout The output file handle. This may be \c NULL, in which case + * the output is written to \c stdout. + * + * \return \c 0 if successful. + * \return A negative error code on failure. + */ +int mbedtls_mpi_write_file( const char *p, const mbedtls_mpi *X, + int radix, FILE *fout ); +#endif /* MBEDTLS_FS_IO */ + +/** + * \brief Import an MPI from unsigned big endian binary data. + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param buf The input buffer. This must be a readable buffer of length + * \p buflen Bytes. + * \param buflen The length of the input buffer \p p in Bytes. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf, + size_t buflen ); + +/** + * \brief Import X from unsigned binary data, little endian + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param buf The input buffer. This must be a readable buffer of length + * \p buflen Bytes. + * \param buflen The length of the input buffer \p p in Bytes. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_read_binary_le( mbedtls_mpi *X, + const unsigned char *buf, size_t buflen ); + +/** + * \brief Export X into unsigned binary data, big endian. + * Always fills the whole buffer, which will start with zeros + * if the number is smaller. + * + * \param X The source MPI. This must point to an initialized MPI. + * \param buf The output buffer. This must be a writable buffer of length + * \p buflen Bytes. + * \param buflen The size of the output buffer \p buf in Bytes. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if \p buf isn't + * large enough to hold the value of \p X. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_write_binary( const mbedtls_mpi *X, unsigned char *buf, + size_t buflen ); + +/** + * \brief Export X into unsigned binary data, little endian. + * Always fills the whole buffer, which will end with zeros + * if the number is smaller. + * + * \param X The source MPI. This must point to an initialized MPI. + * \param buf The output buffer. This must be a writable buffer of length + * \p buflen Bytes. + * \param buflen The size of the output buffer \p buf in Bytes. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if \p buf isn't + * large enough to hold the value of \p X. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_write_binary_le( const mbedtls_mpi *X, + unsigned char *buf, size_t buflen ); + +/** + * \brief Perform a left-shift on an MPI: X <<= count + * + * \param X The MPI to shift. This must point to an initialized MPI. + * \param count The number of bits to shift by. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_shift_l( mbedtls_mpi *X, size_t count ); + +/** + * \brief Perform a right-shift on an MPI: X >>= count + * + * \param X The MPI to shift. This must point to an initialized MPI. + * \param count The number of bits to shift by. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_shift_r( mbedtls_mpi *X, size_t count ); + +/** + * \brief Compare the absolute values of two MPIs. + * + * \param X The left-hand MPI. This must point to an initialized MPI. + * \param Y The right-hand MPI. This must point to an initialized MPI. + * + * \return \c 1 if `|X|` is greater than `|Y|`. + * \return \c -1 if `|X|` is lesser than `|Y|`. + * \return \c 0 if `|X|` is equal to `|Y|`. + */ +int mbedtls_mpi_cmp_abs( const mbedtls_mpi *X, const mbedtls_mpi *Y ); + +/** + * \brief Compare two MPIs. + * + * \param X The left-hand MPI. This must point to an initialized MPI. + * \param Y The right-hand MPI. This must point to an initialized MPI. + * + * \return \c 1 if \p X is greater than \p Y. + * \return \c -1 if \p X is lesser than \p Y. + * \return \c 0 if \p X is equal to \p Y. + */ +int mbedtls_mpi_cmp_mpi( const mbedtls_mpi *X, const mbedtls_mpi *Y ); + +/** + * \brief Check if an MPI is less than the other in constant time. + * + * \param X The left-hand MPI. This must point to an initialized MPI + * with the same allocated length as Y. + * \param Y The right-hand MPI. This must point to an initialized MPI + * with the same allocated length as X. + * \param ret The result of the comparison: + * \c 1 if \p X is less than \p Y. + * \c 0 if \p X is greater than or equal to \p Y. + * + * \return 0 on success. + * \return MBEDTLS_ERR_MPI_BAD_INPUT_DATA if the allocated length of + * the two input MPIs is not the same. + */ +int mbedtls_mpi_lt_mpi_ct( const mbedtls_mpi *X, const mbedtls_mpi *Y, + unsigned *ret ); + +/** + * \brief Compare an MPI with an integer. + * + * \param X The left-hand MPI. This must point to an initialized MPI. + * \param z The integer value to compare \p X to. + * + * \return \c 1 if \p X is greater than \p z. + * \return \c -1 if \p X is lesser than \p z. + * \return \c 0 if \p X is equal to \p z. + */ +int mbedtls_mpi_cmp_int( const mbedtls_mpi *X, mbedtls_mpi_sint z ); + +/** + * \brief Perform an unsigned addition of MPIs: X = |A| + |B| + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param A The first summand. This must point to an initialized MPI. + * \param B The second summand. This must point to an initialized MPI. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_add_abs( mbedtls_mpi *X, const mbedtls_mpi *A, + const mbedtls_mpi *B ); + +/** + * \brief Perform an unsigned subtraction of MPIs: X = |A| - |B| + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param A The minuend. This must point to an initialized MPI. + * \param B The subtrahend. This must point to an initialized MPI. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_NEGATIVE_VALUE if \p B is greater than \p A. + * \return Another negative error code on different kinds of failure. + * + */ +int mbedtls_mpi_sub_abs( mbedtls_mpi *X, const mbedtls_mpi *A, + const mbedtls_mpi *B ); + +/** + * \brief Perform a signed addition of MPIs: X = A + B + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param A The first summand. This must point to an initialized MPI. + * \param B The second summand. This must point to an initialized MPI. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_add_mpi( mbedtls_mpi *X, const mbedtls_mpi *A, + const mbedtls_mpi *B ); + +/** + * \brief Perform a signed subtraction of MPIs: X = A - B + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param A The minuend. This must point to an initialized MPI. + * \param B The subtrahend. This must point to an initialized MPI. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_sub_mpi( mbedtls_mpi *X, const mbedtls_mpi *A, + const mbedtls_mpi *B ); + +/** + * \brief Perform a signed addition of an MPI and an integer: X = A + b + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param A The first summand. This must point to an initialized MPI. + * \param b The second summand. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_add_int( mbedtls_mpi *X, const mbedtls_mpi *A, + mbedtls_mpi_sint b ); + +/** + * \brief Perform a signed subtraction of an MPI and an integer: + * X = A - b + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param A The minuend. This must point to an initialized MPI. + * \param b The subtrahend. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_sub_int( mbedtls_mpi *X, const mbedtls_mpi *A, + mbedtls_mpi_sint b ); + +/** + * \brief Perform a multiplication of two MPIs: X = A * B + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param A The first factor. This must point to an initialized MPI. + * \param B The second factor. This must point to an initialized MPI. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return Another negative error code on different kinds of failure. + * + */ +int mbedtls_mpi_mul_mpi( mbedtls_mpi *X, const mbedtls_mpi *A, + const mbedtls_mpi *B ); + +/** + * \brief Perform a multiplication of an MPI with an unsigned integer: + * X = A * b + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param A The first factor. This must point to an initialized MPI. + * \param b The second factor. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return Another negative error code on different kinds of failure. + * + */ +int mbedtls_mpi_mul_int( mbedtls_mpi *X, const mbedtls_mpi *A, + mbedtls_mpi_uint b ); + +/** + * \brief Perform a division with remainder of two MPIs: + * A = Q * B + R + * + * \param Q The destination MPI for the quotient. + * This may be \c NULL if the value of the + * quotient is not needed. + * \param R The destination MPI for the remainder value. + * This may be \c NULL if the value of the + * remainder is not needed. + * \param A The dividend. This must point to an initialized MPi. + * \param B The divisor. This must point to an initialized MPI. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed. + * \return #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p B equals zero. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_div_mpi( mbedtls_mpi *Q, mbedtls_mpi *R, const mbedtls_mpi *A, + const mbedtls_mpi *B ); + +/** + * \brief Perform a division with remainder of an MPI by an integer: + * A = Q * b + R + * + * \param Q The destination MPI for the quotient. + * This may be \c NULL if the value of the + * quotient is not needed. + * \param R The destination MPI for the remainder value. + * This may be \c NULL if the value of the + * remainder is not needed. + * \param A The dividend. This must point to an initialized MPi. + * \param b The divisor. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed. + * \return #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p b equals zero. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_div_int( mbedtls_mpi *Q, mbedtls_mpi *R, const mbedtls_mpi *A, + mbedtls_mpi_sint b ); + +/** + * \brief Perform a modular reduction. R = A mod B + * + * \param R The destination MPI for the residue value. + * This must point to an initialized MPI. + * \param A The MPI to compute the residue of. + * This must point to an initialized MPI. + * \param B The base of the modular reduction. + * This must point to an initialized MPI. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p B equals zero. + * \return #MBEDTLS_ERR_MPI_NEGATIVE_VALUE if \p B is negative. + * \return Another negative error code on different kinds of failure. + * + */ +int mbedtls_mpi_mod_mpi( mbedtls_mpi *R, const mbedtls_mpi *A, + const mbedtls_mpi *B ); + +/** + * \brief Perform a modular reduction with respect to an integer. + * r = A mod b + * + * \param r The address at which to store the residue. + * This must not be \c NULL. + * \param A The MPI to compute the residue of. + * This must point to an initialized MPi. + * \param b The integer base of the modular reduction. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p b equals zero. + * \return #MBEDTLS_ERR_MPI_NEGATIVE_VALUE if \p b is negative. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A, + mbedtls_mpi_sint b ); + +/** + * \brief Perform a sliding-window exponentiation: X = A^E mod N + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param A The base of the exponentiation. + * This must point to an initialized MPI. + * \param E The exponent MPI. This must point to an initialized MPI. + * \param N The base for the modular reduction. This must point to an + * initialized MPI. + * \param _RR A helper MPI depending solely on \p N which can be used to + * speed-up multiple modular exponentiations for the same value + * of \p N. This may be \c NULL. If it is not \c NULL, it must + * point to an initialized MPI. If it hasn't been used after + * the call to mbedtls_mpi_init(), this function will compute + * the helper value and store it in \p _RR for reuse on + * subsequent calls to this function. Otherwise, the function + * will assume that \p _RR holds the helper value set by a + * previous call to mbedtls_mpi_exp_mod(), and reuse it. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \c N is negative or + * even, or if \c E is negative. + * \return Another negative error code on different kinds of failures. + * + */ +int mbedtls_mpi_exp_mod( mbedtls_mpi *X, const mbedtls_mpi *A, + const mbedtls_mpi *E, const mbedtls_mpi *N, + mbedtls_mpi *_RR ); + +/** + * \brief Fill an MPI with a number of random bytes. + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param size The number of random bytes to generate. + * \param f_rng The RNG function to use. This must not be \c NULL. + * \param p_rng The RNG parameter to be passed to \p f_rng. This may be + * \c NULL if \p f_rng doesn't need a context argument. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return Another negative error code on failure. + * + * \note The bytes obtained from the RNG are interpreted + * as a big-endian representation of an MPI; this can + * be relevant in applications like deterministic ECDSA. + */ +int mbedtls_mpi_fill_random( mbedtls_mpi *X, size_t size, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** Generate a random number uniformly in a range. + * + * This function generates a random number between \p min inclusive and + * \p N exclusive. + * + * The procedure complies with RFC 6979 §3.3 (deterministic ECDSA) + * when the RNG is a suitably parametrized instance of HMAC_DRBG + * and \p min is \c 1. + * + * \note There are `N - min` possible outputs. The lower bound + * \p min can be reached, but the upper bound \p N cannot. + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param min The minimum value to return. + * It must be nonnegative. + * \param N The upper bound of the range, exclusive. + * In other words, this is one plus the maximum value to return. + * \p N must be strictly larger than \p min. + * \param f_rng The RNG function to use. This must not be \c NULL. + * \param p_rng The RNG parameter to be passed to \p f_rng. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \p min or \p N is invalid + * or if they are incompatible. + * \return #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if the implementation was + * unable to find a suitable value within a limited number + * of attempts. This has a negligible probability if \p N + * is significantly larger than \p min, which is the case + * for all usual cryptographic applications. + * \return Another negative error code on failure. + */ +int mbedtls_mpi_random( mbedtls_mpi *X, + mbedtls_mpi_sint min, + const mbedtls_mpi *N, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Compute the greatest common divisor: G = gcd(A, B) + * + * \param G The destination MPI. This must point to an initialized MPI. + * \param A The first operand. This must point to an initialized MPI. + * \param B The second operand. This must point to an initialized MPI. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_mpi_gcd( mbedtls_mpi *G, const mbedtls_mpi *A, + const mbedtls_mpi *B ); + +/** + * \brief Compute the modular inverse: X = A^-1 mod N + * + * \param X The destination MPI. This must point to an initialized MPI. + * \param A The MPI to calculate the modular inverse of. This must point + * to an initialized MPI. + * \param N The base of the modular inversion. This must point to an + * initialized MPI. + * + * \return \c 0 if successful. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \p N is less than + * or equal to one. + * \return #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if \p has no modular inverse + * with respect to \p N. + */ +int mbedtls_mpi_inv_mod( mbedtls_mpi *X, const mbedtls_mpi *A, + const mbedtls_mpi *N ); + +/** + * \brief Miller-Rabin primality test. + * + * \warning If \p X is potentially generated by an adversary, for example + * when validating cryptographic parameters that you didn't + * generate yourself and that are supposed to be prime, then + * \p rounds should be at least the half of the security + * strength of the cryptographic algorithm. On the other hand, + * if \p X is chosen uniformly or non-adversially (as is the + * case when mbedtls_mpi_gen_prime calls this function), then + * \p rounds can be much lower. + * + * \param X The MPI to check for primality. + * This must point to an initialized MPI. + * \param rounds The number of bases to perform the Miller-Rabin primality + * test for. The probability of returning 0 on a composite is + * at most 2-2*\p rounds. + * \param f_rng The RNG function to use. This must not be \c NULL. + * \param p_rng The RNG parameter to be passed to \p f_rng. + * This may be \c NULL if \p f_rng doesn't use + * a context parameter. + * + * \return \c 0 if successful, i.e. \p X is probably prime. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if \p X is not prime. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_mpi_is_prime_ext( const mbedtls_mpi *X, int rounds, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); +/** + * \brief Flags for mbedtls_mpi_gen_prime() + * + * Each of these flags is a constraint on the result X returned by + * mbedtls_mpi_gen_prime(). + */ +typedef enum { + MBEDTLS_MPI_GEN_PRIME_FLAG_DH = 0x0001, /**< (X-1)/2 is prime too */ + MBEDTLS_MPI_GEN_PRIME_FLAG_LOW_ERR = 0x0002, /**< lower error rate from 2-80 to 2-128 */ +} mbedtls_mpi_gen_prime_flag_t; + +/** + * \brief Generate a prime number. + * + * \param X The destination MPI to store the generated prime in. + * This must point to an initialized MPi. + * \param nbits The required size of the destination MPI in bits. + * This must be between \c 3 and #MBEDTLS_MPI_MAX_BITS. + * \param flags A mask of flags of type #mbedtls_mpi_gen_prime_flag_t. + * \param f_rng The RNG function to use. This must not be \c NULL. + * \param p_rng The RNG parameter to be passed to \p f_rng. + * This may be \c NULL if \p f_rng doesn't use + * a context parameter. + * + * \return \c 0 if successful, in which case \p X holds a + * probably prime number. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed. + * \return #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if `nbits` is not between + * \c 3 and #MBEDTLS_MPI_MAX_BITS. + */ +int mbedtls_mpi_gen_prime( mbedtls_mpi *X, size_t nbits, int flags, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +#if defined(MBEDTLS_SELF_TEST) + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mbedtls_mpi_self_test( int verbose ); + +#endif /* MBEDTLS_SELF_TEST */ + +#ifdef __cplusplus +} +#endif + +#endif /* bignum.h */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/build_info.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/build_info.h new file mode 100644 index 0000000..23f85ba --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/build_info.h @@ -0,0 +1,83 @@ +/** + * \file build_info.h + * + * \brief Build-time configuration info + * + * Include this file if you need to depend on the + * configuration options defined in mbedtls_config.h or MBEDTLS_CONFIG_FILE + */ + /* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_BUILD_INFO_H +#define MBEDTLS_BUILD_INFO_H + +/* + * This set of compile-time defines can be used to determine the version number + * of the Mbed TLS library used. Run-time variables for the same can be found in + * version.h + */ + +/** + * The version number x.y.z is split into three parts. + * Major, Minor, Patchlevel + */ +#define MBEDTLS_VERSION_MAJOR 3 +#define MBEDTLS_VERSION_MINOR 0 +#define MBEDTLS_VERSION_PATCH 0 + +/** + * The single version number has the following structure: + * MMNNPP00 + * Major version | Minor version | Patch version + */ +#define MBEDTLS_VERSION_NUMBER 0x03000000 +#define MBEDTLS_VERSION_STRING "3.0.0" +#define MBEDTLS_VERSION_STRING_FULL "mbed TLS 3.0.0" + +#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE) +#define _CRT_SECURE_NO_DEPRECATE 1 +#endif + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/mbedtls_config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#if defined(MBEDTLS_CONFIG_VERSION) && ( \ + MBEDTLS_CONFIG_VERSION < 0x03000000 || \ + MBEDTLS_CONFIG_VERSION > MBEDTLS_VERSION_NUMBER ) +#error "Invalid config version, defined value of MBEDTLS_CONFIG_VERSION is unsupported" +#endif + +/* Target and application specific configurations + * + * Allow user to override any previous default. + * + */ +#if defined(MBEDTLS_USER_CONFIG_FILE) +#include MBEDTLS_USER_CONFIG_FILE +#endif + +#if defined(MBEDTLS_PSA_CRYPTO_CONFIG) +#include "mbedtls/config_psa.h" +#endif + +#include "mbedtls/check_config.h" + +#endif /* MBEDTLS_BUILD_INFO_H */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/check_config.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/check_config.h new file mode 100644 index 0000000..e38892d --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/check_config.h @@ -0,0 +1,838 @@ +/** + * \file check_config.h + * + * \brief Consistency checks for configuration options + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_CHECK_CONFIG_H +#define MBEDTLS_CHECK_CONFIG_H + +/* + * We assume CHAR_BIT is 8 in many places. In practice, this is true on our + * target platforms, so not an issue, but let's just be extra sure. + */ +#include +#if CHAR_BIT != 8 +#error "mbed TLS requires a platform with 8-bit chars" +#endif + +#if defined(_WIN32) +#if !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_C is required on Windows" +#endif + +/* Fix the config here. Not convenient to put an #ifdef _WIN32 in mbedtls_config.h as + * it would confuse config.py. */ +#if !defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) && \ + !defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) +#define MBEDTLS_PLATFORM_SNPRINTF_ALT +#endif + +#if !defined(MBEDTLS_PLATFORM_VSNPRINTF_ALT) && \ + !defined(MBEDTLS_PLATFORM_VSNPRINTF_MACRO) +#define MBEDTLS_PLATFORM_VSNPRINTF_ALT +#endif +#endif /* _WIN32 */ + +#if defined(TARGET_LIKE_MBED) && defined(MBEDTLS_NET_C) +#error "The NET module is not available for mbed OS - please use the network functions provided by Mbed OS" +#endif + +#if defined(MBEDTLS_DEPRECATED_WARNING) && \ + !defined(__GNUC__) && !defined(__clang__) +#error "MBEDTLS_DEPRECATED_WARNING only works with GCC and Clang" +#endif + +#if defined(MBEDTLS_HAVE_TIME_DATE) && !defined(MBEDTLS_HAVE_TIME) +#error "MBEDTLS_HAVE_TIME_DATE without MBEDTLS_HAVE_TIME does not make sense" +#endif + +#if defined(MBEDTLS_AESNI_C) && !defined(MBEDTLS_HAVE_ASM) +#error "MBEDTLS_AESNI_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_CTR_DRBG_C) && !defined(MBEDTLS_AES_C) +#error "MBEDTLS_CTR_DRBG_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_DHM_C) && !defined(MBEDTLS_BIGNUM_C) +#error "MBEDTLS_DHM_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_CMAC_C) && \ + !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_DES_C) +#error "MBEDTLS_CMAC_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_NIST_KW_C) && \ + ( !defined(MBEDTLS_AES_C) || !defined(MBEDTLS_CIPHER_C) ) +#error "MBEDTLS_NIST_KW_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECDH_C) && !defined(MBEDTLS_ECP_C) +#error "MBEDTLS_ECDH_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECDSA_C) && \ + ( !defined(MBEDTLS_ECP_C) || \ + !( defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) ) || \ + !defined(MBEDTLS_ASN1_PARSE_C) || \ + !defined(MBEDTLS_ASN1_WRITE_C) ) +#error "MBEDTLS_ECDSA_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECJPAKE_C) && \ + ( !defined(MBEDTLS_ECP_C) || !defined(MBEDTLS_MD_C) ) +#error "MBEDTLS_ECJPAKE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_RESTARTABLE) && \ + ( defined(MBEDTLS_USE_PSA_CRYPTO) || \ + defined(MBEDTLS_ECDH_COMPUTE_SHARED_ALT) || \ + defined(MBEDTLS_ECDH_GEN_PUBLIC_ALT) || \ + defined(MBEDTLS_ECDSA_SIGN_ALT) || \ + defined(MBEDTLS_ECDSA_VERIFY_ALT) || \ + defined(MBEDTLS_ECDSA_GENKEY_ALT) || \ + defined(MBEDTLS_ECP_INTERNAL_ALT) || \ + defined(MBEDTLS_ECP_ALT) ) +#error "MBEDTLS_ECP_RESTARTABLE defined, but it cannot coexist with an alternative or PSA-based ECP implementation" +#endif + +#if defined(MBEDTLS_ECDSA_DETERMINISTIC) && !defined(MBEDTLS_HMAC_DRBG_C) +#error "MBEDTLS_ECDSA_DETERMINISTIC defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_C) && ( !defined(MBEDTLS_BIGNUM_C) || ( \ + !defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) && \ + !defined(MBEDTLS_ECP_DP_CURVE448_ENABLED) ) ) +#error "MBEDTLS_ECP_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PK_PARSE_C) && !defined(MBEDTLS_ASN1_PARSE_C) +#error "MBEDTLS_PK_PARSE_C defined, but not all prerequesites" +#endif + +#if defined(MBEDTLS_ENTROPY_C) && (!defined(MBEDTLS_SHA512_C) && \ + !defined(MBEDTLS_SHA256_C)) +#error "MBEDTLS_ENTROPY_C defined, but not all prerequisites" +#endif +#if defined(MBEDTLS_ENTROPY_C) && defined(MBEDTLS_SHA512_C) && \ + defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN) && (MBEDTLS_CTR_DRBG_ENTROPY_LEN > 64) +#error "MBEDTLS_CTR_DRBG_ENTROPY_LEN value too high" +#endif +#if defined(MBEDTLS_ENTROPY_C) && \ + ( !defined(MBEDTLS_SHA512_C) || defined(MBEDTLS_ENTROPY_FORCE_SHA256) ) \ + && defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN) && (MBEDTLS_CTR_DRBG_ENTROPY_LEN > 32) +#error "MBEDTLS_CTR_DRBG_ENTROPY_LEN value too high" +#endif +#if defined(MBEDTLS_ENTROPY_C) && \ + defined(MBEDTLS_ENTROPY_FORCE_SHA256) && !defined(MBEDTLS_SHA256_C) +#error "MBEDTLS_ENTROPY_FORCE_SHA256 defined, but not all prerequisites" +#endif + +#if defined(__has_feature) +#if __has_feature(memory_sanitizer) +#define MBEDTLS_HAS_MEMSAN +#endif +#endif +#if defined(MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN) && !defined(MBEDTLS_HAS_MEMSAN) +#error "MBEDTLS_TEST_CONSTANT_FLOW_MEMSAN requires building with MemorySanitizer" +#endif +#undef MBEDTLS_HAS_MEMSAN + +#if defined(MBEDTLS_GCM_C) && ( \ + !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_CAMELLIA_C) && !defined(MBEDTLS_ARIA_C) ) +#error "MBEDTLS_GCM_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT) +#error "MBEDTLS_ECP_RANDOMIZE_JAC_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_ADD_MIXED_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT) +#error "MBEDTLS_ECP_ADD_MIXED_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_DOUBLE_JAC_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT) +#error "MBEDTLS_ECP_DOUBLE_JAC_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT) +#error "MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_NORMALIZE_JAC_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT) +#error "MBEDTLS_ECP_NORMALIZE_JAC_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT) +#error "MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_RANDOMIZE_MXZ_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT) +#error "MBEDTLS_ECP_RANDOMIZE_MXZ_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_NORMALIZE_MXZ_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT) +#error "MBEDTLS_ECP_NORMALIZE_MXZ_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ECP_NO_FALLBACK) && !defined(MBEDTLS_ECP_INTERNAL_ALT) +#error "MBEDTLS_ECP_NO_FALLBACK defined, but no alternative implementation enabled" +#endif + +#if defined(MBEDTLS_HKDF_C) && !defined(MBEDTLS_MD_C) +#error "MBEDTLS_HKDF_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_HMAC_DRBG_C) && !defined(MBEDTLS_MD_C) +#error "MBEDTLS_HMAC_DRBG_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) && \ + ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_ECDSA_C) || \ + !defined(MBEDTLS_X509_CRT_PARSE_C) ) +#error "MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) && \ + ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_RSA_C) || \ + !defined(MBEDTLS_X509_CRT_PARSE_C) ) +#error "MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) && !defined(MBEDTLS_DHM_C) +#error "MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) && \ + !defined(MBEDTLS_ECDH_C) +#error "MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) && \ + ( !defined(MBEDTLS_DHM_C) || !defined(MBEDTLS_RSA_C) || \ + !defined(MBEDTLS_X509_CRT_PARSE_C) || !defined(MBEDTLS_PKCS1_V15) ) +#error "MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) && \ + ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_RSA_C) || \ + !defined(MBEDTLS_X509_CRT_PARSE_C) || !defined(MBEDTLS_PKCS1_V15) ) +#error "MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) && \ + ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_ECDSA_C) || \ + !defined(MBEDTLS_X509_CRT_PARSE_C) ) +#error "MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) && \ + ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) || \ + !defined(MBEDTLS_PKCS1_V15) ) +#error "MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) && \ + ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) || \ + !defined(MBEDTLS_PKCS1_V15) ) +#error "MBEDTLS_KEY_EXCHANGE_RSA_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) && \ + ( !defined(MBEDTLS_ECJPAKE_C) || !defined(MBEDTLS_SHA256_C) || \ + !defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) ) +#error "MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED) && \ + !defined(MBEDTLS_SSL_KEEP_PEER_CERTIFICATE) && \ + ( !defined(MBEDTLS_SHA256_C) && \ + !defined(MBEDTLS_SHA512_C) && \ + !defined(MBEDTLS_SHA1_C) ) +#error "!MBEDTLS_SSL_KEEP_PEER_CERTIFICATE requires MBEDTLS_SHA512_C, MBEDTLS_SHA256_C or MBEDTLS_SHA1_C" +#endif + +#if defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C) && \ + ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) ) +#error "MBEDTLS_MEMORY_BUFFER_ALLOC_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_MEMORY_BACKTRACE) && !defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C) +#error "MBEDTLS_MEMORY_BACKTRACE defined, but not all prerequesites" +#endif + +#if defined(MBEDTLS_MEMORY_DEBUG) && !defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C) +#error "MBEDTLS_MEMORY_DEBUG defined, but not all prerequesites" +#endif + +#if defined(MBEDTLS_PADLOCK_C) && !defined(MBEDTLS_HAVE_ASM) +#error "MBEDTLS_PADLOCK_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PEM_PARSE_C) && !defined(MBEDTLS_BASE64_C) +#error "MBEDTLS_PEM_PARSE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PEM_WRITE_C) && !defined(MBEDTLS_BASE64_C) +#error "MBEDTLS_PEM_WRITE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PK_C) && \ + ( !defined(MBEDTLS_RSA_C) && !defined(MBEDTLS_ECP_C) ) +#error "MBEDTLS_PK_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PK_PARSE_C) && !defined(MBEDTLS_PK_C) +#error "MBEDTLS_PK_PARSE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PK_WRITE_C) && !defined(MBEDTLS_PK_C) +#error "MBEDTLS_PK_WRITE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_EXIT_ALT) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_EXIT_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_EXIT_MACRO) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_EXIT_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_EXIT_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_EXIT) ||\ + defined(MBEDTLS_PLATFORM_EXIT_ALT) ) +#error "MBEDTLS_PLATFORM_EXIT_MACRO and MBEDTLS_PLATFORM_STD_EXIT/MBEDTLS_PLATFORM_EXIT_ALT cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_TIME_ALT) &&\ + ( !defined(MBEDTLS_PLATFORM_C) ||\ + !defined(MBEDTLS_HAVE_TIME) ) +#error "MBEDTLS_PLATFORM_TIME_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_TIME_MACRO) &&\ + ( !defined(MBEDTLS_PLATFORM_C) ||\ + !defined(MBEDTLS_HAVE_TIME) ) +#error "MBEDTLS_PLATFORM_TIME_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_TIME_TYPE_MACRO) &&\ + ( !defined(MBEDTLS_PLATFORM_C) ||\ + !defined(MBEDTLS_HAVE_TIME) ) +#error "MBEDTLS_PLATFORM_TIME_TYPE_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_TIME_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_TIME) ||\ + defined(MBEDTLS_PLATFORM_TIME_ALT) ) +#error "MBEDTLS_PLATFORM_TIME_MACRO and MBEDTLS_PLATFORM_STD_TIME/MBEDTLS_PLATFORM_TIME_ALT cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_TIME_TYPE_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_TIME) ||\ + defined(MBEDTLS_PLATFORM_TIME_ALT) ) +#error "MBEDTLS_PLATFORM_TIME_TYPE_MACRO and MBEDTLS_PLATFORM_STD_TIME/MBEDTLS_PLATFORM_TIME_ALT cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_FPRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_FPRINTF_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_FPRINTF_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_FPRINTF) ||\ + defined(MBEDTLS_PLATFORM_FPRINTF_ALT) ) +#error "MBEDTLS_PLATFORM_FPRINTF_MACRO and MBEDTLS_PLATFORM_STD_FPRINTF/MBEDTLS_PLATFORM_FPRINTF_ALT cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_FREE_MACRO) &&\ + ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) ) +#error "MBEDTLS_PLATFORM_FREE_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_FREE_MACRO) &&\ + defined(MBEDTLS_PLATFORM_STD_FREE) +#error "MBEDTLS_PLATFORM_FREE_MACRO and MBEDTLS_PLATFORM_STD_FREE cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_FREE_MACRO) && !defined(MBEDTLS_PLATFORM_CALLOC_MACRO) +#error "MBEDTLS_PLATFORM_CALLOC_MACRO must be defined if MBEDTLS_PLATFORM_FREE_MACRO is" +#endif + +#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) &&\ + ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) ) +#error "MBEDTLS_PLATFORM_CALLOC_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) &&\ + defined(MBEDTLS_PLATFORM_STD_CALLOC) +#error "MBEDTLS_PLATFORM_CALLOC_MACRO and MBEDTLS_PLATFORM_STD_CALLOC cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) && !defined(MBEDTLS_PLATFORM_FREE_MACRO) +#error "MBEDTLS_PLATFORM_FREE_MACRO must be defined if MBEDTLS_PLATFORM_CALLOC_MACRO is" +#endif + +#if defined(MBEDTLS_PLATFORM_MEMORY) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_MEMORY defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_PRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_PRINTF_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_PRINTF_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_PRINTF) ||\ + defined(MBEDTLS_PLATFORM_PRINTF_ALT) ) +#error "MBEDTLS_PLATFORM_PRINTF_MACRO and MBEDTLS_PLATFORM_STD_PRINTF/MBEDTLS_PLATFORM_PRINTF_ALT cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_SNPRINTF_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C) +#error "MBEDTLS_PLATFORM_SNPRINTF_MACRO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_SNPRINTF) ||\ + defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) ) +#error "MBEDTLS_PLATFORM_SNPRINTF_MACRO and MBEDTLS_PLATFORM_STD_SNPRINTF/MBEDTLS_PLATFORM_SNPRINTF_ALT cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_MEM_HDR) &&\ + !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS) +#error "MBEDTLS_PLATFORM_STD_MEM_HDR defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_CALLOC) && !defined(MBEDTLS_PLATFORM_MEMORY) +#error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_CALLOC) && !defined(MBEDTLS_PLATFORM_MEMORY) +#error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_FREE) && !defined(MBEDTLS_PLATFORM_MEMORY) +#error "MBEDTLS_PLATFORM_STD_FREE defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_EXIT) &&\ + !defined(MBEDTLS_PLATFORM_EXIT_ALT) +#error "MBEDTLS_PLATFORM_STD_EXIT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_TIME) &&\ + ( !defined(MBEDTLS_PLATFORM_TIME_ALT) ||\ + !defined(MBEDTLS_HAVE_TIME) ) +#error "MBEDTLS_PLATFORM_STD_TIME defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_FPRINTF) &&\ + !defined(MBEDTLS_PLATFORM_FPRINTF_ALT) +#error "MBEDTLS_PLATFORM_STD_FPRINTF defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_PRINTF) &&\ + !defined(MBEDTLS_PLATFORM_PRINTF_ALT) +#error "MBEDTLS_PLATFORM_STD_PRINTF defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_SNPRINTF) &&\ + !defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) +#error "MBEDTLS_PLATFORM_STD_SNPRINTF defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_ENTROPY_NV_SEED) &&\ + ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_ENTROPY_C) ) +#error "MBEDTLS_ENTROPY_NV_SEED defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_NV_SEED_ALT) &&\ + !defined(MBEDTLS_ENTROPY_NV_SEED) +#error "MBEDTLS_PLATFORM_NV_SEED_ALT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_NV_SEED_READ) &&\ + !defined(MBEDTLS_PLATFORM_NV_SEED_ALT) +#error "MBEDTLS_PLATFORM_STD_NV_SEED_READ defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_STD_NV_SEED_WRITE) &&\ + !defined(MBEDTLS_PLATFORM_NV_SEED_ALT) +#error "MBEDTLS_PLATFORM_STD_NV_SEED_WRITE defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PLATFORM_NV_SEED_READ_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_NV_SEED_READ) ||\ + defined(MBEDTLS_PLATFORM_NV_SEED_ALT) ) +#error "MBEDTLS_PLATFORM_NV_SEED_READ_MACRO and MBEDTLS_PLATFORM_STD_NV_SEED_READ cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO) &&\ + ( defined(MBEDTLS_PLATFORM_STD_NV_SEED_WRITE) ||\ + defined(MBEDTLS_PLATFORM_NV_SEED_ALT) ) +#error "MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO and MBEDTLS_PLATFORM_STD_NV_SEED_WRITE cannot be defined simultaneously" +#endif + +#if defined(MBEDTLS_PSA_CRYPTO_C) && \ + !( ( ( defined(MBEDTLS_CTR_DRBG_C) || defined(MBEDTLS_HMAC_DRBG_C) ) && \ + defined(MBEDTLS_ENTROPY_C) ) || \ + defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) ) +#error "MBEDTLS_PSA_CRYPTO_C defined, but not all prerequisites (missing RNG)" +#endif + +#if defined(MBEDTLS_PSA_CRYPTO_SPM) && !defined(MBEDTLS_PSA_CRYPTO_C) +#error "MBEDTLS_PSA_CRYPTO_SPM defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PSA_CRYPTO_SE_C) && \ + ! ( defined(MBEDTLS_PSA_CRYPTO_C) && \ + defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) ) +#error "MBEDTLS_PSA_CRYPTO_SE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) && \ + ! defined(MBEDTLS_PSA_CRYPTO_C) +#error "MBEDTLS_PSA_CRYPTO_STORAGE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PSA_INJECT_ENTROPY) && \ + !( defined(MBEDTLS_PSA_CRYPTO_STORAGE_C) && \ + defined(MBEDTLS_ENTROPY_NV_SEED) ) +#error "MBEDTLS_PSA_INJECT_ENTROPY defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PSA_INJECT_ENTROPY) && \ + !defined(MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES) +#error "MBEDTLS_PSA_INJECT_ENTROPY is not compatible with actual entropy sources" +#endif + +#if defined(MBEDTLS_PSA_INJECT_ENTROPY) && \ + defined(MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) +#error "MBEDTLS_PSA_INJECT_ENTROPY is not compatible with MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG" +#endif + +#if defined(MBEDTLS_PSA_ITS_FILE_C) && \ + !defined(MBEDTLS_FS_IO) +#error "MBEDTLS_PSA_ITS_FILE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER) && \ + defined(MBEDTLS_USE_PSA_CRYPTO) +#error "MBEDTLS_PSA_CRYPTO_KEY_ID_ENCODES_OWNER defined, but it cannot coexist with MBEDTLS_USE_PSA_CRYPTO." +#endif + +#if defined(MBEDTLS_RSA_C) && ( !defined(MBEDTLS_BIGNUM_C) || \ + !defined(MBEDTLS_OID_C) ) +#error "MBEDTLS_RSA_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_RSA_C) && ( !defined(MBEDTLS_PKCS1_V21) && \ + !defined(MBEDTLS_PKCS1_V15) ) +#error "MBEDTLS_RSA_C defined, but none of the PKCS1 versions enabled" +#endif + +#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) && \ + ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_PKCS1_V21) ) +#error "MBEDTLS_X509_RSASSA_PSS_SUPPORT defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SHA384_C) && !defined(MBEDTLS_SHA512_C) +#error "MBEDTLS_SHA384_C defined without MBEDTLS_SHA512_C" +#endif + +#if defined(MBEDTLS_SHA224_C) && !defined(MBEDTLS_SHA256_C) +#error "MBEDTLS_SHA224_C defined without MBEDTLS_SHA256_C" +#endif + +#if defined(MBEDTLS_SHA256_C) && !defined(MBEDTLS_SHA224_C) +#error "MBEDTLS_SHA256_C defined without MBEDTLS_SHA224_C" +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && ( !defined(MBEDTLS_SHA1_C) && \ + !defined(MBEDTLS_SHA256_C) && !defined(MBEDTLS_SHA512_C) ) +#error "MBEDTLS_SSL_PROTO_TLS1_2 defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL) && ( !defined(MBEDTLS_HKDF_C) && \ + !defined(MBEDTLS_SHA256_C) && !defined(MBEDTLS_SHA512_C) ) +#error "MBEDTLS_SSL_PROTO_TLS1_3_EXPERIMENTAL defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \ + !(defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) || \ + defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) ) +#error "One or more versions of the TLS protocol are enabled " \ + "but no key exchange methods defined with MBEDTLS_KEY_EXCHANGE_xxxx" +#endif + +#if defined(MBEDTLS_SSL_PROTO_DTLS) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1_2) +#error "MBEDTLS_SSL_PROTO_DTLS defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_CLI_C) && !defined(MBEDTLS_SSL_TLS_C) +#error "MBEDTLS_SSL_CLI_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_TLS_C) && ( !defined(MBEDTLS_CIPHER_C) || \ + !defined(MBEDTLS_MD_C) ) +#error "MBEDTLS_SSL_TLS_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_SRV_C) && !defined(MBEDTLS_SSL_TLS_C) +#error "MBEDTLS_SSL_SRV_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_TLS_C) && !defined(MBEDTLS_SSL_PROTO_TLS1_2) +#error "MBEDTLS_SSL_TLS_C defined, but no protocols are active" +#endif + +#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && !defined(MBEDTLS_SSL_PROTO_DTLS) +#error "MBEDTLS_SSL_DTLS_HELLO_VERIFY defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE) && \ + !defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) +#error "MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) && \ + ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) ) +#error "MBEDTLS_SSL_DTLS_ANTI_REPLAY defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID) && \ + ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) ) +#error "MBEDTLS_SSL_DTLS_CONNECTION_ID defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID) && \ + defined(MBEDTLS_SSL_CID_IN_LEN_MAX) && \ + MBEDTLS_SSL_CID_IN_LEN_MAX > 255 +#error "MBEDTLS_SSL_CID_IN_LEN_MAX too large (max 255)" +#endif + +#if defined(MBEDTLS_SSL_DTLS_CONNECTION_ID) && \ + defined(MBEDTLS_SSL_CID_OUT_LEN_MAX) && \ + MBEDTLS_SSL_CID_OUT_LEN_MAX > 255 +#error "MBEDTLS_SSL_CID_OUT_LEN_MAX too large (max 255)" +#endif + +#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1_2) +#error "MBEDTLS_SSL_ENCRYPT_THEN_MAC defined, but not all prerequsites" +#endif + +#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) && \ + !defined(MBEDTLS_SSL_PROTO_TLS1_2) +#error "MBEDTLS_SSL_EXTENDED_MASTER_SECRET defined, but not all prerequsites" +#endif + +#if defined(MBEDTLS_SSL_TICKET_C) && !defined(MBEDTLS_CIPHER_C) +#error "MBEDTLS_SSL_TICKET_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) && \ + !defined(MBEDTLS_X509_CRT_PARSE_C) +#error "MBEDTLS_SSL_SERVER_NAME_INDICATION defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_THREADING_PTHREAD) +#if !defined(MBEDTLS_THREADING_C) || defined(MBEDTLS_THREADING_IMPL) +#error "MBEDTLS_THREADING_PTHREAD defined, but not all prerequisites" +#endif +#define MBEDTLS_THREADING_IMPL +#endif + +#if defined(MBEDTLS_THREADING_ALT) +#if !defined(MBEDTLS_THREADING_C) || defined(MBEDTLS_THREADING_IMPL) +#error "MBEDTLS_THREADING_ALT defined, but not all prerequisites" +#endif +#define MBEDTLS_THREADING_IMPL +#endif + +#if defined(MBEDTLS_THREADING_C) && !defined(MBEDTLS_THREADING_IMPL) +#error "MBEDTLS_THREADING_C defined, single threading implementation required" +#endif +#undef MBEDTLS_THREADING_IMPL + +#if defined(MBEDTLS_USE_PSA_CRYPTO) && !defined(MBEDTLS_PSA_CRYPTO_C) +#error "MBEDTLS_USE_PSA_CRYPTO defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_VERSION_FEATURES) && !defined(MBEDTLS_VERSION_C) +#error "MBEDTLS_VERSION_FEATURES defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_USE_C) && ( !defined(MBEDTLS_BIGNUM_C) || \ + !defined(MBEDTLS_OID_C) || !defined(MBEDTLS_ASN1_PARSE_C) || \ + !defined(MBEDTLS_PK_PARSE_C) ) +#error "MBEDTLS_X509_USE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CREATE_C) && ( !defined(MBEDTLS_BIGNUM_C) || \ + !defined(MBEDTLS_OID_C) || !defined(MBEDTLS_ASN1_WRITE_C) || \ + !defined(MBEDTLS_PK_WRITE_C) ) +#error "MBEDTLS_X509_CREATE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CRT_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) ) +#error "MBEDTLS_X509_CRT_PARSE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CRL_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) ) +#error "MBEDTLS_X509_CRL_PARSE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CSR_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) ) +#error "MBEDTLS_X509_CSR_PARSE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CRT_WRITE_C) && ( !defined(MBEDTLS_X509_CREATE_C) ) +#error "MBEDTLS_X509_CRT_WRITE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_X509_CSR_WRITE_C) && ( !defined(MBEDTLS_X509_CREATE_C) ) +#error "MBEDTLS_X509_CSR_WRITE_C defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_HAVE_INT32) && defined(MBEDTLS_HAVE_INT64) +#error "MBEDTLS_HAVE_INT32 and MBEDTLS_HAVE_INT64 cannot be defined simultaneously" +#endif /* MBEDTLS_HAVE_INT32 && MBEDTLS_HAVE_INT64 */ + +#if ( defined(MBEDTLS_HAVE_INT32) || defined(MBEDTLS_HAVE_INT64) ) && \ + defined(MBEDTLS_HAVE_ASM) +#error "MBEDTLS_HAVE_INT32/MBEDTLS_HAVE_INT64 and MBEDTLS_HAVE_ASM cannot be defined simultaneously" +#endif /* (MBEDTLS_HAVE_INT32 || MBEDTLS_HAVE_INT64) && MBEDTLS_HAVE_ASM */ + +#if defined(MBEDTLS_SSL_DTLS_SRTP) && ( !defined(MBEDTLS_SSL_PROTO_DTLS) ) +#error "MBEDTLS_SSL_DTLS_SRTP defined, but not all prerequisites" +#endif + +#if defined(MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH) && ( !defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH) ) +#error "MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH defined, but not all prerequisites" +#endif + + + +/* Reject attempts to enable options that have been removed and that could + * cause a build to succeed but with features removed. */ + +#if defined(MBEDTLS_HAVEGE_C) //no-check-names +#error "MBEDTLS_HAVEGE_C was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/2599" +#endif + +#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL) //no-check-names +#error "MBEDTLS_SSL_HW_RECORD_ACCEL was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/4031" +#endif + +#if defined(MBEDTLS_SSL_PROTO_SSL3) //no-check-names +#error "MBEDTLS_SSL_PROTO_SSL3 (SSL v3.0 support) was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/4031" +#endif + +#if defined(MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO) //no-check-names +#error "MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO (SSL v2 ClientHello support) was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/4031" +#endif + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT) //no-check-names +#error "MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT (compatibility with the buggy implementation of truncated HMAC in Mbed TLS up to 2.7) was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/4031" +#endif + +#if defined(MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES) //no-check-names +#error "MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES was removed in Mbed TLS 3.0. See the ChangeLog entry if you really need SHA-1-signed certificates." +#endif + +#if defined(MBEDTLS_ZLIB_SUPPORT) //no-check-names +#error "MBEDTLS_ZLIB_SUPPORT was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/4031" +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1) //no-check-names +#error "MBEDTLS_SSL_PROTO_TLS1 (TLS v1.0 support) was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/4286" +#endif + +#if defined(MBEDTLS_SSL_PROTO_TLS1_1) //no-check-names +#error "MBEDTLS_SSL_PROTO_TLS1_1 (TLS v1.1 support) was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/4286" +#endif + +#if defined(MBEDTLS_CHECK_PARAMS) //no-check-names +#error "MBEDTLS_CHECK_PARAMS was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/4313" +#endif + +#if defined(MBEDTLS_SSL_CID_PADDING_GRANULARITY) //no-check-names +#error "MBEDTLS_SSL_CID_PADDING_GRANULARITY was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/4335" +#endif + +#if defined(MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY) //no-check-names +#error "MBEDTLS_SSL_TLS1_3_PADDING_GRANULARITY was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/4335" +#endif + +#if defined(MBEDTLS_SSL_TRUNCATED_HMAC) //no-check-names +#error "MBEDTLS_SSL_TRUNCATED_HMAC was removed in Mbed TLS 3.0. See https://github.com/ARMmbed/mbedtls/issues/4341" +#endif + +/* + * Avoid warning from -pedantic. This is a convenient place for this + * workaround since this is included by every single file before the + * #if defined(MBEDTLS_xxx_C) that results in empty translation units. + */ +typedef int mbedtls_iso_c_forbids_empty_translation_units; + +#endif /* MBEDTLS_CHECK_CONFIG_H */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/ecdsa.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/ecdsa.h new file mode 100644 index 0000000..71b73ee --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/ecdsa.h @@ -0,0 +1,506 @@ +/** + * \file ecdsa.h + * + * \brief This file contains ECDSA definitions and functions. + * + * The Elliptic Curve Digital Signature Algorithm (ECDSA) is defined in + * Standards for Efficient Cryptography Group (SECG): + * SEC1 Elliptic Curve Cryptography. + * The use of ECDSA for TLS is defined in RFC-4492: Elliptic Curve + * Cryptography (ECC) Cipher Suites for Transport Layer Security (TLS). + * + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_ECDSA_H +#define MBEDTLS_ECDSA_H +#include "mbedtls/private_access.h" + +#include "mbedtls/build_info.h" + +#include "mbedtls/ecp.h" +#include "mbedtls/md.h" + +/** + * \brief Maximum ECDSA signature size for a given curve bit size + * + * \param bits Curve size in bits + * \return Maximum signature size in bytes + * + * \note This macro returns a compile-time constant if its argument + * is one. It may evaluate its argument multiple times. + */ +/* + * Ecdsa-Sig-Value ::= SEQUENCE { + * r INTEGER, + * s INTEGER + * } + * + * For each of r and s, the value (V) may include an extra initial "0" bit. + */ +#define MBEDTLS_ECDSA_MAX_SIG_LEN( bits ) \ + ( /*T,L of SEQUENCE*/ ( ( bits ) >= 61 * 8 ? 3 : 2 ) + \ + /*T,L of r,s*/ 2 * ( ( ( bits ) >= 127 * 8 ? 3 : 2 ) + \ + /*V of r,s*/ ( ( bits ) + 8 ) / 8 ) ) + +/** The maximal size of an ECDSA signature in Bytes. */ +#define MBEDTLS_ECDSA_MAX_LEN MBEDTLS_ECDSA_MAX_SIG_LEN( MBEDTLS_ECP_MAX_BITS ) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief The ECDSA context structure. + * + * \warning Performing multiple operations concurrently on the same + * ECDSA context is not supported; objects of this type + * should not be shared between multiple threads. + */ +typedef mbedtls_ecp_keypair mbedtls_ecdsa_context; + +#if defined(MBEDTLS_ECP_RESTARTABLE) + +/** + * \brief Internal restart context for ecdsa_verify() + * + * \note Opaque struct, defined in ecdsa.c + */ +typedef struct mbedtls_ecdsa_restart_ver mbedtls_ecdsa_restart_ver_ctx; + +/** + * \brief Internal restart context for ecdsa_sign() + * + * \note Opaque struct, defined in ecdsa.c + */ +typedef struct mbedtls_ecdsa_restart_sig mbedtls_ecdsa_restart_sig_ctx; + +#if defined(MBEDTLS_ECDSA_DETERMINISTIC) +/** + * \brief Internal restart context for ecdsa_sign_det() + * + * \note Opaque struct, defined in ecdsa.c + */ +typedef struct mbedtls_ecdsa_restart_det mbedtls_ecdsa_restart_det_ctx; +#endif + +/** + * \brief General context for resuming ECDSA operations + */ +typedef struct +{ + mbedtls_ecp_restart_ctx MBEDTLS_PRIVATE(ecp); /*!< base context for ECP restart and + shared administrative info */ + mbedtls_ecdsa_restart_ver_ctx *MBEDTLS_PRIVATE(ver); /*!< ecdsa_verify() sub-context */ + mbedtls_ecdsa_restart_sig_ctx *MBEDTLS_PRIVATE(sig); /*!< ecdsa_sign() sub-context */ +#if defined(MBEDTLS_ECDSA_DETERMINISTIC) + mbedtls_ecdsa_restart_det_ctx *MBEDTLS_PRIVATE(det); /*!< ecdsa_sign_det() sub-context */ +#endif +} mbedtls_ecdsa_restart_ctx; + +#else /* MBEDTLS_ECP_RESTARTABLE */ + +/* Now we can declare functions that take a pointer to that */ +typedef void mbedtls_ecdsa_restart_ctx; + +#endif /* MBEDTLS_ECP_RESTARTABLE */ + +/** + * \brief This function checks whether a given group can be used + * for ECDSA. + * + * \param gid The ECP group ID to check. + * + * \return \c 1 if the group can be used, \c 0 otherwise + */ +int mbedtls_ecdsa_can_do( mbedtls_ecp_group_id gid ); + +/** + * \brief This function computes the ECDSA signature of a + * previously-hashed message. + * + * \note The deterministic version implemented in + * mbedtls_ecdsa_sign_det_ext() is usually preferred. + * + * \note If the bitlength of the message hash is larger than the + * bitlength of the group order, then the hash is truncated + * as defined in Standards for Efficient Cryptography Group + * (SECG): SEC1 Elliptic Curve Cryptography, section + * 4.1.3, step 5. + * + * \see ecp.h + * + * \param grp The context for the elliptic curve to use. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param r The MPI context in which to store the first part + * the signature. This must be initialized. + * \param s The MPI context in which to store the second part + * the signature. This must be initialized. + * \param d The private signing key. This must be initialized. + * \param buf The content to be signed. This is usually the hash of + * the original data to be signed. This must be a readable + * buffer of length \p blen Bytes. It may be \c NULL if + * \p blen is zero. + * \param blen The length of \p buf in Bytes. + * \param f_rng The RNG function. This must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may be + * \c NULL if \p f_rng doesn't need a context parameter. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_ECP_XXX + * or \c MBEDTLS_MPI_XXX error code on failure. + */ +int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s, + const mbedtls_mpi *d, const unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +#if defined(MBEDTLS_ECDSA_DETERMINISTIC) +/** + * \brief This function computes the ECDSA signature of a + * previously-hashed message, deterministic version. + * + * For more information, see RFC-6979: Deterministic + * Usage of the Digital Signature Algorithm (DSA) and Elliptic + * Curve Digital Signature Algorithm (ECDSA). + * + * \note If the bitlength of the message hash is larger than the + * bitlength of the group order, then the hash is truncated as + * defined in Standards for Efficient Cryptography Group + * (SECG): SEC1 Elliptic Curve Cryptography, section + * 4.1.3, step 5. + * + * \see ecp.h + * + * \param grp The context for the elliptic curve to use. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param r The MPI context in which to store the first part + * the signature. This must be initialized. + * \param s The MPI context in which to store the second part + * the signature. This must be initialized. + * \param d The private signing key. This must be initialized + * and setup, for example through mbedtls_ecp_gen_privkey(). + * \param buf The hashed content to be signed. This must be a readable + * buffer of length \p blen Bytes. It may be \c NULL if + * \p blen is zero. + * \param blen The length of \p buf in Bytes. + * \param md_alg The hash algorithm used to hash the original data. + * \param f_rng_blind The RNG function used for blinding. This must not be + * \c NULL. + * \param p_rng_blind The RNG context to be passed to \p f_rng. This may be + * \c NULL if \p f_rng doesn't need a context parameter. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX + * error code on failure. + */ +int mbedtls_ecdsa_sign_det_ext( mbedtls_ecp_group *grp, mbedtls_mpi *r, + mbedtls_mpi *s, const mbedtls_mpi *d, + const unsigned char *buf, size_t blen, + mbedtls_md_type_t md_alg, + int (*f_rng_blind)(void *, unsigned char *, size_t), + void *p_rng_blind ); +#endif /* MBEDTLS_ECDSA_DETERMINISTIC */ + +/** + * \brief This function verifies the ECDSA signature of a + * previously-hashed message. + * + * \note If the bitlength of the message hash is larger than the + * bitlength of the group order, then the hash is truncated as + * defined in Standards for Efficient Cryptography Group + * (SECG): SEC1 Elliptic Curve Cryptography, section + * 4.1.4, step 3. + * + * \see ecp.h + * + * \param grp The ECP group to use. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param buf The hashed content that was signed. This must be a readable + * buffer of length \p blen Bytes. It may be \c NULL if + * \p blen is zero. + * \param blen The length of \p buf in Bytes. + * \param Q The public key to use for verification. This must be + * initialized and setup. + * \param r The first integer of the signature. + * This must be initialized. + * \param s The second integer of the signature. + * This must be initialized. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the signature + * is invalid. + * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX + * error code on failure for any other reason. + */ +int mbedtls_ecdsa_verify( mbedtls_ecp_group *grp, + const unsigned char *buf, size_t blen, + const mbedtls_ecp_point *Q, const mbedtls_mpi *r, + const mbedtls_mpi *s); + +/** + * \brief This function computes the ECDSA signature and writes it + * to a buffer, serialized as defined in RFC-4492: + * Elliptic Curve Cryptography (ECC) Cipher Suites for + * Transport Layer Security (TLS). + * + * \warning It is not thread-safe to use the same context in + * multiple threads. + * + * \note The deterministic version is used if + * #MBEDTLS_ECDSA_DETERMINISTIC is defined. For more + * information, see RFC-6979: Deterministic Usage + * of the Digital Signature Algorithm (DSA) and Elliptic + * Curve Digital Signature Algorithm (ECDSA). + * + * \note If the bitlength of the message hash is larger than the + * bitlength of the group order, then the hash is truncated as + * defined in Standards for Efficient Cryptography Group + * (SECG): SEC1 Elliptic Curve Cryptography, section + * 4.1.3, step 5. + * + * \see ecp.h + * + * \param ctx The ECDSA context to use. This must be initialized + * and have a group and private key bound to it, for example + * via mbedtls_ecdsa_genkey() or mbedtls_ecdsa_from_keypair(). + * \param md_alg The message digest that was used to hash the message. + * \param hash The message hash to be signed. This must be a readable + * buffer of length \p blen Bytes. + * \param hlen The length of the hash \p hash in Bytes. + * \param sig The buffer to which to write the signature. This must be a + * writable buffer of length at least twice as large as the + * size of the curve used, plus 9. For example, 73 Bytes if + * a 256-bit curve is used. A buffer length of + * #MBEDTLS_ECDSA_MAX_LEN is always safe. + * \param sig_size The size of the \p sig buffer in bytes. + * \param slen The address at which to store the actual length of + * the signature written. Must not be \c NULL. + * \param f_rng The RNG function. This must not be \c NULL if + * #MBEDTLS_ECDSA_DETERMINISTIC is unset. Otherwise, + * it is used only for blinding and may be set to \c NULL, but + * doing so is DEPRECATED. + * \param p_rng The RNG context to be passed to \p f_rng. This may be + * \c NULL if \p f_rng is \c NULL or doesn't use a context. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_ECP_XXX, \c MBEDTLS_ERR_MPI_XXX or + * \c MBEDTLS_ERR_ASN1_XXX error code on failure. + */ +int mbedtls_ecdsa_write_signature( mbedtls_ecdsa_context *ctx, + mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hlen, + unsigned char *sig, size_t sig_size, size_t *slen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief This function computes the ECDSA signature and writes it + * to a buffer, in a restartable way. + * + * \see \c mbedtls_ecdsa_write_signature() + * + * \note This function is like \c mbedtls_ecdsa_write_signature() + * but it can return early and restart according to the limit + * set with \c mbedtls_ecp_set_max_ops() to reduce blocking. + * + * \param ctx The ECDSA context to use. This must be initialized + * and have a group and private key bound to it, for example + * via mbedtls_ecdsa_genkey() or mbedtls_ecdsa_from_keypair(). + * \param md_alg The message digest that was used to hash the message. + * \param hash The message hash to be signed. This must be a readable + * buffer of length \p blen Bytes. + * \param hlen The length of the hash \p hash in Bytes. + * \param sig The buffer to which to write the signature. This must be a + * writable buffer of length at least twice as large as the + * size of the curve used, plus 9. For example, 73 Bytes if + * a 256-bit curve is used. A buffer length of + * #MBEDTLS_ECDSA_MAX_LEN is always safe. + * \param sig_size The size of the \p sig buffer in bytes. + * \param slen The address at which to store the actual length of + * the signature written. Must not be \c NULL. + * \param f_rng The RNG function. This must not be \c NULL if + * #MBEDTLS_ECDSA_DETERMINISTIC is unset. Otherwise, + * it is unused and may be set to \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may be + * \c NULL if \p f_rng is \c NULL or doesn't use a context. + * \param rs_ctx The restart context to use. This may be \c NULL to disable + * restarting. If it is not \c NULL, it must point to an + * initialized restart context. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of + * operations was reached: see \c mbedtls_ecp_set_max_ops(). + * \return Another \c MBEDTLS_ERR_ECP_XXX, \c MBEDTLS_ERR_MPI_XXX or + * \c MBEDTLS_ERR_ASN1_XXX error code on failure. + */ +int mbedtls_ecdsa_write_signature_restartable( mbedtls_ecdsa_context *ctx, + mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hlen, + unsigned char *sig, size_t sig_size, size_t *slen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_ecdsa_restart_ctx *rs_ctx ); + +/** + * \brief This function reads and verifies an ECDSA signature. + * + * \note If the bitlength of the message hash is larger than the + * bitlength of the group order, then the hash is truncated as + * defined in Standards for Efficient Cryptography Group + * (SECG): SEC1 Elliptic Curve Cryptography, section + * 4.1.4, step 3. + * + * \see ecp.h + * + * \param ctx The ECDSA context to use. This must be initialized + * and have a group and public key bound to it. + * \param hash The message hash that was signed. This must be a readable + * buffer of length \p size Bytes. + * \param hlen The size of the hash \p hash. + * \param sig The signature to read and verify. This must be a readable + * buffer of length \p slen Bytes. + * \param slen The size of \p sig in Bytes. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if signature is invalid. + * \return #MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH if there is a valid + * signature in \p sig, but its length is less than \p siglen. + * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_ERR_MPI_XXX + * error code on failure for any other reason. + */ +int mbedtls_ecdsa_read_signature( mbedtls_ecdsa_context *ctx, + const unsigned char *hash, size_t hlen, + const unsigned char *sig, size_t slen ); + +/** + * \brief This function reads and verifies an ECDSA signature, + * in a restartable way. + * + * \see \c mbedtls_ecdsa_read_signature() + * + * \note This function is like \c mbedtls_ecdsa_read_signature() + * but it can return early and restart according to the limit + * set with \c mbedtls_ecp_set_max_ops() to reduce blocking. + * + * \param ctx The ECDSA context to use. This must be initialized + * and have a group and public key bound to it. + * \param hash The message hash that was signed. This must be a readable + * buffer of length \p size Bytes. + * \param hlen The size of the hash \p hash. + * \param sig The signature to read and verify. This must be a readable + * buffer of length \p slen Bytes. + * \param slen The size of \p sig in Bytes. + * \param rs_ctx The restart context to use. This may be \c NULL to disable + * restarting. If it is not \c NULL, it must point to an + * initialized restart context. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if signature is invalid. + * \return #MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH if there is a valid + * signature in \p sig, but its length is less than \p siglen. + * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of + * operations was reached: see \c mbedtls_ecp_set_max_ops(). + * \return Another \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_ERR_MPI_XXX + * error code on failure for any other reason. + */ +int mbedtls_ecdsa_read_signature_restartable( mbedtls_ecdsa_context *ctx, + const unsigned char *hash, size_t hlen, + const unsigned char *sig, size_t slen, + mbedtls_ecdsa_restart_ctx *rs_ctx ); + +/** + * \brief This function generates an ECDSA keypair on the given curve. + * + * \see ecp.h + * + * \param ctx The ECDSA context to store the keypair in. + * This must be initialized. + * \param gid The elliptic curve to use. One of the various + * \c MBEDTLS_ECP_DP_XXX macros depending on configuration. + * \param f_rng The RNG function to use. This must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may be + * \c NULL if \p f_rng doesn't need a context argument. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_ECP_XXX code on failure. + */ +int mbedtls_ecdsa_genkey( mbedtls_ecdsa_context *ctx, mbedtls_ecp_group_id gid, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** + * \brief This function sets up an ECDSA context from an EC key pair. + * + * \see ecp.h + * + * \param ctx The ECDSA context to setup. This must be initialized. + * \param key The EC key to use. This must be initialized and hold + * a private-public key pair or a public key. In the former + * case, the ECDSA context may be used for signature creation + * and verification after this call. In the latter case, it + * may be used for signature verification. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_ECP_XXX code on failure. + */ +int mbedtls_ecdsa_from_keypair( mbedtls_ecdsa_context *ctx, + const mbedtls_ecp_keypair *key ); + +/** + * \brief This function initializes an ECDSA context. + * + * \param ctx The ECDSA context to initialize. + * This must not be \c NULL. + */ +void mbedtls_ecdsa_init( mbedtls_ecdsa_context *ctx ); + +/** + * \brief This function frees an ECDSA context. + * + * \param ctx The ECDSA context to free. This may be \c NULL, + * in which case this function does nothing. If it + * is not \c NULL, it must be initialized. + */ +void mbedtls_ecdsa_free( mbedtls_ecdsa_context *ctx ); + +#if defined(MBEDTLS_ECP_RESTARTABLE) +/** + * \brief Initialize a restart context. + * + * \param ctx The restart context to initialize. + * This must not be \c NULL. + */ +void mbedtls_ecdsa_restart_init( mbedtls_ecdsa_restart_ctx *ctx ); + +/** + * \brief Free the components of a restart context. + * + * \param ctx The restart context to free. This may be \c NULL, + * in which case this function does nothing. If it + * is not \c NULL, it must be initialized. + */ +void mbedtls_ecdsa_restart_free( mbedtls_ecdsa_restart_ctx *ctx ); +#endif /* MBEDTLS_ECP_RESTARTABLE */ + +#ifdef __cplusplus +} +#endif + +#endif /* ecdsa.h */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/ecp.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/ecp.h new file mode 100644 index 0000000..b87114b --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/ecp.h @@ -0,0 +1,1286 @@ +/** + * \file ecp.h + * + * \brief This file provides an API for Elliptic Curves over GF(P) (ECP). + * + * The use of ECP in cryptography and TLS is defined in + * Standards for Efficient Cryptography Group (SECG): SEC1 + * Elliptic Curve Cryptography and + * RFC-4492: Elliptic Curve Cryptography (ECC) Cipher Suites + * for Transport Layer Security (TLS). + * + * RFC-2409: The Internet Key Exchange (IKE) defines ECP + * group types. + * + */ + +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_ECP_H +#define MBEDTLS_ECP_H +#include "mbedtls/private_access.h" + +#include "mbedtls/build_info.h" + +#include "mbedtls/bignum.h" + +/* + * ECP error codes + */ +#define MBEDTLS_ERR_ECP_BAD_INPUT_DATA -0x4F80 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL -0x4F00 /**< The buffer is too small to write to. */ +#define MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE -0x4E80 /**< The requested feature is not available, for example, the requested curve is not supported. */ +#define MBEDTLS_ERR_ECP_VERIFY_FAILED -0x4E00 /**< The signature is not valid. */ +#define MBEDTLS_ERR_ECP_ALLOC_FAILED -0x4D80 /**< Memory allocation failed. */ +#define MBEDTLS_ERR_ECP_RANDOM_FAILED -0x4D00 /**< Generation of random value, such as ephemeral key, failed. */ +#define MBEDTLS_ERR_ECP_INVALID_KEY -0x4C80 /**< Invalid private or public key. */ +#define MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH -0x4C00 /**< The buffer contains a valid signature followed by more data. */ +#define MBEDTLS_ERR_ECP_IN_PROGRESS -0x4B00 /**< Operation in progress, call again with the same parameters to continue. */ + +/* Flags indicating whether to include code that is specific to certain + * types of curves. These flags are for internal library use only. */ +#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \ + defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) +#define MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED +#endif +#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) || \ + defined(MBEDTLS_ECP_DP_CURVE448_ENABLED) +#define MBEDTLS_ECP_MONTGOMERY_ENABLED +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Domain-parameter identifiers: curve, subgroup, and generator. + * + * \note Only curves over prime fields are supported. + * + * \warning This library does not support validation of arbitrary domain + * parameters. Therefore, only standardized domain parameters from trusted + * sources should be used. See mbedtls_ecp_group_load(). + */ +/* Note: when adding a new curve: + * - Add it at the end of this enum, otherwise you'll break the ABI by + * changing the numerical value for existing curves. + * - Increment MBEDTLS_ECP_DP_MAX below if needed. + * - Update the calculation of MBEDTLS_ECP_MAX_BITS below. + * - Add the corresponding MBEDTLS_ECP_DP_xxx_ENABLED macro definition to + * mbedtls_config.h. + * - List the curve as a dependency of MBEDTLS_ECP_C and + * MBEDTLS_ECDSA_C if supported in check_config.h. + * - Add the curve to the appropriate curve type macro + * MBEDTLS_ECP_yyy_ENABLED above. + * - Add the necessary definitions to ecp_curves.c. + * - Add the curve to the ecp_supported_curves array in ecp.c. + * - Add the curve to applicable profiles in x509_crt.c. + * - Add the curve to applicable presets in ssl_tls.c. + */ +typedef enum +{ + MBEDTLS_ECP_DP_NONE = 0, /*!< Curve not defined. */ + MBEDTLS_ECP_DP_SECP192R1, /*!< Domain parameters for the 192-bit curve defined by FIPS 186-4 and SEC1. */ + MBEDTLS_ECP_DP_SECP224R1, /*!< Domain parameters for the 224-bit curve defined by FIPS 186-4 and SEC1. */ + MBEDTLS_ECP_DP_SECP256R1, /*!< Domain parameters for the 256-bit curve defined by FIPS 186-4 and SEC1. */ + MBEDTLS_ECP_DP_SECP384R1, /*!< Domain parameters for the 384-bit curve defined by FIPS 186-4 and SEC1. */ + MBEDTLS_ECP_DP_SECP521R1, /*!< Domain parameters for the 521-bit curve defined by FIPS 186-4 and SEC1. */ + MBEDTLS_ECP_DP_BP256R1, /*!< Domain parameters for 256-bit Brainpool curve. */ + MBEDTLS_ECP_DP_BP384R1, /*!< Domain parameters for 384-bit Brainpool curve. */ + MBEDTLS_ECP_DP_BP512R1, /*!< Domain parameters for 512-bit Brainpool curve. */ + MBEDTLS_ECP_DP_CURVE25519, /*!< Domain parameters for Curve25519. */ + MBEDTLS_ECP_DP_SECP192K1, /*!< Domain parameters for 192-bit "Koblitz" curve. */ + MBEDTLS_ECP_DP_SECP224K1, /*!< Domain parameters for 224-bit "Koblitz" curve. */ + MBEDTLS_ECP_DP_SECP256K1, /*!< Domain parameters for 256-bit "Koblitz" curve. */ + MBEDTLS_ECP_DP_CURVE448, /*!< Domain parameters for Curve448. */ +} mbedtls_ecp_group_id; + +/** + * The number of supported curves, plus one for #MBEDTLS_ECP_DP_NONE. + * + * \note Montgomery curves are currently excluded. + */ +#define MBEDTLS_ECP_DP_MAX 12 + +/* + * Curve types + */ +typedef enum +{ + MBEDTLS_ECP_TYPE_NONE = 0, + MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS, /* y^2 = x^3 + a x + b */ + MBEDTLS_ECP_TYPE_MONTGOMERY, /* y^2 = x^3 + a x^2 + x */ +} mbedtls_ecp_curve_type; + +/** + * Curve information, for use by other modules. + */ +typedef struct mbedtls_ecp_curve_info +{ + mbedtls_ecp_group_id MBEDTLS_PRIVATE(grp_id); /*!< An internal identifier. */ + uint16_t MBEDTLS_PRIVATE(tls_id); /*!< The TLS NamedCurve identifier. */ + uint16_t MBEDTLS_PRIVATE(bit_size); /*!< The curve size in bits. */ + const char *MBEDTLS_PRIVATE(name); /*!< A human-friendly name. */ +} mbedtls_ecp_curve_info; + +/** + * \brief The ECP point structure, in Jacobian coordinates. + * + * \note All functions expect and return points satisfying + * the following condition: Z == 0 or + * Z == 1. Other values of \p Z are + * used only by internal functions. + * The point is zero, or "at infinity", if Z == 0. + * Otherwise, \p X and \p Y are its standard (affine) + * coordinates. + */ +typedef struct mbedtls_ecp_point +{ + mbedtls_mpi MBEDTLS_PRIVATE(X); /*!< The X coordinate of the ECP point. */ + mbedtls_mpi MBEDTLS_PRIVATE(Y); /*!< The Y coordinate of the ECP point. */ + mbedtls_mpi MBEDTLS_PRIVATE(Z); /*!< The Z coordinate of the ECP point. */ +} +mbedtls_ecp_point; + +#if !defined(MBEDTLS_ECP_ALT) +/* + * default mbed TLS elliptic curve arithmetic implementation + * + * (in case MBEDTLS_ECP_ALT is defined then the developer has to provide an + * alternative implementation for the whole module and it will replace this + * one.) + */ + +/** + * \brief The ECP group structure. + * + * We consider two types of curve equations: + *
  • Short Weierstrass: y^2 = x^3 + A x + B mod P + * (SEC1 + RFC-4492)
    • + *
  • Montgomery: y^2 = x^3 + A x^2 + x mod P (Curve25519, + * Curve448)
+ * In both cases, the generator (\p G) for a prime-order subgroup is fixed. + * + * For Short Weierstrass, this subgroup is the whole curve, and its + * cardinality is denoted by \p N. Our code requires that \p N is an + * odd prime as mbedtls_ecp_mul() requires an odd number, and + * mbedtls_ecdsa_sign() requires that it is prime for blinding purposes. + * + * For Montgomery curves, we do not store \p A, but (A + 2) / 4, + * which is the quantity used in the formulas. Additionally, \p nbits is + * not the size of \p N but the required size for private keys. + * + * If \p modp is NULL, reduction modulo \p P is done using a generic algorithm. + * Otherwise, \p modp must point to a function that takes an \p mbedtls_mpi in the + * range of 0..2^(2*pbits)-1, and transforms it in-place to an integer + * which is congruent mod \p P to the given MPI, and is close enough to \p pbits + * in size, so that it may be efficiently brought in the 0..P-1 range by a few + * additions or subtractions. Therefore, it is only an approximative modular + * reduction. It must return 0 on success and non-zero on failure. + * + * \note Alternative implementations of the ECP module must obey the + * following constraints. + * * Group IDs must be distinct: if two group structures have + * the same ID, then they must be identical. + * * The fields \c id, \c P, \c A, \c B, \c G, \c N, + * \c pbits and \c nbits must have the same type and semantics + * as in the built-in implementation. + * They must be available for reading, but direct modification + * of these fields does not need to be supported. + * They do not need to be at the same offset in the structure. + */ +typedef struct mbedtls_ecp_group +{ + mbedtls_ecp_group_id id; /*!< An internal group identifier. */ + mbedtls_mpi P; /*!< The prime modulus of the base field. */ + mbedtls_mpi A; /*!< For Short Weierstrass: \p A in the equation. For + Montgomery curves: (A + 2) / 4. */ + mbedtls_mpi B; /*!< For Short Weierstrass: \p B in the equation. + For Montgomery curves: unused. */ + mbedtls_ecp_point G; /*!< The generator of the subgroup used. */ + mbedtls_mpi N; /*!< The order of \p G. */ + size_t pbits; /*!< The number of bits in \p P.*/ + size_t nbits; /*!< For Short Weierstrass: The number of bits in \p P. + For Montgomery curves: the number of bits in the + private keys. */ + /* End of public fields */ + + unsigned int MBEDTLS_PRIVATE(h); /*!< \internal 1 if the constants are static. */ + int (*MBEDTLS_PRIVATE(modp))(mbedtls_mpi *); /*!< The function for fast pseudo-reduction + mod \p P (see above).*/ + int (*MBEDTLS_PRIVATE(t_pre))(mbedtls_ecp_point *, void *); /*!< Unused. */ + int (*MBEDTLS_PRIVATE(t_post))(mbedtls_ecp_point *, void *); /*!< Unused. */ + void *MBEDTLS_PRIVATE(t_data); /*!< Unused. */ + mbedtls_ecp_point *MBEDTLS_PRIVATE(T); /*!< Pre-computed points for ecp_mul_comb(). */ + size_t MBEDTLS_PRIVATE(T_size); /*!< The number of dynamic allocated pre-computed points. */ +} +mbedtls_ecp_group; + +/** + * \name SECTION: Module settings + * + * The configuration options you can set for this module are in this section. + * Either change them in mbedtls_config.h, or define them using the compiler command line. + * \{ + */ + +#if !defined(MBEDTLS_ECP_WINDOW_SIZE) +/* + * Maximum "window" size used for point multiplication. + * Default: a point where higher memory usage yields disminishing performance + * returns. + * Minimum value: 2. Maximum value: 7. + * + * Result is an array of at most ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) ) + * points used for point multiplication. This value is directly tied to EC + * peak memory usage, so decreasing it by one should roughly cut memory usage + * by two (if large curves are in use). + * + * Reduction in size may reduce speed, but larger curves are impacted first. + * Sample performances (in ECDHE handshakes/s, with FIXED_POINT_OPTIM = 1): + * w-size: 6 5 4 3 2 + * 521 145 141 135 120 97 + * 384 214 209 198 177 146 + * 256 320 320 303 262 226 + * 224 475 475 453 398 342 + * 192 640 640 633 587 476 + */ +#define MBEDTLS_ECP_WINDOW_SIZE 4 /**< The maximum window size used. */ +#endif /* MBEDTLS_ECP_WINDOW_SIZE */ + +#if !defined(MBEDTLS_ECP_FIXED_POINT_OPTIM) +/* + * Trade code size for speed on fixed-point multiplication. + * + * This speeds up repeated multiplication of the generator (that is, the + * multiplication in ECDSA signatures, and half of the multiplications in + * ECDSA verification and ECDHE) by a factor roughly 3 to 4. + * + * For each n-bit Short Weierstrass curve that is enabled, this adds 4n bytes + * of code size if n < 384 and 8n otherwise. + * + * Change this value to 0 to reduce code size. + */ +#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up. */ +#endif /* MBEDTLS_ECP_FIXED_POINT_OPTIM */ + +/* \} name SECTION: Module settings */ + +#else /* MBEDTLS_ECP_ALT */ +#include "ecp_alt.h" +#endif /* MBEDTLS_ECP_ALT */ + +/** + * The maximum size of the groups, that is, of \c N and \c P. + */ +#if !defined(MBEDTLS_ECP_C) +/* Dummy definition to help code that has optional ECP support and + * defines an MBEDTLS_ECP_MAX_BYTES-sized array unconditionally. */ +#define MBEDTLS_ECP_MAX_BITS 1 +/* Note: the curves must be listed in DECREASING size! */ +#elif defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 521 +#elif defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 512 +#elif defined(MBEDTLS_ECP_DP_CURVE448_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 448 +#elif defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 384 +#elif defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 384 +#elif defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 256 +#elif defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 256 +#elif defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 256 +#elif defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 255 +#elif defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 225 // n is slightly above 2^224 +#elif defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 224 +#elif defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 192 +#elif defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) +#define MBEDTLS_ECP_MAX_BITS 192 +#else +#error "Missing definition of MBEDTLS_ECP_MAX_BITS" +#endif + +#define MBEDTLS_ECP_MAX_BYTES ( ( MBEDTLS_ECP_MAX_BITS + 7 ) / 8 ) +#define MBEDTLS_ECP_MAX_PT_LEN ( 2 * MBEDTLS_ECP_MAX_BYTES + 1 ) + +#if defined(MBEDTLS_ECP_RESTARTABLE) + +/** + * \brief Internal restart context for multiplication + * + * \note Opaque struct + */ +typedef struct mbedtls_ecp_restart_mul mbedtls_ecp_restart_mul_ctx; + +/** + * \brief Internal restart context for ecp_muladd() + * + * \note Opaque struct + */ +typedef struct mbedtls_ecp_restart_muladd mbedtls_ecp_restart_muladd_ctx; + +/** + * \brief General context for resuming ECC operations + */ +typedef struct +{ + unsigned MBEDTLS_PRIVATE(ops_done); /*!< current ops count */ + unsigned MBEDTLS_PRIVATE(depth); /*!< call depth (0 = top-level) */ + mbedtls_ecp_restart_mul_ctx *MBEDTLS_PRIVATE(rsm); /*!< ecp_mul_comb() sub-context */ + mbedtls_ecp_restart_muladd_ctx *MBEDTLS_PRIVATE(ma); /*!< ecp_muladd() sub-context */ +} mbedtls_ecp_restart_ctx; + +/* + * Operation counts for restartable functions + */ +#define MBEDTLS_ECP_OPS_CHK 3 /*!< basic ops count for ecp_check_pubkey() */ +#define MBEDTLS_ECP_OPS_DBL 8 /*!< basic ops count for ecp_double_jac() */ +#define MBEDTLS_ECP_OPS_ADD 11 /*!< basic ops count for see ecp_add_mixed() */ +#define MBEDTLS_ECP_OPS_INV 120 /*!< empirical equivalent for mpi_mod_inv() */ + +/** + * \brief Internal; for restartable functions in other modules. + * Check and update basic ops budget. + * + * \param grp Group structure + * \param rs_ctx Restart context + * \param ops Number of basic ops to do + * + * \return \c 0 if doing \p ops basic ops is still allowed, + * \return #MBEDTLS_ERR_ECP_IN_PROGRESS otherwise. + */ +int mbedtls_ecp_check_budget( const mbedtls_ecp_group *grp, + mbedtls_ecp_restart_ctx *rs_ctx, + unsigned ops ); + +/* Utility macro for checking and updating ops budget */ +#define MBEDTLS_ECP_BUDGET( ops ) \ + MBEDTLS_MPI_CHK( mbedtls_ecp_check_budget( grp, rs_ctx, \ + (unsigned) (ops) ) ); + +#else /* MBEDTLS_ECP_RESTARTABLE */ + +#define MBEDTLS_ECP_BUDGET( ops ) /* no-op; for compatibility */ + +/* We want to declare restartable versions of existing functions anyway */ +typedef void mbedtls_ecp_restart_ctx; + +#endif /* MBEDTLS_ECP_RESTARTABLE */ + +/** + * \brief The ECP key-pair structure. + * + * A generic key-pair that may be used for ECDSA and fixed ECDH, for example. + * + * \note Members are deliberately in the same order as in the + * ::mbedtls_ecdsa_context structure. + */ +typedef struct mbedtls_ecp_keypair +{ + mbedtls_ecp_group MBEDTLS_PRIVATE(grp); /*!< Elliptic curve and base point */ + mbedtls_mpi MBEDTLS_PRIVATE(d); /*!< our secret value */ + mbedtls_ecp_point MBEDTLS_PRIVATE(Q); /*!< our public value */ +} +mbedtls_ecp_keypair; + +/* + * Point formats, from RFC 4492's enum ECPointFormat + */ +#define MBEDTLS_ECP_PF_UNCOMPRESSED 0 /**< Uncompressed point format. */ +#define MBEDTLS_ECP_PF_COMPRESSED 1 /**< Compressed point format. */ + +/* + * Some other constants from RFC 4492 + */ +#define MBEDTLS_ECP_TLS_NAMED_CURVE 3 /**< The named_curve of ECCurveType. */ + +#if defined(MBEDTLS_ECP_RESTARTABLE) +/** + * \brief Set the maximum number of basic operations done in a row. + * + * If more operations are needed to complete a computation, + * #MBEDTLS_ERR_ECP_IN_PROGRESS will be returned by the + * function performing the computation. It is then the + * caller's responsibility to either call again with the same + * parameters until it returns 0 or an error code; or to free + * the restart context if the operation is to be aborted. + * + * It is strictly required that all input parameters and the + * restart context be the same on successive calls for the + * same operation, but output parameters need not be the + * same; they must not be used until the function finally + * returns 0. + * + * This only applies to functions whose documentation + * mentions they may return #MBEDTLS_ERR_ECP_IN_PROGRESS (or + * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS for functions in the + * SSL module). For functions that accept a "restart context" + * argument, passing NULL disables restart and makes the + * function equivalent to the function with the same name + * with \c _restartable removed. For functions in the ECDH + * module, restart is disabled unless the function accepts + * an "ECDH context" argument and + * mbedtls_ecdh_enable_restart() was previously called on + * that context. For function in the SSL module, restart is + * only enabled for specific sides and key exchanges + * (currently only for clients and ECDHE-ECDSA). + * + * \param max_ops Maximum number of basic operations done in a row. + * Default: 0 (unlimited). + * Lower (non-zero) values mean ECC functions will block for + * a lesser maximum amount of time. + * + * \note A "basic operation" is defined as a rough equivalent of a + * multiplication in GF(p) for the NIST P-256 curve. + * As an indication, with default settings, a scalar + * multiplication (full run of \c mbedtls_ecp_mul()) is: + * - about 3300 basic operations for P-256 + * - about 9400 basic operations for P-384 + * + * \note Very low values are not always respected: sometimes + * functions need to block for a minimum number of + * operations, and will do so even if max_ops is set to a + * lower value. That minimum depends on the curve size, and + * can be made lower by decreasing the value of + * \c MBEDTLS_ECP_WINDOW_SIZE. As an indication, here is the + * lowest effective value for various curves and values of + * that parameter (w for short): + * w=6 w=5 w=4 w=3 w=2 + * P-256 208 208 160 136 124 + * P-384 682 416 320 272 248 + * P-521 1364 832 640 544 496 + * + * \note This setting is currently ignored by Curve25519. + */ +void mbedtls_ecp_set_max_ops( unsigned max_ops ); + +/** + * \brief Check if restart is enabled (max_ops != 0) + * + * \return \c 0 if \c max_ops == 0 (restart disabled) + * \return \c 1 otherwise (restart enabled) + */ +int mbedtls_ecp_restart_is_enabled( void ); +#endif /* MBEDTLS_ECP_RESTARTABLE */ + +/* + * Get the type of a curve + */ +mbedtls_ecp_curve_type mbedtls_ecp_get_type( const mbedtls_ecp_group *grp ); + +/** + * \brief This function retrieves the information defined in + * mbedtls_ecp_curve_info() for all supported curves. + * + * \note This function returns information about all curves + * supported by the library. Some curves may not be + * supported for all algorithms. Call mbedtls_ecdh_can_do() + * or mbedtls_ecdsa_can_do() to check if a curve is + * supported for ECDH or ECDSA. + * + * \return A statically allocated array. The last entry is 0. + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_list( void ); + +/** + * \brief This function retrieves the list of internal group + * identifiers of all supported curves in the order of + * preference. + * + * \note This function returns information about all curves + * supported by the library. Some curves may not be + * supported for all algorithms. Call mbedtls_ecdh_can_do() + * or mbedtls_ecdsa_can_do() to check if a curve is + * supported for ECDH or ECDSA. + * + * \return A statically allocated array, + * terminated with MBEDTLS_ECP_DP_NONE. + */ +const mbedtls_ecp_group_id *mbedtls_ecp_grp_id_list( void ); + +/** + * \brief This function retrieves curve information from an internal + * group identifier. + * + * \param grp_id An \c MBEDTLS_ECP_DP_XXX value. + * + * \return The associated curve information on success. + * \return NULL on failure. + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_grp_id( mbedtls_ecp_group_id grp_id ); + +/** + * \brief This function retrieves curve information from a TLS + * NamedCurve value. + * + * \param tls_id An \c MBEDTLS_ECP_DP_XXX value. + * + * \return The associated curve information on success. + * \return NULL on failure. + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_tls_id( uint16_t tls_id ); + +/** + * \brief This function retrieves curve information from a + * human-readable name. + * + * \param name The human-readable name. + * + * \return The associated curve information on success. + * \return NULL on failure. + */ +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_name( const char *name ); + +/** + * \brief This function initializes a point as zero. + * + * \param pt The point to initialize. + */ +void mbedtls_ecp_point_init( mbedtls_ecp_point *pt ); + +/** + * \brief This function initializes an ECP group context + * without loading any domain parameters. + * + * \note After this function is called, domain parameters + * for various ECP groups can be loaded through the + * mbedtls_ecp_group_load() or mbedtls_ecp_tls_read_group() + * functions. + */ +void mbedtls_ecp_group_init( mbedtls_ecp_group *grp ); + +/** + * \brief This function initializes a key pair as an invalid one. + * + * \param key The key pair to initialize. + */ +void mbedtls_ecp_keypair_init( mbedtls_ecp_keypair *key ); + +/** + * \brief This function frees the components of a point. + * + * \param pt The point to free. + */ +void mbedtls_ecp_point_free( mbedtls_ecp_point *pt ); + +/** + * \brief This function frees the components of an ECP group. + * + * \param grp The group to free. This may be \c NULL, in which + * case this function returns immediately. If it is not + * \c NULL, it must point to an initialized ECP group. + */ +void mbedtls_ecp_group_free( mbedtls_ecp_group *grp ); + +/** + * \brief This function frees the components of a key pair. + * + * \param key The key pair to free. This may be \c NULL, in which + * case this function returns immediately. If it is not + * \c NULL, it must point to an initialized ECP key pair. + */ +void mbedtls_ecp_keypair_free( mbedtls_ecp_keypair *key ); + +#if defined(MBEDTLS_ECP_RESTARTABLE) +/** + * \brief Initialize a restart context. + * + * \param ctx The restart context to initialize. This must + * not be \c NULL. + */ +void mbedtls_ecp_restart_init( mbedtls_ecp_restart_ctx *ctx ); + +/** + * \brief Free the components of a restart context. + * + * \param ctx The restart context to free. This may be \c NULL, in which + * case this function returns immediately. If it is not + * \c NULL, it must point to an initialized restart context. + */ +void mbedtls_ecp_restart_free( mbedtls_ecp_restart_ctx *ctx ); +#endif /* MBEDTLS_ECP_RESTARTABLE */ + +/** + * \brief This function copies the contents of point \p Q into + * point \p P. + * + * \param P The destination point. This must be initialized. + * \param Q The source point. This must be initialized. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure. + * \return Another negative error code for other kinds of failure. + */ +int mbedtls_ecp_copy( mbedtls_ecp_point *P, const mbedtls_ecp_point *Q ); + +/** + * \brief This function copies the contents of group \p src into + * group \p dst. + * + * \param dst The destination group. This must be initialized. + * \param src The source group. This must be initialized. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_group_copy( mbedtls_ecp_group *dst, + const mbedtls_ecp_group *src ); + +/** + * \brief This function sets a point to the point at infinity. + * + * \param pt The point to set. This must be initialized. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_set_zero( mbedtls_ecp_point *pt ); + +/** + * \brief This function checks if a point is the point at infinity. + * + * \param pt The point to test. This must be initialized. + * + * \return \c 1 if the point is zero. + * \return \c 0 if the point is non-zero. + * \return A negative error code on failure. + */ +int mbedtls_ecp_is_zero( mbedtls_ecp_point *pt ); + +/** + * \brief This function compares two points. + * + * \note This assumes that the points are normalized. Otherwise, + * they may compare as "not equal" even if they are. + * + * \param P The first point to compare. This must be initialized. + * \param Q The second point to compare. This must be initialized. + * + * \return \c 0 if the points are equal. + * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the points are not equal. + */ +int mbedtls_ecp_point_cmp( const mbedtls_ecp_point *P, + const mbedtls_ecp_point *Q ); + +/** + * \brief This function imports a non-zero point from two ASCII + * strings. + * + * \param P The destination point. This must be initialized. + * \param radix The numeric base of the input. + * \param x The first affine coordinate, as a null-terminated string. + * \param y The second affine coordinate, as a null-terminated string. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_MPI_XXX error code on failure. + */ +int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix, + const char *x, const char *y ); + +/** + * \brief This function exports a point into unsigned binary data. + * + * \param grp The group to which the point should belong. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param P The point to export. This must be initialized. + * \param format The point format. This must be either + * #MBEDTLS_ECP_PF_COMPRESSED or #MBEDTLS_ECP_PF_UNCOMPRESSED. + * (For groups without these formats, this parameter is + * ignored. But it still has to be either of the above + * values.) + * \param olen The address at which to store the length of + * the output in Bytes. This must not be \c NULL. + * \param buf The output buffer. This must be a writable buffer + * of length \p buflen Bytes. + * \param buflen The length of the output buffer \p buf in Bytes. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the output buffer + * is too small to hold the point. + * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the point format + * or the export for the given group is not implemented. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, + const mbedtls_ecp_point *P, + int format, size_t *olen, + unsigned char *buf, size_t buflen ); + +/** + * \brief This function imports a point from unsigned binary data. + * + * \note This function does not check that the point actually + * belongs to the given group, see mbedtls_ecp_check_pubkey() + * for that. + * + * \param grp The group to which the point should belong. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param P The destination context to import the point to. + * This must be initialized. + * \param buf The input buffer. This must be a readable buffer + * of length \p ilen Bytes. + * \param ilen The length of the input buffer \p buf in Bytes. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the input is invalid. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure. + * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the import for the + * given group is not implemented. + */ +int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp, + mbedtls_ecp_point *P, + const unsigned char *buf, size_t ilen ); + +/** + * \brief This function imports a point from a TLS ECPoint record. + * + * \note On function return, \p *buf is updated to point immediately + * after the ECPoint record. + * + * \param grp The ECP group to use. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param pt The destination point. + * \param buf The address of the pointer to the start of the input buffer. + * \param len The length of the buffer. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_MPI_XXX error code on initialization + * failure. + * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid. + */ +int mbedtls_ecp_tls_read_point( const mbedtls_ecp_group *grp, + mbedtls_ecp_point *pt, + const unsigned char **buf, size_t len ); + +/** + * \brief This function exports a point as a TLS ECPoint record + * defined in RFC 4492, Section 5.4. + * + * \param grp The ECP group to use. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param pt The point to be exported. This must be initialized. + * \param format The point format to use. This must be either + * #MBEDTLS_ECP_PF_COMPRESSED or #MBEDTLS_ECP_PF_UNCOMPRESSED. + * \param olen The address at which to store the length in Bytes + * of the data written. + * \param buf The target buffer. This must be a writable buffer of + * length \p blen Bytes. + * \param blen The length of the target buffer \p buf in Bytes. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the input is invalid. + * \return #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the target buffer + * is too small to hold the exported point. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_tls_write_point( const mbedtls_ecp_group *grp, + const mbedtls_ecp_point *pt, + int format, size_t *olen, + unsigned char *buf, size_t blen ); + +/** + * \brief This function sets up an ECP group context + * from a standardized set of domain parameters. + * + * \note The index should be a value of the NamedCurve enum, + * as defined in RFC-4492: Elliptic Curve Cryptography + * (ECC) Cipher Suites for Transport Layer Security (TLS), + * usually in the form of an \c MBEDTLS_ECP_DP_XXX macro. + * + * \param grp The group context to setup. This must be initialized. + * \param id The identifier of the domain parameter set to load. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p id doesn't + * correspond to a known group. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_group_load( mbedtls_ecp_group *grp, mbedtls_ecp_group_id id ); + +/** + * \brief This function sets up an ECP group context from a TLS + * ECParameters record as defined in RFC 4492, Section 5.4. + * + * \note The read pointer \p buf is updated to point right after + * the ECParameters record on exit. + * + * \param grp The group context to setup. This must be initialized. + * \param buf The address of the pointer to the start of the input buffer. + * \param len The length of the input buffer \c *buf in Bytes. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid. + * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the group is not + * recognized. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_tls_read_group( mbedtls_ecp_group *grp, + const unsigned char **buf, size_t len ); + +/** + * \brief This function extracts an elliptic curve group ID from a + * TLS ECParameters record as defined in RFC 4492, Section 5.4. + * + * \note The read pointer \p buf is updated to point right after + * the ECParameters record on exit. + * + * \param grp The address at which to store the group id. + * This must not be \c NULL. + * \param buf The address of the pointer to the start of the input buffer. + * \param len The length of the input buffer \c *buf in Bytes. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid. + * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the group is not + * recognized. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_tls_read_group_id( mbedtls_ecp_group_id *grp, + const unsigned char **buf, + size_t len ); +/** + * \brief This function exports an elliptic curve as a TLS + * ECParameters record as defined in RFC 4492, Section 5.4. + * + * \param grp The ECP group to be exported. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param olen The address at which to store the number of Bytes written. + * This must not be \c NULL. + * \param buf The buffer to write to. This must be a writable buffer + * of length \p blen Bytes. + * \param blen The length of the output buffer \p buf in Bytes. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the output + * buffer is too small to hold the exported group. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_tls_write_group( const mbedtls_ecp_group *grp, + size_t *olen, + unsigned char *buf, size_t blen ); + +/** + * \brief This function performs a scalar multiplication of a point + * by an integer: \p R = \p m * \p P. + * + * It is not thread-safe to use same group in multiple threads. + * + * \note To prevent timing attacks, this function + * executes the exact same sequence of base-field + * operations for any valid \p m. It avoids any if-branch or + * array index depending on the value of \p m. If also uses + * \p f_rng to randomize some intermediate results. + * + * \param grp The ECP group to use. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param R The point in which to store the result of the calculation. + * This must be initialized. + * \param m The integer by which to multiply. This must be initialized. + * \param P The point to multiply. This must be initialized. + * \param f_rng The RNG function. This must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may be \c + * NULL if \p f_rng doesn't need a context. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_INVALID_KEY if \p m is not a valid private + * key, or \p P is not a valid public key. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_mul( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** + * \brief This function performs multiplication of a point by + * an integer: \p R = \p m * \p P in a restartable way. + * + * \see mbedtls_ecp_mul() + * + * \note This function does the same as \c mbedtls_ecp_mul(), but + * it can return early and restart according to the limit set + * with \c mbedtls_ecp_set_max_ops() to reduce blocking. + * + * \param grp The ECP group to use. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param R The point in which to store the result of the calculation. + * This must be initialized. + * \param m The integer by which to multiply. This must be initialized. + * \param P The point to multiply. This must be initialized. + * \param f_rng The RNG function. This must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may be \c + * NULL if \p f_rng doesn't need a context. + * \param rs_ctx The restart context (NULL disables restart). + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_INVALID_KEY if \p m is not a valid private + * key, or \p P is not a valid public key. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure. + * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of + * operations was reached: see \c mbedtls_ecp_set_max_ops(). + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng, + mbedtls_ecp_restart_ctx *rs_ctx ); + +#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) +/** + * \brief This function performs multiplication and addition of two + * points by integers: \p R = \p m * \p P + \p n * \p Q + * + * It is not thread-safe to use same group in multiple threads. + * + * \note In contrast to mbedtls_ecp_mul(), this function does not + * guarantee a constant execution flow and timing. + * + * \note This function is only defined for short Weierstrass curves. + * It may not be included in builds without any short + * Weierstrass curve. + * + * \param grp The ECP group to use. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param R The point in which to store the result of the calculation. + * This must be initialized. + * \param m The integer by which to multiply \p P. + * This must be initialized. + * \param P The point to multiply by \p m. This must be initialized. + * \param n The integer by which to multiply \p Q. + * This must be initialized. + * \param Q The point to be multiplied by \p n. + * This must be initialized. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_INVALID_KEY if \p m or \p n are not + * valid private keys, or \p P or \p Q are not valid public + * keys. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure. + * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p grp does not + * designate a short Weierstrass curve. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + const mbedtls_mpi *n, const mbedtls_ecp_point *Q ); + +/** + * \brief This function performs multiplication and addition of two + * points by integers: \p R = \p m * \p P + \p n * \p Q in a + * restartable way. + * + * \see \c mbedtls_ecp_muladd() + * + * \note This function works the same as \c mbedtls_ecp_muladd(), + * but it can return early and restart according to the limit + * set with \c mbedtls_ecp_set_max_ops() to reduce blocking. + * + * \note This function is only defined for short Weierstrass curves. + * It may not be included in builds without any short + * Weierstrass curve. + * + * \param grp The ECP group to use. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param R The point in which to store the result of the calculation. + * This must be initialized. + * \param m The integer by which to multiply \p P. + * This must be initialized. + * \param P The point to multiply by \p m. This must be initialized. + * \param n The integer by which to multiply \p Q. + * This must be initialized. + * \param Q The point to be multiplied by \p n. + * This must be initialized. + * \param rs_ctx The restart context (NULL disables restart). + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_INVALID_KEY if \p m or \p n are not + * valid private keys, or \p P or \p Q are not valid public + * keys. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure. + * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p grp does not + * designate a short Weierstrass curve. + * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of + * operations was reached: see \c mbedtls_ecp_set_max_ops(). + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_muladd_restartable( + mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + const mbedtls_mpi *n, const mbedtls_ecp_point *Q, + mbedtls_ecp_restart_ctx *rs_ctx ); +#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */ + +/** + * \brief This function checks that a point is a valid public key + * on this curve. + * + * It only checks that the point is non-zero, has + * valid coordinates and lies on the curve. It does not verify + * that it is indeed a multiple of \p G. This additional + * check is computationally more expensive, is not required + * by standards, and should not be necessary if the group + * used has a small cofactor. In particular, it is useless for + * the NIST groups which all have a cofactor of 1. + * + * \note This function uses bare components rather than an + * ::mbedtls_ecp_keypair structure, to ease use with other + * structures, such as ::mbedtls_ecdh_context or + * ::mbedtls_ecdsa_context. + * + * \param grp The ECP group the point should belong to. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param pt The point to check. This must be initialized. + * + * \return \c 0 if the point is a valid public key. + * \return #MBEDTLS_ERR_ECP_INVALID_KEY if the point is not + * a valid public key for the given curve. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_check_pubkey( const mbedtls_ecp_group *grp, + const mbedtls_ecp_point *pt ); + +/** + * \brief This function checks that an \p mbedtls_mpi is a + * valid private key for this curve. + * + * \note This function uses bare components rather than an + * ::mbedtls_ecp_keypair structure to ease use with other + * structures, such as ::mbedtls_ecdh_context or + * ::mbedtls_ecdsa_context. + * + * \param grp The ECP group the private key should belong to. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param d The integer to check. This must be initialized. + * + * \return \c 0 if the point is a valid private key. + * \return #MBEDTLS_ERR_ECP_INVALID_KEY if the point is not a valid + * private key for the given curve. + * \return Another negative error code on other kinds of failure. + */ +int mbedtls_ecp_check_privkey( const mbedtls_ecp_group *grp, + const mbedtls_mpi *d ); + +/** + * \brief This function generates a private key. + * + * \param grp The ECP group to generate a private key for. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param d The destination MPI (secret part). This must be initialized. + * \param f_rng The RNG function. This must not be \c NULL. + * \param p_rng The RNG parameter to be passed to \p f_rng. This may be + * \c NULL if \p f_rng doesn't need a context argument. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code + * on failure. + */ +int mbedtls_ecp_gen_privkey( const mbedtls_ecp_group *grp, + mbedtls_mpi *d, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief This function generates a keypair with a configurable base + * point. + * + * \note This function uses bare components rather than an + * ::mbedtls_ecp_keypair structure to ease use with other + * structures, such as ::mbedtls_ecdh_context or + * ::mbedtls_ecdsa_context. + * + * \param grp The ECP group to generate a key pair for. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param G The base point to use. This must be initialized + * and belong to \p grp. It replaces the default base + * point \c grp->G used by mbedtls_ecp_gen_keypair(). + * \param d The destination MPI (secret part). + * This must be initialized. + * \param Q The destination point (public part). + * This must be initialized. + * \param f_rng The RNG function. This must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may + * be \c NULL if \p f_rng doesn't need a context argument. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code + * on failure. + */ +int mbedtls_ecp_gen_keypair_base( mbedtls_ecp_group *grp, + const mbedtls_ecp_point *G, + mbedtls_mpi *d, mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief This function generates an ECP keypair. + * + * \note This function uses bare components rather than an + * ::mbedtls_ecp_keypair structure to ease use with other + * structures, such as ::mbedtls_ecdh_context or + * ::mbedtls_ecdsa_context. + * + * \param grp The ECP group to generate a key pair for. + * This must be initialized and have group parameters + * set, for example through mbedtls_ecp_group_load(). + * \param d The destination MPI (secret part). + * This must be initialized. + * \param Q The destination point (public part). + * This must be initialized. + * \param f_rng The RNG function. This must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may + * be \c NULL if \p f_rng doesn't need a context argument. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code + * on failure. + */ +int mbedtls_ecp_gen_keypair( mbedtls_ecp_group *grp, mbedtls_mpi *d, + mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief This function generates an ECP key. + * + * \param grp_id The ECP group identifier. + * \param key The destination key. This must be initialized. + * \param f_rng The RNG function to use. This must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may + * be \c NULL if \p f_rng doesn't need a context argument. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code + * on failure. + */ +int mbedtls_ecp_gen_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief This function reads an elliptic curve private key. + * + * \param grp_id The ECP group identifier. + * \param key The destination key. + * \param buf The buffer containing the binary representation of the + * key. (Big endian integer for Weierstrass curves, byte + * string for Montgomery curves.) + * \param buflen The length of the buffer in bytes. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_INVALID_KEY error if the key is + * invalid. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed. + * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the operation for + * the group is not implemented. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_ecp_read_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key, + const unsigned char *buf, size_t buflen ); + +/** + * \brief This function exports an elliptic curve private key. + * + * \param key The private key. + * \param buf The output buffer for containing the binary representation + * of the key. (Big endian integer for Weierstrass curves, byte + * string for Montgomery curves.) + * \param buflen The total length of the buffer in bytes. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the \p key + representation is larger than the available space in \p buf. + * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the operation for + * the group is not implemented. + * \return Another negative error code on different kinds of failure. + */ +int mbedtls_ecp_write_key( mbedtls_ecp_keypair *key, + unsigned char *buf, size_t buflen ); + +/** + * \brief This function checks that the keypair objects + * \p pub and \p prv have the same group and the + * same public point, and that the private key in + * \p prv is consistent with the public key. + * + * \param pub The keypair structure holding the public key. This + * must be initialized. If it contains a private key, that + * part is ignored. + * \param prv The keypair structure holding the full keypair. + * This must be initialized. + * \param f_rng The RNG function. This must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may be \c + * NULL if \p f_rng doesn't need a context. + * + * \return \c 0 on success, meaning that the keys are valid and match. + * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the keys are invalid or do not match. + * \return An \c MBEDTLS_ERR_ECP_XXX or an \c MBEDTLS_ERR_MPI_XXX + * error code on calculation failure. + */ +int mbedtls_ecp_check_pub_priv( + const mbedtls_ecp_keypair *pub, const mbedtls_ecp_keypair *prv, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +#if defined(MBEDTLS_SELF_TEST) + +/** + * \brief The ECP checkup routine. + * + * \return \c 0 on success. + * \return \c 1 on failure. + */ +int mbedtls_ecp_self_test( int verbose ); + +#endif /* MBEDTLS_SELF_TEST */ + +#ifdef __cplusplus +} +#endif + +#endif /* ecp.h */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/error.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/error.h new file mode 100644 index 0000000..9a8690d --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/error.h @@ -0,0 +1,210 @@ +/** + * \file error.h + * + * \brief Error to string translation + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBEDTLS_ERROR_H +#define MBEDTLS_ERROR_H + +#include "mbedtls/build_info.h" + +#include + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +/** + * Error code layout. + * + * Currently we try to keep all error codes within the negative space of 16 + * bits signed integers to support all platforms (-0x0001 - -0x7FFF). In + * addition we'd like to give two layers of information on the error if + * possible. + * + * For that purpose the error codes are segmented in the following manner: + * + * 16 bit error code bit-segmentation + * + * 1 bit - Unused (sign bit) + * 3 bits - High level module ID + * 5 bits - Module-dependent error code + * 7 bits - Low level module errors + * + * For historical reasons, low-level error codes are divided in even and odd, + * even codes were assigned first, and -1 is reserved for other errors. + * + * Low-level module errors (0x0002-0x007E, 0x0001-0x007F) + * + * Module Nr Codes assigned + * ERROR 2 0x006E 0x0001 + * MPI 7 0x0002-0x0010 + * GCM 3 0x0012-0x0014 0x0013-0x0013 + * THREADING 3 0x001A-0x001E + * AES 5 0x0020-0x0022 0x0021-0x0025 + * CAMELLIA 3 0x0024-0x0026 0x0027-0x0027 + * BASE64 2 0x002A-0x002C + * OID 1 0x002E-0x002E 0x000B-0x000B + * PADLOCK 1 0x0030-0x0030 + * DES 2 0x0032-0x0032 0x0033-0x0033 + * CTR_DBRG 4 0x0034-0x003A + * ENTROPY 3 0x003C-0x0040 0x003D-0x003F + * NET 13 0x0042-0x0052 0x0043-0x0049 + * ARIA 4 0x0058-0x005E + * ASN1 7 0x0060-0x006C + * CMAC 1 0x007A-0x007A + * PBKDF2 1 0x007C-0x007C + * HMAC_DRBG 4 0x0003-0x0009 + * CCM 3 0x000D-0x0011 + * MD5 1 0x002F-0x002F + * RIPEMD160 1 0x0031-0x0031 + * SHA1 1 0x0035-0x0035 0x0073-0x0073 + * SHA256 1 0x0037-0x0037 0x0074-0x0074 + * SHA512 1 0x0039-0x0039 0x0075-0x0075 + * CHACHA20 3 0x0051-0x0055 + * POLY1305 3 0x0057-0x005B + * CHACHAPOLY 2 0x0054-0x0056 + * PLATFORM 2 0x0070-0x0072 + * + * High-level module nr (3 bits - 0x0...-0x7...) + * Name ID Nr of Errors + * PEM 1 9 + * PKCS#12 1 4 (Started from top) + * X509 2 20 + * PKCS5 2 4 (Started from top) + * DHM 3 11 + * PK 3 15 (Started from top) + * RSA 4 11 + * ECP 4 10 (Started from top) + * MD 5 5 + * HKDF 5 1 (Started from top) + * SSL 5 2 (Started from 0x5F00) + * CIPHER 6 8 (Started from 0x6080) + * SSL 6 22 (Started from top, plus 0x6000) + * SSL 7 20 (Started from 0x7000, gaps at + * 0x7380, 0x7900-0x7980, 0x7A80-0x7E80) + * + * Module dependent error code (5 bits 0x.00.-0x.F8.) + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#define MBEDTLS_ERR_ERROR_GENERIC_ERROR -0x0001 /**< Generic error */ +#define MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED -0x006E /**< This is a bug in the library */ + +#define MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED -0x0070 /**< Hardware accelerator failed */ +#define MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED -0x0072 /**< The requested feature is not supported by the platform */ + +/** + * \brief Combines a high-level and low-level error code together. + * + * Wrapper macro for mbedtls_error_add(). See that function for + * more details. + */ +#define MBEDTLS_ERROR_ADD( high, low ) \ + mbedtls_error_add( high, low, __FILE__, __LINE__ ) + +#if defined(MBEDTLS_TEST_HOOKS) +/** + * \brief Testing hook called before adding/combining two error codes together. + * Only used when invasive testing is enabled via MBEDTLS_TEST_HOOKS. + */ +extern void (*mbedtls_test_hook_error_add)( int, int, const char *, int ); +#endif + +/** + * \brief Combines a high-level and low-level error code together. + * + * This function can be called directly however it is usually + * called via the #MBEDTLS_ERROR_ADD macro. + * + * While a value of zero is not a negative error code, it is still an + * error code (that denotes success) and can be combined with both a + * negative error code or another value of zero. + * + * \note When invasive testing is enabled via #MBEDTLS_TEST_HOOKS, also try to + * call \link mbedtls_test_hook_error_add \endlink. + * + * \param high high-level error code. See error.h for more details. + * \param low low-level error code. See error.h for more details. + * \param file file where this error code addition occurred. + * \param line line where this error code addition occurred. + */ +static inline int mbedtls_error_add( int high, int low, + const char *file, int line ) +{ +#if defined(MBEDTLS_TEST_HOOKS) + if( *mbedtls_test_hook_error_add != NULL ) + ( *mbedtls_test_hook_error_add )( high, low, file, line ); +#endif + (void)file; + (void)line; + + return( high + low ); +} + +/** + * \brief Translate a mbed TLS error code into a string representation, + * Result is truncated if necessary and always includes a terminating + * null byte. + * + * \param errnum error code + * \param buffer buffer to place representation in + * \param buflen length of the buffer + */ +void mbedtls_strerror( int errnum, char *buffer, size_t buflen ); + +/** + * \brief Translate the high-level part of an Mbed TLS error code into a string + * representation. + * + * This function returns a const pointer to an un-modifiable string. The caller + * must not try to modify the string. It is intended to be used mostly for + * logging purposes. + * + * \param error_code error code + * + * \return The string representation of the error code, or \c NULL if the error + * code is unknown. + */ +const char * mbedtls_high_level_strerr( int error_code ); + +/** + * \brief Translate the low-level part of an Mbed TLS error code into a string + * representation. + * + * This function returns a const pointer to an un-modifiable string. The caller + * must not try to modify the string. It is intended to be used mostly for + * logging purposes. + * + * \param error_code error code + * + * \return The string representation of the error code, or \c NULL if the error + * code is unknown. + */ +const char * mbedtls_low_level_strerr( int error_code ); + +#ifdef __cplusplus +} +#endif + +#endif /* error.h */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/mbedtls_config.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/mbedtls_config.h new file mode 100644 index 0000000..2fa14eb --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/mbedtls_config.h @@ -0,0 +1,96 @@ +/** + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +#ifndef MBEDTLS_CONFIG_H +#define MBEDTLS_CONFIG_H + +#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE) +#define _CRT_SECURE_NO_DEPRECATE 1 +#endif + +//#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_FS_IO +//#define MBEDTLS_VERSION_FEATURES +#define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_BASE64_C +#define MBEDTLS_BIGNUM_C +#define MBEDTLS_MD_C +#define MBEDTLS_OID_C +#define MBEDTLS_PEM_PARSE_C + +/** + * \def MBEDTLS_PLATFORM_C + * + * Enable the platform abstraction layer that allows you to re-assign + * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit(). + * + * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT + * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned + * above to be specified at runtime or compile time respectively. + * + * \note This abstraction layer must be enabled on Windows (including MSYS2) + * as other module rely on it for a fixed snprintf implementation. + * + * Module: library/platform.c + * Caller: Most other .c files + * + * This module enables abstraction of common (libc) functions. + */ +#define MBEDTLS_PLATFORM_C + +/** + * \def MBEDTLS_TIMING_C + * + * Enable the semi-portable timing interface. + * + * \note The provided implementation only works on POSIX/Unix (including Linux, + * BSD and OS X) and Windows. On other platforms, you can either disable that + * module and provide your own implementations of the callbacks needed by + * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide + * your own implementation of the whole module by setting + * \c MBEDTLS_TIMING_ALT in the current file. + * + * \note See also our Knowledge Base article about porting to a new + * environment: + * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS + * + * Module: library/timing.c + * Caller: library/havege.c + * + * This module is used by the HAVEGE random number generator. + */ +#define MBEDTLS_TIMING_C + +//#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */ +//#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */ +//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */ + +#if defined(TARGET_LIKE_MBED) && defined(YOTTA_CFG_MBEDTLS_TARGET_CONFIG_FILE) +#include YOTTA_CFG_MBEDTLS_TARGET_CONFIG_FILE +#endif + +#if defined(YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE) +#include YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE +#elif defined(MBEDTLS_USER_CONFIG_FILE) +#include MBEDTLS_USER_CONFIG_FILE +#endif + +#include "check_config.h" + +#endif /* MBEDTLS_CONFIG_H */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/md.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/md.h new file mode 100644 index 0000000..1170bc1 --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/md.h @@ -0,0 +1,446 @@ + /** + * \file md.h + * + * \brief This file contains the generic message-digest wrapper. + * + * \author Adriaan de Jong + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_MD_H +#define MBEDTLS_MD_H +#include "mbedtls/private_access.h" + +#include + +#include "mbedtls/build_info.h" + +#define MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE -0x5080 /**< The selected feature is not available. */ +#define MBEDTLS_ERR_MD_BAD_INPUT_DATA -0x5100 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_MD_ALLOC_FAILED -0x5180 /**< Failed to allocate memory. */ +#define MBEDTLS_ERR_MD_FILE_IO_ERROR -0x5200 /**< Opening or reading of file failed. */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Supported message digests. + * + * \warning MD5 and SHA-1 are considered weak message digests and + * their use constitutes a security risk. We recommend considering + * stronger message digests instead. + * + */ +typedef enum { + MBEDTLS_MD_NONE=0, /**< None. */ + MBEDTLS_MD_MD5, /**< The MD5 message digest. */ + MBEDTLS_MD_SHA1, /**< The SHA-1 message digest. */ + MBEDTLS_MD_SHA224, /**< The SHA-224 message digest. */ + MBEDTLS_MD_SHA256, /**< The SHA-256 message digest. */ + MBEDTLS_MD_SHA384, /**< The SHA-384 message digest. */ + MBEDTLS_MD_SHA512, /**< The SHA-512 message digest. */ + MBEDTLS_MD_RIPEMD160, /**< The RIPEMD-160 message digest. */ +} mbedtls_md_type_t; + +#if defined(MBEDTLS_SHA512_C) +#define MBEDTLS_MD_MAX_SIZE 64 /* longest known is SHA512 */ +#else +#define MBEDTLS_MD_MAX_SIZE 32 /* longest known is SHA256 or less */ +#endif + +#if defined(MBEDTLS_SHA512_C) +#define MBEDTLS_MD_MAX_BLOCK_SIZE 128 +#else +#define MBEDTLS_MD_MAX_BLOCK_SIZE 64 +#endif + +/** + * Opaque struct. + * + * Constructed using either #mbedtls_md_info_from_string or + * #mbedtls_md_info_from_type. + * + * Fields can be accessed with #mbedtls_md_get_size, + * #mbedtls_md_get_type and #mbedtls_md_get_name. + */ +/* Defined internally in library/md_wrap.h. */ +typedef struct mbedtls_md_info_t mbedtls_md_info_t; + +/** + * The generic message-digest context. + */ +typedef struct mbedtls_md_context_t +{ + /** Information about the associated message digest. */ + const mbedtls_md_info_t *MBEDTLS_PRIVATE(md_info); + + /** The digest-specific context. */ + void *MBEDTLS_PRIVATE(md_ctx); + + /** The HMAC part of the context. */ + void *MBEDTLS_PRIVATE(hmac_ctx); +} mbedtls_md_context_t; + +/** + * \brief This function returns the list of digests supported by the + * generic digest module. + * + * \note The list starts with the strongest available hashes. + * + * \return A statically allocated array of digests. Each element + * in the returned list is an integer belonging to the + * message-digest enumeration #mbedtls_md_type_t. + * The last entry is 0. + */ +const int *mbedtls_md_list( void ); + +/** + * \brief This function returns the message-digest information + * associated with the given digest name. + * + * \param md_name The name of the digest to search for. + * + * \return The message-digest information associated with \p md_name. + * \return NULL if the associated message-digest information is not found. + */ +const mbedtls_md_info_t *mbedtls_md_info_from_string( const char *md_name ); + +/** + * \brief This function returns the message-digest information + * associated with the given digest type. + * + * \param md_type The type of digest to search for. + * + * \return The message-digest information associated with \p md_type. + * \return NULL if the associated message-digest information is not found. + */ +const mbedtls_md_info_t *mbedtls_md_info_from_type( mbedtls_md_type_t md_type ); + +/** + * \brief This function initializes a message-digest context without + * binding it to a particular message-digest algorithm. + * + * This function should always be called first. It prepares the + * context for mbedtls_md_setup() for binding it to a + * message-digest algorithm. + */ +void mbedtls_md_init( mbedtls_md_context_t *ctx ); + +/** + * \brief This function clears the internal structure of \p ctx and + * frees any embedded internal structure, but does not free + * \p ctx itself. + * + * If you have called mbedtls_md_setup() on \p ctx, you must + * call mbedtls_md_free() when you are no longer using the + * context. + * Calling this function if you have previously + * called mbedtls_md_init() and nothing else is optional. + * You must not call this function if you have not called + * mbedtls_md_init(). + */ +void mbedtls_md_free( mbedtls_md_context_t *ctx ); + + +/** + * \brief This function selects the message digest algorithm to use, + * and allocates internal structures. + * + * It should be called after mbedtls_md_init() or + * mbedtls_md_free(). Makes it necessary to call + * mbedtls_md_free() later. + * + * \param ctx The context to set up. + * \param md_info The information structure of the message-digest algorithm + * to use. + * \param hmac Defines if HMAC is used. 0: HMAC is not used (saves some memory), + * or non-zero: HMAC is used with this context. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification + * failure. + * \return #MBEDTLS_ERR_MD_ALLOC_FAILED on memory-allocation failure. + */ +int mbedtls_md_setup( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info, int hmac ); + +/** + * \brief This function clones the state of an message-digest + * context. + * + * \note You must call mbedtls_md_setup() on \c dst before calling + * this function. + * + * \note The two contexts must have the same type, + * for example, both are SHA-256. + * + * \warning This function clones the message-digest state, not the + * HMAC state. + * + * \param dst The destination context. + * \param src The context to be cloned. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification failure. + */ +int mbedtls_md_clone( mbedtls_md_context_t *dst, + const mbedtls_md_context_t *src ); + +/** + * \brief This function extracts the message-digest size from the + * message-digest information structure. + * + * \param md_info The information structure of the message-digest algorithm + * to use. + * + * \return The size of the message-digest output in Bytes. + */ +unsigned char mbedtls_md_get_size( const mbedtls_md_info_t *md_info ); + +/** + * \brief This function extracts the message-digest type from the + * message-digest information structure. + * + * \param md_info The information structure of the message-digest algorithm + * to use. + * + * \return The type of the message digest. + */ +mbedtls_md_type_t mbedtls_md_get_type( const mbedtls_md_info_t *md_info ); + +/** + * \brief This function extracts the message-digest name from the + * message-digest information structure. + * + * \param md_info The information structure of the message-digest algorithm + * to use. + * + * \return The name of the message digest. + */ +const char *mbedtls_md_get_name( const mbedtls_md_info_t *md_info ); + +/** + * \brief This function starts a message-digest computation. + * + * You must call this function after setting up the context + * with mbedtls_md_setup(), and before passing data with + * mbedtls_md_update(). + * + * \param ctx The generic message-digest context. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification + * failure. + */ +int mbedtls_md_starts( mbedtls_md_context_t *ctx ); + +/** + * \brief This function feeds an input buffer into an ongoing + * message-digest computation. + * + * You must call mbedtls_md_starts() before calling this + * function. You may call this function multiple times. + * Afterwards, call mbedtls_md_finish(). + * + * \param ctx The generic message-digest context. + * \param input The buffer holding the input data. + * \param ilen The length of the input data. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification + * failure. + */ +int mbedtls_md_update( mbedtls_md_context_t *ctx, const unsigned char *input, size_t ilen ); + +/** + * \brief This function finishes the digest operation, + * and writes the result to the output buffer. + * + * Call this function after a call to mbedtls_md_starts(), + * followed by any number of calls to mbedtls_md_update(). + * Afterwards, you may either clear the context with + * mbedtls_md_free(), or call mbedtls_md_starts() to reuse + * the context for another digest operation with the same + * algorithm. + * + * \param ctx The generic message-digest context. + * \param output The buffer for the generic message-digest checksum result. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification + * failure. + */ +int mbedtls_md_finish( mbedtls_md_context_t *ctx, unsigned char *output ); + +/** + * \brief This function calculates the message-digest of a buffer, + * with respect to a configurable message-digest algorithm + * in a single call. + * + * The result is calculated as + * Output = message_digest(input buffer). + * + * \param md_info The information structure of the message-digest algorithm + * to use. + * \param input The buffer holding the data. + * \param ilen The length of the input data. + * \param output The generic message-digest checksum result. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification + * failure. + */ +int mbedtls_md( const mbedtls_md_info_t *md_info, const unsigned char *input, size_t ilen, + unsigned char *output ); + +#if defined(MBEDTLS_FS_IO) +/** + * \brief This function calculates the message-digest checksum + * result of the contents of the provided file. + * + * The result is calculated as + * Output = message_digest(file contents). + * + * \param md_info The information structure of the message-digest algorithm + * to use. + * \param path The input file name. + * \param output The generic message-digest checksum result. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_FILE_IO_ERROR on an I/O error accessing + * the file pointed by \p path. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA if \p md_info was NULL. + */ +int mbedtls_md_file( const mbedtls_md_info_t *md_info, const char *path, + unsigned char *output ); +#endif /* MBEDTLS_FS_IO */ + +/** + * \brief This function sets the HMAC key and prepares to + * authenticate a new message. + * + * Call this function after mbedtls_md_setup(), to use + * the MD context for an HMAC calculation, then call + * mbedtls_md_hmac_update() to provide the input data, and + * mbedtls_md_hmac_finish() to get the HMAC value. + * + * \param ctx The message digest context containing an embedded HMAC + * context. + * \param key The HMAC secret key. + * \param keylen The length of the HMAC key in Bytes. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification + * failure. + */ +int mbedtls_md_hmac_starts( mbedtls_md_context_t *ctx, const unsigned char *key, + size_t keylen ); + +/** + * \brief This function feeds an input buffer into an ongoing HMAC + * computation. + * + * Call mbedtls_md_hmac_starts() or mbedtls_md_hmac_reset() + * before calling this function. + * You may call this function multiple times to pass the + * input piecewise. + * Afterwards, call mbedtls_md_hmac_finish(). + * + * \param ctx The message digest context containing an embedded HMAC + * context. + * \param input The buffer holding the input data. + * \param ilen The length of the input data. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification + * failure. + */ +int mbedtls_md_hmac_update( mbedtls_md_context_t *ctx, const unsigned char *input, + size_t ilen ); + +/** + * \brief This function finishes the HMAC operation, and writes + * the result to the output buffer. + * + * Call this function after mbedtls_md_hmac_starts() and + * mbedtls_md_hmac_update() to get the HMAC value. Afterwards + * you may either call mbedtls_md_free() to clear the context, + * or call mbedtls_md_hmac_reset() to reuse the context with + * the same HMAC key. + * + * \param ctx The message digest context containing an embedded HMAC + * context. + * \param output The generic HMAC checksum result. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification + * failure. + */ +int mbedtls_md_hmac_finish( mbedtls_md_context_t *ctx, unsigned char *output); + +/** + * \brief This function prepares to authenticate a new message with + * the same key as the previous HMAC operation. + * + * You may call this function after mbedtls_md_hmac_finish(). + * Afterwards call mbedtls_md_hmac_update() to pass the new + * input. + * + * \param ctx The message digest context containing an embedded HMAC + * context. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification + * failure. + */ +int mbedtls_md_hmac_reset( mbedtls_md_context_t *ctx ); + +/** + * \brief This function calculates the full generic HMAC + * on the input buffer with the provided key. + * + * The function allocates the context, performs the + * calculation, and frees the context. + * + * The HMAC result is calculated as + * output = generic HMAC(hmac key, input buffer). + * + * \param md_info The information structure of the message-digest algorithm + * to use. + * \param key The HMAC secret key. + * \param keylen The length of the HMAC secret key in Bytes. + * \param input The buffer holding the input data. + * \param ilen The length of the input data. + * \param output The generic HMAC result. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification + * failure. + */ +int mbedtls_md_hmac( const mbedtls_md_info_t *md_info, const unsigned char *key, size_t keylen, + const unsigned char *input, size_t ilen, + unsigned char *output ); + +/* Internal use */ +int mbedtls_md_process( mbedtls_md_context_t *ctx, const unsigned char *data ); + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_MD_H */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/oid.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/oid.h new file mode 100644 index 0000000..9e68e91 --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/oid.h @@ -0,0 +1,641 @@ +/** + * \file oid.h + * + * \brief Object Identifier (OID) database + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBEDTLS_OID_H +#define MBEDTLS_OID_H +#include "mbedtls/private_access.h" + +#include "mbedtls/build_info.h" + +#include "mbedtls/asn1.h" +#include "mbedtls/pk.h" + +#include + +#if defined(MBEDTLS_CIPHER_C) +#include "mbedtls/cipher.h" +#endif + +#if defined(MBEDTLS_MD_C) +#include "mbedtls/md.h" +#endif + +#define MBEDTLS_ERR_OID_NOT_FOUND -0x002E /**< OID is not found. */ +#define MBEDTLS_ERR_OID_BUF_TOO_SMALL -0x000B /**< output buffer is too small */ + +/* This is for the benefit of X.509, but defined here in order to avoid + * having a "backwards" include of x.509.h here */ +/* + * X.509 extension types (internal, arbitrary values for bitsets) + */ +#define MBEDTLS_OID_X509_EXT_AUTHORITY_KEY_IDENTIFIER (1 << 0) +#define MBEDTLS_OID_X509_EXT_SUBJECT_KEY_IDENTIFIER (1 << 1) +#define MBEDTLS_OID_X509_EXT_KEY_USAGE (1 << 2) +#define MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES (1 << 3) +#define MBEDTLS_OID_X509_EXT_POLICY_MAPPINGS (1 << 4) +#define MBEDTLS_OID_X509_EXT_SUBJECT_ALT_NAME (1 << 5) +#define MBEDTLS_OID_X509_EXT_ISSUER_ALT_NAME (1 << 6) +#define MBEDTLS_OID_X509_EXT_SUBJECT_DIRECTORY_ATTRS (1 << 7) +#define MBEDTLS_OID_X509_EXT_BASIC_CONSTRAINTS (1 << 8) +#define MBEDTLS_OID_X509_EXT_NAME_CONSTRAINTS (1 << 9) +#define MBEDTLS_OID_X509_EXT_POLICY_CONSTRAINTS (1 << 10) +#define MBEDTLS_OID_X509_EXT_EXTENDED_KEY_USAGE (1 << 11) +#define MBEDTLS_OID_X509_EXT_CRL_DISTRIBUTION_POINTS (1 << 12) +#define MBEDTLS_OID_X509_EXT_INIHIBIT_ANYPOLICY (1 << 13) +#define MBEDTLS_OID_X509_EXT_FRESHEST_CRL (1 << 14) +#define MBEDTLS_OID_X509_EXT_NS_CERT_TYPE (1 << 16) + +/* + * Top level OID tuples + */ +#define MBEDTLS_OID_ISO_MEMBER_BODIES "\x2a" /* {iso(1) member-body(2)} */ +#define MBEDTLS_OID_ISO_IDENTIFIED_ORG "\x2b" /* {iso(1) identified-organization(3)} */ +#define MBEDTLS_OID_ISO_CCITT_DS "\x55" /* {joint-iso-ccitt(2) ds(5)} */ +#define MBEDTLS_OID_ISO_ITU_COUNTRY "\x60" /* {joint-iso-itu-t(2) country(16)} */ + +/* + * ISO Member bodies OID parts + */ +#define MBEDTLS_OID_COUNTRY_US "\x86\x48" /* {us(840)} */ +#define MBEDTLS_OID_ORG_RSA_DATA_SECURITY "\x86\xf7\x0d" /* {rsadsi(113549)} */ +#define MBEDTLS_OID_RSA_COMPANY MBEDTLS_OID_ISO_MEMBER_BODIES MBEDTLS_OID_COUNTRY_US \ + MBEDTLS_OID_ORG_RSA_DATA_SECURITY /* {iso(1) member-body(2) us(840) rsadsi(113549)} */ +#define MBEDTLS_OID_ORG_ANSI_X9_62 "\xce\x3d" /* ansi-X9-62(10045) */ +#define MBEDTLS_OID_ANSI_X9_62 MBEDTLS_OID_ISO_MEMBER_BODIES MBEDTLS_OID_COUNTRY_US \ + MBEDTLS_OID_ORG_ANSI_X9_62 + +/* + * ISO Identified organization OID parts + */ +#define MBEDTLS_OID_ORG_DOD "\x06" /* {dod(6)} */ +#define MBEDTLS_OID_ORG_OIW "\x0e" +#define MBEDTLS_OID_OIW_SECSIG MBEDTLS_OID_ORG_OIW "\x03" +#define MBEDTLS_OID_OIW_SECSIG_ALG MBEDTLS_OID_OIW_SECSIG "\x02" +#define MBEDTLS_OID_OIW_SECSIG_SHA1 MBEDTLS_OID_OIW_SECSIG_ALG "\x1a" +#define MBEDTLS_OID_ORG_CERTICOM "\x81\x04" /* certicom(132) */ +#define MBEDTLS_OID_CERTICOM MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_CERTICOM +#define MBEDTLS_OID_ORG_TELETRUST "\x24" /* teletrust(36) */ +#define MBEDTLS_OID_TELETRUST MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_TELETRUST + +/* + * ISO ITU OID parts + */ +#define MBEDTLS_OID_ORGANIZATION "\x01" /* {organization(1)} */ +#define MBEDTLS_OID_ISO_ITU_US_ORG MBEDTLS_OID_ISO_ITU_COUNTRY MBEDTLS_OID_COUNTRY_US MBEDTLS_OID_ORGANIZATION /* {joint-iso-itu-t(2) country(16) us(840) organization(1)} */ + +#define MBEDTLS_OID_ORG_GOV "\x65" /* {gov(101)} */ +#define MBEDTLS_OID_GOV MBEDTLS_OID_ISO_ITU_US_ORG MBEDTLS_OID_ORG_GOV /* {joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101)} */ + +#define MBEDTLS_OID_ORG_NETSCAPE "\x86\xF8\x42" /* {netscape(113730)} */ +#define MBEDTLS_OID_NETSCAPE MBEDTLS_OID_ISO_ITU_US_ORG MBEDTLS_OID_ORG_NETSCAPE /* Netscape OID {joint-iso-itu-t(2) country(16) us(840) organization(1) netscape(113730)} */ + +/* ISO arc for standard certificate and CRL extensions */ +#define MBEDTLS_OID_ID_CE MBEDTLS_OID_ISO_CCITT_DS "\x1D" /**< id-ce OBJECT IDENTIFIER ::= {joint-iso-ccitt(2) ds(5) 29} */ + +#define MBEDTLS_OID_NIST_ALG MBEDTLS_OID_GOV "\x03\x04" /** { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistAlgorithm(4) */ + +/** + * Private Internet Extensions + * { iso(1) identified-organization(3) dod(6) internet(1) + * security(5) mechanisms(5) pkix(7) } + */ +#define MBEDTLS_OID_INTERNET MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_DOD "\x01" +#define MBEDTLS_OID_PKIX MBEDTLS_OID_INTERNET "\x05\x05\x07" + +/* + * Arc for standard naming attributes + */ +#define MBEDTLS_OID_AT MBEDTLS_OID_ISO_CCITT_DS "\x04" /**< id-at OBJECT IDENTIFIER ::= {joint-iso-ccitt(2) ds(5) 4} */ +#define MBEDTLS_OID_AT_CN MBEDTLS_OID_AT "\x03" /**< id-at-commonName AttributeType:= {id-at 3} */ +#define MBEDTLS_OID_AT_SUR_NAME MBEDTLS_OID_AT "\x04" /**< id-at-surName AttributeType:= {id-at 4} */ +#define MBEDTLS_OID_AT_SERIAL_NUMBER MBEDTLS_OID_AT "\x05" /**< id-at-serialNumber AttributeType:= {id-at 5} */ +#define MBEDTLS_OID_AT_COUNTRY MBEDTLS_OID_AT "\x06" /**< id-at-countryName AttributeType:= {id-at 6} */ +#define MBEDTLS_OID_AT_LOCALITY MBEDTLS_OID_AT "\x07" /**< id-at-locality AttributeType:= {id-at 7} */ +#define MBEDTLS_OID_AT_STATE MBEDTLS_OID_AT "\x08" /**< id-at-state AttributeType:= {id-at 8} */ +#define MBEDTLS_OID_AT_ORGANIZATION MBEDTLS_OID_AT "\x0A" /**< id-at-organizationName AttributeType:= {id-at 10} */ +#define MBEDTLS_OID_AT_ORG_UNIT MBEDTLS_OID_AT "\x0B" /**< id-at-organizationalUnitName AttributeType:= {id-at 11} */ +#define MBEDTLS_OID_AT_TITLE MBEDTLS_OID_AT "\x0C" /**< id-at-title AttributeType:= {id-at 12} */ +#define MBEDTLS_OID_AT_POSTAL_ADDRESS MBEDTLS_OID_AT "\x10" /**< id-at-postalAddress AttributeType:= {id-at 16} */ +#define MBEDTLS_OID_AT_POSTAL_CODE MBEDTLS_OID_AT "\x11" /**< id-at-postalCode AttributeType:= {id-at 17} */ +#define MBEDTLS_OID_AT_GIVEN_NAME MBEDTLS_OID_AT "\x2A" /**< id-at-givenName AttributeType:= {id-at 42} */ +#define MBEDTLS_OID_AT_INITIALS MBEDTLS_OID_AT "\x2B" /**< id-at-initials AttributeType:= {id-at 43} */ +#define MBEDTLS_OID_AT_GENERATION_QUALIFIER MBEDTLS_OID_AT "\x2C" /**< id-at-generationQualifier AttributeType:= {id-at 44} */ +#define MBEDTLS_OID_AT_UNIQUE_IDENTIFIER MBEDTLS_OID_AT "\x2D" /**< id-at-uniqueIdentifier AttributType:= {id-at 45} */ +#define MBEDTLS_OID_AT_DN_QUALIFIER MBEDTLS_OID_AT "\x2E" /**< id-at-dnQualifier AttributeType:= {id-at 46} */ +#define MBEDTLS_OID_AT_PSEUDONYM MBEDTLS_OID_AT "\x41" /**< id-at-pseudonym AttributeType:= {id-at 65} */ + +#define MBEDTLS_OID_UID "\x09\x92\x26\x89\x93\xF2\x2C\x64\x01\x01" /** id-domainComponent AttributeType:= {itu-t(0) data(9) pss(2342) ucl(19200300) pilot(100) pilotAttributeType(1) uid(1)} */ +#define MBEDTLS_OID_DOMAIN_COMPONENT "\x09\x92\x26\x89\x93\xF2\x2C\x64\x01\x19" /** id-domainComponent AttributeType:= {itu-t(0) data(9) pss(2342) ucl(19200300) pilot(100) pilotAttributeType(1) domainComponent(25)} */ + +/* + * OIDs for standard certificate extensions + */ +#define MBEDTLS_OID_AUTHORITY_KEY_IDENTIFIER MBEDTLS_OID_ID_CE "\x23" /**< id-ce-authorityKeyIdentifier OBJECT IDENTIFIER ::= { id-ce 35 } */ +#define MBEDTLS_OID_SUBJECT_KEY_IDENTIFIER MBEDTLS_OID_ID_CE "\x0E" /**< id-ce-subjectKeyIdentifier OBJECT IDENTIFIER ::= { id-ce 14 } */ +#define MBEDTLS_OID_KEY_USAGE MBEDTLS_OID_ID_CE "\x0F" /**< id-ce-keyUsage OBJECT IDENTIFIER ::= { id-ce 15 } */ +#define MBEDTLS_OID_CERTIFICATE_POLICIES MBEDTLS_OID_ID_CE "\x20" /**< id-ce-certificatePolicies OBJECT IDENTIFIER ::= { id-ce 32 } */ +#define MBEDTLS_OID_POLICY_MAPPINGS MBEDTLS_OID_ID_CE "\x21" /**< id-ce-policyMappings OBJECT IDENTIFIER ::= { id-ce 33 } */ +#define MBEDTLS_OID_SUBJECT_ALT_NAME MBEDTLS_OID_ID_CE "\x11" /**< id-ce-subjectAltName OBJECT IDENTIFIER ::= { id-ce 17 } */ +#define MBEDTLS_OID_ISSUER_ALT_NAME MBEDTLS_OID_ID_CE "\x12" /**< id-ce-issuerAltName OBJECT IDENTIFIER ::= { id-ce 18 } */ +#define MBEDTLS_OID_SUBJECT_DIRECTORY_ATTRS MBEDTLS_OID_ID_CE "\x09" /**< id-ce-subjectDirectoryAttributes OBJECT IDENTIFIER ::= { id-ce 9 } */ +#define MBEDTLS_OID_BASIC_CONSTRAINTS MBEDTLS_OID_ID_CE "\x13" /**< id-ce-basicConstraints OBJECT IDENTIFIER ::= { id-ce 19 } */ +#define MBEDTLS_OID_NAME_CONSTRAINTS MBEDTLS_OID_ID_CE "\x1E" /**< id-ce-nameConstraints OBJECT IDENTIFIER ::= { id-ce 30 } */ +#define MBEDTLS_OID_POLICY_CONSTRAINTS MBEDTLS_OID_ID_CE "\x24" /**< id-ce-policyConstraints OBJECT IDENTIFIER ::= { id-ce 36 } */ +#define MBEDTLS_OID_EXTENDED_KEY_USAGE MBEDTLS_OID_ID_CE "\x25" /**< id-ce-extKeyUsage OBJECT IDENTIFIER ::= { id-ce 37 } */ +#define MBEDTLS_OID_CRL_DISTRIBUTION_POINTS MBEDTLS_OID_ID_CE "\x1F" /**< id-ce-cRLDistributionPoints OBJECT IDENTIFIER ::= { id-ce 31 } */ +#define MBEDTLS_OID_INIHIBIT_ANYPOLICY MBEDTLS_OID_ID_CE "\x36" /**< id-ce-inhibitAnyPolicy OBJECT IDENTIFIER ::= { id-ce 54 } */ +#define MBEDTLS_OID_FRESHEST_CRL MBEDTLS_OID_ID_CE "\x2E" /**< id-ce-freshestCRL OBJECT IDENTIFIER ::= { id-ce 46 } */ + +/* + * Certificate policies + */ +#define MBEDTLS_OID_ANY_POLICY MBEDTLS_OID_CERTIFICATE_POLICIES "\x00" /**< anyPolicy OBJECT IDENTIFIER ::= { id-ce-certificatePolicies 0 } */ + +/* + * Netscape certificate extensions + */ +#define MBEDTLS_OID_NS_CERT MBEDTLS_OID_NETSCAPE "\x01" +#define MBEDTLS_OID_NS_CERT_TYPE MBEDTLS_OID_NS_CERT "\x01" +#define MBEDTLS_OID_NS_BASE_URL MBEDTLS_OID_NS_CERT "\x02" +#define MBEDTLS_OID_NS_REVOCATION_URL MBEDTLS_OID_NS_CERT "\x03" +#define MBEDTLS_OID_NS_CA_REVOCATION_URL MBEDTLS_OID_NS_CERT "\x04" +#define MBEDTLS_OID_NS_RENEWAL_URL MBEDTLS_OID_NS_CERT "\x07" +#define MBEDTLS_OID_NS_CA_POLICY_URL MBEDTLS_OID_NS_CERT "\x08" +#define MBEDTLS_OID_NS_SSL_SERVER_NAME MBEDTLS_OID_NS_CERT "\x0C" +#define MBEDTLS_OID_NS_COMMENT MBEDTLS_OID_NS_CERT "\x0D" +#define MBEDTLS_OID_NS_DATA_TYPE MBEDTLS_OID_NETSCAPE "\x02" +#define MBEDTLS_OID_NS_CERT_SEQUENCE MBEDTLS_OID_NS_DATA_TYPE "\x05" + +/* + * OIDs for CRL extensions + */ +#define MBEDTLS_OID_PRIVATE_KEY_USAGE_PERIOD MBEDTLS_OID_ID_CE "\x10" +#define MBEDTLS_OID_CRL_NUMBER MBEDTLS_OID_ID_CE "\x14" /**< id-ce-cRLNumber OBJECT IDENTIFIER ::= { id-ce 20 } */ + +/* + * X.509 v3 Extended key usage OIDs + */ +#define MBEDTLS_OID_ANY_EXTENDED_KEY_USAGE MBEDTLS_OID_EXTENDED_KEY_USAGE "\x00" /**< anyExtendedKeyUsage OBJECT IDENTIFIER ::= { id-ce-extKeyUsage 0 } */ + +#define MBEDTLS_OID_KP MBEDTLS_OID_PKIX "\x03" /**< id-kp OBJECT IDENTIFIER ::= { id-pkix 3 } */ +#define MBEDTLS_OID_SERVER_AUTH MBEDTLS_OID_KP "\x01" /**< id-kp-serverAuth OBJECT IDENTIFIER ::= { id-kp 1 } */ +#define MBEDTLS_OID_CLIENT_AUTH MBEDTLS_OID_KP "\x02" /**< id-kp-clientAuth OBJECT IDENTIFIER ::= { id-kp 2 } */ +#define MBEDTLS_OID_CODE_SIGNING MBEDTLS_OID_KP "\x03" /**< id-kp-codeSigning OBJECT IDENTIFIER ::= { id-kp 3 } */ +#define MBEDTLS_OID_EMAIL_PROTECTION MBEDTLS_OID_KP "\x04" /**< id-kp-emailProtection OBJECT IDENTIFIER ::= { id-kp 4 } */ +#define MBEDTLS_OID_TIME_STAMPING MBEDTLS_OID_KP "\x08" /**< id-kp-timeStamping OBJECT IDENTIFIER ::= { id-kp 8 } */ +#define MBEDTLS_OID_OCSP_SIGNING MBEDTLS_OID_KP "\x09" /**< id-kp-OCSPSigning OBJECT IDENTIFIER ::= { id-kp 9 } */ + +/** + * Wi-SUN Alliance Field Area Network + * { iso(1) identified-organization(3) dod(6) internet(1) + * private(4) enterprise(1) WiSUN(45605) FieldAreaNetwork(1) } + */ +#define MBEDTLS_OID_WISUN_FAN MBEDTLS_OID_INTERNET "\x04\x01\x82\xe4\x25\x01" + +#define MBEDTLS_OID_ON MBEDTLS_OID_PKIX "\x08" /**< id-on OBJECT IDENTIFIER ::= { id-pkix 8 } */ +#define MBEDTLS_OID_ON_HW_MODULE_NAME MBEDTLS_OID_ON "\x04" /**< id-on-hardwareModuleName OBJECT IDENTIFIER ::= { id-on 4 } */ + +/* + * PKCS definition OIDs + */ + +#define MBEDTLS_OID_PKCS MBEDTLS_OID_RSA_COMPANY "\x01" /**< pkcs OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) 1 } */ +#define MBEDTLS_OID_PKCS1 MBEDTLS_OID_PKCS "\x01" /**< pkcs-1 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 1 } */ +#define MBEDTLS_OID_PKCS5 MBEDTLS_OID_PKCS "\x05" /**< pkcs-5 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 5 } */ +#define MBEDTLS_OID_PKCS9 MBEDTLS_OID_PKCS "\x09" /**< pkcs-9 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 9 } */ +#define MBEDTLS_OID_PKCS12 MBEDTLS_OID_PKCS "\x0c" /**< pkcs-12 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 12 } */ + +/* + * PKCS#1 OIDs + */ +#define MBEDTLS_OID_PKCS1_RSA MBEDTLS_OID_PKCS1 "\x01" /**< rsaEncryption OBJECT IDENTIFIER ::= { pkcs-1 1 } */ +#define MBEDTLS_OID_PKCS1_MD5 MBEDTLS_OID_PKCS1 "\x04" /**< md5WithRSAEncryption ::= { pkcs-1 4 } */ +#define MBEDTLS_OID_PKCS1_SHA1 MBEDTLS_OID_PKCS1 "\x05" /**< sha1WithRSAEncryption ::= { pkcs-1 5 } */ +#define MBEDTLS_OID_PKCS1_SHA224 MBEDTLS_OID_PKCS1 "\x0e" /**< sha224WithRSAEncryption ::= { pkcs-1 14 } */ +#define MBEDTLS_OID_PKCS1_SHA256 MBEDTLS_OID_PKCS1 "\x0b" /**< sha256WithRSAEncryption ::= { pkcs-1 11 } */ +#define MBEDTLS_OID_PKCS1_SHA384 MBEDTLS_OID_PKCS1 "\x0c" /**< sha384WithRSAEncryption ::= { pkcs-1 12 } */ +#define MBEDTLS_OID_PKCS1_SHA512 MBEDTLS_OID_PKCS1 "\x0d" /**< sha512WithRSAEncryption ::= { pkcs-1 13 } */ + +#define MBEDTLS_OID_RSA_SHA_OBS "\x2B\x0E\x03\x02\x1D" + +#define MBEDTLS_OID_PKCS9_EMAIL MBEDTLS_OID_PKCS9 "\x01" /**< emailAddress AttributeType ::= { pkcs-9 1 } */ + +/* RFC 4055 */ +#define MBEDTLS_OID_RSASSA_PSS MBEDTLS_OID_PKCS1 "\x0a" /**< id-RSASSA-PSS ::= { pkcs-1 10 } */ +#define MBEDTLS_OID_MGF1 MBEDTLS_OID_PKCS1 "\x08" /**< id-mgf1 ::= { pkcs-1 8 } */ + +/* + * Digest algorithms + */ +#define MBEDTLS_OID_DIGEST_ALG_MD5 MBEDTLS_OID_RSA_COMPANY "\x02\x05" /**< id-mbedtls_md5 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 5 } */ +#define MBEDTLS_OID_DIGEST_ALG_SHA1 MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_OIW_SECSIG_SHA1 /**< id-mbedtls_sha1 OBJECT IDENTIFIER ::= { iso(1) identified-organization(3) oiw(14) secsig(3) algorithms(2) 26 } */ +#define MBEDTLS_OID_DIGEST_ALG_SHA224 MBEDTLS_OID_NIST_ALG "\x02\x04" /**< id-sha224 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 4 } */ +#define MBEDTLS_OID_DIGEST_ALG_SHA256 MBEDTLS_OID_NIST_ALG "\x02\x01" /**< id-mbedtls_sha256 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 1 } */ + +#define MBEDTLS_OID_DIGEST_ALG_SHA384 MBEDTLS_OID_NIST_ALG "\x02\x02" /**< id-sha384 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 2 } */ + +#define MBEDTLS_OID_DIGEST_ALG_SHA512 MBEDTLS_OID_NIST_ALG "\x02\x03" /**< id-mbedtls_sha512 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 3 } */ + +#define MBEDTLS_OID_DIGEST_ALG_RIPEMD160 MBEDTLS_OID_TELETRUST "\x03\x02\x01" /**< id-ripemd160 OBJECT IDENTIFIER :: { iso(1) identified-organization(3) teletrust(36) algorithm(3) hashAlgorithm(2) ripemd160(1) } */ + +#define MBEDTLS_OID_HMAC_SHA1 MBEDTLS_OID_RSA_COMPANY "\x02\x07" /**< id-hmacWithSHA1 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 7 } */ + +#define MBEDTLS_OID_HMAC_SHA224 MBEDTLS_OID_RSA_COMPANY "\x02\x08" /**< id-hmacWithSHA224 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 8 } */ + +#define MBEDTLS_OID_HMAC_SHA256 MBEDTLS_OID_RSA_COMPANY "\x02\x09" /**< id-hmacWithSHA256 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 9 } */ + +#define MBEDTLS_OID_HMAC_SHA384 MBEDTLS_OID_RSA_COMPANY "\x02\x0A" /**< id-hmacWithSHA384 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 10 } */ + +#define MBEDTLS_OID_HMAC_SHA512 MBEDTLS_OID_RSA_COMPANY "\x02\x0B" /**< id-hmacWithSHA512 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 11 } */ + +/* + * Encryption algorithms + */ +#define MBEDTLS_OID_DES_CBC MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_OIW_SECSIG_ALG "\x07" /**< desCBC OBJECT IDENTIFIER ::= { iso(1) identified-organization(3) oiw(14) secsig(3) algorithms(2) 7 } */ +#define MBEDTLS_OID_DES_EDE3_CBC MBEDTLS_OID_RSA_COMPANY "\x03\x07" /**< des-ede3-cbc OBJECT IDENTIFIER ::= { iso(1) member-body(2) -- us(840) rsadsi(113549) encryptionAlgorithm(3) 7 } */ +#define MBEDTLS_OID_AES MBEDTLS_OID_NIST_ALG "\x01" /** aes OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistAlgorithm(4) 1 } */ + +/* + * Key Wrapping algorithms + */ +/* + * RFC 5649 + */ +#define MBEDTLS_OID_AES128_KW MBEDTLS_OID_AES "\x05" /** id-aes128-wrap OBJECT IDENTIFIER ::= { aes 5 } */ +#define MBEDTLS_OID_AES128_KWP MBEDTLS_OID_AES "\x08" /** id-aes128-wrap-pad OBJECT IDENTIFIER ::= { aes 8 } */ +#define MBEDTLS_OID_AES192_KW MBEDTLS_OID_AES "\x19" /** id-aes192-wrap OBJECT IDENTIFIER ::= { aes 25 } */ +#define MBEDTLS_OID_AES192_KWP MBEDTLS_OID_AES "\x1c" /** id-aes192-wrap-pad OBJECT IDENTIFIER ::= { aes 28 } */ +#define MBEDTLS_OID_AES256_KW MBEDTLS_OID_AES "\x2d" /** id-aes256-wrap OBJECT IDENTIFIER ::= { aes 45 } */ +#define MBEDTLS_OID_AES256_KWP MBEDTLS_OID_AES "\x30" /** id-aes256-wrap-pad OBJECT IDENTIFIER ::= { aes 48 } */ +/* + * PKCS#5 OIDs + */ +#define MBEDTLS_OID_PKCS5_PBKDF2 MBEDTLS_OID_PKCS5 "\x0c" /**< id-PBKDF2 OBJECT IDENTIFIER ::= {pkcs-5 12} */ +#define MBEDTLS_OID_PKCS5_PBES2 MBEDTLS_OID_PKCS5 "\x0d" /**< id-PBES2 OBJECT IDENTIFIER ::= {pkcs-5 13} */ +#define MBEDTLS_OID_PKCS5_PBMAC1 MBEDTLS_OID_PKCS5 "\x0e" /**< id-PBMAC1 OBJECT IDENTIFIER ::= {pkcs-5 14} */ + +/* + * PKCS#5 PBES1 algorithms + */ +#define MBEDTLS_OID_PKCS5_PBE_MD5_DES_CBC MBEDTLS_OID_PKCS5 "\x03" /**< pbeWithMD5AndDES-CBC OBJECT IDENTIFIER ::= {pkcs-5 3} */ +#define MBEDTLS_OID_PKCS5_PBE_MD5_RC2_CBC MBEDTLS_OID_PKCS5 "\x06" /**< pbeWithMD5AndRC2-CBC OBJECT IDENTIFIER ::= {pkcs-5 6} */ +#define MBEDTLS_OID_PKCS5_PBE_SHA1_DES_CBC MBEDTLS_OID_PKCS5 "\x0a" /**< pbeWithSHA1AndDES-CBC OBJECT IDENTIFIER ::= {pkcs-5 10} */ +#define MBEDTLS_OID_PKCS5_PBE_SHA1_RC2_CBC MBEDTLS_OID_PKCS5 "\x0b" /**< pbeWithSHA1AndRC2-CBC OBJECT IDENTIFIER ::= {pkcs-5 11} */ + +/* + * PKCS#8 OIDs + */ +#define MBEDTLS_OID_PKCS9_CSR_EXT_REQ MBEDTLS_OID_PKCS9 "\x0e" /**< extensionRequest OBJECT IDENTIFIER ::= {pkcs-9 14} */ + +/* + * PKCS#12 PBE OIDs + */ +#define MBEDTLS_OID_PKCS12_PBE MBEDTLS_OID_PKCS12 "\x01" /**< pkcs-12PbeIds OBJECT IDENTIFIER ::= {pkcs-12 1} */ + +#define MBEDTLS_OID_PKCS12_PBE_SHA1_DES3_EDE_CBC MBEDTLS_OID_PKCS12_PBE "\x03" /**< pbeWithSHAAnd3-KeyTripleDES-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 3} */ +#define MBEDTLS_OID_PKCS12_PBE_SHA1_DES2_EDE_CBC MBEDTLS_OID_PKCS12_PBE "\x04" /**< pbeWithSHAAnd2-KeyTripleDES-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 4} */ +#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_128_CBC MBEDTLS_OID_PKCS12_PBE "\x05" /**< pbeWithSHAAnd128BitRC2-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 5} */ +#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_40_CBC MBEDTLS_OID_PKCS12_PBE "\x06" /**< pbeWithSHAAnd40BitRC2-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 6} */ + +/* + * EC key algorithms from RFC 5480 + */ + +/* id-ecPublicKey OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) keyType(2) 1 } */ +#define MBEDTLS_OID_EC_ALG_UNRESTRICTED MBEDTLS_OID_ANSI_X9_62 "\x02\01" + +/* id-ecDH OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) + * schemes(1) ecdh(12) } */ +#define MBEDTLS_OID_EC_ALG_ECDH MBEDTLS_OID_CERTICOM "\x01\x0c" + +/* + * ECParameters namedCurve identifiers, from RFC 5480, RFC 5639, and SEC2 + */ + +/* secp192r1 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) curves(3) prime(1) 1 } */ +#define MBEDTLS_OID_EC_GRP_SECP192R1 MBEDTLS_OID_ANSI_X9_62 "\x03\x01\x01" + +/* secp224r1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 33 } */ +#define MBEDTLS_OID_EC_GRP_SECP224R1 MBEDTLS_OID_CERTICOM "\x00\x21" + +/* secp256r1 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) curves(3) prime(1) 7 } */ +#define MBEDTLS_OID_EC_GRP_SECP256R1 MBEDTLS_OID_ANSI_X9_62 "\x03\x01\x07" + +/* secp384r1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 34 } */ +#define MBEDTLS_OID_EC_GRP_SECP384R1 MBEDTLS_OID_CERTICOM "\x00\x22" + +/* secp521r1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 35 } */ +#define MBEDTLS_OID_EC_GRP_SECP521R1 MBEDTLS_OID_CERTICOM "\x00\x23" + +/* secp192k1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 31 } */ +#define MBEDTLS_OID_EC_GRP_SECP192K1 MBEDTLS_OID_CERTICOM "\x00\x1f" + +/* secp224k1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 32 } */ +#define MBEDTLS_OID_EC_GRP_SECP224K1 MBEDTLS_OID_CERTICOM "\x00\x20" + +/* secp256k1 OBJECT IDENTIFIER ::= { + * iso(1) identified-organization(3) certicom(132) curve(0) 10 } */ +#define MBEDTLS_OID_EC_GRP_SECP256K1 MBEDTLS_OID_CERTICOM "\x00\x0a" + +/* RFC 5639 4.1 + * ecStdCurvesAndGeneration OBJECT IDENTIFIER::= {iso(1) + * identified-organization(3) teletrust(36) algorithm(3) signature- + * algorithm(3) ecSign(2) 8} + * ellipticCurve OBJECT IDENTIFIER ::= {ecStdCurvesAndGeneration 1} + * versionOne OBJECT IDENTIFIER ::= {ellipticCurve 1} */ +#define MBEDTLS_OID_EC_BRAINPOOL_V1 MBEDTLS_OID_TELETRUST "\x03\x03\x02\x08\x01\x01" + +/* brainpoolP256r1 OBJECT IDENTIFIER ::= {versionOne 7} */ +#define MBEDTLS_OID_EC_GRP_BP256R1 MBEDTLS_OID_EC_BRAINPOOL_V1 "\x07" + +/* brainpoolP384r1 OBJECT IDENTIFIER ::= {versionOne 11} */ +#define MBEDTLS_OID_EC_GRP_BP384R1 MBEDTLS_OID_EC_BRAINPOOL_V1 "\x0B" + +/* brainpoolP512r1 OBJECT IDENTIFIER ::= {versionOne 13} */ +#define MBEDTLS_OID_EC_GRP_BP512R1 MBEDTLS_OID_EC_BRAINPOOL_V1 "\x0D" + +/* + * SEC1 C.1 + * + * prime-field OBJECT IDENTIFIER ::= { id-fieldType 1 } + * id-fieldType OBJECT IDENTIFIER ::= { ansi-X9-62 fieldType(1)} + */ +#define MBEDTLS_OID_ANSI_X9_62_FIELD_TYPE MBEDTLS_OID_ANSI_X9_62 "\x01" +#define MBEDTLS_OID_ANSI_X9_62_PRIME_FIELD MBEDTLS_OID_ANSI_X9_62_FIELD_TYPE "\x01" + +/* + * ECDSA signature identifiers, from RFC 5480 + */ +#define MBEDTLS_OID_ANSI_X9_62_SIG MBEDTLS_OID_ANSI_X9_62 "\x04" /* signatures(4) */ +#define MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 MBEDTLS_OID_ANSI_X9_62_SIG "\x03" /* ecdsa-with-SHA2(3) */ + +/* ecdsa-with-SHA1 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) 1 } */ +#define MBEDTLS_OID_ECDSA_SHA1 MBEDTLS_OID_ANSI_X9_62_SIG "\x01" + +/* ecdsa-with-SHA224 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) + * ecdsa-with-SHA2(3) 1 } */ +#define MBEDTLS_OID_ECDSA_SHA224 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x01" + +/* ecdsa-with-SHA256 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) + * ecdsa-with-SHA2(3) 2 } */ +#define MBEDTLS_OID_ECDSA_SHA256 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x02" + +/* ecdsa-with-SHA384 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) + * ecdsa-with-SHA2(3) 3 } */ +#define MBEDTLS_OID_ECDSA_SHA384 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x03" + +/* ecdsa-with-SHA512 OBJECT IDENTIFIER ::= { + * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) + * ecdsa-with-SHA2(3) 4 } */ +#define MBEDTLS_OID_ECDSA_SHA512 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x04" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Base OID descriptor structure + */ +typedef struct mbedtls_oid_descriptor_t +{ + const char *MBEDTLS_PRIVATE(asn1); /*!< OID ASN.1 representation */ + size_t MBEDTLS_PRIVATE(asn1_len); /*!< length of asn1 */ +#if !defined(MBEDTLS_X509_REMOVE_INFO) + const char *MBEDTLS_PRIVATE(name); /*!< official name (e.g. from RFC) */ + const char *MBEDTLS_PRIVATE(description); /*!< human friendly description */ +#endif +} mbedtls_oid_descriptor_t; + +/** + * \brief Translate an ASN.1 OID into its numeric representation + * (e.g. "\x2A\x86\x48\x86\xF7\x0D" into "1.2.840.113549") + * + * \param buf buffer to put representation in + * \param size size of the buffer + * \param oid OID to translate + * + * \return Length of the string written (excluding final NULL) or + * MBEDTLS_ERR_OID_BUF_TOO_SMALL in case of error + */ +int mbedtls_oid_get_numeric_string( char *buf, size_t size, const mbedtls_asn1_buf *oid ); + +/** + * \brief Translate an X.509 extension OID into local values + * + * \param oid OID to use + * \param ext_type place to store the extension type + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_x509_ext_type( const mbedtls_asn1_buf *oid, int *ext_type ); + +/** + * \brief Translate an X.509 attribute type OID into the short name + * (e.g. the OID for an X520 Common Name into "CN") + * + * \param oid OID to use + * \param short_name place to store the string pointer + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_attr_short_name( const mbedtls_asn1_buf *oid, const char **short_name ); + +/** + * \brief Translate PublicKeyAlgorithm OID into pk_type + * + * \param oid OID to use + * \param pk_alg place to store public key algorithm + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_pk_alg( const mbedtls_asn1_buf *oid, mbedtls_pk_type_t *pk_alg ); + +/** + * \brief Translate pk_type into PublicKeyAlgorithm OID + * + * \param pk_alg Public key type to look for + * \param oid place to store ASN.1 OID string pointer + * \param olen length of the OID + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_oid_by_pk_alg( mbedtls_pk_type_t pk_alg, + const char **oid, size_t *olen ); + +#if defined(MBEDTLS_ECP_C) +/** + * \brief Translate NamedCurve OID into an EC group identifier + * + * \param oid OID to use + * \param grp_id place to store group id + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_ec_grp( const mbedtls_asn1_buf *oid, mbedtls_ecp_group_id *grp_id ); + +/** + * \brief Translate EC group identifier into NamedCurve OID + * + * \param grp_id EC group identifier + * \param oid place to store ASN.1 OID string pointer + * \param olen length of the OID + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_oid_by_ec_grp( mbedtls_ecp_group_id grp_id, + const char **oid, size_t *olen ); +#endif /* MBEDTLS_ECP_C */ + +#if defined(MBEDTLS_MD_C) +/** + * \brief Translate SignatureAlgorithm OID into md_type and pk_type + * + * \param oid OID to use + * \param md_alg place to store message digest algorithm + * \param pk_alg place to store public key algorithm + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_sig_alg( const mbedtls_asn1_buf *oid, + mbedtls_md_type_t *md_alg, mbedtls_pk_type_t *pk_alg ); + +/** + * \brief Translate SignatureAlgorithm OID into description + * + * \param oid OID to use + * \param desc place to store string pointer + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_sig_alg_desc( const mbedtls_asn1_buf *oid, const char **desc ); + +/** + * \brief Translate md_type and pk_type into SignatureAlgorithm OID + * + * \param md_alg message digest algorithm + * \param pk_alg public key algorithm + * \param oid place to store ASN.1 OID string pointer + * \param olen length of the OID + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_oid_by_sig_alg( mbedtls_pk_type_t pk_alg, mbedtls_md_type_t md_alg, + const char **oid, size_t *olen ); + +/** + * \brief Translate hash algorithm OID into md_type + * + * \param oid OID to use + * \param md_alg place to store message digest algorithm + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_md_alg( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_alg ); + +/** + * \brief Translate hmac algorithm OID into md_type + * + * \param oid OID to use + * \param md_hmac place to store message hmac algorithm + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_md_hmac( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_hmac ); +#endif /* MBEDTLS_MD_C */ + +#if !defined(MBEDTLS_X509_REMOVE_INFO) +/** + * \brief Translate Extended Key Usage OID into description + * + * \param oid OID to use + * \param desc place to store string pointer + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_extended_key_usage( const mbedtls_asn1_buf *oid, const char **desc ); +#endif + +/** + * \brief Translate certificate policies OID into description + * + * \param oid OID to use + * \param desc place to store string pointer + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_certificate_policies( const mbedtls_asn1_buf *oid, const char **desc ); + +/** + * \brief Translate md_type into hash algorithm OID + * + * \param md_alg message digest algorithm + * \param oid place to store ASN.1 OID string pointer + * \param olen length of the OID + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_oid_by_md( mbedtls_md_type_t md_alg, const char **oid, size_t *olen ); + +#if defined(MBEDTLS_CIPHER_C) +/** + * \brief Translate encryption algorithm OID into cipher_type + * + * \param oid OID to use + * \param cipher_alg place to store cipher algorithm + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_cipher_alg( const mbedtls_asn1_buf *oid, mbedtls_cipher_type_t *cipher_alg ); +#endif /* MBEDTLS_CIPHER_C */ + +#if defined(MBEDTLS_PKCS12_C) +/** + * \brief Translate PKCS#12 PBE algorithm OID into md_type and + * cipher_type + * + * \param oid OID to use + * \param md_alg place to store message digest algorithm + * \param cipher_alg place to store cipher algorithm + * + * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND + */ +int mbedtls_oid_get_pkcs12_pbe_alg( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_alg, + mbedtls_cipher_type_t *cipher_alg ); +#endif /* MBEDTLS_PKCS12_C */ + +#ifdef __cplusplus +} +#endif + +#endif /* oid.h */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/pk.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/pk.h new file mode 100644 index 0000000..f3553cc --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/pk.h @@ -0,0 +1,890 @@ +/** + * \file pk.h + * + * \brief Public Key abstraction layer + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_PK_H +#define MBEDTLS_PK_H +#include "mbedtls/private_access.h" + +#include "mbedtls/build_info.h" + +#include "mbedtls/md.h" + +#if defined(MBEDTLS_RSA_C) +#include "mbedtls/rsa.h" +#endif + +#if defined(MBEDTLS_ECP_C) +#include "mbedtls/ecp.h" +#endif + +#if defined(MBEDTLS_ECDSA_C) +#include "mbedtls/ecdsa.h" +#endif + +#if defined(MBEDTLS_USE_PSA_CRYPTO) +#include "psa/crypto.h" +#endif + +#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ + !defined(inline) && !defined(__cplusplus) +#define inline __inline +#endif + +#define MBEDTLS_ERR_PK_ALLOC_FAILED -0x3F80 /**< Memory allocation failed. */ +#define MBEDTLS_ERR_PK_TYPE_MISMATCH -0x3F00 /**< Type mismatch, eg attempt to encrypt with an ECDSA key */ +#define MBEDTLS_ERR_PK_BAD_INPUT_DATA -0x3E80 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_PK_FILE_IO_ERROR -0x3E00 /**< Read/write of file failed. */ +#define MBEDTLS_ERR_PK_KEY_INVALID_VERSION -0x3D80 /**< Unsupported key version */ +#define MBEDTLS_ERR_PK_KEY_INVALID_FORMAT -0x3D00 /**< Invalid key tag or value. */ +#define MBEDTLS_ERR_PK_UNKNOWN_PK_ALG -0x3C80 /**< Key algorithm is unsupported (only RSA and EC are supported). */ +#define MBEDTLS_ERR_PK_PASSWORD_REQUIRED -0x3C00 /**< Private key password can't be empty. */ +#define MBEDTLS_ERR_PK_PASSWORD_MISMATCH -0x3B80 /**< Given private key password does not allow for correct decryption. */ +#define MBEDTLS_ERR_PK_INVALID_PUBKEY -0x3B00 /**< The pubkey tag or value is invalid (only RSA and EC are supported). */ +#define MBEDTLS_ERR_PK_INVALID_ALG -0x3A80 /**< The algorithm tag or value is invalid. */ +#define MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE -0x3A00 /**< Elliptic curve is unsupported (only NIST curves are supported). */ +#define MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE -0x3980 /**< Unavailable feature, e.g. RSA disabled for RSA key. */ +#define MBEDTLS_ERR_PK_SIG_LEN_MISMATCH -0x3900 /**< The buffer contains a valid signature followed by more data. */ +#define MBEDTLS_ERR_PK_BUFFER_TOO_SMALL -0x3880 /**< The output buffer is too small. */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Public key types + */ +typedef enum { + MBEDTLS_PK_NONE=0, + MBEDTLS_PK_RSA, + MBEDTLS_PK_ECKEY, + MBEDTLS_PK_ECKEY_DH, + MBEDTLS_PK_ECDSA, + MBEDTLS_PK_RSA_ALT, + MBEDTLS_PK_RSASSA_PSS, + MBEDTLS_PK_OPAQUE, +} mbedtls_pk_type_t; + +/** + * \brief Options for RSASSA-PSS signature verification. + * See \c mbedtls_rsa_rsassa_pss_verify_ext() + */ +typedef struct mbedtls_pk_rsassa_pss_options +{ + mbedtls_md_type_t MBEDTLS_PRIVATE(mgf1_hash_id); + int MBEDTLS_PRIVATE(expected_salt_len); + +} mbedtls_pk_rsassa_pss_options; + +/** + * \brief Maximum size of a signature made by mbedtls_pk_sign(). + */ +/* We need to set MBEDTLS_PK_SIGNATURE_MAX_SIZE to the maximum signature + * size among the supported signature types. Do it by starting at 0, + * then incrementally increasing to be large enough for each supported + * signature mechanism. + * + * The resulting value can be 0, for example if MBEDTLS_ECDH_C is enabled + * (which allows the pk module to be included) but neither MBEDTLS_ECDSA_C + * nor MBEDTLS_RSA_C nor any opaque signature mechanism (PSA or RSA_ALT). + */ +#define MBEDTLS_PK_SIGNATURE_MAX_SIZE 0 + +#if ( defined(MBEDTLS_RSA_C) || defined(MBEDTLS_PK_RSA_ALT_SUPPORT) ) && \ + MBEDTLS_MPI_MAX_SIZE > MBEDTLS_PK_SIGNATURE_MAX_SIZE +/* For RSA, the signature can be as large as the bignum module allows. + * For RSA_ALT, the signature size is not necessarily tied to what the + * bignum module can do, but in the absence of any specific setting, + * we use that (rsa_alt_sign_wrap in library/pk_wrap.h will check). */ +#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE +#define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_MPI_MAX_SIZE +#endif + +#if defined(MBEDTLS_ECDSA_C) && \ + MBEDTLS_ECDSA_MAX_LEN > MBEDTLS_PK_SIGNATURE_MAX_SIZE +/* For ECDSA, the ecdsa module exports a constant for the maximum + * signature size. */ +#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE +#define MBEDTLS_PK_SIGNATURE_MAX_SIZE MBEDTLS_ECDSA_MAX_LEN +#endif + +#if defined(MBEDTLS_USE_PSA_CRYPTO) +#if PSA_SIGNATURE_MAX_SIZE > MBEDTLS_PK_SIGNATURE_MAX_SIZE +/* PSA_SIGNATURE_MAX_SIZE is the maximum size of a signature made + * through the PSA API in the PSA representation. */ +#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE +#define MBEDTLS_PK_SIGNATURE_MAX_SIZE PSA_SIGNATURE_MAX_SIZE +#endif + +#if PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE + 11 > MBEDTLS_PK_SIGNATURE_MAX_SIZE +/* The Mbed TLS representation is different for ECDSA signatures: + * PSA uses the raw concatenation of r and s, + * whereas Mbed TLS uses the ASN.1 representation (SEQUENCE of two INTEGERs). + * Add the overhead of ASN.1: up to (1+2) + 2 * (1+2+1) for the + * types, lengths (represented by up to 2 bytes), and potential leading + * zeros of the INTEGERs and the SEQUENCE. */ +#undef MBEDTLS_PK_SIGNATURE_MAX_SIZE +#define MBEDTLS_PK_SIGNATURE_MAX_SIZE ( PSA_VENDOR_ECDSA_SIGNATURE_MAX_SIZE + 11 ) +#endif +#endif /* defined(MBEDTLS_USE_PSA_CRYPTO) */ + +/** + * \brief Types for interfacing with the debug module + */ +typedef enum +{ + MBEDTLS_PK_DEBUG_NONE = 0, + MBEDTLS_PK_DEBUG_MPI, + MBEDTLS_PK_DEBUG_ECP, +} mbedtls_pk_debug_type; + +/** + * \brief Item to send to the debug module + */ +typedef struct mbedtls_pk_debug_item +{ + mbedtls_pk_debug_type MBEDTLS_PRIVATE(type); + const char *MBEDTLS_PRIVATE(name); + void *MBEDTLS_PRIVATE(value); +} mbedtls_pk_debug_item; + +/** Maximum number of item send for debugging, plus 1 */ +#define MBEDTLS_PK_DEBUG_MAX_ITEMS 3 + +/** + * \brief Public key information and operations + */ +typedef struct mbedtls_pk_info_t mbedtls_pk_info_t; + +/** + * \brief Public key container + */ +typedef struct mbedtls_pk_context +{ + const mbedtls_pk_info_t * MBEDTLS_PRIVATE(pk_info); /**< Public key information */ + void * MBEDTLS_PRIVATE(pk_ctx); /**< Underlying public key context */ +} mbedtls_pk_context; + +#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) +/** + * \brief Context for resuming operations + */ +typedef struct +{ + const mbedtls_pk_info_t * MBEDTLS_PRIVATE(pk_info); /**< Public key information */ + void * MBEDTLS_PRIVATE(rs_ctx); /**< Underlying restart context */ +} mbedtls_pk_restart_ctx; +#else /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */ +/* Now we can declare functions that take a pointer to that */ +typedef void mbedtls_pk_restart_ctx; +#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */ + +#if defined(MBEDTLS_RSA_C) +/** + * Quick access to an RSA context inside a PK context. + * + * \warning You must make sure the PK context actually holds an RSA context + * before using this function! + */ +static inline mbedtls_rsa_context *mbedtls_pk_rsa( const mbedtls_pk_context pk ) +{ + return( (mbedtls_rsa_context *) (pk).MBEDTLS_PRIVATE(pk_ctx) ); +} +#endif /* MBEDTLS_RSA_C */ + +#if defined(MBEDTLS_ECP_C) +/** + * Quick access to an EC context inside a PK context. + * + * \warning You must make sure the PK context actually holds an EC context + * before using this function! + */ +static inline mbedtls_ecp_keypair *mbedtls_pk_ec( const mbedtls_pk_context pk ) +{ + return( (mbedtls_ecp_keypair *) (pk).MBEDTLS_PRIVATE(pk_ctx) ); +} +#endif /* MBEDTLS_ECP_C */ + +#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT) +/** + * \brief Types for RSA-alt abstraction + */ +typedef int (*mbedtls_pk_rsa_alt_decrypt_func)( void *ctx, size_t *olen, + const unsigned char *input, unsigned char *output, + size_t output_max_len ); +typedef int (*mbedtls_pk_rsa_alt_sign_func)( void *ctx, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng, + mbedtls_md_type_t md_alg, unsigned int hashlen, + const unsigned char *hash, unsigned char *sig ); +typedef size_t (*mbedtls_pk_rsa_alt_key_len_func)( void *ctx ); +#endif /* MBEDTLS_PK_RSA_ALT_SUPPORT */ + +/** + * \brief Return information associated with the given PK type + * + * \param pk_type PK type to search for. + * + * \return The PK info associated with the type or NULL if not found. + */ +const mbedtls_pk_info_t *mbedtls_pk_info_from_type( mbedtls_pk_type_t pk_type ); + +/** + * \brief Initialize a #mbedtls_pk_context (as NONE). + * + * \param ctx The context to initialize. + * This must not be \c NULL. + */ +void mbedtls_pk_init( mbedtls_pk_context *ctx ); + +/** + * \brief Free the components of a #mbedtls_pk_context. + * + * \param ctx The context to clear. It must have been initialized. + * If this is \c NULL, this function does nothing. + * + * \note For contexts that have been set up with + * mbedtls_pk_setup_opaque(), this does not free the underlying + * PSA key and you still need to call psa_destroy_key() + * independently if you want to destroy that key. + */ +void mbedtls_pk_free( mbedtls_pk_context *ctx ); + +#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) +/** + * \brief Initialize a restart context + * + * \param ctx The context to initialize. + * This must not be \c NULL. + */ +void mbedtls_pk_restart_init( mbedtls_pk_restart_ctx *ctx ); + +/** + * \brief Free the components of a restart context + * + * \param ctx The context to clear. It must have been initialized. + * If this is \c NULL, this function does nothing. + */ +void mbedtls_pk_restart_free( mbedtls_pk_restart_ctx *ctx ); +#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */ + +/** + * \brief Initialize a PK context with the information given + * and allocates the type-specific PK subcontext. + * + * \param ctx Context to initialize. It must not have been set + * up yet (type #MBEDTLS_PK_NONE). + * \param info Information to use + * + * \return 0 on success, + * MBEDTLS_ERR_PK_BAD_INPUT_DATA on invalid input, + * MBEDTLS_ERR_PK_ALLOC_FAILED on allocation failure. + * + * \note For contexts holding an RSA-alt key, use + * \c mbedtls_pk_setup_rsa_alt() instead. + */ +int mbedtls_pk_setup( mbedtls_pk_context *ctx, const mbedtls_pk_info_t *info ); + +#if defined(MBEDTLS_USE_PSA_CRYPTO) +/** + * \brief Initialize a PK context to wrap a PSA key. + * + * \note This function replaces mbedtls_pk_setup() for contexts + * that wrap a (possibly opaque) PSA key instead of + * storing and manipulating the key material directly. + * + * \param ctx The context to initialize. It must be empty (type NONE). + * \param key The PSA key to wrap, which must hold an ECC key pair + * (see notes below). + * + * \note The wrapped key must remain valid as long as the + * wrapping PK context is in use, that is at least between + * the point this function is called and the point + * mbedtls_pk_free() is called on this context. The wrapped + * key might then be independently used or destroyed. + * + * \note This function is currently only available for ECC key + * pairs (that is, ECC keys containing private key material). + * Support for other key types may be added later. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_PK_BAD_INPUT_DATA on invalid input + * (context already used, invalid key identifier). + * \return #MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE if the key is not an + * ECC key pair. + * \return #MBEDTLS_ERR_PK_ALLOC_FAILED on allocation failure. + */ +int mbedtls_pk_setup_opaque( mbedtls_pk_context *ctx, + const psa_key_id_t key ); +#endif /* MBEDTLS_USE_PSA_CRYPTO */ + +#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT) +/** + * \brief Initialize an RSA-alt context + * + * \param ctx Context to initialize. It must not have been set + * up yet (type #MBEDTLS_PK_NONE). + * \param key RSA key pointer + * \param decrypt_func Decryption function + * \param sign_func Signing function + * \param key_len_func Function returning key length in bytes + * + * \return 0 on success, or MBEDTLS_ERR_PK_BAD_INPUT_DATA if the + * context wasn't already initialized as RSA_ALT. + * + * \note This function replaces \c mbedtls_pk_setup() for RSA-alt. + */ +int mbedtls_pk_setup_rsa_alt( mbedtls_pk_context *ctx, void * key, + mbedtls_pk_rsa_alt_decrypt_func decrypt_func, + mbedtls_pk_rsa_alt_sign_func sign_func, + mbedtls_pk_rsa_alt_key_len_func key_len_func ); +#endif /* MBEDTLS_PK_RSA_ALT_SUPPORT */ + +/** + * \brief Get the size in bits of the underlying key + * + * \param ctx The context to query. It must have been initialized. + * + * \return Key size in bits, or 0 on error + */ +size_t mbedtls_pk_get_bitlen( const mbedtls_pk_context *ctx ); + +/** + * \brief Get the length in bytes of the underlying key + * + * \param ctx The context to query. It must have been initialized. + * + * \return Key length in bytes, or 0 on error + */ +static inline size_t mbedtls_pk_get_len( const mbedtls_pk_context *ctx ) +{ + return( ( mbedtls_pk_get_bitlen( ctx ) + 7 ) / 8 ); +} + +/** + * \brief Tell if a context can do the operation given by type + * + * \param ctx The context to query. It must have been initialized. + * \param type The desired type. + * + * \return 1 if the context can do operations on the given type. + * \return 0 if the context cannot do the operations on the given + * type. This is always the case for a context that has + * been initialized but not set up, or that has been + * cleared with mbedtls_pk_free(). + */ +int mbedtls_pk_can_do( const mbedtls_pk_context *ctx, mbedtls_pk_type_t type ); + +/** + * \brief Verify signature (including padding if relevant). + * + * \param ctx The PK context to use. It must have been set up. + * \param md_alg Hash algorithm used. + * This can be #MBEDTLS_MD_NONE if the signature algorithm + * does not rely on a hash algorithm (non-deterministic + * ECDSA, RSA PKCS#1 v1.5). + * For PKCS#1 v1.5, if \p md_alg is #MBEDTLS_MD_NONE, then + * \p hash is the DigestInfo structure used by RFC 8017 + * §9.2 steps 3–6. If \p md_alg is a valid hash + * algorithm then \p hash is the digest itself, and this + * function calculates the DigestInfo encoding internally. + * \param hash Hash of the message to sign + * \param hash_len Hash length + * \param sig Signature to verify + * \param sig_len Signature length + * + * \return 0 on success (signature is valid), + * #MBEDTLS_ERR_PK_SIG_LEN_MISMATCH if there is a valid + * signature in sig but its length is less than \p siglen, + * or a specific error code. + * + * \note For RSA keys, the default padding type is PKCS#1 v1.5. + * Use \c mbedtls_pk_verify_ext( MBEDTLS_PK_RSASSA_PSS, ... ) + * to verify RSASSA_PSS signatures. + */ +int mbedtls_pk_verify( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len ); + +/** + * \brief Restartable version of \c mbedtls_pk_verify() + * + * \note Performs the same job as \c mbedtls_pk_verify(), but can + * return early and restart according to the limit set with + * \c mbedtls_ecp_set_max_ops() to reduce blocking for ECC + * operations. For RSA, same as \c mbedtls_pk_verify(). + * + * \param ctx The PK context to use. It must have been set up. + * \param md_alg Hash algorithm used (see notes) + * \param hash Hash of the message to sign + * \param hash_len Hash length or 0 (see notes) + * \param sig Signature to verify + * \param sig_len Signature length + * \param rs_ctx Restart context (NULL to disable restart) + * + * \return See \c mbedtls_pk_verify(), or + * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of + * operations was reached: see \c mbedtls_ecp_set_max_ops(). + */ +int mbedtls_pk_verify_restartable( mbedtls_pk_context *ctx, + mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len, + mbedtls_pk_restart_ctx *rs_ctx ); + +/** + * \brief Verify signature, with options. + * (Includes verification of the padding depending on type.) + * + * \param type Signature type (inc. possible padding type) to verify + * \param options Pointer to type-specific options, or NULL + * \param ctx The PK context to use. It must have been set up. + * \param md_alg Hash algorithm used (see notes) + * \param hash Hash of the message to sign + * \param hash_len Hash length or 0 (see notes) + * \param sig Signature to verify + * \param sig_len Signature length + * + * \return 0 on success (signature is valid), + * #MBEDTLS_ERR_PK_TYPE_MISMATCH if the PK context can't be + * used for this type of signatures, + * #MBEDTLS_ERR_PK_SIG_LEN_MISMATCH if there is a valid + * signature in sig but its length is less than \p siglen, + * or a specific error code. + * + * \note If hash_len is 0, then the length associated with md_alg + * is used instead, or an error returned if it is invalid. + * + * \note md_alg may be MBEDTLS_MD_NONE, only if hash_len != 0 + * + * \note If type is MBEDTLS_PK_RSASSA_PSS, then options must point + * to a mbedtls_pk_rsassa_pss_options structure, + * otherwise it must be NULL. + */ +int mbedtls_pk_verify_ext( mbedtls_pk_type_t type, const void *options, + mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + const unsigned char *sig, size_t sig_len ); + +/** + * \brief Make signature, including padding if relevant. + * + * \param ctx The PK context to use. It must have been set up + * with a private key. + * \param md_alg Hash algorithm used (see notes) + * \param hash Hash of the message to sign + * \param hash_len Hash length + * \param sig Place to write the signature. + * It must have enough room for the signature. + * #MBEDTLS_PK_SIGNATURE_MAX_SIZE is always enough. + * You may use a smaller buffer if it is large enough + * given the key type. + * \param sig_size The size of the \p sig buffer in bytes. + * \param sig_len On successful return, + * the number of bytes written to \p sig. + * \param f_rng RNG function, must not be \c NULL. + * \param p_rng RNG parameter + * + * \return 0 on success, or a specific error code. + * + * \note For RSA keys, the default padding type is PKCS#1 v1.5. + * There is no interface in the PK module to make RSASSA-PSS + * signatures yet. + * + * \note For RSA, md_alg may be MBEDTLS_MD_NONE if hash_len != 0. + * For ECDSA, md_alg may never be MBEDTLS_MD_NONE. + */ +int mbedtls_pk_sign( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + unsigned char *sig, size_t sig_size, size_t *sig_len, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** + * \brief Restartable version of \c mbedtls_pk_sign() + * + * \note Performs the same job as \c mbedtls_pk_sign(), but can + * return early and restart according to the limit set with + * \c mbedtls_ecp_set_max_ops() to reduce blocking for ECC + * operations. For RSA, same as \c mbedtls_pk_sign(). + * + * \param ctx The PK context to use. It must have been set up + * with a private key. + * \param md_alg Hash algorithm used (see notes for mbedtls_pk_sign()) + * \param hash Hash of the message to sign + * \param hash_len Hash length + * \param sig Place to write the signature. + * It must have enough room for the signature. + * #MBEDTLS_PK_SIGNATURE_MAX_SIZE is always enough. + * You may use a smaller buffer if it is large enough + * given the key type. + * \param sig_size The size of the \p sig buffer in bytes. + * \param sig_len On successful return, + * the number of bytes written to \p sig. + * \param f_rng RNG function, must not be \c NULL. + * \param p_rng RNG parameter + * \param rs_ctx Restart context (NULL to disable restart) + * + * \return See \c mbedtls_pk_sign(). + * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of + * operations was reached: see \c mbedtls_ecp_set_max_ops(). + */ +int mbedtls_pk_sign_restartable( mbedtls_pk_context *ctx, + mbedtls_md_type_t md_alg, + const unsigned char *hash, size_t hash_len, + unsigned char *sig, size_t sig_size, size_t *sig_len, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng, + mbedtls_pk_restart_ctx *rs_ctx ); + +/** + * \brief Decrypt message (including padding if relevant). + * + * \param ctx The PK context to use. It must have been set up + * with a private key. + * \param input Input to decrypt + * \param ilen Input size + * \param output Decrypted output + * \param olen Decrypted message length + * \param osize Size of the output buffer + * \param f_rng RNG function, must not be \c NULL. + * \param p_rng RNG parameter + * + * \note For RSA keys, the default padding type is PKCS#1 v1.5. + * + * \return 0 on success, or a specific error code. + */ +int mbedtls_pk_decrypt( mbedtls_pk_context *ctx, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, size_t osize, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** + * \brief Encrypt message (including padding if relevant). + * + * \param ctx The PK context to use. It must have been set up. + * \param input Message to encrypt + * \param ilen Message size + * \param output Encrypted output + * \param olen Encrypted output length + * \param osize Size of the output buffer + * \param f_rng RNG function, must not be \c NULL. + * \param p_rng RNG parameter + * + * \note \p f_rng is used for padding generation. + * + * \note For RSA keys, the default padding type is PKCS#1 v1.5. + * + * \return 0 on success, or a specific error code. + */ +int mbedtls_pk_encrypt( mbedtls_pk_context *ctx, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, size_t osize, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** + * \brief Check if a public-private pair of keys matches. + * + * \param pub Context holding a public key. + * \param prv Context holding a private (and public) key. + * \param f_rng RNG function, must not be \c NULL. + * \param p_rng RNG parameter + * + * \return \c 0 on success (keys were checked and match each other). + * \return #MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE if the keys could not + * be checked - in that case they may or may not match. + * \return #MBEDTLS_ERR_PK_BAD_INPUT_DATA if a context is invalid. + * \return Another non-zero value if the keys do not match. + */ +int mbedtls_pk_check_pair( const mbedtls_pk_context *pub, + const mbedtls_pk_context *prv, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng ); + +/** + * \brief Export debug information + * + * \param ctx The PK context to use. It must have been initialized. + * \param items Place to write debug items + * + * \return 0 on success or MBEDTLS_ERR_PK_BAD_INPUT_DATA + */ +int mbedtls_pk_debug( const mbedtls_pk_context *ctx, mbedtls_pk_debug_item *items ); + +/** + * \brief Access the type name + * + * \param ctx The PK context to use. It must have been initialized. + * + * \return Type name on success, or "invalid PK" + */ +const char * mbedtls_pk_get_name( const mbedtls_pk_context *ctx ); + +/** + * \brief Get the key type + * + * \param ctx The PK context to use. It must have been initialized. + * + * \return Type on success. + * \return #MBEDTLS_PK_NONE for a context that has not been set up. + */ +mbedtls_pk_type_t mbedtls_pk_get_type( const mbedtls_pk_context *ctx ); + +#if defined(MBEDTLS_PK_PARSE_C) +/** \ingroup pk_module */ +/** + * \brief Parse a private key in PEM or DER format + * + * \param ctx The PK context to fill. It must have been initialized + * but not set up. + * \param key Input buffer to parse. + * The buffer must contain the input exactly, with no + * extra trailing material. For PEM, the buffer must + * contain a null-terminated string. + * \param keylen Size of \b key in bytes. + * For PEM data, this includes the terminating null byte, + * so \p keylen must be equal to `strlen(key) + 1`. + * \param pwd Optional password for decryption. + * Pass \c NULL if expecting a non-encrypted key. + * Pass a string of \p pwdlen bytes if expecting an encrypted + * key; a non-encrypted key will also be accepted. + * The empty password is not supported. + * \param pwdlen Size of the password in bytes. + * Ignored if \p pwd is \c NULL. + * \param f_rng RNG function, must not be \c NULL. Used for blinding. + * \param p_rng RNG parameter + * + * \note On entry, ctx must be empty, either freshly initialised + * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a + * specific key type, check the result with mbedtls_pk_can_do(). + * + * \note The key is also checked for correctness. + * + * \return 0 if successful, or a specific PK or PEM error code + */ +int mbedtls_pk_parse_key( mbedtls_pk_context *ctx, + const unsigned char *key, size_t keylen, + const unsigned char *pwd, size_t pwdlen, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** \ingroup pk_module */ +/** + * \brief Parse a public key in PEM or DER format + * + * \param ctx The PK context to fill. It must have been initialized + * but not set up. + * \param key Input buffer to parse. + * The buffer must contain the input exactly, with no + * extra trailing material. For PEM, the buffer must + * contain a null-terminated string. + * \param keylen Size of \b key in bytes. + * For PEM data, this includes the terminating null byte, + * so \p keylen must be equal to `strlen(key) + 1`. + * + * \note On entry, ctx must be empty, either freshly initialised + * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a + * specific key type, check the result with mbedtls_pk_can_do(). + * + * \note The key is also checked for correctness. + * + * \return 0 if successful, or a specific PK or PEM error code + */ +int mbedtls_pk_parse_public_key( mbedtls_pk_context *ctx, + const unsigned char *key, size_t keylen ); + +#if defined(MBEDTLS_FS_IO) +/** \ingroup pk_module */ +/** + * \brief Load and parse a private key + * + * \param ctx The PK context to fill. It must have been initialized + * but not set up. + * \param path filename to read the private key from + * \param password Optional password to decrypt the file. + * Pass \c NULL if expecting a non-encrypted key. + * Pass a null-terminated string if expecting an encrypted + * key; a non-encrypted key will also be accepted. + * The empty password is not supported. + * \param f_rng RNG function, must not be \c NULL. Used for blinding. + * \param p_rng RNG parameter + * + * \note On entry, ctx must be empty, either freshly initialised + * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a + * specific key type, check the result with mbedtls_pk_can_do(). + * + * \note The key is also checked for correctness. + * + * \return 0 if successful, or a specific PK or PEM error code + */ +int mbedtls_pk_parse_keyfile( mbedtls_pk_context *ctx, + const char *path, const char *password, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ); + +/** \ingroup pk_module */ +/** + * \brief Load and parse a public key + * + * \param ctx The PK context to fill. It must have been initialized + * but not set up. + * \param path filename to read the public key from + * + * \note On entry, ctx must be empty, either freshly initialised + * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If + * you need a specific key type, check the result with + * mbedtls_pk_can_do(). + * + * \note The key is also checked for correctness. + * + * \return 0 if successful, or a specific PK or PEM error code + */ +int mbedtls_pk_parse_public_keyfile( mbedtls_pk_context *ctx, const char *path ); +#endif /* MBEDTLS_FS_IO */ +#endif /* MBEDTLS_PK_PARSE_C */ + +#if defined(MBEDTLS_PK_WRITE_C) +/** + * \brief Write a private key to a PKCS#1 or SEC1 DER structure + * Note: data is written at the end of the buffer! Use the + * return value to determine where you should start + * using the buffer + * + * \param ctx PK context which must contain a valid private key. + * \param buf buffer to write to + * \param size size of the buffer + * + * \return length of data written if successful, or a specific + * error code + */ +int mbedtls_pk_write_key_der( const mbedtls_pk_context *ctx, unsigned char *buf, size_t size ); + +/** + * \brief Write a public key to a SubjectPublicKeyInfo DER structure + * Note: data is written at the end of the buffer! Use the + * return value to determine where you should start + * using the buffer + * + * \param ctx PK context which must contain a valid public or private key. + * \param buf buffer to write to + * \param size size of the buffer + * + * \return length of data written if successful, or a specific + * error code + */ +int mbedtls_pk_write_pubkey_der( const mbedtls_pk_context *ctx, unsigned char *buf, size_t size ); + +#if defined(MBEDTLS_PEM_WRITE_C) +/** + * \brief Write a public key to a PEM string + * + * \param ctx PK context which must contain a valid public or private key. + * \param buf Buffer to write to. The output includes a + * terminating null byte. + * \param size Size of the buffer in bytes. + * + * \return 0 if successful, or a specific error code + */ +int mbedtls_pk_write_pubkey_pem( const mbedtls_pk_context *ctx, unsigned char *buf, size_t size ); + +/** + * \brief Write a private key to a PKCS#1 or SEC1 PEM string + * + * \param ctx PK context which must contain a valid private key. + * \param buf Buffer to write to. The output includes a + * terminating null byte. + * \param size Size of the buffer in bytes. + * + * \return 0 if successful, or a specific error code + */ +int mbedtls_pk_write_key_pem( const mbedtls_pk_context *ctx, unsigned char *buf, size_t size ); +#endif /* MBEDTLS_PEM_WRITE_C */ +#endif /* MBEDTLS_PK_WRITE_C */ + +/* + * WARNING: Low-level functions. You probably do not want to use these unless + * you are certain you do ;) + */ + +#if defined(MBEDTLS_PK_PARSE_C) +/** + * \brief Parse a SubjectPublicKeyInfo DER structure + * + * \param p the position in the ASN.1 data + * \param end end of the buffer + * \param pk The PK context to fill. It must have been initialized + * but not set up. + * + * \return 0 if successful, or a specific PK error code + */ +int mbedtls_pk_parse_subpubkey( unsigned char **p, const unsigned char *end, + mbedtls_pk_context *pk ); +#endif /* MBEDTLS_PK_PARSE_C */ + +#if defined(MBEDTLS_PK_WRITE_C) +/** + * \brief Write a subjectPublicKey to ASN.1 data + * Note: function works backwards in data buffer + * + * \param p reference to current position pointer + * \param start start of the buffer (for bounds-checking) + * \param key PK context which must contain a valid public or private key. + * + * \return the length written or a negative error code + */ +int mbedtls_pk_write_pubkey( unsigned char **p, unsigned char *start, + const mbedtls_pk_context *key ); +#endif /* MBEDTLS_PK_WRITE_C */ + +/* + * Internal module functions. You probably do not want to use these unless you + * know you do. + */ +#if defined(MBEDTLS_FS_IO) +int mbedtls_pk_load_file( const char *path, unsigned char **buf, size_t *n ); +#endif + +#if defined(MBEDTLS_USE_PSA_CRYPTO) +/** + * \brief Turn an EC key into an opaque one. + * + * \warning This is a temporary utility function for tests. It might + * change or be removed at any time without notice. + * + * \note Only ECDSA keys are supported so far. Signing with the + * specified hash is the only allowed use of that key. + * + * \param pk Input: the EC key to import to a PSA key. + * Output: a PK context wrapping that PSA key. + * \param key Output: a PSA key identifier. + * It's the caller's responsibility to call + * psa_destroy_key() on that key identifier after calling + * mbedtls_pk_free() on the PK context. + * \param hash_alg The hash algorithm to allow for use with that key. + * + * \return \c 0 if successful. + * \return An Mbed TLS error code otherwise. + */ +int mbedtls_pk_wrap_as_opaque( mbedtls_pk_context *pk, + psa_key_id_t *key, + psa_algorithm_t hash_alg ); +#endif /* MBEDTLS_USE_PSA_CRYPTO */ + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_PK_H */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/platform.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/platform.h new file mode 100644 index 0000000..277a85c --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/platform.h @@ -0,0 +1,411 @@ +/** + * \file platform.h + * + * \brief This file contains the definitions and functions of the + * Mbed TLS platform abstraction layer. + * + * The platform abstraction layer removes the need for the library + * to directly link to standard C library functions or operating + * system services, making the library easier to port and embed. + * Application developers and users of the library can provide their own + * implementations of these functions, or implementations specific to + * their platform, which can be statically linked to the library or + * dynamically configured at runtime. + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBEDTLS_PLATFORM_H +#define MBEDTLS_PLATFORM_H +#include "mbedtls/private_access.h" + +#include "mbedtls/build_info.h" + +#if defined(MBEDTLS_HAVE_TIME) +#include "mbedtls/platform_time.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \name SECTION: Module settings + * + * The configuration options you can set for this module are in this section. + * Either change them in mbedtls_config.h or define them on the compiler command line. + * \{ + */ + +/* The older Microsoft Windows common runtime provides non-conforming + * implementations of some standard library functions, including snprintf + * and vsnprintf. This affects MSVC and MinGW builds. + */ +#if defined(__MINGW32__) || (defined(_MSC_VER) && _MSC_VER <= 1900) +#define MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF +#define MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF +#endif + +#if !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS) +#include +#include +#include +#if !defined(MBEDTLS_PLATFORM_STD_SNPRINTF) +#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF) +#define MBEDTLS_PLATFORM_STD_SNPRINTF mbedtls_platform_win32_snprintf /**< The default \c snprintf function to use. */ +#else +#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< The default \c snprintf function to use. */ +#endif +#endif +#if !defined(MBEDTLS_PLATFORM_STD_VSNPRINTF) +#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF) +#define MBEDTLS_PLATFORM_STD_VSNPRINTF mbedtls_platform_win32_vsnprintf /**< The default \c vsnprintf function to use. */ +#else +#define MBEDTLS_PLATFORM_STD_VSNPRINTF vsnprintf /**< The default \c vsnprintf function to use. */ +#endif +#endif +#if !defined(MBEDTLS_PLATFORM_STD_PRINTF) +#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< The default \c printf function to use. */ +#endif +#if !defined(MBEDTLS_PLATFORM_STD_FPRINTF) +#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< The default \c fprintf function to use. */ +#endif +#if !defined(MBEDTLS_PLATFORM_STD_CALLOC) +#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< The default \c calloc function to use. */ +#endif +#if !defined(MBEDTLS_PLATFORM_STD_FREE) +#define MBEDTLS_PLATFORM_STD_FREE free /**< The default \c free function to use. */ +#endif +#if !defined(MBEDTLS_PLATFORM_STD_EXIT) +#define MBEDTLS_PLATFORM_STD_EXIT exit /**< The default \c exit function to use. */ +#endif +#if !defined(MBEDTLS_PLATFORM_STD_TIME) +#define MBEDTLS_PLATFORM_STD_TIME time /**< The default \c time function to use. */ +#endif +#if !defined(MBEDTLS_PLATFORM_STD_EXIT_SUCCESS) +#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS EXIT_SUCCESS /**< The default exit value to use. */ +#endif +#if !defined(MBEDTLS_PLATFORM_STD_EXIT_FAILURE) +#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE EXIT_FAILURE /**< The default exit value to use. */ +#endif +#if defined(MBEDTLS_FS_IO) +#if !defined(MBEDTLS_PLATFORM_STD_NV_SEED_READ) +#define MBEDTLS_PLATFORM_STD_NV_SEED_READ mbedtls_platform_std_nv_seed_read +#endif +#if !defined(MBEDTLS_PLATFORM_STD_NV_SEED_WRITE) +#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE mbedtls_platform_std_nv_seed_write +#endif +#if !defined(MBEDTLS_PLATFORM_STD_NV_SEED_FILE) +#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE "seedfile" +#endif +#endif /* MBEDTLS_FS_IO */ +#else /* MBEDTLS_PLATFORM_NO_STD_FUNCTIONS */ +#if defined(MBEDTLS_PLATFORM_STD_MEM_HDR) +#include MBEDTLS_PLATFORM_STD_MEM_HDR +#endif +#endif /* MBEDTLS_PLATFORM_NO_STD_FUNCTIONS */ + + +/* \} name SECTION: Module settings */ + +/* + * The function pointers for calloc and free. + */ +#if defined(MBEDTLS_PLATFORM_MEMORY) +#if defined(MBEDTLS_PLATFORM_FREE_MACRO) && \ + defined(MBEDTLS_PLATFORM_CALLOC_MACRO) +#define mbedtls_free MBEDTLS_PLATFORM_FREE_MACRO +#define mbedtls_calloc MBEDTLS_PLATFORM_CALLOC_MACRO +#else +/* For size_t */ +#include +extern void *mbedtls_calloc( size_t n, size_t size ); +extern void mbedtls_free( void *ptr ); + +/** + * \brief This function dynamically sets the memory-management + * functions used by the library, during runtime. + * + * \param calloc_func The \c calloc function implementation. + * \param free_func The \c free function implementation. + * + * \return \c 0. + */ +int mbedtls_platform_set_calloc_free( void * (*calloc_func)( size_t, size_t ), + void (*free_func)( void * ) ); +#endif /* MBEDTLS_PLATFORM_FREE_MACRO && MBEDTLS_PLATFORM_CALLOC_MACRO */ +#else /* !MBEDTLS_PLATFORM_MEMORY */ +#define mbedtls_free free +#define mbedtls_calloc calloc +#endif /* MBEDTLS_PLATFORM_MEMORY && !MBEDTLS_PLATFORM_{FREE,CALLOC}_MACRO */ + +/* + * The function pointers for fprintf + */ +#if defined(MBEDTLS_PLATFORM_FPRINTF_ALT) +/* We need FILE * */ +#include +extern int (*mbedtls_fprintf)( FILE *stream, const char *format, ... ); + +/** + * \brief This function dynamically configures the fprintf + * function that is called when the + * mbedtls_fprintf() function is invoked by the library. + * + * \param fprintf_func The \c fprintf function implementation. + * + * \return \c 0. + */ +int mbedtls_platform_set_fprintf( int (*fprintf_func)( FILE *stream, const char *, + ... ) ); +#else +#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO) +#define mbedtls_fprintf MBEDTLS_PLATFORM_FPRINTF_MACRO +#else +#define mbedtls_fprintf fprintf +#endif /* MBEDTLS_PLATFORM_FPRINTF_MACRO */ +#endif /* MBEDTLS_PLATFORM_FPRINTF_ALT */ + +/* + * The function pointers for printf + */ +#if defined(MBEDTLS_PLATFORM_PRINTF_ALT) +extern int (*mbedtls_printf)( const char *format, ... ); + +/** + * \brief This function dynamically configures the snprintf + * function that is called when the mbedtls_snprintf() + * function is invoked by the library. + * + * \param printf_func The \c printf function implementation. + * + * \return \c 0 on success. + */ +int mbedtls_platform_set_printf( int (*printf_func)( const char *, ... ) ); +#else /* !MBEDTLS_PLATFORM_PRINTF_ALT */ +#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO) +#define mbedtls_printf MBEDTLS_PLATFORM_PRINTF_MACRO +#else +#define mbedtls_printf printf +#endif /* MBEDTLS_PLATFORM_PRINTF_MACRO */ +#endif /* MBEDTLS_PLATFORM_PRINTF_ALT */ + +/* + * The function pointers for snprintf + * + * The snprintf implementation should conform to C99: + * - it *must* always correctly zero-terminate the buffer + * (except when n == 0, then it must leave the buffer untouched) + * - however it is acceptable to return -1 instead of the required length when + * the destination buffer is too short. + */ +#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_SNPRINTF) +/* For Windows (inc. MSYS2), we provide our own fixed implementation */ +int mbedtls_platform_win32_snprintf( char *s, size_t n, const char *fmt, ... ); +#endif + +#if defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) +extern int (*mbedtls_snprintf)( char * s, size_t n, const char * format, ... ); + +/** + * \brief This function allows configuring a custom + * \c snprintf function pointer. + * + * \param snprintf_func The \c snprintf function implementation. + * + * \return \c 0 on success. + */ +int mbedtls_platform_set_snprintf( int (*snprintf_func)( char * s, size_t n, + const char * format, ... ) ); +#else /* MBEDTLS_PLATFORM_SNPRINTF_ALT */ +#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) +#define mbedtls_snprintf MBEDTLS_PLATFORM_SNPRINTF_MACRO +#else +#define mbedtls_snprintf MBEDTLS_PLATFORM_STD_SNPRINTF +#endif /* MBEDTLS_PLATFORM_SNPRINTF_MACRO */ +#endif /* MBEDTLS_PLATFORM_SNPRINTF_ALT */ + +/* + * The function pointers for vsnprintf + * + * The vsnprintf implementation should conform to C99: + * - it *must* always correctly zero-terminate the buffer + * (except when n == 0, then it must leave the buffer untouched) + * - however it is acceptable to return -1 instead of the required length when + * the destination buffer is too short. + */ +#if defined(MBEDTLS_PLATFORM_HAS_NON_CONFORMING_VSNPRINTF) +#include +/* For Older Windows (inc. MSYS2), we provide our own fixed implementation */ +int mbedtls_platform_win32_vsnprintf( char *s, size_t n, const char *fmt, va_list arg ); +#endif + +#if defined(MBEDTLS_PLATFORM_VSNPRINTF_ALT) +#include +extern int (*mbedtls_vsnprintf)( char * s, size_t n, const char * format, va_list arg ); + +/** + * \brief Set your own snprintf function pointer + * + * \param vsnprintf_func The \c vsnprintf function implementation + * + * \return \c 0 + */ +int mbedtls_platform_set_vsnprintf( int (*vsnprintf_func)( char * s, size_t n, + const char * format, va_list arg ) ); +#else /* MBEDTLS_PLATFORM_VSNPRINTF_ALT */ +#if defined(MBEDTLS_PLATFORM_VSNPRINTF_MACRO) +#define mbedtls_vsnprintf MBEDTLS_PLATFORM_VSNPRINTF_MACRO +#else +#define mbedtls_vsnprintf vsnprintf +#endif /* MBEDTLS_PLATFORM_VSNPRINTF_MACRO */ +#endif /* MBEDTLS_PLATFORM_VSNPRINTF_ALT */ + +/* + * The function pointers for exit + */ +#if defined(MBEDTLS_PLATFORM_EXIT_ALT) +extern void (*mbedtls_exit)( int status ); + +/** + * \brief This function dynamically configures the exit + * function that is called when the mbedtls_exit() + * function is invoked by the library. + * + * \param exit_func The \c exit function implementation. + * + * \return \c 0 on success. + */ +int mbedtls_platform_set_exit( void (*exit_func)( int status ) ); +#else +#if defined(MBEDTLS_PLATFORM_EXIT_MACRO) +#define mbedtls_exit MBEDTLS_PLATFORM_EXIT_MACRO +#else +#define mbedtls_exit exit +#endif /* MBEDTLS_PLATFORM_EXIT_MACRO */ +#endif /* MBEDTLS_PLATFORM_EXIT_ALT */ + +/* + * The default exit values + */ +#if defined(MBEDTLS_PLATFORM_STD_EXIT_SUCCESS) +#define MBEDTLS_EXIT_SUCCESS MBEDTLS_PLATFORM_STD_EXIT_SUCCESS +#else +#define MBEDTLS_EXIT_SUCCESS 0 +#endif +#if defined(MBEDTLS_PLATFORM_STD_EXIT_FAILURE) +#define MBEDTLS_EXIT_FAILURE MBEDTLS_PLATFORM_STD_EXIT_FAILURE +#else +#define MBEDTLS_EXIT_FAILURE 1 +#endif + +/* + * The function pointers for reading from and writing a seed file to + * Non-Volatile storage (NV) in a platform-independent way + * + * Only enabled when the NV seed entropy source is enabled + */ +#if defined(MBEDTLS_ENTROPY_NV_SEED) +#if !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS) && defined(MBEDTLS_FS_IO) +/* Internal standard platform definitions */ +int mbedtls_platform_std_nv_seed_read( unsigned char *buf, size_t buf_len ); +int mbedtls_platform_std_nv_seed_write( unsigned char *buf, size_t buf_len ); +#endif + +#if defined(MBEDTLS_PLATFORM_NV_SEED_ALT) +extern int (*mbedtls_nv_seed_read)( unsigned char *buf, size_t buf_len ); +extern int (*mbedtls_nv_seed_write)( unsigned char *buf, size_t buf_len ); + +/** + * \brief This function allows configuring custom seed file writing and + * reading functions. + * + * \param nv_seed_read_func The seed reading function implementation. + * \param nv_seed_write_func The seed writing function implementation. + * + * \return \c 0 on success. + */ +int mbedtls_platform_set_nv_seed( + int (*nv_seed_read_func)( unsigned char *buf, size_t buf_len ), + int (*nv_seed_write_func)( unsigned char *buf, size_t buf_len ) + ); +#else +#if defined(MBEDTLS_PLATFORM_NV_SEED_READ_MACRO) && \ + defined(MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO) +#define mbedtls_nv_seed_read MBEDTLS_PLATFORM_NV_SEED_READ_MACRO +#define mbedtls_nv_seed_write MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO +#else +#define mbedtls_nv_seed_read mbedtls_platform_std_nv_seed_read +#define mbedtls_nv_seed_write mbedtls_platform_std_nv_seed_write +#endif +#endif /* MBEDTLS_PLATFORM_NV_SEED_ALT */ +#endif /* MBEDTLS_ENTROPY_NV_SEED */ + +#if !defined(MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT) + +/** + * \brief The platform context structure. + * + * \note This structure may be used to assist platform-specific + * setup or teardown operations. + */ +typedef struct mbedtls_platform_context +{ + char MBEDTLS_PRIVATE(dummy); /**< A placeholder member, as empty structs are not portable. */ +} +mbedtls_platform_context; + +#else +#include "platform_alt.h" +#endif /* !MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT */ + +/** + * \brief This function performs any platform-specific initialization + * operations. + * + * \note This function should be called before any other library functions. + * + * Its implementation is platform-specific, and unless + * platform-specific code is provided, it does nothing. + * + * \note The usage and necessity of this function is dependent on the platform. + * + * \param ctx The platform context. + * + * \return \c 0 on success. + */ +int mbedtls_platform_setup( mbedtls_platform_context *ctx ); +/** + * \brief This function performs any platform teardown operations. + * + * \note This function should be called after every other Mbed TLS module + * has been correctly freed using the appropriate free function. + * + * Its implementation is platform-specific, and unless + * platform-specific code is provided, it does nothing. + * + * \note The usage and necessity of this function is dependent on the platform. + * + * \param ctx The platform context. + * + */ +void mbedtls_platform_teardown( mbedtls_platform_context *ctx ); + +#ifdef __cplusplus +} +#endif + +#endif /* platform.h */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/platform_util.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/platform_util.h new file mode 100644 index 0000000..1a0a135 --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/platform_util.h @@ -0,0 +1,122 @@ +/** + * \file platform_util.h + * + * \brief Common and shared functions used by multiple modules in the Mbed TLS + * library. + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBEDTLS_PLATFORM_UTIL_H +#define MBEDTLS_PLATFORM_UTIL_H + +#include "mbedtls/build_info.h" + +#include +#if defined(MBEDTLS_HAVE_TIME_DATE) +#include "mbedtls/platform_time.h" +#include +#endif /* MBEDTLS_HAVE_TIME_DATE */ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Internal macros meant to be called only from within the library. */ +#define MBEDTLS_INTERNAL_VALIDATE_RET( cond, ret ) do { } while( 0 ) +#define MBEDTLS_INTERNAL_VALIDATE( cond ) do { } while( 0 ) + +/* Internal helper macros for deprecating API constants. */ +#if !defined(MBEDTLS_DEPRECATED_REMOVED) +#if defined(MBEDTLS_DEPRECATED_WARNING) +/* Deliberately don't (yet) export MBEDTLS_DEPRECATED here + * to avoid conflict with other headers which define and use + * it, too. We might want to move all these definitions here at + * some point for uniformity. */ +#define MBEDTLS_DEPRECATED __attribute__((deprecated)) +MBEDTLS_DEPRECATED typedef char const * mbedtls_deprecated_string_constant_t; +#define MBEDTLS_DEPRECATED_STRING_CONSTANT( VAL ) \ + ( (mbedtls_deprecated_string_constant_t) ( VAL ) ) +MBEDTLS_DEPRECATED typedef int mbedtls_deprecated_numeric_constant_t; +#define MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( VAL ) \ + ( (mbedtls_deprecated_numeric_constant_t) ( VAL ) ) +#undef MBEDTLS_DEPRECATED +#else /* MBEDTLS_DEPRECATED_WARNING */ +#define MBEDTLS_DEPRECATED_STRING_CONSTANT( VAL ) VAL +#define MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( VAL ) VAL +#endif /* MBEDTLS_DEPRECATED_WARNING */ +#endif /* MBEDTLS_DEPRECATED_REMOVED */ + +/** + * \brief Securely zeroize a buffer + * + * The function is meant to wipe the data contained in a buffer so + * that it can no longer be recovered even if the program memory + * is later compromised. Call this function on sensitive data + * stored on the stack before returning from a function, and on + * sensitive data stored on the heap before freeing the heap + * object. + * + * It is extremely difficult to guarantee that calls to + * mbedtls_platform_zeroize() are not removed by aggressive + * compiler optimizations in a portable way. For this reason, Mbed + * TLS provides the configuration option + * MBEDTLS_PLATFORM_ZEROIZE_ALT, which allows users to configure + * mbedtls_platform_zeroize() to use a suitable implementation for + * their platform and needs + * + * \param buf Buffer to be zeroized + * \param len Length of the buffer in bytes + * + */ +void mbedtls_platform_zeroize( void *buf, size_t len ); + +#if defined(MBEDTLS_HAVE_TIME_DATE) +/** + * \brief Platform-specific implementation of gmtime_r() + * + * The function is a thread-safe abstraction that behaves + * similarly to the gmtime_r() function from Unix/POSIX. + * + * Mbed TLS will try to identify the underlying platform and + * make use of an appropriate underlying implementation (e.g. + * gmtime_r() for POSIX and gmtime_s() for Windows). If this is + * not possible, then gmtime() will be used. In this case, calls + * from the library to gmtime() will be guarded by the mutex + * mbedtls_threading_gmtime_mutex if MBEDTLS_THREADING_C is + * enabled. It is recommended that calls from outside the library + * are also guarded by this mutex. + * + * If MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, then Mbed TLS will + * unconditionally use the alternative implementation for + * mbedtls_platform_gmtime_r() supplied by the user at compile time. + * + * \param tt Pointer to an object containing time (in seconds) since the + * epoch to be converted + * \param tm_buf Pointer to an object where the results will be stored + * + * \return Pointer to an object of type struct tm on success, otherwise + * NULL + */ +struct tm *mbedtls_platform_gmtime_r( const mbedtls_time_t *tt, + struct tm *tm_buf ); +#endif /* MBEDTLS_HAVE_TIME_DATE */ + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_PLATFORM_UTIL_H */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/private_access.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/private_access.h new file mode 100644 index 0000000..98d3419 --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/private_access.h @@ -0,0 +1,32 @@ + /** + * \file private_access.h + * + * \brief Macro wrapper for struct's memebrs. + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_PRIVATE_ACCESS_H +#define MBEDTLS_PRIVATE_ACCESS_H + +#ifndef MBEDTLS_ALLOW_PRIVATE_ACCESS +#define MBEDTLS_PRIVATE(member) private_##member +#else +#define MBEDTLS_PRIVATE(member) member +#endif + +#endif /* MBEDTLS_PRIVATE_ACCESS_H */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/rsa.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/rsa.h new file mode 100644 index 0000000..cffbe3b --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/rsa.h @@ -0,0 +1,1119 @@ +/** + * \file rsa.h + * + * \brief This file provides an API for the RSA public-key cryptosystem. + * + * The RSA public-key cryptosystem is defined in Public-Key + * Cryptography Standards (PKCS) #1 v1.5: RSA Encryption + * and Public-Key Cryptography Standards (PKCS) #1 v2.1: + * RSA Cryptography Specifications. + * + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBEDTLS_RSA_H +#define MBEDTLS_RSA_H +#include "mbedtls/private_access.h" + +#include "mbedtls/build_info.h" + +#include "mbedtls/bignum.h" +#include "mbedtls/md.h" + +#if defined(MBEDTLS_THREADING_C) +#include "mbedtls/threading.h" +#endif + +/* + * RSA Error codes + */ +#define MBEDTLS_ERR_RSA_BAD_INPUT_DATA -0x4080 /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_RSA_INVALID_PADDING -0x4100 /**< Input data contains invalid padding and is rejected. */ +#define MBEDTLS_ERR_RSA_KEY_GEN_FAILED -0x4180 /**< Something failed during generation of a key. */ +#define MBEDTLS_ERR_RSA_KEY_CHECK_FAILED -0x4200 /**< Key failed to pass the validity check of the library. */ +#define MBEDTLS_ERR_RSA_PUBLIC_FAILED -0x4280 /**< The public key operation failed. */ +#define MBEDTLS_ERR_RSA_PRIVATE_FAILED -0x4300 /**< The private key operation failed. */ +#define MBEDTLS_ERR_RSA_VERIFY_FAILED -0x4380 /**< The PKCS#1 verification failed. */ +#define MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE -0x4400 /**< The output buffer for decryption is not large enough. */ +#define MBEDTLS_ERR_RSA_RNG_FAILED -0x4480 /**< The random generator failed to generate non-zeros. */ + +/* + * RSA constants + */ + +#define MBEDTLS_RSA_PKCS_V15 0 /**< Use PKCS#1 v1.5 encoding. */ +#define MBEDTLS_RSA_PKCS_V21 1 /**< Use PKCS#1 v2.1 encoding. */ + +#define MBEDTLS_RSA_SIGN 1 /**< Identifier for RSA signature operations. */ +#define MBEDTLS_RSA_CRYPT 2 /**< Identifier for RSA encryption and decryption operations. */ + +#define MBEDTLS_RSA_SALT_LEN_ANY -1 + +/* + * The above constants may be used even if the RSA module is compile out, + * eg for alternative (PKCS#11) RSA implemenations in the PK layers. + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#if !defined(MBEDTLS_RSA_ALT) +// Regular implementation +// + +/** + * \brief The RSA context structure. + */ +typedef struct mbedtls_rsa_context +{ + int MBEDTLS_PRIVATE(ver); /*!< Reserved for internal purposes. + * Do not set this field in application + * code. Its meaning might change without + * notice. */ + size_t MBEDTLS_PRIVATE(len); /*!< The size of \p N in Bytes. */ + + mbedtls_mpi MBEDTLS_PRIVATE(N); /*!< The public modulus. */ + mbedtls_mpi MBEDTLS_PRIVATE(E); /*!< The public exponent. */ + + mbedtls_mpi MBEDTLS_PRIVATE(D); /*!< The private exponent. */ + mbedtls_mpi MBEDTLS_PRIVATE(P); /*!< The first prime factor. */ + mbedtls_mpi MBEDTLS_PRIVATE(Q); /*!< The second prime factor. */ + + mbedtls_mpi MBEDTLS_PRIVATE(DP); /*!< D % (P - 1). */ + mbedtls_mpi MBEDTLS_PRIVATE(DQ); /*!< D % (Q - 1). */ + mbedtls_mpi MBEDTLS_PRIVATE(QP); /*!< 1 / (Q % P). */ + + mbedtls_mpi MBEDTLS_PRIVATE(RN); /*!< cached R^2 mod N. */ + + mbedtls_mpi MBEDTLS_PRIVATE(RP); /*!< cached R^2 mod P. */ + mbedtls_mpi MBEDTLS_PRIVATE(RQ); /*!< cached R^2 mod Q. */ + + mbedtls_mpi MBEDTLS_PRIVATE(Vi); /*!< The cached blinding value. */ + mbedtls_mpi MBEDTLS_PRIVATE(Vf); /*!< The cached un-blinding value. */ + + int MBEDTLS_PRIVATE(padding); /*!< Selects padding mode: + #MBEDTLS_RSA_PKCS_V15 for 1.5 padding and + #MBEDTLS_RSA_PKCS_V21 for OAEP or PSS. */ + int MBEDTLS_PRIVATE(hash_id); /*!< Hash identifier of mbedtls_md_type_t type, + as specified in md.h for use in the MGF + mask generating function used in the + EME-OAEP and EMSA-PSS encodings. */ +#if defined(MBEDTLS_THREADING_C) + /* Invariant: the mutex is initialized iff ver != 0. */ + mbedtls_threading_mutex_t MBEDTLS_PRIVATE(mutex); /*!< Thread-safety mutex. */ +#endif +} +mbedtls_rsa_context; + +#else /* MBEDTLS_RSA_ALT */ +#include "rsa_alt.h" +#endif /* MBEDTLS_RSA_ALT */ + +/** + * \brief This function initializes an RSA context. + * + * \note This function initializes the padding and the hash + * identifier to respectively #MBEDTLS_RSA_PKCS_V15 and + * #MBEDTLS_MD_NONE. See mbedtls_rsa_set_padding() for more + * information about those parameters. + * + * \param ctx The RSA context to initialize. This must not be \c NULL. + */ +void mbedtls_rsa_init( mbedtls_rsa_context *ctx ); + +/** + * \brief This function sets padding for an already initialized RSA + * context. + * + * \note Set padding to #MBEDTLS_RSA_PKCS_V21 for the RSAES-OAEP + * encryption scheme and the RSASSA-PSS signature scheme. + * + * \note The \p hash_id parameter is ignored when using + * #MBEDTLS_RSA_PKCS_V15 padding. + * + * \note The choice of padding mode is strictly enforced for private + * key operations, since there might be security concerns in + * mixing padding modes. For public key operations it is + * a default value, which can be overridden by calling specific + * \c mbedtls_rsa_rsaes_xxx or \c mbedtls_rsa_rsassa_xxx + * functions. + * + * \note The hash selected in \p hash_id is always used for OEAP + * encryption. For PSS signatures, it is always used for + * making signatures, but can be overridden for verifying them. + * If set to #MBEDTLS_MD_NONE, it is always overridden. + * + * \param ctx The initialized RSA context to be configured. + * \param padding The padding mode to use. This must be either + * #MBEDTLS_RSA_PKCS_V15 or #MBEDTLS_RSA_PKCS_V21. + * \param hash_id The hash identifier for PSS or OAEP, if \p padding is + * #MBEDTLS_RSA_PKCS_V21. #MBEDTLS_MD_NONE is accepted by this + * function but may be not suitable for some operations. + * Ignored if \p padding is #MBEDTLS_RSA_PKCS_V15. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_RSA_INVALID_PADDING failure: + * \p padding or \p hash_id is invalid. + */ +int mbedtls_rsa_set_padding( mbedtls_rsa_context *ctx, int padding, + mbedtls_md_type_t hash_id ); + +/** + * \brief This function imports a set of core parameters into an + * RSA context. + * + * \note This function can be called multiple times for successive + * imports, if the parameters are not simultaneously present. + * + * Any sequence of calls to this function should be followed + * by a call to mbedtls_rsa_complete(), which checks and + * completes the provided information to a ready-for-use + * public or private RSA key. + * + * \note See mbedtls_rsa_complete() for more information on which + * parameters are necessary to set up a private or public + * RSA key. + * + * \note The imported parameters are copied and need not be preserved + * for the lifetime of the RSA context being set up. + * + * \param ctx The initialized RSA context to store the parameters in. + * \param N The RSA modulus. This may be \c NULL. + * \param P The first prime factor of \p N. This may be \c NULL. + * \param Q The second prime factor of \p N. This may be \c NULL. + * \param D The private exponent. This may be \c NULL. + * \param E The public exponent. This may be \c NULL. + * + * \return \c 0 on success. + * \return A non-zero error code on failure. + */ +int mbedtls_rsa_import( mbedtls_rsa_context *ctx, + const mbedtls_mpi *N, + const mbedtls_mpi *P, const mbedtls_mpi *Q, + const mbedtls_mpi *D, const mbedtls_mpi *E ); + +/** + * \brief This function imports core RSA parameters, in raw big-endian + * binary format, into an RSA context. + * + * \note This function can be called multiple times for successive + * imports, if the parameters are not simultaneously present. + * + * Any sequence of calls to this function should be followed + * by a call to mbedtls_rsa_complete(), which checks and + * completes the provided information to a ready-for-use + * public or private RSA key. + * + * \note See mbedtls_rsa_complete() for more information on which + * parameters are necessary to set up a private or public + * RSA key. + * + * \note The imported parameters are copied and need not be preserved + * for the lifetime of the RSA context being set up. + * + * \param ctx The initialized RSA context to store the parameters in. + * \param N The RSA modulus. This may be \c NULL. + * \param N_len The Byte length of \p N; it is ignored if \p N == NULL. + * \param P The first prime factor of \p N. This may be \c NULL. + * \param P_len The Byte length of \p P; it ns ignored if \p P == NULL. + * \param Q The second prime factor of \p N. This may be \c NULL. + * \param Q_len The Byte length of \p Q; it is ignored if \p Q == NULL. + * \param D The private exponent. This may be \c NULL. + * \param D_len The Byte length of \p D; it is ignored if \p D == NULL. + * \param E The public exponent. This may be \c NULL. + * \param E_len The Byte length of \p E; it is ignored if \p E == NULL. + * + * \return \c 0 on success. + * \return A non-zero error code on failure. + */ +int mbedtls_rsa_import_raw( mbedtls_rsa_context *ctx, + unsigned char const *N, size_t N_len, + unsigned char const *P, size_t P_len, + unsigned char const *Q, size_t Q_len, + unsigned char const *D, size_t D_len, + unsigned char const *E, size_t E_len ); + +/** + * \brief This function completes an RSA context from + * a set of imported core parameters. + * + * To setup an RSA public key, precisely \p N and \p E + * must have been imported. + * + * To setup an RSA private key, sufficient information must + * be present for the other parameters to be derivable. + * + * The default implementation supports the following: + *
  • Derive \p P, \p Q from \p N, \p D, \p E.
    • + *
  • Derive \p N, \p D from \p P, \p Q, \p E.
+ * Alternative implementations need not support these. + * + * If this function runs successfully, it guarantees that + * the RSA context can be used for RSA operations without + * the risk of failure or crash. + * + * \warning This function need not perform consistency checks + * for the imported parameters. In particular, parameters that + * are not needed by the implementation might be silently + * discarded and left unchecked. To check the consistency + * of the key material, see mbedtls_rsa_check_privkey(). + * + * \param ctx The initialized RSA context holding imported parameters. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_RSA_BAD_INPUT_DATA if the attempted derivations + * failed. + * + */ +int mbedtls_rsa_complete( mbedtls_rsa_context *ctx ); + +/** + * \brief This function exports the core parameters of an RSA key. + * + * If this function runs successfully, the non-NULL buffers + * pointed to by \p N, \p P, \p Q, \p D, and \p E are fully + * written, with additional unused space filled leading by + * zero Bytes. + * + * Possible reasons for returning + * #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED:
    + *
  • An alternative RSA implementation is in use, which + * stores the key externally, and either cannot or should + * not export it into RAM.
    • + *
  • A SW or HW implementation might not support a certain + * deduction. For example, \p P, \p Q from \p N, \p D, + * and \p E if the former are not part of the + * implementation.
+ * + * If the function fails due to an unsupported operation, + * the RSA context stays intact and remains usable. + * + * \param ctx The initialized RSA context. + * \param N The MPI to hold the RSA modulus. + * This may be \c NULL if this field need not be exported. + * \param P The MPI to hold the first prime factor of \p N. + * This may be \c NULL if this field need not be exported. + * \param Q The MPI to hold the second prime factor of \p N. + * This may be \c NULL if this field need not be exported. + * \param D The MPI to hold the private exponent. + * This may be \c NULL if this field need not be exported. + * \param E The MPI to hold the public exponent. + * This may be \c NULL if this field need not be exported. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED if exporting the + * requested parameters cannot be done due to missing + * functionality or because of security policies. + * \return A non-zero return code on any other failure. + * + */ +int mbedtls_rsa_export( const mbedtls_rsa_context *ctx, + mbedtls_mpi *N, mbedtls_mpi *P, mbedtls_mpi *Q, + mbedtls_mpi *D, mbedtls_mpi *E ); + +/** + * \brief This function exports core parameters of an RSA key + * in raw big-endian binary format. + * + * If this function runs successfully, the non-NULL buffers + * pointed to by \p N, \p P, \p Q, \p D, and \p E are fully + * written, with additional unused space filled leading by + * zero Bytes. + * + * Possible reasons for returning + * #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED:
    + *
  • An alternative RSA implementation is in use, which + * stores the key externally, and either cannot or should + * not export it into RAM.
    • + *
  • A SW or HW implementation might not support a certain + * deduction. For example, \p P, \p Q from \p N, \p D, + * and \p E if the former are not part of the + * implementation.
+ * If the function fails due to an unsupported operation, + * the RSA context stays intact and remains usable. + * + * \note The length parameters are ignored if the corresponding + * buffer pointers are NULL. + * + * \param ctx The initialized RSA context. + * \param N The Byte array to store the RSA modulus, + * or \c NULL if this field need not be exported. + * \param N_len The size of the buffer for the modulus. + * \param P The Byte array to hold the first prime factor of \p N, + * or \c NULL if this field need not be exported. + * \param P_len The size of the buffer for the first prime factor. + * \param Q The Byte array to hold the second prime factor of \p N, + * or \c NULL if this field need not be exported. + * \param Q_len The size of the buffer for the second prime factor. + * \param D The Byte array to hold the private exponent, + * or \c NULL if this field need not be exported. + * \param D_len The size of the buffer for the private exponent. + * \param E The Byte array to hold the public exponent, + * or \c NULL if this field need not be exported. + * \param E_len The size of the buffer for the public exponent. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED if exporting the + * requested parameters cannot be done due to missing + * functionality or because of security policies. + * \return A non-zero return code on any other failure. + */ +int mbedtls_rsa_export_raw( const mbedtls_rsa_context *ctx, + unsigned char *N, size_t N_len, + unsigned char *P, size_t P_len, + unsigned char *Q, size_t Q_len, + unsigned char *D, size_t D_len, + unsigned char *E, size_t E_len ); + +/** + * \brief This function exports CRT parameters of a private RSA key. + * + * \note Alternative RSA implementations not using CRT-parameters + * internally can implement this function based on + * mbedtls_rsa_deduce_opt(). + * + * \param ctx The initialized RSA context. + * \param DP The MPI to hold \c D modulo `P-1`, + * or \c NULL if it need not be exported. + * \param DQ The MPI to hold \c D modulo `Q-1`, + * or \c NULL if it need not be exported. + * \param QP The MPI to hold modular inverse of \c Q modulo \c P, + * or \c NULL if it need not be exported. + * + * \return \c 0 on success. + * \return A non-zero error code on failure. + * + */ +int mbedtls_rsa_export_crt( const mbedtls_rsa_context *ctx, + mbedtls_mpi *DP, mbedtls_mpi *DQ, mbedtls_mpi *QP ); + +/** + * \brief This function retrieves the length of RSA modulus in Bytes. + * + * \param ctx The initialized RSA context. + * + * \return The length of the RSA modulus in Bytes. + * + */ +size_t mbedtls_rsa_get_len( const mbedtls_rsa_context *ctx ); + +/** + * \brief This function generates an RSA keypair. + * + * \note mbedtls_rsa_init() must be called before this function, + * to set up the RSA context. + * + * \param ctx The initialized RSA context used to hold the key. + * \param f_rng The RNG function to be used for key generation. + * This is mandatory and must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. + * This may be \c NULL if \p f_rng doesn't need a context. + * \param nbits The size of the public key in bits. + * \param exponent The public exponent to use. For example, \c 65537. + * This must be odd and greater than \c 1. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_gen_key( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + unsigned int nbits, int exponent ); + +/** + * \brief This function checks if a context contains at least an RSA + * public key. + * + * If the function runs successfully, it is guaranteed that + * enough information is present to perform an RSA public key + * operation using mbedtls_rsa_public(). + * + * \param ctx The initialized RSA context to check. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + * + */ +int mbedtls_rsa_check_pubkey( const mbedtls_rsa_context *ctx ); + +/** + * \brief This function checks if a context contains an RSA private key + * and perform basic consistency checks. + * + * \note The consistency checks performed by this function not only + * ensure that mbedtls_rsa_private() can be called successfully + * on the given context, but that the various parameters are + * mutually consistent with high probability, in the sense that + * mbedtls_rsa_public() and mbedtls_rsa_private() are inverses. + * + * \warning This function should catch accidental misconfigurations + * like swapping of parameters, but it cannot establish full + * trust in neither the quality nor the consistency of the key + * material that was used to setup the given RSA context: + *
  • Consistency: Imported parameters that are irrelevant + * for the implementation might be silently dropped. If dropped, + * the current function does not have access to them, + * and therefore cannot check them. See mbedtls_rsa_complete(). + * If you want to check the consistency of the entire + * content of an PKCS1-encoded RSA private key, for example, you + * should use mbedtls_rsa_validate_params() before setting + * up the RSA context. + * Additionally, if the implementation performs empirical checks, + * these checks substantiate but do not guarantee consistency.
    • + *
  • Quality: This function is not expected to perform + * extended quality assessments like checking that the prime + * factors are safe. Additionally, it is the responsibility of the + * user to ensure the trustworthiness of the source of his RSA + * parameters, which goes beyond what is effectively checkable + * by the library.
+ * + * \param ctx The initialized RSA context to check. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_check_privkey( const mbedtls_rsa_context *ctx ); + +/** + * \brief This function checks a public-private RSA key pair. + * + * It checks each of the contexts, and makes sure they match. + * + * \param pub The initialized RSA context holding the public key. + * \param prv The initialized RSA context holding the private key. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_check_pub_priv( const mbedtls_rsa_context *pub, + const mbedtls_rsa_context *prv ); + +/** + * \brief This function performs an RSA public key operation. + * + * \param ctx The initialized RSA context to use. + * \param input The input buffer. This must be a readable buffer + * of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * \param output The output buffer. This must be a writable buffer + * of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * + * \note This function does not handle message padding. + * + * \note Make sure to set \p input[0] = 0 or ensure that + * input is smaller than \p N. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_public( mbedtls_rsa_context *ctx, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief This function performs an RSA private key operation. + * + * \note Blinding is used if and only if a PRNG is provided. + * + * \note If blinding is used, both the base of exponentation + * and the exponent are blinded, providing protection + * against some side-channel attacks. + * + * \warning It is deprecated and a security risk to not provide + * a PRNG here and thereby prevent the use of blinding. + * Future versions of the library may enforce the presence + * of a PRNG. + * + * \param ctx The initialized RSA context to use. + * \param f_rng The RNG function, used for blinding. It is mandatory. + * \param p_rng The RNG context to pass to \p f_rng. This may be \c NULL + * if \p f_rng doesn't need a context. + * \param input The input buffer. This must be a readable buffer + * of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * \param output The output buffer. This must be a writable buffer + * of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + * + */ +int mbedtls_rsa_private( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief This function adds the message padding, then performs an RSA + * operation. + * + * It is the generic wrapper for performing a PKCS#1 encryption + * operation. + * + * \param ctx The initialized RSA context to use. + * \param f_rng The RNG to use. It is used for padding generation + * and it is mandatory. + * \param p_rng The RNG context to be passed to \p f_rng. May be + * \c NULL if \p f_rng doesn't need a context argument. + * \param ilen The length of the plaintext in Bytes. + * \param input The input data to encrypt. This must be a readable + * buffer of size \p ilen Bytes. It may be \c NULL if + * `ilen == 0`. + * \param output The output buffer. This must be a writable buffer + * of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_pkcs1_encrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + size_t ilen, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief This function performs a PKCS#1 v1.5 encryption operation + * (RSAES-PKCS1-v1_5-ENCRYPT). + * + * \param ctx The initialized RSA context to use. + * \param f_rng The RNG function to use. It is mandatory and used for + * padding generation. + * \param p_rng The RNG context to be passed to \p f_rng. This may + * be \c NULL if \p f_rng doesn't need a context argument. + * \param ilen The length of the plaintext in Bytes. + * \param input The input data to encrypt. This must be a readable + * buffer of size \p ilen Bytes. It may be \c NULL if + * `ilen == 0`. + * \param output The output buffer. This must be a writable buffer + * of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_rsaes_pkcs1_v15_encrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + size_t ilen, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief This function performs a PKCS#1 v2.1 OAEP encryption + * operation (RSAES-OAEP-ENCRYPT). + * + * \note The output buffer must be as large as the size + * of ctx->N. For example, 128 Bytes if RSA-1024 is used. + * + * \param ctx The initnialized RSA context to use. + * \param f_rng The RNG function to use. This is needed for padding + * generation and is mandatory. + * \param p_rng The RNG context to be passed to \p f_rng. This may + * be \c NULL if \p f_rng doesn't need a context argument. + * \param label The buffer holding the custom label to use. + * This must be a readable buffer of length \p label_len + * Bytes. It may be \c NULL if \p label_len is \c 0. + * \param label_len The length of the label in Bytes. + * \param ilen The length of the plaintext buffer \p input in Bytes. + * \param input The input data to encrypt. This must be a readable + * buffer of size \p ilen Bytes. It may be \c NULL if + * `ilen == 0`. + * \param output The output buffer. This must be a writable buffer + * of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_rsaes_oaep_encrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + const unsigned char *label, size_t label_len, + size_t ilen, + const unsigned char *input, + unsigned char *output ); + +/** + * \brief This function performs an RSA operation, then removes the + * message padding. + * + * It is the generic wrapper for performing a PKCS#1 decryption + * operation. + * + * \note The output buffer length \c output_max_len should be + * as large as the size \p ctx->len of \p ctx->N (for example, + * 128 Bytes if RSA-1024 is used) to be able to hold an + * arbitrary decrypted message. If it is not large enough to + * hold the decryption of the particular ciphertext provided, + * the function returns \c MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE. + * + * \param ctx The initialized RSA context to use. + * \param f_rng The RNG function. This is used for blinding and is + * mandatory; see mbedtls_rsa_private() for more. + * \param p_rng The RNG context to be passed to \p f_rng. This may be + * \c NULL if \p f_rng doesn't need a context. + * \param olen The address at which to store the length of + * the plaintext. This must not be \c NULL. + * \param input The ciphertext buffer. This must be a readable buffer + * of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * \param output The buffer used to hold the plaintext. This must + * be a writable buffer of length \p output_max_len Bytes. + * \param output_max_len The length in Bytes of the output buffer \p output. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_pkcs1_decrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len ); + +/** + * \brief This function performs a PKCS#1 v1.5 decryption + * operation (RSAES-PKCS1-v1_5-DECRYPT). + * + * \note The output buffer length \c output_max_len should be + * as large as the size \p ctx->len of \p ctx->N, for example, + * 128 Bytes if RSA-1024 is used, to be able to hold an + * arbitrary decrypted message. If it is not large enough to + * hold the decryption of the particular ciphertext provided, + * the function returns #MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE. + * + * \param ctx The initialized RSA context to use. + * \param f_rng The RNG function. This is used for blinding and is + * mandatory; see mbedtls_rsa_private() for more. + * \param p_rng The RNG context to be passed to \p f_rng. This may be + * \c NULL if \p f_rng doesn't need a context. + * \param olen The address at which to store the length of + * the plaintext. This must not be \c NULL. + * \param input The ciphertext buffer. This must be a readable buffer + * of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * \param output The buffer used to hold the plaintext. This must + * be a writable buffer of length \p output_max_len Bytes. + * \param output_max_len The length in Bytes of the output buffer \p output. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + * + */ +int mbedtls_rsa_rsaes_pkcs1_v15_decrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len ); + +/** + * \brief This function performs a PKCS#1 v2.1 OAEP decryption + * operation (RSAES-OAEP-DECRYPT). + * + * \note The output buffer length \c output_max_len should be + * as large as the size \p ctx->len of \p ctx->N, for + * example, 128 Bytes if RSA-1024 is used, to be able to + * hold an arbitrary decrypted message. If it is not + * large enough to hold the decryption of the particular + * ciphertext provided, the function returns + * #MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE. + * + * \param ctx The initialized RSA context to use. + * \param f_rng The RNG function. This is used for blinding and is + * mandatory. + * \param p_rng The RNG context to be passed to \p f_rng. This may be + * \c NULL if \p f_rng doesn't need a context. + * \param label The buffer holding the custom label to use. + * This must be a readable buffer of length \p label_len + * Bytes. It may be \c NULL if \p label_len is \c 0. + * \param label_len The length of the label in Bytes. + * \param olen The address at which to store the length of + * the plaintext. This must not be \c NULL. + * \param input The ciphertext buffer. This must be a readable buffer + * of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * \param output The buffer used to hold the plaintext. This must + * be a writable buffer of length \p output_max_len Bytes. + * \param output_max_len The length in Bytes of the output buffer \p output. + * + * \return \c 0 on success. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_rsaes_oaep_decrypt( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + const unsigned char *label, size_t label_len, + size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len ); + +/** + * \brief This function performs a private RSA operation to sign + * a message digest using PKCS#1. + * + * It is the generic wrapper for performing a PKCS#1 + * signature. + * + * \note The \p sig buffer must be as large as the size + * of \p ctx->N. For example, 128 Bytes if RSA-1024 is used. + * + * \note For PKCS#1 v2.1 encoding, see comments on + * mbedtls_rsa_rsassa_pss_sign() for details on + * \p md_alg and \p hash_id. + * + * \param ctx The initialized RSA context to use. + * \param f_rng The RNG function to use. This is mandatory and + * must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may be \c NULL + * if \p f_rng doesn't need a context argument. + * \param md_alg The message-digest algorithm used to hash the original data. + * Use #MBEDTLS_MD_NONE for signing raw data. + * \param hashlen The length of the message digest or raw data in Bytes. + * If \p md_alg is not #MBEDTLS_MD_NONE, this must match the + * output length of the corresponding hash algorithm. + * \param hash The buffer holding the message digest or raw data. + * This must be a readable buffer of at least \p hashlen Bytes. + * \param sig The buffer to hold the signature. This must be a writable + * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. A buffer length of + * #MBEDTLS_MPI_MAX_SIZE is always safe. + * + * \return \c 0 if the signing operation was successful. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_pkcs1_sign( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig ); + +/** + * \brief This function performs a PKCS#1 v1.5 signature + * operation (RSASSA-PKCS1-v1_5-SIGN). + * + * \param ctx The initialized RSA context to use. + * \param f_rng The RNG function. This is used for blinding and is + * mandatory; see mbedtls_rsa_private() for more. + * \param p_rng The RNG context to be passed to \p f_rng. This may be \c NULL + * if \p f_rng doesn't need a context argument. + * \param md_alg The message-digest algorithm used to hash the original data. + * Use #MBEDTLS_MD_NONE for signing raw data. + * \param hashlen The length of the message digest or raw data in Bytes. + * If \p md_alg is not #MBEDTLS_MD_NONE, this must match the + * output length of the corresponding hash algorithm. + * \param hash The buffer holding the message digest or raw data. + * This must be a readable buffer of at least \p hashlen Bytes. + * \param sig The buffer to hold the signature. This must be a writable + * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. A buffer length of + * #MBEDTLS_MPI_MAX_SIZE is always safe. + * + * \return \c 0 if the signing operation was successful. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig ); + +/** + * \brief This function performs a PKCS#1 v2.1 PSS signature + * operation (RSASSA-PSS-SIGN). + * + * \note The \c hash_id set in \p ctx by calling + * mbedtls_rsa_set_padding() selects the hash used for the + * encoding operation and for the mask generation function + * (MGF1). For more details on the encoding operation and the + * mask generation function, consult RFC-3447: Public-Key + * Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography + * Specifications. + * + * \note This function enforces that the provided salt length complies + * with FIPS 186-4 §5.5 (e) and RFC 8017 (PKCS#1 v2.2) §9.1.1 + * step 3. The constraint is that the hash length plus the salt + * length plus 2 bytes must be at most the key length. If this + * constraint is not met, this function returns + * #MBEDTLS_ERR_RSA_BAD_INPUT_DATA. + * + * \param ctx The initialized RSA context to use. + * \param f_rng The RNG function. It is mandatory and must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may be \c NULL + * if \p f_rng doesn't need a context argument. + * \param md_alg The message-digest algorithm used to hash the original data. + * Use #MBEDTLS_MD_NONE for signing raw data. + * \param hashlen The length of the message digest or raw data in Bytes. + * If \p md_alg is not #MBEDTLS_MD_NONE, this must match the + * output length of the corresponding hash algorithm. + * \param hash The buffer holding the message digest or raw data. + * This must be a readable buffer of at least \p hashlen Bytes. + * \param saltlen The length of the salt that should be used. + * If passed #MBEDTLS_RSA_SALT_LEN_ANY, the function will use + * the largest possible salt length up to the hash length, + * which is the largest permitted by some standards including + * FIPS 186-4 §5.5. + * \param sig The buffer to hold the signature. This must be a writable + * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. A buffer length of + * #MBEDTLS_MPI_MAX_SIZE is always safe. + * + * \return \c 0 if the signing operation was successful. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_rsassa_pss_sign_ext( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + int saltlen, + unsigned char *sig ); + +/** + * \brief This function performs a PKCS#1 v2.1 PSS signature + * operation (RSASSA-PSS-SIGN). + * + * \note The \c hash_id set in \p ctx by calling + * mbedtls_rsa_set_padding() selects the hash used for the + * encoding operation and for the mask generation function + * (MGF1). For more details on the encoding operation and the + * mask generation function, consult RFC-3447: Public-Key + * Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography + * Specifications. + * + * \note This function always uses the maximum possible salt size, + * up to the length of the payload hash. This choice of salt + * size complies with FIPS 186-4 §5.5 (e) and RFC 8017 (PKCS#1 + * v2.2) §9.1.1 step 3. Furthermore this function enforces a + * minimum salt size which is the hash size minus 2 bytes. If + * this minimum size is too large given the key size (the salt + * size, plus the hash size, plus 2 bytes must be no more than + * the key size in bytes), this function returns + * #MBEDTLS_ERR_RSA_BAD_INPUT_DATA. + * + * \param ctx The initialized RSA context to use. + * \param f_rng The RNG function. It is mandatory and must not be \c NULL. + * \param p_rng The RNG context to be passed to \p f_rng. This may be \c NULL + * if \p f_rng doesn't need a context argument. + * \param md_alg The message-digest algorithm used to hash the original data. + * Use #MBEDTLS_MD_NONE for signing raw data. + * \param hashlen The length of the message digest or raw data in Bytes. + * If \p md_alg is not #MBEDTLS_MD_NONE, this must match the + * output length of the corresponding hash algorithm. + * \param hash The buffer holding the message digest or raw data. + * This must be a readable buffer of at least \p hashlen Bytes. + * \param sig The buffer to hold the signature. This must be a writable + * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. A buffer length of + * #MBEDTLS_MPI_MAX_SIZE is always safe. + * + * \return \c 0 if the signing operation was successful. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_rsassa_pss_sign( mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig ); + +/** + * \brief This function performs a public RSA operation and checks + * the message digest. + * + * This is the generic wrapper for performing a PKCS#1 + * verification. + * + * \note For PKCS#1 v2.1 encoding, see comments on + * mbedtls_rsa_rsassa_pss_verify() about \p md_alg and + * \p hash_id. + * + * \param ctx The initialized RSA public key context to use. + * \param md_alg The message-digest algorithm used to hash the original data. + * Use #MBEDTLS_MD_NONE for signing raw data. + * \param hashlen The length of the message digest or raw data in Bytes. + * If \p md_alg is not #MBEDTLS_MD_NONE, this must match the + * output length of the corresponding hash algorithm. + * \param hash The buffer holding the message digest or raw data. + * This must be a readable buffer of at least \p hashlen Bytes. + * \param sig The buffer holding the signature. This must be a readable + * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * + * \return \c 0 if the verify operation was successful. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_pkcs1_verify( mbedtls_rsa_context *ctx, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig ); + +/** + * \brief This function performs a PKCS#1 v1.5 verification + * operation (RSASSA-PKCS1-v1_5-VERIFY). + * + * \param ctx The initialized RSA public key context to use. + * \param md_alg The message-digest algorithm used to hash the original data. + * Use #MBEDTLS_MD_NONE for signing raw data. + * \param hashlen The length of the message digest or raw data in Bytes. + * If \p md_alg is not #MBEDTLS_MD_NONE, this must match the + * output length of the corresponding hash algorithm. + * \param hash The buffer holding the message digest or raw data. + * This must be a readable buffer of at least \p hashlen Bytes. + * \param sig The buffer holding the signature. This must be a readable + * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * + * \return \c 0 if the verify operation was successful. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_rsassa_pkcs1_v15_verify( mbedtls_rsa_context *ctx, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig ); + +/** + * \brief This function performs a PKCS#1 v2.1 PSS verification + * operation (RSASSA-PSS-VERIFY). + * + * \note The \c hash_id set in \p ctx by calling + * mbedtls_rsa_set_padding() selects the hash used for the + * encoding operation and for the mask generation function + * (MGF1). For more details on the encoding operation and the + * mask generation function, consult RFC-3447: Public-Key + * Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography + * Specifications. If the \c hash_id set in \p ctx by + * mbedtls_rsa_set_padding() is #MBEDTLS_MD_NONE, the \p md_alg + * parameter is used. + * + * \param ctx The initialized RSA public key context to use. + * \param md_alg The message-digest algorithm used to hash the original data. + * Use #MBEDTLS_MD_NONE for signing raw data. + * \param hashlen The length of the message digest or raw data in Bytes. + * If \p md_alg is not #MBEDTLS_MD_NONE, this must match the + * output length of the corresponding hash algorithm. + * \param hash The buffer holding the message digest or raw data. + * This must be a readable buffer of at least \p hashlen Bytes. + * \param sig The buffer holding the signature. This must be a readable + * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * + * \return \c 0 if the verify operation was successful. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig ); + +/** + * \brief This function performs a PKCS#1 v2.1 PSS verification + * operation (RSASSA-PSS-VERIFY). + * + * \note The \p sig buffer must be as large as the size + * of \p ctx->N. For example, 128 Bytes if RSA-1024 is used. + * + * \note The \c hash_id set in \p ctx by mbedtls_rsa_set_padding() is + * ignored. + * + * \param ctx The initialized RSA public key context to use. + * \param md_alg The message-digest algorithm used to hash the original data. + * Use #MBEDTLS_MD_NONE for signing raw data. + * \param hashlen The length of the message digest or raw data in Bytes. + * If \p md_alg is not #MBEDTLS_MD_NONE, this must match the + * output length of the corresponding hash algorithm. + * \param hash The buffer holding the message digest or raw data. + * This must be a readable buffer of at least \p hashlen Bytes. + * \param mgf1_hash_id The message digest algorithm used for the + * verification operation and the mask generation + * function (MGF1). For more details on the encoding + * operation and the mask generation function, consult + * RFC-3447: Public-Key Cryptography Standards + * (PKCS) #1 v2.1: RSA Cryptography + * Specifications. + * \param expected_salt_len The length of the salt used in padding. Use + * #MBEDTLS_RSA_SALT_LEN_ANY to accept any salt length. + * \param sig The buffer holding the signature. This must be a readable + * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes + * for an 2048-bit RSA modulus. + * + * \return \c 0 if the verify operation was successful. + * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure. + */ +int mbedtls_rsa_rsassa_pss_verify_ext( mbedtls_rsa_context *ctx, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + mbedtls_md_type_t mgf1_hash_id, + int expected_salt_len, + const unsigned char *sig ); + +/** + * \brief This function copies the components of an RSA context. + * + * \param dst The destination context. This must be initialized. + * \param src The source context. This must be initialized. + * + * \return \c 0 on success. + * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory allocation failure. + */ +int mbedtls_rsa_copy( mbedtls_rsa_context *dst, const mbedtls_rsa_context *src ); + +/** + * \brief This function frees the components of an RSA key. + * + * \param ctx The RSA context to free. May be \c NULL, in which case + * this function is a no-op. If it is not \c NULL, it must + * point to an initialized RSA context. + */ +void mbedtls_rsa_free( mbedtls_rsa_context *ctx ); + +#if defined(MBEDTLS_SELF_TEST) + +/** + * \brief The RSA checkup routine. + * + * \return \c 0 on success. + * \return \c 1 on failure. + */ +int mbedtls_rsa_self_test( int verbose ); + +#endif /* MBEDTLS_SELF_TEST */ + +#ifdef __cplusplus +} +#endif + +#endif /* rsa.h */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/threading.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/threading.h new file mode 100644 index 0000000..96cadc4 --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/threading.h @@ -0,0 +1,116 @@ +/** + * \file threading.h + * + * \brief Threading abstraction layer + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBEDTLS_THREADING_H +#define MBEDTLS_THREADING_H +#include "mbedtls/private_access.h" + +#include "mbedtls/build_info.h" + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define MBEDTLS_ERR_THREADING_BAD_INPUT_DATA -0x001C /**< Bad input parameters to function. */ +#define MBEDTLS_ERR_THREADING_MUTEX_ERROR -0x001E /**< Locking / unlocking / free failed with error code. */ + +#if defined(MBEDTLS_THREADING_PTHREAD) +#include +typedef struct mbedtls_threading_mutex_t +{ + pthread_mutex_t MBEDTLS_PRIVATE(mutex); + /* is_valid is 0 after a failed init or a free, and nonzero after a + * successful init. This field is not considered part of the public + * API of Mbed TLS and may change without notice. */ + char MBEDTLS_PRIVATE(is_valid); +} mbedtls_threading_mutex_t; +#endif + +#if defined(MBEDTLS_THREADING_ALT) +/* You should define the mbedtls_threading_mutex_t type in your header */ +#include "threading_alt.h" + +/** + * \brief Set your alternate threading implementation function + * pointers and initialize global mutexes. If used, this + * function must be called once in the main thread before any + * other mbed TLS function is called, and + * mbedtls_threading_free_alt() must be called once in the main + * thread after all other mbed TLS functions. + * + * \note mutex_init() and mutex_free() don't return a status code. + * If mutex_init() fails, it should leave its argument (the + * mutex) in a state such that mutex_lock() will fail when + * called with this argument. + * + * \param mutex_init the init function implementation + * \param mutex_free the free function implementation + * \param mutex_lock the lock function implementation + * \param mutex_unlock the unlock function implementation + */ +void mbedtls_threading_set_alt( void (*mutex_init)( mbedtls_threading_mutex_t * ), + void (*mutex_free)( mbedtls_threading_mutex_t * ), + int (*mutex_lock)( mbedtls_threading_mutex_t * ), + int (*mutex_unlock)( mbedtls_threading_mutex_t * ) ); + +/** + * \brief Free global mutexes. + */ +void mbedtls_threading_free_alt( void ); +#endif /* MBEDTLS_THREADING_ALT */ + +#if defined(MBEDTLS_THREADING_C) +/* + * The function pointers for mutex_init, mutex_free, mutex_ and mutex_unlock + * + * All these functions are expected to work or the result will be undefined. + */ +extern void (*mbedtls_mutex_init)( mbedtls_threading_mutex_t *mutex ); +extern void (*mbedtls_mutex_free)( mbedtls_threading_mutex_t *mutex ); +extern int (*mbedtls_mutex_lock)( mbedtls_threading_mutex_t *mutex ); +extern int (*mbedtls_mutex_unlock)( mbedtls_threading_mutex_t *mutex ); + +/* + * Global mutexes + */ +#if defined(MBEDTLS_FS_IO) +extern mbedtls_threading_mutex_t mbedtls_threading_readdir_mutex; +#endif + +#if defined(MBEDTLS_HAVE_TIME_DATE) && !defined(MBEDTLS_PLATFORM_GMTIME_R_ALT) +/* This mutex may or may not be used in the default definition of + * mbedtls_platform_gmtime_r(), but in order to determine that, + * we need to check POSIX features, hence modify _POSIX_C_SOURCE. + * With the current approach, this declaration is orphaned, lacking + * an accompanying definition, in case mbedtls_platform_gmtime_r() + * doesn't need it, but that's not a problem. */ +extern mbedtls_threading_mutex_t mbedtls_threading_gmtime_mutex; +#endif /* MBEDTLS_HAVE_TIME_DATE && !MBEDTLS_PLATFORM_GMTIME_R_ALT */ + +#endif /* MBEDTLS_THREADING_C */ + +#ifdef __cplusplus +} +#endif + +#endif /* threading.h */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/version.h b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/version.h new file mode 100644 index 0000000..773da4a --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/include/mbedtls/version.h @@ -0,0 +1,90 @@ +/** + * \file version.h + * + * \brief Run-time version information + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/* + * This set of run-time variables can be used to determine the version number of + * the Mbed TLS library used. Compile-time version defines for the same can be + * found in build_info.h + */ +#ifndef MBEDTLS_VERSION_H +#define MBEDTLS_VERSION_H + +#include "mbedtls/build_info.h" + +#if defined(MBEDTLS_VERSION_C) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Get the version number. + * + * \return The constructed version number in the format + * MMNNPP00 (Major, Minor, Patch). + */ +unsigned int mbedtls_version_get_number( void ); + +/** + * Get the version string ("x.y.z"). + * + * \param string The string that will receive the value. + * (Should be at least 9 bytes in size) + */ +void mbedtls_version_get_string( char *string ); + +/** + * Get the full version string ("mbed TLS x.y.z"). + * + * \param string The string that will receive the value. The mbed TLS version + * string will use 18 bytes AT MOST including a terminating + * null byte. + * (So the buffer should be at least 18 bytes to receive this + * version string). + */ +void mbedtls_version_get_string_full( char *string ); + +/** + * \brief Check if support for a feature was compiled into this + * mbed TLS binary. This allows you to see at runtime if the + * library was for instance compiled with or without + * Multi-threading support. + * + * \note only checks against defines in the sections "System + * support", "mbed TLS modules" and "mbed TLS feature + * support" in mbedtls_config.h + * + * \param feature The string for the define to check (e.g. "MBEDTLS_AES_C") + * + * \return 0 if the feature is present, + * -1 if the feature is not present and + * -2 if support for feature checking as a whole was not + * compiled in. + */ +int mbedtls_version_check_feature( const char *feature ); + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_VERSION_C */ + +#endif /* version.h */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/pkg.yml b/bootloader/mcuboot/ext/mbedtls-asn1/pkg.yml new file mode 100644 index 0000000..148f9c7 --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/pkg.yml @@ -0,0 +1,24 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: ext/mbedtls-asn1 +pkg.description: "MCUboot's bundled mbed-tls ASN1 parser" +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/src/asn1parse.c b/bootloader/mcuboot/ext/mbedtls-asn1/src/asn1parse.c new file mode 100644 index 0000000..83c7c58 --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/src/asn1parse.c @@ -0,0 +1,481 @@ +/* + * Generic ASN.1 parsing + * + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "common.h" + +#if defined(MBEDTLS_ASN1_PARSE_C) + +#include "mbedtls/asn1.h" +#include "mbedtls/platform_util.h" +#include "mbedtls/error.h" + +#include + +#if defined(MBEDTLS_BIGNUM_C) +#include "mbedtls/bignum.h" +#endif + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +/* + * ASN.1 DER decoding routines + */ +int mbedtls_asn1_get_len( unsigned char **p, + const unsigned char *end, + size_t *len ) +{ + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + if( ( **p & 0x80 ) == 0 ) + *len = *(*p)++; + else + { + switch( **p & 0x7F ) + { + case 1: + if( ( end - *p ) < 2 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + *len = (*p)[1]; + (*p) += 2; + break; + + case 2: + if( ( end - *p ) < 3 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + *len = ( (size_t)(*p)[1] << 8 ) | (*p)[2]; + (*p) += 3; + break; + + case 3: + if( ( end - *p ) < 4 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + *len = ( (size_t)(*p)[1] << 16 ) | + ( (size_t)(*p)[2] << 8 ) | (*p)[3]; + (*p) += 4; + break; + + case 4: + if( ( end - *p ) < 5 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + *len = ( (size_t)(*p)[1] << 24 ) | ( (size_t)(*p)[2] << 16 ) | + ( (size_t)(*p)[3] << 8 ) | (*p)[4]; + (*p) += 5; + break; + + default: + return( MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + } + } + + if( *len > (size_t) ( end - *p ) ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + return( 0 ); +} + +int mbedtls_asn1_get_tag( unsigned char **p, + const unsigned char *end, + size_t *len, int tag ) +{ + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + if( **p != tag ) + return( MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + + (*p)++; + + return( mbedtls_asn1_get_len( p, end, len ) ); +} + +int mbedtls_asn1_get_bool( unsigned char **p, + const unsigned char *end, + int *val ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + size_t len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, MBEDTLS_ASN1_BOOLEAN ) ) != 0 ) + return( ret ); + + if( len != 1 ) + return( MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + + *val = ( **p != 0 ) ? 1 : 0; + (*p)++; + + return( 0 ); +} + +static int asn1_get_tagged_int( unsigned char **p, + const unsigned char *end, + int tag, int *val ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + size_t len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, tag ) ) != 0 ) + return( ret ); + + /* + * len==0 is malformed (0 must be represented as 020100 for INTEGER, + * or 0A0100 for ENUMERATED tags + */ + if( len == 0 ) + return( MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + /* This is a cryptography library. Reject negative integers. */ + if( ( **p & 0x80 ) != 0 ) + return( MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + + /* Skip leading zeros. */ + while( len > 0 && **p == 0 ) + { + ++( *p ); + --len; + } + + /* Reject integers that don't fit in an int. This code assumes that + * the int type has no padding bit. */ + if( len > sizeof( int ) ) + return( MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + if( len == sizeof( int ) && ( **p & 0x80 ) != 0 ) + return( MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + + *val = 0; + while( len-- > 0 ) + { + *val = ( *val << 8 ) | **p; + (*p)++; + } + + return( 0 ); +} + +int mbedtls_asn1_get_int( unsigned char **p, + const unsigned char *end, + int *val ) +{ + return( asn1_get_tagged_int( p, end, MBEDTLS_ASN1_INTEGER, val) ); +} + +int mbedtls_asn1_get_enum( unsigned char **p, + const unsigned char *end, + int *val ) +{ + return( asn1_get_tagged_int( p, end, MBEDTLS_ASN1_ENUMERATED, val) ); +} + +#if defined(MBEDTLS_BIGNUM_C) +int mbedtls_asn1_get_mpi( unsigned char **p, + const unsigned char *end, + mbedtls_mpi *X ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + size_t len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, MBEDTLS_ASN1_INTEGER ) ) != 0 ) + return( ret ); + + ret = mbedtls_mpi_read_binary( X, *p, len ); + + *p += len; + + return( ret ); +} +#endif /* MBEDTLS_BIGNUM_C */ + +int mbedtls_asn1_get_bitstring( unsigned char **p, const unsigned char *end, + mbedtls_asn1_bitstring *bs) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + + /* Certificate type is a single byte bitstring */ + if( ( ret = mbedtls_asn1_get_tag( p, end, &bs->len, MBEDTLS_ASN1_BIT_STRING ) ) != 0 ) + return( ret ); + + /* Check length, subtract one for actual bit string length */ + if( bs->len < 1 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + bs->len -= 1; + + /* Get number of unused bits, ensure unused bits <= 7 */ + bs->unused_bits = **p; + if( bs->unused_bits > 7 ) + return( MBEDTLS_ERR_ASN1_INVALID_LENGTH ); + (*p)++; + + /* Get actual bitstring */ + bs->p = *p; + *p += bs->len; + + if( *p != end ) + return( MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +/* + * Traverse an ASN.1 "SEQUENCE OF " + * and call a callback for each entry found. + */ +int mbedtls_asn1_traverse_sequence_of( + unsigned char **p, + const unsigned char *end, + unsigned char tag_must_mask, unsigned char tag_must_val, + unsigned char tag_may_mask, unsigned char tag_may_val, + int (*cb)( void *ctx, int tag, + unsigned char *start, size_t len ), + void *ctx ) +{ + int ret; + size_t len; + + /* Get main sequence tag */ + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + { + return( ret ); + } + + if( *p + len != end ) + return( MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + while( *p < end ) + { + unsigned char const tag = *(*p)++; + + if( ( tag & tag_must_mask ) != tag_must_val ) + return( MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ); + + if( ( ret = mbedtls_asn1_get_len( p, end, &len ) ) != 0 ) + return( ret ); + + if( ( tag & tag_may_mask ) == tag_may_val ) + { + if( cb != NULL ) + { + ret = cb( ctx, tag, *p, len ); + if( ret != 0 ) + return( ret ); + } + } + + *p += len; + } + + return( 0 ); +} + +/* + * Get a bit string without unused bits + */ +int mbedtls_asn1_get_bitstring_null( unsigned char **p, const unsigned char *end, + size_t *len ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + + if( ( ret = mbedtls_asn1_get_tag( p, end, len, MBEDTLS_ASN1_BIT_STRING ) ) != 0 ) + return( ret ); + + if( *len == 0 ) + return( MBEDTLS_ERR_ASN1_INVALID_DATA ); + --( *len ); + + if( **p != 0 ) + return( MBEDTLS_ERR_ASN1_INVALID_DATA ); + ++( *p ); + + return( 0 ); +} + +void mbedtls_asn1_sequence_free( mbedtls_asn1_sequence *seq ) +{ + while( seq != NULL ) + { + mbedtls_asn1_sequence *next = seq->next; + mbedtls_platform_zeroize( seq, sizeof( *seq ) ); + mbedtls_free( seq ); + seq = next; + } +} + +typedef struct +{ + int tag; + mbedtls_asn1_sequence *cur; +} asn1_get_sequence_of_cb_ctx_t; + +static int asn1_get_sequence_of_cb( void *ctx, + int tag, + unsigned char *start, + size_t len ) +{ + asn1_get_sequence_of_cb_ctx_t *cb_ctx = + (asn1_get_sequence_of_cb_ctx_t *) ctx; + mbedtls_asn1_sequence *cur = + cb_ctx->cur; + + if( cur->buf.p != NULL ) + { + cur->next = + mbedtls_calloc( 1, sizeof( mbedtls_asn1_sequence ) ); + + if( cur->next == NULL ) + return( MBEDTLS_ERR_ASN1_ALLOC_FAILED ); + + cur = cur->next; + } + + cur->buf.p = start; + cur->buf.len = len; + cur->buf.tag = tag; + + cb_ctx->cur = cur; + return( 0 ); +} + +/* + * Parses and splits an ASN.1 "SEQUENCE OF " + */ +int mbedtls_asn1_get_sequence_of( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_sequence *cur, + int tag) +{ + asn1_get_sequence_of_cb_ctx_t cb_ctx = { tag, cur }; + memset( cur, 0, sizeof( mbedtls_asn1_sequence ) ); + return( mbedtls_asn1_traverse_sequence_of( + p, end, 0xFF, tag, 0, 0, + asn1_get_sequence_of_cb, &cb_ctx ) ); +} + +int mbedtls_asn1_get_alg( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_buf *alg, mbedtls_asn1_buf *params ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + size_t len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) + return( ret ); + + if( ( end - *p ) < 1 ) + return( MBEDTLS_ERR_ASN1_OUT_OF_DATA ); + + alg->tag = **p; + end = *p + len; + + if( ( ret = mbedtls_asn1_get_tag( p, end, &alg->len, MBEDTLS_ASN1_OID ) ) != 0 ) + return( ret ); + + alg->p = *p; + *p += alg->len; + + if( *p == end ) + { + mbedtls_platform_zeroize( params, sizeof(mbedtls_asn1_buf) ); + return( 0 ); + } + + params->tag = **p; + (*p)++; + + if( ( ret = mbedtls_asn1_get_len( p, end, ¶ms->len ) ) != 0 ) + return( ret ); + + params->p = *p; + *p += params->len; + + if( *p != end ) + return( MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ); + + return( 0 ); +} + +int mbedtls_asn1_get_alg_null( unsigned char **p, + const unsigned char *end, + mbedtls_asn1_buf *alg ) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + mbedtls_asn1_buf params; + + memset( ¶ms, 0, sizeof(mbedtls_asn1_buf) ); + + if( ( ret = mbedtls_asn1_get_alg( p, end, alg, ¶ms ) ) != 0 ) + return( ret ); + + if( ( params.tag != MBEDTLS_ASN1_NULL && params.tag != 0 ) || params.len != 0 ) + return( MBEDTLS_ERR_ASN1_INVALID_DATA ); + + return( 0 ); +} + +void mbedtls_asn1_free_named_data( mbedtls_asn1_named_data *cur ) +{ + if( cur == NULL ) + return; + + mbedtls_free( cur->oid.p ); + mbedtls_free( cur->val.p ); + + mbedtls_platform_zeroize( cur, sizeof( mbedtls_asn1_named_data ) ); +} + +void mbedtls_asn1_free_named_data_list( mbedtls_asn1_named_data **head ) +{ + mbedtls_asn1_named_data *cur; + + while( ( cur = *head ) != NULL ) + { + *head = cur->next; + mbedtls_asn1_free_named_data( cur ); + mbedtls_free( cur ); + } +} + +const mbedtls_asn1_named_data *mbedtls_asn1_find_named_data( const mbedtls_asn1_named_data *list, + const char *oid, size_t len ) +{ + while( list != NULL ) + { + if( list->oid.len == len && + memcmp( list->oid.p, oid, len ) == 0 ) + { + break; + } + + list = list->next; + } + + return( list ); +} + +#endif /* MBEDTLS_ASN1_PARSE_C */ diff --git a/bootloader/mcuboot/ext/mbedtls-asn1/src/platform_util.c b/bootloader/mcuboot/ext/mbedtls-asn1/src/platform_util.c new file mode 100644 index 0000000..4e97e4d --- /dev/null +++ b/bootloader/mcuboot/ext/mbedtls-asn1/src/platform_util.c @@ -0,0 +1,133 @@ +/* + * Common and shared functions used by multiple modules in the Mbed TLS + * library. + * + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * Ensure gmtime_r is available even with -std=c99; must be defined before + * mbedtls_config.h, which pulls in glibc's features.h. Harmless on other platforms. + */ +#if !defined(_POSIX_C_SOURCE) +#define _POSIX_C_SOURCE 200112L +#endif + +#include "common.h" + +#include "mbedtls/platform_util.h" +#include "mbedtls/platform.h" +#include "mbedtls/threading.h" + +#include +#include + +#if !defined(MBEDTLS_PLATFORM_ZEROIZE_ALT) +/* + * This implementation should never be optimized out by the compiler + * + * This implementation for mbedtls_platform_zeroize() was inspired from Colin + * Percival's blog article at: + * + * http://www.daemonology.net/blog/2014-09-04-how-to-zero-a-buffer.html + * + * It uses a volatile function pointer to the standard memset(). Because the + * pointer is volatile the compiler expects it to change at + * any time and will not optimize out the call that could potentially perform + * other operations on the input buffer instead of just setting it to 0. + * Nevertheless, as pointed out by davidtgoldblatt on Hacker News + * (refer to http://www.daemonology.net/blog/2014-09-05-erratum.html for + * details), optimizations of the following form are still possible: + * + * if( memset_func != memset ) + * memset_func( buf, 0, len ); + * + * Note that it is extremely difficult to guarantee that + * mbedtls_platform_zeroize() will not be optimized out by aggressive compilers + * in a portable way. For this reason, Mbed TLS also provides the configuration + * option MBEDTLS_PLATFORM_ZEROIZE_ALT, which allows users to configure + * mbedtls_platform_zeroize() to use a suitable implementation for their + * platform and needs. + */ +static void * (* const volatile memset_func)( void *, int, size_t ) = memset; + +void mbedtls_platform_zeroize( void *buf, size_t len ) +{ + MBEDTLS_INTERNAL_VALIDATE( len == 0 || buf != NULL ); + + if( len > 0 ) + memset_func( buf, 0, len ); +} +#endif /* MBEDTLS_PLATFORM_ZEROIZE_ALT */ + +#if defined(MBEDTLS_HAVE_TIME_DATE) && !defined(MBEDTLS_PLATFORM_GMTIME_R_ALT) +#include +#if !defined(_WIN32) && (defined(unix) || \ + defined(__unix) || defined(__unix__) || (defined(__APPLE__) && \ + defined(__MACH__))) +#include +#endif /* !_WIN32 && (unix || __unix || __unix__ || + * (__APPLE__ && __MACH__)) */ + +#if !( ( defined(_POSIX_VERSION) && _POSIX_VERSION >= 200809L ) || \ + ( defined(_POSIX_THREAD_SAFE_FUNCTIONS ) && \ + _POSIX_THREAD_SAFE_FUNCTIONS >= 200112L ) ) +/* + * This is a convenience shorthand macro to avoid checking the long + * preprocessor conditions above. Ideally, we could expose this macro in + * platform_util.h and simply use it in platform_util.c, threading.c and + * threading.h. However, this macro is not part of the Mbed TLS public API, so + * we keep it private by only defining it in this file + */ +#if ! ( defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) ) +#define PLATFORM_UTIL_USE_GMTIME +#endif /* ! ( defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) ) */ + +#endif /* !( ( defined(_POSIX_VERSION) && _POSIX_VERSION >= 200809L ) || \ + ( defined(_POSIX_THREAD_SAFE_FUNCTIONS ) && \ + _POSIX_THREAD_SAFE_FUNCTIONS >= 200112L ) ) */ + +struct tm *mbedtls_platform_gmtime_r( const mbedtls_time_t *tt, + struct tm *tm_buf ) +{ +#if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) + return( ( gmtime_s( tm_buf, tt ) == 0 ) ? tm_buf : NULL ); +#elif !defined(PLATFORM_UTIL_USE_GMTIME) + return( gmtime_r( tt, tm_buf ) ); +#else + struct tm *lt; + +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_lock( &mbedtls_threading_gmtime_mutex ) != 0 ) + return( NULL ); +#endif /* MBEDTLS_THREADING_C */ + + lt = gmtime( tt ); + + if( lt != NULL ) + { + memcpy( tm_buf, lt, sizeof( struct tm ) ); + } + +#if defined(MBEDTLS_THREADING_C) + if( mbedtls_mutex_unlock( &mbedtls_threading_gmtime_mutex ) != 0 ) + return( NULL ); +#endif /* MBEDTLS_THREADING_C */ + + return( ( lt == NULL ) ? NULL : tm_buf ); +#endif /* _WIN32 && !EFIX64 && !EFI32 */ +} +#endif /* MBEDTLS_HAVE_TIME_DATE && MBEDTLS_PLATFORM_GMTIME_R_ALT */ diff --git a/bootloader/mcuboot/ext/nrf/README.md b/bootloader/mcuboot/ext/nrf/README.md new file mode 100644 index 0000000..8346f42 --- /dev/null +++ b/bootloader/mcuboot/ext/nrf/README.md @@ -0,0 +1,18 @@ +# Building MCUboot with nRF52840 CC310 enabled + +## Prerequisites + +Clone [nrfxlib](https://github.com/NordicPlayground/nrfxlib) next to the MCUboot root folder. So that it's located `../nrfxlib` from MCUboot root folder. + +## Building + +make sure `root-ec-p256.pem` is set as the certificate and that `CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256` is selected not `CONFIG_BOOT_SIGNATURE_TYPE_RSA` in `prj.conf` of `boot/zephyr`. +Since it defaults to tinycrypt you'll have to go into `menuconfig` and change the implementation selection to `cc310` or also set this in `prj.conf`. + +``` +mkdir build && cd build +cmake -GNinja -DBOARD=nrf52840dk/nrf52840 +ninja flash +``` + +Build a hello world example in zephyr and sign it with imgtool.py with the `root-ec-p256.pem` and flash it at `FLASH_AREA_IMAGE_0`. diff --git a/bootloader/mcuboot/ext/nrf/cc310_glue.c b/bootloader/mcuboot/ext/nrf/cc310_glue.c new file mode 100644 index 0000000..759a8b6 --- /dev/null +++ b/bootloader/mcuboot/ext/nrf/cc310_glue.c @@ -0,0 +1,73 @@ +/* + * Copyright Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "cc310_glue.h" + +int cc310_init(void) +{ + /* Only initialize once */ + static bool initialized; + + if (!initialized) { + nrf_cc310_enable(); + if (nrf_cc310_bl_init() != 0) { + return -1; + } + initialized = true; + nrf_cc310_disable(); + } + + return 0; +} + +void cc310_sha256_update(nrf_cc310_bl_hash_context_sha256_t *ctx, + const void *data, + uint32_t data_len) +{ + /* + * NRF Cryptocell can only read from RAM this allocates a buffer on the stack + * if the data provided is not located in RAM. + */ + + if ((uint32_t) data < CONFIG_SRAM_BASE_ADDRESS) { + uint8_t stack_buffer[data_len]; + uint32_t block_len = data_len; + memcpy(stack_buffer, data, block_len); + nrf_cc310_bl_hash_sha256_update(ctx, stack_buffer, block_len); + } else { + nrf_cc310_bl_hash_sha256_update(ctx, data, data_len); + } +}; + +int cc310_ecdsa_verify_secp256r1(uint8_t *hash, + uint8_t *public_key, + uint8_t *signature, + size_t hash_len) +{ + int rc; + nrf_cc310_bl_ecdsa_verify_context_secp256r1_t ctx; + cc310_init(); + nrf_cc310_enable(); + rc = nrf_cc310_bl_ecdsa_verify_secp256r1(&ctx, + (nrf_cc310_bl_ecc_public_key_secp256r1_t *) public_key, + (nrf_cc310_bl_ecc_signature_secp256r1_t *) signature, + hash, + hash_len); + nrf_cc310_disable(); + return rc; +} + diff --git a/bootloader/mcuboot/ext/nrf/cc310_glue.h b/bootloader/mcuboot/ext/nrf/cc310_glue.h new file mode 100644 index 0000000..22eb949 --- /dev/null +++ b/bootloader/mcuboot/ext/nrf/cc310_glue.h @@ -0,0 +1,77 @@ +/* + * Copyright Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef NRF_CC310_GLUE_H__ +#define NRF_CC310_GLUE_H__ + +#include +#include +#include +#include +#include +#include + +/* + * Name translation for peripherals with only one type of access available. + */ +#if !defined(NRF_TRUSTZONE_NONSECURE) && defined(CONFIG_ARM_TRUSTZONE_M) +#define NRF_CRYPTOCELL NRF_CRYPTOCELL_S +#endif + +typedef nrf_cc310_bl_hash_context_sha256_t bootutil_sha_context; + +int cc310_ecdsa_verify_secp256r1(uint8_t *hash, + uint8_t *public_key, + uint8_t *signature, + size_t hash_len); + + +int cc310_init(void); + +static inline void cc310_sha256_init(nrf_cc310_bl_hash_context_sha256_t *ctx); + +void cc310_sha256_update(nrf_cc310_bl_hash_context_sha256_t *ctx, + const void *data, + uint32_t data_len); + +static inline void nrf_cc310_enable(void) +{ + NRF_CRYPTOCELL->ENABLE=1; +} + +static inline void nrf_cc310_disable(void) +{ + NRF_CRYPTOCELL->ENABLE=0; +} + +/* Enable and disable cc310 to reduce power consumption */ +static inline void cc310_sha256_init(nrf_cc310_bl_hash_context_sha256_t * ctx) +{ + cc310_init(); + nrf_cc310_enable(); + nrf_cc310_bl_hash_sha256_init(ctx); +} + +static inline void cc310_sha256_finalize(nrf_cc310_bl_hash_context_sha256_t *ctx, + uint8_t *output) +{ + nrf_cc310_bl_hash_sha256_finalize(ctx, + (nrf_cc310_bl_hash_digest_sha256_t *)output); + nrf_cc310_disable(); +} + +#endif /* NRF_CC310_GLUE_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt-sha512/lib/include/tinycrypt/sha512.h b/bootloader/mcuboot/ext/tinycrypt-sha512/lib/include/tinycrypt/sha512.h new file mode 100644 index 0000000..f0211b2 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt-sha512/lib/include/tinycrypt/sha512.h @@ -0,0 +1,129 @@ +/* sha512.h - TinyCrypt interface to a SHA-512 implementation */ + +/* + * Copyright (C) 2020 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief Interface to a SHA-512 implementation. + * + * Overview: SHA-512 is a NIST approved cryptographic hashing algorithm + * specified in FIPS 180. A hash algorithm maps data of arbitrary + * size to data of fixed length. + * + * Security: SHA-512 provides 256 bits of security against collision attacks + * and 512 bits of security against pre-image attacks. SHA-512 does + * NOT behave like a random oracle, but it can be used as one if + * the string being hashed is prefix-free encoded before hashing. + * + * Usage: 1) call tc_sha512_init to initialize a struct + * tc_sha512_state_struct before hashing a new string. + * + * 2) call tc_sha512_update to hash the next string segment; + * tc_sha512_update can be called as many times as needed to hash + * all of the segments of a string; the order is important. + * + * 3) call tc_sha512_final to out put the digest from a hashing + * operation. + */ + +#ifndef __TC_SHA512_H__ +#define __TC_SHA512_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define TC_SHA512_BLOCK_SIZE (128) +#define TC_SHA512_DIGEST_SIZE (64) +#define TC_SHA512_STATE_BLOCKS (TC_SHA512_DIGEST_SIZE/8) + +struct tc_sha512_state_struct { + uint64_t iv[TC_SHA512_STATE_BLOCKS]; + uint64_t bits_hashed; + uint8_t leftover[TC_SHA512_BLOCK_SIZE]; + size_t leftover_offset; +}; + +typedef struct tc_sha512_state_struct *TCSha512State_t; + +/** + * @brief SHA512 initialization procedure + * Initializes s + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if s == NULL + * @param s Sha512 state struct + */ +int tc_sha512_init(TCSha512State_t s); + +/** + * @brief SHA512 update procedure + * Hashes data_length bytes addressed by data into state s + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * s == NULL, + * s->iv == NULL, + * data == NULL + * @note Assumes s has been initialized by tc_sha512_init + * @warning The state buffer 'leftover' is left in memory after processing + * If your application intends to have sensitive data in this + * buffer, remind to erase it after the data has been processed + * @param s Sha512 state struct + * @param data message to hash + * @param datalen length of message to hash + */ +int tc_sha512_update (TCSha512State_t s, const uint8_t *data, size_t datalen); + +/** + * @brief SHA512 final procedure + * Inserts the completed hash computation into digest + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * s == NULL, + * s->iv == NULL, + * digest == NULL + * @note Assumes: s has been initialized by tc_sha512_init + * digest points to at least TC_SHA512_DIGEST_SIZE bytes + * @warning The state buffer 'leftover' is left in memory after processing + * If your application intends to have sensitive data in this + * buffer, remind to erase it after the data has been processed + * @param digest unsigned eight bit integer + * @param Sha512 state struct + */ +int tc_sha512_final(uint8_t *digest, TCSha512State_t s); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_SHA512_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt-sha512/lib/pkg.yml b/bootloader/mcuboot/ext/tinycrypt-sha512/lib/pkg.yml new file mode 100644 index 0000000..b9cb8e6 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt-sha512/lib/pkg.yml @@ -0,0 +1,30 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: ext/tinycrypt-sha512/lib +pkg.description: "MCUboot's SHA512 for tinycrypt" +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: + +pkg.src_dirs: + - "source" + +pkg.cflags: + - "-std=c99" diff --git a/bootloader/mcuboot/ext/tinycrypt-sha512/lib/source/sha512.c b/bootloader/mcuboot/ext/tinycrypt-sha512/lib/source/sha512.c new file mode 100644 index 0000000..eb3aa76 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt-sha512/lib/source/sha512.c @@ -0,0 +1,234 @@ +/* sha512.c - TinyCrypt SHA-512 crypto hash algorithm implementation */ + +/* + * Copyright (C) 2020 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +static void compress(uint64_t *iv, const uint8_t *data); + +int tc_sha512_init(TCSha512State_t s) +{ + /* input sanity check: */ + if (s == (TCSha512State_t) 0) { + return TC_CRYPTO_FAIL; + } + + /* + * Setting the initial state values. + * These values correspond to the first 64 bits of the fractional parts + * of the square roots of the first 8 primes: 2, 3, 5, 7, 11, 13, 17 + * and 19. + */ + _set((uint8_t *) s, 0x00, sizeof(*s)); + s->iv[0] = 0x6a09e667f3bcc908; + s->iv[1] = 0xbb67ae8584caa73b; + s->iv[2] = 0x3c6ef372fe94f82b; + s->iv[3] = 0xa54ff53a5f1d36f1; + s->iv[4] = 0x510e527fade682d1; + s->iv[5] = 0x9b05688c2b3e6c1f; + s->iv[6] = 0x1f83d9abfb41bd6b; + s->iv[7] = 0x5be0cd19137e2179; + + return TC_CRYPTO_SUCCESS; +} + +int tc_sha512_update(TCSha512State_t s, const uint8_t *data, size_t datalen) +{ + /* input sanity check: */ + if (s == (TCSha512State_t) 0 || data == (void *) 0) { + return TC_CRYPTO_FAIL; + } else if (datalen == 0) { + return TC_CRYPTO_SUCCESS; + } + + while (datalen-- > 0) { + s->leftover[s->leftover_offset++] = *(data++); + if (s->leftover_offset >= TC_SHA512_BLOCK_SIZE) { + compress(s->iv, s->leftover); + s->leftover_offset = 0; + s->bits_hashed += (TC_SHA512_BLOCK_SIZE << 3); + } + } + + return TC_CRYPTO_SUCCESS; +} + +int tc_sha512_final(uint8_t *digest, TCSha512State_t s) +{ + unsigned int i; + + /* input sanity check: */ + if (digest == (uint8_t *) 0 || s == (TCSha512State_t) 0) { + return TC_CRYPTO_FAIL; + } + + s->bits_hashed += (s->leftover_offset << 3); + + s->leftover[s->leftover_offset++] = 0x80; /* always room for one byte */ + if (s->leftover_offset > (sizeof(s->leftover) - 16)) { + /* there is not room for all the padding in this block */ + _set(s->leftover + s->leftover_offset, 0x00, + sizeof(s->leftover) - s->leftover_offset); + compress(s->iv, s->leftover); + s->leftover_offset = 0; + } + + /* + * add the padding and the length in big-Endian format + * + * NOTE: SHA-512 uses 128 bits for the length of the message, but the + * current implementation is only using 64 bits for size, leaving the + * 64 "upper" bits zeroed. + */ + _set(s->leftover + s->leftover_offset, 0x00, + sizeof(s->leftover) - 8 - s->leftover_offset); + s->leftover[sizeof(s->leftover) - 1] = (uint8_t)(s->bits_hashed); + s->leftover[sizeof(s->leftover) - 2] = (uint8_t)(s->bits_hashed >> 8); + s->leftover[sizeof(s->leftover) - 3] = (uint8_t)(s->bits_hashed >> 16); + s->leftover[sizeof(s->leftover) - 4] = (uint8_t)(s->bits_hashed >> 24); + s->leftover[sizeof(s->leftover) - 5] = (uint8_t)(s->bits_hashed >> 32); + s->leftover[sizeof(s->leftover) - 6] = (uint8_t)(s->bits_hashed >> 40); + s->leftover[sizeof(s->leftover) - 7] = (uint8_t)(s->bits_hashed >> 48); + s->leftover[sizeof(s->leftover) - 8] = (uint8_t)(s->bits_hashed >> 56); + + /* hash the padding and length */ + compress(s->iv, s->leftover); + + /* copy the iv out to digest */ + for (i = 0; i < TC_SHA512_STATE_BLOCKS; ++i) { + uint64_t t = *((uint64_t *) &s->iv[i]); + *digest++ = (uint8_t)(t >> 56); + *digest++ = (uint8_t)(t >> 48); + *digest++ = (uint8_t)(t >> 40); + *digest++ = (uint8_t)(t >> 32); + *digest++ = (uint8_t)(t >> 24); + *digest++ = (uint8_t)(t >> 16); + *digest++ = (uint8_t)(t >> 8); + *digest++ = (uint8_t)(t); + } + + /* destroy the current state */ + _set(s, 0, sizeof(*s)); + + return TC_CRYPTO_SUCCESS; +} + +/* + * Initializing SHA-512 Hash constant words K. + * These values correspond to the first 64 bits of the fractional parts of the + * cube roots of the first 80 primes between 2 and 409. + */ +static const uint64_t k512[80] = { + 0x428a2f98d728ae22, 0x7137449123ef65cd, 0xb5c0fbcfec4d3b2f, 0xe9b5dba58189dbbc, 0x3956c25bf348b538, + 0x59f111f1b605d019, 0x923f82a4af194f9b, 0xab1c5ed5da6d8118, 0xd807aa98a3030242, 0x12835b0145706fbe, + 0x243185be4ee4b28c, 0x550c7dc3d5ffb4e2, 0x72be5d74f27b896f, 0x80deb1fe3b1696b1, 0x9bdc06a725c71235, + 0xc19bf174cf692694, 0xe49b69c19ef14ad2, 0xefbe4786384f25e3, 0x0fc19dc68b8cd5b5, 0x240ca1cc77ac9c65, + 0x2de92c6f592b0275, 0x4a7484aa6ea6e483, 0x5cb0a9dcbd41fbd4, 0x76f988da831153b5, 0x983e5152ee66dfab, + 0xa831c66d2db43210, 0xb00327c898fb213f, 0xbf597fc7beef0ee4, 0xc6e00bf33da88fc2, 0xd5a79147930aa725, + 0x06ca6351e003826f, 0x142929670a0e6e70, 0x27b70a8546d22ffc, 0x2e1b21385c26c926, 0x4d2c6dfc5ac42aed, + 0x53380d139d95b3df, 0x650a73548baf63de, 0x766a0abb3c77b2a8, 0x81c2c92e47edaee6, 0x92722c851482353b, + 0xa2bfe8a14cf10364, 0xa81a664bbc423001, 0xc24b8b70d0f89791, 0xc76c51a30654be30, 0xd192e819d6ef5218, + 0xd69906245565a910, 0xf40e35855771202a, 0x106aa07032bbd1b8, 0x19a4c116b8d2d0c8, 0x1e376c085141ab53, + 0x2748774cdf8eeb99, 0x34b0bcb5e19b48a8, 0x391c0cb3c5c95a63, 0x4ed8aa4ae3418acb, 0x5b9cca4f7763e373, + 0x682e6ff3d6b2b8a3, 0x748f82ee5defb2fc, 0x78a5636f43172f60, 0x84c87814a1f0ab72, 0x8cc702081a6439ec, + 0x90befffa23631e28, 0xa4506cebde82bde9, 0xbef9a3f7b2c67915, 0xc67178f2e372532b, 0xca273eceea26619c, + 0xd186b8c721c0c207, 0xeada7dd6cde0eb1e, 0xf57d4f7fee6ed178, 0x06f067aa72176fba, 0x0a637dc5a2c898a6, + 0x113f9804bef90dae, 0x1b710b35131c471b, 0x28db77f523047d84, 0x32caab7b40c72493, 0x3c9ebe0a15c9bebc, + 0x431d67c49c100d4c, 0x4cc5d4becb3e42b6, 0x597f299cfc657e2a, 0x5fcb6fab3ad6faec, 0x6c44198c4a475817 +}; + +static inline uint64_t ROTR(uint64_t a, uint64_t n) +{ + return (((a) >> n) | ((a) << (64 - n))); +} + +#define Sigma0(a)(ROTR((a), 28) ^ ROTR((a), 34) ^ ROTR((a), 39)) +#define Sigma1(a)(ROTR((a), 14) ^ ROTR((a), 18) ^ ROTR((a), 41)) +#define sigma0(a)(ROTR((a), 1) ^ ROTR((a), 8) ^ ((a) >> 7)) +#define sigma1(a)(ROTR((a), 19) ^ ROTR((a), 61) ^ ((a) >> 6)) + +#define Ch(a, b, c)(((a) & (b)) ^ ((~(a)) & (c))) +#define Maj(a, b, c)(((a) & (b)) ^ ((a) & (c)) ^ ((b) & (c))) + +static inline uint64_t BigEndian(const uint8_t **c) +{ + uint64_t n = 0; + + n = (uint64_t)(*((*c)++)) << 56; + n |= (uint64_t)(*((*c)++)) << 48; + n |= (uint64_t)(*((*c)++)) << 40; + n |= (uint64_t)(*((*c)++)) << 32; + n |= (uint64_t)(*((*c)++)) << 24; + n |= (uint64_t)(*((*c)++)) << 16; + n |= (uint64_t)(*((*c)++)) << 8; + n |= (uint64_t)(*((*c)++)); + return n; +} + +static void compress(uint64_t *iv, const uint8_t *data) +{ + uint64_t a, b, c, d, e, f, g, h; + uint64_t s0, s1; + uint64_t t1, t2; + uint64_t work_space[16]; + uint64_t n; + unsigned int i; + + a = iv[0]; b = iv[1]; c = iv[2]; d = iv[3]; + e = iv[4]; f = iv[5]; g = iv[6]; h = iv[7]; + + for (i = 0; i < 16; ++i) { + n = BigEndian(&data); + t1 = work_space[i] = n; + t1 += h + Sigma1(e) + Ch(e, f, g) + k512[i]; + t2 = Sigma0(a) + Maj(a, b, c); + h = g; g = f; f = e; e = d + t1; + d = c; c = b; b = a; a = t1 + t2; + } + + for ( ; i < 80; ++i) { + s0 = work_space[(i+1)&0x0f]; + s0 = sigma0(s0); + s1 = work_space[(i+14)&0x0f]; + s1 = sigma1(s1); + + t1 = work_space[i&0xf] += s0 + s1 + work_space[(i+9)&0xf]; + t1 += h + Sigma1(e) + Ch(e, f, g) + k512[i]; + t2 = Sigma0(a) + Maj(a, b, c); + h = g; g = f; f = e; e = d + t1; + d = c; c = b; b = a; a = t1 + t2; + } + + iv[0] += a; iv[1] += b; iv[2] += c; iv[3] += d; + iv[4] += e; iv[5] += f; iv[6] += g; iv[7] += h; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/.gitignore b/bootloader/mcuboot/ext/tinycrypt/.gitignore new file mode 100644 index 0000000..c960ccc --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/.gitignore @@ -0,0 +1,5 @@ +*.o +*~ +*.d +*.exe +*.a diff --git a/bootloader/mcuboot/ext/tinycrypt/AUTHORS b/bootloader/mcuboot/ext/tinycrypt/AUTHORS new file mode 100644 index 0000000..0a8e9f8 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/AUTHORS @@ -0,0 +1,15 @@ +Architect: +Rafael Misoczki + +Open Source Maintainer: +Constanza Heath +Rafael Misoczki + +Contributors: +Constanza Heath +Rafael Misoczki +Flavio Santes +Jarkko Sakkinen +Chris Morrison +Marti Bolivar +Colin Ian King diff --git a/bootloader/mcuboot/ext/tinycrypt/LICENSE b/bootloader/mcuboot/ext/tinycrypt/LICENSE new file mode 100644 index 0000000..2e1db51 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/LICENSE @@ -0,0 +1,61 @@ + +================================================================================ + + TinyCrypt Cryptographic Library + +================================================================================ + + Copyright (c) 2017, Intel Corporation. All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + - Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + + - Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + - Neither the name of the Intel Corporation nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +================================================================================ +Copyright (c) 2014, Kenneth MacKay +All rights reserved. + +https://github.com/kmackay/micro-ecc + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + * Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +================================================================================ diff --git a/bootloader/mcuboot/ext/tinycrypt/Makefile b/bootloader/mcuboot/ext/tinycrypt/Makefile new file mode 100644 index 0000000..3c0e42b --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/Makefile @@ -0,0 +1,21 @@ +################################################################################ +# +# Copyright (C) 2017 by Intel Corporation, All Rights Reserved. +# +# Global Makefile. +# See lib/Makefile and tests/Makefile for further configuration. +# +################################################################################ +include config.mk + +all: + $(MAKE) -C lib +ifeq ($(ENABLE_TESTS),true) + $(MAKE) -C tests +endif + +clean: + $(MAKE) -C lib clean + $(MAKE) -C tests clean + $(RM) *~ + diff --git a/bootloader/mcuboot/ext/tinycrypt/README b/bootloader/mcuboot/ext/tinycrypt/README new file mode 100644 index 0000000..fb52c19 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/README @@ -0,0 +1,71 @@ + +================================================================================ + + TinyCrypt Cryptographic Library + +================================================================================ + + Copyright (c) 2017, Intel Corporation. All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + - Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + + - Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + - Neither the name of the Intel Corporation nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +================================================================================ + +Overview: + +The TinyCrypt Library provides an implementation for constrained devices of a +minimal set of standard cryptography primitives. + +Please, ***SEE THE DOCUMENTATION*** folder for more information on the supported +cryptographic primitives and the limitations of TinyCrypt library. For usage, +security and technicalities, please see the corresponding header file of each +cryptographic primitive. + +================================================================================ + +Organization: + +/lib: C source code of the cryptographic primitives. +/lib/include/tinycrypt: C header files of the cryptographic primitives. +/tests: Test vectors of the cryptographic primitives. +/doc: Documentation of TinyCrypt. + +================================================================================ + +Building: + +1) In Makefile.conf set: + - CFLAGS for compiler flags. + - CC for compiler. + - ENABLE_TESTS for enabling (true) or disabling (false) tests compilation. +2) In lib/Makefile select the primitives required by your project. +3) In tests/Makefile select the corresponding tests of the selected primitives. +4) make +5) run tests in tests/ + +================================================================================ + diff --git a/bootloader/mcuboot/ext/tinycrypt/VERSION b/bootloader/mcuboot/ext/tinycrypt/VERSION new file mode 100644 index 0000000..a45be46 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/VERSION @@ -0,0 +1 @@ +0.2.8 diff --git a/bootloader/mcuboot/ext/tinycrypt/config.mk b/bootloader/mcuboot/ext/tinycrypt/config.mk new file mode 100644 index 0000000..a5b9fb7 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/config.mk @@ -0,0 +1,35 @@ +################################################################################ +# +# Copyright (C) 2017 by Intel Corporation, All Rights Reserved. +# +# Global configuration Makefile. Included everywhere. +# +################################################################################ + +# EDIT HERE: +CC:=gcc +CFLAGS:=-Os -std=c99 -Wall -Wextra -D_ISOC99_SOURCE -MMD -I../lib/include/ -I../lib/source/ -I../tests/include/ +vpath %.c ../lib/source/ +ENABLE_TESTS=true + +# override MinGW built-in recipe +%.o: %.c + $(COMPILE.c) $(OUTPUT_OPTION) $< + +ifeq ($(OS),Windows_NT) +DOTEXE:=.exe +endif + +# DO NOT EDIT AFTER THIS POINT: +ifeq ($(ENABLE_TESTS), true) +CFLAGS += -DENABLE_TESTS +else +CFLAGS += -DDISABLE_TESTS +endif + +export CC +export CFLAGS +export VPATH +export ENABLE_TESTS + +################################################################################ diff --git a/bootloader/mcuboot/ext/tinycrypt/documentation/tinycrypt.rst b/bootloader/mcuboot/ext/tinycrypt/documentation/tinycrypt.rst new file mode 100644 index 0000000..356c099 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/documentation/tinycrypt.rst @@ -0,0 +1,352 @@ + +TinyCrypt Cryptographic Library +############################### +Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + +Overview +******** +The TinyCrypt Library provides an implementation for targeting constrained devices +with a minimal set of standard cryptography primitives, as listed below. To better +serve applications targeting constrained devices, TinyCrypt implementations differ +from the standard specifications (see the Important Remarks section for some +important differences). Certain cryptographic primitives depend on other +primitives, as mentioned in the list below. + +Aside from the Important Remarks section below, valuable information on the usage, +security and technicalities of each cryptographic primitive are found in the +corresponding header file. + +* SHA-256: + + * Type of primitive: Hash function. + * Standard Specification: NIST FIPS PUB 180-4. + * Requires: -- + +* HMAC-SHA256: + + * Type of primitive: Message authentication code. + * Standard Specification: RFC 2104. + * Requires: SHA-256 + +* HMAC-PRNG: + + * Type of primitive: Pseudo-random number generator (256-bit strength). + * Standard Specification: NIST SP 800-90A. + * Requires: SHA-256 and HMAC-SHA256. + +* AES-128: + + * Type of primitive: Block cipher. + * Standard Specification: NIST FIPS PUB 197. + * Requires: -- + +* AES-CBC mode: + + * Type of primitive: Encryption mode of operation. + * Standard Specification: NIST SP 800-38A. + * Requires: AES-128. + +* AES-CTR mode: + + * Type of primitive: Encryption mode of operation. + * Standard Specification: NIST SP 800-38A. + * Requires: AES-128. + +* AES-CMAC mode: + + * Type of primitive: Message authentication code. + * Standard Specification: NIST SP 800-38B. + * Requires: AES-128. + +* AES-CCM mode: + + * Type of primitive: Authenticated encryption. + * Standard Specification: NIST SP 800-38C. + * Requires: AES-128. + +* CTR-PRNG: + + * Type of primitive: Pseudo-random number generator (128-bit strength). + * Standard Specification: NIST SP 800-90A. + * Requires: AES-128. + +* ECC-DH: + + * Type of primitive: Key exchange based on curve NIST p-256. + * Standard Specification: RFC 6090. + * Requires: ECC auxiliary functions (ecc.h/c). + +* ECC-DSA: + + * Type of primitive: Digital signature based on curve NIST p-256. + * Standard Specification: RFC 6090. + * Requires: ECC auxiliary functions (ecc.h/c). + +Design Goals +************ + +* Minimize the code size of each cryptographic primitive. This means minimize + the size of a platform-independent implementation, as presented in TinyCrypt. + Note that various applications may require further features, optimizations with + respect to other metrics and countermeasures for particular threats. These + peculiarities would increase the code size and thus are not considered here. + +* Minimize the dependencies among the cryptographic primitives. This means + that it is unnecessary to build and allocate object code for more primitives + than the ones strictly required by the intended application. In other words, + one can select and compile only the primitives required by the application. + + +Important Remarks +***************** + +The cryptographic implementations in TinyCrypt library have some limitations. +Some of these limitations are inherent to the cryptographic primitives +themselves, while others are specific to TinyCrypt. These limitations were accepted +in order to meet its design goals (in special, minimal code size) and to better +serve applications targeting constrained devices in general. Some of these +limitations are discussed in-depth below. + +General Remarks +*************** + +* TinyCrypt does **not** intend to be fully side-channel resistant. Due to the + variety of side-channel attacks, many of them only relevant to certain + platforms. In this sense, instead of penalizing all library users with + side-channel countermeasures such as increasing the overall code size, + TinyCrypt only implements certain generic timing-attack countermeasures. + +Specific Remarks +**************** + +* SHA-256: + + * The number of bits_hashed in the state is not checked for overflow. Note + however that this will only be a problem if you intend to hash more than + 2^64 bits, which is an extremely large window. + +* HMAC: + + * The HMAC verification process is assumed to be performed by the application. + This compares the computed tag with some given tag. + Note that conventional memory-comparison methods (such as memcmp function) + might be vulnerable to timing attacks; thus be sure to use a constant-time + memory comparison function (such as compare_constant_time + function provided in lib/utils.c). + + * The tc_hmac_final function, responsible for computing the message tag, + cleans the state context before exiting. Thus, applications do not need to + clean the TCHmacState_t ctx after calling tc_hmac_final. This should not + be changed in future versions of the library as there are applications + currently relying on this good-practice/feature of TinyCrypt. + +* HMAC-PRNG: + + * Before using HMAC-PRNG, you *must* find an entropy source to produce a seed. + PRNGs only stretch the seed into a seemingly random output of arbitrary + length. The security of the output is exactly equal to the + unpredictability of the seed. + + * NIST SP 800-90A requires three items as seed material in the initialization + step: entropy seed, personalization and a nonce (which is not implemented). + TinyCrypt requires the personalization byte array and automatically creates + the entropy seed using a mandatory call to the re-seed function. + +* AES-128: + + * The current implementation does not support other key-lengths (such as 256 + bits). Note that if you need AES-256, it doesn't sound as though your + application is running in a constrained environment. AES-256 requires keys + twice the size as for AES-128, and the key schedule is 40% larger. + +* CTR mode: + + * The AES-CTR mode limits the size of a data message they encrypt to 2^32 + blocks. If you need to encrypt larger data sets, your application would + need to replace the key after 2^32 block encryptions. + +* CTR-PRNG: + + * Before using CTR-PRNG, you *must* find an entropy source to produce a seed. + PRNGs only stretch the seed into a seemingly random output of arbitrary + length. The security of the output is exactly equal to the + unpredictability of the seed. + +* CBC mode: + + * TinyCrypt CBC decryption assumes that the iv and the ciphertext are + contiguous (as produced by TinyCrypt CBC encryption). This allows for a + very efficient decryption algorithm that would not otherwise be possible. + +* CMAC mode: + + * AES128-CMAC mode of operation offers 64 bits of security against collision + attacks. Note however that an external attacker cannot generate the tags + him/herself without knowing the MAC key. In this sense, to attack the + collision property of AES128-CMAC, an external attacker would need the + cooperation of the legal user to produce an exponentially high number of + tags (e.g. 2^64) to finally be able to look for collisions and benefit + from them. As an extra precaution, the current implementation allows to at + most 2^48 calls to tc_cmac_update function before re-calling tc_cmac_setup + (allowing a new key to be set), as suggested in Appendix B of SP 800-38B. + +* CCM mode: + + * There are a few tradeoffs for the selection of the parameters of CCM mode. + In special, there is a tradeoff between the maximum number of invocations + of CCM under a given key and the maximum payload length for those + invocations. Both things are related to the parameter 'q' of CCM mode. The + maximum number of invocations of CCM under a given key is determined by + the nonce size, which is: 15-q bytes. The maximum payload length for those + invocations is defined as 2^(8q) bytes. + + To achieve minimal code size, TinyCrypt CCM implementation fixes q = 2, + which is a quite reasonable choice for constrained applications. The + implications of this choice are: + + The nonce size is: 13 bytes. + + The maximum payload length is: 2^16 bytes = 65 KB. + + The mac size parameter is an important parameter to estimate the security + against collision attacks (that aim at finding different messages that + produce the same authentication tag). TinyCrypt CCM implementation + accepts any even integer between 4 and 16, as suggested in SP 800-38C. + + * TinyCrypt CCM implementation accepts associated data of any length between + 0 and (2^16 - 2^8) = 65280 bytes. + + * TinyCrypt CCM implementation accepts: + + * Both non-empty payload and associated data (it encrypts and + authenticates the payload and only authenticates the associated data); + + * Non-empty payload and empty associated data (it encrypts and + authenticates the payload); + + * Non-empty associated data and empty payload (it degenerates to an + authentication-only mode on the associated data). + + * RFC-3610, which also specifies CCM, presents a few relevant security + suggestions, such as: it is recommended for most applications to use a + mac size greater than 8. Besides, it is emphasized that the usage of the + same nonce for two different messages which are encrypted with the same + key obviously destroys the security properties of CCM mode. + +* ECC-DH and ECC-DSA: + + * TinyCrypt ECC implementation is based on micro-ecc (see + https://github.com/kmackay/micro-ecc). In the original micro-ecc + documentation, there is an important remark about the way integers are + represented: + + "Integer representation: To reduce code size, all large integers are + represented using little-endian words - so the least significant word is + first. You can use the 'ecc_bytes2native()' and 'ecc_native2bytes()' + functions to convert between the native integer representation and the + standardized octet representation." + + Note that the assumed bit layout is: {31, 30, ..., 0}, {63, 62, ..., 32}, + {95, 94, ..., 64}, {127, 126, ..., 96} for a very-long-integer (vli) + consisting of 4 unsigned integers (as an example). + + * A cryptographically-secure PRNG function must be set (using uECC_set_rng()) + before calling uECC_make_key() or uECC_sign(). + +Examples of Applications +************************ +It is possible to do useful cryptography with only the given small set of +primitives. With this list of primitives it becomes feasible to support a range +of cryptography usages: + + * Measurement of code, data structures, and other digital artifacts (SHA256); + + * Generate commitments (SHA256); + + * Construct keys (HMAC-SHA256); + + * Extract entropy from strings containing some randomness (HMAC-SHA256); + + * Construct random mappings (HMAC-SHA256); + + * Construct nonces and challenges (HMAC-PRNG, CTR-PRNG); + + * Authenticate using a shared secret (HMAC-SHA256); + + * Create an authenticated, replay-protected session (HMAC-SHA256 + HMAC-PRNG); + + * Authenticated encryption (AES-128 + AES-CCM); + + * Key-exchange (EC-DH); + + * Digital signature (EC-DSA); + +Test Vectors +************ + +The library provides a test program for each cryptographic primitive (see 'test' +folder). Besides illustrating how to use the primitives, these tests evaluate +the correctness of the implementations by checking the results against +well-known publicly validated test vectors. + +For the case of the HMAC-PRNG, due to the necessity of performing an extensive +battery test to produce meaningful conclusions, we suggest the user to evaluate +the unpredictability of the implementation by using the NIST Statistical Test +Suite (see References). + +For the case of the EC-DH and EC-DSA implementations, most of the test vectors +were obtained from the site of the NIST Cryptographic Algorithm Validation +Program (CAVP), see References. + +References +********** + +* `NIST FIPS PUB 180-4 (SHA-256)`_ + +.. _NIST FIPS PUB 180-4 (SHA-256): + http://csrc.nist.gov/publications/fips/fips180-4/fips-180-4.pdf + +* `NIST FIPS PUB 197 (AES-128)`_ + +.. _NIST FIPS PUB 197 (AES-128): + http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf + +* `NIST SP800-90A (HMAC-PRNG)`_ + +.. _NIST SP800-90A (HMAC-PRNG): + http://csrc.nist.gov/publications/nistpubs/800-90A/SP800-90A.pdf + +* `NIST SP 800-38A (AES-CBC and AES-CTR)`_ + +.. _NIST SP 800-38A (AES-CBC and AES-CTR): + http://csrc.nist.gov/publications/nistpubs/800-38a/sp800-38a.pdf + +* `NIST SP 800-38B (AES-CMAC)`_ + +.. _NIST SP 800-38B (AES-CMAC): + http://csrc.nist.gov/publications/nistpubs/800-38B/SP_800-38B.pdf + +* `NIST SP 800-38C (AES-CCM)`_ + +.. _NIST SP 800-38C (AES-CCM): + http://csrc.nist.gov/publications/nistpubs/800-38C/SP800-38C_updated-July20_2007.pdf + +* `NIST Statistical Test Suite (useful for testing HMAC-PRNG)`_ + +.. _NIST Statistical Test Suite (useful for testing HMAC-PRNG): + http://csrc.nist.gov/groups/ST/toolkit/rng/documentation_software.html + +* `NIST Cryptographic Algorithm Validation Program (CAVP) site`_ + +.. _NIST Cryptographic Algorithm Validation Program (CAVP) site: + http://csrc.nist.gov/groups/STM/cavp/ + +* `RFC 2104 (HMAC-SHA256)`_ + +.. _RFC 2104 (HMAC-SHA256): + https://www.ietf.org/rfc/rfc2104.txt + +* `RFC 6090 (ECC-DH and ECC-DSA)`_ + +.. _RFC 6090 (ECC-DH and ECC-DSA): + https://www.ietf.org/rfc/rfc6090.txt diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/Makefile b/bootloader/mcuboot/ext/tinycrypt/lib/Makefile new file mode 100644 index 0000000..9c4d8e2 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/Makefile @@ -0,0 +1,39 @@ +################################################################################ +# +# Copyright (C) 2017 by Intel Corporation, All Rights Reserved. +# +# Cryptographic Primitives Makefile. +# +################################################################################ + +include ../config.mk + +# Edit the OBJS content to add/remove primitives needed from TinyCrypt library: +OBJS:=aes_decrypt.o \ + aes_encrypt.o \ + cbc_mode.o \ + ctr_mode.o \ + ctr_prng.o \ + hmac.o \ + hmac_prng.o \ + sha256.o \ + ecc.o \ + ecc_dh.o \ + ecc_dsa.o \ + ccm_mode.o \ + cmac_mode.o \ + utils.o + +DEPS:=$(OBJS:.o=.d) + +all: libtinycrypt.a + +libtinycrypt.a: $(OBJS) + $(AR) $(ARFLAGS) $@ $^ + +.PHONY: clean + +clean: + -$(RM) *.exe $(OBJS) $(DEPS) *~ libtinycrypt.a + +-include $(DEPS) diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/aes.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/aes.h new file mode 100644 index 0000000..b612213 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/aes.h @@ -0,0 +1,130 @@ +/* aes.h - TinyCrypt interface to an AES-128 implementation */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief -- Interface to an AES-128 implementation. + * + * Overview: AES-128 is a NIST approved block cipher specified in + * FIPS 197. Block ciphers are deterministic algorithms that + * perform a transformation specified by a symmetric key in fixed- + * length data sets, also called blocks. + * + * Security: AES-128 provides approximately 128 bits of security. + * + * Usage: 1) call tc_aes128_set_encrypt/decrypt_key to set the key. + * + * 2) call tc_aes_encrypt/decrypt to process the data. + */ + +#ifndef __TC_AES_H__ +#define __TC_AES_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define Nb (4) /* number of columns (32-bit words) comprising the state */ +#define Nk (4) /* number of 32-bit words comprising the key */ +#define Nr (10) /* number of rounds */ +#define TC_AES_BLOCK_SIZE (Nb*Nk) +#define TC_AES_KEY_SIZE (Nb*Nk) + +typedef struct tc_aes_key_sched_struct { + unsigned int words[Nb*(Nr+1)]; +} *TCAesKeySched_t; + +/** + * @brief Set AES-128 encryption key + * Uses key k to initialize s + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: s == NULL or k == NULL + * @note This implementation skips the additional steps required for keys + * larger than 128 bits, and must not be used for AES-192 or + * AES-256 key schedule -- see FIPS 197 for details + * @param s IN/OUT -- initialized struct tc_aes_key_sched_struct + * @param k IN -- points to the AES key + */ +int tc_aes128_set_encrypt_key(TCAesKeySched_t s, const uint8_t *k); + +/** + * @brief AES-128 Encryption procedure + * Encrypts contents of in buffer into out buffer under key; + * schedule s + * @note Assumes s was initialized by aes_set_encrypt_key; + * out and in point to 16 byte buffers + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: out == NULL or in == NULL or s == NULL + * @param out IN/OUT -- buffer to receive ciphertext block + * @param in IN -- a plaintext block to encrypt + * @param s IN -- initialized AES key schedule + */ +int tc_aes_encrypt(uint8_t *out, const uint8_t *in, + const TCAesKeySched_t s); + +/** + * @brief Set the AES-128 decryption key + * Uses key k to initialize s + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: s == NULL or k == NULL + * @note This is the implementation of the straightforward inverse cipher + * using the cipher documented in FIPS-197 figure 12, not the + * equivalent inverse cipher presented in Figure 15 + * @warning This routine skips the additional steps required for keys larger + * than 128, and must not be used for AES-192 or AES-256 key + * schedule -- see FIPS 197 for details + * @param s IN/OUT -- initialized struct tc_aes_key_sched_struct + * @param k IN -- points to the AES key + */ +int tc_aes128_set_decrypt_key(TCAesKeySched_t s, const uint8_t *k); + +/** + * @brief AES-128 Encryption procedure + * Decrypts in buffer into out buffer under key schedule s + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: out is NULL or in is NULL or s is NULL + * @note Assumes s was initialized by aes_set_encrypt_key + * out and in point to 16 byte buffers + * @param out IN/OUT -- buffer to receive ciphertext block + * @param in IN -- a plaintext block to encrypt + * @param s IN -- initialized AES key schedule + */ +int tc_aes_decrypt(uint8_t *out, const uint8_t *in, + const TCAesKeySched_t s); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_AES_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/cbc_mode.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/cbc_mode.h new file mode 100644 index 0000000..4a837fd --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/cbc_mode.h @@ -0,0 +1,151 @@ +/* cbc_mode.h - TinyCrypt interface to a CBC mode implementation */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief Interface to a CBC mode implementation. + * + * Overview: CBC (for "cipher block chaining") mode is a NIST approved mode of + * operation defined in SP 800-38a. It can be used with any block + * cipher to provide confidentiality of strings whose lengths are + * multiples of the block_size of the underlying block cipher. + * TinyCrypt hard codes AES as the block cipher. + * + * Security: CBC mode provides data confidentiality given that the maximum + * number q of blocks encrypted under a single key satisfies + * q < 2^63, which is not a practical constraint (it is considered a + * good practice to replace the encryption when q == 2^56). CBC mode + * provides NO data integrity. + * + * CBC mode assumes that the IV value input into the + * tc_cbc_mode_encrypt is randomly generated. The TinyCrypt library + * provides HMAC-PRNG module, which generates suitable IVs. Other + * methods for generating IVs are acceptable, provided that the + * values of the IVs generated appear random to any adversary, + * including someone with complete knowledge of the system design. + * + * The randomness property on which CBC mode's security depends is + * the unpredictability of the IV. Since it is unpredictable, this + * means in practice that CBC mode requires that the IV is stored + * somehow with the ciphertext in order to recover the plaintext. + * + * TinyCrypt CBC encryption prepends the IV to the ciphertext, + * because this affords a more efficient (few buffers) decryption. + * Hence tc_cbc_mode_encrypt assumes the ciphertext buffer is always + * 16 bytes larger than the plaintext buffer. + * + * Requires: AES-128 + * + * Usage: 1) call tc_cbc_mode_encrypt to encrypt data. + * + * 2) call tc_cbc_mode_decrypt to decrypt data. + * + */ + +#ifndef __TC_CBC_MODE_H__ +#define __TC_CBC_MODE_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief CBC encryption procedure + * CBC encrypts inlen bytes of the in buffer into the out buffer + * using the encryption key schedule provided, prepends iv to out + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * out == NULL or + * in == NULL or + * ctr == NULL or + * sched == NULL or + * inlen == 0 or + * (inlen % TC_AES_BLOCK_SIZE) != 0 or + * (outlen % TC_AES_BLOCK_SIZE) != 0 or + * outlen != inlen + TC_AES_BLOCK_SIZE + * @note Assumes: - sched has been configured by aes_set_encrypt_key + * - iv contains a 16 byte random string + * - out buffer is large enough to hold the ciphertext + iv + * - out buffer is a contiguous buffer + * - in holds the plaintext and is a contiguous buffer + * - inlen gives the number of bytes in the in buffer + * @param out IN/OUT -- buffer to receive the ciphertext + * @param outlen IN -- length of ciphertext buffer in bytes + * @param in IN -- plaintext to encrypt + * @param inlen IN -- length of plaintext buffer in bytes + * @param iv IN -- the IV for the this encrypt/decrypt + * @param sched IN -- AES key schedule for this encrypt + */ +int tc_cbc_mode_encrypt(uint8_t *out, unsigned int outlen, const uint8_t *in, + unsigned int inlen, const uint8_t *iv, + const TCAesKeySched_t sched); + +/** + * @brief CBC decryption procedure + * CBC decrypts inlen bytes of the in buffer into the out buffer + * using the provided encryption key schedule + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * out == NULL or + * in == NULL or + * sched == NULL or + * inlen == 0 or + * outlen == 0 or + * (inlen % TC_AES_BLOCK_SIZE) != 0 or + * (outlen % TC_AES_BLOCK_SIZE) != 0 or + * outlen != inlen + TC_AES_BLOCK_SIZE + * @note Assumes:- in == iv + ciphertext, i.e. the iv and the ciphertext are + * contiguous. This allows for a very efficient decryption + * algorithm that would not otherwise be possible + * - sched was configured by aes_set_decrypt_key + * - out buffer is large enough to hold the decrypted plaintext + * and is a contiguous buffer + * - inlen gives the number of bytes in the in buffer + * @param out IN/OUT -- buffer to receive decrypted data + * @param outlen IN -- length of plaintext buffer in bytes + * @param in IN -- ciphertext to decrypt, including IV + * @param inlen IN -- length of ciphertext buffer in bytes + * @param iv IN -- the IV for the this encrypt/decrypt + * @param sched IN -- AES key schedule for this decrypt + * + */ +int tc_cbc_mode_decrypt(uint8_t *out, unsigned int outlen, const uint8_t *in, + unsigned int inlen, const uint8_t *iv, + const TCAesKeySched_t sched); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_CBC_MODE_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ccm_mode.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ccm_mode.h new file mode 100644 index 0000000..69c798e --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ccm_mode.h @@ -0,0 +1,211 @@ +/* ccm_mode.h - TinyCrypt interface to a CCM mode implementation */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief Interface to a CCM mode implementation. + * + * Overview: CCM (for "Counter with CBC-MAC") mode is a NIST approved mode of + * operation defined in SP 800-38C. + * + * TinyCrypt CCM implementation accepts: + * + * 1) Both non-empty payload and associated data (it encrypts and + * authenticates the payload and also authenticates the associated + * data); + * 2) Non-empty payload and empty associated data (it encrypts and + * authenticates the payload); + * 3) Non-empty associated data and empty payload (it degenerates to + * an authentication mode on the associated data). + * + * TinyCrypt CCM implementation accepts associated data of any length + * between 0 and (2^16 - 2^8) bytes. + * + * Security: The mac length parameter is an important parameter to estimate the + * security against collision attacks (that aim at finding different + * messages that produce the same authentication tag). TinyCrypt CCM + * implementation accepts any even integer between 4 and 16, as + * suggested in SP 800-38C. + * + * RFC-3610, which also specifies CCM, presents a few relevant + * security suggestions, such as: it is recommended for most + * applications to use a mac length greater than 8. Besides, the + * usage of the same nonce for two different messages which are + * encrypted with the same key destroys the security of CCM mode. + * + * Requires: AES-128 + * + * Usage: 1) call tc_ccm_config to configure. + * + * 2) call tc_ccm_mode_encrypt to encrypt data and generate tag. + * + * 3) call tc_ccm_mode_decrypt to decrypt data and verify tag. + */ + +#ifndef __TC_CCM_MODE_H__ +#define __TC_CCM_MODE_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* max additional authenticated size in bytes: 2^16 - 2^8 = 65280 */ +#define TC_CCM_AAD_MAX_BYTES 0xff00 + +/* max message size in bytes: 2^(8L) = 2^16 = 65536 */ +#define TC_CCM_PAYLOAD_MAX_BYTES 0x10000 + +/* struct tc_ccm_mode_struct represents the state of a CCM computation */ +typedef struct tc_ccm_mode_struct { + TCAesKeySched_t sched; /* AES key schedule */ + uint8_t *nonce; /* nonce required by CCM */ + unsigned int mlen; /* mac length in bytes (parameter t in SP-800 38C) */ +} *TCCcmMode_t; + +/** + * @brief CCM configuration procedure + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * c == NULL or + * sched == NULL or + * nonce == NULL or + * mlen != {4, 6, 8, 10, 12, 16} + * @param c -- CCM state + * @param sched IN -- AES key schedule + * @param nonce IN - nonce + * @param nlen -- nonce length in bytes + * @param mlen -- mac length in bytes (parameter t in SP-800 38C) + */ +int tc_ccm_config(TCCcmMode_t c, TCAesKeySched_t sched, uint8_t *nonce, + unsigned int nlen, unsigned int mlen); + +/** + * @brief CCM tag generation and encryption procedure + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * out == NULL or + * c == NULL or + * ((plen > 0) and (payload == NULL)) or + * ((alen > 0) and (associated_data == NULL)) or + * (alen >= TC_CCM_AAD_MAX_BYTES) or + * (plen >= TC_CCM_PAYLOAD_MAX_BYTES) or + * (olen < plen + maclength) + * + * @param out OUT -- encrypted data + * @param olen IN -- output length in bytes + * @param associated_data IN -- associated data + * @param alen IN -- associated data length in bytes + * @param payload IN -- payload + * @param plen IN -- payload length in bytes + * @param c IN -- CCM state + * + * @note: out buffer should be at least (plen + c->mlen) bytes long. + * + * @note: The sequence b for encryption is formatted as follows: + * b = [FLAGS | nonce | counter ], where: + * FLAGS is 1 byte long + * nonce is 13 bytes long + * counter is 2 bytes long + * The byte FLAGS is composed by the following 8 bits: + * 0-2 bits: used to represent the value of q-1 + * 3-7 btis: always 0's + * + * @note: The sequence b for authentication is formatted as follows: + * b = [FLAGS | nonce | length(mac length)], where: + * FLAGS is 1 byte long + * nonce is 13 bytes long + * length(mac length) is 2 bytes long + * The byte FLAGS is composed by the following 8 bits: + * 0-2 bits: used to represent the value of q-1 + * 3-5 bits: mac length (encoded as: (mlen-2)/2) + * 6: Adata (0 if alen == 0, and 1 otherwise) + * 7: always 0 + */ +int tc_ccm_generation_encryption(uint8_t *out, unsigned int olen, + const uint8_t *associated_data, + unsigned int alen, const uint8_t *payload, + unsigned int plen, TCCcmMode_t c); + +/** + * @brief CCM decryption and tag verification procedure + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * out == NULL or + * c == NULL or + * ((plen > 0) and (payload == NULL)) or + * ((alen > 0) and (associated_data == NULL)) or + * (alen >= TC_CCM_AAD_MAX_BYTES) or + * (plen >= TC_CCM_PAYLOAD_MAX_BYTES) or + * (olen < plen - c->mlen) + * + * @param out OUT -- decrypted data + * @param associated_data IN -- associated data + * @param alen IN -- associated data length in bytes + * @param payload IN -- payload + * @param plen IN -- payload length in bytes + * @param c IN -- CCM state + * + * @note: out buffer should be at least (plen - c->mlen) bytes long. + * + * @note: The sequence b for encryption is formatted as follows: + * b = [FLAGS | nonce | counter ], where: + * FLAGS is 1 byte long + * nonce is 13 bytes long + * counter is 2 bytes long + * The byte FLAGS is composed by the following 8 bits: + * 0-2 bits: used to represent the value of q-1 + * 3-7 btis: always 0's + * + * @note: The sequence b for authentication is formatted as follows: + * b = [FLAGS | nonce | length(mac length)], where: + * FLAGS is 1 byte long + * nonce is 13 bytes long + * length(mac length) is 2 bytes long + * The byte FLAGS is composed by the following 8 bits: + * 0-2 bits: used to represent the value of q-1 + * 3-5 bits: mac length (encoded as: (mlen-2)/2) + * 6: Adata (0 if alen == 0, and 1 otherwise) + * 7: always 0 + */ +int tc_ccm_decryption_verification(uint8_t *out, unsigned int olen, + const uint8_t *associated_data, + unsigned int alen, const uint8_t *payload, unsigned int plen, + TCCcmMode_t c); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_CCM_MODE_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/cmac_mode.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/cmac_mode.h new file mode 100644 index 0000000..f44b0a5 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/cmac_mode.h @@ -0,0 +1,194 @@ +/* cmac_mode.h -- interface to a CMAC implementation */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief Interface to a CMAC implementation. + * + * Overview: CMAC is defined NIST in SP 800-38B, and is the standard algorithm + * for computing a MAC using a block cipher. It can compute the MAC + * for a byte string of any length. It is distinguished from CBC-MAC + * in the processing of the final message block; CMAC uses a + * different technique to compute the final message block is full + * size or only partial, while CBC-MAC uses the same technique for + * both. This difference permits CMAC to be applied to variable + * length messages, while all messages authenticated by CBC-MAC must + * be the same length. + * + * Security: AES128-CMAC mode of operation offers 64 bits of security against + * collision attacks. Note however that an external attacker cannot + * generate the tags him/herself without knowing the MAC key. In this + * sense, to attack the collision property of AES128-CMAC, an + * external attacker would need the cooperation of the legal user to + * produce an exponentially high number of tags (e.g. 2^64) to + * finally be able to look for collisions and benefit from them. As + * an extra precaution, the current implementation allows to at most + * 2^48 calls to the tc_cmac_update function before re-calling + * tc_cmac_setup (allowing a new key to be set), as suggested in + * Appendix B of SP 800-38B. + * + * Requires: AES-128 + * + * Usage: This implementation provides a "scatter-gather" interface, so that + * the CMAC value can be computed incrementally over a message + * scattered in different segments throughout memory. Experience shows + * this style of interface tends to minimize the burden of programming + * correctly. Like all symmetric key operations, it is session + * oriented. + * + * To begin a CMAC session, use tc_cmac_setup to initialize a struct + * tc_cmac_struct with encryption key and buffer. Our implementation + * always assume that the AES key to be the same size as the block + * cipher block size. Once setup, this data structure can be used for + * many CMAC computations. + * + * Once the state has been setup with a key, computing the CMAC of + * some data requires three steps: + * + * (1) first use tc_cmac_init to initialize a new CMAC computation. + * (2) next mix all of the data into the CMAC computation state using + * tc_cmac_update. If all of the data resides in a single data + * segment then only one tc_cmac_update call is needed; if data + * is scattered throughout memory in n data segments, then n calls + * will be needed. CMAC IS ORDER SENSITIVE, to be able to detect + * attacks that swap bytes, so the order in which data is mixed + * into the state is critical! + * (3) Once all of the data for a message has been mixed, use + * tc_cmac_final to compute the CMAC tag value. + * + * Steps (1)-(3) can be repeated as many times as you want to CMAC + * multiple messages. A practical limit is 2^48 1K messages before you + * have to change the key. + * + * Once you are done computing CMAC with a key, it is a good idea to + * destroy the state so an attacker cannot recover the key; use + * tc_cmac_erase to accomplish this. + */ + +#ifndef __TC_CMAC_MODE_H__ +#define __TC_CMAC_MODE_H__ + +#include + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* padding for last message block */ +#define TC_CMAC_PADDING 0x80 + +/* struct tc_cmac_struct represents the state of a CMAC computation */ +typedef struct tc_cmac_struct { +/* initialization vector */ + uint8_t iv[TC_AES_BLOCK_SIZE]; +/* used if message length is a multiple of block_size bytes */ + uint8_t K1[TC_AES_BLOCK_SIZE]; +/* used if message length isn't a multiple block_size bytes */ + uint8_t K2[TC_AES_BLOCK_SIZE]; +/* where to put bytes that didn't fill a block */ + uint8_t leftover[TC_AES_BLOCK_SIZE]; +/* identifies the encryption key */ + unsigned int keyid; +/* next available leftover location */ + unsigned int leftover_offset; +/* AES key schedule */ + TCAesKeySched_t sched; +/* calls to tc_cmac_update left before re-key */ + uint64_t countdown; +} *TCCmacState_t; + +/** + * @brief Configures the CMAC state to use the given AES key + * @return returns TC_CRYPTO_SUCCESS (1) after having configured the CMAC state + * returns TC_CRYPTO_FAIL (0) if: + * s == NULL or + * key == NULL + * + * @param s IN/OUT -- the state to set up + * @param key IN -- the key to use + * @param sched IN -- AES key schedule + */ +int tc_cmac_setup(TCCmacState_t s, const uint8_t *key, + TCAesKeySched_t sched); + +/** + * @brief Erases the CMAC state + * @return returns TC_CRYPTO_SUCCESS (1) after having configured the CMAC state + * returns TC_CRYPTO_FAIL (0) if: + * s == NULL + * + * @param s IN/OUT -- the state to erase + */ +int tc_cmac_erase(TCCmacState_t s); + +/** + * @brief Initializes a new CMAC computation + * @return returns TC_CRYPTO_SUCCESS (1) after having initialized the CMAC state + * returns TC_CRYPTO_FAIL (0) if: + * s == NULL + * + * @param s IN/OUT -- the state to initialize + */ +int tc_cmac_init(TCCmacState_t s); + +/** + * @brief Incrementally computes CMAC over the next data segment + * @return returns TC_CRYPTO_SUCCESS (1) after successfully updating the CMAC state + * returns TC_CRYPTO_FAIL (0) if: + * s == NULL or + * if data == NULL when dlen > 0 + * + * @param s IN/OUT -- the CMAC state + * @param data IN -- the next data segment to MAC + * @param dlen IN -- the length of data in bytes + */ +int tc_cmac_update(TCCmacState_t s, const uint8_t *data, size_t dlen); + +/** + * @brief Generates the tag from the CMAC state + * @return returns TC_CRYPTO_SUCCESS (1) after successfully generating the tag + * returns TC_CRYPTO_FAIL (0) if: + * tag == NULL or + * s == NULL + * + * @param tag OUT -- the CMAC tag + * @param s IN -- CMAC state + */ +int tc_cmac_final(uint8_t *tag, TCCmacState_t s); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_CMAC_MODE_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/constants.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/constants.h new file mode 100644 index 0000000..965490e --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/constants.h @@ -0,0 +1,61 @@ +/* constants.h - TinyCrypt interface to constants */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief -- Interface to constants. + * + */ + +#ifndef __TC_CONSTANTS_H__ +#define __TC_CONSTANTS_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#ifndef NULL +#define NULL ((void *)0) +#endif + +#define TC_CRYPTO_SUCCESS 1 +#define TC_CRYPTO_FAIL 0 + +#define TC_ZERO_BYTE 0x00 + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_CONSTANTS_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ctr_mode.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ctr_mode.h new file mode 100644 index 0000000..9936c92 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ctr_mode.h @@ -0,0 +1,110 @@ +/* ctr_mode.h - TinyCrypt interface to CTR mode */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief Interface to CTR mode. + * + * Overview: CTR (pronounced "counter") mode is a NIST approved mode of + * operation defined in SP 800-38a. It can be used with any + * block cipher to provide confidentiality of strings of any + * length. TinyCrypt hard codes AES128 as the block cipher. + * + * Security: CTR mode achieves confidentiality only if the counter value is + * never reused with a same encryption key. If the counter is + * repeated, than an adversary might be able to defeat the scheme. + * + * A usual method to ensure different counter values refers to + * initialize the counter in a given value (0, for example) and + * increases it every time a new block is enciphered. This naturally + * leaves to a limitation on the number q of blocks that can be + * enciphered using a same key: q < 2^(counter size). + * + * TinyCrypt uses a counter of 32 bits. This means that after 2^32 + * block encryptions, the counter will be reused (thus losing CBC + * security). 2^32 block encryptions should be enough for most of + * applications targeting constrained devices. Applications intended + * to encrypt a larger number of blocks must replace the key after + * 2^32 block encryptions. + * + * CTR mode provides NO data integrity. + * + * Requires: AES-128 + * + * Usage: 1) call tc_ctr_mode to process the data to encrypt/decrypt. + * + */ + +#ifndef __TC_CTR_MODE_H__ +#define __TC_CTR_MODE_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief CTR mode encryption/decryption procedure. + * CTR mode encrypts (or decrypts) inlen bytes from in buffer into out buffer + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * out == NULL or + * in == NULL or + * ctr == NULL or + * sched == NULL or + * inlen == 0 or + * outlen == 0 or + * inlen != outlen + * @note Assumes:- The current value in ctr has NOT been used with sched + * - out points to inlen bytes + * - in points to inlen bytes + * - ctr is an integer counter in littleEndian format + * - sched was initialized by aes_set_encrypt_key + * @param out OUT -- produced ciphertext (plaintext) + * @param outlen IN -- length of ciphertext buffer in bytes + * @param in IN -- data to encrypt (or decrypt) + * @param inlen IN -- length of input data in bytes + * @param ctr IN/OUT -- the current counter value + * @param blk_off IN/OUT -- the offset in the block + * @param sched IN -- an initialized AES key schedule + */ +int tc_ctr_mode(uint8_t *out, unsigned int outlen, const uint8_t *in, + unsigned int inlen, uint8_t *ctr, uint32_t *blk_off, + const TCAesKeySched_t sched); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_CTR_MODE_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ctr_prng.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ctr_prng.h new file mode 100644 index 0000000..9be06db --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ctr_prng.h @@ -0,0 +1,166 @@ +/* ctr_prng.h - TinyCrypt interface to a CTR-PRNG implementation */ + +/* + * Copyright (c) 2016, Chris Morrison + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief Interface to a CTR-PRNG implementation. + * + * Overview: A pseudo-random number generator (PRNG) generates a sequence + * of numbers that have a distribution close to the one expected + * for a sequence of truly random numbers. The NIST Special + * Publication 800-90A specifies several mechanisms to generate + * sequences of pseudo random numbers, including the CTR-PRNG one + * which is based on AES. TinyCrypt implements CTR-PRNG with + * AES-128. + * + * Security: A cryptographically secure PRNG depends on the existence of an + * entropy source to provide a truly random seed as well as the + * security of the primitives used as the building blocks (AES-128 + * in this instance). + * + * Requires: - AES-128 + * + * Usage: 1) call tc_ctr_prng_init to seed the prng context + * + * 2) call tc_ctr_prng_reseed to mix in additional entropy into + * the prng context + * + * 3) call tc_ctr_prng_generate to output the pseudo-random data + * + * 4) call tc_ctr_prng_uninstantiate to zero out the prng context + */ + +#ifndef __TC_CTR_PRNG_H__ +#define __TC_CTR_PRNG_H__ + +#include + +#define TC_CTR_PRNG_RESEED_REQ -1 + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct { + /* updated each time another BLOCKLEN_BYTES bytes are produced */ + uint8_t V[TC_AES_BLOCK_SIZE]; + + /* updated whenever the PRNG is reseeded */ + struct tc_aes_key_sched_struct key; + + /* number of requests since initialization/reseeding */ + uint64_t reseedCount; +} TCCtrPrng_t; + + +/** + * @brief CTR-PRNG initialization procedure + * Initializes prng context with entropy and personalization string (if any) + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * ctx == NULL, + * entropy == NULL, + * entropyLen < (TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE) + * @note Only the first (TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE) bytes of + * both the entropy and personalization inputs are used - + * supplying additional bytes has no effect. + * @param ctx IN/OUT -- the PRNG context to initialize + * @param entropy IN -- entropy used to seed the PRNG + * @param entropyLen IN -- entropy length in bytes + * @param personalization IN -- personalization string used to seed the PRNG + * (may be null) + * @param plen IN -- personalization length in bytes + * + */ +int tc_ctr_prng_init(TCCtrPrng_t * const ctx, + uint8_t const * const entropy, + unsigned int entropyLen, + uint8_t const * const personalization, + unsigned int pLen); + +/** + * @brief CTR-PRNG reseed procedure + * Mixes entropy and additional_input into the prng context + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * ctx == NULL, + * entropy == NULL, + * entropylen < (TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE) + * @note It is better to reseed an existing prng context rather than + * re-initialise, so that any existing entropy in the context is + * presereved. This offers some protection against undetected failures + * of the entropy source. + * @note Assumes tc_ctr_prng_init has been called for ctx + * @param ctx IN/OUT -- the PRNG state + * @param entropy IN -- entropy to mix into the prng + * @param entropylen IN -- length of entropy in bytes + * @param additional_input IN -- additional input to the prng (may be null) + * @param additionallen IN -- additional input length in bytes + */ +int tc_ctr_prng_reseed(TCCtrPrng_t * const ctx, + uint8_t const * const entropy, + unsigned int entropyLen, + uint8_t const * const additional_input, + unsigned int additionallen); + +/** + * @brief CTR-PRNG generate procedure + * Generates outlen pseudo-random bytes into out buffer, updates prng + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CTR_PRNG_RESEED_REQ (-1) if a reseed is needed + * returns TC_CRYPTO_FAIL (0) if: + * ctx == NULL, + * out == NULL, + * outlen >= 2^16 + * @note Assumes tc_ctr_prng_init has been called for ctx + * @param ctx IN/OUT -- the PRNG context + * @param additional_input IN -- additional input to the prng (may be null) + * @param additionallen IN -- additional input length in bytes + * @param out IN/OUT -- buffer to receive output + * @param outlen IN -- size of out buffer in bytes + */ +int tc_ctr_prng_generate(TCCtrPrng_t * const ctx, + uint8_t const * const additional_input, + unsigned int additionallen, + uint8_t * const out, + unsigned int outlen); + +/** + * @brief CTR-PRNG uninstantiate procedure + * Zeroes the internal state of the supplied prng context + * @return none + * @param ctx IN/OUT -- the PRNG context + */ +void tc_ctr_prng_uninstantiate(TCCtrPrng_t * const ctx); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_CTR_PRNG_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc.h new file mode 100644 index 0000000..8abc949 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc.h @@ -0,0 +1,545 @@ +/* ecc.h - TinyCrypt interface to common ECC functions */ + +/* Copyright (c) 2014, Kenneth MacKay + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief -- Interface to common ECC functions. + * + * Overview: This software is an implementation of common functions + * necessary to elliptic curve cryptography. This implementation uses + * curve NIST p-256. + * + * Security: The curve NIST p-256 provides approximately 128 bits of security. + * + */ + +#ifndef __TC_UECC_H__ +#define __TC_UECC_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Word size (4 bytes considering 32-bits architectures) */ +#define uECC_WORD_SIZE 4 + +/* setting max number of calls to prng: */ +#ifndef uECC_RNG_MAX_TRIES +#define uECC_RNG_MAX_TRIES 64 +#endif + +/* defining data types to store word and bit counts: */ +typedef int8_t wordcount_t; +typedef int16_t bitcount_t; +/* defining data type for comparison result: */ +typedef int8_t cmpresult_t; +/* defining data type to store ECC coordinate/point in 32bits words: */ +typedef unsigned int uECC_word_t; +/* defining data type to store an ECC coordinate/point in 64bits words: */ +typedef uint64_t uECC_dword_t; + +/* defining masks useful for ecc computations: */ +#define HIGH_BIT_SET 0x80000000 +#define uECC_WORD_BITS 32 +#define uECC_WORD_BITS_SHIFT 5 +#define uECC_WORD_BITS_MASK 0x01F + +/* Number of words of 32 bits to represent an element of the the curve p-256: */ +#define NUM_ECC_WORDS 8 +/* Number of bytes to represent an element of the the curve p-256: */ +#define NUM_ECC_BYTES (uECC_WORD_SIZE*NUM_ECC_WORDS) + +/* structure that represents an elliptic curve (e.g. p256):*/ +struct uECC_Curve_t; +typedef const struct uECC_Curve_t * uECC_Curve; +struct uECC_Curve_t { + wordcount_t num_words; + wordcount_t num_bytes; + bitcount_t num_n_bits; + uECC_word_t p[NUM_ECC_WORDS]; + uECC_word_t n[NUM_ECC_WORDS]; + uECC_word_t G[NUM_ECC_WORDS * 2]; + uECC_word_t b[NUM_ECC_WORDS]; + void (*double_jacobian)(uECC_word_t * X1, uECC_word_t * Y1, uECC_word_t * Z1, + uECC_Curve curve); + void (*x_side)(uECC_word_t *result, const uECC_word_t *x, uECC_Curve curve); + void (*mmod_fast)(uECC_word_t *result, uECC_word_t *product); +}; + +/* + * @brief computes doubling of point ion jacobian coordinates, in place. + * @param X1 IN/OUT -- x coordinate + * @param Y1 IN/OUT -- y coordinate + * @param Z1 IN/OUT -- z coordinate + * @param curve IN -- elliptic curve + */ +void double_jacobian_default(uECC_word_t * X1, uECC_word_t * Y1, + uECC_word_t * Z1, uECC_Curve curve); + +/* + * @brief Computes x^3 + ax + b. result must not overlap x. + * @param result OUT -- x^3 + ax + b + * @param x IN -- value of x + * @param curve IN -- elliptic curve + */ +void x_side_default(uECC_word_t *result, const uECC_word_t *x, + uECC_Curve curve); + +/* + * @brief Computes result = product % curve_p + * from http://www.nsa.gov/ia/_files/nist-routines.pdf + * @param result OUT -- product % curve_p + * @param product IN -- value to be reduced mod curve_p + */ +void vli_mmod_fast_secp256r1(unsigned int *result, unsigned int *product); + +/* Bytes to words ordering: */ +#define BYTES_TO_WORDS_8(a, b, c, d, e, f, g, h) 0x##d##c##b##a, 0x##h##g##f##e +#define BYTES_TO_WORDS_4(a, b, c, d) 0x##d##c##b##a +#define BITS_TO_WORDS(num_bits) \ + ((num_bits + ((uECC_WORD_SIZE * 8) - 1)) / (uECC_WORD_SIZE * 8)) +#define BITS_TO_BYTES(num_bits) ((num_bits + 7) / 8) + +/* definition of curve NIST p-256: */ +static const struct uECC_Curve_t curve_secp256r1 = { + NUM_ECC_WORDS, + NUM_ECC_BYTES, + 256, /* num_n_bits */ { + BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF), + BYTES_TO_WORDS_8(FF, FF, FF, FF, 00, 00, 00, 00), + BYTES_TO_WORDS_8(00, 00, 00, 00, 00, 00, 00, 00), + BYTES_TO_WORDS_8(01, 00, 00, 00, FF, FF, FF, FF) + }, { + BYTES_TO_WORDS_8(51, 25, 63, FC, C2, CA, B9, F3), + BYTES_TO_WORDS_8(84, 9E, 17, A7, AD, FA, E6, BC), + BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF), + BYTES_TO_WORDS_8(00, 00, 00, 00, FF, FF, FF, FF) + }, { + BYTES_TO_WORDS_8(96, C2, 98, D8, 45, 39, A1, F4), + BYTES_TO_WORDS_8(A0, 33, EB, 2D, 81, 7D, 03, 77), + BYTES_TO_WORDS_8(F2, 40, A4, 63, E5, E6, BC, F8), + BYTES_TO_WORDS_8(47, 42, 2C, E1, F2, D1, 17, 6B), + + BYTES_TO_WORDS_8(F5, 51, BF, 37, 68, 40, B6, CB), + BYTES_TO_WORDS_8(CE, 5E, 31, 6B, 57, 33, CE, 2B), + BYTES_TO_WORDS_8(16, 9E, 0F, 7C, 4A, EB, E7, 8E), + BYTES_TO_WORDS_8(9B, 7F, 1A, FE, E2, 42, E3, 4F) + }, { + BYTES_TO_WORDS_8(4B, 60, D2, 27, 3E, 3C, CE, 3B), + BYTES_TO_WORDS_8(F6, B0, 53, CC, B0, 06, 1D, 65), + BYTES_TO_WORDS_8(BC, 86, 98, 76, 55, BD, EB, B3), + BYTES_TO_WORDS_8(E7, 93, 3A, AA, D8, 35, C6, 5A) + }, + &double_jacobian_default, + &x_side_default, + &vli_mmod_fast_secp256r1 +}; + +uECC_Curve uECC_secp256r1(void); + +/* + * @brief Generates a random integer in the range 0 < random < top. + * Both random and top have num_words words. + * @param random OUT -- random integer in the range 0 < random < top + * @param top IN -- upper limit + * @param num_words IN -- number of words + * @return a random integer in the range 0 < random < top + */ +int uECC_generate_random_int(uECC_word_t *random, const uECC_word_t *top, + wordcount_t num_words); + + +/* uECC_RNG_Function type + * The RNG function should fill 'size' random bytes into 'dest'. It should + * return 1 if 'dest' was filled with random data, or 0 if the random data could + * not be generated. The filled-in values should be either truly random, or from + * a cryptographically-secure PRNG. + * + * A correctly functioning RNG function must be set (using uECC_set_rng()) + * before calling uECC_make_key() or uECC_sign(). + * + * Setting a correctly functioning RNG function improves the resistance to + * side-channel attacks for uECC_shared_secret(). + * + * A correct RNG function is set by default. If you are building on another + * POSIX-compliant system that supports /dev/random or /dev/urandom, you can + * define uECC_POSIX to use the predefined RNG. + */ +typedef int(*uECC_RNG_Function)(uint8_t *dest, unsigned int size); + +/* + * @brief Set the function that will be used to generate random bytes. The RNG + * function should return 1 if the random data was generated, or 0 if the random + * data could not be generated. + * + * @note On platforms where there is no predefined RNG function, this must be + * called before uECC_make_key() or uECC_sign() are used. + * + * @param rng_function IN -- function that will be used to generate random bytes + */ +void uECC_set_rng(uECC_RNG_Function rng_function); + +/* + * @brief provides current uECC_RNG_Function. + * @return Returns the function that will be used to generate random bytes. + */ +uECC_RNG_Function uECC_get_rng(void); + +/* + * @brief computes the size of a private key for the curve in bytes. + * @param curve IN -- elliptic curve + * @return size of a private key for the curve in bytes. + */ +int uECC_curve_private_key_size(uECC_Curve curve); + +/* + * @brief computes the size of a public key for the curve in bytes. + * @param curve IN -- elliptic curve + * @return the size of a public key for the curve in bytes. + */ +int uECC_curve_public_key_size(uECC_Curve curve); + +/* + * @brief Compute the corresponding public key for a private key. + * @param private_key IN -- The private key to compute the public key for + * @param public_key OUT -- Will be filled in with the corresponding public key + * @param curve + * @return Returns 1 if key was computed successfully, 0 if an error occurred. + */ +int uECC_compute_public_key(const uint8_t *private_key, + uint8_t *public_key, uECC_Curve curve); + +/* + * @brief Compute public-key. + * @return corresponding public-key. + * @param result OUT -- public-key + * @param private_key IN -- private-key + * @param curve IN -- elliptic curve + */ +uECC_word_t EccPoint_compute_public_key(uECC_word_t *result, + uECC_word_t *private_key, uECC_Curve curve); + +/* + * @brief Regularize the bitcount for the private key so that attackers cannot + * use a side channel attack to learn the number of leading zeros. + * @return Regularized k + * @param k IN -- private-key + * @param k0 IN/OUT -- regularized k + * @param k1 IN/OUT -- regularized k + * @param curve IN -- elliptic curve + */ +uECC_word_t regularize_k(const uECC_word_t * const k, uECC_word_t *k0, + uECC_word_t *k1, uECC_Curve curve); + +/* + * @brief Point multiplication algorithm using Montgomery's ladder with co-Z + * coordinates. See http://eprint.iacr.org/2011/338.pdf. + * @note Result may overlap point. + * @param result OUT -- returns scalar*point + * @param point IN -- elliptic curve point + * @param scalar IN -- scalar + * @param initial_Z IN -- initial value for z + * @param num_bits IN -- number of bits in scalar + * @param curve IN -- elliptic curve + */ +void EccPoint_mult(uECC_word_t * result, const uECC_word_t * point, + const uECC_word_t * scalar, const uECC_word_t * initial_Z, + bitcount_t num_bits, uECC_Curve curve); + +/* + * @brief Constant-time comparison to zero - secure way to compare long integers + * @param vli IN -- very long integer + * @param num_words IN -- number of words in the vli + * @return 1 if vli == 0, 0 otherwise. + */ +uECC_word_t uECC_vli_isZero(const uECC_word_t *vli, wordcount_t num_words); + +/* + * @brief Check if 'point' is the point at infinity + * @param point IN -- elliptic curve point + * @param curve IN -- elliptic curve + * @return if 'point' is the point at infinity, 0 otherwise. + */ +uECC_word_t EccPoint_isZero(const uECC_word_t *point, uECC_Curve curve); + +/* + * @brief computes the sign of left - right, in constant time. + * @param left IN -- left term to be compared + * @param right IN -- right term to be compared + * @param num_words IN -- number of words + * @return the sign of left - right + */ +cmpresult_t uECC_vli_cmp(const uECC_word_t *left, const uECC_word_t *right, + wordcount_t num_words); + +/* + * @brief computes sign of left - right, not in constant time. + * @note should not be used if inputs are part of a secret + * @param left IN -- left term to be compared + * @param right IN -- right term to be compared + * @param num_words IN -- number of words + * @return the sign of left - right + */ +cmpresult_t uECC_vli_cmp_unsafe(const uECC_word_t *left, const uECC_word_t *right, + wordcount_t num_words); + +/* + * @brief Computes result = (left - right) % mod. + * @note Assumes that (left < mod) and (right < mod), and that result does not + * overlap mod. + * @param result OUT -- (left - right) % mod + * @param left IN -- leftright term in modular subtraction + * @param right IN -- right term in modular subtraction + * @param mod IN -- mod + * @param num_words IN -- number of words + */ +void uECC_vli_modSub(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, const uECC_word_t *mod, + wordcount_t num_words); + +/* + * @brief Computes P' = (x1', y1', Z3), P + Q = (x3, y3, Z3) or + * P => P', Q => P + Q + * @note assumes Input P = (x1, y1, Z), Q = (x2, y2, Z) + * @param X1 IN -- x coordinate of P + * @param Y1 IN -- y coordinate of P + * @param X2 IN -- x coordinate of Q + * @param Y2 IN -- y coordinate of Q + * @param curve IN -- elliptic curve + */ +void XYcZ_add(uECC_word_t * X1, uECC_word_t * Y1, uECC_word_t * X2, + uECC_word_t * Y2, uECC_Curve curve); + +/* + * @brief Computes (x1 * z^2, y1 * z^3) + * @param X1 IN -- previous x1 coordinate + * @param Y1 IN -- previous y1 coordinate + * @param Z IN -- z value + * @param curve IN -- elliptic curve + */ +void apply_z(uECC_word_t * X1, uECC_word_t * Y1, const uECC_word_t * const Z, + uECC_Curve curve); + +/* + * @brief Check if bit is set. + * @return Returns nonzero if bit 'bit' of vli is set. + * @warning It is assumed that the value provided in 'bit' is within the + * boundaries of the word-array 'vli'. + * @note The bit ordering layout assumed for vli is: {31, 30, ..., 0}, + * {63, 62, ..., 32}, {95, 94, ..., 64}, {127, 126,..., 96} for a vli consisting + * of 4 uECC_word_t elements. + */ +uECC_word_t uECC_vli_testBit(const uECC_word_t *vli, bitcount_t bit); + +/* + * @brief Computes result = product % mod, where product is 2N words long. + * @param result OUT -- product % mod + * @param mod IN -- module + * @param num_words IN -- number of words + * @warning Currently only designed to work for curve_p or curve_n. + */ +void uECC_vli_mmod(uECC_word_t *result, uECC_word_t *product, + const uECC_word_t *mod, wordcount_t num_words); + +/* + * @brief Computes modular product (using curve->mmod_fast) + * @param result OUT -- (left * right) mod % curve_p + * @param left IN -- left term in product + * @param right IN -- right term in product + * @param curve IN -- elliptic curve + */ +void uECC_vli_modMult_fast(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, uECC_Curve curve); + +/* + * @brief Computes result = left - right. + * @note Can modify in place. + * @param result OUT -- left - right + * @param left IN -- left term in subtraction + * @param right IN -- right term in subtraction + * @param num_words IN -- number of words + * @return borrow + */ +uECC_word_t uECC_vli_sub(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, wordcount_t num_words); + +/* + * @brief Constant-time comparison function(secure way to compare long ints) + * @param left IN -- left term in comparison + * @param right IN -- right term in comparison + * @param num_words IN -- number of words + * @return Returns 0 if left == right, 1 otherwise. + */ +uECC_word_t uECC_vli_equal(const uECC_word_t *left, const uECC_word_t *right, + wordcount_t num_words); + +/* + * @brief Computes (left * right) % mod + * @param result OUT -- (left * right) % mod + * @param left IN -- left term in product + * @param right IN -- right term in product + * @param mod IN -- mod + * @param num_words IN -- number of words + */ +void uECC_vli_modMult(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, const uECC_word_t *mod, + wordcount_t num_words); + +/* + * @brief Computes (1 / input) % mod + * @note All VLIs are the same size. + * @note See "Euclid's GCD to Montgomery Multiplication to the Great Divide" + * @param result OUT -- (1 / input) % mod + * @param input IN -- value to be modular inverted + * @param mod IN -- mod + * @param num_words -- number of words + */ +void uECC_vli_modInv(uECC_word_t *result, const uECC_word_t *input, + const uECC_word_t *mod, wordcount_t num_words); + +/* + * @brief Sets dest = src. + * @param dest OUT -- destination buffer + * @param src IN -- origin buffer + * @param num_words IN -- number of words + */ +void uECC_vli_set(uECC_word_t *dest, const uECC_word_t *src, + wordcount_t num_words); + +/* + * @brief Computes (left + right) % mod. + * @note Assumes that (left < mod) and right < mod), and that result does not + * overlap mod. + * @param result OUT -- (left + right) % mod. + * @param left IN -- left term in addition + * @param right IN -- right term in addition + * @param mod IN -- mod + * @param num_words IN -- number of words + */ +void uECC_vli_modAdd(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, const uECC_word_t *mod, + wordcount_t num_words); + +/* + * @brief Counts the number of bits required to represent vli. + * @param vli IN -- very long integer + * @param max_words IN -- number of words + * @return number of bits in given vli + */ +bitcount_t uECC_vli_numBits(const uECC_word_t *vli, + const wordcount_t max_words); + +/* + * @brief Erases (set to 0) vli + * @param vli IN -- very long integer + * @param num_words IN -- number of words + */ +void uECC_vli_clear(uECC_word_t *vli, wordcount_t num_words); + +/* + * @brief check if it is a valid point in the curve + * @param point IN -- point to be checked + * @param curve IN -- elliptic curve + * @return 0 if point is valid + * @exception returns -1 if it is a point at infinity + * @exception returns -2 if x or y is smaller than p, + * @exception returns -3 if y^2 != x^3 + ax + b. + */ +int uECC_valid_point(const uECC_word_t *point, uECC_Curve curve); + +/* + * @brief Check if a public key is valid. + * @param public_key IN -- The public key to be checked. + * @return returns 0 if the public key is valid + * @exception returns -1 if it is a point at infinity + * @exception returns -2 if x or y is smaller than p, + * @exception returns -3 if y^2 != x^3 + ax + b. + * @exception returns -4 if public key is the group generator. + * + * @note Note that you are not required to check for a valid public key before + * using any other uECC functions. However, you may wish to avoid spending CPU + * time computing a shared secret or verifying a signature using an invalid + * public key. + */ +int uECC_valid_public_key(const uint8_t *public_key, uECC_Curve curve); + + /* + * @brief Converts an integer in uECC native format to big-endian bytes. + * @param bytes OUT -- bytes representation + * @param num_bytes IN -- number of bytes + * @param native IN -- uECC native representation + */ +void uECC_vli_nativeToBytes(uint8_t *bytes, int num_bytes, + const unsigned int *native); + +/* + * @brief Converts big-endian bytes to an integer in uECC native format. + * @param native OUT -- uECC native representation + * @param bytes IN -- bytes representation + * @param num_bytes IN -- number of bytes + */ +void uECC_vli_bytesToNative(unsigned int *native, const uint8_t *bytes, + int num_bytes); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_UECC_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc_dh.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc_dh.h new file mode 100644 index 0000000..b828e19 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc_dh.h @@ -0,0 +1,131 @@ +/* ecc_dh.h - TinyCrypt interface to EC-DH implementation */ + +/* + * Copyright (c) 2014, Kenneth MacKay + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief -- Interface to EC-DH implementation. + * + * Overview: This software is an implementation of EC-DH. This implementation + * uses curve NIST p-256. + * + * Security: The curve NIST p-256 provides approximately 128 bits of security. + */ + +#ifndef __TC_ECC_DH_H__ +#define __TC_ECC_DH_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Create a public/private key pair. + * @return returns TC_CRYPTO_SUCCESS (1) if the key pair was generated successfully + * returns TC_CRYPTO_FAIL (0) if error while generating key pair + * + * @param p_public_key OUT -- Will be filled in with the public key. Must be at + * least 2 * the curve size (in bytes) long. For curve secp256r1, p_public_key + * must be 64 bytes long. + * @param p_private_key OUT -- Will be filled in with the private key. Must be as + * long as the curve order (for secp256r1, p_private_key must be 32 bytes long). + * + * @note side-channel countermeasure: algorithm strengthened against timing + * attack. + * @warning A cryptographically-secure PRNG function must be set (using + * uECC_set_rng()) before calling uECC_make_key(). + */ +int uECC_make_key(uint8_t *p_public_key, uint8_t *p_private_key, uECC_Curve curve); + +#ifdef ENABLE_TESTS + +/** + * @brief Create a public/private key pair given a specific d. + * + * @note THIS FUNCTION SHOULD BE CALLED ONLY FOR TEST PURPOSES. Refer to + * uECC_make_key() function for real applications. + */ +int uECC_make_key_with_d(uint8_t *p_public_key, uint8_t *p_private_key, + unsigned int *d, uECC_Curve curve); +#endif + +/** + * @brief Compute a shared secret given your secret key and someone else's + * public key. + * @return returns TC_CRYPTO_SUCCESS (1) if the shared secret was computed successfully + * returns TC_CRYPTO_FAIL (0) otherwise + * + * @param p_secret OUT -- Will be filled in with the shared secret value. Must be + * the same size as the curve size (for curve secp256r1, secret must be 32 bytes + * long. + * @param p_public_key IN -- The public key of the remote party. + * @param p_private_key IN -- Your private key. + * + * @warning It is recommended to use the output of uECC_shared_secret() as the + * input of a recommended Key Derivation Function (see NIST SP 800-108) in + * order to produce a cryptographically secure symmetric key. + */ +int uECC_shared_secret(const uint8_t *p_public_key, const uint8_t *p_private_key, + uint8_t *p_secret, uECC_Curve curve); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_ECC_DH_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc_dsa.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc_dsa.h new file mode 100644 index 0000000..aca00bc --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc_dsa.h @@ -0,0 +1,139 @@ +/* ecc_dh.h - TinyCrypt interface to EC-DSA implementation */ + +/* + * Copyright (c) 2014, Kenneth MacKay + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief -- Interface to EC-DSA implementation. + * + * Overview: This software is an implementation of EC-DSA. This implementation + * uses curve NIST p-256. + * + * Security: The curve NIST p-256 provides approximately 128 bits of security. + * + * Usage: - To sign: Compute a hash of the data you wish to sign (SHA-2 is + * recommended) and pass it in to ecdsa_sign function along with your + * private key and a random number. You must use a new non-predictable + * random number to generate each new signature. + * - To verify a signature: Compute the hash of the signed data using + * the same hash as the signer and pass it to this function along with + * the signer's public key and the signature values (r and s). + */ + +#ifndef __TC_ECC_DSA_H__ +#define __TC_ECC_DSA_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Generate an ECDSA signature for a given hash value. + * @return returns TC_CRYPTO_SUCCESS (1) if the signature generated successfully + * returns TC_CRYPTO_FAIL (0) if an error occurred. + * + * @param p_private_key IN -- Your private key. + * @param p_message_hash IN -- The hash of the message to sign. + * @param p_hash_size IN -- The size of p_message_hash in bytes. + * @param p_signature OUT -- Will be filled in with the signature value. Must be + * at least 2 * curve size long (for secp256r1, signature must be 64 bytes long). + * + * @warning A cryptographically-secure PRNG function must be set (using + * uECC_set_rng()) before calling uECC_sign(). + * @note Usage: Compute a hash of the data you wish to sign (SHA-2 is + * recommended) and pass it in to this function along with your private key. + * @note side-channel countermeasure: algorithm strengthened against timing + * attack. + */ +int uECC_sign(const uint8_t *p_private_key, const uint8_t *p_message_hash, + unsigned p_hash_size, uint8_t *p_signature, uECC_Curve curve); + +#ifdef ENABLE_TESTS +/* + * THIS FUNCTION SHOULD BE CALLED FOR TEST PURPOSES ONLY. + * Refer to uECC_sign() function for real applications. + */ +int uECC_sign_with_k(const uint8_t *private_key, const uint8_t *message_hash, + unsigned int hash_size, uECC_word_t *k, uint8_t *signature, + uECC_Curve curve); +#endif + +/** + * @brief Verify an ECDSA signature. + * @return returns TC_SUCCESS (1) if the signature is valid + * returns TC_FAIL (0) if the signature is invalid. + * + * @param p_public_key IN -- The signer's public key. + * @param p_message_hash IN -- The hash of the signed data. + * @param p_hash_size IN -- The size of p_message_hash in bytes. + * @param p_signature IN -- The signature values. + * + * @note Usage: Compute the hash of the signed data using the same hash as the + * signer and pass it to this function along with the signer's public key and + * the signature values (hash_size and signature). + */ +int uECC_verify(const uint8_t *p_public_key, const uint8_t *p_message_hash, + unsigned int p_hash_size, const uint8_t *p_signature, uECC_Curve curve); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_ECC_DSA_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc_platform_specific.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc_platform_specific.h new file mode 100644 index 0000000..e2c8823 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/ecc_platform_specific.h @@ -0,0 +1,81 @@ +/* uECC_platform_specific.h - Interface to platform specific functions*/ + +/* Copyright (c) 2014, Kenneth MacKay + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE.*/ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * uECC_platform_specific.h -- Interface to platform specific functions + */ + +#ifndef __UECC_PLATFORM_SPECIFIC_H_ +#define __UECC_PLATFORM_SPECIFIC_H_ + +/* + * The RNG function should fill 'size' random bytes into 'dest'. It should + * return 1 if 'dest' was filled with random data, or 0 if the random data could + * not be generated. The filled-in values should be either truly random, or from + * a cryptographically-secure PRNG. + * + * A cryptographically-secure PRNG function must be set (using uECC_set_rng()) + * before calling uECC_make_key() or uECC_sign(). + * + * Setting a cryptographically-secure PRNG function improves the resistance to + * side-channel attacks for uECC_shared_secret(). + * + * A correct PRNG function is set by default (default_RNG_defined = 1) and works + * for some platforms, such as Unix and Linux. For other platforms, you may need + * to provide another PRNG function. +*/ +#define default_RNG_defined 1 + +int default_CSPRNG(uint8_t *dest, unsigned int size); + +#endif /* __UECC_PLATFORM_SPECIFIC_H_ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/hmac.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/hmac.h new file mode 100644 index 0000000..3a08149 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/hmac.h @@ -0,0 +1,139 @@ +/* hmac.h - TinyCrypt interface to an HMAC implementation */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief Interface to an HMAC implementation. + * + * Overview: HMAC is a message authentication code based on hash functions. + * TinyCrypt hard codes SHA-256 as the hash function. A message + * authentication code based on hash functions is also called a + * keyed cryptographic hash function since it performs a + * transformation specified by a key in an arbitrary length data + * set into a fixed length data set (also called tag). + * + * Security: The security of the HMAC depends on the length of the key and + * on the security of the hash function. Note that HMAC primitives + * are much less affected by collision attacks than their + * corresponding hash functions. + * + * Requires: SHA-256 + * + * Usage: 1) call tc_hmac_set_key to set the HMAC key. + * + * 2) call tc_hmac_init to initialize a struct hash_state before + * processing the data. + * + * 3) call tc_hmac_update to process the next input segment; + * tc_hmac_update can be called as many times as needed to process + * all of the segments of the input; the order is important. + * + * 4) call tc_hmac_final to out put the tag. + */ + +#ifndef __TC_HMAC_H__ +#define __TC_HMAC_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +struct tc_hmac_state_struct { + /* the internal state required by h */ + struct tc_sha256_state_struct hash_state; + /* HMAC key schedule */ + uint8_t key[2*TC_SHA256_BLOCK_SIZE]; +}; +typedef struct tc_hmac_state_struct *TCHmacState_t; + +/** + * @brief HMAC set key procedure + * Configures ctx to use key + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if + * ctx == NULL or + * key == NULL or + * key_size == 0 + * @param ctx IN/OUT -- the struct tc_hmac_state_struct to initial + * @param key IN -- the HMAC key to configure + * @param key_size IN -- the HMAC key size + */ +int tc_hmac_set_key(TCHmacState_t ctx, const uint8_t *key, + unsigned int key_size); + +/** + * @brief HMAC init procedure + * Initializes ctx to begin the next HMAC operation + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: ctx == NULL or key == NULL + * @param ctx IN/OUT -- struct tc_hmac_state_struct buffer to init + */ +int tc_hmac_init(TCHmacState_t ctx); + +/** + * @brief HMAC update procedure + * Mixes data_length bytes addressed by data into state + * @return returns TC_CRYPTO_SUCCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: ctx == NULL or key == NULL + * @note Assumes state has been initialized by tc_hmac_init + * @param ctx IN/OUT -- state of HMAC computation so far + * @param data IN -- data to incorporate into state + * @param data_length IN -- size of data in bytes + */ +int tc_hmac_update(TCHmacState_t ctx, const void *data, + unsigned int data_length); + +/** + * @brief HMAC final procedure + * Writes the HMAC tag into the tag buffer + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * tag == NULL or + * ctx == NULL or + * key == NULL or + * taglen != TC_SHA256_DIGEST_SIZE + * @note ctx is erased before exiting. This should never be changed/removed. + * @note Assumes the tag bufer is at least sizeof(hmac_tag_size(state)) bytes + * state has been initialized by tc_hmac_init + * @param tag IN/OUT -- buffer to receive computed HMAC tag + * @param taglen IN -- size of tag in bytes + * @param ctx IN/OUT -- the HMAC state for computing tag + */ +int tc_hmac_final(uint8_t *tag, unsigned int taglen, TCHmacState_t ctx); + +#ifdef __cplusplus +} +#endif + +#endif /*__TC_HMAC_H__*/ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/hmac_prng.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/hmac_prng.h new file mode 100644 index 0000000..ad12cbb --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/hmac_prng.h @@ -0,0 +1,164 @@ +/* hmac_prng.h - TinyCrypt interface to an HMAC-PRNG implementation */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief Interface to an HMAC-PRNG implementation. + * + * Overview: A pseudo-random number generator (PRNG) generates a sequence + * of numbers that have a distribution close to the one expected + * for a sequence of truly random numbers. The NIST Special + * Publication 800-90A specifies several mechanisms to generate + * sequences of pseudo random numbers, including the HMAC-PRNG one + * which is based on HMAC. TinyCrypt implements HMAC-PRNG with + * certain modifications from the NIST SP 800-90A spec. + * + * Security: A cryptographically secure PRNG depends on the existence of an + * entropy source to provide a truly random seed as well as the + * security of the primitives used as the building blocks (HMAC and + * SHA256, for TinyCrypt). + * + * The NIST SP 800-90A standard tolerates a null personalization, + * while TinyCrypt requires a non-null personalization. This is + * because a personalization string (the host name concatenated + * with a time stamp, for example) is easily computed and might be + * the last line of defense against failure of the entropy source. + * + * Requires: - SHA-256 + * - HMAC + * + * Usage: 1) call tc_hmac_prng_init to set the HMAC key and process the + * personalization data. + * + * 2) call tc_hmac_prng_reseed to process the seed and additional + * input. + * + * 3) call tc_hmac_prng_generate to out put the pseudo-random data. + */ + +#ifndef __TC_HMAC_PRNG_H__ +#define __TC_HMAC_PRNG_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define TC_HMAC_PRNG_RESEED_REQ -1 + +struct tc_hmac_prng_struct { + /* the HMAC instance for this PRNG */ + struct tc_hmac_state_struct h; + /* the PRNG key */ + uint8_t key[TC_SHA256_DIGEST_SIZE]; + /* PRNG state */ + uint8_t v[TC_SHA256_DIGEST_SIZE]; + /* calls to tc_hmac_prng_generate left before re-seed */ + unsigned int countdown; +}; + +typedef struct tc_hmac_prng_struct *TCHmacPrng_t; + +/** + * @brief HMAC-PRNG initialization procedure + * Initializes prng with personalization, disables tc_hmac_prng_generate + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * prng == NULL, + * personalization == NULL, + * plen > MAX_PLEN + * @note Assumes: - personalization != NULL. + * The personalization is a platform unique string (e.g., the host + * name) and is the last line of defense against failure of the + * entropy source + * @warning NIST SP 800-90A specifies 3 items as seed material during + * initialization: entropy seed, personalization, and an optional + * nonce. TinyCrypts requires instead a non-null personalization + * (which is easily computed) and indirectly requires an entropy + * seed (since the reseed function is mandatorily called after + * init) + * @param prng IN/OUT -- the PRNG state to initialize + * @param personalization IN -- personalization string + * @param plen IN -- personalization length in bytes + */ +int tc_hmac_prng_init(TCHmacPrng_t prng, + const uint8_t *personalization, + unsigned int plen); + +/** + * @brief HMAC-PRNG reseed procedure + * Mixes seed into prng, enables tc_hmac_prng_generate + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * prng == NULL, + * seed == NULL, + * seedlen < MIN_SLEN, + * seendlen > MAX_SLEN, + * additional_input != (const uint8_t *) 0 && additionallen == 0, + * additional_input != (const uint8_t *) 0 && additionallen > MAX_ALEN + * @note Assumes:- tc_hmac_prng_init has been called for prng + * - seed has sufficient entropy. + * + * @param prng IN/OUT -- the PRNG state + * @param seed IN -- entropy to mix into the prng + * @param seedlen IN -- length of seed in bytes + * @param additional_input IN -- additional input to the prng + * @param additionallen IN -- additional input length in bytes + */ +int tc_hmac_prng_reseed(TCHmacPrng_t prng, const uint8_t *seed, + unsigned int seedlen, const uint8_t *additional_input, + unsigned int additionallen); + +/** + * @brief HMAC-PRNG generate procedure + * Generates outlen pseudo-random bytes into out buffer, updates prng + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_HMAC_PRNG_RESEED_REQ (-1) if a reseed is needed + * returns TC_CRYPTO_FAIL (0) if: + * out == NULL, + * prng == NULL, + * outlen == 0, + * outlen >= MAX_OUT + * @note Assumes tc_hmac_prng_init has been called for prng + * @param out IN/OUT -- buffer to receive output + * @param outlen IN -- size of out buffer in bytes + * @param prng IN/OUT -- the PRNG state + */ +int tc_hmac_prng_generate(uint8_t *out, unsigned int outlen, TCHmacPrng_t prng); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_HMAC_PRNG_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/sha256.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/sha256.h new file mode 100644 index 0000000..af5e8ba --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/sha256.h @@ -0,0 +1,129 @@ +/* sha256.h - TinyCrypt interface to a SHA-256 implementation */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief Interface to a SHA-256 implementation. + * + * Overview: SHA-256 is a NIST approved cryptographic hashing algorithm + * specified in FIPS 180. A hash algorithm maps data of arbitrary + * size to data of fixed length. + * + * Security: SHA-256 provides 128 bits of security against collision attacks + * and 256 bits of security against pre-image attacks. SHA-256 does + * NOT behave like a random oracle, but it can be used as one if + * the string being hashed is prefix-free encoded before hashing. + * + * Usage: 1) call tc_sha256_init to initialize a struct + * tc_sha256_state_struct before hashing a new string. + * + * 2) call tc_sha256_update to hash the next string segment; + * tc_sha256_update can be called as many times as needed to hash + * all of the segments of a string; the order is important. + * + * 3) call tc_sha256_final to out put the digest from a hashing + * operation. + */ + +#ifndef __TC_SHA256_H__ +#define __TC_SHA256_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define TC_SHA256_BLOCK_SIZE (64) +#define TC_SHA256_DIGEST_SIZE (32) +#define TC_SHA256_STATE_BLOCKS (TC_SHA256_DIGEST_SIZE/4) + +struct tc_sha256_state_struct { + unsigned int iv[TC_SHA256_STATE_BLOCKS]; + uint64_t bits_hashed; + uint8_t leftover[TC_SHA256_BLOCK_SIZE]; + size_t leftover_offset; +}; + +typedef struct tc_sha256_state_struct *TCSha256State_t; + +/** + * @brief SHA256 initialization procedure + * Initializes s + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if s == NULL + * @param s Sha256 state struct + */ +int tc_sha256_init(TCSha256State_t s); + +/** + * @brief SHA256 update procedure + * Hashes data_length bytes addressed by data into state s + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * s == NULL, + * s->iv == NULL, + * data == NULL + * @note Assumes s has been initialized by tc_sha256_init + * @warning The state buffer 'leftover' is left in memory after processing + * If your application intends to have sensitive data in this + * buffer, remind to erase it after the data has been processed + * @param s Sha256 state struct + * @param data message to hash + * @param datalen length of message to hash + */ +int tc_sha256_update (TCSha256State_t s, const uint8_t *data, size_t datalen); + +/** + * @brief SHA256 final procedure + * Inserts the completed hash computation into digest + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * s == NULL, + * s->iv == NULL, + * digest == NULL + * @note Assumes: s has been initialized by tc_sha256_init + * digest points to at least TC_SHA256_DIGEST_SIZE bytes + * @warning The state buffer 'leftover' is left in memory after processing + * If your application intends to have sensitive data in this + * buffer, remind to erase it after the data has been processed + * @param digest unsigned eight bit integer + * @param Sha256 state struct + */ +int tc_sha256_final(uint8_t *digest, TCSha256State_t s); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_SHA256_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/utils.h b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/utils.h new file mode 100644 index 0000000..bab5c32 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/include/tinycrypt/utils.h @@ -0,0 +1,95 @@ +/* utils.h - TinyCrypt interface to platform-dependent run-time operations */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief Interface to platform-dependent run-time operations. + * + */ + +#ifndef __TC_UTILS_H__ +#define __TC_UTILS_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Copy the the buffer 'from' to the buffer 'to'. + * @return returns TC_CRYPTO_SUCCESS (1) + * returns TC_CRYPTO_FAIL (0) if: + * from_len > to_len. + * + * @param to OUT -- destination buffer + * @param to_len IN -- length of destination buffer + * @param from IN -- origin buffer + * @param from_len IN -- length of origin buffer + */ +unsigned int _copy(uint8_t *to, unsigned int to_len, + const uint8_t *from, unsigned int from_len); + +/** + * @brief Set the value 'val' into the buffer 'to', 'len' times. + * + * @param to OUT -- destination buffer + * @param val IN -- value to be set in 'to' + * @param len IN -- number of times the value will be copied + */ +void _set(void *to, uint8_t val, unsigned int len); + +/* + * @brief AES specific doubling function, which utilizes + * the finite field used by AES. + * @return Returns a^2 + * + * @param a IN/OUT -- value to be doubled + */ +uint8_t _double_byte(uint8_t a); + +/* + * @brief Constant-time algorithm to compare if two sequences of bytes are equal + * @return Returns 0 if equal, and non-zero otherwise + * + * @param a IN -- sequence of bytes a + * @param b IN -- sequence of bytes b + * @param size IN -- size of sequences a and b + */ +int _compare(const uint8_t *a, const uint8_t *b, size_t size); + +#ifdef __cplusplus +} +#endif + +#endif /* __TC_UTILS_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/pkg.yml b/bootloader/mcuboot/ext/tinycrypt/lib/pkg.yml new file mode 100644 index 0000000..42db8aa --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/pkg.yml @@ -0,0 +1,30 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: ext/tinycrypt/lib +pkg.description: "MCUboot's bundled tinycrypt" +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: + +pkg.src_dirs: + - "source" + +pkg.cflags: + - "-std=c99" diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/aes_decrypt.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/aes_decrypt.c new file mode 100644 index 0000000..993a618 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/aes_decrypt.c @@ -0,0 +1,164 @@ +/* aes_decrypt.c - TinyCrypt implementation of AES decryption procedure */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +static const uint8_t inv_sbox[256] = { + 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, + 0x81, 0xf3, 0xd7, 0xfb, 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, + 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb, 0x54, 0x7b, 0x94, 0x32, + 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e, + 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, + 0x6d, 0x8b, 0xd1, 0x25, 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, + 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92, 0x6c, 0x70, 0x48, 0x50, + 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84, + 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, + 0xb8, 0xb3, 0x45, 0x06, 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, + 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b, 0x3a, 0x91, 0x11, 0x41, + 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73, + 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, + 0x1c, 0x75, 0xdf, 0x6e, 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, + 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b, 0xfc, 0x56, 0x3e, 0x4b, + 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4, + 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, + 0x27, 0x80, 0xec, 0x5f, 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, + 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef, 0xa0, 0xe0, 0x3b, 0x4d, + 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61, + 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, + 0x55, 0x21, 0x0c, 0x7d +}; + +int tc_aes128_set_decrypt_key(TCAesKeySched_t s, const uint8_t *k) +{ + return tc_aes128_set_encrypt_key(s, k); +} + +#define mult8(a)(_double_byte(_double_byte(_double_byte(a)))) +#define mult9(a)(mult8(a)^(a)) +#define multb(a)(mult8(a)^_double_byte(a)^(a)) +#define multd(a)(mult8(a)^_double_byte(_double_byte(a))^(a)) +#define multe(a)(mult8(a)^_double_byte(_double_byte(a))^_double_byte(a)) + +static inline void mult_row_column(uint8_t *out, const uint8_t *in) +{ + out[0] = multe(in[0]) ^ multb(in[1]) ^ multd(in[2]) ^ mult9(in[3]); + out[1] = mult9(in[0]) ^ multe(in[1]) ^ multb(in[2]) ^ multd(in[3]); + out[2] = multd(in[0]) ^ mult9(in[1]) ^ multe(in[2]) ^ multb(in[3]); + out[3] = multb(in[0]) ^ multd(in[1]) ^ mult9(in[2]) ^ multe(in[3]); +} + +static inline void inv_mix_columns(uint8_t *s) +{ + uint8_t t[Nb*Nk]; + + mult_row_column(t, s); + mult_row_column(&t[Nb], s+Nb); + mult_row_column(&t[2*Nb], s+(2*Nb)); + mult_row_column(&t[3*Nb], s+(3*Nb)); + (void)_copy(s, sizeof(t), t, sizeof(t)); +} + +static inline void add_round_key(uint8_t *s, const unsigned int *k) +{ + s[0] ^= (uint8_t)(k[0] >> 24); s[1] ^= (uint8_t)(k[0] >> 16); + s[2] ^= (uint8_t)(k[0] >> 8); s[3] ^= (uint8_t)(k[0]); + s[4] ^= (uint8_t)(k[1] >> 24); s[5] ^= (uint8_t)(k[1] >> 16); + s[6] ^= (uint8_t)(k[1] >> 8); s[7] ^= (uint8_t)(k[1]); + s[8] ^= (uint8_t)(k[2] >> 24); s[9] ^= (uint8_t)(k[2] >> 16); + s[10] ^= (uint8_t)(k[2] >> 8); s[11] ^= (uint8_t)(k[2]); + s[12] ^= (uint8_t)(k[3] >> 24); s[13] ^= (uint8_t)(k[3] >> 16); + s[14] ^= (uint8_t)(k[3] >> 8); s[15] ^= (uint8_t)(k[3]); +} + +static inline void inv_sub_bytes(uint8_t *s) +{ + unsigned int i; + + for (i = 0; i < (Nb*Nk); ++i) { + s[i] = inv_sbox[s[i]]; + } +} + +/* + * This inv_shift_rows also implements the matrix flip required for + * inv_mix_columns, but performs it here to reduce the number of memory + * operations. + */ +static inline void inv_shift_rows(uint8_t *s) +{ + uint8_t t[Nb*Nk]; + + t[0] = s[0]; t[1] = s[13]; t[2] = s[10]; t[3] = s[7]; + t[4] = s[4]; t[5] = s[1]; t[6] = s[14]; t[7] = s[11]; + t[8] = s[8]; t[9] = s[5]; t[10] = s[2]; t[11] = s[15]; + t[12] = s[12]; t[13] = s[9]; t[14] = s[6]; t[15] = s[3]; + (void)_copy(s, sizeof(t), t, sizeof(t)); +} + +int tc_aes_decrypt(uint8_t *out, const uint8_t *in, const TCAesKeySched_t s) +{ + uint8_t state[Nk*Nb]; + unsigned int i; + + if (out == (uint8_t *) 0) { + return TC_CRYPTO_FAIL; + } else if (in == (const uint8_t *) 0) { + return TC_CRYPTO_FAIL; + } else if (s == (TCAesKeySched_t) 0) { + return TC_CRYPTO_FAIL; + } + + (void)_copy(state, sizeof(state), in, sizeof(state)); + + add_round_key(state, s->words + Nb*Nr); + + for (i = Nr - 1; i > 0; --i) { + inv_shift_rows(state); + inv_sub_bytes(state); + add_round_key(state, s->words + Nb*i); + inv_mix_columns(state); + } + + inv_shift_rows(state); + inv_sub_bytes(state); + add_round_key(state, s->words); + + (void)_copy(out, sizeof(state), state, sizeof(state)); + + /*zeroing out the state buffer */ + _set(state, TC_ZERO_BYTE, sizeof(state)); + + + return TC_CRYPTO_SUCCESS; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/aes_encrypt.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/aes_encrypt.c new file mode 100644 index 0000000..8991aee --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/aes_encrypt.c @@ -0,0 +1,191 @@ +/* aes_encrypt.c - TinyCrypt implementation of AES encryption procedure */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +static const uint8_t sbox[256] = { + 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, + 0xfe, 0xd7, 0xab, 0x76, 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, + 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, 0xb7, 0xfd, 0x93, 0x26, + 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, + 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, + 0xeb, 0x27, 0xb2, 0x75, 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, + 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, 0x53, 0xd1, 0x00, 0xed, + 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, + 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, + 0x50, 0x3c, 0x9f, 0xa8, 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, + 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, 0xcd, 0x0c, 0x13, 0xec, + 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, + 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, + 0xde, 0x5e, 0x0b, 0xdb, 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, + 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, 0xe7, 0xc8, 0x37, 0x6d, + 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, + 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, + 0x4b, 0xbd, 0x8b, 0x8a, 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, + 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, 0xe1, 0xf8, 0x98, 0x11, + 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, + 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, + 0xb0, 0x54, 0xbb, 0x16 +}; + +static inline unsigned int rotword(unsigned int a) +{ + return (((a) >> 24)|((a) << 8)); +} + +#define subbyte(a, o)(sbox[((a) >> (o))&0xff] << (o)) +#define subword(a)(subbyte(a, 24)|subbyte(a, 16)|subbyte(a, 8)|subbyte(a, 0)) + +int tc_aes128_set_encrypt_key(TCAesKeySched_t s, const uint8_t *k) +{ + const unsigned int rconst[11] = { + 0x00000000, 0x01000000, 0x02000000, 0x04000000, 0x08000000, 0x10000000, + 0x20000000, 0x40000000, 0x80000000, 0x1b000000, 0x36000000 + }; + unsigned int i; + unsigned int t; + + if (s == (TCAesKeySched_t) 0) { + return TC_CRYPTO_FAIL; + } else if (k == (const uint8_t *) 0) { + return TC_CRYPTO_FAIL; + } + + for (i = 0; i < Nk; ++i) { + s->words[i] = (k[Nb*i]<<24) | (k[Nb*i+1]<<16) | + (k[Nb*i+2]<<8) | (k[Nb*i+3]); + } + + for (; i < (Nb * (Nr + 1)); ++i) { + t = s->words[i-1]; + if ((i % Nk) == 0) { + t = subword(rotword(t)) ^ rconst[i/Nk]; + } + s->words[i] = s->words[i-Nk] ^ t; + } + + return TC_CRYPTO_SUCCESS; +} + +static inline void add_round_key(uint8_t *s, const unsigned int *k) +{ + s[0] ^= (uint8_t)(k[0] >> 24); s[1] ^= (uint8_t)(k[0] >> 16); + s[2] ^= (uint8_t)(k[0] >> 8); s[3] ^= (uint8_t)(k[0]); + s[4] ^= (uint8_t)(k[1] >> 24); s[5] ^= (uint8_t)(k[1] >> 16); + s[6] ^= (uint8_t)(k[1] >> 8); s[7] ^= (uint8_t)(k[1]); + s[8] ^= (uint8_t)(k[2] >> 24); s[9] ^= (uint8_t)(k[2] >> 16); + s[10] ^= (uint8_t)(k[2] >> 8); s[11] ^= (uint8_t)(k[2]); + s[12] ^= (uint8_t)(k[3] >> 24); s[13] ^= (uint8_t)(k[3] >> 16); + s[14] ^= (uint8_t)(k[3] >> 8); s[15] ^= (uint8_t)(k[3]); +} + +static inline void sub_bytes(uint8_t *s) +{ + unsigned int i; + + for (i = 0; i < (Nb * Nk); ++i) { + s[i] = sbox[s[i]]; + } +} + +#define triple(a)(_double_byte(a)^(a)) + +static inline void mult_row_column(uint8_t *out, const uint8_t *in) +{ + out[0] = _double_byte(in[0]) ^ triple(in[1]) ^ in[2] ^ in[3]; + out[1] = in[0] ^ _double_byte(in[1]) ^ triple(in[2]) ^ in[3]; + out[2] = in[0] ^ in[1] ^ _double_byte(in[2]) ^ triple(in[3]); + out[3] = triple(in[0]) ^ in[1] ^ in[2] ^ _double_byte(in[3]); +} + +static inline void mix_columns(uint8_t *s) +{ + uint8_t t[Nb*Nk]; + + mult_row_column(t, s); + mult_row_column(&t[Nb], s+Nb); + mult_row_column(&t[2 * Nb], s + (2 * Nb)); + mult_row_column(&t[3 * Nb], s + (3 * Nb)); + (void) _copy(s, sizeof(t), t, sizeof(t)); +} + +/* + * This shift_rows also implements the matrix flip required for mix_columns, but + * performs it here to reduce the number of memory operations. + */ +static inline void shift_rows(uint8_t *s) +{ + uint8_t t[Nb * Nk]; + + t[0] = s[0]; t[1] = s[5]; t[2] = s[10]; t[3] = s[15]; + t[4] = s[4]; t[5] = s[9]; t[6] = s[14]; t[7] = s[3]; + t[8] = s[8]; t[9] = s[13]; t[10] = s[2]; t[11] = s[7]; + t[12] = s[12]; t[13] = s[1]; t[14] = s[6]; t[15] = s[11]; + (void) _copy(s, sizeof(t), t, sizeof(t)); +} + +int tc_aes_encrypt(uint8_t *out, const uint8_t *in, const TCAesKeySched_t s) +{ + uint8_t state[Nk*Nb]; + unsigned int i; + + if (out == (uint8_t *) 0) { + return TC_CRYPTO_FAIL; + } else if (in == (const uint8_t *) 0) { + return TC_CRYPTO_FAIL; + } else if (s == (TCAesKeySched_t) 0) { + return TC_CRYPTO_FAIL; + } + + (void)_copy(state, sizeof(state), in, sizeof(state)); + add_round_key(state, s->words); + + for (i = 0; i < (Nr - 1); ++i) { + sub_bytes(state); + shift_rows(state); + mix_columns(state); + add_round_key(state, s->words + Nb*(i+1)); + } + + sub_bytes(state); + shift_rows(state); + add_round_key(state, s->words + Nb*(i+1)); + + (void)_copy(out, sizeof(state), state, sizeof(state)); + + /* zeroing out the state buffer */ + _set(state, TC_ZERO_BYTE, sizeof(state)); + + return TC_CRYPTO_SUCCESS; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/cbc_mode.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/cbc_mode.c new file mode 100644 index 0000000..62d7879 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/cbc_mode.c @@ -0,0 +1,114 @@ +/* cbc_mode.c - TinyCrypt implementation of CBC mode encryption & decryption */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +int tc_cbc_mode_encrypt(uint8_t *out, unsigned int outlen, const uint8_t *in, + unsigned int inlen, const uint8_t *iv, + const TCAesKeySched_t sched) +{ + + uint8_t buffer[TC_AES_BLOCK_SIZE]; + unsigned int n, m; + + /* input sanity check: */ + if (out == (uint8_t *) 0 || + in == (const uint8_t *) 0 || + sched == (TCAesKeySched_t) 0 || + inlen == 0 || + outlen == 0 || + (inlen % TC_AES_BLOCK_SIZE) != 0 || + (outlen % TC_AES_BLOCK_SIZE) != 0 || + outlen != inlen + TC_AES_BLOCK_SIZE) { + return TC_CRYPTO_FAIL; + } + + /* copy iv to the buffer */ + (void)_copy(buffer, TC_AES_BLOCK_SIZE, iv, TC_AES_BLOCK_SIZE); + /* copy iv to the output buffer */ + (void)_copy(out, TC_AES_BLOCK_SIZE, iv, TC_AES_BLOCK_SIZE); + out += TC_AES_BLOCK_SIZE; + + for (n = m = 0; n < inlen; ++n) { + buffer[m++] ^= *in++; + if (m == TC_AES_BLOCK_SIZE) { + (void)tc_aes_encrypt(buffer, buffer, sched); + (void)_copy(out, TC_AES_BLOCK_SIZE, + buffer, TC_AES_BLOCK_SIZE); + out += TC_AES_BLOCK_SIZE; + m = 0; + } + } + + return TC_CRYPTO_SUCCESS; +} + +int tc_cbc_mode_decrypt(uint8_t *out, unsigned int outlen, const uint8_t *in, + unsigned int inlen, const uint8_t *iv, + const TCAesKeySched_t sched) +{ + + uint8_t buffer[TC_AES_BLOCK_SIZE]; + const uint8_t *p; + unsigned int n, m; + + /* sanity check the inputs */ + if (out == (uint8_t *) 0 || + in == (const uint8_t *) 0 || + sched == (TCAesKeySched_t) 0 || + inlen == 0 || + outlen == 0 || + (inlen % TC_AES_BLOCK_SIZE) != 0 || + (outlen % TC_AES_BLOCK_SIZE) != 0 || + outlen != inlen - TC_AES_BLOCK_SIZE) { + return TC_CRYPTO_FAIL; + } + + /* + * Note that in == iv + ciphertext, i.e. the iv and the ciphertext are + * contiguous. This allows for a very efficient decryption algorithm + * that would not otherwise be possible. + */ + p = iv; + for (n = m = 0; n < inlen; ++n) { + if ((n % TC_AES_BLOCK_SIZE) == 0) { + (void)tc_aes_decrypt(buffer, in, sched); + in += TC_AES_BLOCK_SIZE; + m = 0; + } + *out++ = buffer[m++] ^ *p++; + } + + return TC_CRYPTO_SUCCESS; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/ccm_mode.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/ccm_mode.c new file mode 100644 index 0000000..929adac --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/ccm_mode.c @@ -0,0 +1,266 @@ +/* ccm_mode.c - TinyCrypt implementation of CCM mode */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +#include + +int tc_ccm_config(TCCcmMode_t c, TCAesKeySched_t sched, uint8_t *nonce, + unsigned int nlen, unsigned int mlen) +{ + + /* input sanity check: */ + if (c == (TCCcmMode_t) 0 || + sched == (TCAesKeySched_t) 0 || + nonce == (uint8_t *) 0) { + return TC_CRYPTO_FAIL; + } else if (nlen != 13) { + return TC_CRYPTO_FAIL; /* The allowed nonce size is: 13. See documentation.*/ + } else if ((mlen < 4) || (mlen > 16) || (mlen & 1)) { + return TC_CRYPTO_FAIL; /* The allowed mac sizes are: 4, 6, 8, 10, 12, 14, 16.*/ + } + + c->mlen = mlen; + c->sched = sched; + c->nonce = nonce; + + return TC_CRYPTO_SUCCESS; +} + +/** + * Variation of CBC-MAC mode used in CCM. + */ +static void ccm_cbc_mac(uint8_t *T, const uint8_t *data, unsigned int dlen, + unsigned int flag, TCAesKeySched_t sched) +{ + + unsigned int i; + + if (flag > 0) { + T[0] ^= (uint8_t)(dlen >> 8); + T[1] ^= (uint8_t)(dlen); + dlen += 2; i = 2; + } else { + i = 0; + } + + while (i < dlen) { + T[i++ % (Nb * Nk)] ^= *data++; + if (((i % (Nb * Nk)) == 0) || dlen == i) { + (void) tc_aes_encrypt(T, T, sched); + } + } +} + +/** + * Variation of CTR mode used in CCM. + * The CTR mode used by CCM is slightly different than the conventional CTR + * mode (the counter is increased before encryption, instead of after + * encryption). Besides, it is assumed that the counter is stored in the last + * 2 bytes of the nonce. + */ +static int ccm_ctr_mode(uint8_t *out, unsigned int outlen, const uint8_t *in, + unsigned int inlen, uint8_t *ctr, const TCAesKeySched_t sched) +{ + + uint8_t buffer[TC_AES_BLOCK_SIZE]; + uint8_t nonce[TC_AES_BLOCK_SIZE]; + uint16_t block_num; + unsigned int i; + + /* input sanity check: */ + if (out == (uint8_t *) 0 || + in == (uint8_t *) 0 || + ctr == (uint8_t *) 0 || + sched == (TCAesKeySched_t) 0 || + inlen == 0 || + outlen == 0 || + outlen != inlen) { + return TC_CRYPTO_FAIL; + } + + /* copy the counter to the nonce */ + (void) _copy(nonce, sizeof(nonce), ctr, sizeof(nonce)); + + /* select the last 2 bytes of the nonce to be incremented */ + block_num = (uint16_t) ((nonce[14] << 8)|(nonce[15])); + for (i = 0; i < inlen; ++i) { + if ((i % (TC_AES_BLOCK_SIZE)) == 0) { + block_num++; + nonce[14] = (uint8_t)(block_num >> 8); + nonce[15] = (uint8_t)(block_num); + if (!tc_aes_encrypt(buffer, nonce, sched)) { + return TC_CRYPTO_FAIL; + } + } + /* update the output */ + *out++ = buffer[i % (TC_AES_BLOCK_SIZE)] ^ *in++; + } + + /* update the counter */ + ctr[14] = nonce[14]; ctr[15] = nonce[15]; + + return TC_CRYPTO_SUCCESS; +} + +int tc_ccm_generation_encryption(uint8_t *out, unsigned int olen, + const uint8_t *associated_data, + unsigned int alen, const uint8_t *payload, + unsigned int plen, TCCcmMode_t c) +{ + + /* input sanity check: */ + if ((out == (uint8_t *) 0) || + (c == (TCCcmMode_t) 0) || + ((plen > 0) && (payload == (uint8_t *) 0)) || + ((alen > 0) && (associated_data == (uint8_t *) 0)) || + (alen >= TC_CCM_AAD_MAX_BYTES) || /* associated data size unsupported */ + (plen >= TC_CCM_PAYLOAD_MAX_BYTES) || /* payload size unsupported */ + (olen < (plen + c->mlen))) { /* invalid output buffer size */ + return TC_CRYPTO_FAIL; + } + + uint8_t b[Nb * Nk]; + uint8_t tag[Nb * Nk]; + unsigned int i; + + /* GENERATING THE AUTHENTICATION TAG: */ + + /* formatting the sequence b for authentication: */ + b[0] = ((alen > 0) ? 0x40:0) | (((c->mlen - 2) / 2 << 3)) | (1); + for (i = 1; i <= 13; ++i) { + b[i] = c->nonce[i - 1]; + } + b[14] = (uint8_t)(plen >> 8); + b[15] = (uint8_t)(plen); + + /* computing the authentication tag using cbc-mac: */ + (void) tc_aes_encrypt(tag, b, c->sched); + if (alen > 0) { + ccm_cbc_mac(tag, associated_data, alen, 1, c->sched); + } + if (plen > 0) { + ccm_cbc_mac(tag, payload, plen, 0, c->sched); + } + + /* ENCRYPTION: */ + + /* formatting the sequence b for encryption: */ + b[0] = 1; /* q - 1 = 2 - 1 = 1 */ + b[14] = b[15] = TC_ZERO_BYTE; + + /* encrypting payload using ctr mode: */ + ccm_ctr_mode(out, plen, payload, plen, b, c->sched); + + b[14] = b[15] = TC_ZERO_BYTE; /* restoring initial counter for ctr_mode (0):*/ + + /* encrypting b and adding the tag to the output: */ + (void) tc_aes_encrypt(b, b, c->sched); + out += plen; + for (i = 0; i < c->mlen; ++i) { + *out++ = tag[i] ^ b[i]; + } + + return TC_CRYPTO_SUCCESS; +} + +int tc_ccm_decryption_verification(uint8_t *out, unsigned int olen, + const uint8_t *associated_data, + unsigned int alen, const uint8_t *payload, + unsigned int plen, TCCcmMode_t c) +{ + + /* input sanity check: */ + if ((out == (uint8_t *) 0) || + (c == (TCCcmMode_t) 0) || + ((plen > 0) && (payload == (uint8_t *) 0)) || + ((alen > 0) && (associated_data == (uint8_t *) 0)) || + (alen >= TC_CCM_AAD_MAX_BYTES) || /* associated data size unsupported */ + (plen >= TC_CCM_PAYLOAD_MAX_BYTES) || /* payload size unsupported */ + (olen < plen - c->mlen)) { /* invalid output buffer size */ + return TC_CRYPTO_FAIL; + } + + uint8_t b[Nb * Nk]; + uint8_t tag[Nb * Nk]; + unsigned int i; + + /* DECRYPTION: */ + + /* formatting the sequence b for decryption: */ + b[0] = 1; /* q - 1 = 2 - 1 = 1 */ + for (i = 1; i < 14; ++i) { + b[i] = c->nonce[i - 1]; + } + b[14] = b[15] = TC_ZERO_BYTE; /* initial counter value is 0 */ + + /* decrypting payload using ctr mode: */ + ccm_ctr_mode(out, plen - c->mlen, payload, plen - c->mlen, b, c->sched); + + b[14] = b[15] = TC_ZERO_BYTE; /* restoring initial counter value (0) */ + + /* encrypting b and restoring the tag from input: */ + (void) tc_aes_encrypt(b, b, c->sched); + for (i = 0; i < c->mlen; ++i) { + tag[i] = *(payload + plen - c->mlen + i) ^ b[i]; + } + + /* VERIFYING THE AUTHENTICATION TAG: */ + + /* formatting the sequence b for authentication: */ + b[0] = ((alen > 0) ? 0x40:0)|(((c->mlen - 2) / 2 << 3)) | (1); + for (i = 1; i < 14; ++i) { + b[i] = c->nonce[i - 1]; + } + b[14] = (uint8_t)((plen - c->mlen) >> 8); + b[15] = (uint8_t)(plen - c->mlen); + + /* computing the authentication tag using cbc-mac: */ + (void) tc_aes_encrypt(b, b, c->sched); + if (alen > 0) { + ccm_cbc_mac(b, associated_data, alen, 1, c->sched); + } + if (plen > 0) { + ccm_cbc_mac(b, out, plen - c->mlen, 0, c->sched); + } + + /* comparing the received tag and the computed one: */ + if (_compare(b, tag, c->mlen) == 0) { + return TC_CRYPTO_SUCCESS; + } else { + /* erase the decrypted buffer in case of mac validation failure: */ + _set(out, 0, plen - c->mlen); + return TC_CRYPTO_FAIL; + } +} diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/cmac_mode.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/cmac_mode.c new file mode 100644 index 0000000..96d147e --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/cmac_mode.c @@ -0,0 +1,254 @@ +/* cmac_mode.c - TinyCrypt CMAC mode implementation */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include + +/* max number of calls until change the key (2^48).*/ +const static uint64_t MAX_CALLS = ((uint64_t)1 << 48); + +/* + * gf_wrap -- In our implementation, GF(2^128) is represented as a 16 byte + * array with byte 0 the most significant and byte 15 the least significant. + * High bit carry reduction is based on the primitive polynomial + * + * X^128 + X^7 + X^2 + X + 1, + * + * which leads to the reduction formula X^128 = X^7 + X^2 + X + 1. Indeed, + * since 0 = (X^128 + X^7 + X^2 + 1) mod (X^128 + X^7 + X^2 + X + 1) and since + * addition of polynomials with coefficients in Z/Z(2) is just XOR, we can + * add X^128 to both sides to get + * + * X^128 = (X^7 + X^2 + X + 1) mod (X^128 + X^7 + X^2 + X + 1) + * + * and the coefficients of the polynomial on the right hand side form the + * string 1000 0111 = 0x87, which is the value of gf_wrap. + * + * This gets used in the following way. Doubling in GF(2^128) is just a left + * shift by 1 bit, except when the most significant bit is 1. In the latter + * case, the relation X^128 = X^7 + X^2 + X + 1 says that the high order bit + * that overflows beyond 128 bits can be replaced by addition of + * X^7 + X^2 + X + 1 <--> 0x87 to the low order 128 bits. Since addition + * in GF(2^128) is represented by XOR, we therefore only have to XOR 0x87 + * into the low order byte after a left shift when the starting high order + * bit is 1. + */ +const unsigned char gf_wrap = 0x87; + +/* + * assumes: out != NULL and points to a GF(2^n) value to receive the + * doubled value; + * in != NULL and points to a 16 byte GF(2^n) value + * to double; + * the in and out buffers do not overlap. + * effects: doubles the GF(2^n) value pointed to by "in" and places + * the result in the GF(2^n) value pointed to by "out." + */ +void gf_double(uint8_t *out, uint8_t *in) +{ + + /* start with low order byte */ + uint8_t *x = in + (TC_AES_BLOCK_SIZE - 1); + + /* if msb == 1, we need to add the gf_wrap value, otherwise add 0 */ + uint8_t carry = (in[0] >> 7) ? gf_wrap : 0; + + out += (TC_AES_BLOCK_SIZE - 1); + for (;;) { + *out-- = (*x << 1) ^ carry; + if (x == in) { + break; + } + carry = *x-- >> 7; + } +} + +int tc_cmac_setup(TCCmacState_t s, const uint8_t *key, TCAesKeySched_t sched) +{ + + /* input sanity check: */ + if (s == (TCCmacState_t) 0 || + key == (const uint8_t *) 0) { + return TC_CRYPTO_FAIL; + } + + /* put s into a known state */ + _set(s, 0, sizeof(*s)); + s->sched = sched; + + /* configure the encryption key used by the underlying block cipher */ + tc_aes128_set_encrypt_key(s->sched, key); + + /* compute s->K1 and s->K2 from s->iv using s->keyid */ + _set(s->iv, 0, TC_AES_BLOCK_SIZE); + tc_aes_encrypt(s->iv, s->iv, s->sched); + gf_double (s->K1, s->iv); + gf_double (s->K2, s->K1); + + /* reset s->iv to 0 in case someone wants to compute now */ + tc_cmac_init(s); + + return TC_CRYPTO_SUCCESS; +} + +int tc_cmac_erase(TCCmacState_t s) +{ + if (s == (TCCmacState_t) 0) { + return TC_CRYPTO_FAIL; + } + + /* destroy the current state */ + _set(s, 0, sizeof(*s)); + + return TC_CRYPTO_SUCCESS; +} + +int tc_cmac_init(TCCmacState_t s) +{ + /* input sanity check: */ + if (s == (TCCmacState_t) 0) { + return TC_CRYPTO_FAIL; + } + + /* CMAC starts with an all zero initialization vector */ + _set(s->iv, 0, TC_AES_BLOCK_SIZE); + + /* and the leftover buffer is empty */ + _set(s->leftover, 0, TC_AES_BLOCK_SIZE); + s->leftover_offset = 0; + + /* Set countdown to max number of calls allowed before re-keying: */ + s->countdown = MAX_CALLS; + + return TC_CRYPTO_SUCCESS; +} + +int tc_cmac_update(TCCmacState_t s, const uint8_t *data, size_t data_length) +{ + unsigned int i; + + /* input sanity check: */ + if (s == (TCCmacState_t) 0) { + return TC_CRYPTO_FAIL; + } + if (data_length == 0) { + return TC_CRYPTO_SUCCESS; + } + if (data == (const uint8_t *) 0) { + return TC_CRYPTO_FAIL; + } + + if (s->countdown == 0) { + return TC_CRYPTO_FAIL; + } + + s->countdown--; + + if (s->leftover_offset > 0) { + /* last data added to s didn't end on a TC_AES_BLOCK_SIZE byte boundary */ + size_t remaining_space = TC_AES_BLOCK_SIZE - s->leftover_offset; + + if (data_length < remaining_space) { + /* still not enough data to encrypt this time either */ + _copy(&s->leftover[s->leftover_offset], data_length, data, data_length); + s->leftover_offset += data_length; + return TC_CRYPTO_SUCCESS; + } + /* leftover block is now full; encrypt it first */ + _copy(&s->leftover[s->leftover_offset], + remaining_space, + data, + remaining_space); + data_length -= remaining_space; + data += remaining_space; + s->leftover_offset = 0; + + for (i = 0; i < TC_AES_BLOCK_SIZE; ++i) { + s->iv[i] ^= s->leftover[i]; + } + tc_aes_encrypt(s->iv, s->iv, s->sched); + } + + /* CBC encrypt each (except the last) of the data blocks */ + while (data_length > TC_AES_BLOCK_SIZE) { + for (i = 0; i < TC_AES_BLOCK_SIZE; ++i) { + s->iv[i] ^= data[i]; + } + tc_aes_encrypt(s->iv, s->iv, s->sched); + data += TC_AES_BLOCK_SIZE; + data_length -= TC_AES_BLOCK_SIZE; + } + + if (data_length > 0) { + /* save leftover data for next time */ + _copy(s->leftover, data_length, data, data_length); + s->leftover_offset = data_length; + } + + return TC_CRYPTO_SUCCESS; +} + +int tc_cmac_final(uint8_t *tag, TCCmacState_t s) +{ + uint8_t *k; + unsigned int i; + + /* input sanity check: */ + if (tag == (uint8_t *) 0 || + s == (TCCmacState_t) 0) { + return TC_CRYPTO_FAIL; + } + + if (s->leftover_offset == TC_AES_BLOCK_SIZE) { + /* the last message block is a full-sized block */ + k = (uint8_t *) s->K1; + } else { + /* the final message block is not a full-sized block */ + size_t remaining = TC_AES_BLOCK_SIZE - s->leftover_offset; + + _set(&s->leftover[s->leftover_offset], 0, remaining); + s->leftover[s->leftover_offset] = TC_CMAC_PADDING; + k = (uint8_t *) s->K2; + } + for (i = 0; i < TC_AES_BLOCK_SIZE; ++i) { + s->iv[i] ^= s->leftover[i] ^ k[i]; + } + + tc_aes_encrypt(tag, s->iv, s->sched); + + /* erasing state: */ + tc_cmac_erase(s); + + return TC_CRYPTO_SUCCESS; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/ctr_mode.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/ctr_mode.c new file mode 100644 index 0000000..ec8c394 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/ctr_mode.c @@ -0,0 +1,91 @@ +/* ctr_mode.c - TinyCrypt CTR mode implementation */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +int tc_ctr_mode(uint8_t *out, unsigned int outlen, const uint8_t *in, + unsigned int inlen, uint8_t *ctr, uint32_t *blk_off, + const TCAesKeySched_t sched) +{ + + uint8_t buffer[TC_AES_BLOCK_SIZE]; + uint8_t nonce[TC_AES_BLOCK_SIZE]; + unsigned int block_num; + unsigned int i; + uint32_t n; + + /* input sanity check: */ + if (out == (uint8_t *) 0 || + in == (uint8_t *) 0 || + ctr == (uint8_t *) 0 || + blk_off == (uint32_t *) 0 || + sched == (TCAesKeySched_t) 0 || + inlen == 0 || + outlen == 0 || + outlen != inlen) { + return TC_CRYPTO_FAIL; + } + + /* copy the ctr to the nonce */ + (void)_copy(nonce, sizeof(nonce), ctr, sizeof(nonce)); + + /* select the last 4 bytes of the nonce to be incremented */ + block_num = (nonce[12] << 24) | (nonce[13] << 16) | + (nonce[14] << 8) | (nonce[15]); + n = *blk_off; + for (i = 0; i < inlen; ++i) { + if (n == 0) { + /* encrypt data using the current nonce */ + if (tc_aes_encrypt(buffer, nonce, sched)) { + block_num++; + nonce[12] = (uint8_t)(block_num >> 24); + nonce[13] = (uint8_t)(block_num >> 16); + nonce[14] = (uint8_t)(block_num >> 8); + nonce[15] = (uint8_t)(block_num); + } else { + return TC_CRYPTO_FAIL; + } + } + /* update the output */ + *out++ = buffer[n] ^ *in++; + n = (n + 1) % TC_AES_BLOCK_SIZE; + } + *blk_off = n; + + /* update the counter */ + ctr[12] = nonce[12]; ctr[13] = nonce[13]; + ctr[14] = nonce[14]; ctr[15] = nonce[15]; + + return TC_CRYPTO_SUCCESS; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/ctr_prng.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/ctr_prng.c new file mode 100644 index 0000000..cac2cc4 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/ctr_prng.c @@ -0,0 +1,283 @@ +/* ctr_prng.c - TinyCrypt implementation of CTR-PRNG */ + +/* + * Copyright (c) 2016, Chris Morrison + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include + +/* + * This PRNG is based on the CTR_DRBG described in Recommendation for Random + * Number Generation Using Deterministic Random Bit Generators, + * NIST SP 800-90A Rev. 1. + * + * Annotations to particular steps (e.g. 10.2.1.2 Step 1) refer to the steps + * described in that document. + * + */ + +/** + * @brief Array incrementer + * Treats the supplied array as one contiguous number (MSB in arr[0]), and + * increments it by one + * @return none + * @param arr IN/OUT -- array to be incremented + * @param len IN -- size of arr in bytes + */ +static void arrInc(uint8_t arr[], unsigned int len) +{ + unsigned int i; + if (0 != arr) { + for (i = len; i > 0U; i--) { + if (++arr[i-1] != 0U) { + break; + } + } + } +} + +/** + * @brief CTR PRNG update + * Updates the internal state of supplied the CTR PRNG context + * increments it by one + * @return none + * @note Assumes: providedData is (TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE) bytes long + * @param ctx IN/OUT -- CTR PRNG state + * @param providedData IN -- data used when updating the internal state + */ +static void tc_ctr_prng_update(TCCtrPrng_t * const ctx, uint8_t const * const providedData) +{ + if (0 != ctx) { + /* 10.2.1.2 step 1 */ + uint8_t temp[TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE]; + unsigned int len = 0U; + + /* 10.2.1.2 step 2 */ + while (len < sizeof temp) { + unsigned int blocklen = sizeof(temp) - len; + uint8_t output_block[TC_AES_BLOCK_SIZE]; + + /* 10.2.1.2 step 2.1 */ + arrInc(ctx->V, sizeof ctx->V); + + /* 10.2.1.2 step 2.2 */ + if (blocklen > TC_AES_BLOCK_SIZE) { + blocklen = TC_AES_BLOCK_SIZE; + } + (void)tc_aes_encrypt(output_block, ctx->V, &ctx->key); + + /* 10.2.1.2 step 2.3/step 3 */ + memcpy(&(temp[len]), output_block, blocklen); + + len += blocklen; + } + + /* 10.2.1.2 step 4 */ + if (0 != providedData) { + unsigned int i; + for (i = 0U; i < sizeof temp; i++) { + temp[i] ^= providedData[i]; + } + } + + /* 10.2.1.2 step 5 */ + (void)tc_aes128_set_encrypt_key(&ctx->key, temp); + + /* 10.2.1.2 step 6 */ + memcpy(ctx->V, &(temp[TC_AES_KEY_SIZE]), TC_AES_BLOCK_SIZE); + } +} + +int tc_ctr_prng_init(TCCtrPrng_t * const ctx, + uint8_t const * const entropy, + unsigned int entropyLen, + uint8_t const * const personalization, + unsigned int pLen) +{ + int result = TC_CRYPTO_FAIL; + unsigned int i; + uint8_t personalization_buf[TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE] = {0U}; + uint8_t seed_material[TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE]; + uint8_t zeroArr[TC_AES_BLOCK_SIZE] = {0U}; + + if (0 != personalization) { + /* 10.2.1.3.1 step 1 */ + unsigned int len = pLen; + if (len > sizeof personalization_buf) { + len = sizeof personalization_buf; + } + + /* 10.2.1.3.1 step 2 */ + memcpy(personalization_buf, personalization, len); + } + + if ((0 != ctx) && (0 != entropy) && (entropyLen >= sizeof seed_material)) { + /* 10.2.1.3.1 step 3 */ + memcpy(seed_material, entropy, sizeof seed_material); + for (i = 0U; i < sizeof seed_material; i++) { + seed_material[i] ^= personalization_buf[i]; + } + + /* 10.2.1.3.1 step 4 */ + (void)tc_aes128_set_encrypt_key(&ctx->key, zeroArr); + + /* 10.2.1.3.1 step 5 */ + memset(ctx->V, 0x00, sizeof ctx->V); + + /* 10.2.1.3.1 step 6 */ + tc_ctr_prng_update(ctx, seed_material); + + /* 10.2.1.3.1 step 7 */ + ctx->reseedCount = 1U; + + result = TC_CRYPTO_SUCCESS; + } + return result; +} + +int tc_ctr_prng_reseed(TCCtrPrng_t * const ctx, + uint8_t const * const entropy, + unsigned int entropyLen, + uint8_t const * const additional_input, + unsigned int additionallen) +{ + unsigned int i; + int result = TC_CRYPTO_FAIL; + uint8_t additional_input_buf[TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE] = {0U}; + uint8_t seed_material[TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE]; + + if (0 != additional_input) { + /* 10.2.1.4.1 step 1 */ + unsigned int len = additionallen; + if (len > sizeof additional_input_buf) { + len = sizeof additional_input_buf; + } + + /* 10.2.1.4.1 step 2 */ + memcpy(additional_input_buf, additional_input, len); + } + + unsigned int seedlen = (unsigned int)TC_AES_KEY_SIZE + (unsigned int)TC_AES_BLOCK_SIZE; + if ((0 != ctx) && (entropyLen >= seedlen)) { + /* 10.2.1.4.1 step 3 */ + memcpy(seed_material, entropy, sizeof seed_material); + for (i = 0U; i < sizeof seed_material; i++) { + seed_material[i] ^= additional_input_buf[i]; + } + + /* 10.2.1.4.1 step 4 */ + tc_ctr_prng_update(ctx, seed_material); + + /* 10.2.1.4.1 step 5 */ + ctx->reseedCount = 1U; + + result = TC_CRYPTO_SUCCESS; + } + return result; +} + +int tc_ctr_prng_generate(TCCtrPrng_t * const ctx, + uint8_t const * const additional_input, + unsigned int additionallen, + uint8_t * const out, + unsigned int outlen) +{ + /* 2^48 - see section 10.2.1 */ + static const uint64_t MAX_REQS_BEFORE_RESEED = 0x1000000000000ULL; + + /* 2^19 bits - see section 10.2.1 */ + static const unsigned int MAX_BYTES_PER_REQ = 65536U; + + unsigned int result = TC_CRYPTO_FAIL; + + if ((0 != ctx) && (0 != out) && (outlen < MAX_BYTES_PER_REQ)) { + /* 10.2.1.5.1 step 1 */ + if (ctx->reseedCount > MAX_REQS_BEFORE_RESEED) { + result = TC_CTR_PRNG_RESEED_REQ; + } else { + uint8_t additional_input_buf[TC_AES_KEY_SIZE + TC_AES_BLOCK_SIZE] = {0U}; + if (0 != additional_input) { + /* 10.2.1.5.1 step 2 */ + unsigned int len = additionallen; + if (len > sizeof additional_input_buf) { + len = sizeof additional_input_buf; + } + memcpy(additional_input_buf, additional_input, len); + tc_ctr_prng_update(ctx, additional_input_buf); + } + + /* 10.2.1.5.1 step 3 - implicit */ + + /* 10.2.1.5.1 step 4 */ + unsigned int len = 0U; + while (len < outlen) { + unsigned int blocklen = outlen - len; + uint8_t output_block[TC_AES_BLOCK_SIZE]; + + /* 10.2.1.5.1 step 4.1 */ + arrInc(ctx->V, sizeof ctx->V); + + /* 10.2.1.5.1 step 4.2 */ + (void)tc_aes_encrypt(output_block, ctx->V, &ctx->key); + + /* 10.2.1.5.1 step 4.3/step 5 */ + if (blocklen > TC_AES_BLOCK_SIZE) { + blocklen = TC_AES_BLOCK_SIZE; + } + memcpy(&(out[len]), output_block, blocklen); + + len += blocklen; + } + + /* 10.2.1.5.1 step 6 */ + tc_ctr_prng_update(ctx, additional_input_buf); + + /* 10.2.1.5.1 step 7 */ + ctx->reseedCount++; + + /* 10.2.1.5.1 step 8 */ + result = TC_CRYPTO_SUCCESS; + } + } + + return result; +} + +void tc_ctr_prng_uninstantiate(TCCtrPrng_t * const ctx) +{ + if (0 != ctx) { + memset(ctx->key.words, 0x00, sizeof ctx->key.words); + memset(ctx->V, 0x00, sizeof ctx->V); + ctx->reseedCount = 0U; + } +} + + + + diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc.c new file mode 100644 index 0000000..46080bf --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc.c @@ -0,0 +1,942 @@ +/* ecc.c - TinyCrypt implementation of common ECC functions */ + +/* + * Copyright (c) 2014, Kenneth MacKay + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +/* IMPORTANT: Make sure a cryptographically-secure PRNG is set and the platform + * has access to enough entropy in order to feed the PRNG regularly. */ +#if default_RNG_defined +static uECC_RNG_Function g_rng_function = &default_CSPRNG; +#else +static uECC_RNG_Function g_rng_function = 0; +#endif + +void uECC_set_rng(uECC_RNG_Function rng_function) +{ + g_rng_function = rng_function; +} + +uECC_RNG_Function uECC_get_rng(void) +{ + return g_rng_function; +} + +int uECC_curve_private_key_size(uECC_Curve curve) +{ + return BITS_TO_BYTES(curve->num_n_bits); +} + +int uECC_curve_public_key_size(uECC_Curve curve) +{ + return 2 * curve->num_bytes; +} + +void uECC_vli_clear(uECC_word_t *vli, wordcount_t num_words) +{ + wordcount_t i; + for (i = 0; i < num_words; ++i) { + vli[i] = 0; + } +} + +uECC_word_t uECC_vli_isZero(const uECC_word_t *vli, wordcount_t num_words) +{ + uECC_word_t bits = 0; + wordcount_t i; + for (i = 0; i < num_words; ++i) { + bits |= vli[i]; + } + return (bits == 0); +} + +uECC_word_t uECC_vli_testBit(const uECC_word_t *vli, bitcount_t bit) +{ + return (vli[bit >> uECC_WORD_BITS_SHIFT] & + ((uECC_word_t)1 << (bit & uECC_WORD_BITS_MASK))); +} + +/* Counts the number of words in vli. */ +static wordcount_t vli_numDigits(const uECC_word_t *vli, + const wordcount_t max_words) +{ + + wordcount_t i; + /* Search from the end until we find a non-zero digit. We do it in reverse + * because we expect that most digits will be nonzero. */ + for (i = max_words - 1; i >= 0 && vli[i] == 0; --i) { + } + + return (i + 1); +} + +bitcount_t uECC_vli_numBits(const uECC_word_t *vli, + const wordcount_t max_words) +{ + + uECC_word_t i; + uECC_word_t digit; + + wordcount_t num_digits = vli_numDigits(vli, max_words); + if (num_digits == 0) { + return 0; + } + + digit = vli[num_digits - 1]; + for (i = 0; digit; ++i) { + digit >>= 1; + } + + return (((bitcount_t)(num_digits - 1) << uECC_WORD_BITS_SHIFT) + i); +} + +void uECC_vli_set(uECC_word_t *dest, const uECC_word_t *src, + wordcount_t num_words) +{ + wordcount_t i; + + for (i = 0; i < num_words; ++i) { + dest[i] = src[i]; + } +} + +cmpresult_t uECC_vli_cmp_unsafe(const uECC_word_t *left, + const uECC_word_t *right, + wordcount_t num_words) +{ + wordcount_t i; + + for (i = num_words - 1; i >= 0; --i) { + if (left[i] > right[i]) { + return 1; + } else if (left[i] < right[i]) { + return -1; + } + } + return 0; +} + +uECC_word_t uECC_vli_equal(const uECC_word_t *left, const uECC_word_t *right, + wordcount_t num_words) +{ + + uECC_word_t diff = 0; + wordcount_t i; + + for (i = num_words - 1; i >= 0; --i) { + diff |= (left[i] ^ right[i]); + } + return !(diff == 0); +} + +uECC_word_t cond_set(uECC_word_t p_true, uECC_word_t p_false, unsigned int cond) +{ + return (p_true*(cond)) | (p_false*(!cond)); +} + +/* Computes result = left - right, returning borrow, in constant time. + * Can modify in place. */ +uECC_word_t uECC_vli_sub(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, wordcount_t num_words) +{ + uECC_word_t borrow = 0; + wordcount_t i; + for (i = 0; i < num_words; ++i) { + uECC_word_t diff = left[i] - right[i] - borrow; + uECC_word_t val = (diff > left[i]); + borrow = cond_set(val, borrow, (diff != left[i])); + + result[i] = diff; + } + return borrow; +} + +/* Computes result = left + right, returning carry, in constant time. + * Can modify in place. */ +static uECC_word_t uECC_vli_add(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, wordcount_t num_words) +{ + uECC_word_t carry = 0; + wordcount_t i; + for (i = 0; i < num_words; ++i) { + uECC_word_t sum = left[i] + right[i] + carry; + uECC_word_t val = (sum < left[i]); + carry = cond_set(val, carry, (sum != left[i])); + result[i] = sum; + } + return carry; +} + +cmpresult_t uECC_vli_cmp(const uECC_word_t *left, const uECC_word_t *right, + wordcount_t num_words) +{ + uECC_word_t tmp[NUM_ECC_WORDS]; + uECC_word_t neg = !!uECC_vli_sub(tmp, left, right, num_words); + uECC_word_t equal = uECC_vli_isZero(tmp, num_words); + return (!equal - 2 * neg); +} + +/* Computes vli = vli >> 1. */ +static void uECC_vli_rshift1(uECC_word_t *vli, wordcount_t num_words) +{ + uECC_word_t *end = vli; + uECC_word_t carry = 0; + + vli += num_words; + while (vli-- > end) { + uECC_word_t temp = *vli; + *vli = (temp >> 1) | carry; + carry = temp << (uECC_WORD_BITS - 1); + } +} + +static void muladd(uECC_word_t a, uECC_word_t b, uECC_word_t *r0, + uECC_word_t *r1, uECC_word_t *r2) +{ + + uECC_dword_t p = (uECC_dword_t)a * b; + uECC_dword_t r01 = ((uECC_dword_t)(*r1) << uECC_WORD_BITS) | *r0; + r01 += p; + *r2 += (r01 < p); + *r1 = r01 >> uECC_WORD_BITS; + *r0 = (uECC_word_t)r01; + +} + +/* Computes result = left * right. Result must be 2 * num_words long. */ +static void uECC_vli_mult(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, wordcount_t num_words) +{ + + uECC_word_t r0 = 0; + uECC_word_t r1 = 0; + uECC_word_t r2 = 0; + wordcount_t i, k; + + /* Compute each digit of result in sequence, maintaining the carries. */ + for (k = 0; k < num_words; ++k) { + + for (i = 0; i <= k; ++i) { + muladd(left[i], right[k - i], &r0, &r1, &r2); + } + + result[k] = r0; + r0 = r1; + r1 = r2; + r2 = 0; + } + + for (k = num_words; k < num_words * 2 - 1; ++k) { + + for (i = (k + 1) - num_words; i < num_words; ++i) { + muladd(left[i], right[k - i], &r0, &r1, &r2); + } + result[k] = r0; + r0 = r1; + r1 = r2; + r2 = 0; + } + result[num_words * 2 - 1] = r0; +} + +void uECC_vli_modAdd(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, const uECC_word_t *mod, + wordcount_t num_words) +{ + uECC_word_t carry = uECC_vli_add(result, left, right, num_words); + if (carry || uECC_vli_cmp_unsafe(mod, result, num_words) != 1) { + /* result > mod (result = mod + remainder), so subtract mod to get + * remainder. */ + uECC_vli_sub(result, result, mod, num_words); + } +} + +void uECC_vli_modSub(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, const uECC_word_t *mod, + wordcount_t num_words) +{ + uECC_word_t l_borrow = uECC_vli_sub(result, left, right, num_words); + if (l_borrow) { + /* In this case, result == -diff == (max int) - diff. Since -x % d == d - x, + * we can get the correct result from result + mod (with overflow). */ + uECC_vli_add(result, result, mod, num_words); + } +} + +/* Computes result = product % mod, where product is 2N words long. */ +/* Currently only designed to work for curve_p or curve_n. */ +void uECC_vli_mmod(uECC_word_t *result, uECC_word_t *product, + const uECC_word_t *mod, wordcount_t num_words) +{ + uECC_word_t mod_multiple[2 * NUM_ECC_WORDS]; + uECC_word_t tmp[2 * NUM_ECC_WORDS]; + uECC_word_t *v[2] = {tmp, product}; + uECC_word_t index; + + /* Shift mod so its highest set bit is at the maximum position. */ + bitcount_t shift = (num_words * 2 * uECC_WORD_BITS) - + uECC_vli_numBits(mod, num_words); + wordcount_t word_shift = shift / uECC_WORD_BITS; + wordcount_t bit_shift = shift % uECC_WORD_BITS; + uECC_word_t carry = 0; + uECC_vli_clear(mod_multiple, word_shift); + if (bit_shift > 0) { + for(index = 0; index < (uECC_word_t)num_words; ++index) { + mod_multiple[word_shift + index] = (mod[index] << bit_shift) | carry; + carry = mod[index] >> (uECC_WORD_BITS - bit_shift); + } + } else { + uECC_vli_set(mod_multiple + word_shift, mod, num_words); + } + + for (index = 1; shift >= 0; --shift) { + uECC_word_t borrow = 0; + wordcount_t i; + for (i = 0; i < num_words * 2; ++i) { + uECC_word_t diff = v[index][i] - mod_multiple[i] - borrow; + if (diff != v[index][i]) { + borrow = (diff > v[index][i]); + } + v[1 - index][i] = diff; + } + /* Swap the index if there was no borrow */ + index = !(index ^ borrow); + uECC_vli_rshift1(mod_multiple, num_words); + mod_multiple[num_words - 1] |= mod_multiple[num_words] << + (uECC_WORD_BITS - 1); + uECC_vli_rshift1(mod_multiple + num_words, num_words); + } + uECC_vli_set(result, v[index], num_words); +} + +void uECC_vli_modMult(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, const uECC_word_t *mod, + wordcount_t num_words) +{ + uECC_word_t product[2 * NUM_ECC_WORDS]; + uECC_vli_mult(product, left, right, num_words); + uECC_vli_mmod(result, product, mod, num_words); +} + +void uECC_vli_modMult_fast(uECC_word_t *result, const uECC_word_t *left, + const uECC_word_t *right, uECC_Curve curve) +{ + uECC_word_t product[2 * NUM_ECC_WORDS]; + uECC_vli_mult(product, left, right, curve->num_words); + + curve->mmod_fast(result, product); +} + +static void uECC_vli_modSquare_fast(uECC_word_t *result, + const uECC_word_t *left, + uECC_Curve curve) +{ + uECC_vli_modMult_fast(result, left, left, curve); +} + + +#define EVEN(vli) (!(vli[0] & 1)) + +static void vli_modInv_update(uECC_word_t *uv, + const uECC_word_t *mod, + wordcount_t num_words) +{ + + uECC_word_t carry = 0; + + if (!EVEN(uv)) { + carry = uECC_vli_add(uv, uv, mod, num_words); + } + uECC_vli_rshift1(uv, num_words); + if (carry) { + uv[num_words - 1] |= HIGH_BIT_SET; + } +} + +void uECC_vli_modInv(uECC_word_t *result, const uECC_word_t *input, + const uECC_word_t *mod, wordcount_t num_words) +{ + uECC_word_t a[NUM_ECC_WORDS], b[NUM_ECC_WORDS]; + uECC_word_t u[NUM_ECC_WORDS], v[NUM_ECC_WORDS]; + cmpresult_t cmpResult; + + if (uECC_vli_isZero(input, num_words)) { + uECC_vli_clear(result, num_words); + return; + } + + uECC_vli_set(a, input, num_words); + uECC_vli_set(b, mod, num_words); + uECC_vli_clear(u, num_words); + u[0] = 1; + uECC_vli_clear(v, num_words); + while ((cmpResult = uECC_vli_cmp_unsafe(a, b, num_words)) != 0) { + if (EVEN(a)) { + uECC_vli_rshift1(a, num_words); + vli_modInv_update(u, mod, num_words); + } else if (EVEN(b)) { + uECC_vli_rshift1(b, num_words); + vli_modInv_update(v, mod, num_words); + } else if (cmpResult > 0) { + uECC_vli_sub(a, a, b, num_words); + uECC_vli_rshift1(a, num_words); + if (uECC_vli_cmp_unsafe(u, v, num_words) < 0) { + uECC_vli_add(u, u, mod, num_words); + } + uECC_vli_sub(u, u, v, num_words); + vli_modInv_update(u, mod, num_words); + } else { + uECC_vli_sub(b, b, a, num_words); + uECC_vli_rshift1(b, num_words); + if (uECC_vli_cmp_unsafe(v, u, num_words) < 0) { + uECC_vli_add(v, v, mod, num_words); + } + uECC_vli_sub(v, v, u, num_words); + vli_modInv_update(v, mod, num_words); + } + } + uECC_vli_set(result, u, num_words); +} + +/* ------ Point operations ------ */ + +void double_jacobian_default(uECC_word_t * X1, uECC_word_t * Y1, + uECC_word_t * Z1, uECC_Curve curve) +{ + /* t1 = X, t2 = Y, t3 = Z */ + uECC_word_t t4[NUM_ECC_WORDS]; + uECC_word_t t5[NUM_ECC_WORDS]; + wordcount_t num_words = curve->num_words; + + if (uECC_vli_isZero(Z1, num_words)) { + return; + } + + uECC_vli_modSquare_fast(t4, Y1, curve); /* t4 = y1^2 */ + uECC_vli_modMult_fast(t5, X1, t4, curve); /* t5 = x1*y1^2 = A */ + uECC_vli_modSquare_fast(t4, t4, curve); /* t4 = y1^4 */ + uECC_vli_modMult_fast(Y1, Y1, Z1, curve); /* t2 = y1*z1 = z3 */ + uECC_vli_modSquare_fast(Z1, Z1, curve); /* t3 = z1^2 */ + + uECC_vli_modAdd(X1, X1, Z1, curve->p, num_words); /* t1 = x1 + z1^2 */ + uECC_vli_modAdd(Z1, Z1, Z1, curve->p, num_words); /* t3 = 2*z1^2 */ + uECC_vli_modSub(Z1, X1, Z1, curve->p, num_words); /* t3 = x1 - z1^2 */ + uECC_vli_modMult_fast(X1, X1, Z1, curve); /* t1 = x1^2 - z1^4 */ + + uECC_vli_modAdd(Z1, X1, X1, curve->p, num_words); /* t3 = 2*(x1^2 - z1^4) */ + uECC_vli_modAdd(X1, X1, Z1, curve->p, num_words); /* t1 = 3*(x1^2 - z1^4) */ + if (uECC_vli_testBit(X1, 0)) { + uECC_word_t l_carry = uECC_vli_add(X1, X1, curve->p, num_words); + uECC_vli_rshift1(X1, num_words); + X1[num_words - 1] |= l_carry << (uECC_WORD_BITS - 1); + } else { + uECC_vli_rshift1(X1, num_words); + } + + /* t1 = 3/2*(x1^2 - z1^4) = B */ + uECC_vli_modSquare_fast(Z1, X1, curve); /* t3 = B^2 */ + uECC_vli_modSub(Z1, Z1, t5, curve->p, num_words); /* t3 = B^2 - A */ + uECC_vli_modSub(Z1, Z1, t5, curve->p, num_words); /* t3 = B^2 - 2A = x3 */ + uECC_vli_modSub(t5, t5, Z1, curve->p, num_words); /* t5 = A - x3 */ + uECC_vli_modMult_fast(X1, X1, t5, curve); /* t1 = B * (A - x3) */ + /* t4 = B * (A - x3) - y1^4 = y3: */ + uECC_vli_modSub(t4, X1, t4, curve->p, num_words); + + uECC_vli_set(X1, Z1, num_words); + uECC_vli_set(Z1, Y1, num_words); + uECC_vli_set(Y1, t4, num_words); +} + +void x_side_default(uECC_word_t *result, + const uECC_word_t *x, + uECC_Curve curve) +{ + uECC_word_t _3[NUM_ECC_WORDS] = {3}; /* -a = 3 */ + wordcount_t num_words = curve->num_words; + + uECC_vli_modSquare_fast(result, x, curve); /* r = x^2 */ + uECC_vli_modSub(result, result, _3, curve->p, num_words); /* r = x^2 - 3 */ + uECC_vli_modMult_fast(result, result, x, curve); /* r = x^3 - 3x */ + /* r = x^3 - 3x + b: */ + uECC_vli_modAdd(result, result, curve->b, curve->p, num_words); +} + +uECC_Curve uECC_secp256r1(void) +{ + return &curve_secp256r1; +} + +void vli_mmod_fast_secp256r1(unsigned int *result, unsigned int*product) +{ + unsigned int tmp[NUM_ECC_WORDS]; + int carry; + + /* t */ + uECC_vli_set(result, product, NUM_ECC_WORDS); + + /* s1 */ + tmp[0] = tmp[1] = tmp[2] = 0; + tmp[3] = product[11]; + tmp[4] = product[12]; + tmp[5] = product[13]; + tmp[6] = product[14]; + tmp[7] = product[15]; + carry = uECC_vli_add(tmp, tmp, tmp, NUM_ECC_WORDS); + carry += uECC_vli_add(result, result, tmp, NUM_ECC_WORDS); + + /* s2 */ + tmp[3] = product[12]; + tmp[4] = product[13]; + tmp[5] = product[14]; + tmp[6] = product[15]; + tmp[7] = 0; + carry += uECC_vli_add(tmp, tmp, tmp, NUM_ECC_WORDS); + carry += uECC_vli_add(result, result, tmp, NUM_ECC_WORDS); + + /* s3 */ + tmp[0] = product[8]; + tmp[1] = product[9]; + tmp[2] = product[10]; + tmp[3] = tmp[4] = tmp[5] = 0; + tmp[6] = product[14]; + tmp[7] = product[15]; + carry += uECC_vli_add(result, result, tmp, NUM_ECC_WORDS); + + /* s4 */ + tmp[0] = product[9]; + tmp[1] = product[10]; + tmp[2] = product[11]; + tmp[3] = product[13]; + tmp[4] = product[14]; + tmp[5] = product[15]; + tmp[6] = product[13]; + tmp[7] = product[8]; + carry += uECC_vli_add(result, result, tmp, NUM_ECC_WORDS); + + /* d1 */ + tmp[0] = product[11]; + tmp[1] = product[12]; + tmp[2] = product[13]; + tmp[3] = tmp[4] = tmp[5] = 0; + tmp[6] = product[8]; + tmp[7] = product[10]; + carry -= uECC_vli_sub(result, result, tmp, NUM_ECC_WORDS); + + /* d2 */ + tmp[0] = product[12]; + tmp[1] = product[13]; + tmp[2] = product[14]; + tmp[3] = product[15]; + tmp[4] = tmp[5] = 0; + tmp[6] = product[9]; + tmp[7] = product[11]; + carry -= uECC_vli_sub(result, result, tmp, NUM_ECC_WORDS); + + /* d3 */ + tmp[0] = product[13]; + tmp[1] = product[14]; + tmp[2] = product[15]; + tmp[3] = product[8]; + tmp[4] = product[9]; + tmp[5] = product[10]; + tmp[6] = 0; + tmp[7] = product[12]; + carry -= uECC_vli_sub(result, result, tmp, NUM_ECC_WORDS); + + /* d4 */ + tmp[0] = product[14]; + tmp[1] = product[15]; + tmp[2] = 0; + tmp[3] = product[9]; + tmp[4] = product[10]; + tmp[5] = product[11]; + tmp[6] = 0; + tmp[7] = product[13]; + carry -= uECC_vli_sub(result, result, tmp, NUM_ECC_WORDS); + + if (carry < 0) { + do { + carry += uECC_vli_add(result, result, curve_secp256r1.p, NUM_ECC_WORDS); + } + while (carry < 0); + } else { + while (carry || + uECC_vli_cmp_unsafe(curve_secp256r1.p, result, NUM_ECC_WORDS) != 1) { + carry -= uECC_vli_sub(result, result, curve_secp256r1.p, NUM_ECC_WORDS); + } + } +} + +uECC_word_t EccPoint_isZero(const uECC_word_t *point, uECC_Curve curve) +{ + return uECC_vli_isZero(point, curve->num_words * 2); +} + +void apply_z(uECC_word_t * X1, uECC_word_t * Y1, const uECC_word_t * const Z, + uECC_Curve curve) +{ + uECC_word_t t1[NUM_ECC_WORDS]; + + uECC_vli_modSquare_fast(t1, Z, curve); /* z^2 */ + uECC_vli_modMult_fast(X1, X1, t1, curve); /* x1 * z^2 */ + uECC_vli_modMult_fast(t1, t1, Z, curve); /* z^3 */ + uECC_vli_modMult_fast(Y1, Y1, t1, curve); /* y1 * z^3 */ +} + +/* P = (x1, y1) => 2P, (x2, y2) => P' */ +static void XYcZ_initial_double(uECC_word_t * X1, uECC_word_t * Y1, + uECC_word_t * X2, uECC_word_t * Y2, + const uECC_word_t * const initial_Z, + uECC_Curve curve) +{ + uECC_word_t z[NUM_ECC_WORDS]; + wordcount_t num_words = curve->num_words; + if (initial_Z) { + uECC_vli_set(z, initial_Z, num_words); + } else { + uECC_vli_clear(z, num_words); + z[0] = 1; + } + + uECC_vli_set(X2, X1, num_words); + uECC_vli_set(Y2, Y1, num_words); + + apply_z(X1, Y1, z, curve); + curve->double_jacobian(X1, Y1, z, curve); + apply_z(X2, Y2, z, curve); +} + +void XYcZ_add(uECC_word_t * X1, uECC_word_t * Y1, + uECC_word_t * X2, uECC_word_t * Y2, + uECC_Curve curve) +{ + /* t1 = X1, t2 = Y1, t3 = X2, t4 = Y2 */ + uECC_word_t t5[NUM_ECC_WORDS]; + wordcount_t num_words = curve->num_words; + + uECC_vli_modSub(t5, X2, X1, curve->p, num_words); /* t5 = x2 - x1 */ + uECC_vli_modSquare_fast(t5, t5, curve); /* t5 = (x2 - x1)^2 = A */ + uECC_vli_modMult_fast(X1, X1, t5, curve); /* t1 = x1*A = B */ + uECC_vli_modMult_fast(X2, X2, t5, curve); /* t3 = x2*A = C */ + uECC_vli_modSub(Y2, Y2, Y1, curve->p, num_words); /* t4 = y2 - y1 */ + uECC_vli_modSquare_fast(t5, Y2, curve); /* t5 = (y2 - y1)^2 = D */ + + uECC_vli_modSub(t5, t5, X1, curve->p, num_words); /* t5 = D - B */ + uECC_vli_modSub(t5, t5, X2, curve->p, num_words); /* t5 = D - B - C = x3 */ + uECC_vli_modSub(X2, X2, X1, curve->p, num_words); /* t3 = C - B */ + uECC_vli_modMult_fast(Y1, Y1, X2, curve); /* t2 = y1*(C - B) */ + uECC_vli_modSub(X2, X1, t5, curve->p, num_words); /* t3 = B - x3 */ + uECC_vli_modMult_fast(Y2, Y2, X2, curve); /* t4 = (y2 - y1)*(B - x3) */ + uECC_vli_modSub(Y2, Y2, Y1, curve->p, num_words); /* t4 = y3 */ + + uECC_vli_set(X2, t5, num_words); +} + +/* Input P = (x1, y1, Z), Q = (x2, y2, Z) + Output P + Q = (x3, y3, Z3), P - Q = (x3', y3', Z3) + or P => P - Q, Q => P + Q + */ +static void XYcZ_addC(uECC_word_t * X1, uECC_word_t * Y1, + uECC_word_t * X2, uECC_word_t * Y2, + uECC_Curve curve) +{ + /* t1 = X1, t2 = Y1, t3 = X2, t4 = Y2 */ + uECC_word_t t5[NUM_ECC_WORDS]; + uECC_word_t t6[NUM_ECC_WORDS]; + uECC_word_t t7[NUM_ECC_WORDS]; + wordcount_t num_words = curve->num_words; + + uECC_vli_modSub(t5, X2, X1, curve->p, num_words); /* t5 = x2 - x1 */ + uECC_vli_modSquare_fast(t5, t5, curve); /* t5 = (x2 - x1)^2 = A */ + uECC_vli_modMult_fast(X1, X1, t5, curve); /* t1 = x1*A = B */ + uECC_vli_modMult_fast(X2, X2, t5, curve); /* t3 = x2*A = C */ + uECC_vli_modAdd(t5, Y2, Y1, curve->p, num_words); /* t5 = y2 + y1 */ + uECC_vli_modSub(Y2, Y2, Y1, curve->p, num_words); /* t4 = y2 - y1 */ + + uECC_vli_modSub(t6, X2, X1, curve->p, num_words); /* t6 = C - B */ + uECC_vli_modMult_fast(Y1, Y1, t6, curve); /* t2 = y1 * (C - B) = E */ + uECC_vli_modAdd(t6, X1, X2, curve->p, num_words); /* t6 = B + C */ + uECC_vli_modSquare_fast(X2, Y2, curve); /* t3 = (y2 - y1)^2 = D */ + uECC_vli_modSub(X2, X2, t6, curve->p, num_words); /* t3 = D - (B + C) = x3 */ + + uECC_vli_modSub(t7, X1, X2, curve->p, num_words); /* t7 = B - x3 */ + uECC_vli_modMult_fast(Y2, Y2, t7, curve); /* t4 = (y2 - y1)*(B - x3) */ + /* t4 = (y2 - y1)*(B - x3) - E = y3: */ + uECC_vli_modSub(Y2, Y2, Y1, curve->p, num_words); + + uECC_vli_modSquare_fast(t7, t5, curve); /* t7 = (y2 + y1)^2 = F */ + uECC_vli_modSub(t7, t7, t6, curve->p, num_words); /* t7 = F - (B + C) = x3' */ + uECC_vli_modSub(t6, t7, X1, curve->p, num_words); /* t6 = x3' - B */ + uECC_vli_modMult_fast(t6, t6, t5, curve); /* t6 = (y2+y1)*(x3' - B) */ + /* t2 = (y2+y1)*(x3' - B) - E = y3': */ + uECC_vli_modSub(Y1, t6, Y1, curve->p, num_words); + + uECC_vli_set(X1, t7, num_words); +} + +void EccPoint_mult(uECC_word_t * result, const uECC_word_t * point, + const uECC_word_t * scalar, + const uECC_word_t * initial_Z, + bitcount_t num_bits, uECC_Curve curve) +{ + /* R0 and R1 */ + uECC_word_t Rx[2][NUM_ECC_WORDS]; + uECC_word_t Ry[2][NUM_ECC_WORDS]; + uECC_word_t z[NUM_ECC_WORDS]; + bitcount_t i; + uECC_word_t nb; + wordcount_t num_words = curve->num_words; + + uECC_vli_set(Rx[1], point, num_words); + uECC_vli_set(Ry[1], point + num_words, num_words); + + XYcZ_initial_double(Rx[1], Ry[1], Rx[0], Ry[0], initial_Z, curve); + + for (i = num_bits - 2; i > 0; --i) { + nb = !uECC_vli_testBit(scalar, i); + XYcZ_addC(Rx[1 - nb], Ry[1 - nb], Rx[nb], Ry[nb], curve); + XYcZ_add(Rx[nb], Ry[nb], Rx[1 - nb], Ry[1 - nb], curve); + } + + nb = !uECC_vli_testBit(scalar, 0); + XYcZ_addC(Rx[1 - nb], Ry[1 - nb], Rx[nb], Ry[nb], curve); + + /* Find final 1/Z value. */ + uECC_vli_modSub(z, Rx[1], Rx[0], curve->p, num_words); /* X1 - X0 */ + uECC_vli_modMult_fast(z, z, Ry[1 - nb], curve); /* Yb * (X1 - X0) */ + uECC_vli_modMult_fast(z, z, point, curve); /* xP * Yb * (X1 - X0) */ + uECC_vli_modInv(z, z, curve->p, num_words); /* 1 / (xP * Yb * (X1 - X0))*/ + /* yP / (xP * Yb * (X1 - X0)) */ + uECC_vli_modMult_fast(z, z, point + num_words, curve); + /* Xb * yP / (xP * Yb * (X1 - X0)) */ + uECC_vli_modMult_fast(z, z, Rx[1 - nb], curve); + /* End 1/Z calculation */ + + XYcZ_add(Rx[nb], Ry[nb], Rx[1 - nb], Ry[1 - nb], curve); + apply_z(Rx[0], Ry[0], z, curve); + + uECC_vli_set(result, Rx[0], num_words); + uECC_vli_set(result + num_words, Ry[0], num_words); +} + +uECC_word_t regularize_k(const uECC_word_t * const k, uECC_word_t *k0, + uECC_word_t *k1, uECC_Curve curve) +{ + + wordcount_t num_n_words = BITS_TO_WORDS(curve->num_n_bits); + + bitcount_t num_n_bits = curve->num_n_bits; + + uECC_word_t carry = uECC_vli_add(k0, k, curve->n, num_n_words) || + (num_n_bits < ((bitcount_t)num_n_words * uECC_WORD_SIZE * 8) && + uECC_vli_testBit(k0, num_n_bits)); + + uECC_vli_add(k1, k0, curve->n, num_n_words); + + return carry; +} + +uECC_word_t EccPoint_compute_public_key(uECC_word_t *result, + uECC_word_t *private_key, + uECC_Curve curve) +{ + + uECC_word_t tmp1[NUM_ECC_WORDS]; + uECC_word_t tmp2[NUM_ECC_WORDS]; + uECC_word_t *p2[2] = {tmp1, tmp2}; + uECC_word_t carry; + + /* Regularize the bitcount for the private key so that attackers cannot + * use a side channel attack to learn the number of leading zeros. */ + carry = regularize_k(private_key, tmp1, tmp2, curve); + + EccPoint_mult(result, curve->G, p2[!carry], 0, curve->num_n_bits + 1, curve); + + if (EccPoint_isZero(result, curve)) { + return 0; + } + return 1; +} + +/* Converts an integer in uECC native format to big-endian bytes. */ +void uECC_vli_nativeToBytes(uint8_t *bytes, int num_bytes, + const unsigned int *native) +{ + wordcount_t i; + for (i = 0; i < num_bytes; ++i) { + unsigned b = num_bytes - 1 - i; + bytes[i] = native[b / uECC_WORD_SIZE] >> (8 * (b % uECC_WORD_SIZE)); + } +} + +/* Converts big-endian bytes to an integer in uECC native format. */ +void uECC_vli_bytesToNative(unsigned int *native, const uint8_t *bytes, + int num_bytes) +{ + wordcount_t i; + uECC_vli_clear(native, (num_bytes + (uECC_WORD_SIZE - 1)) / uECC_WORD_SIZE); + for (i = 0; i < num_bytes; ++i) { + unsigned b = num_bytes - 1 - i; + native[b / uECC_WORD_SIZE] |= + (uECC_word_t)bytes[i] << (8 * (b % uECC_WORD_SIZE)); + } +} + +int uECC_generate_random_int(uECC_word_t *random, const uECC_word_t *top, + wordcount_t num_words) +{ + uECC_word_t mask = (uECC_word_t)-1; + uECC_word_t tries; + bitcount_t num_bits = uECC_vli_numBits(top, num_words); + + if (!g_rng_function) { + return 0; + } + + for (tries = 0; tries < uECC_RNG_MAX_TRIES; ++tries) { + if (!g_rng_function((uint8_t *)random, num_words * uECC_WORD_SIZE)) { + return 0; + } + random[num_words - 1] &= + mask >> ((bitcount_t)(num_words * uECC_WORD_SIZE * 8 - num_bits)); + if (!uECC_vli_isZero(random, num_words) && + uECC_vli_cmp(top, random, num_words) == 1) { + return 1; + } + } + return 0; +} + + +int uECC_valid_point(const uECC_word_t *point, uECC_Curve curve) +{ + uECC_word_t tmp1[NUM_ECC_WORDS]; + uECC_word_t tmp2[NUM_ECC_WORDS]; + wordcount_t num_words = curve->num_words; + + /* The point at infinity is invalid. */ + if (EccPoint_isZero(point, curve)) { + return -1; + } + + /* x and y must be smaller than p. */ + if (uECC_vli_cmp_unsafe(curve->p, point, num_words) != 1 || + uECC_vli_cmp_unsafe(curve->p, point + num_words, num_words) != 1) { + return -2; + } + + uECC_vli_modSquare_fast(tmp1, point + num_words, curve); + curve->x_side(tmp2, point, curve); /* tmp2 = x^3 + ax + b */ + + /* Make sure that y^2 == x^3 + ax + b */ + if (uECC_vli_equal(tmp1, tmp2, num_words) != 0) + return -3; + + return 0; +} + +int uECC_valid_public_key(const uint8_t *public_key, uECC_Curve curve) +{ + + uECC_word_t _public[NUM_ECC_WORDS * 2]; + + uECC_vli_bytesToNative(_public, public_key, curve->num_bytes); + uECC_vli_bytesToNative( + _public + curve->num_words, + public_key + curve->num_bytes, + curve->num_bytes); + + if (uECC_vli_cmp_unsafe(_public, curve->G, NUM_ECC_WORDS * 2) == 0) { + return -4; + } + + return uECC_valid_point(_public, curve); +} + +int uECC_compute_public_key(const uint8_t *private_key, uint8_t *public_key, + uECC_Curve curve) +{ + + uECC_word_t _private[NUM_ECC_WORDS]; + uECC_word_t _public[NUM_ECC_WORDS * 2]; + + uECC_vli_bytesToNative( + _private, + private_key, + BITS_TO_BYTES(curve->num_n_bits)); + + /* Make sure the private key is in the range [1, n-1]. */ + if (uECC_vli_isZero(_private, BITS_TO_WORDS(curve->num_n_bits))) { + return 0; + } + + if (uECC_vli_cmp(curve->n, _private, BITS_TO_WORDS(curve->num_n_bits)) != 1) { + return 0; + } + + /* Compute public key. */ + if (!EccPoint_compute_public_key(_public, _private, curve)) { + return 0; + } + + uECC_vli_nativeToBytes(public_key, curve->num_bytes, _public); + uECC_vli_nativeToBytes( + public_key + + curve->num_bytes, curve->num_bytes, _public + curve->num_words); + return 1; +} + + + diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc_dh.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc_dh.c new file mode 100644 index 0000000..e5257d2 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc_dh.c @@ -0,0 +1,200 @@ +/* ec_dh.c - TinyCrypt implementation of EC-DH */ + +/* + * Copyright (c) 2014, Kenneth MacKay + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#include +#include +#include +#include + +#if default_RNG_defined +static uECC_RNG_Function g_rng_function = &default_CSPRNG; +#else +static uECC_RNG_Function g_rng_function = 0; +#endif + +int uECC_make_key_with_d(uint8_t *public_key, uint8_t *private_key, + unsigned int *d, uECC_Curve curve) +{ + + uECC_word_t _private[NUM_ECC_WORDS]; + uECC_word_t _public[NUM_ECC_WORDS * 2]; + + /* This function is designed for test purposes-only (such as validating NIST + * test vectors) as it uses a provided value for d instead of generating + * it uniformly at random. */ + memcpy (_private, d, NUM_ECC_BYTES); + + /* Computing public-key from private: */ + if (EccPoint_compute_public_key(_public, _private, curve)) { + + /* Converting buffers to correct bit order: */ + uECC_vli_nativeToBytes(private_key, + BITS_TO_BYTES(curve->num_n_bits), + _private); + uECC_vli_nativeToBytes(public_key, + curve->num_bytes, + _public); + uECC_vli_nativeToBytes(public_key + curve->num_bytes, + curve->num_bytes, + _public + curve->num_words); + + /* erasing temporary buffer used to store secret: */ + memset(_private, 0, NUM_ECC_BYTES); + + return 1; + } + return 0; +} + +int uECC_make_key(uint8_t *public_key, uint8_t *private_key, uECC_Curve curve) +{ + + uECC_word_t _random[NUM_ECC_WORDS * 2]; + uECC_word_t _private[NUM_ECC_WORDS]; + uECC_word_t _public[NUM_ECC_WORDS * 2]; + uECC_word_t tries; + + for (tries = 0; tries < uECC_RNG_MAX_TRIES; ++tries) { + /* Generating _private uniformly at random: */ + uECC_RNG_Function rng_function = uECC_get_rng(); + if (!rng_function || + !rng_function((uint8_t *)_random, 2 * NUM_ECC_WORDS*uECC_WORD_SIZE)) { + return 0; + } + + /* computing modular reduction of _random (see FIPS 186.4 B.4.1): */ + uECC_vli_mmod(_private, _random, curve->n, BITS_TO_WORDS(curve->num_n_bits)); + + /* Computing public-key from private: */ + if (EccPoint_compute_public_key(_public, _private, curve)) { + + /* Converting buffers to correct bit order: */ + uECC_vli_nativeToBytes(private_key, + BITS_TO_BYTES(curve->num_n_bits), + _private); + uECC_vli_nativeToBytes(public_key, + curve->num_bytes, + _public); + uECC_vli_nativeToBytes(public_key + curve->num_bytes, + curve->num_bytes, + _public + curve->num_words); + + /* erasing temporary buffer that stored secret: */ + memset(_private, 0, NUM_ECC_BYTES); + + return 1; + } + } + return 0; +} + +int uECC_shared_secret(const uint8_t *public_key, const uint8_t *private_key, + uint8_t *secret, uECC_Curve curve) +{ + + uECC_word_t _public[NUM_ECC_WORDS * 2]; + uECC_word_t _private[NUM_ECC_WORDS]; + + uECC_word_t tmp[NUM_ECC_WORDS]; + uECC_word_t *p2[2] = {_private, tmp}; + uECC_word_t *initial_Z = 0; + uECC_word_t carry; + wordcount_t num_words = curve->num_words; + wordcount_t num_bytes = curve->num_bytes; + int r; + + /* Converting buffers to correct bit order: */ + uECC_vli_bytesToNative(_private, + private_key, + BITS_TO_BYTES(curve->num_n_bits)); + uECC_vli_bytesToNative(_public, + public_key, + num_bytes); + uECC_vli_bytesToNative(_public + num_words, + public_key + num_bytes, + num_bytes); + + /* Regularize the bitcount for the private key so that attackers cannot use a + * side channel attack to learn the number of leading zeros. */ + carry = regularize_k(_private, _private, tmp, curve); + + /* If an RNG function was specified, try to get a random initial Z value to + * improve protection against side-channel attacks. */ + if (g_rng_function) { + if (!uECC_generate_random_int(p2[carry], curve->p, num_words)) { + r = 0; + goto clear_and_out; + } + initial_Z = p2[carry]; + } + + EccPoint_mult(_public, _public, p2[!carry], initial_Z, curve->num_n_bits + 1, + curve); + + uECC_vli_nativeToBytes(secret, num_bytes, _public); + r = !EccPoint_isZero(_public, curve); + +clear_and_out: + /* erasing temporary buffer used to store secret: */ + memset(p2, 0, sizeof(p2)); + __asm__ __volatile__("" :: "g"(p2) : "memory"); + memset(tmp, 0, sizeof(tmp)); + __asm__ __volatile__("" :: "g"(tmp) : "memory"); + memset(_private, 0, sizeof(_private)); + __asm__ __volatile__("" :: "g"(_private) : "memory"); + + return r; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc_dsa.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc_dsa.c new file mode 100644 index 0000000..064dfe5 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc_dsa.c @@ -0,0 +1,295 @@ +/* ec_dsa.c - TinyCrypt implementation of EC-DSA */ + +/* Copyright (c) 2014, Kenneth MacKay + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE.*/ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +#if default_RNG_defined +static uECC_RNG_Function g_rng_function = &default_CSPRNG; +#else +static uECC_RNG_Function g_rng_function = 0; +#endif + +static void bits2int(uECC_word_t *native, const uint8_t *bits, + unsigned bits_size, uECC_Curve curve) +{ + unsigned num_n_bytes = BITS_TO_BYTES(curve->num_n_bits); + unsigned num_n_words = BITS_TO_WORDS(curve->num_n_bits); + int shift; + uECC_word_t carry; + uECC_word_t *ptr; + + if (bits_size > num_n_bytes) { + bits_size = num_n_bytes; + } + + uECC_vli_clear(native, num_n_words); + uECC_vli_bytesToNative(native, bits, bits_size); + if (bits_size * 8 <= (unsigned)curve->num_n_bits) { + return; + } + shift = bits_size * 8 - curve->num_n_bits; + carry = 0; + ptr = native + num_n_words; + while (ptr-- > native) { + uECC_word_t temp = *ptr; + *ptr = (temp >> shift) | carry; + carry = temp << (uECC_WORD_BITS - shift); + } + + /* Reduce mod curve_n */ + if (uECC_vli_cmp_unsafe(curve->n, native, num_n_words) != 1) { + uECC_vli_sub(native, native, curve->n, num_n_words); + } +} + +int uECC_sign_with_k(const uint8_t *private_key, const uint8_t *message_hash, + unsigned hash_size, uECC_word_t *k, uint8_t *signature, + uECC_Curve curve) +{ + + uECC_word_t tmp[NUM_ECC_WORDS]; + uECC_word_t s[NUM_ECC_WORDS]; + uECC_word_t *k2[2] = {tmp, s}; + uECC_word_t p[NUM_ECC_WORDS * 2]; + uECC_word_t carry; + wordcount_t num_words = curve->num_words; + wordcount_t num_n_words = BITS_TO_WORDS(curve->num_n_bits); + bitcount_t num_n_bits = curve->num_n_bits; + + /* Make sure 0 < k < curve_n */ + if (uECC_vli_isZero(k, num_words) || + uECC_vli_cmp(curve->n, k, num_n_words) != 1) { + return 0; + } + + carry = regularize_k(k, tmp, s, curve); + EccPoint_mult(p, curve->G, k2[!carry], 0, num_n_bits + 1, curve); + if (uECC_vli_isZero(p, num_words)) { + return 0; + } + + /* If an RNG function was specified, get a random number + to prevent side channel analysis of k. */ + if (!g_rng_function) { + uECC_vli_clear(tmp, num_n_words); + tmp[0] = 1; + } + else if (!uECC_generate_random_int(tmp, curve->n, num_n_words)) { + return 0; + } + + /* Prevent side channel analysis of uECC_vli_modInv() to determine + bits of k / the private key by premultiplying by a random number */ + uECC_vli_modMult(k, k, tmp, curve->n, num_n_words); /* k' = rand * k */ + uECC_vli_modInv(k, k, curve->n, num_n_words); /* k = 1 / k' */ + uECC_vli_modMult(k, k, tmp, curve->n, num_n_words); /* k = 1 / k */ + + uECC_vli_nativeToBytes(signature, curve->num_bytes, p); /* store r */ + + /* tmp = d: */ + uECC_vli_bytesToNative(tmp, private_key, BITS_TO_BYTES(curve->num_n_bits)); + + s[num_n_words - 1] = 0; + uECC_vli_set(s, p, num_words); + uECC_vli_modMult(s, tmp, s, curve->n, num_n_words); /* s = r*d */ + + bits2int(tmp, message_hash, hash_size, curve); + uECC_vli_modAdd(s, tmp, s, curve->n, num_n_words); /* s = e + r*d */ + uECC_vli_modMult(s, s, k, curve->n, num_n_words); /* s = (e + r*d) / k */ + if (uECC_vli_numBits(s, num_n_words) > (bitcount_t)curve->num_bytes * 8) { + return 0; + } + + uECC_vli_nativeToBytes(signature + curve->num_bytes, curve->num_bytes, s); + return 1; +} + +int uECC_sign(const uint8_t *private_key, const uint8_t *message_hash, + unsigned hash_size, uint8_t *signature, uECC_Curve curve) +{ + uECC_word_t _random[2*NUM_ECC_WORDS]; + uECC_word_t k[NUM_ECC_WORDS]; + uECC_word_t tries; + + for (tries = 0; tries < uECC_RNG_MAX_TRIES; ++tries) { + /* Generating _random uniformly at random: */ + uECC_RNG_Function rng_function = uECC_get_rng(); + if (!rng_function || + !rng_function((uint8_t *)_random, 2*NUM_ECC_WORDS*uECC_WORD_SIZE)) { + return 0; + } + + // computing k as modular reduction of _random (see FIPS 186.4 B.5.1): + uECC_vli_mmod(k, _random, curve->n, BITS_TO_WORDS(curve->num_n_bits)); + + if (uECC_sign_with_k(private_key, message_hash, hash_size, k, signature, + curve)) { + return 1; + } + } + return 0; +} + +static bitcount_t smax(bitcount_t a, bitcount_t b) +{ + return (a > b ? a : b); +} + +int uECC_verify(const uint8_t *public_key, const uint8_t *message_hash, + unsigned hash_size, const uint8_t *signature, + uECC_Curve curve) +{ + + uECC_word_t u1[NUM_ECC_WORDS], u2[NUM_ECC_WORDS]; + uECC_word_t z[NUM_ECC_WORDS]; + uECC_word_t sum[NUM_ECC_WORDS * 2]; + uECC_word_t rx[NUM_ECC_WORDS]; + uECC_word_t ry[NUM_ECC_WORDS]; + uECC_word_t tx[NUM_ECC_WORDS]; + uECC_word_t ty[NUM_ECC_WORDS]; + uECC_word_t tz[NUM_ECC_WORDS]; + const uECC_word_t *points[4]; + const uECC_word_t *point; + bitcount_t num_bits; + bitcount_t i; + + uECC_word_t _public[NUM_ECC_WORDS * 2]; + uECC_word_t r[NUM_ECC_WORDS], s[NUM_ECC_WORDS]; + wordcount_t num_words = curve->num_words; + wordcount_t num_n_words = BITS_TO_WORDS(curve->num_n_bits); + + rx[num_n_words - 1] = 0; + r[num_n_words - 1] = 0; + s[num_n_words - 1] = 0; + + uECC_vli_bytesToNative(_public, public_key, curve->num_bytes); + uECC_vli_bytesToNative(_public + num_words, public_key + curve->num_bytes, + curve->num_bytes); + uECC_vli_bytesToNative(r, signature, curve->num_bytes); + uECC_vli_bytesToNative(s, signature + curve->num_bytes, curve->num_bytes); + + /* r, s must not be 0. */ + if (uECC_vli_isZero(r, num_words) || uECC_vli_isZero(s, num_words)) { + return 0; + } + + /* r, s must be < n. */ + if (uECC_vli_cmp_unsafe(curve->n, r, num_n_words) != 1 || + uECC_vli_cmp_unsafe(curve->n, s, num_n_words) != 1) { + return 0; + } + + /* Calculate u1 and u2. */ + uECC_vli_modInv(z, s, curve->n, num_n_words); /* z = 1/s */ + u1[num_n_words - 1] = 0; + bits2int(u1, message_hash, hash_size, curve); + uECC_vli_modMult(u1, u1, z, curve->n, num_n_words); /* u1 = e/s */ + uECC_vli_modMult(u2, r, z, curve->n, num_n_words); /* u2 = r/s */ + + /* Calculate sum = G + Q. */ + uECC_vli_set(sum, _public, num_words); + uECC_vli_set(sum + num_words, _public + num_words, num_words); + uECC_vli_set(tx, curve->G, num_words); + uECC_vli_set(ty, curve->G + num_words, num_words); + uECC_vli_modSub(z, sum, tx, curve->p, num_words); /* z = x2 - x1 */ + XYcZ_add(tx, ty, sum, sum + num_words, curve); + uECC_vli_modInv(z, z, curve->p, num_words); /* z = 1/z */ + apply_z(sum, sum + num_words, z, curve); + + /* Use Shamir's trick to calculate u1*G + u2*Q */ + points[0] = 0; + points[1] = curve->G; + points[2] = _public; + points[3] = sum; + num_bits = smax(uECC_vli_numBits(u1, num_n_words), + uECC_vli_numBits(u2, num_n_words)); + + point = points[(!!uECC_vli_testBit(u1, num_bits - 1)) | + ((!!uECC_vli_testBit(u2, num_bits - 1)) << 1)]; + uECC_vli_set(rx, point, num_words); + uECC_vli_set(ry, point + num_words, num_words); + uECC_vli_clear(z, num_words); + z[0] = 1; + + for (i = num_bits - 2; i >= 0; --i) { + uECC_word_t index; + curve->double_jacobian(rx, ry, z, curve); + + index = (!!uECC_vli_testBit(u1, i)) | ((!!uECC_vli_testBit(u2, i)) << 1); + point = points[index]; + if (point) { + uECC_vli_set(tx, point, num_words); + uECC_vli_set(ty, point + num_words, num_words); + apply_z(tx, ty, z, curve); + uECC_vli_modSub(tz, rx, tx, curve->p, num_words); /* Z = x2 - x1 */ + XYcZ_add(tx, ty, rx, ry, curve); + uECC_vli_modMult_fast(z, z, tz, curve); + } + } + + uECC_vli_modInv(z, z, curve->p, num_words); /* Z = 1/Z */ + apply_z(rx, ry, z, curve); + + /* v = x1 (mod n) */ + if (uECC_vli_cmp_unsafe(curve->n, rx, num_n_words) != 1) { + uECC_vli_sub(rx, rx, curve->n, num_n_words); + } + + /* Accept only if v == r. */ + return (int)(uECC_vli_equal(rx, r, num_words) == 0); +} + diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc_platform_specific.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc_platform_specific.c new file mode 100644 index 0000000..1867988 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/ecc_platform_specific.c @@ -0,0 +1,105 @@ +/* uECC_platform_specific.c - Implementation of platform specific functions*/ + +/* Copyright (c) 2014, Kenneth MacKay + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE.*/ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * uECC_platform_specific.c -- Implementation of platform specific functions + */ + + +#if defined(unix) || defined(__linux__) || defined(__unix__) || \ + defined(__unix) | (defined(__APPLE__) && defined(__MACH__)) || \ + defined(uECC_POSIX) + +/* Some POSIX-like system with /dev/urandom or /dev/random. */ +#include +#include +#include + +#include + +#ifndef O_CLOEXEC +#define O_CLOEXEC 0 +#endif + +int default_CSPRNG(uint8_t *dest, unsigned int size) { + + /* input sanity check: */ + if (dest == (uint8_t *) 0 || (size <= 0)) + return 0; + + int fd = open("/dev/urandom", O_RDONLY | O_CLOEXEC); + if (fd == -1) { + fd = open("/dev/random", O_RDONLY | O_CLOEXEC); + if (fd == -1) { + return 0; + } + } + + char *ptr = (char *)dest; + size_t left = (size_t) size; + while (left > 0) { + ssize_t bytes_read = read(fd, ptr, left); + if (bytes_read <= 0) { // read failed + close(fd); + return 0; + } + left -= bytes_read; + ptr += bytes_read; + } + + close(fd); + return 1; +} + +#endif /* platform */ + diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/hmac.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/hmac.c new file mode 100644 index 0000000..89878ce --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/hmac.c @@ -0,0 +1,148 @@ +/* hmac.c - TinyCrypt implementation of the HMAC algorithm */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +static void rekey(uint8_t *key, const uint8_t *new_key, unsigned int key_size) +{ + const uint8_t inner_pad = (uint8_t) 0x36; + const uint8_t outer_pad = (uint8_t) 0x5c; + unsigned int i; + + for (i = 0; i < key_size; ++i) { + key[i] = inner_pad ^ new_key[i]; + key[i + TC_SHA256_BLOCK_SIZE] = outer_pad ^ new_key[i]; + } + for (; i < TC_SHA256_BLOCK_SIZE; ++i) { + key[i] = inner_pad; key[i + TC_SHA256_BLOCK_SIZE] = outer_pad; + } +} + +int tc_hmac_set_key(TCHmacState_t ctx, const uint8_t *key, + unsigned int key_size) +{ + + /* input sanity check: */ + if (ctx == (TCHmacState_t) 0 || + key == (const uint8_t *) 0 || + key_size == 0) { + return TC_CRYPTO_FAIL; + } + + const uint8_t dummy_key[key_size]; + struct tc_hmac_state_struct dummy_state; + + if (key_size <= TC_SHA256_BLOCK_SIZE) { + /* + * The next three lines consist of dummy calls just to avoid + * certain timing attacks. Without these dummy calls, + * adversaries would be able to learn whether the key_size is + * greater than TC_SHA256_BLOCK_SIZE by measuring the time + * consumed in this process. + */ + (void)tc_sha256_init(&dummy_state.hash_state); + (void)tc_sha256_update(&dummy_state.hash_state, + dummy_key, + key_size); + (void)tc_sha256_final(&dummy_state.key[TC_SHA256_DIGEST_SIZE], + &dummy_state.hash_state); + + /* Actual code for when key_size <= TC_SHA256_BLOCK_SIZE: */ + rekey(ctx->key, key, key_size); + } else { + (void)tc_sha256_init(&ctx->hash_state); + (void)tc_sha256_update(&ctx->hash_state, key, key_size); + (void)tc_sha256_final(&ctx->key[TC_SHA256_DIGEST_SIZE], + &ctx->hash_state); + rekey(ctx->key, + &ctx->key[TC_SHA256_DIGEST_SIZE], + TC_SHA256_DIGEST_SIZE); + } + + return TC_CRYPTO_SUCCESS; +} + +int tc_hmac_init(TCHmacState_t ctx) +{ + + /* input sanity check: */ + if (ctx == (TCHmacState_t) 0) { + return TC_CRYPTO_FAIL; + } + + (void) tc_sha256_init(&ctx->hash_state); + (void) tc_sha256_update(&ctx->hash_state, ctx->key, TC_SHA256_BLOCK_SIZE); + + return TC_CRYPTO_SUCCESS; +} + +int tc_hmac_update(TCHmacState_t ctx, + const void *data, + unsigned int data_length) +{ + + /* input sanity check: */ + if (ctx == (TCHmacState_t) 0) { + return TC_CRYPTO_FAIL; + } + + (void)tc_sha256_update(&ctx->hash_state, data, data_length); + + return TC_CRYPTO_SUCCESS; +} + +int tc_hmac_final(uint8_t *tag, unsigned int taglen, TCHmacState_t ctx) +{ + + /* input sanity check: */ + if (tag == (uint8_t *) 0 || + taglen != TC_SHA256_DIGEST_SIZE || + ctx == (TCHmacState_t) 0) { + return TC_CRYPTO_FAIL; + } + + (void) tc_sha256_final(tag, &ctx->hash_state); + + (void)tc_sha256_init(&ctx->hash_state); + (void)tc_sha256_update(&ctx->hash_state, + &ctx->key[TC_SHA256_BLOCK_SIZE], + TC_SHA256_BLOCK_SIZE); + (void)tc_sha256_update(&ctx->hash_state, tag, TC_SHA256_DIGEST_SIZE); + (void)tc_sha256_final(tag, &ctx->hash_state); + + /* destroy the current state */ + _set(ctx, 0, sizeof(*ctx)); + + return TC_CRYPTO_SUCCESS; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/hmac_prng.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/hmac_prng.c new file mode 100644 index 0000000..68b5b1f --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/hmac_prng.c @@ -0,0 +1,212 @@ +/* hmac_prng.c - TinyCrypt implementation of HMAC-PRNG */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include + +/* + * min bytes in the seed string. + * MIN_SLEN*8 must be at least the expected security level. + */ +static const unsigned int MIN_SLEN = 32; + +/* + * max bytes in the seed string; + * SP800-90A specifies a maximum of 2^35 bits (i.e., 2^32 bytes). + */ +static const unsigned int MAX_SLEN = UINT32_MAX; + +/* + * max bytes in the personalization string; + * SP800-90A specifies a maximum of 2^35 bits (i.e., 2^32 bytes). + */ +static const unsigned int MAX_PLEN = UINT32_MAX; + +/* + * max bytes in the additional_info string; + * SP800-90A specifies a maximum of 2^35 bits (i.e., 2^32 bytes). + */ +static const unsigned int MAX_ALEN = UINT32_MAX; + +/* + * max number of generates between re-seeds; + * TinyCrypt accepts up to (2^32 - 1) which is the maximal value of + * a 32-bit unsigned int variable, while SP800-90A specifies a maximum of 2^48. + */ +static const unsigned int MAX_GENS = UINT32_MAX; + +/* + * maximum bytes per generate call; + * SP800-90A specifies a maximum up to 2^19. + */ +static const unsigned int MAX_OUT = (1 << 19); + +/* + * Assumes: prng != NULL, e != NULL, len >= 0. + */ +static void update(TCHmacPrng_t prng, const uint8_t *e, unsigned int len) +{ + const uint8_t separator0 = 0x00; + const uint8_t separator1 = 0x01; + + /* use current state, e and separator 0 to compute a new prng key: */ + (void)tc_hmac_init(&prng->h); + (void)tc_hmac_update(&prng->h, prng->v, sizeof(prng->v)); + (void)tc_hmac_update(&prng->h, &separator0, sizeof(separator0)); + (void)tc_hmac_update(&prng->h, e, len); + (void)tc_hmac_final(prng->key, sizeof(prng->key), &prng->h); + /* configure the new prng key into the prng's instance of hmac */ + (void)tc_hmac_set_key(&prng->h, prng->key, sizeof(prng->key)); + + /* use the new key to compute a new state variable v */ + (void)tc_hmac_init(&prng->h); + (void)tc_hmac_update(&prng->h, prng->v, sizeof(prng->v)); + (void)tc_hmac_final(prng->v, sizeof(prng->v), &prng->h); + + /* use current state, e and separator 1 to compute a new prng key: */ + (void)tc_hmac_init(&prng->h); + (void)tc_hmac_update(&prng->h, prng->v, sizeof(prng->v)); + (void)tc_hmac_update(&prng->h, &separator1, sizeof(separator1)); + (void)tc_hmac_update(&prng->h, e, len); + (void)tc_hmac_final(prng->key, sizeof(prng->key), &prng->h); + /* configure the new prng key into the prng's instance of hmac */ + (void)tc_hmac_set_key(&prng->h, prng->key, sizeof(prng->key)); + + /* use the new key to compute a new state variable v */ + (void)tc_hmac_init(&prng->h); + (void)tc_hmac_update(&prng->h, prng->v, sizeof(prng->v)); + (void)tc_hmac_final(prng->v, sizeof(prng->v), &prng->h); +} + +int tc_hmac_prng_init(TCHmacPrng_t prng, + const uint8_t *personalization, + unsigned int plen) +{ + + /* input sanity check: */ + if (prng == (TCHmacPrng_t) 0 || + personalization == (uint8_t *) 0 || + plen > MAX_PLEN) { + return TC_CRYPTO_FAIL; + } + + /* put the generator into a known state: */ + _set(prng->key, 0x00, sizeof(prng->key)); + _set(prng->v, 0x01, sizeof(prng->v)); + tc_hmac_set_key(&prng->h, prng->key, sizeof(prng->key)); + /* update assumes SOME key has been configured into HMAC */ + + update(prng, personalization, plen); + + /* force a reseed before allowing tc_hmac_prng_generate to succeed: */ + prng->countdown = 0; + + return TC_CRYPTO_SUCCESS; +} + +int tc_hmac_prng_reseed(TCHmacPrng_t prng, + const uint8_t *seed, + unsigned int seedlen, + const uint8_t *additional_input, + unsigned int additionallen) +{ + + /* input sanity check: */ + if (prng == (TCHmacPrng_t) 0 || + seed == (const uint8_t *) 0 || + seedlen < MIN_SLEN || + seedlen > MAX_SLEN) { + return TC_CRYPTO_FAIL; + } + + if (additional_input != (const uint8_t *) 0) { + /* + * Abort if additional_input is provided but has inappropriate + * length + */ + if (additionallen == 0 || + additionallen > MAX_ALEN) { + return TC_CRYPTO_FAIL; + } else { + /* call update for the seed and additional_input */ + update(prng, seed, seedlen); + update(prng, additional_input, additionallen); + } + } else { + /* call update only for the seed */ + update(prng, seed, seedlen); + } + + /* ... and enable hmac_prng_generate */ + prng->countdown = MAX_GENS; + + return TC_CRYPTO_SUCCESS; +} + +int tc_hmac_prng_generate(uint8_t *out, unsigned int outlen, TCHmacPrng_t prng) +{ + unsigned int bufferlen; + + /* input sanity check: */ + if (out == (uint8_t *) 0 || + prng == (TCHmacPrng_t) 0 || + outlen == 0 || + outlen > MAX_OUT) { + return TC_CRYPTO_FAIL; + } else if (prng->countdown == 0) { + return TC_HMAC_PRNG_RESEED_REQ; + } + + prng->countdown--; + + while (outlen != 0) { + /* operate HMAC in OFB mode to create "random" outputs */ + (void)tc_hmac_init(&prng->h); + (void)tc_hmac_update(&prng->h, prng->v, sizeof(prng->v)); + (void)tc_hmac_final(prng->v, sizeof(prng->v), &prng->h); + + bufferlen = (TC_SHA256_DIGEST_SIZE > outlen) ? + outlen : TC_SHA256_DIGEST_SIZE; + (void)_copy(out, bufferlen, prng->v, bufferlen); + + out += bufferlen; + outlen = (outlen > TC_SHA256_DIGEST_SIZE) ? + (outlen - TC_SHA256_DIGEST_SIZE) : 0; + } + + /* block future PRNG compromises from revealing past state */ + update(prng, prng->v, TC_SHA256_DIGEST_SIZE); + + return TC_CRYPTO_SUCCESS; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/sha256.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/sha256.c new file mode 100644 index 0000000..b4efd20 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/sha256.c @@ -0,0 +1,217 @@ +/* sha256.c - TinyCrypt SHA-256 crypto hash algorithm implementation */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +static void compress(unsigned int *iv, const uint8_t *data); + +int tc_sha256_init(TCSha256State_t s) +{ + /* input sanity check: */ + if (s == (TCSha256State_t) 0) { + return TC_CRYPTO_FAIL; + } + + /* + * Setting the initial state values. + * These values correspond to the first 32 bits of the fractional parts + * of the square roots of the first 8 primes: 2, 3, 5, 7, 11, 13, 17 + * and 19. + */ + _set((uint8_t *) s, 0x00, sizeof(*s)); + s->iv[0] = 0x6a09e667; + s->iv[1] = 0xbb67ae85; + s->iv[2] = 0x3c6ef372; + s->iv[3] = 0xa54ff53a; + s->iv[4] = 0x510e527f; + s->iv[5] = 0x9b05688c; + s->iv[6] = 0x1f83d9ab; + s->iv[7] = 0x5be0cd19; + + return TC_CRYPTO_SUCCESS; +} + +int tc_sha256_update(TCSha256State_t s, const uint8_t *data, size_t datalen) +{ + /* input sanity check: */ + if (s == (TCSha256State_t) 0 || + data == (void *) 0) { + return TC_CRYPTO_FAIL; + } else if (datalen == 0) { + return TC_CRYPTO_SUCCESS; + } + + while (datalen-- > 0) { + s->leftover[s->leftover_offset++] = *(data++); + if (s->leftover_offset >= TC_SHA256_BLOCK_SIZE) { + compress(s->iv, s->leftover); + s->leftover_offset = 0; + s->bits_hashed += (TC_SHA256_BLOCK_SIZE << 3); + } + } + + return TC_CRYPTO_SUCCESS; +} + +int tc_sha256_final(uint8_t *digest, TCSha256State_t s) +{ + unsigned int i; + + /* input sanity check: */ + if (digest == (uint8_t *) 0 || + s == (TCSha256State_t) 0) { + return TC_CRYPTO_FAIL; + } + + s->bits_hashed += (s->leftover_offset << 3); + + s->leftover[s->leftover_offset++] = 0x80; /* always room for one byte */ + if (s->leftover_offset > (sizeof(s->leftover) - 8)) { + /* there is not room for all the padding in this block */ + _set(s->leftover + s->leftover_offset, 0x00, + sizeof(s->leftover) - s->leftover_offset); + compress(s->iv, s->leftover); + s->leftover_offset = 0; + } + + /* add the padding and the length in big-Endian format */ + _set(s->leftover + s->leftover_offset, 0x00, + sizeof(s->leftover) - 8 - s->leftover_offset); + s->leftover[sizeof(s->leftover) - 1] = (uint8_t)(s->bits_hashed); + s->leftover[sizeof(s->leftover) - 2] = (uint8_t)(s->bits_hashed >> 8); + s->leftover[sizeof(s->leftover) - 3] = (uint8_t)(s->bits_hashed >> 16); + s->leftover[sizeof(s->leftover) - 4] = (uint8_t)(s->bits_hashed >> 24); + s->leftover[sizeof(s->leftover) - 5] = (uint8_t)(s->bits_hashed >> 32); + s->leftover[sizeof(s->leftover) - 6] = (uint8_t)(s->bits_hashed >> 40); + s->leftover[sizeof(s->leftover) - 7] = (uint8_t)(s->bits_hashed >> 48); + s->leftover[sizeof(s->leftover) - 8] = (uint8_t)(s->bits_hashed >> 56); + + /* hash the padding and length */ + compress(s->iv, s->leftover); + + /* copy the iv out to digest */ + for (i = 0; i < TC_SHA256_STATE_BLOCKS; ++i) { + unsigned int t = *((unsigned int *) &s->iv[i]); + *digest++ = (uint8_t)(t >> 24); + *digest++ = (uint8_t)(t >> 16); + *digest++ = (uint8_t)(t >> 8); + *digest++ = (uint8_t)(t); + } + + /* destroy the current state */ + _set(s, 0, sizeof(*s)); + + return TC_CRYPTO_SUCCESS; +} + +/* + * Initializing SHA-256 Hash constant words K. + * These values correspond to the first 32 bits of the fractional parts of the + * cube roots of the first 64 primes between 2 and 311. + */ +static const unsigned int k256[64] = { + 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, + 0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, + 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786, + 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da, + 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, + 0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, + 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b, + 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070, + 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, + 0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, + 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2 +}; + +static inline unsigned int ROTR(unsigned int a, unsigned int n) +{ + return (((a) >> n) | ((a) << (32 - n))); +} + +#define Sigma0(a)(ROTR((a), 2) ^ ROTR((a), 13) ^ ROTR((a), 22)) +#define Sigma1(a)(ROTR((a), 6) ^ ROTR((a), 11) ^ ROTR((a), 25)) +#define sigma0(a)(ROTR((a), 7) ^ ROTR((a), 18) ^ ((a) >> 3)) +#define sigma1(a)(ROTR((a), 17) ^ ROTR((a), 19) ^ ((a) >> 10)) + +#define Ch(a, b, c)(((a) & (b)) ^ ((~(a)) & (c))) +#define Maj(a, b, c)(((a) & (b)) ^ ((a) & (c)) ^ ((b) & (c))) + +static inline unsigned int BigEndian(const uint8_t **c) +{ + unsigned int n = 0; + + n = (((unsigned int)(*((*c)++))) << 24); + n |= ((unsigned int)(*((*c)++)) << 16); + n |= ((unsigned int)(*((*c)++)) << 8); + n |= ((unsigned int)(*((*c)++))); + return n; +} + +static void compress(unsigned int *iv, const uint8_t *data) +{ + unsigned int a, b, c, d, e, f, g, h; + unsigned int s0, s1; + unsigned int t1, t2; + unsigned int work_space[16]; + unsigned int n; + unsigned int i; + + a = iv[0]; b = iv[1]; c = iv[2]; d = iv[3]; + e = iv[4]; f = iv[5]; g = iv[6]; h = iv[7]; + + for (i = 0; i < 16; ++i) { + n = BigEndian(&data); + t1 = work_space[i] = n; + t1 += h + Sigma1(e) + Ch(e, f, g) + k256[i]; + t2 = Sigma0(a) + Maj(a, b, c); + h = g; g = f; f = e; e = d + t1; + d = c; c = b; b = a; a = t1 + t2; + } + + for ( ; i < 64; ++i) { + s0 = work_space[(i+1)&0x0f]; + s0 = sigma0(s0); + s1 = work_space[(i+14)&0x0f]; + s1 = sigma1(s1); + + t1 = work_space[i&0xf] += s0 + s1 + work_space[(i+9)&0xf]; + t1 += h + Sigma1(e) + Ch(e, f, g) + k256[i]; + t2 = Sigma0(a) + Maj(a, b, c); + h = g; g = f; f = e; e = d + t1; + d = c; c = b; b = a; a = t1 + t2; + } + + iv[0] += a; iv[1] += b; iv[2] += c; iv[3] += d; + iv[4] += e; iv[5] += f; iv[6] += g; iv[7] += h; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/lib/source/utils.c b/bootloader/mcuboot/ext/tinycrypt/lib/source/utils.c new file mode 100644 index 0000000..13cc495 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/lib/source/utils.c @@ -0,0 +1,74 @@ +/* utils.c - TinyCrypt platform-dependent run-time operations */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +#include + +#define MASK_TWENTY_SEVEN 0x1b + +unsigned int _copy(uint8_t *to, unsigned int to_len, + const uint8_t *from, unsigned int from_len) +{ + if (from_len <= to_len) { + (void)memcpy(to, from, from_len); + return from_len; + } else { + return TC_CRYPTO_FAIL; + } +} + +void _set(void *to, uint8_t val, unsigned int len) +{ + (void)memset(to, val, len); +} + +/* + * Doubles the value of a byte for values up to 127. + */ +uint8_t _double_byte(uint8_t a) +{ + return ((a<<1) ^ ((a>>7) * MASK_TWENTY_SEVEN)); +} + +int _compare(const uint8_t *a, const uint8_t *b, size_t size) +{ + const uint8_t *tempa = a; + const uint8_t *tempb = b; + uint8_t result = 0; + + for (unsigned int i = 0; i < size; i++) { + result |= tempa[i] ^ tempb[i]; + } + return result; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/Makefile b/bootloader/mcuboot/ext/tinycrypt/tests/Makefile new file mode 100644 index 0000000..eff5a88 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/Makefile @@ -0,0 +1,67 @@ +################################################################################ +# +# Copyright (C) 2017 by Intel Corporation, All Rights Reserved. +# +# Tests Makefile. +# +################################################################################ + +include ../config.mk + +TEST_LIB_FILE:=test_ecc_utils.c +TEST_SOURCE:=$(filter-out $(TEST_LIB_FILE), $(wildcard test_*.c)) + +TEST_OBJECTS:=$(TEST_SOURCE:.c=.o) +TEST_DEPS:=$(TEST_SOURCE:.c=.d) +TEST_BINARY:=$(TEST_SOURCE:.c=$(DOTEXE)) + +# Edit the 'all' content to add/remove tests needed from TinyCrypt library: +all: $(TEST_BINARY) + +clean: + -$(RM) $(TEST_BINARY) $(TEST_OBJECTS) $(TEST_DEPS) + -$(RM) *~ *.o *.d + +# Dependencies +test_aes$(DOTEXE): test_aes.o aes_encrypt.o aes_decrypt.o utils.o + $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@ + +test_cbc_mode$(DOTEXE): test_cbc_mode.o cbc_mode.o \ + aes_encrypt.o aes_decrypt.o utils.o + $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@ + +test_ctr_mode$(DOTEXE): test_ctr_mode.o ctr_mode.o \ + aes_encrypt.o utils.o + $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@ + +test_ctr_prng$(DOTEXE): test_ctr_prng.o ctr_prng.o \ + aes_encrypt.o utils.o + $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@ + +test_cmac_mode$(DOTEXE): test_cmac_mode.o aes_encrypt.o utils.o \ + cmac_mode.o + $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@ + +test_ccm_mode$(DOTEXE): test_ccm_mode.o aes_encrypt.o \ + utils.o ccm_mode.o + $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@ + +test_hmac$(DOTEXE): test_hmac.o hmac.o sha256.o utils.o + $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@ + +test_hmac_prng$(DOTEXE): test_hmac_prng.o hmac_prng.o hmac.o \ + sha256.o utils.o + $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@ + +test_sha256$(DOTEXE): test_sha256.o sha256.o utils.o + $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@ + +test_ecc_dh$(DOTEXE): test_ecc_dh.o ecc.o ecc_dh.o test_ecc_utils.o ecc_platform_specific.o + $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@ + +test_ecc_dsa$(DOTEXE): test_ecc_dsa.o ecc.o utils.o ecc_dh.o \ + ecc_dsa.o sha256.o test_ecc_utils.o ecc_platform_specific.o + $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@ + + +-include $(TEST_DEPS) diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/include/test_ecc_utils.h b/bootloader/mcuboot/ext/tinycrypt/tests/include/test_ecc_utils.h new file mode 100644 index 0000000..4e29054 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/include/test_ecc_utils.h @@ -0,0 +1,100 @@ +/* test_ecc_utils.h - TinyCrypt interface to common functions for ECC tests */ + +/* Copyright (c) 2014, Kenneth MacKay + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE.*/ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * test_ecc_utils.h -- Interface to common functions for ECC tests. + */ + +#ifndef __TEST_ECC_UTILS_H__ +#define __TEST_ECC_UTILS_H__ + +#include +#include +#include + +int hex2int (char hex); + + +/* + * Convert hex string to byte string + * Return number of bytes written to buf, or 0 on error + */ +int hex2bin(uint8_t *buf, const size_t buflen, const char *hex, + const size_t hexlen); + +/* + * Convert hex string to zero-padded nanoECC scalar + */ +void string2scalar(unsigned int * scalar, unsigned int num_word32, char *str); + + +void print_ecc_scalar(const char *label, const unsigned int * p_vli, + unsigned int num_word32); + +int check_ecc_result(const int num, const char *name, + const unsigned int *expected, + const unsigned int *computed, + const unsigned int num_word32, const bool verbose); + +/* Test ecc_make_keys, and also as keygen part of other tests */ +int keygen_vectors(char **d_vec, char **qx_vec, char **qy_vec, int tests, bool verbose); + +void vli_print_bytes(uint8_t *vli, unsigned int size); + + +int check_code(const int num, const char *name, const int expected, + const int computed, const int verbose); + + +#endif /* __TEST_ECC_UTILS_H__ */ + diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/include/test_utils.h b/bootloader/mcuboot/ext/tinycrypt/tests/include/test_utils.h new file mode 100644 index 0000000..055f91b --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/include/test_utils.h @@ -0,0 +1,125 @@ +/* test_utils.h - TinyCrypt interface to common functions for tests */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * test_utils.h -- Interface to common functions for tests. + */ + +#ifndef __TEST_UTILS_H__ +#define __TEST_UTILS_H__ + +#include + +#include +#include +#include +#include + +#define PRINT_DATA(fmt, ...) printf(fmt, ##__VA_ARGS__) + +#define PRINT_LINE \ + PRINT_DATA( \ + "============================================================" \ + "=======\n") + + +#define FAIL "FAIL" +#define PASS "PASS" +#define FMT_ERROR "%s - %s@%d. " + +/* TC_ here stands for 'Test Case' not 'TinyCrypt' */ +#define TC_PASS 0 +#define TC_FAIL 1 + +#define TC_ERROR(fmt, ...) \ + do { \ + PRINT_DATA(FMT_ERROR, FAIL, __func__, __LINE__); \ + PRINT_DATA(fmt, ##__VA_ARGS__); \ + } while (0) + +#define TC_PRINT(fmt, ...) PRINT_DATA(fmt, ##__VA_ARGS__) +#define TC_START(name) PRINT_DATA("tc_start() - %s\n", name) +#define TC_END(result, fmt, ...) PRINT_DATA(fmt, ##__VA_ARGS__) + +/* prints result and the function name */ +#define TC_END_RESULT(result) \ + do { \ + PRINT_LINE; \ + TC_END(result, "%s - %s.\n", \ + result == TC_PASS ? PASS : FAIL, __func__); \ + } while (0) + +#define TC_END_REPORT(result) \ + do { \ + PRINT_LINE; \ + TC_END(result, \ + "PROJECT EXECUTION %s\n", \ + result == TC_PASS ? "SUCCESSFUL" : "FAILED"); \ + } while (0) + +static inline void show_str(const char *label, const uint8_t *s, size_t len) +{ + unsigned int i; + + TC_PRINT("%s = ", label); + for (i = 0; i < (unsigned int) len; ++i) { + TC_PRINT("%02x", s[i]); + } + TC_PRINT("\n"); +} + +static inline void fatal(unsigned int testnum, const void *expected, size_t expectedlen, + const void *computed, size_t computedlen) +{ + + TC_ERROR("\tTest #%d Failed!\n", testnum); + show_str("\t\tExpected", expected, expectedlen); + show_str("\t\tComputed ", computed, computedlen); + TC_PRINT("\n"); +} + +static inline unsigned int check_result(unsigned int testnum, const void *expected, size_t expectedlen, + const void *computed, size_t computedlen) +{ + unsigned int result = TC_PASS; + + if (expectedlen != computedlen) { + TC_ERROR("The length of the computed buffer (%zu)", computedlen); + TC_ERROR("does not match the expected length (%zu).", expectedlen); + result = TC_FAIL; + } else if (memcmp(computed, expected, computedlen) != 0) { + fatal(testnum, expected, expectedlen, computed, computedlen); + result = TC_FAIL; + } + + return result; +} + +#endif /* __TEST_UTILS_H__ */ diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/pseudo-random-data.bin b/bootloader/mcuboot/ext/tinycrypt/tests/pseudo-random-data.bin new file mode 100644 index 0000000000000000000000000000000000000000..4f174c58bd3a505ddc1b9aea1937d70e1b8e3833 GIT binary patch literal 524288 zcmV(&K;gf#f0|18cGakzhdu>E}vbj;eV=Ly!B%SBsEY7iX_ zL}UVIn{&9$#$#ZQjjT72$*it~On^Rz4Et4?uY~_wj*HfP$SmV6n4Oe+aE5_iX>Ve^ z*?RltUJXtH$wEbQ30=;bmEJ~c)cgo?sO(yVZ>v3{m#sDJxa6tzkOmJqL{e#(av$dC zof_>lkh9iSWKO~5csVLMIyzghzffn18ZQnTPMS#vlT9}A0A}u>9ikM* zeyDSY_C}kf>Q%*|o(E@Igh}dO1L~|GC$X`QWt*Ze&p-IgP{jkozj`5|db)6H`-k+> z70se*0Fu;Wzh6gIT1JWoXe_imwgDBy`T&1WXzPy**s002h)aP3^UTm5Z|5ovc|q!` z4%&s=LV;d!~k;f1tNqe}_NHh(w5CC+L_9cAAE@t0Sk496|0|{BK(;IX4 zi}@^ioJ*CqD6|$zh)el;q3p>j=cv;oB||!-N9j0Q^8EmB!gPt>erBVxF{gT(otFuV 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b/bootloader/mcuboot/ext/tinycrypt/tests/test_aes.c @@ -0,0 +1,2078 @@ +/* test_aes.c - TinyCrypt AES-128 tests (including NIST tests) */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * DESCRIPTION + * This module tests the following AES routines: + * + * Scenarios tested include: + * - AES128 NIST key schedule test + * - AES128 NIST encryption test + * - AES128 NIST fixed-key and variable-text + * - AES128 NIST variable-key and fixed-text + */ + +#include +#include +#include + +#include +#include +#include + +#include +#include + +#define NUM_OF_NIST_KEYS 16 +#define NUM_OF_FIXED_KEYS 128 + + +struct kat_table { + uint8_t in[NUM_OF_NIST_KEYS]; + uint8_t out[NUM_OF_NIST_KEYS]; +}; + +/* + * NIST test key schedule. + */ +int test_1(void) +{ + int result = TC_PASS; + const uint8_t nist_key[NUM_OF_NIST_KEYS] = { + 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, + 0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c + }; + const struct tc_aes_key_sched_struct expected = { + { + 0x2b7e1516, 0x28aed2a6, 0xabf71588, 0x09cf4f3c, + 0xa0fafe17, 0x88542cb1, 0x23a33939, 0x2a6c7605, + 0xf2c295f2, 0x7a96b943, 0x5935807a, 0x7359f67f, + 0x3d80477d, 0x4716fe3e, 0x1e237e44, 0x6d7a883b, + 0xef44a541, 0xa8525b7f, 0xb671253b, 0xdb0bad00, + 0xd4d1c6f8, 0x7c839d87, 0xcaf2b8bc, 0x11f915bc, + 0x6d88a37a, 0x110b3efd, 0xdbf98641, 0xca0093fd, + 0x4e54f70e, 0x5f5fc9f3, 0x84a64fb2, 0x4ea6dc4f, + 0xead27321, 0xb58dbad2, 0x312bf560, 0x7f8d292f, + 0xac7766f3, 0x19fadc21, 0x28d12941, 0x575c006e, + 0xd014f9a8, 0xc9ee2589, 0xe13f0cc8, 0xb6630ca6 + } + }; + struct tc_aes_key_sched_struct s; + + TC_PRINT("AES128 %s (NIST key schedule test):\n", __func__); + + if (tc_aes128_set_encrypt_key(&s, nist_key) == 0) { + TC_ERROR("AES128 test %s (NIST key schedule test) failed.\n", + __func__); + result = TC_FAIL; + goto exitTest1; + } + + result = check_result(1, expected.words, sizeof(expected.words), s.words, + sizeof(s.words)); + +exitTest1: + TC_END_RESULT(result); + return result; +} + +/* + * NIST test vectors for encryption. + */ +int test_2(void) +{ + int result = TC_PASS; + const uint8_t nist_key[NUM_OF_NIST_KEYS] = { + 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, + 0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c + }; + const uint8_t nist_input[NUM_OF_NIST_KEYS] = { + 0x32, 0x43, 0xf6, 0xa8, 0x88, 0x5a, 0x30, 0x8d, + 0x31, 0x31, 0x98, 0xa2, 0xe0, 0x37, 0x07, 0x34 + }; + const uint8_t expected[NUM_OF_NIST_KEYS] = { + 0x39, 0x25, 0x84, 0x1d, 0x02, 0xdc, 0x09, 0xfb, + 0xdc, 0x11, 0x85, 0x97, 0x19, 0x6a, 0x0b, 0x32 + }; + struct tc_aes_key_sched_struct s; + uint8_t ciphertext[NUM_OF_NIST_KEYS]; + + TC_PRINT("AES128 %s (NIST encryption test):\n", __func__); + + (void)tc_aes128_set_encrypt_key(&s, nist_key); + if (tc_aes_encrypt(ciphertext, nist_input, &s) == 0) { + TC_ERROR("AES128 %s (NIST encryption test) failed.\n", + __func__); + result = TC_FAIL; + goto exitTest2; + } + + result = check_result(2, expected, sizeof(expected), ciphertext, + sizeof(ciphertext)); + +exitTest2: + TC_END_RESULT(result); + + return result; +} + +int var_text_test(unsigned int r, const uint8_t *in, const uint8_t *out, + TCAesKeySched_t s) +{ + uint8_t ciphertext[NUM_OF_NIST_KEYS]; + uint8_t decrypted[NUM_OF_NIST_KEYS]; + int result = TC_PASS; + + (void)tc_aes_encrypt(ciphertext, in, s); + result = check_result(r, out, NUM_OF_NIST_KEYS, ciphertext, + sizeof(ciphertext)); + if (result != TC_FAIL) { + if (tc_aes_decrypt(decrypted, ciphertext, s) == 0) { + TC_ERROR("aes_decrypt failed\n"); + result = TC_FAIL; + } else { + result = check_result(r, in, NUM_OF_NIST_KEYS, + decrypted, sizeof(decrypted)); + } + } + + return result; +} + +/* + * All NIST tests with fixed key and variable text. + */ +int test_3(void) +{ + int result = TC_PASS; + const uint8_t key[NUM_OF_NIST_KEYS] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }; + const struct kat_table kat_tbl[NUM_OF_FIXED_KEYS] = { + {{ + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x3a, 0xd7, 0x8e, 0x72, 0x6c, 0x1e, 0xc0, 0x2b, + 0x7e, 0xbf, 0xe9, 0x2b, 0x23, 0xd9, 0xec, 0x34 + } }, + {{ + 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xaa, 0xe5, 0x93, 0x9c, 0x8e, 0xfd, 0xf2, 0xf0, + 0x4e, 0x60, 0xb9, 0xfe, 0x71, 0x17, 0xb2, 0xc2 + } }, + {{ + 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xf0, 0x31, 0xd4, 0xd7, 0x4f, 0x5d, 0xcb, 0xf3, + 0x9d, 0xaa, 0xf8, 0xca, 0x3a, 0xf6, 0xe5, 0x27 + } }, + {{ + 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x96, 0xd9, 0xfd, 0x5c, 0xc4, 0xf0, 0x74, 0x41, + 0x72, 0x7d, 0xf0, 0xf3, 0x3e, 0x40, 0x1a, 0x36 + } }, + {{ + 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x30, 0xcc, 0xdb, 0x04, 0x46, 0x46, 0xd7, 0xe1, + 0xf3, 0xcc, 0xea, 0x3d, 0xca, 0x08, 0xb8, 0xc0 + } }, + {{ + 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x16, 0xae, 0x4c, 0xe5, 0x04, 0x2a, 0x67, 0xee, + 0x8e, 0x17, 0x7b, 0x7c, 0x58, 0x7e, 0xcc, 0x82 + } }, + {{ + 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xb6, 0xda, 0x0b, 0xb1, 0x1a, 0x23, 0x85, 0x5d, + 0x9c, 0x5c, 0xb1, 0xb4, 0xc6, 0x41, 0x2e, 0x0a + } }, + {{ + 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xdb, 0x4f, 0x1a, 0xa5, 0x30, 0x96, 0x7d, 0x67, + 0x32, 0xce, 0x47, 0x15, 0xeb, 0x0e, 0xe2, 0x4b + } }, + {{ + 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xa8, 0x17, 0x38, 0x25, 0x26, 0x21, 0xdd, 0x18, + 0x0a, 0x34, 0xf3, 0x45, 0x5b, 0x4b, 0xaa, 0x2f + } }, + {{ + 0xff, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x77, 0xe2, 0xb5, 0x08, 0xdb, 0x7f, 0xd8, 0x92, + 0x34, 0xca, 0xf7, 0x93, 0x9e, 0xe5, 0x62, 0x1a + } }, + {{ + 0xff, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xb8, 0x49, 0x9c, 0x25, 0x1f, 0x84, 0x42, 0xee, + 0x13, 0xf0, 0x93, 0x3b, 0x68, 0x8f, 0xcd, 0x19 + } }, + {{ + 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x96, 0x51, 0x35, 0xf8, 0xa8, 0x1f, 0x25, 0xc9, + 0xd6, 0x30, 0xb1, 0x75, 0x02, 0xf6, 0x8e, 0x53 + } }, + {{ + 0xff, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x8b, 0x87, 0x14, 0x5a, 0x01, 0xad, 0x1c, 0x6c, + 0xed, 0xe9, 0x95, 0xea, 0x36, 0x70, 0x45, 0x4f + } }, + {{ + 0xff, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x8e, 0xae, 0x3b, 0x10, 0xa0, 0xc8, 0xca, 0x6d, + 0x1d, 0x3b, 0x0f, 0xa6, 0x1e, 0x56, 0xb0, 0xb2 + } }, + {{ + 0xff, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x64, 0xb4, 0xd6, 0x29, 0x81, 0x0f, 0xda, 0x6b, + 0xaf, 0xdf, 0x08, 0xf3, 0xb0, 0xd8, 0xd2, 0xc5 + } }, + {{ + 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xd7, 0xe5, 0xdb, 0xd3, 0x32, 0x45, 0x95, 0xf8, + 0xfd, 0xc7, 0xd7, 0xc5, 0x71, 0xda, 0x6c, 0x2a + } }, + {{ + 0xff, 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xf3, 0xf7, 0x23, 0x75, 0x26, 0x4e, 0x16, 0x7f, + 0xca, 0x9d, 0xe2, 0xc1, 0x52, 0x7d, 0x96, 0x06 + } }, + {{ + 0xff, 0xff, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x8e, 0xe7, 0x9d, 0xd4, 0xf4, 0x01, 0xff, 0x9b, + 0x7e, 0xa9, 0x45, 0xd8, 0x66, 0x66, 0xc1, 0x3b + } }, + {{ + 0xff, 0xff, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xdd, 0x35, 0xce, 0xa2, 0x79, 0x99, 0x40, 0xb4, + 0x0d, 0xb3, 0xf8, 0x19, 0xcb, 0x94, 0xc0, 0x8b + } }, + {{ + 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x69, 0x41, 0xcb, 0x6b, 0x3e, 0x08, 0xc2, 0xb7, + 0xaf, 0xa5, 0x81, 0xeb, 0xdd, 0x60, 0x7b, 0x87 + } }, + {{ + 0xff, 0xff, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x2c, 0x20, 0xf4, 0x39, 0xf6, 0xbb, 0x09, 0x7b, + 0x29, 0xb8, 0xbd, 0x6d, 0x99, 0xaa, 0xd7, 0x99 + } }, + {{ + 0xff, 0xff, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x62, 0x5d, 0x01, 0xf0, 0x58, 0xe5, 0x65, 0xf7, + 0x7a, 0xe8, 0x63, 0x78, 0xbd, 0x2c, 0x49, 0xb3 + } }, + {{ + 0xff, 0xff, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xc0, 0xb5, 0xfd, 0x98, 0x19, 0x0e, 0xf4, 0x5f, + 0xbb, 0x43, 0x01, 0x43, 0x8d, 0x09, 0x59, 0x50 + } }, + {{ + 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x13, 0x00, 0x1f, 0xf5, 0xd9, 0x98, 0x06, 0xef, + 0xd2, 0x5d, 0xa3, 0x4f, 0x56, 0xbe, 0x85, 0x4b + } }, + {{ + 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x3b, 0x59, 0x4c, 0x60, 0xf5, 0xc8, 0x27, 0x7a, + 0x51, 0x13, 0x67, 0x7f, 0x94, 0x20, 0x8d, 0x82 + } }, + {{ + 0xff, 0xff, 0xff, 0xc0, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xe9, 0xc0, 0xfc, 0x18, 0x18, 0xe4, 0xaa, 0x46, + 0xbd, 0x2e, 0x39, 0xd6, 0x38, 0xf8, 0x9e, 0x05 + } }, + {{ + 0xff, 0xff, 0xff, 0xe0, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xf8, 0x02, 0x3e, 0xe9, 0xc3, 0xfd, 0xc4, 0x5a, + 0x01, 0x9b, 0x4e, 0x98, 0x5c, 0x7e, 0x1a, 0x54 + } }, + {{ + 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x35, 0xf4, 0x01, 0x82, 0xab, 0x46, 0x62, 0xf3, + 0x02, 0x3b, 0xae, 0xc1, 0xee, 0x79, 0x6b, 0x57 + } }, + {{ + 0xff, 0xff, 0xff, 0xf8, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x3a, 0xeb, 0xba, 0xd7, 0x30, 0x36, 0x49, 0xb4, + 0x19, 0x4a, 0x69, 0x45, 0xc6, 0xcc, 0x36, 0x94 + } }, + {{ + 0xff, 0xff, 0xff, 0xfc, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xa2, 0x12, 0x4b, 0xea, 0x53, 0xec, 0x28, 0x34, + 0x27, 0x9b, 0xed, 0x7f, 0x7e, 0xb0, 0xf9, 0x38 + } }, + {{ + 0xff, 0xff, 0xff, 0xfe, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xb9, 0xfb, 0x43, 0x99, 0xfa, 0x4f, 0xac, 0xc7, + 0x30, 0x9e, 0x14, 0xec, 0x98, 0x36, 0x0b, 0x0a + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xc2, 0x62, 0x77, 0x43, 0x74, 0x20, 0xc5, 0xd6, + 0x34, 0xf7, 0x15, 0xae, 0xa8, 0x1a, 0x91, 0x32 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x17, 0x1a, 0x0e, 0x1b, 0x2d, 0xd4, 0x24, 0xf0, + 0xe0, 0x89, 0xaf, 0x2c, 0x4c, 0x10, 0xf3, 0x2f + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xc0, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x7c, 0xad, 0xbe, 0x40, 0x2d, 0x1b, 0x20, 0x8f, + 0xe7, 0x35, 0xed, 0xce, 0x00, 0xae, 0xe7, 0xce + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xe0, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x43, 0xb0, 0x2f, 0xf9, 0x29, 0xa1, 0x48, 0x5a, + 0xf6, 0xf5, 0xc6, 0xd6, 0x55, 0x8b, 0xaa, 0x0f + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x09, 0x2f, 0xaa, 0xcc, 0x9b, 0xf4, 0x35, 0x08, + 0xbf, 0x8f, 0xa8, 0x61, 0x3c, 0xa7, 0x5d, 0xea + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xf8, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xcb, 0x2b, 0xf8, 0x28, 0x0f, 0x3f, 0x97, 0x42, + 0xc7, 0xed, 0x51, 0x3f, 0xe8, 0x02, 0x62, 0x9c + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xfc, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x21, 0x5a, 0x41, 0xee, 0x44, 0x2f, 0xa9, 0x92, + 0xa6, 0xe3, 0x23, 0x98, 0x6d, 0xed, 0x3f, 0x68 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xfe, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xf2, 0x1e, 0x99, 0xcf, 0x4f, 0x0f, 0x77, 0xce, + 0xa8, 0x36, 0xe1, 0x1a, 0x2f, 0xe7, 0x5f, 0xb1 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x95, 0xe3, 0xa0, 0xca, 0x90, 0x79, 0xe6, 0x46, + 0x33, 0x1d, 0xf8, 0xb4, 0xe7, 0x0d, 0x2c, 0xd6 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x4a, 0xfe, 0x7f, 0x12, 0x0c, 0xe7, 0x61, 0x3f, + 0x74, 0xfc, 0x12, 0xa0, 0x1a, 0x82, 0x80, 0x73 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xc0, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x82, 0x7f, 0x00, 0x0e, 0x75, 0xe2, 0xc8, 0xb9, + 0xd4, 0x79, 0xbe, 0xed, 0x91, 0x3f, 0xe6, 0x78 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xe0, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x35, 0x83, 0x0c, 0x8e, 0x7a, 0xae, 0xfe, 0x2d, + 0x30, 0x31, 0x0e, 0xf3, 0x81, 0xcb, 0xf6, 0x91 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x19, 0x1a, 0xa0, 0xf2, 0xc8, 0x57, 0x01, 0x44, + 0xf3, 0x86, 0x57, 0xea, 0x40, 0x85, 0xeb, 0xe5 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x85, 0x06, 0x2c, 0x2c, 0x90, 0x9f, 0x15, 0xd9, + 0x26, 0x9b, 0x6c, 0x18, 0xce, 0x99, 0xc4, 0xf0 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x67, 0x80, 0x34, 0xdc, 0x9e, 0x41, 0xb5, 0xa5, + 0x60, 0xed, 0x23, 0x9e, 0xea, 0xb1, 0xbc, 0x78 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xc2, 0xf9, 0x3a, 0x4c, 0xe5, 0xab, 0x6d, 0x5d, + 0x56, 0xf1, 0xb9, 0x3c, 0xf1, 0x99, 0x11, 0xc1 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x1c, 0x31, 0x12, 0xbc, 0xb0, 0xc1, 0xdc, 0xc7, + 0x49, 0xd7, 0x99, 0x74, 0x36, 0x91, 0xbf, 0x82 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x00, 0xc5, 0x5b, 0xd7, 0x5c, 0x7f, 0x9c, 0x88, + 0x19, 0x89, 0xd3, 0xec, 0x19, 0x11, 0xc0, 0xd4 + } }, + {{ + 0xff, 0xff, 0xff, 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0xcc, + 0xa8, 0xd7, 0x43, 0x26, 0x5a, 0x3d, 0x42, 0x5c + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xd2, 0xd9, 0x9c, 0x6b, 0xcc, 0x1f, 0x06, 0xfd, + 0xa8, 0xe2, 0x7e, 0x8a, 0xe3, 0xf1, 0xcc, 0xc7 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x1b, 0xfd, 0x4b, 0x91, 0xc7, 0x01, 0xfd, 0x6b, + 0x61, 0xb7, 0xf9, 0x97, 0x82, 0x9d, 0x66, 0x3b + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x11, 0x00, 0x5d, 0x52, 0xf2, 0x5f, 0x16, 0xbd, + 0xc9, 0x54, 0x5a, 0x87, 0x6a, 0x63, 0x49, 0x0a + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc0, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x3a, 0x4d, 0x35, 0x4f, 0x02, 0xbb, 0x5a, 0x5e, + 0x47, 0xd3, 0x96, 0x66, 0x86, 0x7f, 0x24, 0x6a + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe0, + 0x00, 0x00, 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0x74, 0x72, 0xf9, 0xa7, 0x98, 0x86, 0x07, 0xca, + 0x79, 0x70, 0x77, 0x95, 0x99, 0x10, 0x35, 0xe6 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 + }, { + 0x56, 0xaf, 0xf0, 0x89, 0x87, 0x8b, 0xf3, 0x35, + 0x2f, 0x8d, 0xf1, 0x72, 0xa3, 0xae, 0x47, 0xd8 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xf8, 0x00, 0x00, 0x00, 0x00 + }, { + 0x65, 0xc0, 0x52, 0x6c, 0xbe, 0x40, 0x16, 0x1b, + 0x80, 0x19, 0xa2, 0xa3, 0x17, 0x1a, 0xbd, 0x23 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xfc, 0x00, 0x00, 0x00, 0x00 + }, { + 0x37, 0x7b, 0xe0, 0xbe, 0x33, 0xb4, 0xe3, 0xe3, + 0x10, 0xb4, 0xaa, 0xbd, 0xa1, 0x73, 0xf8, 0x4f + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xfe, 0x00, 0x00, 0x00, 0x00 + }, { + 0x94, 0x02, 0xe9, 0xaa, 0x6f, 0x69, 0xde, 0x65, + 0x04, 0xda, 0x8d, 0x20, 0xc4, 0xfc, 0xaa, 0x2f + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 + }, { + 0x12, 0x3c, 0x1f, 0x4a, 0xf3, 0x13, 0xad, 0x8c, + 0x2c, 0xe6, 0x48, 0xb2, 0xe7, 0x1f, 0xb6, 0xe1 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, 0x00 + }, { + 0x1f, 0xfc, 0x62, 0x6d, 0x30, 0x20, 0x3d, 0xcd, + 0xb0, 0x01, 0x9f, 0xb8, 0x0f, 0x72, 0x6c, 0xf4 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xc0, 0x00, 0x00, 0x00 + }, { + 0x76, 0xda, 0x1f, 0xbe, 0x3a, 0x50, 0x72, 0x8c, + 0x50, 0xfd, 0x2e, 0x62, 0x1b, 0x5a, 0xd8, 0x85 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xe0, 0x00, 0x00, 0x00 + }, { + 0x08, 0x2e, 0xb8, 0xbe, 0x35, 0xf4, 0x42, 0xfb, + 0x52, 0x66, 0x8e, 0x16, 0xa5, 0x91, 0xd1, 0xd6 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 + }, { + 0xe6, 0x56, 0xf9, 0xec, 0xf5, 0xfe, 0x27, 0xec, + 0x3e, 0x4a, 0x73, 0xd0, 0x0c, 0x28, 0x2f, 0xb3 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xf8, 0x00, 0x00, 0x00 + }, { + 0x2c, 0xa8, 0x20, 0x9d, 0x63, 0x27, 0x4c, 0xd9, + 0xa2, 0x9b, 0xb7, 0x4b, 0xcd, 0x77, 0x68, 0x3a + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xfc, 0x00, 0x00, 0x00 + }, { + 0x79, 0xbf, 0x5d, 0xce, 0x14, 0xbb, 0x7d, 0xd7, + 0x3a, 0x8e, 0x36, 0x11, 0xde, 0x7c, 0xe0, 0x26 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xfe, 0x00, 0x00, 0x00 + }, { + 0x3c, 0x84, 0x99, 0x39, 0xa5, 0xd2, 0x93, 0x99, + 0xf3, 0x44, 0xc4, 0xa0, 0xec, 0xa8, 0xa5, 0x76 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 + }, { + 0xed, 0x3c, 0x0a, 0x94, 0xd5, 0x9b, 0xec, 0xe9, + 0x88, 0x35, 0xda, 0x7a, 0xa4, 0xf0, 0x7c, 0xa2 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00 + }, { + 0x63, 0x91, 0x9e, 0xd4, 0xce, 0x10, 0x19, 0x64, + 0x38, 0xb6, 0xad, 0x09, 0xd9, 0x9c, 0xd7, 0x95 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xc0, 0x00, 0x00 + }, { + 0x76, 0x78, 0xf3, 0xa8, 0x33, 0xf1, 0x9f, 0xea, + 0x95, 0xf3, 0xc6, 0x02, 0x9e, 0x2b, 0xc6, 0x10 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xe0, 0x00, 0x00 + }, { + 0x3a, 0xa4, 0x26, 0x83, 0x10, 0x67, 0xd3, 0x6b, + 0x92, 0xbe, 0x7c, 0x5f, 0x81, 0xc1, 0x3c, 0x56 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00 + }, { + 0x92, 0x72, 0xe2, 0xd2, 0xcd, 0xd1, 0x10, 0x50, + 0x99, 0x8c, 0x84, 0x50, 0x77, 0xa3, 0x0e, 0xa0 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x00, 0x00 + }, { + 0x08, 0x8c, 0x4b, 0x53, 0xf5, 0xec, 0x0f, 0xf8, + 0x14, 0xc1, 0x9a, 0xda, 0xe7, 0xf6, 0x24, 0x6c + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0x00, 0x00 + }, { + 0x40, 0x10, 0xa5, 0xe4, 0x01, 0xfd, 0xf0, 0xa0, + 0x35, 0x4d, 0xdb, 0xcc, 0x0d, 0x01, 0x2b, 0x17 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0x00, 0x00 + }, { + 0xa8, 0x7a, 0x38, 0x57, 0x36, 0xc0, 0xa6, 0x18, + 0x9b, 0xd6, 0x58, 0x9b, 0xd8, 0x44, 0x5a, 0x93 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 + }, { + 0x54, 0x5f, 0x2b, 0x83, 0xd9, 0x61, 0x6d, 0xcc, + 0xf6, 0x0f, 0xa9, 0x83, 0x0e, 0x9c, 0xd2, 0x87 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80, 0x00 + }, { + 0x4b, 0x70, 0x6f, 0x7f, 0x92, 0x40, 0x63, 0x52, + 0x39, 0x40, 0x37, 0xa6, 0xd4, 0xf4, 0x68, 0x8d + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc0, 0x00 + }, { + 0xb7, 0x97, 0x2b, 0x39, 0x41, 0xc4, 0x4b, 0x90, + 0xaf, 0xa7, 0xb2, 0x64, 0xbf, 0xba, 0x73, 0x87 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe0, 0x00 + }, { + 0x6f, 0x45, 0x73, 0x2c, 0xf1, 0x08, 0x81, 0x54, + 0x6f, 0x0f, 0xd2, 0x38, 0x96, 0xd2, 0xbb, 0x60 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0, 0x00 + }, { + 0x2e, 0x35, 0x79, 0xca, 0x15, 0xaf, 0x27, 0xf6, + 0x4b, 0x3c, 0x95, 0x5a, 0x5b, 0xfc, 0x30, 0xba + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x00 + }, { + 0x34, 0xa2, 0xc5, 0xa9, 0x1a, 0xe2, 0xae, 0xc9, + 0x9b, 0x7d, 0x1b, 0x5f, 0xa6, 0x78, 0x04, 0x47 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0x00 + }, { + 0xa4, 0xd6, 0x61, 0x6b, 0xd0, 0x4f, 0x87, 0x33, + 0x5b, 0x0e, 0x53, 0x35, 0x12, 0x27, 0xa9, 0xee + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0x00 + }, { + 0x7f, 0x69, 0x2b, 0x03, 0x94, 0x58, 0x67, 0xd1, + 0x61, 0x79, 0xa8, 0xce, 0xfc, 0x83, 0xea, 0x3f + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 + }, { + 0x3b, 0xd1, 0x41, 0xee, 0x84, 0xa0, 0xe6, 0x41, + 0x4a, 0x26, 0xe7, 0xa4, 0xf2, 0x81, 0xf8, 0xa2 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 + }, { + 0xd1, 0x78, 0x8f, 0x57, 0x2d, 0x98, 0xb2, 0xb1, + 0x6e, 0xc5, 0xd5, 0xf3, 0x92, 0x2b, 0x99, 0xbc + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc0 + }, { + 0x08, 0x33, 0xff, 0x6f, 0x61, 0xd9, 0x8a, 0x57, + 0xb2, 0x88, 0xe8, 0xc3, 0x58, 0x6b, 0x85, 0xa6 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe0 + }, { + 0x85, 0x68, 0x26, 0x17, 0x97, 0xde, 0x17, 0x6b, + 0xf0, 0xb4, 0x3b, 0xec, 0xc6, 0x28, 0x5a, 0xfb + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0 + }, { + 0xf9, 0xb0, 0xfd, 0xa0, 0xc4, 0xa8, 0x98, 0xf5, + 0xb9, 0xe6, 0xf6, 0x61, 0xc4, 0xce, 0x4d, 0x07 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf8 + }, { + 0x8a, 0xde, 0x89, 0x59, 0x13, 0x68, 0x5c, 0x67, + 0xc5, 0x26, 0x9f, 0x8a, 0xae, 0x42, 0x98, 0x3e + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc + }, { + 0x39, 0xbd, 0xe6, 0x7d, 0x5c, 0x8e, 0xd8, 0xa8, + 0xb1, 0xc3, 0x7e, 0xb8, 0xfa, 0x9f, 0x5a, 0xc0 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe + }, { + 0x5c, 0x00, 0x5e, 0x72, 0xc1, 0x41, 0x8c, 0x44, + 0xf5, 0x69, 0xf2, 0xea, 0x33, 0xba, 0x54, 0xf3 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff + }, { + 0x3f, 0x5b, 0x8c, 0xc9, 0xea, 0x85, 0x5a, 0x0a, + 0xfa, 0x73, 0x47, 0xd2, 0x3e, 0x8d, 0x66, 0x4e + } } + }; + struct tc_aes_key_sched_struct s; + unsigned int i; + + TC_PRINT("AES128 %s (NIST fixed-key and variable-text):\n", __func__); + + (void)tc_aes128_set_encrypt_key(&s, key); + + for (i = 0; i < 128; ++i) { + result = var_text_test(i, kat_tbl[i].in, kat_tbl[i].out, &s); + if (result == TC_FAIL) { + break; + } + } + + TC_END_RESULT(result); + + return result; +} + +int var_key_test(unsigned int r, const uint8_t *in, const uint8_t *out) +{ + int result = TC_PASS; + + const uint8_t plaintext[NUM_OF_NIST_KEYS] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }; + uint8_t ciphertext[NUM_OF_NIST_KEYS]; + struct tc_aes_key_sched_struct s; + + (void)tc_aes128_set_encrypt_key(&s, in); + + (void)tc_aes_encrypt(ciphertext, plaintext, &s); + result = check_result(r, out, NUM_OF_NIST_KEYS, ciphertext, + sizeof(ciphertext)); + + return result; +} + +/* + * All NIST tests with variable key and fixed text. + */ +int test_4(void) +{ + int result = TC_PASS; + const struct kat_table kat_tbl[NUM_OF_FIXED_KEYS] = { + {{ + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x0e, 0xdd, 0x33, 0xd3, 0xc6, 0x21, 0xe5, 0x46, + 0x45, 0x5b, 0xd8, 0xba, 0x14, 0x18, 0xbe, 0xc8 + } }, + {{ + 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x4b, 0xc3, 0xf8, 0x83, 0x45, 0x0c, 0x11, 0x3c, + 0x64, 0xca, 0x42, 0xe1, 0x11, 0x2a, 0x9e, 0x87 + } }, + {{ + 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x72, 0xa1, 0xda, 0x77, 0x0f, 0x5d, 0x7a, 0xc4, + 0xc9, 0xef, 0x94, 0xd8, 0x22, 0xaf, 0xfd, 0x97 + } }, + {{ + 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x97, 0x00, 0x14, 0xd6, 0x34, 0xe2, 0xb7, 0x65, + 0x07, 0x77, 0xe8, 0xe8, 0x4d, 0x03, 0xcc, 0xd8 + } }, + {{ + 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xf1, 0x7e, 0x79, 0xae, 0xd0, 0xdb, 0x7e, 0x27, + 0x9e, 0x95, 0x5b, 0x5f, 0x49, 0x38, 0x75, 0xa7 + } }, + {{ + 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x9e, 0xd5, 0xa7, 0x51, 0x36, 0xa9, 0x40, 0xd0, + 0x96, 0x3d, 0xa3, 0x79, 0xdb, 0x4a, 0xf2, 0x6a + } }, + {{ + 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xc4, 0x29, 0x5f, 0x83, 0x46, 0x5c, 0x77, 0x55, + 0xe8, 0xfa, 0x36, 0x4b, 0xac, 0x6a, 0x7e, 0xa5 + } }, + {{ + 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xb1, 0xd7, 0x58, 0x25, 0x6b, 0x28, 0xfd, 0x85, + 0x0a, 0xd4, 0x94, 0x42, 0x08, 0xcf, 0x11, 0x55 + } }, + {{ + 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x42, 0xff, 0xb3, 0x4c, 0x74, 0x3d, 0xe4, 0xd8, + 0x8c, 0xa3, 0x80, 0x11, 0xc9, 0x90, 0x89, 0x0b + } }, + {{ + 0xff, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x99, 0x58, 0xf0, 0xec, 0xea, 0x8b, 0x21, 0x72, + 0xc0, 0xc1, 0x99, 0x5f, 0x91, 0x82, 0xc0, 0xf3 + } }, + {{ + 0xff, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x95, 0x6d, 0x77, 0x98, 0xfa, 0xc2, 0x0f, 0x82, + 0xa8, 0x82, 0x3f, 0x98, 0x4d, 0x06, 0xf7, 0xf5 + } }, + {{ + 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xa0, 0x1b, 0xf4, 0x4f, 0x2d, 0x16, 0xbe, 0x92, + 0x8c, 0xa4, 0x4a, 0xaf, 0x7b, 0x9b, 0x10, 0x6b + } }, + {{ + 0xff, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xb5, 0xf1, 0xa3, 0x3e, 0x50, 0xd4, 0x0d, 0x10, + 0x37, 0x64, 0xc7, 0x6b, 0xd4, 0xc6, 0xb6, 0xf8 + } }, + {{ + 0xff, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x26, 0x37, 0x05, 0x0c, 0x9f, 0xc0, 0xd4, 0x81, + 0x7e, 0x2d, 0x69, 0xde, 0x87, 0x8a, 0xee, 0x8d + } }, + {{ + 0xff, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x11, 0x3e, 0xcb, 0xe4, 0xa4, 0x53, 0x26, 0x9a, + 0x0d, 0xd2, 0x60, 0x69, 0x46, 0x7f, 0xb5, 0xb5 + } }, + {{ + 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x97, 0xd0, 0x75, 0x4f, 0xe6, 0x8f, 0x11, 0xb9, + 0xe3, 0x75, 0xd0, 0x70, 0xa6, 0x08, 0xc8, 0x84 + } }, + {{ + 0xff, 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xc6, 0xa0, 0xb3, 0xe9, 0x98, 0xd0, 0x50, 0x68, + 0xa5, 0x39, 0x97, 0x78, 0x40, 0x52, 0x00, 0xb4 + } }, + {{ + 0xff, 0xff, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00 + }, { + 0x84, 0xbe, 0x19, 0xe0, 0x53, 0x63, 0x5f, 0x09, + 0xf2, 0x66, 0x5e, 0x7b, 0xae, 0x85, 0xb4, 0x2d + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x32, 0xcd, 0x65, 0x28, 0x42, 0x92, 0x6a, 0xea, + 0x4a, 0xa6, 0x13, 0x7b, 0xb2, 0xbe, 0x2b, 0x5e + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x49, 0x3d, 0x4a, 0x4f, 0x38, 0xeb, 0xb3, 0x37, + 0xd1, 0x0a, 0xa8, 0x4e, 0x91, 0x71, 0xa5, 0x54 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xd9, 0xbf, 0xf7, 0xff, 0x45, 0x4b, 0x0e, 0xc5, + 0xa4, 0xa2, 0xa6, 0x95, 0x66, 0xe2, 0xcb, 0x84 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x35, 0x35, 0xd5, 0x65, 0xac, 0xe3, 0xf3, 0x1e, + 0xb2, 0x49, 0xba, 0x2c, 0xc6, 0x76, 0x5d, 0x7a + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xf6, 0x0e, 0x91, 0xfc, 0x32, 0x69, 0xee, 0xcf, + 0x32, 0x31, 0xc6, 0xe9, 0x94, 0x56, 0x97, 0xc6 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xab, 0x69, 0xcf, 0xad, 0xf5, 0x1f, 0x8e, 0x60, + 0x4d, 0x9c, 0xc3, 0x71, 0x82, 0xf6, 0x63, 0x5a + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x78, 0x66, 0x37, 0x3f, 0x24, 0xa0, 0xb6, 0xed, + 0x56, 0xe0, 0xd9, 0x6f, 0xcd, 0xaf, 0xb8, 0x77 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x1e, 0xa4, 0x48, 0xc2, 0xaa, 0xc9, 0x54, 0xf5, + 0xd8, 0x12, 0xe9, 0xd7, 0x84, 0x94, 0x44, 0x6a + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xac, 0xc5, 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0xff, 0xff, 0xff, + 0xff, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x28, 0x4c, 0xa2, 0xfa, 0x35, 0x80, 0x7b, 0x8b, + 0x0a, 0xe4, 0xd1, 0x9e, 0x11, 0xd7, 0xdb, 0xd7 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xf2, 0xe9, 0x76, 0x87, 0x57, 0x55, 0xf9, 0x40, + 0x1d, 0x54, 0xf3, 0x6e, 0x2a, 0x23, 0xa5, 0x94 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xec, 0x19, 0x8a, 0x18, 0xe1, 0x0e, 0x53, 0x24, + 0x03, 0xb7, 0xe2, 0x08, 0x87, 0xc8, 0xdd, 0x80 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x54, 0x5d, 0x50, 0xeb, 0xd9, 0x19, 0xe4, 0xa6, + 0x94, 0x9d, 0x96, 0xad, 0x47, 0xe4, 0x6a, 0x80 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xdb, 0xdf, 0xb5, 0x27, 0x06, 0x0e, 0x0a, 0x71, + 0x00, 0x9c, 0x7b, 0xb0, 0xc6, 0x8f, 0x1d, 0x44 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x9c, 0xfa, 0x13, 0x22, 0xea, 0x33, 0xda, 0x21, + 0x73, 0xa0, 0x24, 0xf2, 0xff, 0x0d, 0x89, 0x6d + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x87, 0x85, 0xb1, 0xa7, 0x5b, 0x0f, 0x3b, 0xd9, + 0x58, 0xdc, 0xd0, 0xe2, 0x93, 0x18, 0xc5, 0x21 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x38, 0xf6, 0x7b, 0x9e, 0x98, 0xe4, 0xa9, 0x7b, + 0x6d, 0xf0, 0x30, 0xa9, 0xfc, 0xdd, 0x01, 0x04 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x19, 0x2a, 0xff, 0xfb, 0x2c, 0x88, 0x0e, 0x82, + 0xb0, 0x59, 0x26, 0xd0, 0xfc, 0x6c, 0x44, 0x8b + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0x6a, 0x79, 0x80, 0xce, 0x7b, 0x10, 0x5c, 0xf5, + 0x30, 0x95, 0x2d, 0x74, 0xda, 0xaf, 0x79, 0x8c + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 + }, { + 0xea, 0x36, 0x95, 0xe1, 0x35, 0x1b, 0x9d, 0x68, + 0x58, 0xbd, 0x95, 0x8c, 0xf5, 0x13, 0xef, 0x6c + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, 0x00, 0x00 + }, { + 0x6d, 0xa0, 0x49, 0x0b, 0xa0, 0xba, 0x03, 0x43, + 0xb9, 0x35, 0x68, 0x1d, 0x2c, 0xce, 0x5b, 0xa1 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xc0, 0x00, 0x00, 0x00, 0x00 + }, { + 0xf0, 0xea, 0x23, 0xaf, 0x08, 0x53, 0x40, 0x11, + 0xc6, 0x00, 0x09, 0xab, 0x29, 0xad, 0xa2, 0xf1 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xe0, 0x00, 0x00, 0x00, 0x00 + }, { + 0xff, 0x13, 0x80, 0x6c, 0xf1, 0x9c, 0xc3, 0x87, + 0x21, 0x55, 0x4d, 0x7c, 0x0f, 0xcd, 0xcd, 0x4b + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 + }, { + 0x68, 0x38, 0xaf, 0x1f, 0x4f, 0x69, 0xba, 0xe9, + 0xd8, 0x5d, 0xd1, 0x88, 0xdc, 0xdf, 0x06, 0x88 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xf8, 0x00, 0x00, 0x00, 0x00 + }, { + 0x36, 0xcf, 0x44, 0xc9, 0x2d, 0x55, 0x0b, 0xfb, + 0x1e, 0xd2, 0x8e, 0xf5, 0x83, 0xdd, 0xf5, 0xd7 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xfc, 0x00, 0x00, 0x00, 0x00 + }, { + 0xd0, 0x6e, 0x31, 0x95, 0xb5, 0x37, 0x6f, 0x10, + 0x9d, 0x5c, 0x4e, 0xc6, 0xc5, 0xd6, 0x2c, 0xed + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xfe, 0x00, 0x00, 0x00, 0x00 + }, { + 0xc4, 0x40, 0xde, 0x01, 0x4d, 0x3d, 0x61, 0x07, + 0x07, 0x27, 0x9b, 0x13, 0x24, 0x2a, 0x5c, 0x36 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 + }, { + 0xf0, 0xc5, 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0x5b, 0x67, 0x9d, 0x3a, 0x2c, 0x97, 0xfe + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xc0, 0x00, 0x00 + }, { + 0x92, 0x41, 0xda, 0xca, 0x4f, 0xdd, 0x03, 0x4a, + 0x82, 0x37, 0x2d, 0xb5, 0x0e, 0x1a, 0x0f, 0x3f + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xe0, 0x00, 0x00 + }, { + 0xc1, 0x45, 0x74, 0xd9, 0xcd, 0x00, 0xcf, 0x2b, + 0x5a, 0x7f, 0x77, 0xe5, 0x3c, 0xd5, 0x78, 0x85 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00 + }, { + 0x79, 0x3d, 0xe3, 0x92, 0x36, 0x57, 0x0a, 0xba, + 0x83, 0xab, 0x9b, 0x73, 0x7c, 0xb5, 0x21, 0xc9 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x00, 0x00 + }, { + 0x16, 0x59, 0x1c, 0x0f, 0x27, 0xd6, 0x0e, 0x29, + 0xb8, 0x5a, 0x96, 0xc3, 0x38, 0x61, 0xa7, 0xef + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0x00, 0x00 + }, { + 0x44, 0xfb, 0x5c, 0x4d, 0x4f, 0x5c, 0xb7, 0x9b, + 0xe5, 0xc1, 0x74, 0xa3, 0xb1, 0xc9, 0x73, 0x48 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0x00, 0x00 + }, { + 0x67, 0x4d, 0x2b, 0x61, 0x63, 0x3d, 0x16, 0x2b, + 0xe5, 0x9d, 0xde, 0x04, 0x22, 0x2f, 0x47, 0x40 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 + }, { + 0xb4, 0x75, 0x0f, 0xf2, 0x63, 0xa6, 0x5e, 0x1f, + 0x9e, 0x92, 0x4c, 0xcf, 0xd9, 0x8f, 0x3e, 0x37 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80, 0x00 + }, { + 0x62, 0xd0, 0x66, 0x2d, 0x6e, 0xae, 0xdd, 0xed, + 0xeb, 0xae, 0x7f, 0x7e, 0xa3, 0xa4, 0xf6, 0xb6 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc0, 0x00 + }, { + 0x70, 0xc4, 0x6b, 0xb3, 0x06, 0x92, 0xbe, 0x65, + 0x7f, 0x7e, 0xaa, 0x93, 0xeb, 0xad, 0x98, 0x97 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe0, 0x00 + }, { + 0x32, 0x39, 0x94, 0xcf, 0xb9, 0xda, 0x28, 0x5a, + 0x5d, 0x96, 0x42, 0xe1, 0x75, 0x9b, 0x22, 0x4a + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0, 0x00 + }, { + 0x1d, 0xbf, 0x57, 0x87, 0x7b, 0x7b, 0x17, 0x38, + 0x5c, 0x85, 0xd0, 0xb5, 0x48, 0x51, 0xe3, 0x71 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x00 + }, { + 0xdf, 0xa5, 0xc0, 0x97, 0xcd, 0xc1, 0x53, 0x2a, + 0xc0, 0x71, 0xd5, 0x7b, 0x1d, 0x28, 0xd1, 0xbd + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0x00 + }, { + 0x3a, 0x0c, 0x53, 0xfa, 0x37, 0x31, 0x1f, 0xc1, + 0x0b, 0xd2, 0xa9, 0x98, 0x1f, 0x51, 0x31, 0x74 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0x00 + }, { + 0xba, 0x4f, 0x97, 0x0c, 0x0a, 0x25, 0xc4, 0x18, + 0x14, 0xbd, 0xae, 0x2e, 0x50, 0x6b, 0xe3, 0xb4 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 + }, { + 0x2d, 0xce, 0x3a, 0xcb, 0x72, 0x7c, 0xd1, 0x3c, + 0xcd, 0x76, 0xd4, 0x25, 0xea, 0x56, 0xe4, 0xf6 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 + }, { + 0x51, 0x60, 0x47, 0x4d, 0x50, 0x4b, 0x9b, 0x3e, + 0xef, 0xb6, 0x8d, 0x35, 0xf2, 0x45, 0xf4, 0xb3 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc0 + }, { + 0x41, 0xa8, 0xa9, 0x47, 0x76, 0x66, 0x35, 0xde, + 0xc3, 0x75, 0x53, 0xd9, 0xa6, 0xc0, 0xcb, 0xb7 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe0 + }, { + 0x25, 0xd6, 0xcf, 0xe6, 0x88, 0x1f, 0x2b, 0xf4, + 0x97, 0xdd, 0x14, 0xcd, 0x4d, 0xdf, 0x44, 0x5b + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0 + }, { + 0x41, 0xc7, 0x8c, 0x13, 0x5e, 0xd9, 0xe9, 0x8c, + 0x09, 0x66, 0x40, 0x64, 0x72, 0x65, 0xda, 0x1e + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf8 + }, { + 0x5a, 0x4d, 0x40, 0x4d, 0x89, 0x17, 0xe3, 0x53, + 0xe9, 0x2a, 0x21, 0x07, 0x2c, 0x3b, 0x23, 0x05 + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc + }, { + 0x02, 0xbc, 0x96, 0x84, 0x6b, 0x3f, 0xdc, 0x71, + 0x64, 0x3f, 0x38, 0x4c, 0xd3, 0xcc, 0x3e, 0xaf + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe + }, { + 0x9b, 0xa4, 0xa9, 0x14, 0x3f, 0x4e, 0x5d, 0x40, + 0x48, 0x52, 0x1c, 0x4f, 0x88, 0x77, 0xd8, 0x8e + } }, + {{ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff + }, { + 0xa1, 0xf6, 0x25, 0x8c, 0x87, 0x7d, 0x5f, 0xcd, + 0x89, 0x64, 0x48, 0x45, 0x38, 0xbf, 0xc9, 0x2c + } } + }; + unsigned int i; + + TC_PRINT("AES128 test #4 (NIST variable-key and fixed-text):\n"); + + for (i = 0; i < NUM_OF_FIXED_KEYS; ++i) { + result = var_key_test(i, kat_tbl[i].in, kat_tbl[i].out); + if (result == TC_FAIL) { + break; + } + + } + + TC_END_RESULT(result); + + return result; +} + +/* + * Main task to test AES + */ +int main(void) +{ + int result = TC_PASS; + + TC_START("Performing AES128 tests:"); + + result = test_1(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("AES128 test #1 (NIST key schedule test) failed.\n"); + goto exitTest; + } + result = test_2(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("AES128 test #2 (NIST encryption test) failed.\n"); + goto exitTest; + } + result = test_3(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("AES128 test #3 (NIST fixed-key and variable-text) " + "failed.\n"); + goto exitTest; + } + result = test_4(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("AES128 test #4 (NIST variable-key and fixed-text) " + "failed.\n"); + goto exitTest; + } + + TC_PRINT("All AES128 tests succeeded!\n"); + + exitTest: + TC_END_RESULT(result); + TC_END_REPORT(result); + + return result; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/test_cbc_mode.c b/bootloader/mcuboot/ext/tinycrypt/tests/test_cbc_mode.c new file mode 100644 index 0000000..ffa0a88 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/test_cbc_mode.c @@ -0,0 +1,177 @@ +/* test_cbc_mode.c - TinyCrypt implementation of some AES-CBC tests */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +/* + * DESCRIPTION + * This module tests the following AES-CBC Mode routines: + * + * Scenarios tested include: + * - AES128 CBC mode encryption SP 800-38a tests + */ + +#include +#include +#include + +#include +#include +#include + +/* + * NIST test vectors from SP 800-38a: + * + * Block #1 + * Plaintext 6bc1bee22e409f96e93d7e117393172a + * Input Block 6bc0bce12a459991e134741a7f9e1925 + * Output Block 7649abac8119b246cee98e9b12e9197d + * Ciphertext 7649abac8119b246cee98e9b12e9197d + * Block #2 + * Plaintext ae2d8a571e03ac9c9eb76fac45af8e51 + * Input Block d86421fb9f1a1eda505ee1375746972c + * Output Block 5086cb9b507219ee95db113a917678b2 + * Ciphertext 5086cb9b507219ee95db113a917678b2 + * Block #3 + * Plaintext 30c81c46a35ce411e5fbc1191a0a52ef + * Input Block 604ed7ddf32efdff7020d0238b7c2a5d + * Output Block 73bed6b8e3c1743b7116e69e22229516 + * Ciphertext 73bed6b8e3c1743b7116e69e22229516 + * Block #4 + * Plaintext f69f2445df4f9b17ad2b417be66c3710 + * Input Block 8521f2fd3c8eef2cdc3da7e5c44ea206 + * Output Block 3ff1caa1681fac09120eca307586e1a7 + * Ciphertext 3ff1caa1681fac09120eca307586e1a7 + */ +const uint8_t key[16] = { + 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, 0xab, 0xf7, 0x15, 0x88, + 0x09, 0xcf, 0x4f, 0x3c +}; + +const uint8_t iv[16] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, + 0x0c, 0x0d, 0x0e, 0x0f +}; + +const uint8_t plaintext[64] = { + 0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96, 0xe9, 0x3d, 0x7e, 0x11, + 0x73, 0x93, 0x17, 0x2a, 0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c, + 0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51, 0x30, 0xc8, 0x1c, 0x46, + 0xa3, 0x5c, 0xe4, 0x11, 0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef, + 0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17, 0xad, 0x2b, 0x41, 0x7b, + 0xe6, 0x6c, 0x37, 0x10 +}; + +const uint8_t ciphertext[80] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, + 0x0c, 0x0d, 0x0e, 0x0f, 0x76, 0x49, 0xab, 0xac, 0x81, 0x19, 0xb2, 0x46, + 0xce, 0xe9, 0x8e, 0x9b, 0x12, 0xe9, 0x19, 0x7d, 0x50, 0x86, 0xcb, 0x9b, + 0x50, 0x72, 0x19, 0xee, 0x95, 0xdb, 0x11, 0x3a, 0x91, 0x76, 0x78, 0xb2, + 0x73, 0xbe, 0xd6, 0xb8, 0xe3, 0xc1, 0x74, 0x3b, 0x71, 0x16, 0xe6, 0x9e, + 0x22, 0x22, 0x95, 0x16, 0x3f, 0xf1, 0xca, 0xa1, 0x68, 0x1f, 0xac, 0x09, + 0x12, 0x0e, 0xca, 0x30, 0x75, 0x86, 0xe1, 0xa7 +}; + +/* + * NIST SP 800-38a CBC Test for encryption and decryption. + */ +int test_1_and_2(void) +{ + struct tc_aes_key_sched_struct a; + uint8_t iv_buffer[16]; + uint8_t encrypted[80]; + uint8_t decrypted[64]; + uint8_t *p; + unsigned int length; + int result = TC_PASS; + + (void)tc_aes128_set_encrypt_key(&a, key); + + (void)memcpy(iv_buffer, iv, TC_AES_BLOCK_SIZE); + + TC_PRINT("CBC test #1 (encryption SP 800-38a tests):\n"); + if (tc_cbc_mode_encrypt(encrypted, sizeof(plaintext) + TC_AES_BLOCK_SIZE, + plaintext, sizeof(plaintext), iv_buffer, &a) == 0) { + TC_ERROR("CBC test #1 (encryption SP 800-38a tests) failed in " + "%s.\n", __func__); + result = TC_FAIL; + goto exitTest1; + } + + result = check_result(1, ciphertext, sizeof(encrypted), encrypted, + sizeof(encrypted)); + TC_END_RESULT(result); + + TC_PRINT("CBC test #2 (decryption SP 800-38a tests):\n"); + (void)tc_aes128_set_decrypt_key(&a, key); + + p = &encrypted[TC_AES_BLOCK_SIZE]; + length = ((unsigned int) sizeof(encrypted)) - TC_AES_BLOCK_SIZE; + + if (tc_cbc_mode_decrypt(decrypted, length - TC_AES_BLOCK_SIZE, p, length, + encrypted, &a) == 0) { + TC_ERROR("CBC test #2 (decryption SP 800-38a tests) failed in. " + "%s\n", __func__); + result = TC_FAIL; + goto exitTest1; + } + + result = check_result(2, plaintext, sizeof(decrypted), decrypted, + sizeof(decrypted)); + +exitTest1: + TC_END_RESULT(result); + return result; +} + +/* + * Main task to test AES + */ +int main(void) +{ + int result = TC_PASS; + + TC_START("Performing AES128 tests:"); + + TC_PRINT("Performing CBC tests:\n"); + result = test_1_and_2(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("CBC test #1 failed.\n"); + goto exitTest; + } + + TC_PRINT("All CBC tests succeeded!\n"); + +exitTest: + TC_END_RESULT(result); + TC_END_REPORT(result); + + return result; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/test_ccm_mode.c b/bootloader/mcuboot/ext/tinycrypt/tests/test_ccm_mode.c new file mode 100644 index 0000000..878edb3 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/test_ccm_mode.c @@ -0,0 +1,545 @@ +/* test_ccm_mode.c - TinyCrypt AES-CCM tests (RFC 3610 tests) */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * DESCRIPTION + * This module tests the following AES-CCM Mode routines: + * + * Scenarios tested include: + * - AES128 CCM mode encryption RFC 3610 test vector #1 + * - AES128 CCM mode encryption RFC 3610 test vector #2 + * - AES128 CCM mode encryption RFC 3610 test vector #3 + * - AES128 CCM mode encryption RFC 3610 test vector #7 + * - AES128 CCM mode encryption RFC 3610 test vector #8 + * - AES128 CCM mode encryption RFC 3610 test vector #9 + * - AES128 CCM mode encryption No associated data + * - AES128 CCM mode encryption No payload data + */ + +#include +#include +#include + +#include + +#define TC_CCM_MAX_CT_SIZE 50 +#define TC_CCM_MAX_PT_SIZE 25 +#define NUM_NIST_KEYS 16 +#define NONCE_LEN 13 +#define HEADER_LEN 8 +#define M_LEN8 8 +#define M_LEN10 10 +#define DATA_BUF_LEN23 23 +#define DATA_BUF_LEN24 24 +#define DATA_BUF_LEN25 25 +#define EXPECTED_BUF_LEN31 31 +#define EXPECTED_BUF_LEN32 32 +#define EXPECTED_BUF_LEN33 33 +#define EXPECTED_BUF_LEN34 34 +#define EXPECTED_BUF_LEN35 35 + +int do_test(const uint8_t *key, uint8_t *nonce, + size_t nlen, const uint8_t *hdr, + size_t hlen, const uint8_t *data, + size_t dlen, const uint8_t *expected, + size_t elen, const int mlen) +{ + + int result = TC_PASS; + + uint8_t ciphertext[TC_CCM_MAX_CT_SIZE]; + uint8_t decrypted[TC_CCM_MAX_PT_SIZE]; + struct tc_ccm_mode_struct c; + struct tc_aes_key_sched_struct sched; + + tc_aes128_set_encrypt_key(&sched, key); + + result = tc_ccm_config(&c, &sched, nonce, nlen, mlen); + if (result == 0) { + TC_ERROR("CCM config failed in %s.\n", __func__); + + result = TC_FAIL; + goto exitTest1; + } + + result = tc_ccm_generation_encryption(ciphertext, TC_CCM_MAX_CT_SIZE, hdr, + hlen, data, dlen, &c); + if (result == 0) { + TC_ERROR("ccm_encrypt failed in %s.\n", __func__); + + result = TC_FAIL; + goto exitTest1; + } + + + if (memcmp(expected, ciphertext, elen) != 0) { + TC_ERROR("ccm_encrypt produced wrong ciphertext in %s.\n", + __func__); + show_str("\t\tExpected", expected, elen); + show_str("\t\tComputed", ciphertext, elen); + + result = TC_FAIL; + goto exitTest1; + } + + result = tc_ccm_decryption_verification(decrypted, TC_CCM_MAX_PT_SIZE, hdr, + hlen, ciphertext, dlen+mlen, &c); + if (result == 0) { + TC_ERROR("ccm_decrypt failed in %s.\n", __func__); + show_str("\t\tExpected", data, dlen); + show_str("\t\tComputed", decrypted, sizeof(decrypted)); + + result = TC_FAIL; + goto exitTest1; + } + + result = TC_PASS; + +exitTest1: + TC_END_RESULT(result); + return result; +} + +int test_vector_1(void) +{ + int result = TC_PASS; + /* RFC 3610 test vector #1 */ + const uint8_t key[NUM_NIST_KEYS] = { + 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, + 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf + }; + uint8_t nonce[NONCE_LEN] = { + 0x00, 0x00, 0x00, 0x03, 0x02, 0x01, 0x00, 0xa0, + 0xa1, 0xa2, 0xa3, 0xa4, 0xa5 + }; + const uint8_t hdr[HEADER_LEN] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 + }; + const uint8_t data[DATA_BUF_LEN23] = { + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e + }; + const uint8_t expected[EXPECTED_BUF_LEN31] = { + 0x58, 0x8c, 0x97, 0x9a, 0x61, 0xc6, 0x63, 0xd2, + 0xf0, 0x66, 0xd0, 0xc2, 0xc0, 0xf9, 0x89, 0x80, + 0x6d, 0x5f, 0x6b, 0x61, 0xda, 0xc3, 0x84, 0x17, + 0xe8, 0xd1, 0x2c, 0xfd, 0xf9, 0x26, 0xe0 + }; + uint16_t mlen = M_LEN8; + + TC_PRINT("%s: Performing CCM test #1 (RFC 3610 test vector #1):\n", + __func__); + + result = do_test(key, nonce, sizeof(nonce), hdr, sizeof(hdr), + data, sizeof(data), expected, sizeof(expected), mlen); + + return result; +} + +int test_vector_2(void) +{ + int result = TC_PASS; + /* RFC 3610 test vector #2 */ + const uint8_t key[NUM_NIST_KEYS] = { + 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, + 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf + }; + uint8_t nonce[NONCE_LEN] = { + 0x00, 0x00, 0x00, 0x04, 0x03, 0x02, 0x01, 0xa0, + 0xa1, 0xa2, 0xa3, 0xa4, 0xa5 + }; + const uint8_t hdr[HEADER_LEN] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 + }; + const uint8_t data[DATA_BUF_LEN24] = { + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f + }; + const uint8_t expected[EXPECTED_BUF_LEN32] = { + 0x72, 0xc9, 0x1a, 0x36, 0xe1, 0x35, 0xf8, 0xcf, + 0x29, 0x1c, 0xa8, 0x94, 0x08, 0x5c, 0x87, 0xe3, + 0xcc, 0x15, 0xc4, 0x39, 0xc9, 0xe4, 0x3a, 0x3b, + 0xa0, 0x91, 0xd5, 0x6e, 0x10, 0x40, 0x09, 0x16 + }; + uint16_t mlen = M_LEN8; + + TC_PRINT("%s: Performing CCM test #2 (RFC 3610 test vector #2):\n", + __func__); + + result = do_test(key, nonce, sizeof(nonce), hdr, sizeof(hdr), + data, sizeof(data), expected, sizeof(expected), mlen); + + return result; +} + +int test_vector_3(void) +{ + int result = TC_PASS; + /* RFC 3610 test vector #3 */ + const uint8_t key[NUM_NIST_KEYS] = { + 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, + 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf + }; + uint8_t nonce[NONCE_LEN] = { + 0x00, 0x00, 0x00, 0x05, 0x04, 0x03, 0x02, 0xa0, + 0xa1, 0xa2, 0xa3, 0xa4, 0xa5 + }; + const uint8_t hdr[HEADER_LEN] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 + }; + const uint8_t data[DATA_BUF_LEN25] = { + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, + 0x20 + }; + const uint8_t expected[EXPECTED_BUF_LEN33] = { + 0x51, 0xb1, 0xe5, 0xf4, 0x4a, 0x19, 0x7d, 0x1d, + 0xa4, 0x6b, 0x0f, 0x8e, 0x2d, 0x28, 0x2a, 0xe8, + 0x71, 0xe8, 0x38, 0xbb, 0x64, 0xda, 0x85, 0x96, + 0x57, 0x4a, 0xda, 0xa7, 0x6f, 0xbd, 0x9f, 0xb0, + 0xc5 + }; + uint16_t mlen = M_LEN8; + + TC_PRINT("%s: Performing CCM test #3 (RFC 3610 test vector #3):\n", + __func__); + + result = do_test(key, nonce, sizeof(nonce), hdr, sizeof(hdr), data, + sizeof(data), expected, sizeof(expected), mlen); + + return result; +} + +int test_vector_4(void) +{ + int result = TC_PASS; + /* RFC 3610 test vector #7 */ + const uint8_t key[NUM_NIST_KEYS] = { + 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, + 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf + }; + uint8_t nonce[NONCE_LEN] = { + 0x00, 0x00, 0x00, 0x09, 0x08, 0x07, 0x06, 0xa0, + 0xa1, 0xa2, 0xa3, 0xa4, 0xa5 + }; + const uint8_t hdr[HEADER_LEN] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 + }; + const uint8_t data[DATA_BUF_LEN23] = { + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e + }; + const uint8_t expected[EXPECTED_BUF_LEN33] = { + 0x01, 0x35, 0xD1, 0xB2, 0xC9, 0x5F, 0x41, 0xD5, + 0xD1, 0xD4, 0xFE, 0xC1, 0x85, 0xD1, 0x66, 0xB8, + 0x09, 0x4E, 0x99, 0x9D, 0xFE, 0xD9, 0x6C, 0x04, + 0x8C, 0x56, 0x60, 0x2C, 0x97, 0xAC, 0xBB, 0x74, + 0x90 + }; + uint16_t mlen = M_LEN10; + + TC_PRINT("%s: Performing CCM test #4 (RFC 3610 test vector #7):\n", + __func__); + + result = do_test(key, nonce, sizeof(nonce), hdr, sizeof(hdr), + data, sizeof(data), expected, sizeof(expected), mlen); + + return result; +} + +int test_vector_5(void) +{ + int result = TC_PASS; + /* RFC 3610 test vector #8 */ + const uint8_t key[NUM_NIST_KEYS] = { + 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, + 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF + }; + uint8_t nonce[NONCE_LEN] = { + 0x00, 0x00, 0x00, 0x0A, 0x09, 0x08, 0x07, 0xA0, + 0xA1, 0xA2, 0xA3, 0xA4, 0xA5 + }; + const uint8_t hdr[HEADER_LEN] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 + }; + const uint8_t data[DATA_BUF_LEN24] = { + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f + }; + const uint8_t expected[EXPECTED_BUF_LEN34] = { + 0x7B, 0x75, 0x39, 0x9A, 0xC0, 0x83, 0x1D, 0xD2, + 0xF0, 0xBB, 0xD7, 0x58, 0x79, 0xA2, 0xFD, 0x8F, + 0x6C, 0xAE, 0x6B, 0x6C, 0xD9, 0xB7, 0xDB, 0x24, + 0xC1, 0x7B, 0x44, 0x33, 0xF4, 0x34, 0x96, 0x3F, + 0x34, 0xB4 + }; + uint16_t mlen = M_LEN10; + + TC_PRINT("%s: Performing CCM test #5 (RFC 3610 test vector #8):\n", + __func__); + + result = do_test(key, nonce, sizeof(nonce), hdr, sizeof(hdr), + data, sizeof(data), expected, sizeof(expected), mlen); + + return result; +} + +int test_vector_6(void) +{ + int result = TC_PASS; + /* RFC 3610 test vector #9 */ + const uint8_t key[NUM_NIST_KEYS] = { + 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, + 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF + }; + uint8_t nonce[NONCE_LEN] = { + 0x00, 0x00, 0x00, 0x0B, 0x0A, 0x09, 0x08, 0xA0, + 0xA1, 0xA2, 0xA3, 0xA4, 0xA5 + }; + const uint8_t hdr[HEADER_LEN] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 + }; + const uint8_t data[DATA_BUF_LEN25] = { + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, + 0x20 + }; + const uint8_t expected[EXPECTED_BUF_LEN35] = { + 0x82, 0x53, 0x1a, 0x60, 0xCC, 0x24, 0x94, 0x5a, + 0x4b, 0x82, 0x79, 0x18, 0x1a, 0xb5, 0xc8, 0x4d, + 0xf2, 0x1c, 0xe7, 0xf9, 0xb7, 0x3f, 0x42, 0xe1, + 0x97, 0xea, 0x9c, 0x07, 0xe5, 0x6b, 0x5e, 0xb1, + 0x7e, 0x5f, 0x4e + }; + uint16_t mlen = M_LEN10; + + TC_PRINT("%s: Performing CCM test #6 (RFC 3610 test vector #9):\n", + __func__); + + result = do_test(key, nonce, sizeof(nonce), hdr, sizeof(hdr), + data, sizeof(data), expected, sizeof(expected), mlen); + + return result; +} + +int test_vector_7(void) +{ + int result = TC_PASS; + /* Test based on RFC 3610 test vector #9 but with no associated data */ + const uint8_t key[NUM_NIST_KEYS] = { + 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, + 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF + }; + uint8_t nonce[NONCE_LEN] = { + 0x00, 0x00, 0x00, 0x0B, 0x0A, 0x09, 0x08, 0xA0, + 0xA1, 0xA2, 0xA3, 0xA4, 0xA5 + }; + uint8_t *hdr = NULL; + + uint8_t data[DATA_BUF_LEN25] = { + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, + 0x20 + }; + struct tc_ccm_mode_struct c; + struct tc_aes_key_sched_struct sched; + uint8_t decrypted[TC_CCM_MAX_PT_SIZE]; + uint8_t ciphertext[TC_CCM_MAX_CT_SIZE]; + uint16_t mlen = M_LEN10; + + TC_PRINT("%s: Performing CCM test #7 (no associated data):\n", + __func__); + + tc_aes128_set_encrypt_key(&sched, key); + if (tc_ccm_config(&c, &sched, nonce, sizeof(nonce), mlen) == 0) { + TC_ERROR("ccm_config failed in %s.\n", __func__); + + result = TC_FAIL; + goto exitTest1; + } + + result = tc_ccm_generation_encryption(ciphertext, TC_CCM_MAX_CT_SIZE, hdr, + 0, data, sizeof(data), &c); + if (result == 0) { + TC_ERROR("ccm_encryption failed in %s.\n", __func__); + + result = TC_FAIL; + goto exitTest1; + } + + result = tc_ccm_decryption_verification (decrypted, TC_CCM_MAX_PT_SIZE, hdr, + 0, ciphertext, sizeof(data)+mlen, &c); + if (result == 0) { + TC_ERROR("ccm_decrypt failed in %s.\n", __func__); + show_str("\t\tExpected", data, sizeof(data)); + show_str("\t\tComputed", decrypted, sizeof(decrypted)); + + result = TC_FAIL; + goto exitTest1; + } + + result = TC_PASS; + +exitTest1: + TC_END_RESULT(result); + return result; + +} + +int test_vector_8(void) +{ + int result = TC_PASS; + /* Test based on RFC 3610 test vector #9 but with no payload data */ + const uint8_t key[NUM_NIST_KEYS] = { + 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, + 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF + }; + uint8_t nonce[NONCE_LEN] = { + 0x00, 0x00, 0x00, 0x0B, 0x0A, 0x09, 0x08, 0xA0, + 0xA1, 0xA2, 0xA3, 0xA4, 0xA5 + }; + const uint8_t hdr[8] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 + }; + + uint8_t *data = NULL; + + struct tc_ccm_mode_struct c; + struct tc_aes_key_sched_struct sched; + + uint8_t decrypted[TC_CCM_MAX_PT_SIZE]; + uint8_t ciphertext[TC_CCM_MAX_CT_SIZE]; + + uint16_t mlen = M_LEN10; + + TC_PRINT("%s: Performing CCM test #8 (no payload data):\n", __func__); + + tc_aes128_set_encrypt_key(&sched, key); + if (tc_ccm_config(&c, &sched, nonce, sizeof(nonce), mlen) == 0) { + TC_ERROR("CCM config failed in %s.\n", __func__); + + result = TC_FAIL; + goto exitTest1; + } + + result = tc_ccm_generation_encryption(ciphertext, TC_CCM_MAX_CT_SIZE, hdr, + sizeof(hdr), data, 0, &c); + if (result == 0) { + TC_ERROR("ccm_encrypt failed in %s.\n", __func__); + + result = TC_FAIL; + goto exitTest1; + } + + result = tc_ccm_decryption_verification(decrypted, TC_CCM_MAX_PT_SIZE, hdr, + sizeof(hdr), ciphertext, mlen, &c); + if (result == 0) { + TC_ERROR("ccm_decrypt failed in %s.\n", __func__); + show_str("\t\tExpected", data, sizeof(data)); + show_str("\t\tComputed", decrypted, sizeof(decrypted)); + + result = TC_FAIL; + goto exitTest1; + } + + result = TC_PASS; + +exitTest1: + TC_END_RESULT(result); + return result; +} + +/* + * Main task to test CCM + */ +int main(void) +{ + int result = TC_PASS; + + TC_START("Performing CCM tests:"); + + result = test_vector_1(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("CCM test #1 (RFC 3610 test vector #1) failed.\n"); + goto exitTest; + } + result = test_vector_2(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("CCM test #2 failed.\n"); + goto exitTest; + } + result = test_vector_3(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("CCM test #3 failed.\n"); + goto exitTest; + } + result = test_vector_4(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("CCM test #4 failed.\n"); + goto exitTest; + } + result = test_vector_5(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("CCM test #5 failed.\n"); + goto exitTest; + } + result = test_vector_6(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("CCM test #6 failed.\n"); + goto exitTest; + } + result = test_vector_7(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("CCM test #7 failed.\n"); + goto exitTest; + } + result = test_vector_8(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("CCM test #8 (no payload data) failed.\n"); + goto exitTest; + } + + TC_PRINT("All CCM tests succeeded!\n"); + +exitTest: + TC_END_RESULT(result); + TC_END_REPORT(result); + + return result; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/test_cmac_mode.c b/bootloader/mcuboot/ext/tinycrypt/tests/test_cmac_mode.c new file mode 100644 index 0000000..dc757fe --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/test_cmac_mode.c @@ -0,0 +1,314 @@ +/* test_cmac_mode.c - TinyCrypt AES-CMAC tests (including SP 800-38B tests) */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +/* + * DESCRIPTION + * This module tests the following AES-CMAC test (including SP 800-38B): + * + * Scenarios tested include: + * - CMAC test #1 (GF(2^128) double)) + * - CMAC test #2 null msg (SP 800-38B test vector #1) + * - CMAC test #3 1 block msg (SP 800-38B test vector #2) + * - CMAC test #4 320 bit msg (SP 800-38B test vector #3) + * - CMAC test #5 512 bit msg (SP 800-38B test vector #4) + */ + +#include +#include +#include +#include + +#include +#include + +#define BUF_LEN 16 + +static void show(const char *label, const uint8_t *s, size_t slen) +{ + unsigned int i; + + TC_PRINT("%s\t", label); + for (i = 0; i < slen; ++i) { + TC_PRINT("%02x", s[i]); + } + TC_PRINT("\n"); +} + +extern void gf_double(uint8_t *out, uint8_t *in); + +static int verify_gf_2_128_double(uint8_t *K1, uint8_t *K2, + struct tc_cmac_struct s) +{ + int result = TC_PASS; + + TC_PRINT("Performing CMAC test #1 (GF(2^128) double):\n"); + + uint8_t zero[BUF_LEN]; + uint8_t L[BUF_LEN]; + const uint8_t l[BUF_LEN] = { + 0x7d, 0xf7, 0x6b, 0x0c, 0x1a, 0xb8, 0x99, 0xb3, + 0x3e, 0x42, 0xf0, 0x47, 0xb9, 0x1b, 0x54, 0x6f + }; + const uint8_t k1[BUF_LEN] = { + 0xfb, 0xee, 0xd6, 0x18, 0x35, 0x71, 0x33, 0x66, + 0x7c, 0x85, 0xe0, 0x8f, 0x72, 0x36, 0xa8, 0xde + }; + const uint8_t k2[BUF_LEN] = { + 0xf7, 0xdd, 0xac, 0x30, 0x6a, 0xe2, 0x66, 0xcc, + 0xf9, 0x0b, 0xc1, 0x1e, 0xe4, 0x6d, 0x51, 0x3b + }; + + (void) memset(zero, '\0', sizeof(zero)); + tc_aes_encrypt(L, zero, s.sched); + if (memcmp(L, l, BUF_LEN) != 0) { + TC_ERROR("%s: AES encryption failed\n", __func__); + show("expected L =", l, sizeof(l)); + show("computed L =", L, sizeof(L)); + return TC_FAIL; + } + + gf_double(K1, L); + if (memcmp(K1, k1, BUF_LEN) != 0) { + TC_ERROR("%s: gf_2_128_double failed when msb = 0\n", __func__); + show("expected K1 =", k1, sizeof(k1)); + show("computed K1 =", K1, sizeof(k1)); + return TC_FAIL; + } + + gf_double(K2, K1); + if (memcmp(K2, k2, BUF_LEN) != 0) { + TC_ERROR("%s: gf_2_128_double failed when msb = 1\n", __func__); + show("expected K2 =", k2, sizeof(k2)); + show("computed K2 =", K2, sizeof(k2)); + return TC_FAIL; + } + + TC_END_RESULT(result); + return result; +} + +static int verify_cmac_null_msg(TCCmacState_t s) +{ + int result = TC_PASS; + + TC_PRINT("Performing CMAC test #2 (SP 800-38B test vector #1):\n"); + + const uint8_t tag[BUF_LEN] = { + 0xbb, 0x1d, 0x69, 0x29, 0xe9, 0x59, 0x37, 0x28, + 0x7f, 0xa3, 0x7d, 0x12, 0x9b, 0x75, 0x67, 0x46 + }; + uint8_t Tag[BUF_LEN]; + + (void) tc_cmac_init(s); + (void) tc_cmac_update(s, (const uint8_t *) 0, 0); + (void) tc_cmac_final(Tag, s); + + if (memcmp(Tag, tag, BUF_LEN) != 0) { + TC_ERROR("%s: aes_cmac failed with null msg = 1\n", __func__); + show("expected Tag =", tag, sizeof(tag)); + show("computed Tag =", Tag, sizeof(Tag)); + return TC_FAIL; + } + + TC_END_RESULT(result); + return result; +} + +static int verify_cmac_1_block_msg(TCCmacState_t s) +{ + int result = TC_PASS; + + TC_PRINT("Performing CMAC test #3 (SP 800-38B test vector #2):\n"); + + const uint8_t msg[BUF_LEN] = { + 0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96, + 0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a + }; + const uint8_t tag[BUF_LEN] = { + 0x07, 0x0a, 0x16, 0xb4, 0x6b, 0x4d, 0x41, 0x44, + 0xf7, 0x9b, 0xdd, 0x9d, 0xd0, 0x4a, 0x28, 0x7c + }; + uint8_t Tag[BUF_LEN]; + + (void) tc_cmac_init(s); + (void) tc_cmac_update(s, msg, sizeof(msg)); + (void) tc_cmac_final(Tag, s); + + if (memcmp(Tag, tag, BUF_LEN) != 0) { + TC_ERROR("%s: aes_cmac failed with 1 block msg\n", __func__); + show("aes_cmac failed with 1 block msg =", msg, sizeof(msg)); + show("expected Tag =", tag, sizeof(tag)); + show("computed Tag =", Tag, sizeof(Tag)); + return TC_FAIL; + } + + TC_END_RESULT(result); + return result; +} + +static int verify_cmac_320_bit_msg(TCCmacState_t s) +{ + int result = TC_PASS; + + TC_PRINT("Performing CMAC test #4 (SP 800-38B test vector #3):\n"); + + const uint8_t msg[40] = { + 0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96, + 0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a, + 0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c, + 0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51, + 0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11 + }; + const uint8_t tag[BUF_LEN] = { + 0xdf, 0xa6, 0x67, 0x47, 0xde, 0x9a, 0xe6, 0x30, + 0x30, 0xca, 0x32, 0x61, 0x14, 0x97, 0xc8, 0x27 + }; + uint8_t Tag[BUF_LEN]; + + (void) tc_cmac_init(s); + (void) tc_cmac_update(s, msg, sizeof(msg)); + (void) tc_cmac_final(Tag, s); + + if (memcmp(Tag, tag, BUF_LEN) != 0) { + TC_ERROR("%s: aes_cmac failed with 320 bit msg\n", __func__); + show("aes_cmac failed with 320 bit msg =", msg, sizeof(msg)); + show("expected Tag =", tag, sizeof(tag)); + show("computed Tag =", Tag, sizeof(Tag)); + return TC_FAIL; + } + + TC_END_RESULT(result); + return result; +} + +static int verify_cmac_512_bit_msg(TCCmacState_t s) +{ + int result = TC_PASS; + + TC_PRINT("Performing CMAC test #5 (SP 800-38B test vector #4)\n"); + + const uint8_t msg[64] = { + 0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96, + 0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a, + 0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c, + 0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51, + 0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11, + 0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef, + 0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17, + 0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10 + }; + const uint8_t tag[BUF_LEN] = { + 0x51, 0xf0, 0xbe, 0xbf, 0x7e, 0x3b, 0x9d, 0x92, + 0xfc, 0x49, 0x74, 0x17, 0x79, 0x36, 0x3c, 0xfe + }; + uint8_t Tag[BUF_LEN]; + + (void)tc_cmac_init(s); + (void)tc_cmac_update(s, msg, sizeof(msg)); + (void)tc_cmac_final(Tag, s); + + if (memcmp(Tag, tag, BUF_LEN) != 0) { + TC_ERROR("%s: aes_cmac failed with 512 bit msg\n", __func__); + show("aes_cmac failed with 512 bit msg =", msg, sizeof(msg)); + show("expected Tag =", tag, sizeof(tag)); + show("computed Tag =", Tag, sizeof(Tag)); + return TC_FAIL; + } + + TC_END_RESULT(result); + return result; +} + +/* + * Main task to test CMAC + * effects: returns 1 if all tests pass + * exceptions: returns a negative value if some test fails + */ +int main(void) +{ + + int result = TC_PASS; + + struct tc_cmac_struct state; + struct tc_aes_key_sched_struct sched; + + const uint8_t key[BUF_LEN] = { + 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, + 0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c + }; + uint8_t K1[BUF_LEN], K2[BUF_LEN]; + + TC_START("Performing CMAC tests:"); + + (void) tc_cmac_setup(&state, key, &sched); + result = verify_gf_2_128_double(K1, K2, state); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("CMAC test #1 (128 double) failed.\n"); + goto exitTest; + } + (void) tc_cmac_setup(&state, key, &sched); + result = verify_cmac_null_msg(&state); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("CMAC test #2 (null msg) failed.\n"); + goto exitTest; + } + (void) tc_cmac_setup(&state, key, &sched); + result = verify_cmac_1_block_msg(&state); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("CMAC test #3 (1 block msg)failed.\n"); + goto exitTest; + } + (void) tc_cmac_setup(&state, key, &sched); + result = verify_cmac_320_bit_msg(&state); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("CMAC test #4 (320 bit msg) failed.\n"); + goto exitTest; + } + (void) tc_cmac_setup(&state, key, &sched); + result = verify_cmac_512_bit_msg(&state); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("CMAC test #5 (512 bit msg)failed.\n"); + goto exitTest; + } + + TC_PRINT("All CMAC tests succeeded!\n"); + +exitTest: + TC_END_RESULT(result); + TC_END_REPORT(result); + + return result; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/test_ctr_mode.c b/bootloader/mcuboot/ext/tinycrypt/tests/test_ctr_mode.c new file mode 100644 index 0000000..f323856 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/test_ctr_mode.c @@ -0,0 +1,150 @@ +/* test_ctr_mode.c - TinyCrypt implementation of some AES-CTR tests */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + DESCRIPTION + This module tests the following AES-CTR Mode routines: + + Scenarios tested include: + - AES128 CTR mode encryption SP 800-38a tests +*/ + +#include +#include +#include +#include + +#include +#include +#include + +/* + * NIST SP 800-38a CTR Test for encryption and decryption. + */ +unsigned int test_1_and_2(void) +{ + const uint8_t key[16] = { + 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, 0xab, 0xf7, 0x15, 0x88, + 0x09, 0xcf, 0x4f, 0x3c + }; + uint8_t ctr[16] = { + 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfa, 0xfb, + 0xfc, 0xfd, 0xfe, 0xff + }; + const uint8_t plaintext[64] = { + 0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96, 0xe9, 0x3d, 0x7e, 0x11, + 0x73, 0x93, 0x17, 0x2a, 0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c, + 0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51, 0x30, 0xc8, 0x1c, 0x46, + 0xa3, 0x5c, 0xe4, 0x11, 0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef, + 0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17, 0xad, 0x2b, 0x41, 0x7b, + 0xe6, 0x6c, 0x37, 0x10 + }; + const uint8_t ciphertext[80] = { + 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfa, 0xfb, + 0xfc, 0xfd, 0xfe, 0xff, 0x87, 0x4d, 0x61, 0x91, 0xb6, 0x20, 0xe3, 0x26, + 0x1b, 0xef, 0x68, 0x64, 0x99, 0x0d, 0xb6, 0xce, 0x98, 0x06, 0xf6, 0x6b, + 0x79, 0x70, 0xfd, 0xff, 0x86, 0x17, 0x18, 0x7b, 0xb9, 0xff, 0xfd, 0xff, + 0x5a, 0xe4, 0xdf, 0x3e, 0xdb, 0xd5, 0xd3, 0x5e, 0x5b, 0x4f, 0x09, 0x02, + 0x0d, 0xb0, 0x3e, 0xab, 0x1e, 0x03, 0x1d, 0xda, 0x2f, 0xbe, 0x03, 0xd1, + 0x79, 0x21, 0x70, 0xa0, 0xf3, 0x00, 0x9c, 0xee + }; + struct tc_aes_key_sched_struct sched; + uint8_t out[80]; + uint8_t decrypted[64]; + unsigned int result = TC_PASS; + uint32_t off = 0; + + TC_PRINT("CTR test #1 (encryption SP 800-38a tests):\n"); + (void)tc_aes128_set_encrypt_key(&sched, key); + + (void)memcpy(out, ctr, sizeof(ctr)); + if (tc_ctr_mode(&out[TC_AES_BLOCK_SIZE], sizeof(plaintext), plaintext, + sizeof(plaintext), ctr, &off, &sched) == 0) { + TC_ERROR("CTR test #1 (encryption SP 800-38a tests) failed in %s.\n", __func__); + result = TC_FAIL; + goto exitTest1; + } + + if (off != 0) { + TC_ERROR("CTR test #1 invalid block offset (%u).\n", off); + result = TC_FAIL; + goto exitTest1; + } + result = check_result(1, ciphertext, sizeof(out), out, sizeof(out)); + TC_END_RESULT(result); + + TC_PRINT("CTR test #2 (decryption SP 800-38a tests):\n"); + (void) memcpy(ctr, out, sizeof(ctr)); + off = 0; + if (tc_ctr_mode(decrypted, sizeof(decrypted), &out[TC_AES_BLOCK_SIZE], + sizeof(decrypted), ctr, &off, &sched) == 0) { + TC_ERROR("CTR test #2 (decryption SP 800-38a tests) failed in %s.\n", __func__); + result = TC_FAIL; + goto exitTest1; + } + + if (off != 0) { + TC_ERROR("CTR test #2 invalid block offset (%u).\n", off); + result = TC_FAIL; + goto exitTest1; + } + result = check_result(2, plaintext, sizeof(plaintext), + decrypted, sizeof(plaintext)); + + exitTest1: + TC_END_RESULT(result); + return result; +} + +/* + * Main task to test AES + */ + +int main(void) +{ + unsigned int result = TC_PASS; + + TC_START("Performing AES128-CTR mode tests:"); + + TC_PRINT("Performing CTR tests:\n"); + result = test_1_and_2(); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("CTR test #1 failed.\n"); + goto exitTest; + } + + TC_PRINT("All CTR tests succeeded!\n"); + + exitTest: + TC_END_RESULT(result); + TC_END_REPORT(result); +} diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/test_ctr_prng.c b/bootloader/mcuboot/ext/tinycrypt/tests/test_ctr_prng.c new file mode 100644 index 0000000..e95f7f1 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/test_ctr_prng.c @@ -0,0 +1,565 @@ +/* test_ctr_prng.c - TinyCrypt implementation of some CTR-PRNG tests */ + +/* + * Copyright (c) 2016, Chris Morrison, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + DESCRIPTION + This module tests the CTR-PRNG routines +*/ + +#include +#include +#include +#include + + +#include +#include +#include + +/* utility function to convert hex character representation to their nibble (4 bit) values */ +static uint8_t nibbleFromChar(char c) +{ + if(c >= '0' && c <= '9') return c - '0'; + if(c >= 'a' && c <= 'f') return c - 'a' + 10U; + if(c >= 'A' && c <= 'F') return c - 'A' + 10U; + return 255U; +} + +/* + * Convert a string of characters representing a hex buffer into a series of + * bytes of that real value + */ +uint8_t *hexStringToBytes(char *inhex) +{ + uint8_t *retval; + uint8_t *p; + int len, i; + + len = strlen(inhex) / 2; + retval = (uint8_t *)malloc(len+1); + for(i=0, p = (uint8_t *) inhex; i +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +int ecdh_vectors(char **qx_vec, char **qy_vec, char **d_vec, char **z_vec, + int tests, int verbose) +{ + + unsigned int pub[2*NUM_ECC_WORDS]; + unsigned int prv[NUM_ECC_WORDS]; + unsigned int z[NUM_ECC_WORDS]; + unsigned int result = TC_PASS; + + int rc; + unsigned int exp_z[NUM_ECC_WORDS]; + + const struct uECC_Curve_t * curve = uECC_secp256r1(); + + for (int i = 0; i < tests; i++) { + + string2scalar(pub + NUM_ECC_WORDS, NUM_ECC_WORDS, qx_vec[i]); + string2scalar(pub, NUM_ECC_WORDS, qy_vec[i]); + string2scalar(exp_z, NUM_ECC_WORDS, z_vec[i]); + string2scalar(prv, NUM_ECC_WORDS, d_vec[i]); + + uint8_t pub_bytes[2*NUM_ECC_BYTES]; + uECC_vli_nativeToBytes(pub_bytes, 2*NUM_ECC_BYTES, pub); + uint8_t private_bytes[NUM_ECC_BYTES]; + uECC_vli_nativeToBytes(private_bytes, NUM_ECC_BYTES, prv); + uint8_t z_bytes[NUM_ECC_BYTES]; + uECC_vli_nativeToBytes(z_bytes, NUM_ECC_BYTES, exp_z); + + rc = uECC_shared_secret(pub_bytes, private_bytes, z_bytes, curve); + + if (rc == TC_CRYPTO_FAIL) { + TC_ERROR("ECDH failure, exit.\n"); + result = TC_FAIL; + return result;; + } + + uECC_vli_bytesToNative(z, z_bytes, NUM_ECC_BYTES); + + result = check_ecc_result(i, "Z", exp_z, z, NUM_ECC_WORDS, verbose); + if (result == TC_FAIL) { + return result; + } + } + return result; +} + +int cavp_ecdh(bool verbose) +{ + unsigned int result = TC_PASS; + /* + * P-256 + */ + char *d[] = { + "7d7dc5f71eb29ddaf80d6214632eeae03d9058af1fb6d22ed80badb62bc1a534", + "38f65d6dce47676044d58ce5139582d568f64bb16098d179dbab07741dd5caf5", + "1accfaf1b97712b85a6f54b148985a1bdc4c9bec0bd258cad4b3d603f49f32c8", + "207c43a79bfee03db6f4b944f53d2fb76cc49ef1c9c4d34d51b6c65c4db6932d", + "59137e38152350b195c9718d39673d519838055ad908dd4757152fd8255c09bf", + "f5f8e0174610a661277979b58ce5c90fee6c9b3bb346a90a7196255e40b132ef", + "3b589af7db03459c23068b64f63f28d3c3c6bc25b5bf76ac05f35482888b5190", + "d8bf929a20ea7436b2461b541a11c80e61d826c0a4c9d322b31dd54e7f58b9c8", + "0f9883ba0ef32ee75ded0d8bda39a5146a29f1f2507b3bd458dbea0b2bb05b4d", + "2beedb04b05c6988f6a67500bb813faf2cae0d580c9253b6339e4a3337bb6c08", + "77c15dcf44610e41696bab758943eff1409333e4d5a11bbe72c8f6c395e9f848", + "42a83b985011d12303db1a800f2610f74aa71cdf19c67d54ce6c9ed951e9093e", + "ceed35507b5c93ead5989119b9ba342cfe38e6e638ba6eea343a55475de2800b", + "43e0e9d95af4dc36483cdd1968d2b7eeb8611fcce77f3a4e7d059ae43e509604", + "b2f3600df3368ef8a0bb85ab22f41fc0e5f4fdd54be8167a5c3cd4b08db04903", + "4002534307f8b62a9bf67ff641ddc60fef593b17c3341239e95bdb3e579bfdc8", + "4dfa12defc60319021b681b3ff84a10a511958c850939ed45635934ba4979147", + "1331f6d874a4ed3bc4a2c6e9c74331d3039796314beee3b7152fcdba5556304e", + "dd5e9f70ae740073ca0204df60763fb6036c45709bf4a7bb4e671412fad65da3", + "5ae026cfc060d55600717e55b8a12e116d1d0df34af831979057607c2d9c2f76", + "b601ac425d5dbf9e1735c5e2d5bdb79ca98b3d5be4a2cfd6f2273f150e064d9d", + "fefb1dda1845312b5fce6b81b2be205af2f3a274f5a212f66c0d9fc33d7ae535", + "334ae0c4693d23935a7e8e043ebbde21e168a7cba3fa507c9be41d7681e049ce", + "2c4bde40214fcc3bfc47d4cf434b629acbe9157f8fd0282540331de7942cf09d", + "85a268f9d7772f990c36b42b0a331adc92b5941de0b862d5d89a347cbf8faab0", + }; + + char *x[] = { + "700c48f77f56584c5cc632ca65640db91b6bacce3a4df6b42ce7cc838833d287", + "809f04289c64348c01515eb03d5ce7ac1a8cb9498f5caa50197e58d43a86a7ae", + "a2339c12d4a03c33546de533268b4ad667debf458b464d77443636440ee7fec3", + "df3989b9fa55495719b3cf46dccd28b5153f7808191dd518eff0c3cff2b705ed", + "41192d2813e79561e6a1d6f53c8bc1a433a199c835e141b05a74a97b0faeb922", + "33e82092a0f1fb38f5649d5867fba28b503172b7035574bf8e5b7100a3052792", + "6a9e0c3f916e4e315c91147be571686d90464e8bf981d34a90b6353bca6eeba7", + "a9c0acade55c2a73ead1a86fb0a9713223c82475791cd0e210b046412ce224bb", + "94e94f16a98255fff2b9ac0c9598aac35487b3232d3231bd93b7db7df36f9eb9", + "e099bf2a4d557460b5544430bbf6da11004d127cb5d67f64ab07c94fcdf5274f", + "f75a5fe56bda34f3c1396296626ef012dc07e4825838778a645c8248cff01658", + "2db4540d50230756158abf61d9835712b6486c74312183ccefcaef2797b7674d", + "cd94fc9497e8990750309e9a8534fd114b0a6e54da89c4796101897041d14ecb", + "15b9e467af4d290c417402e040426fe4cf236bae72baa392ed89780dfccdb471", + "49c503ba6c4fa605182e186b5e81113f075bc11dcfd51c932fb21e951eee2fa1", + "19b38de39fdd2f70f7091631a4f75d1993740ba9429162c2a45312401636b29c", + "2c91c61f33adfe9311c942fdbff6ba47020feff416b7bb63cec13faf9b099954", + "a28a2edf58025668f724aaf83a50956b7ac1cfbbff79b08c3bf87dfd2828d767", + "a2ef857a081f9d6eb206a81c4cf78a802bdf598ae380c8886ecd85fdc1ed7644", + "ccd8a2d86bc92f2e01bce4d6922cf7fe1626aed044685e95e2eebd464505f01f", + "c188ffc8947f7301fb7b53e36746097c2134bf9cc981ba74b4e9c4361f595e4e", + "317e1020ff53fccef18bf47bb7f2dd7707fb7b7a7578e04f35b3beed222a0eb6", + "45fb02b2ceb9d7c79d9c2fa93e9c7967c2fa4df5789f9640b24264b1e524fcb1", + "a19ef7bff98ada781842fbfc51a47aff39b5935a1c7d9625c8d323d511c92de6", + "356c5a444c049a52fee0adeb7e5d82ae5aa83030bfff31bbf8ce2096cf161c4b", + }; + + char *y[] = { + "db71e509e3fd9b060ddb20ba5c51dcc5948d46fbf640dfe0441782cab85fa4ac", + "b29d84e811197f25eba8f5194092cb6ff440e26d4421011372461f579271cda3", + "ef48a3ab26e20220bcda2c1851076839dae88eae962869a497bf73cb66faf536", + "422294ff46003429d739a33206c8752552c8ba54a270defc06e221e0feaf6ac4", + "1af98cc45e98a7e041b01cf35f462b7562281351c8ebf3ffa02e33a0722a1328", + "f2cf6b601e0a05945e335550bf648d782f46186c772c0f20d3cd0d6b8ca14b2f", + "40f9bead39c2f2bcc2602f75b8a73ec7bdffcbcead159d0174c6c4d3c5357f05", + "f6de0afa20e93e078467c053d241903edad734c6b403ba758c2b5ff04c9d4229", + "d8049a43579cfa90b8093a94416cbefbf93386f15b3f6e190b6e3455fedfe69a", + "d9c50dbe70d714edb5e221f4e020610eeb6270517e688ca64fb0e98c7ef8c1c5", + "33bbdf1b1772d8059df568b061f3f1122f28a8d819167c97be448e3dc3fb0c3c", + "62f57f314e3f3495dc4e099012f5e0ba71770f9660a1eada54104cdfde77243e", + "c3def4b5fe04faee0a11932229fff563637bfdee0e79c6deeaf449f85401c5c4", + "cdf4e9170fb904302b8fd93a820ba8cc7ed4efd3a6f2d6b05b80b2ff2aee4e77", + "8af706ff0922d87b3f0c5e4e31d8b259aeb260a9269643ed520a13bb25da5924", + "09aed7232b28e060941741b6828bcdfa2bc49cc844f3773611504f82a390a5ae", + "6cab31b06419e5221fca014fb84ec870622a1b12bab5ae43682aa7ea73ea08d0", + "dfa7bfffd4c766b86abeaf5c99b6e50cb9ccc9d9d00b7ffc7804b0491b67bc03", + "563c4c20419f07bc17d0539fade1855e34839515b892c0f5d26561f97fa04d1a", + "e9ddd583a9635a667777d5b8a8f31b0f79eba12c75023410b54b8567dddc0f38", + "bf7d2f2056e72421ef393f0c0f2b0e00130e3cac4abbcc00286168e85ec55051", + "09420ce5a19d77c6fe1ee587e6a49fbaf8f280e8df033d75403302e5a27db2ae", + "5c6e8ecf1f7d3023893b7b1ca1e4d178972ee2a230757ddc564ffe37f5c5a321", + "e9c184df75c955e02e02e400ffe45f78f339e1afe6d056fb3245f4700ce606ef", + "57d128de8b2a57a094d1a001e572173f96e8866ae352bf29cddaf92fc85b2f92", + }; + + char *Z[] = { + "46fc62106420ff012e54a434fbdd2d25ccc5852060561e68040dd7778997bd7b", + "057d636096cb80b67a8c038c890e887d1adfa4195e9b3ce241c8a778c59cda67", + "2d457b78b4614132477618a5b077965ec90730a8c81a1c75d6d4ec68005d67ec", + "96441259534b80f6aee3d287a6bb17b5094dd4277d9e294f8fe73e48bf2a0024", + "19d44c8d63e8e8dd12c22a87b8cd4ece27acdde04dbf47f7f27537a6999a8e62", + "664e45d5bba4ac931cd65d52017e4be9b19a515f669bea4703542a2c525cd3d3", + "ca342daa50dc09d61be7c196c85e60a80c5cb04931746820be548cdde055679d", + "35aa9b52536a461bfde4e85fc756be928c7de97923f0416c7a3ac8f88b3d4489", + "605c16178a9bc875dcbff54d63fe00df699c03e8a888e9e94dfbab90b25f39b4", + "f96e40a1b72840854bb62bc13c40cc2795e373d4e715980b261476835a092e0b", + "8388fa79c4babdca02a8e8a34f9e43554976e420a4ad273c81b26e4228e9d3a3", + "72877cea33ccc4715038d4bcbdfe0e43f42a9e2c0c3b017fc2370f4b9acbda4a", + "e4e7408d85ff0e0e9c838003f28cdbd5247cdce31f32f62494b70e5f1bc36307", + "ed56bcf695b734142c24ecb1fc1bb64d08f175eb243a31f37b3d9bb4407f3b96", + "bc5c7055089fc9d6c89f83c1ea1ada879d9934b2ea28fcf4e4a7e984b28ad2cf", + "9a4e8e657f6b0e097f47954a63c75d74fcba71a30d83651e3e5a91aa7ccd8343", + "3ca1fc7ad858fb1a6aba232542f3e2a749ffc7203a2374a3f3d3267f1fc97b78", + "1aaabe7ee6e4a6fa732291202433a237df1b49bc53866bfbe00db96a0f58224f", + "430e6a4fba4449d700d2733e557f66a3bf3d50517c1271b1ddae1161b7ac798c", + "1ce9e6740529499f98d1f1d71329147a33df1d05e4765b539b11cf615d6974d3", + "4690e3743c07d643f1bc183636ab2a9cb936a60a802113c49bb1b3f2d0661660", + "30c2261bd0004e61feda2c16aa5e21ffa8d7e7f7dbf6ec379a43b48e4b36aeb0", + "2adae4a138a239dcd93c243a3803c3e4cf96e37fe14e6a9b717be9599959b11c", + "2e277ec30f5ea07d6ce513149b9479b96e07f4b6913b1b5c11305c1444a1bc0b", + "1e51373bd2c6044c129c436e742a55be2a668a85ae08441b6756445df5493857", + }; + + TC_PRINT("Test #1: ECDH"); + TC_PRINT("NIST-p256\n"); + + result = ecdh_vectors(x, y, d, Z, 25, verbose); + if(result == TC_FAIL) { + goto exitTest1; + } + + exitTest1: + TC_END_RESULT(result); + return result; +} + +int cavp_keygen(bool verbose) +{ + unsigned int result = TC_PASS; + /* + * [P-256, B.4.2 Key Pair Generation by Testing Candidates] + */ + char *d[] = { + "c9806898a0334916c860748880a541f093b579a9b1f32934d86c363c39800357", + "710735c8388f48c684a97bd66751cc5f5a122d6b9a96a2dbe73662f78217446d", + "78d5d8b7b3e2c16b3e37e7e63becd8ceff61e2ce618757f514620ada8a11f6e4", + "2a61a0703860585fe17420c244e1de5a6ac8c25146b208ef88ad51ae34c8cb8c", + "01b965b45ff386f28c121c077f1d7b2710acc6b0cb58d8662d549391dcf5a883", + "fac92c13d374c53a085376fe4101618e1e181b5a63816a84a0648f3bdc24e519", + "f257a192dde44227b3568008ff73bcf599a5c45b32ab523b5b21ca582fef5a0a", + "add67e57c42a3d28708f0235eb86885a4ea68e0d8cfd76eb46134c596522abfd", + "4494860fd2c805c5c0d277e58f802cff6d731f76314eb1554142a637a9bc5538", + "d40b07b1ea7b86d4709ef9dc634c61229feb71abd63dc7fc85ef46711a87b210", + }; + + char *x[] = { + "d0720dc691aa80096ba32fed1cb97c2b620690d06de0317b8618d5ce65eb728f", + "f6836a8add91cb182d8d258dda6680690eb724a66dc3bb60d2322565c39e4ab9", + "76711126cbb2af4f6a5fe5665dad4c88d27b6cb018879e03e54f779f203a854e", + "e1aa7196ceeac088aaddeeba037abb18f67e1b55c0a5c4e71ec70ad666fcddc8", + "1f038c5422e88eec9e88b815e8f6b3e50852333fc423134348fc7d79ef8e8a10", + "7258f2ab96fc84ef6ccb33e308cd392d8b568ea635730ceb4ebd72fa870583b9", + "d2e01411817b5512b79bbbe14d606040a4c90deb09e827d25b9f2fc068997872", + "55bed2d9c029b7f230bde934c7124ed52b1330856f13cbac65a746f9175f85d7", + "5190277a0c14d8a3d289292f8a544ce6ea9183200e51aec08440e0c1a463a4e4", + "fbcea7c2827e0e8085d7707b23a3728823ea6f4878b24747fb4fd2842d406c73", + }; + + char *y[] = { + "9681b517b1cda17d0d83d335d9c4a8a9a9b0b1b3c7106d8f3c72bc5093dc275f", + "1f837aa32864870cb8e8d0ac2ff31f824e7beddc4bb7ad72c173ad974b289dc2", + "a26df39960ab5248fd3620fd018398e788bd89a3cea509b352452b69811e6856", + "d7d35bdce6dedc5de98a7ecb27a9cd066a08f586a733b59f5a2cdb54f971d5c8", + "43a047cb20e94b4ffb361ef68952b004c0700b2962e0c0635a70269bc789b849", + "489807ca55bdc29ca5c8fe69b94f227b0345cccdbe89975e75d385cc2f6bb1e2", + "503f138f8bab1df2c4507ff663a1fdf7f710e7adb8e7841eaa902703e314e793", + "32805e311d583b4e007c40668185e85323948e21912b6b0d2cda8557389ae7b0", + "ecd98514821bd5aaf3419ab79b71780569470e4fed3da3c1353b28fe137f36eb", + "2393c85f1f710c5afc115a39ba7e18abe03f19c9d4bb3d47d19468b818efa535", + }; + + TC_PRINT("Test #2: ECC KeyGen "); + TC_PRINT("NIST-p256\n"); + + result = keygen_vectors(d, x, y, 10, verbose); + if(result == TC_FAIL) { + goto exitTest1; + } + + exitTest1: + TC_END_RESULT(result); + return result; +} + +/* Test ecc_make_keys, and also as keygen part of other tests */ +int pkv_vectors(char **qx_vec, char **qy_vec, char **res_vec, int tests, + bool verbose) +{ + + unsigned int pub[2 * NUM_ECC_WORDS]; + uint8_t _public[2 * NUM_ECC_BYTES]; + int rc; + int exp_rc; + char tmp; + unsigned int result = TC_PASS; + const struct uECC_Curve_t * curve = uECC_secp256r1(); + + for (int i = 0; i < tests; i++) { + + if (2 != sscanf(res_vec[i], "%c (%d ", &tmp, &exp_rc)) { + TC_ERROR("Error: failed to parse CAVP response.\n"); + result = TC_FAIL; + goto exitTest1; + } + + if (strlen(qx_vec[i]) > 2 * NUM_ECC_BYTES || + strlen(qy_vec[i]) > 2 * NUM_ECC_BYTES) { + /* invalid input to ECC digit conversion (string2native()) */ + rc = -2; + } else { + string2scalar(pub, NUM_ECC_WORDS, qx_vec[i]); + string2scalar(pub + NUM_ECC_WORDS, NUM_ECC_WORDS, qy_vec[i]); + + uECC_vli_nativeToBytes(_public, NUM_ECC_BYTES, pub); + uECC_vli_nativeToBytes(_public + NUM_ECC_BYTES, NUM_ECC_BYTES, pub+NUM_ECC_WORDS); + + rc = uECC_valid_public_key(_public, curve); + } + + /* + * map to CAVP error codes + * 0 => 0 - success + * -1 => ? - (x,y) = (0,0) (not covered) + * -2 => 1 - out of bounds (pubverify or ecc import) + * -3 => 2 - not on curve + * -4 => ? - public key is the group generator + */ + + if (rc == -3) rc = 2; + if (rc == -2) rc = 1; + + result = check_code(i, res_vec[i], exp_rc, rc, verbose); + if(result == TC_FAIL) { + goto exitTest1; + } + } + + exitTest1: + TC_END_RESULT(result); + return result; +} + +int cavp_pkv(bool verbose) +{ + /* + * [P-256] + */ + char *x[] = { + "e0f7449c5588f24492c338f2bc8f7865f755b958d48edb0f2d0056e50c3fd5b7", + "d17c446237d9df87266ba3a91ff27f45abfdcb77bfd83536e92903efb861a9a9", + "17875397ae87369365656d490e8ce956911bd97607f2aff41b56f6f3a61989826", + "f2d1c0dc0852c3d8a2a2500a23a44813ccce1ac4e58444175b440469ffc12273", + "10b0ca230fff7c04768f4b3d5c75fa9f6c539bea644dffbec5dc796a213061b58", + "2c1052f25360a15062d204a056274e93cbe8fc4c4e9b9561134ad5c15ce525da", + "a40d077a87dae157d93dcccf3fe3aca9c6479a75aa2669509d2ef05c7de6782f", + "2633d398a3807b1895548adbb0ea2495ef4b930f91054891030817df87d4ac0a", + "14bf57f76c260b51ec6bbc72dbd49f02a56eaed070b774dc4bad75a54653c3d56", + "2fa74931ae816b426f484180e517f5050c92decfc8daf756cd91f54d51b302f1", + "f8c6dd3181a76aa0e36c2790bba47041acbe7b1e473ff71eee39a824dc595ff0", + "7a81a7e0b015252928d8b36e4ca37e92fdc328eb25c774b4f872693028c4be38", + }; + + char *y[] = { + "86d7e9255d0f4b6f44fa2cd6f8ba3c0aa828321d6d8cc430ca6284ce1d5b43a0", + "1eabb6a349ce2cd447d777b6739c5fc066add2002d2029052c408d0701066231c", + "980a3c4f61b9692633fbba5ef04c9cb546dd05cdec9fa8428b8849670e2fba92", + "32bfe992831b305d8c37b9672df5d29fcb5c29b4a40534683e3ace23d24647dd", + "f5edf37c11052b75f771b7f9fa050e353e464221fec916684ed45b6fead38205", + "ced9783713a8a2a09eff366987639c625753295d9a85d0f5325e32dedbcada0b", + "503d86b87d743ba20804fd7e7884aa017414a7b5b5963e0d46e3a9611419ddf3", + "d6b2f738e3873cc8364a2d364038ce7d0798bb092e3dd77cbdae7c263ba618d2", + "7a231a23bf8b3aa31d9600d888a0678677a30e573decd3dc56b33f365cc11236", + "5b994346137988c58c14ae2152ac2f6ad96d97decb33099bd8a0210114cd1141", + "9c965f227f281b3072b95b8daf29e88b35284f3574462e268e529bbdc50e9e52", + "08862f7335147261e7b1c3d055f9a316e4cab7daf99cc09d1c647f5dd6e7d5bb", + }; + + char *Result[] = { + "P (0 )", "F (1 - Q_x or Q_y out of range)", + "F (1 - Q_x or Q_y out of range)", "F (2 - Point not on curve)", + "F (1 - Q_x or Q_y out of range)", "P (0 )", + "F (2 - Point not on curve)", "P (0 )", + "F (1 - Q_x or Q_y out of range)", "P (0 )", + "F (2 - Point not on curve)", "F (2 - Point not on curve)", + }; + + TC_PRINT("Test #3: PubKeyVerify "); + TC_PRINT("NIST-p256-SHA2-256\n"); + + return pkv_vectors(x, y, Result, 12, verbose); +} + +int montecarlo_ecdh(int num_tests, bool verbose) +{ + int i; + uint8_t private1[NUM_ECC_BYTES] = {0}; + uint8_t private2[NUM_ECC_BYTES] = {0}; + uint8_t public1[2*NUM_ECC_BYTES] = {0}; + uint8_t public2[2*NUM_ECC_BYTES] = {0}; + uint8_t secret1[NUM_ECC_BYTES] = {0}; + uint8_t secret2[NUM_ECC_BYTES] = {0}; + unsigned int result = TC_PASS; + + const struct uECC_Curve_t * curve = uECC_secp256r1(); + + TC_PRINT("Test #4: Monte Carlo (%d Randomized EC-DH key-exchange) ", num_tests); + TC_PRINT("NIST-p256\n "); + + for (i = 0; i < num_tests; ++i) { + if (verbose) { + TC_PRINT("."); + fflush(stdout); + } + + if (!uECC_make_key(public1, private1, curve) || + !uECC_make_key(public2, private2, curve)) { + TC_ERROR("uECC_make_key() failed\n"); + result = TC_FAIL; + goto exitTest1; + } + + if (!uECC_shared_secret(public2, private1, secret1, curve)) { + TC_ERROR("shared_secret() failed (1)\n"); + result = TC_FAIL; + goto exitTest1;; + } + + if (!uECC_shared_secret(public1, private2, secret2, curve)) { + TC_ERROR("shared_secret() failed (2)\n"); + result = TC_FAIL; + goto exitTest1; + } + + if (memcmp(secret1, secret2, sizeof(secret1)) != 0) { + TC_PRINT("Shared secrets are not identical!\n"); + TC_PRINT("Private key 1 = "); + vli_print_bytes(private1, 32); + TC_PRINT("\nPrivate key 2 = "); + vli_print_bytes(private2, 32); + TC_PRINT("\nPublic key 1 = "); + vli_print_bytes(public1, 64); + TC_PRINT("\nPublic key 2 = "); + vli_print_bytes(public2, 64); + TC_PRINT("\nShared secret 1 = "); + vli_print_bytes(secret1, 32); + TC_PRINT("\nShared secret 2 = "); + vli_print_bytes(secret2, 32); + TC_PRINT("\n"); + } + } + + TC_PRINT("\n"); + + exitTest1: + TC_END_RESULT(result); + return result; +} + +int main() +{ + unsigned int result = TC_PASS; + + TC_START("Performing ECC-DH tests:"); + + /* Setup of the Cryptographically Secure PRNG. */ + uECC_set_rng(&default_CSPRNG); + + bool verbose = true; + + TC_PRINT("Performing cavp_ecdh test:\n"); + result = cavp_ecdh(verbose); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("cavp_ecdh test failed.\n"); + goto exitTest; + } + TC_PRINT("Performing cavp_keygen test:\n"); + result = cavp_keygen(verbose); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("cavp_keygen test failed.\n"); + goto exitTest; + } + TC_PRINT("Performing cavp_pkv test:\n"); + result = cavp_pkv(verbose); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("cavp_pkv failed.\n"); + goto exitTest; + } + TC_PRINT("Performing montecarlo_ecdh test:\n"); + result = montecarlo_ecdh(10, verbose); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("montecarlo_ecdh test failed.\n"); + goto exitTest; + } + + TC_PRINT("All EC-DH tests succeeded!\n"); + + exitTest: + TC_END_RESULT(result); + TC_END_REPORT(result); +} diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/test_ecc_dsa.c b/bootloader/mcuboot/ext/tinycrypt/tests/test_ecc_dsa.c new file mode 100644 index 0000000..d1e933c --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/test_ecc_dsa.c @@ -0,0 +1,669 @@ +/* test_ecc_ecdsa.c - TinyCrypt implementation of some EC-DSA tests */ + +/* Copyright (c) 2014, Kenneth MacKay + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE.*/ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * test_ecc_ecdsa.c -- Implementation of some EC-DSA tests + * + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +/* Maximum size of message to be signed. */ +#define BUF_SIZE 256 + +int sign_vectors(TCSha256State_t hash, char **d_vec, char **k_vec, + char **msg_vec, char **qx_vec, char **qy_vec, char **r_vec, + char **s_vec, int tests, bool verbose) +{ + + unsigned int k[NUM_ECC_WORDS]; + unsigned int private[NUM_ECC_WORDS]; + uint8_t private_bytes[NUM_ECC_BYTES]; + unsigned int sig[2 * NUM_ECC_WORDS]; + uint8_t sig_bytes[2 * NUM_ECC_BYTES]; + unsigned int digest[TC_SHA256_DIGEST_SIZE / 4]; + uint8_t digest_bytes[TC_SHA256_DIGEST_SIZE]; + unsigned int result = TC_PASS; + + /* expected outputs (converted input vectors) */ + unsigned int exp_r[NUM_ECC_WORDS]; + unsigned int exp_s[NUM_ECC_WORDS]; + + uint8_t msg[BUF_SIZE]; + size_t msglen; + + for (int i = 0; i < tests; i++) { + + /* use keygen test to generate and validate pubkey */ + keygen_vectors(d_vec+i, qx_vec+i, qy_vec+i, 1, false); + string2scalar(private, NUM_ECC_WORDS, d_vec[i]); + uECC_vli_nativeToBytes(private_bytes, NUM_ECC_BYTES, private); + + /* validate ECDSA: hash message, sign digest, check r+s */ + memset(k, 0, NUM_ECC_BYTES); + string2scalar(k, NUM_ECC_WORDS, k_vec[i]); + string2scalar(exp_r, NUM_ECC_WORDS, r_vec[i]); + string2scalar(exp_s, NUM_ECC_WORDS, s_vec[i]); + + msglen = hex2bin(msg, BUF_SIZE, msg_vec[i], strlen(msg_vec[i])); + + if (msglen == false) { + TC_ERROR("failed to import message!\n"); + result = TC_FAIL; + goto exitTest1; + } + + tc_sha256_init(hash); + tc_sha256_update(hash, msg, msglen); + tc_sha256_final(digest_bytes, hash); + + /* if digest larger than ECC scalar, drop the end + * if digest smaller than ECC scalar, zero-pad front */ + int hash_dwords = TC_SHA256_DIGEST_SIZE / 4; + if (NUM_ECC_WORDS < hash_dwords) { + hash_dwords = NUM_ECC_WORDS; + } + + memset(digest, 0, NUM_ECC_BYTES - 4 * hash_dwords); + uECC_vli_bytesToNative(digest + (NUM_ECC_WORDS-hash_dwords), + digest_bytes, TC_SHA256_DIGEST_SIZE); + + if (uECC_sign_with_k(private_bytes, digest_bytes, + sizeof(digest_bytes), k, sig_bytes, uECC_secp256r1()) == 0) { + TC_ERROR("ECDSA_sign failed!\n"); + result = TC_FAIL; + goto exitTest1; + } + + uECC_vli_bytesToNative(sig, sig_bytes, NUM_ECC_BYTES); + uECC_vli_bytesToNative(sig + NUM_ECC_WORDS, sig_bytes+NUM_ECC_BYTES, NUM_ECC_BYTES); + + result = check_ecc_result(i, "sig.r", exp_r, sig, NUM_ECC_WORDS, verbose); + if(result == TC_FAIL) { + goto exitTest1; + } + result = check_ecc_result(i, "sig.s", exp_s, sig + NUM_ECC_WORDS, NUM_ECC_WORDS, verbose); + if(result == TC_FAIL) { + goto exitTest1; + } + } + + exitTest1: + TC_END_RESULT(result); + return result; +} + +int cavp_sign(bool verbose) +{ + + /* + * [P-256,SHA-256] + */ + char *d[] = { + "519b423d715f8b581f4fa8ee59f4771a5b44c8130b4e3eacca54a56dda72b464", + "0f56db78ca460b055c500064824bed999a25aaf48ebb519ac201537b85479813", + "e283871239837e13b95f789e6e1af63bf61c918c992e62bca040d64cad1fc2ef", + "a3d2d3b7596f6592ce98b4bfe10d41837f10027a90d7bb75349490018cf72d07", + "53a0e8a8fe93db01e7ae94e1a9882a102ebd079b3a535827d583626c272d280d", + "4af107e8e2194c830ffb712a65511bc9186a133007855b49ab4b3833aefc4a1d", + "78dfaa09f1076850b3e206e477494cddcfb822aaa0128475053592c48ebaf4ab", + "80e692e3eb9fcd8c7d44e7de9f7a5952686407f90025a1d87e52c7096a62618a", + "5e666c0db0214c3b627a8e48541cc84a8b6fd15f300da4dff5d18aec6c55b881", + "f73f455271c877c4d5334627e37c278f68d143014b0a05aa62f308b2101c5308", + "b20d705d9bd7c2b8dc60393a5357f632990e599a0975573ac67fd89b49187906", + "d4234bebfbc821050341a37e1240efe5e33763cbbb2ef76a1c79e24724e5a5e7", + "b58f5211dff440626bb56d0ad483193d606cf21f36d9830543327292f4d25d8c", + "54c066711cdb061eda07e5275f7e95a9962c6764b84f6f1f3ab5a588e0a2afb1", + "34fa4682bf6cb5b16783adcd18f0e6879b92185f76d7c920409f904f522db4b1", + }; + + char *k[] = { + "94a1bbb14b906a61a280f245f9e93c7f3b4a6247824f5d33b9670787642a68de", + "6d3e71882c3b83b156bb14e0ab184aa9fb728068d3ae9fac421187ae0b2f34c6", + "ad5e887eb2b380b8d8280ad6e5ff8a60f4d26243e0124c2f31a297b5d0835de2", + "24fc90e1da13f17ef9fe84cc96b9471ed1aaac17e3a4bae33a115df4e5834f18", + "5d833e8d24cc7a402d7ee7ec852a3587cddeb48358cea71b0bedb8fabe84e0c4", + "e18f96f84dfa2fd3cdfaec9159d4c338cd54ad314134f0b31e20591fc238d0ab", + "295544dbb2da3da170741c9b2c6551d40af7ed4e891445f11a02b66a5c258a77", + "7c80fd66d62cc076cef2d030c17c0a69c99611549cb32c4ff662475adbe84b22", + "2e7625a48874d86c9e467f890aaa7cd6ebdf71c0102bfdcfa24565d6af3fdce9", + "62f8665fd6e26b3fa069e85281777a9b1f0dfd2c0b9f54a086d0c109ff9fd615", + "72b656f6b35b9ccbc712c9f1f3b1a14cbbebaec41c4bca8da18f492a062d6f6f", + "d926fe10f1bfd9855610f4f5a3d666b1a149344057e35537373372ead8b1a778", + "e158bf4a2d19a99149d9cdb879294ccb7aaeae03d75ddd616ef8ae51a6dc1071", + "646fe933e96c3b8f9f507498e907fdd201f08478d0202c752a7c2cfebf4d061a", + "a6f463ee72c9492bc792fe98163112837aebd07bab7a84aaed05be64db3086f4", + }; + + char *Msg[] = { + "5905238877c77421f73e43ee3da6f2d9e2ccad5fc942dcec0cbd25482935faaf416983fe16" + "5b1a045ee2bcd2e6dca3bdf46c4310a7461f9a37960ca672d3feb5473e253605fb1ddfd280" + "65b53cb5858a8ad28175bf9bd386a5e471ea7a65c17cc934a9d791e91491eb3754d0379979" + "0fe2d308d16146d5c9b0d0debd97d79ce8", + "c35e2f092553c55772926bdbe87c9796827d17024dbb9233a545366e2e5987dd344deb72df" + "987144b8c6c43bc41b654b94cc856e16b96d7a821c8ec039b503e3d86728c494a967d83011" + "a0e090b5d54cd47f4e366c0912bc808fbb2ea96efac88fb3ebec9342738e225f7c7c2b011c" + "e375b56621a20642b4d36e060db4524af1", + "3c054e333a94259c36af09ab5b4ff9beb3492f8d5b4282d16801daccb29f70fe61a0b37ffe" + "f5c04cd1b70e85b1f549a1c4dc672985e50f43ea037efa9964f096b5f62f7ffdf8d6bfb2cc" + "859558f5a393cb949dbd48f269343b5263dcdb9c556eca074f2e98e6d94c2c29a677afaf80" + "6edf79b15a3fcd46e7067b7669f83188ee", + "0989122410d522af64ceb07da2c865219046b4c3d9d99b01278c07ff63eaf1039cb787ae9e" + "2dd46436cc0415f280c562bebb83a23e639e476a02ec8cff7ea06cd12c86dcc3adefbf1a9e" + "9a9b6646c7599ec631b0da9a60debeb9b3e19324977f3b4f36892c8a38671c8e1cc8e50fcd" + "50f9e51deaf98272f9266fc702e4e57c30", + "dc66e39f9bbfd9865318531ffe9207f934fa615a5b285708a5e9c46b7775150e818d7f24d2" + "a123df3672fff2094e3fd3df6fbe259e3989dd5edfcccbe7d45e26a775a5c4329a084f057c" + "42c13f3248e3fd6f0c76678f890f513c32292dd306eaa84a59abe34b16cb5e38d0e885525d" + "10336ca443e1682aa04a7af832b0eee4e7", + "600974e7d8c5508e2c1aab0783ad0d7c4494ab2b4da265c2fe496421c4df238b0be25f2565" + "9157c8a225fb03953607f7df996acfd402f147e37aee2f1693e3bf1c35eab3ae360a2bd91d" + "04622ea47f83d863d2dfecb618e8b8bdc39e17d15d672eee03bb4ce2cc5cf6b217e5faf3f3" + "36fdd87d972d3a8b8a593ba85955cc9d71", + "dfa6cb9b39adda6c74cc8b2a8b53a12c499ab9dee01b4123642b4f11af336a91a5c9ce0520" + "eb2395a6190ecbf6169c4cba81941de8e76c9c908eb843b98ce95e0da29c5d4388040264e0" + "5e07030a577cc5d176387154eabae2af52a83e85c61c7c61da930c9b19e45d7e34c8516dc3" + "c238fddd6e450a77455d534c48a152010b", + "51d2547cbff92431174aa7fc7302139519d98071c755ff1c92e4694b58587ea560f72f32fc" + "6dd4dee7d22bb7387381d0256e2862d0644cdf2c277c5d740fa089830eb52bf79d1e75b859" + "6ecf0ea58a0b9df61e0c9754bfcd62efab6ea1bd216bf181c5593da79f10135a9bc6e164f1" + "854bc8859734341aad237ba29a81a3fc8b", + "558c2ac13026402bad4a0a83ebc9468e50f7ffab06d6f981e5db1d082098065bcff6f21a7a" + "74558b1e8612914b8b5a0aa28ed5b574c36ac4ea5868432a62bb8ef0695d27c1e3ceaf75c7" + "b251c65ddb268696f07c16d2767973d85beb443f211e6445e7fe5d46f0dce70d58a4cd9fe7" + "0688c035688ea8c6baec65a5fc7e2c93e8", + "4d55c99ef6bd54621662c3d110c3cb627c03d6311393b264ab97b90a4b15214a5593ba2510" + "a53d63fb34be251facb697c973e11b665cb7920f1684b0031b4dd370cb927ca7168b0bf8ad" + "285e05e9e31e34bc24024739fdc10b78586f29eff94412034e3b606ed850ec2c1900e8e681" + "51fc4aee5adebb066eb6da4eaa5681378e", + "f8248ad47d97c18c984f1f5c10950dc1404713c56b6ea397e01e6dd925e903b4fadfe2c9e8" + "77169e71ce3c7fe5ce70ee4255d9cdc26f6943bf48687874de64f6cf30a012512e787b8805" + "9bbf561162bdcc23a3742c835ac144cc14167b1bd6727e940540a9c99f3cbb41fb1dcb00d7" + "6dda04995847c657f4c19d303eb09eb48a", + "3b6ee2425940b3d240d35b97b6dcd61ed3423d8e71a0ada35d47b322d17b35ea0472f35edd" + "1d252f87b8b65ef4b716669fc9ac28b00d34a9d66ad118c9d94e7f46d0b4f6c2b2d339fd6b" + "cd351241a387cc82609057048c12c4ec3d85c661975c45b300cb96930d89370a327c98b67d" + "efaa89497aa8ef994c77f1130f752f94a4", + "c5204b81ec0a4df5b7e9fda3dc245f98082ae7f4efe81998dcaa286bd4507ca840a53d21b0" + "1e904f55e38f78c3757d5a5a4a44b1d5d4e480be3afb5b394a5d2840af42b1b4083d40afbf" + "e22d702f370d32dbfd392e128ea4724d66a3701da41ae2f03bb4d91bb946c7969404cb544f" + "71eb7a49eb4c4ec55799bda1eb545143a7", + "72e81fe221fb402148d8b7ab03549f1180bcc03d41ca59d7653801f0ba853add1f6d29edd7" + "f9abc621b2d548f8dbf8979bd16608d2d8fc3260b4ebc0dd42482481d548c7075711b57596" + "49c41f439fad69954956c9326841ea6492956829f9e0dc789f73633b40f6ac77bcae6dfc79" + "30cfe89e526d1684365c5b0be2437fdb01", + "21188c3edd5de088dacc1076b9e1bcecd79de1003c2414c3866173054dc82dde85169baa77" + "993adb20c269f60a5226111828578bcc7c29e6e8d2dae81806152c8ba0c6ada1986a1983eb" + "eec1473a73a04795b6319d48662d40881c1723a706f516fe75300f92408aa1dc6ae4288d20" + "46f23c1aa2e54b7fb6448a0da922bd7f34", + }; + + char *Qx[] = { + "1ccbe91c075fc7f4f033bfa248db8fccd3565de94bbfb12f3c59ff46c271bf83", + "e266ddfdc12668db30d4ca3e8f7749432c416044f2d2b8c10bf3d4012aeffa8a", + "74ccd8a62fba0e667c50929a53f78c21b8ff0c3c737b0b40b1750b2302b0bde8", + "322f80371bf6e044bc49391d97c1714ab87f990b949bc178cb7c43b7c22d89e1", + "1bcec4570e1ec2436596b8ded58f60c3b1ebc6a403bc5543040ba82963057244", + "a32e50be3dae2c8ba3f5e4bdae14cf7645420d425ead94036c22dd6c4fc59e00", + "8bcfe2a721ca6d753968f564ec4315be4857e28bef1908f61a366b1f03c97479", + "a88bc8430279c8c0400a77d751f26c0abc93e5de4ad9a4166357952fe041e767", + "1bc487570f040dc94196c9befe8ab2b6de77208b1f38bdaae28f9645c4d2bc3a", + "b8188bd68701fc396dab53125d4d28ea33a91daf6d21485f4770f6ea8c565dde", + "51f99d2d52d4a6e734484a018b7ca2f895c2929b6754a3a03224d07ae61166ce", + "8fb287f0202ad57ae841aea35f29b2e1d53e196d0ddd9aec24813d64c0922fb7", + "68229b48c2fe19d3db034e4c15077eb7471a66031f28a980821873915298ba76", + "0a7dbb8bf50cb605eb2268b081f26d6b08e012f952c4b70a5a1e6e7d46af98bb", + "105d22d9c626520faca13e7ced382dcbe93498315f00cc0ac39c4821d0d73737", + }; + + char *Qy[] = { + "ce4014c68811f9a21a1fdb2c0e6113e06db7ca93b7404e78dc7ccd5ca89a4ca9", + "bfa86404a2e9ffe67d47c587ef7a97a7f456b863b4d02cfc6928973ab5b1cb39", + "29074e21f3a0ef88b9efdf10d06aa4c295cc1671f758ca0e4cd108803d0f2614", + "3c15d54a5cc6b9f09de8457e873eb3deb1fceb54b0b295da6050294fae7fd999", + "8af62a4c683f096b28558320737bf83b9959a46ad2521004ef74cf85e67494e1", + "d623bf641160c289d6742c6257ae6ba574446dd1d0e74db3aaa80900b78d4ae9", + "0f67576a30b8e20d4232d8530b52fb4c89cbc589ede291e499ddd15fe870ab96", + "2d365a1eef25ead579cc9a069b6abc1b16b81c35f18785ce26a10ba6d1381185", + "ec81602abd8345e71867c8210313737865b8aa186851e1b48eaca140320f5d8f", + "423f058810f277f8fe076f6db56e9285a1bf2c2a1dae145095edd9c04970bc4a", + "4737da963c6ef7247fb88d19f9b0c667cac7fe12837fdab88c66f10d3c14cad1", + "1f6daff1aa2dd2d6d3741623eecb5e7b612997a1039aab2e5cf2de969cfea573", + "303e8ee3742a893f78b810991da697083dd8f11128c47651c27a56740a80c24c", + "f26dd7d799930062480849962ccf5004edcfd307c044f4e8f667c9baa834eeae", + "6c47f3cbbfa97dfcebe16270b8c7d5d3a5900b888c42520d751e8faf3b401ef4", + }; + + char *R[] = { + "f3ac8061b514795b8843e3d6629527ed2afd6b1f6a555a7acabb5e6f79c8c2ac", + "976d3a4e9d23326dc0baa9fa560b7c4e53f42864f508483a6473b6a11079b2db", + "35fb60f5ca0f3ca08542fb3cc641c8263a2cab7a90ee6a5e1583fac2bb6f6bd1", + "d7c562370af617b581c84a2468cc8bd50bb1cbf322de41b7887ce07c0e5884ca", + "18caaf7b663507a8bcd992b836dec9dc5703c080af5e51dfa3a9a7c387182604", + "8524c5024e2d9a73bde8c72d9129f57873bbad0ed05215a372a84fdbc78f2e68", + "c5a186d72df452015480f7f338970bfe825087f05c0088d95305f87aacc9b254", + "9d0c6afb6df3bced455b459cc21387e14929392664bb8741a3693a1795ca6902", + "2f9e2b4e9f747c657f705bffd124ee178bbc5391c86d056717b140c153570fd9", + "1cc628533d0004b2b20e7f4baad0b8bb5e0673db159bbccf92491aef61fc9620", + "9886ae46c1415c3bc959e82b760ad760aab66885a84e620aa339fdf102465c42", + "490efd106be11fc365c7467eb89b8d39e15d65175356775deab211163c2504cb", + "e67a9717ccf96841489d6541f4f6adb12d17b59a6bef847b6183b8fcf16a32eb", + "b53ce4da1aa7c0dc77a1896ab716b921499aed78df725b1504aba1597ba0c64b", + "542c40a18140a6266d6f0286e24e9a7bad7650e72ef0e2131e629c076d962663", + }; + + char *S[] = { + "8bf77819ca05a6b2786c76262bf7371cef97b218e96f175a3ccdda2acc058903", + "1b766e9ceb71ba6c01dcd46e0af462cd4cfa652ae5017d4555b8eeefe36e1932", + "ee59d81bc9db1055cc0ed97b159d8784af04e98511d0a9a407b99bb292572e96", + "b46d9f2d8c4bf83546ff178f1d78937c008d64e8ecc5cbb825cb21d94d670d89", + "77c68928ac3b88d985fb43fb615fb7ff45c18ba5c81af796c613dfa98352d29c", + "d18c2caf3b1072f87064ec5e8953f51301cada03469c640244760328eb5a05cb", + "84a58f9e9d9e735344b316b1aa1ab5185665b85147dc82d92e969d7bee31ca30", + "d7f9ddd191f1f412869429209ee3814c75c72fa46a9cccf804a2f5cc0b7e739f", + "f5413bfd85949da8d83de83ab0d19b2986613e224d1901d76919de23ccd03199", + "880e0bbf82a8cf818ed46ba03cf0fc6c898e36fca36cc7fdb1d2db7503634430", + "2bf3a80bc04faa35ebecc0f4864ac02d349f6f126e0f988501b8d3075409a26c", + "644300fc0da4d40fb8c6ead510d14f0bd4e1321a469e9c0a581464c7186b7aa7", + "9ae6ba6d637706849a6a9fc388cf0232d85c26ea0d1fe7437adb48de58364333", + "d7c246dc7ad0e67700c373edcfdd1c0a0495fc954549ad579df6ed1438840851", + "4f7f65305e24a6bbb5cff714ba8f5a2cee5bdc89ba8d75dcbf21966ce38eb66f", + }; + + struct tc_sha256_state_struct sha256_ctx; + + TC_PRINT("Test #1: ECDSAsign "); + TC_PRINT("NIST-p256, SHA2-256\n"); + + return sign_vectors(&sha256_ctx, d, k, Msg, Qx, Qy, R, S, 15, verbose); +} + +int vrfy_vectors(TCSha256State_t hash, char **msg_vec, char **qx_vec, char **qy_vec, + char **r_vec, char **s_vec, char **res_vec, int tests, bool verbose) +{ + + const struct uECC_Curve_t * curve = uECC_secp256r1(); + unsigned int pub[2 * NUM_ECC_WORDS]; + uint8_t pub_bytes[2 * NUM_ECC_BYTES]; + unsigned int sig[2 * NUM_ECC_WORDS]; + uint8_t sig_bytes[2 * NUM_ECC_BYTES]; + uint8_t digest_bytes[TC_SHA256_DIGEST_SIZE]; + unsigned int digest[TC_SHA256_DIGEST_SIZE / 4]; + unsigned int result = TC_PASS; + + int rc; + int exp_rc; + char tmp; + + uint8_t msg[BUF_SIZE]; + size_t msglen; + + for (int i = 0; i < tests; i++) { + + string2scalar(pub, NUM_ECC_WORDS, qx_vec[i]); + string2scalar(pub + NUM_ECC_WORDS, NUM_ECC_WORDS, qy_vec[i]); + string2scalar(sig, NUM_ECC_WORDS, r_vec[i]); + string2scalar(sig + NUM_ECC_WORDS, NUM_ECC_WORDS, s_vec[i]); + + if (2 != sscanf(res_vec[i], "%c (%d ", &tmp, &exp_rc)) { + TC_ERROR("Error: failed to parse CAVP response.\n"); + result = TC_FAIL; + goto exitTest1; + } + + /* validate ECDSA: hash message, verify r+s */ + msglen = hex2bin(msg, BUF_SIZE, msg_vec[i], strlen(msg_vec[i])); + + if (msglen == false) { + TC_ERROR("failed to import message!\n"); + result = TC_FAIL; + goto exitTest1; + } + + tc_sha256_init(hash); + tc_sha256_update(hash, msg, msglen); + tc_sha256_final(digest_bytes, hash); + + /* if digest larger than ECC scalar, drop the end + * if digest smaller than ECC scalar, zero-pad front */ + int hash_dwords = TC_SHA256_DIGEST_SIZE / 4; + if (NUM_ECC_WORDS < hash_dwords) { + hash_dwords = NUM_ECC_WORDS; + } + + memset(digest, 0, NUM_ECC_BYTES - 4 * hash_dwords); + uECC_vli_bytesToNative(digest + (NUM_ECC_WORDS-hash_dwords), digest_bytes, + TC_SHA256_DIGEST_SIZE); + + uECC_vli_nativeToBytes(pub_bytes, NUM_ECC_BYTES, pub); + uECC_vli_nativeToBytes(pub_bytes + NUM_ECC_BYTES, NUM_ECC_BYTES, + pub + NUM_ECC_WORDS); + + /* adapt return codes to match CAVP error: */ + if (0 != uECC_valid_public_key(pub_bytes, curve)) { + /* error 4 - Q changed */ + rc = 4; + } else { + uECC_vli_nativeToBytes(sig_bytes, NUM_ECC_BYTES, sig); + uECC_vli_nativeToBytes(sig_bytes + NUM_ECC_BYTES, NUM_ECC_BYTES, + sig + NUM_ECC_WORDS); + + rc = uECC_verify(pub_bytes, digest_bytes, sizeof(digest_bytes), sig_bytes, + uECC_secp256r1()); + /* CAVP expects 0 for success, others for fail */ + rc = !rc; + if (exp_rc != 0 && rc != 0) { + /* mimic CAVP code on errors. */ + rc = exp_rc; + } + } + + result = check_code(i, res_vec[i], exp_rc, rc, verbose); + if(result == TC_FAIL) { + goto exitTest1; + } + } + exitTest1: + TC_END_RESULT(result); + return result; +} + +int cavp_verify(bool verbose) +{ + + /* + * [P-256,SHA-256] + */ + char *Msg[] = { + "e4796db5f785f207aa30d311693b3702821dff1168fd2e04c0836825aefd850d9aa60326d8" + "8cde1a23c7745351392ca2288d632c264f197d05cd424a30336c19fd09bb229654f0222fcb" + "881a4b35c290a093ac159ce13409111ff0358411133c24f5b8e2090d6db6558afc36f06ca1" + "f6ef779785adba68db27a409859fc4c4a0", + "069a6e6b93dfee6df6ef6997cd80dd2182c36653cef10c655d524585655462d683877f95ec" + "c6d6c81623d8fac4e900ed0019964094e7de91f1481989ae1873004565789cbf5dc56c62ae" + "dc63f62f3b894c9c6f7788c8ecaadc9bd0e81ad91b2b3569ea12260e93924fdddd3972af52" + "73198f5efda0746219475017557616170e", + "df04a346cf4d0e331a6db78cca2d456d31b0a000aa51441defdb97bbeb20b94d8d746429a3" + "93ba88840d661615e07def615a342abedfa4ce912e562af714959896858af817317a840dcf" + "f85a057bb91a3c2bf90105500362754a6dd321cdd86128cfc5f04667b57aa78c112411e42d" + "a304f1012d48cd6a7052d7de44ebcc01de", + "e1130af6a38ccb412a9c8d13e15dbfc9e69a16385af3c3f1e5da954fd5e7c45fd75e2b8c36" + "699228e92840c0562fbf3772f07e17f1add56588dd45f7450e1217ad239922dd9c32695dc7" + "1ff2424ca0dec1321aa47064a044b7fe3c2b97d03ce470a592304c5ef21eed9f93da56bb23" + "2d1eeb0035f9bf0dfafdcc4606272b20a3", + "73c5f6a67456ae48209b5f85d1e7de7758bf235300c6ae2bdceb1dcb27a7730fb68c950b7f" + "cada0ecc4661d3578230f225a875e69aaa17f1e71c6be5c831f22663bac63d0c7a9635edb0" + "043ff8c6f26470f02a7bc56556f1437f06dfa27b487a6c4290d8bad38d4879b334e341ba09" + "2dde4e4ae694a9c09302e2dbf443581c08", + "666036d9b4a2426ed6585a4e0fd931a8761451d29ab04bd7dc6d0c5b9e38e6c2b263ff6cb8" + "37bd04399de3d757c6c7005f6d7a987063cf6d7e8cb38a4bf0d74a282572bd01d0f41e3fd0" + "66e3021575f0fa04f27b700d5b7ddddf50965993c3f9c7118ed78888da7cb221849b326059" + "2b8e632d7c51e935a0ceae15207bedd548", + "7e80436bce57339ce8da1b5660149a20240b146d108deef3ec5da4ae256f8f894edcbbc57b" + "34ce37089c0daa17f0c46cd82b5a1599314fd79d2fd2f446bd5a25b8e32fcf05b76d644573" + "a6df4ad1dfea707b479d97237a346f1ec632ea5660efb57e8717a8628d7f82af50a4e84b11" + "f21bdff6839196a880ae20b2a0918d58cd", + "1669bfb657fdc62c3ddd63269787fc1c969f1850fb04c933dda063ef74a56ce13e3a649700" + "820f0061efabf849a85d474326c8a541d99830eea8131eaea584f22d88c353965dabcdc4bf" + "6b55949fd529507dfb803ab6b480cd73ca0ba00ca19c438849e2cea262a1c57d8f81cd257f" + "b58e19dec7904da97d8386e87b84948169", + "3fe60dd9ad6caccf5a6f583b3ae65953563446c4510b70da115ffaa0ba04c076115c7043ab" + "8733403cd69c7d14c212c655c07b43a7c71b9a4cffe22c2684788ec6870dc2013f269172c8" + "22256f9e7cc674791bf2d8486c0f5684283e1649576efc982ede17c7b74b214754d70402fb" + "4bb45ad086cf2cf76b3d63f7fce39ac970", + "983a71b9994d95e876d84d28946a041f8f0a3f544cfcc055496580f1dfd4e312a2ad418fe6" + "9dbc61db230cc0c0ed97e360abab7d6ff4b81ee970a7e97466acfd9644f828ffec538abc38" + "3d0e92326d1c88c55e1f46a668a039beaa1be631a89129938c00a81a3ae46d4aecbf9707f7" + "64dbaccea3ef7665e4c4307fa0b0a3075c", + "4a8c071ac4fd0d52faa407b0fe5dab759f7394a5832127f2a3498f34aac287339e043b4ffa" + "79528faf199dc917f7b066ad65505dab0e11e6948515052ce20cfdb892ffb8aa9bf3f1aa5b" + "e30a5bbe85823bddf70b39fd7ebd4a93a2f75472c1d4f606247a9821f1a8c45a6cb80545de" + "2e0c6c0174e2392088c754e9c8443eb5af", + "0a3a12c3084c865daf1d302c78215d39bfe0b8bf28272b3c0b74beb4b7409db0718239de70" + "0785581514321c6440a4bbaea4c76fa47401e151e68cb6c29017f0bce4631290af5ea5e2bf" + "3ed742ae110b04ade83a5dbd7358f29a85938e23d87ac8233072b79c94670ff0959f9c7f45" + "17862ff829452096c78f5f2e9a7e4e9216", + "785d07a3c54f63dca11f5d1a5f496ee2c2f9288e55007e666c78b007d95cc28581dce51f49" + "0b30fa73dc9e2d45d075d7e3a95fb8a9e1465ad191904124160b7c60fa720ef4ef1c5d2998" + "f40570ae2a870ef3e894c2bc617d8a1dc85c3c55774928c38789b4e661349d3f84d2441a3b" + "856a76949b9f1f80bc161648a1cad5588e", + "76f987ec5448dd72219bd30bf6b66b0775c80b394851a43ff1f537f140a6e7229ef8cd72ad" + "58b1d2d20298539d6347dd5598812bc65323aceaf05228f738b5ad3e8d9fe4100fd767c2f0" + "98c77cb99c2992843ba3eed91d32444f3b6db6cd212dd4e5609548f4bb62812a920f6e2bf1" + "581be1ebeebdd06ec4e971862cc42055ca", + "60cd64b2cd2be6c33859b94875120361a24085f3765cb8b2bf11e026fa9d8855dbe435acf7" + "882e84f3c7857f96e2baab4d9afe4588e4a82e17a78827bfdb5ddbd1c211fbc2e6d884cddd" + "7cb9d90d5bf4a7311b83f352508033812c776a0e00c003c7e0d628e50736c7512df0acfa9f" + "2320bd102229f46495ae6d0857cc452a84", + }; + + char *Qx[] = { + "87f8f2b218f49845f6f10eec3877136269f5c1a54736dbdf69f89940cad41555", + "5cf02a00d205bdfee2016f7421807fc38ae69e6b7ccd064ee689fc1a94a9f7d2", + "2ddfd145767883ffbb0ac003ab4a44346d08fa2570b3120dcce94562422244cb", + "e424dc61d4bb3cb7ef4344a7f8957a0c5134e16f7a67c074f82e6e12f49abf3c", + "e0fc6a6f50e1c57475673ee54e3a57f9a49f3328e743bf52f335e3eeaa3d2864", + "a849bef575cac3c6920fbce675c3b787136209f855de19ffe2e8d29b31a5ad86", + "3dfb6f40f2471b29b77fdccba72d37c21bba019efa40c1c8f91ec405d7dcc5df", + "69b7667056e1e11d6caf6e45643f8b21e7a4bebda463c7fdbc13bc98efbd0214", + "bf02cbcf6d8cc26e91766d8af0b164fc5968535e84c158eb3bc4e2d79c3cc682", + "224a4d65b958f6d6afb2904863efd2a734b31798884801fcab5a590f4d6da9de", + "43691c7795a57ead8c5c68536fe934538d46f12889680a9cb6d055a066228369", + "9157dbfcf8cf385f5bb1568ad5c6e2a8652ba6dfc63bc1753edf5268cb7eb596", + "072b10c081a4c1713a294f248aef850e297991aca47fa96a7470abe3b8acfdda", + "09308ea5bfad6e5adf408634b3d5ce9240d35442f7fe116452aaec0d25be8c24", + "2d98ea01f754d34bbc3003df5050200abf445ec728556d7ed7d5c54c55552b6d", + }; + + char *Qy[] = { + "e15f369036f49842fac7a86c8a2b0557609776814448b8f5e84aa9f4395205e9", + "ec530ce3cc5c9d1af463f264d685afe2b4db4b5828d7e61b748930f3ce622a85", + "5f70c7d11ac2b7a435ccfbbae02c3df1ea6b532cc0e9db74f93fffca7c6f9a64", + "970eed7aa2bc48651545949de1dddaf0127e5965ac85d1243d6f60e7dfaee927", + "7f59d689c91e463607d9194d99faf316e25432870816dde63f5d4b373f12f22a", + "bf5fe4f7858f9b805bd8dcc05ad5e7fb889de2f822f3d8b41694e6c55c16b471", + "f22f953f1e395a52ead7f3ae3fc47451b438117b1e04d613bc8555b7d6e6d1bb", + "d3f9b12eb46c7c6fda0da3fc85bc1fd831557f9abc902a3be3cb3e8be7d1aa2f", + "069ba6cb06b49d60812066afa16ecf7b51352f2c03bd93ec220822b1f3dfba03", + "178d51fddada62806f097aa615d33b8f2404e6b1479f5fd4859d595734d6d2b9", + "f8790110b3c3b281aa1eae037d4f1234aff587d903d93ba3af225c27ddc9ccac", + "972570f4313d47fc96f7c02d5594d77d46f91e949808825b3d31f029e8296405", + "9581145cca04a0fb94cedce752c8f0370861916d2a94e7c647c5373ce6a4c8f5", + "f40c93e023ef494b1c3079b2d10ef67f3170740495ce2cc57f8ee4b0618b8ee5", + "9b52672742d637a32add056dfd6d8792f2a33c2e69dafabea09b960bc61e230a", + }; + + char *R[] = { + "d19ff48b324915576416097d2544f7cbdf8768b1454ad20e0baac50e211f23b0", + "dc23d130c6117fb5751201455e99f36f59aba1a6a21cf2d0e7481a97451d6693", + "9913111cff6f20c5bf453a99cd2c2019a4e749a49724a08774d14e4c113edda8", + "bf96b99aa49c705c910be33142017c642ff540c76349b9dab72f981fd9347f4f", + "1d75830cd36f4c9aa181b2c4221e87f176b7f05b7c87824e82e396c88315c407", + "25acc3aa9d9e84c7abf08f73fa4195acc506491d6fc37cb9074528a7db87b9d6", + "548886278e5ec26bed811dbb72db1e154b6f17be70deb1b210107decb1ec2a5a", + "288f7a1cd391842cce21f00e6f15471c04dc182fe4b14d92dc18910879799790", + "f5acb06c59c2b4927fb852faa07faf4b1852bbb5d06840935e849c4d293d1bad", + "87b93ee2fecfda54deb8dff8e426f3c72c8864991f8ec2b3205bb3b416de93d2", + "8acd62e8c262fa50dd9840480969f4ef70f218ebf8ef9584f199031132c6b1ce", + "dfaea6f297fa320b707866125c2a7d5d515b51a503bee817de9faa343cc48eeb", + "09f5483eccec80f9d104815a1be9cc1a8e5b12b6eb482a65c6907b7480cf4f19", + "5cc8aa7c35743ec0c23dde88dabd5e4fcd0192d2116f6926fef788cddb754e73", + "06108e525f845d0155bf60193222b3219c98e3d49424c2fb2a0987f825c17959", + }; + + char *Result[] = { + "F (3 - S changed)", "F (2 - R changed)", "F (4 - Q changed)", + "P (0 )", "P (0 )", "F (2 - R changed)", + "F (4 - Q changed)", "F (1 - Message changed)", "F (3 - S changed)", + "F (2 - R changed)", "F (3 - S changed)", "F (1 - Message changed)", + "F (4 - Q changed)", "F (1 - Message changed)", "P (0 )", + }; + + char *S[] = { + "a3e81e59311cdfff2d4784949f7a2cb50ba6c3a91fa54710568e61aca3e847c6", + "d6ce7708c18dbf35d4f8aa7240922dc6823f2e7058cbc1484fcad1599db5018c", + "9467cd4cd21ecb56b0cab0a9a453b43386845459127a952421f5c6382866c5cc", + "17c55095819089c2e03b9cd415abdf12444e323075d98f31920b9e0f57ec871c", + "cb2acb01dac96efc53a32d4a0d85d0c2e48955214783ecf50a4f0414a319c05a", + "9b21d5b5259ed3f2ef07dfec6cc90d3a37855d1ce122a85ba6a333f307d31537", + "e93bfebd2f14f3d827ca32b464be6e69187f5edbd52def4f96599c37d58eee75", + "247b3c4e89a3bcadfea73c7bfd361def43715fa382b8c3edf4ae15d6e55e9979", + "049dab79c89cc02f1484c437f523e080a75f134917fda752f2d5ca397addfe5d", + "4044a24df85be0cc76f21a4430b75b8e77b932a87f51e4eccbc45c263ebf8f66", + "cfca7ed3d4347fb2a29e526b43c348ae1ce6c60d44f3191b6d8ea3a2d9c92154", + "8f780ad713f9c3e5a4f7fa4c519833dfefc6a7432389b1e4af463961f09764f2", + "a4f90e560c5e4eb8696cb276e5165b6a9d486345dedfb094a76e8442d026378d", + "9c9c045ebaa1b828c32f82ace0d18daebf5e156eb7cbfdc1eff4399a8a900ae7", + "62b5cdd591e5b507e560167ba8f6f7cda74673eb315680cb89ccbc4eec477dce", + }; + + struct tc_sha256_state_struct sha256_ctx; + + printf("Test #2: ECDSAvrfy "); + printf("NIST-p256, SHA2-256\n"); + + return vrfy_vectors(&sha256_ctx, Msg, Qx, Qy, R, S, Result, 15, verbose); +} + +int montecarlo_signverify(int num_tests, bool verbose) +{ + printf("Test #3: Monte Carlo (%d Randomized EC-DSA signatures) ", num_tests); + printf("NIST-p256, SHA2-256\n "); + int i; + uint8_t private[NUM_ECC_BYTES]; + uint8_t public[2*NUM_ECC_BYTES]; + uint8_t hash[NUM_ECC_BYTES]; + unsigned int hash_words[NUM_ECC_WORDS]; + uint8_t sig[2*NUM_ECC_BYTES]; + + const struct uECC_Curve_t * curve = uECC_secp256r1(); + + for (i = 0; i < num_tests; ++i) { + if (verbose) { + TC_PRINT("."); + fflush(stdout); + } + + uECC_generate_random_int(hash_words, curve->n, BITS_TO_WORDS(curve->num_n_bits)); + uECC_vli_nativeToBytes(hash, NUM_ECC_BYTES, hash_words); + + if (!uECC_make_key(public, private, curve)) { + TC_ERROR("uECC_make_key() failed\n"); + return TC_FAIL; + } + + if (!uECC_sign(private, hash, sizeof(hash), sig, curve)) { + TC_ERROR("uECC_sign() failed\n"); + return TC_FAIL; + } + + if (!uECC_verify(public, hash, sizeof(hash), sig, curve)) { + TC_ERROR("uECC_verify() failed\n"); + return TC_FAIL; + } + if (verbose) { + fflush(stdout); + printf("."); + } + } + TC_PRINT("\n"); + return TC_PASS; +} + +int main() +{ + unsigned int result = TC_PASS; + + TC_START("Performing ECC-DSA tests:"); + /* Setup of the Cryptographically Secure PRNG. */ + uECC_set_rng(&default_CSPRNG); + + bool verbose = true; + + TC_PRINT("Performing cavp_sign test:\n"); + result = cavp_sign(verbose); + if (result == TC_FAIL) { /* terminate test */ + TC_ERROR("cavp_sign test failed.\n"); + goto exitTest; + } + TC_PRINT("Performing cavp_verify test:\n"); + result = cavp_verify(verbose); + if (result == TC_FAIL) { + TC_ERROR("cavp_verify test failed.\n"); + goto exitTest; + } + TC_PRINT("Performing montecarlo_signverify test:\n"); + result = montecarlo_signverify(10, verbose); + if (result == TC_FAIL) { + TC_ERROR("montecarlo_signverify test failed.\n"); + goto exitTest; + } + + TC_PRINT("\nAll ECC-DSA tests succeeded.\n"); + + exitTest: + TC_END_RESULT(result); + TC_END_REPORT(result); +} diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/test_ecc_utils.c b/bootloader/mcuboot/ext/tinycrypt/tests/test_ecc_utils.c new file mode 100644 index 0000000..5c81eba --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/test_ecc_utils.c @@ -0,0 +1,271 @@ +/* test_ecc_utils.c - TinyCrypt common functions for ECC tests */ + +/* Copyright (c) 2014, Kenneth MacKay + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE.*/ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * test_ecc_utils.c -- Implementation of some common functions for ECC tests. + * + */ + +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +int hex2int (char hex) +{ + uint8_t dec; + + if ('0' <= hex && hex <= '9') dec = hex - '0'; + else if ('a' <= hex && hex <= 'f') dec = hex - 'a' + 10; + else if ('A' <= hex && hex <= 'F') dec = hex - 'A' + 10; + else return -1; + + return dec; +} + +/* + * Convert hex string to byte string + * Return number of bytes written to buf, or 0 on error + */ +int hex2bin(uint8_t *buf, const size_t buflen, const char *hex, + const size_t hexlen) +{ + + int dec; + + if (buflen < hexlen / 2 + hexlen % 2) + { + return false; + } + + /* if hexlen is uneven, insert leading zero nibble */ + if (hexlen % 2) + { + dec = hex2int(hex[0]); + if (dec == -1) + return false; + buf[0] = dec; + buf++; + hex++; + } + + /* regular hex conversion */ + for (size_t i = 0; i < hexlen / 2; i++) + { + dec = hex2int(hex[2 * i]); + if (dec == -1) + { + return false; + } + buf[i] = dec << 4; + + dec = hex2int(hex[ 2 * i + 1]); + if (dec == -1) + { + return false; + } + buf[i] += dec; + } + return hexlen / 2 + hexlen % 2; +} + +/* + * Convert hex string to zero-padded nanoECC scalar + */ +void string2scalar(unsigned int *scalar, unsigned int num_word32, char *str) +{ + + unsigned int num_bytes = 4 * num_word32; + uint8_t tmp[num_bytes]; + size_t hexlen = strlen(str); + + int padding; + + if (0 > (padding = 2 * num_bytes - strlen(str))) + { + printf("Error: 2 * num_bytes(%d) < strlen(hex) (%zu)\n", + 2 * num_bytes, strlen(str)); + exit(-1); + } + + memset(tmp, 0, padding / 2); + + if (false == hex2bin(tmp + padding / 2, num_bytes, str, hexlen)) + { + exit(-1); + } + uECC_vli_bytesToNative(scalar, tmp, num_bytes); + +} + +void vli_print_bytes(uint8_t *vli, unsigned int size) +{ + for(unsigned i = 0; i < size; ++i) + { + printf("%02X ", (unsigned)vli[i]); + } +} + +void print_ecc_scalar(const char *label, const unsigned int * p_vli, + unsigned int num_word32) +{ + unsigned int i; + + if (label) { + printf("%s = { ", label); + } + + for(i = 0; i < num_word32 - 1; ++i) { + printf("0x%08lX, ", (unsigned long)p_vli[i]); + } + printf("0x%08lX", (unsigned long)p_vli[i]); + + if (label) { + printf(" };\n"); + } +} + +int check_ecc_result(const int num, const char *name, + const unsigned int *expected, + const unsigned int *computed, + const unsigned int num_word32, const bool verbose) +{ + uint32_t num_bytes = 4 * num_word32; + if (memcmp(computed, expected, num_bytes)) { + TC_PRINT("\n Vector #%02d check %s - FAILURE:\n\n", num, name); + print_ecc_scalar("Expected", expected, num_word32); + print_ecc_scalar("Computed", computed, num_word32); + TC_PRINT("\n"); + return TC_FAIL; + } + if (verbose) { + TC_PRINT(" Vector #%02d check %s - success\n", num, name); + } + return TC_PASS; +} + +int check_code(const int num, const char *name, const int expected, + const int computed, const int verbose) +{ + + if (expected != computed) { + TC_ERROR("\n Vector #%02d check %s - FAILURE:\n", num, name); + TC_ERROR("\n Expected: %d, computed: %d\n\n", expected, computed); + return TC_FAIL; + } + + if (verbose) { + TC_PRINT(" Vector #%02d check %s - success (%d=%d)\n", num, name, + expected, computed); + } + + return TC_PASS; +} + +/* Test ecc_make_keys, and also as keygen part of other tests */ +int keygen_vectors(char **d_vec, char **qx_vec, char **qy_vec, int tests, + bool verbose) +{ + + unsigned int pub[2 * NUM_ECC_WORDS]; + unsigned int d[NUM_ECC_WORDS]; + unsigned int prv[NUM_ECC_WORDS]; + unsigned int result = TC_PASS; + + /* expected outputs (converted input vectors) */ + unsigned int exp_pub[2 * NUM_ECC_WORDS]; + unsigned int exp_prv[NUM_ECC_WORDS]; + + for (int i = 0; i < tests; i++) { + string2scalar(exp_prv, NUM_ECC_WORDS, d_vec[i]); + string2scalar(exp_pub, NUM_ECC_WORDS, qx_vec[i]); + string2scalar(exp_pub + NUM_ECC_WORDS, NUM_ECC_WORDS, qy_vec[i]); + + /* + * Feed prvkey vector as padded random seed into ecc_make_key. + * Internal mod-reduction will be zero-op and generate correct prv/pub + */ + memset(d, 0, NUM_ECC_WORDS); + string2scalar(d, NUM_ECC_WORDS, d_vec[i]); + + uint8_t pub_bytes[2*NUM_ECC_BYTES]; + uint8_t prv_bytes[NUM_ECC_BYTES]; + + uECC_make_key_with_d(pub_bytes, prv_bytes, d, uECC_secp256r1()); + + uECC_vli_bytesToNative(prv, prv_bytes, NUM_ECC_BYTES); + uECC_vli_bytesToNative(pub, pub_bytes, NUM_ECC_BYTES); + uECC_vli_bytesToNative(pub + NUM_ECC_WORDS, pub_bytes + NUM_ECC_BYTES, NUM_ECC_BYTES); + + /* validate correctness of vector conversion and make_key() */ + result = check_ecc_result(i, "prv ", exp_prv, prv, NUM_ECC_WORDS, verbose); + if (result == TC_FAIL) { + return result; + } + result = check_ecc_result(i, "pub.x", exp_pub, pub, NUM_ECC_WORDS, verbose); + if (result == TC_FAIL) { + return result; + } + result = check_ecc_result(i, "pub.y", exp_pub + NUM_ECC_WORDS, pub + NUM_ECC_WORDS, NUM_ECC_WORDS, verbose); + if (result == TC_FAIL) { + return result; + } + } + return result; +} diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/test_hmac.c b/bootloader/mcuboot/ext/tinycrypt/tests/test_hmac.c new file mode 100644 index 0000000..a41275e --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/test_hmac.c @@ -0,0 +1,362 @@ +/* test_hmac.c - TinyCrypt implementation of some HMAC tests */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + DESCRIPTION + This module tests the following HMAC routines: + + Scenarios tested include: + - HMAC tests (RFC 4231 test vectors) +*/ + +#include +#include +#include +#include + +#include +#include +#include +#include + +unsigned int do_hmac_test(TCHmacState_t h, unsigned int testnum, const uint8_t *data, + size_t datalen, const uint8_t *expected, + size_t expectedlen) +{ + uint8_t digest[32]; + unsigned int result = TC_PASS; + + (void)tc_hmac_init(h); + (void)tc_hmac_update(h, data, datalen); + (void)tc_hmac_final(digest, TC_SHA256_DIGEST_SIZE, h); + result = check_result(testnum, expected, expectedlen, + digest, sizeof(digest)); + return result; +} + +/* + * NIST test vectors for encryption. + */ +unsigned int test_1(void) +{ + unsigned int result = TC_PASS; + + TC_PRINT("HMAC %s:\n", __func__); + + const uint8_t key[20] = { + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b + }; + const uint8_t data[8] = { + 0x48, 0x69, 0x20, 0x54, 0x68, 0x65, 0x72, 0x65 + }; + const uint8_t expected[32] = { + 0xb0, 0x34, 0x4c, 0x61, 0xd8, 0xdb, 0x38, 0x53, 0x5c, 0xa8, 0xaf, 0xce, + 0xaf, 0x0b, 0xf1, 0x2b, 0x88, 0x1d, 0xc2, 0x00, 0xc9, 0x83, 0x3d, 0xa7, + 0x26, 0xe9, 0x37, 0x6c, 0x2e, 0x32, 0xcf, 0xf7 + }; + struct tc_hmac_state_struct h; + + (void)memset(&h, 0x00, sizeof(h)); + (void)tc_hmac_set_key(&h, key, sizeof(key)); + result = do_hmac_test(&h, 1, data, sizeof(data),expected, + sizeof(expected)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_2(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("HMAC %s:\n", __func__); + const uint8_t key[4] = { + 0x4a, 0x65, 0x66, 0x65 + }; + const uint8_t data[28] = { + 0x77, 0x68, 0x61, 0x74, 0x20, 0x64, 0x6f, 0x20, 0x79, 0x61, 0x20, 0x77, + 0x61, 0x6e, 0x74, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x6e, 0x6f, 0x74, 0x68, + 0x69, 0x6e, 0x67, 0x3f + }; + const uint8_t expected[32] = { + 0x5b, 0xdc, 0xc1, 0x46, 0xbf, 0x60, 0x75, 0x4e, 0x6a, 0x04, 0x24, 0x26, + 0x08, 0x95, 0x75, 0xc7, 0x5a, 0x00, 0x3f, 0x08, 0x9d, 0x27, 0x39, 0x83, + 0x9d, 0xec, 0x58, 0xb9, 0x64, 0xec, 0x38, 0x43 + }; + struct tc_hmac_state_struct h; + + (void)memset(&h, 0x00, sizeof(h)); + (void)tc_hmac_set_key(&h, key, sizeof(key)); + + result = do_hmac_test(&h, 2, data, sizeof(data), expected, + sizeof(expected)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_3(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("HMAC %s:\n", __func__); + const uint8_t key[20] = { + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa + }; + const uint8_t data[50] = { + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd + }; + const uint8_t expected[32] = { + 0x77, 0x3e, 0xa9, 0x1e, 0x36, 0x80, 0x0e, 0x46, 0x85, 0x4d, 0xb8, 0xeb, + 0xd0, 0x91, 0x81, 0xa7, 0x29, 0x59, 0x09, 0x8b, 0x3e, 0xf8, 0xc1, 0x22, + 0xd9, 0x63, 0x55, 0x14, 0xce, 0xd5, 0x65, 0xfe + }; + struct tc_hmac_state_struct h; + + (void)memset(&h, 0x00, sizeof(h)); + (void)tc_hmac_set_key(&h, key, sizeof(key)); + + result = do_hmac_test(&h, 3, data, sizeof(data), expected, + sizeof(expected)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_4(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("HMAC %s:\n", __func__); + + const uint8_t key[25] = { + 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, + 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, + 0x19 + }; + const uint8_t data[50] = { + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd + }; + const uint8_t expected[32] = { + 0x82, 0x55, 0x8a, 0x38, 0x9a, 0x44, 0x3c, 0x0e, 0xa4, 0xcc, 0x81, 0x98, + 0x99, 0xf2, 0x08, 0x3a, 0x85, 0xf0, 0xfa, 0xa3, 0xe5, 0x78, 0xf8, 0x07, + 0x7a, 0x2e, 0x3f, 0xf4, 0x67, 0x29, 0x66, 0x5b + }; + struct tc_hmac_state_struct h; + + (void)memset(&h, 0x00, sizeof(h)); + (void)tc_hmac_set_key(&h, key, sizeof(key)); + + result = do_hmac_test(&h, 4, data, sizeof(data), expected, + sizeof(expected)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_5(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("HMAC %s:\n", __func__); + const uint8_t key[20] = { + 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, + 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c + }; + const uint8_t data[20] = { + 0x54, 0x65, 0x73, 0x74, 0x20, 0x57, 0x69, 0x74, 0x68, 0x20, 0x54, 0x72, + 0x75, 0x6e, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e + }; + const uint8_t expected[32] = { + 0xa3, 0xb6, 0x16, 0x74, 0x73, 0x10, 0x0e, 0xe0, 0x6e, 0x0c, 0x79, 0x6c, + 0x29, 0x55, 0x55, 0x2b, 0xfa, 0x6f, 0x7c, 0x0a, 0x6a, 0x8a, 0xef, 0x8b, + 0x93, 0xf8, 0x60, 0xaa, 0xb0, 0xcd, 0x20, 0xc5 + }; + struct tc_hmac_state_struct h; + + (void)memset(&h, 0x00, sizeof(h)); + (void)tc_hmac_set_key(&h, key, sizeof(key)); + + result = do_hmac_test(&h, 5, data, sizeof(data), expected, + sizeof(expected)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_6(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("HMAC %s:\n", __func__); + const uint8_t key[131] = { + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa + }; + const uint8_t data[54] = { + 0x54, 0x65, 0x73, 0x74, 0x20, 0x55, 0x73, 0x69, 0x6e, 0x67, 0x20, 0x4c, + 0x61, 0x72, 0x67, 0x65, 0x72, 0x20, 0x54, 0x68, 0x61, 0x6e, 0x20, 0x42, + 0x6c, 0x6f, 0x63, 0x6b, 0x2d, 0x53, 0x69, 0x7a, 0x65, 0x20, 0x4b, 0x65, + 0x79, 0x20, 0x2d, 0x20, 0x48, 0x61, 0x73, 0x68, 0x20, 0x4b, 0x65, 0x79, + 0x20, 0x46, 0x69, 0x72, 0x73, 0x74 + }; + const uint8_t expected[32] = { + 0x60, 0xe4, 0x31, 0x59, 0x1e, 0xe0, 0xb6, 0x7f, 0x0d, 0x8a, 0x26, 0xaa, + 0xcb, 0xf5, 0xb7, 0x7f, 0x8e, 0x0b, 0xc6, 0x21, 0x37, 0x28, 0xc5, 0x14, + 0x05, 0x46, 0x04, 0x0f, 0x0e, 0xe3, 0x7f, 0x54 + }; + struct tc_hmac_state_struct h; + + (void)memset(&h, 0x00, sizeof(h)); + (void)tc_hmac_set_key(&h, key, sizeof(key)); + + result = do_hmac_test(&h, 6, data, sizeof(data), expected, + sizeof(expected)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_7(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("HMAC %s:\n", __func__); + const uint8_t key[131] = { + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa + }; + const uint8_t data[152] = { + 0x54, 0x68, 0x69, 0x73, 0x20, 0x69, 0x73, 0x20, 0x61, 0x20, 0x74, 0x65, + 0x73, 0x74, 0x20, 0x75, 0x73, 0x69, 0x6e, 0x67, 0x20, 0x61, 0x20, 0x6c, + 0x61, 0x72, 0x67, 0x65, 0x72, 0x20, 0x74, 0x68, 0x61, 0x6e, 0x20, 0x62, + 0x6c, 0x6f, 0x63, 0x6b, 0x2d, 0x73, 0x69, 0x7a, 0x65, 0x20, 0x6b, 0x65, + 0x79, 0x20, 0x61, 0x6e, 0x64, 0x20, 0x61, 0x20, 0x6c, 0x61, 0x72, 0x67, + 0x65, 0x72, 0x20, 0x74, 0x68, 0x61, 0x6e, 0x20, 0x62, 0x6c, 0x6f, 0x63, + 0x6b, 0x2d, 0x73, 0x69, 0x7a, 0x65, 0x20, 0x64, 0x61, 0x74, 0x61, 0x2e, + 0x20, 0x54, 0x68, 0x65, 0x20, 0x6b, 0x65, 0x79, 0x20, 0x6e, 0x65, 0x65, + 0x64, 0x73, 0x20, 0x74, 0x6f, 0x20, 0x62, 0x65, 0x20, 0x68, 0x61, 0x73, + 0x68, 0x65, 0x64, 0x20, 0x62, 0x65, 0x66, 0x6f, 0x72, 0x65, 0x20, 0x62, + 0x65, 0x69, 0x6e, 0x67, 0x20, 0x75, 0x73, 0x65, 0x64, 0x20, 0x62, 0x79, + 0x20, 0x74, 0x68, 0x65, 0x20, 0x48, 0x4d, 0x41, 0x43, 0x20, 0x61, 0x6c, + 0x67, 0x6f, 0x72, 0x69, 0x74, 0x68, 0x6d, 0x2e + }; + const uint8_t expected[32] = { + 0x9b, 0x09, 0xff, 0xa7, 0x1b, 0x94, 0x2f, 0xcb, 0x27, 0x63, 0x5f, 0xbc, + 0xd5, 0xb0, 0xe9, 0x44, 0xbf, 0xdc, 0x63, 0x64, 0x4f, 0x07, 0x13, 0x93, + 0x8a, 0x7f, 0x51, 0x53, 0x5c, 0x3a, 0x35, 0xe2 + }; + struct tc_hmac_state_struct h; + + (void)memset(&h, 0x00, sizeof(h)); + (void)tc_hmac_set_key(&h, key, sizeof(key)); + + result = do_hmac_test(&h, 7, data, sizeof(data), expected, + sizeof(expected)); + TC_END_RESULT(result); + return result; +} + +/* + * Main task to test AES + */ +int main(void) +{ + unsigned int result = TC_PASS; + + TC_START("Performing HMAC tests (RFC4231 test vectors):"); + + result = test_1(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("HMAC test #1 failed.\n"); + goto exitTest; + } + result = test_2(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("HMAC test #2 failed.\n"); + goto exitTest; + } + result = test_3(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("HMAC test #3 failed.\n"); + goto exitTest; + } + result = test_4(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("HMAC test #4 failed.\n"); + goto exitTest; + } + result = test_5(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("HMAC test #5 failed.\n"); + goto exitTest; + } + result = test_6(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("HMAC #6 test failed.\n"); + goto exitTest; + } + result = test_7(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("HMAC test #7 failed.\n"); + goto exitTest; + } + + TC_PRINT("All HMAC tests succeeded!\n"); + +exitTest: + TC_END_RESULT(result); + TC_END_REPORT(result); +} diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/test_hmac_prng.c b/bootloader/mcuboot/ext/tinycrypt/tests/test_hmac_prng.c new file mode 100644 index 0000000..b45e984 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/test_hmac_prng.c @@ -0,0 +1,135 @@ +/* test_hmac_prng.c - TinyCrypt implementation of some HMAC-PRNG tests */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + DESCRIPTION + This module tests the following PRNG routines: + + Scenarios tested include: + - HMAC-PRNG init + - HMAC-PRNG reseed + - HMAC-PRNG generate) +*/ + +#include +#include +#include + +#include +#include +#include + +#define TC_DEBUG_MODE 0 + +#ifdef TC_DEBUG_MODE +void show(const char *label, const uint8_t *s, size_t len) +{ + unsigned int i; + printf ("%s = ", label); + for (i = 0; i < (unsigned int) len; ++i) { + printf ("%02x", s[i]); + } + printf ("\n"); +} + +void printBinaryFile(const uint8_t *s, unsigned int slen) +{ + FILE *write_ptr; + write_ptr = fopen("pseudo-random-data.bin","wb"); + fwrite(s, slen, 1, write_ptr); +} +#endif + +/* + * Main task to test AES + */ +int main(void) +{ + uint8_t seed[128]; + struct tc_hmac_prng_struct h; + unsigned int size = (1 << 19); + uint8_t random[size]; + unsigned int i; + unsigned int result = TC_PASS; + + TC_START("Performing HMAC-PRNG tests:"); + TC_PRINT("HMAC-PRNG test#1 (init, reseed, generate):\n"); + + /* Fake seed (replace by a a truly random seed): */ + for (i = 0; i < (unsigned int) sizeof(seed); ++i) { + seed[i] = i; + } + + /* Fake personalization and additional_input (replace by appropriate + * values): * + * e.g.: hostname+timestamp */ + uint8_t *personalization = (uint8_t *) "HOSTNAME"; + uint8_t *additional_input = (uint8_t *) "additional input"; + + TC_PRINT("HMAC-PRNG test#1 (init):\n"); + if (tc_hmac_prng_init(&h, personalization, + sizeof(personalization)) == 0) { + TC_ERROR("HMAC-PRNG initialization failed.\n"); + result = TC_FAIL; + goto exitTest; + } + TC_END_RESULT(result); + + TC_PRINT("HMAC-PRNG test#1 (reseed):\n"); + if (tc_hmac_prng_reseed(&h, seed, sizeof(seed), additional_input, + sizeof(additional_input)) == 0) { + TC_ERROR("HMAC-PRNG reseed failed.\n"); + result = TC_FAIL; + goto exitTest; + } + + TC_END_RESULT(result); + + TC_PRINT("HMAC-PRNG test#1 (generate):\n"); + if (tc_hmac_prng_generate(random, size, &h) < 1) { + TC_ERROR("HMAC-PRNG generate failed.\n"); + result = TC_FAIL; + goto exitTest; + } + TC_END_RESULT(result); + +#ifdef TC_DEBUG_MODE + printBinaryFile(random, size); + show ("Pseudo-random data", random, size); +#endif + + TC_PRINT("All HMAC tests succeeded!\n"); + + exitTest: + TC_END_RESULT(result); + TC_END_REPORT(result); +} diff --git a/bootloader/mcuboot/ext/tinycrypt/tests/test_sha256.c b/bootloader/mcuboot/ext/tinycrypt/tests/test_sha256.c new file mode 100644 index 0000000..b309ed1 --- /dev/null +++ b/bootloader/mcuboot/ext/tinycrypt/tests/test_sha256.c @@ -0,0 +1,511 @@ +/* test_sha256.c - TinyCrypt implementation of some SHA-256 tests */ + +/* + * Copyright (C) 2017 by Intel Corporation, All Rights Reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * - Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + DESCRIPTION + This module tests the following SHA256 routines: + + Scenarios tested include: + - NIST SHA256 test vectors +*/ + +#include +#include +#include + +#include +#include +#include +#include + +/* + * NIST SHA256 test vector 1. + */ +unsigned int test_1(void) +{ + unsigned int result = TC_PASS; + + TC_PRINT("SHA256 test #1:\n"); + const uint8_t expected[32] = { + 0xba, 0x78, 0x16, 0xbf, 0x8f, 0x01, 0xcf, 0xea, 0x41, 0x41, 0x40, 0xde, + 0x5d, 0xae, 0x22, 0x23, 0xb0, 0x03, 0x61, 0xa3, 0x96, 0x17, 0x7a, 0x9c, + 0xb4, 0x10, 0xff, 0x61, 0xf2, 0x00, 0x15, 0xad + }; + const char *m = "abc"; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + + (void)tc_sha256_init(&s); + tc_sha256_update(&s, (const uint8_t *) m, strlen(m)); + (void)tc_sha256_final(digest, &s); + result = check_result(1, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +/* + * NIST SHA256 test vector 2. + */ +unsigned int test_2(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #2:\n"); + const uint8_t expected[32] = { + 0x24, 0x8d, 0x6a, 0x61, 0xd2, 0x06, 0x38, 0xb8, 0xe5, 0xc0, 0x26, 0x93, + 0x0c, 0x3e, 0x60, 0x39, 0xa3, 0x3c, 0xe4, 0x59, 0x64, 0xff, 0x21, 0x67, + 0xf6, 0xec, 0xed, 0xd4, 0x19, 0xdb, 0x06, 0xc1 + }; + const char *m = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + + (void)tc_sha256_init(&s); + tc_sha256_update(&s, (const uint8_t *) m, strlen(m)); + (void) tc_sha256_final(digest, &s); + + result = check_result(2, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_3(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #3:\n"); + const uint8_t expected[32] = { + 0x68, 0x32, 0x57, 0x20, 0xaa, 0xbd, 0x7c, 0x82, 0xf3, 0x0f, 0x55, 0x4b, + 0x31, 0x3d, 0x05, 0x70, 0xc9, 0x5a, 0xcc, 0xbb, 0x7d, 0xc4, 0xb5, 0xaa, + 0xe1, 0x12, 0x04, 0xc0, 0x8f, 0xfe, 0x73, 0x2b + }; + const uint8_t m[1] = { 0xbd }; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + + (void)tc_sha256_init(&s); + tc_sha256_update(&s, m, sizeof(m)); + (void)tc_sha256_final(digest, &s); + + result = check_result(3, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_4(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #4:\n"); + const uint8_t expected[32] = { + 0x7a, 0xbc, 0x22, 0xc0, 0xae, 0x5a, 0xf2, 0x6c, 0xe9, 0x3d, 0xbb, 0x94, + 0x43, 0x3a, 0x0e, 0x0b, 0x2e, 0x11, 0x9d, 0x01, 0x4f, 0x8e, 0x7f, 0x65, + 0xbd, 0x56, 0xc6, 0x1c, 0xcc, 0xcd, 0x95, 0x04 + }; + const uint8_t m[4] = { 0xc9, 0x8c, 0x8e, 0x55 }; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + + (void)tc_sha256_init(&s); + tc_sha256_update(&s, m, sizeof(m)); + (void)tc_sha256_final(digest, &s); + + result = check_result(4, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_5(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #5:\n"); + + const uint8_t expected[32] = { + 0x02, 0x77, 0x94, 0x66, 0xcd, 0xec, 0x16, 0x38, 0x11, 0xd0, 0x78, 0x81, + 0x5c, 0x63, 0x3f, 0x21, 0x90, 0x14, 0x13, 0x08, 0x14, 0x49, 0x00, 0x2f, + 0x24, 0xaa, 0x3e, 0x80, 0xf0, 0xb8, 0x8e, 0xf7 + }; + uint8_t m[55]; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + + (void)memset(m, 0x00, sizeof(m)); + + (void)tc_sha256_init(&s); + tc_sha256_update(&s, m, sizeof(m)); + (void)tc_sha256_final(digest, &s); + + result = check_result(5, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_6(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #6:\n"); + const uint8_t expected[32] = { + 0xd4, 0x81, 0x7a, 0xa5, 0x49, 0x76, 0x28, 0xe7, 0xc7, 0x7e, 0x6b, 0x60, + 0x61, 0x07, 0x04, 0x2b, 0xbb, 0xa3, 0x13, 0x08, 0x88, 0xc5, 0xf4, 0x7a, + 0x37, 0x5e, 0x61, 0x79, 0xbe, 0x78, 0x9f, 0xbb + }; + uint8_t m[56]; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + + (void)memset(m, 0x00, sizeof(m)); + + (void)tc_sha256_init(&s); + tc_sha256_update(&s, m, sizeof(m)); + (void)tc_sha256_final(digest, &s); + + result = check_result(6, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_7(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #7:\n"); + const uint8_t expected[32] = { + 0x65, 0xa1, 0x6c, 0xb7, 0x86, 0x13, 0x35, 0xd5, 0xac, 0xe3, 0xc6, 0x07, + 0x18, 0xb5, 0x05, 0x2e, 0x44, 0x66, 0x07, 0x26, 0xda, 0x4c, 0xd1, 0x3b, + 0xb7, 0x45, 0x38, 0x1b, 0x23, 0x5a, 0x17, 0x85 + }; + uint8_t m[57]; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + + (void)memset(m, 0x00, sizeof(m)); + + (void)tc_sha256_init(&s); + tc_sha256_update(&s, m, sizeof(m)); + (void)tc_sha256_final(digest, &s); + + result = check_result(7, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_8(void) +{ + unsigned int result = TC_PASS; + + TC_PRINT("SHA256 test #8:\n"); + const uint8_t expected[32] = { + 0xf5, 0xa5, 0xfd, 0x42, 0xd1, 0x6a, 0x20, 0x30, 0x27, 0x98, 0xef, 0x6e, + 0xd3, 0x09, 0x97, 0x9b, 0x43, 0x00, 0x3d, 0x23, 0x20, 0xd9, 0xf0, 0xe8, + 0xea, 0x98, 0x31, 0xa9, 0x27, 0x59, 0xfb, 0x4b + }; + uint8_t m[64]; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + + (void)memset(m, 0x00, sizeof(m)); + + (void)tc_sha256_init(&s); + tc_sha256_update(&s, m, sizeof(m)); + (void)tc_sha256_final(digest, &s); + + result = check_result(8, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_9(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #9:\n"); + const uint8_t expected[32] = { + 0x54, 0x1b, 0x3e, 0x9d, 0xaa, 0x09, 0xb2, 0x0b, 0xf8, 0x5f, 0xa2, 0x73, + 0xe5, 0xcb, 0xd3, 0xe8, 0x01, 0x85, 0xaa, 0x4e, 0xc2, 0x98, 0xe7, 0x65, + 0xdb, 0x87, 0x74, 0x2b, 0x70, 0x13, 0x8a, 0x53 + }; + uint8_t m[1000]; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + + (void)memset(m, 0x00, sizeof(m)); + + (void)tc_sha256_init(&s); + tc_sha256_update(&s, m, sizeof(m)); + (void)tc_sha256_final(digest, &s); + + result = check_result(9, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_10(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #10:\n"); + const uint8_t expected[32] = { + 0xc2, 0xe6, 0x86, 0x82, 0x34, 0x89, 0xce, 0xd2, 0x01, 0x7f, 0x60, 0x59, + 0xb8, 0xb2, 0x39, 0x31, 0x8b, 0x63, 0x64, 0xf6, 0xdc, 0xd8, 0x35, 0xd0, + 0xa5, 0x19, 0x10, 0x5a, 0x1e, 0xad, 0xd6, 0xe4 + }; + uint8_t m[1000]; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + + (void)memset(m, 0x41, sizeof(m)); + + (void)tc_sha256_init(&s); + tc_sha256_update(&s, m, sizeof(m)); + (void)tc_sha256_final(digest, &s); + + result = check_result(10, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_11(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #11:\n"); + const uint8_t expected[32] = { + 0xf4, 0xd6, 0x2d, 0xde, 0xc0, 0xf3, 0xdd, 0x90, 0xea, 0x13, 0x80, 0xfa, + 0x16, 0xa5, 0xff, 0x8d, 0xc4, 0xc5, 0x4b, 0x21, 0x74, 0x06, 0x50, 0xf2, + 0x4a, 0xfc, 0x41, 0x20, 0x90, 0x35, 0x52, 0xb0 + }; + uint8_t m[1005]; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + + (void)memset(m, 0x55, sizeof(m)); + + (void)tc_sha256_init(&s); + tc_sha256_update(&s, m, sizeof(m)); + (void)tc_sha256_final(digest, &s); + + result = check_result(11, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_12(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #12:\n"); + + const uint8_t expected[32] = { + 0xd2, 0x97, 0x51, 0xf2, 0x64, 0x9b, 0x32, 0xff, 0x57, 0x2b, 0x5e, 0x0a, + 0x9f, 0x54, 0x1e, 0xa6, 0x60, 0xa5, 0x0f, 0x94, 0xff, 0x0b, 0xee, 0xdf, + 0xb0, 0xb6, 0x92, 0xb9, 0x24, 0xcc, 0x80, 0x25 + }; + uint8_t m[1000]; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + unsigned int i; + + (void)memset(m, 0x00, sizeof(m)); + + (void)tc_sha256_init(&s); + for (i = 0; i < 1000; ++i) { + tc_sha256_update(&s, m, sizeof(m)); + } + (void)tc_sha256_final(digest, &s); + + result = check_result(12, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_13(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #13:\n"); + const uint8_t expected[32] = { + 0x15, 0xa1, 0x86, 0x8c, 0x12, 0xcc, 0x53, 0x95, 0x1e, 0x18, 0x23, 0x44, + 0x27, 0x74, 0x47, 0xcd, 0x09, 0x79, 0x53, 0x6b, 0xad, 0xcc, 0x51, 0x2a, + 0xd2, 0x4c, 0x67, 0xe9, 0xb2, 0xd4, 0xf3, 0xdd + }; + uint8_t m[32768]; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + unsigned int i; + + (void)memset(m, 0x5a, sizeof(m)); + + (void)tc_sha256_init(&s); + for (i = 0; i < 16384; ++i) { + tc_sha256_update(&s, m, sizeof(m)); + } + (void)tc_sha256_final(digest, &s); + + result = check_result(13, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +unsigned int test_14(void) +{ + unsigned int result = TC_PASS; + TC_PRINT("SHA256 test #14:\n"); + const uint8_t expected[32] = { + 0x46, 0x1c, 0x19, 0xa9, 0x3b, 0xd4, 0x34, 0x4f, 0x92, 0x15, 0xf5, 0xec, + 0x64, 0x35, 0x70, 0x90, 0x34, 0x2b, 0xc6, 0x6b, 0x15, 0xa1, 0x48, 0x31, + 0x7d, 0x27, 0x6e, 0x31, 0xcb, 0xc2, 0x0b, 0x53 + }; + uint8_t m[32768]; + uint8_t digest[32]; + struct tc_sha256_state_struct s; + unsigned int i; + + (void)memset(m, 0x00, sizeof(m)); + + (void) tc_sha256_init(&s); + for (i = 0; i < 33280; ++i) { + tc_sha256_update(&s, m, sizeof(m)); + } + (void) tc_sha256_final(digest, &s); + + result = check_result(14, expected, sizeof(expected), + digest, sizeof(digest)); + TC_END_RESULT(result); + return result; +} + +/* + * Main task to test AES + */ + +int main(void) +{ + unsigned int result = TC_PASS; + TC_START("Performing SHA256 tests (NIST tests vectors):"); + + result = test_1(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #1 failed.\n"); + goto exitTest; + } + result = test_2(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #2 failed.\n"); + goto exitTest; + } + result = test_3(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #3 failed.\n"); + goto exitTest; + } + result = test_4(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #4 failed.\n"); + goto exitTest; + } + result = test_5(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #5 failed.\n"); + goto exitTest; + } + result = test_6(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #6 failed.\n"); + goto exitTest; + } + result = test_7(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #7 failed.\n"); + goto exitTest; + } + result = test_8(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #8 failed.\n"); + goto exitTest; + } + result = test_9(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #9 failed.\n"); + goto exitTest; + } + result = test_10(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #10 failed.\n"); + goto exitTest; + } + result = test_11(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #11 failed.\n"); + goto exitTest; + } + result = test_12(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #12 failed.\n"); + goto exitTest; + } + /* memory and computation intensive test cases: */ + result = test_13(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #13 failed.\n"); + goto exitTest; + } + result = test_14(); + if (result == TC_FAIL) { + /* terminate test */ + TC_ERROR("SHA256 test #14 failed.\n"); + goto exitTest; + } + + TC_PRINT("All SHA256 tests succeeded!\n"); + +exitTest: + TC_END_RESULT(result); + TC_END_REPORT(result); +} + diff --git a/bootloader/mcuboot/go.mod b/bootloader/mcuboot/go.mod new file mode 100644 index 0000000..8d87521 --- /dev/null +++ b/bootloader/mcuboot/go.mod @@ -0,0 +1,3 @@ +module github.com/mcu-tools/mcuboot + +go 1.14 diff --git a/bootloader/mcuboot/project.yml b/bootloader/mcuboot/project.yml new file mode 100644 index 0000000..37f9ef1 --- /dev/null +++ b/bootloader/mcuboot/project.yml @@ -0,0 +1,31 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +project.name: "mcuboot" + +project.repositories: + - apache-mynewt-core + +# Use github's distribution mechanism for core ASF libraries. +# This provides mirroring automatically for us. +repository.apache-mynewt-core: + type: github + vers: 0-dev + user: apache + repo: mynewt-core diff --git a/bootloader/mcuboot/ptest/.gitignore b/bootloader/mcuboot/ptest/.gitignore new file mode 100644 index 0000000..9409674 --- /dev/null +++ b/bootloader/mcuboot/ptest/.gitignore @@ -0,0 +1,2 @@ +target +.*.swp diff --git a/bootloader/mcuboot/ptest/Cargo.lock b/bootloader/mcuboot/ptest/Cargo.lock new file mode 100644 index 0000000..84f0e48 --- /dev/null +++ b/bootloader/mcuboot/ptest/Cargo.lock @@ -0,0 +1,556 @@ +# This file is automatically @generated by Cargo. +# It is not intended for manual editing. +version = 3 + +[[package]] +name = "addr2line" +version = "0.17.0" +source = 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index 0000000..9a75ccb --- /dev/null +++ b/bootloader/mcuboot/ptest/src/main.rs @@ -0,0 +1,374 @@ +//! Parallel testing. +//! +//! mcuboot simulator is strictly single threaded, as there is a lock around running the C startup +//! code, because it contains numerous global variables. +//! +//! To help speed up testing, the Workflow configuration defines all of the configurations that can +//! be run in parallel. Fortunately, cargo works well this way, and these can be run by simply +//! using subprocess for each particular thread. +//! +//! For now, we assume all of the features are listed under +//! jobs->environment->strategy->matric->features + +use chrono::Local; +use clap::{Parser, Subcommand}; +use log::{debug, error, warn}; +use std::{ + collections::HashSet, + env, + fs::{self, OpenOptions}, + io::{ErrorKind, stdout, Write}, + process::Command, + result, + sync::{ + Arc, + Mutex, + }, + thread, + time::Duration, +}; +use std_semaphore::Semaphore; +use yaml_rust::{ + Yaml, + YamlLoader, +}; + +type Result = result::Result; + +fn main() -> Result<()> { + env_logger::init(); + + let args = Cli::parse(); + + let workflow_text = fs::read_to_string(&args.workflow)?; + let workflow = YamlLoader::load_from_str(&workflow_text)?; + + let ncpus = num_cpus::get(); + let limiter = Arc::new(Semaphore::new(ncpus as isize)); + + let matrix = Matrix::from_yaml(&workflow); + + let matrix = if args.test.len() == 0 { matrix } else { + matrix.only(&args.test) + }; + + match args.command { + Commands::List => { + matrix.show(); + return Ok(()); + } + Commands::Run => (), + } + + let mut children = vec![]; + let state = State::new(matrix.envs.len()); + let st2 = state.clone(); + let _status = thread::spawn(move || { + loop { + thread::sleep(Duration::new(15, 0)); + st2.lock().unwrap().status(); + } + }); + for env in matrix.envs { + let state = state.clone(); + let limiter = limiter.clone(); + + let child = thread::spawn(move || { + let _run = limiter.access(); + state.lock().unwrap().start(&env); + let out = env.run(); + state.lock().unwrap().done(&env, out); + }); + children.push(child); + } + + for child in children { + child.join().unwrap(); + } + + println!(); + + Ok(()) +} + +/// The main Cli. +#[derive(Debug, Parser)] +#[command(name = "ptest")] +#[command(about = "Run MCUboot CI tests stand alone")] +struct Cli { + /// The workflow file to use. + #[arg(short, long, default_value = "../.github/workflows/sim.yaml")] + workflow: String, + + /// The tests to run (defaults to all) + #[arg(short, long)] + test: Vec, + + #[command(subcommand)] + command: Commands, +} + +#[derive(Debug, Subcommand)] +enum Commands { + /// Runs the tests. + Run, + /// List available tests. + List, +} + +/// State, for printing status. +struct State { + running: HashSet, + done: HashSet, + total: usize, +} + +/// Result of a test run. +struct TestResult { + /// Was this run successful. + success: bool, + + /// The captured output. + output: Vec, +} + +impl State { + fn new(total: usize) -> Arc> { + Arc::new(Mutex::new(State { + running: HashSet::new(), + done: HashSet::new(), + total, + })) + } + + fn start(&mut self, fs: &FeatureSet) { + let key = fs.textual(); + if self.running.contains(&key) || self.done.contains(&key) { + warn!("Duplicate: {:?}", key); + } + debug!("Starting: {} ({} running)", key, self.running.len() + 1); + self.running.insert(key); + self.status(); + } + + fn done(&mut self, fs: &FeatureSet, output: Result) { + let key = fs.textual(); + self.running.remove(&key); + self.done.insert(key.clone()); + match output { + Ok(output) => { + if !output.success || log_all() { + // Write the output into a file. + let mut count = 1; + let (mut fd, logname) = loop { + let base = if output.success { "success" } else { "failure" }; + let name = format!("./{}-{:04}.log", base, count); + count += 1; + match OpenOptions::new() + .create_new(true) + .write(true) + .open(&name) + { + Ok(file) => break (file, name), + Err(ref err) if err.kind() == ErrorKind::AlreadyExists => continue, + Err(err) => { + error!("Unable to write log file to current directory: {:?}", err); + return; + } + } + }; + fd.write_all(&output.output).unwrap(); + if !output.success { + error!("Failure {} log:{:?} ({} running)", key, logname, + self.running.len()); + } + } + } + Err(err) => { + error!("Unable to run test {:?} ({:?}", key, err); + } + } + self.status(); + } + + fn status(&self) { + let running = self.running.len(); + let done = self.done.len(); + print!(" {} running ({}/{}/{} done)\r", running, done, running + done, self.total); + stdout().flush().unwrap(); + } +} + +/// The extracted configurations from the workflow config +#[derive(Debug)] +struct Matrix { + envs: Vec, +} + +#[derive(Debug, Eq, Hash, PartialEq)] +struct FeatureSet { + // The environment variable to set. + env: String, + // The successive values to set it to. + values: Vec, +} + +impl Matrix { + fn from_yaml(yaml: &[Yaml]) -> Matrix { + let mut envs = vec![]; + + let mut all_tests = HashSet::new(); + + for y in yaml { + let m = match lookup_matrix(y) { + Some (m) => m, + None => continue, + }; + for elt in m { + let elt = match elt.as_str() { + None => { + warn!("Unexpected yaml: {:?}", elt); + continue; + } + Some(e) => e, + }; + let fset = FeatureSet::decode(elt); + + if false { + // Respect the groupings in the `.workflow.yml` file. + envs.push(fset); + } else { + // Break each test up so we can run more in + // parallel. + let env = fset.env.clone(); + for val in fset.values { + if !all_tests.contains(&val) { + all_tests.insert(val.clone()); + envs.push(FeatureSet { + env: env.clone(), + values: vec![val], + }); + } else { + warn!("Duplicate: {:?}: {:?}", env, val); + } + } + } + } + } + + Matrix { + envs, + } + } + + /// Print out all of the feature sets. + fn show(&self) { + for (i, feature) in self.envs.iter().enumerate() { + println!("{:3}. {}", i + 1, feature.simple_textual()); + } + } + + /// Replace this matrix with one that only has the chosen tests in it. Note + /// that the original order is preserved, not that given in `pick`. + fn only(self, pick: &[usize]) -> Self { + let pick: HashSet = pick.iter().cloned().collect(); + let envs: Vec<_> = self + .envs + .into_iter() + .enumerate() + .filter(|(ind, _)| pick.contains(&(ind + 1))) + .map(|(_, item)| item) + .collect(); + Matrix { envs } + } +} + +impl FeatureSet { + fn decode(text: &str) -> FeatureSet { + // The github workflow is just a space separated set of values. + let values: Vec<_> = text + .split(',') + .map(|s| s.to_string()) + .collect(); + FeatureSet { + env: "MULTI_FEATURES".to_string(), + values, + } + } + + /// Run a test for this given feature set. Output is captured and will be returned if there is + /// an error. Each will be run successively, and the first failure will be returned. + /// Otherwise, it returns None, which means everything worked. + fn run(&self) -> Result { + let mut output = vec![]; + let mut success = true; + for v in &self.values { + let cmdout = Command::new("bash") + .arg("./ci/sim_run.sh") + .current_dir("..") + .env(&self.env, v) + .output()?; + // Grab the output for logging, etc. + writeln!(&mut output, "Test {} {}", + if cmdout.status.success() { "success" } else { "FAILURE" }, + self.textual())?; + writeln!(&mut output, "time: {}", Local::now().to_rfc3339())?; + writeln!(&mut output, "----------------------------------------")?; + writeln!(&mut output, "stdout:")?; + output.extend(&cmdout.stdout); + writeln!(&mut output, "----------------------------------------")?; + writeln!(&mut output, "stderr:")?; + output.extend(&cmdout.stderr); + if !cmdout.status.success() { + success = false; + } + } + Ok(TestResult { success, output }) + } + + /// Convert this feature set into a textual representation + fn textual(&self) -> String { + use std::fmt::Write; + + let mut buf = String::new(); + + write!(&mut buf, "{}:", self.env).unwrap(); + for v in &self.values { + write!(&mut buf, " {}", v).unwrap(); + } + + buf + } + + /// Generate a simpler textual representation, without showing the environment. + fn simple_textual(&self) -> String { + use std::fmt::Write; + + let mut buf = String::new(); + for v in &self.values { + write!(&mut buf, " {}", v).unwrap(); + } + + buf + } +} + +fn lookup_matrix(y: &Yaml) -> Option<&Vec> { + let jobs = Yaml::String("jobs".to_string()); + let environment = Yaml::String("environment".to_string()); + let strategy = Yaml::String("strategy".to_string()); + let matrix = Yaml::String("matrix".to_string()); + let features = Yaml::String("features".to_string()); + y + .as_hash()?.get(&jobs)? + .as_hash()?.get(&environment)? + .as_hash()?.get(&strategy)? + .as_hash()?.get(&matrix)? + .as_hash()?.get(&features)? + .as_vec() +} + +/// Query if we should be logging all tests and not only failures. +fn log_all() -> bool { + env::var("PTEST_LOG_ALL").is_ok() +} diff --git a/bootloader/mcuboot/repository.yml b/bootloader/mcuboot/repository.yml new file mode 100644 index 0000000..f69b449 --- /dev/null +++ b/bootloader/mcuboot/repository.yml @@ -0,0 +1,48 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +repo.name: mcuboot +repo.submodules: "" +repo.versions: + "0.0.0": "main" + "0.9.0": "v0.9.0" + "1.0.0": "v1.0.0" + "1.1.0": "v1.1.0" + "1.2.0": "v1.2.0" + "1.3.0": "v1.3.0" + "1.3.1": "v1.3.1" + "1.4.0": "v1.4.0" + "1.5.0": "v1.5.0" + "1.6.0": "v1.6.0" + "1.7.0": "v1.7.0" + "1.7.1": "v1.7.1" + "1.7.2": "v1.7.2" + "1.8.0": "v1.8.0" + "1.9.0": "v1.9.0" + "1.10.0": "v1.10.0" + "2.0.0": "v2.0.0" + "2.1.0": "v2.1.0" + + "0-dev": "0.0.0" # main + "0-latest": "2.1.0" # latest stable release + "1-latest": "1.11.0" + "2-latest": "2.1.0" + + "1.0-latest": "1.11.0" + "2.0-latest": "2.1.0" diff --git a/bootloader/mcuboot/root-ec-p256-pkcs8.pem b/bootloader/mcuboot/root-ec-p256-pkcs8.pem new file mode 100644 index 0000000..42a1e0e --- /dev/null +++ b/bootloader/mcuboot/root-ec-p256-pkcs8.pem @@ -0,0 +1,5 @@ +-----BEGIN PRIVATE KEY----- +MIGHAgEAMBMGByqGSM49AgEGCCqGSM49AwEHBG0wawIBAQQg15jVL4MBJDvTVCt+ +Ve1MdGEZALD5UFqCT+Ho7AY7z/GhRANCAAQqy0A86P7tW6RJlaGpHa7o274ZN80U ++y8kVzfllTmI2ZS51lrr183VMIrW/kiySmqBDuXwfYtoNMw6avxTjvrB +-----END PRIVATE KEY----- diff --git a/bootloader/mcuboot/root-ec-p256.pem b/bootloader/mcuboot/root-ec-p256.pem new file mode 100644 index 0000000..2f4accf --- /dev/null +++ b/bootloader/mcuboot/root-ec-p256.pem @@ -0,0 +1,5 @@ +-----BEGIN EC PRIVATE KEY----- +MHcCAQEEINeY1S+DASQ701QrflXtTHRhGQCw+VBagk/h6OwGO8/xoAoGCCqGSM49 +AwEHoUQDQgAEKstAPOj+7VukSZWhqR2u6Nu+GTfNFPsvJFc35ZU5iNmUudZa69fN +1TCK1v5IskpqgQ7l8H2LaDTMOmr8U476wQ== +-----END EC PRIVATE KEY----- diff --git a/bootloader/mcuboot/root-ec-p384-pkcs8.pem b/bootloader/mcuboot/root-ec-p384-pkcs8.pem new file mode 100644 index 0000000..4d4894c --- /dev/null +++ b/bootloader/mcuboot/root-ec-p384-pkcs8.pem @@ -0,0 +1,6 @@ +-----BEGIN PRIVATE KEY----- +MIG2AgEAMBAGByqGSM49AgEGBSuBBAAiBIGeMIGbAgEBBDC8ZQWjooCCaLQJ9DJN +KMyPoUoFcqGluXGu13Zf526RX6TdRhnkExtL1T7fC13n32ChZANiAAQMdsqucjql +6PDU8Ra1Au93oRuTYXjACSZ7O0Cc7kmF4MlP5/K6l2zzgmUULPUMczNNMueb00LM +lVrl4vX0bkXg7SA1XK9SNYHU3JzjniI++z8iENpwAzetqPJI/jpgaaU= +-----END PRIVATE KEY----- diff --git a/bootloader/mcuboot/root-ec-p384.pem b/bootloader/mcuboot/root-ec-p384.pem new file mode 100644 index 0000000..916c800 --- /dev/null +++ b/bootloader/mcuboot/root-ec-p384.pem @@ -0,0 +1,6 @@ +-----BEGIN EC PRIVATE KEY----- +MIGkAgEBBDC8ZQWjooCCaLQJ9DJNKMyPoUoFcqGluXGu13Zf526RX6TdRhnkExtL +1T7fC13n32CgBwYFK4EEACKhZANiAAQMdsqucjql6PDU8Ra1Au93oRuTYXjACSZ7 +O0Cc7kmF4MlP5/K6l2zzgmUULPUMczNNMueb00LMlVrl4vX0bkXg7SA1XK9SNYHU +3JzjniI++z8iENpwAzetqPJI/jpgaaU= +-----END EC PRIVATE KEY----- diff --git a/bootloader/mcuboot/root-ed25519.pem b/bootloader/mcuboot/root-ed25519.pem new file mode 100644 index 0000000..8bc7181 --- /dev/null +++ b/bootloader/mcuboot/root-ed25519.pem @@ -0,0 +1,3 @@ +-----BEGIN PRIVATE KEY----- +MC4CAQAwBQYDK2VwBCIEICjJcMmhqKi8d3hoYtLnbQ1DCitXyHz8N5BLy6rIdMvY +-----END PRIVATE KEY----- diff --git a/bootloader/mcuboot/root-rsa-2048.pem b/bootloader/mcuboot/root-rsa-2048.pem new file mode 100644 index 0000000..78c0c34 --- /dev/null +++ b/bootloader/mcuboot/root-rsa-2048.pem @@ -0,0 +1,27 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIEowIBAAKCAQEA0QYIGhhELBjo+/33DaNPH7vuXvmq0ksY01rpbRiAGfnwnDQb +y/O8dNtC54x/EFN+Q14NVyxE0WcIDw27XO7ss5nf4E2EC6p3QWDtFShJpwG0PBDm +aYwvX6xBTZ5cFN/y+M89Hm/nW7q0qciIfkc8lMN3Z1RLqo04NcpiYX634RXbd3PU +vntyIYlpJPv4ZW5kPsgO14XVXErkUw0v/7f98xM5gz+jrtIPp2qd+f64zvoqvq+4 +4PqCN1T0PuEr0NMIWBj2XkzIiIExrV+wghfyimknI/Orhz6TGh3+6PgaJGZZ+Byr +3M5oG2ZkNez6DRGdr1w6p9FnxkfvsUssYuHRyQIDAQABAoIBAEahFCHFK1v/OtLT +eSSZl0Xw2dYr5QXULFpWsOOVUMv2QdB2ZyIehQKziEL3nYPlwpd+82EOa16awwVb +LYF0lnUFvLltV/4dJtjnqJTqnSCamc1mJIVrwiJA8XwJ07GWDuL2G//p7jJ3v05T +nZOV/KmD9xfqSvshZun+LgolqHqcrAa1f4cmuP9C9oqenZryljyfj7piaIZGI0JR +PrJJ5kImYJqRcMgKTyHP4L8nwQ4moMJr6zbfbWxxb5TC7KVZSQ9UKZZ+ZLuy/pkU +Qe4G8XSE0r+R9u4JCg87I1vgHhn8WJSxVX027OVUq5HfOzg2skQBTcExph5V9B2b +onNxd8UCgYEA/32PW+ZwRcdKXMj+QVkxXUd6xkXy7mTXPEaQuOLWZQgrSqAFH1l4 +5/6d099KAJrjM6kR8pKXtz72IIyMHTPm332ghymjKvaEl2XP9sF+f6FmYURar4y6 +8Zh3eivP86+Q/YzOGKwtRSziBMzrAfoIXgtwH8pwIPYLP3zBV4449ZsCgYEA0XC/ +gu2ub5M6EXBnjq9K2d4LlTyAPsIbAcMSwkhOUH4YJFS22qXLYQUA9zM+DUyLCrl/ +PKN2G0HQVgMb4DIbeHv8kXB5oGm5zfbWorWqOomXB3AsI7X8YDMtf/PsZV2amBei +qVskmPJQV21qFyeOcHlT+dHuRb0O0un3dK8RHmsCgYEApDCH4dJ80osZoflVVJ/C +VqTqJOOtFEFgBQ+AUCEPEQyn7aRaxmPUjJsXyKJVx3/ChV+g9hf5Qj1HJXHNVbMW +KwhsEpDSmHimizlV5clBxzntNpMcCHdTaJHILo5bbMqmThugE0ELMsp+UgFzAeky +WWXWX8fUOYqFff5prh/rQQMCgYBQQ8FhT+113Rp37HgDerJY5HvT6afMZV8sQbJC +uqsotepSohShnsBeoihIlF7HgfoXVhepCYwNzh8ll3NrbEiS2BFnO4+hJmOKx3pi +SPTAElLLCvYfiXL6+yII01ZZUpIYj5ZLCR7xbovTtZ7e2M4B1L2WFBoYp+eydO/c +y+rnmQKBgCh0gfyBT/OKPkfKv+Bbt8HcoxgEj+TyH+vYdeTbP9ZSJ6y5utMbPg7z +iLLbJ+9IcSwPCwJSmI+I0Om4xEp4ZblCrzAG7hWvG2NNzxQjmoOOrAANyTvJR/ap +N+UkQA4WrMSKEYyBlRS/hR9Unz31vMc2k9Re0ukWhWh/QksQGDfJ +-----END RSA PRIVATE KEY----- diff --git a/bootloader/mcuboot/root-rsa-3072.pem b/bootloader/mcuboot/root-rsa-3072.pem new file mode 100644 index 0000000..3a3b329 --- /dev/null +++ b/bootloader/mcuboot/root-rsa-3072.pem @@ -0,0 +1,39 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIG5AIBAAKCAYEAtCwOmFgQpKdYmXwB3QgqKDQz+JYaNCBdRchxJiXl0pbqe7EV +qqaKYyKLLU6Bc79uFWiMGvTvKo+MIp5xV0veD35y03q4px1ErYcAg1z9cwVyRj+L ++RAA2G7Mhe35Sdt4NoBJOHbdX1QE2ow0pysTJW/RFU+twuGl0k5XDH6cm7pOaLLg +JQKqANO0zC945b5HZx/IbiJsXmG2ms3lqLp6gBMbFy6W7c+zm+Qc6K2n9jpRZl6Z +jofuYCX4jb7OpKjKk2zXv9RzM41EhcxzMAicTbKqWmxve6u3s3zD++fKxPiab8u7 +W4LneugZ/S8RIvt/doxrlKQJT6Vqd1Hrp37ahwbu3L7R6hpAHRv/GrFRfBKw8/aD +AZznDJm/rGhYcqSwWYXuhawqIvTPFQiAHw3QHqCglMj3+mXdUuiWNyMwVzbmnfQM +SgV1H60ByrdtjEN0BgqB8wFi//f1X6/nKw74gbVl3QHZnwcXihjPI26IZZG1e9Ow +La+TZmN0rFrmc947AgMBAAECggGBAJjDTjCvYpUo6r9gXHgbZxslf/dC1b7ivhLf +68gLk/xlRzVPJW7GvElnzZfBm5MXeXAfb8Ofb3WntorXyoPY6NQ8Q4G56PyQnV2A +PNgkrSSsNoMHeFfZ0M2xzCm2Z4rO0fNr/Ckq53HfXCotfKtMo3Q3hZDLOSomhqF1 +GOuYIpMLeVXebJwU0S3YUtBZY+lv1zzBvwBaoYW41coVz6arThhvmqWiNAg49jG0 +TSqfquzj74abqRkned798uvEH5OPJJ6r/7HrjbSan2HfhiQgWebR6NV5xtmAy//2 +iuNqrm9e1Qrinjo1teHP63hzGQbk9HzXdIzMmw83vHOppFmteOCSxJIxJ2h4RlsV +ln/7O5N4jAhdpqu/5AWBlWHefEsWvxfGUwmBdtxF0M4p+Z5qGIIX/WGHx+Eg9qsP +1NhnMhQ8DJjCPNzej7dmsiHcICsI/SJ84Xby5KlG8OJbsYSpzyd4/PD789VXSTK/ +BwIN3IZsWhNw1G7AOfzch86fXNpCoQKBwQDlvyQII6M8etnZMYGFNKDxpcRahrF4 +znENW3IDsm41044oy+qv8fR7NFI+88xcbm/zzQ+oz4FGAcTNfUa1JAII/h1oJx7Q +eAFytlGq41cxnGfVGSemmpEOgZqzWVneFnZ8s/81sq35/OzpQ+pKgTN8SYgjySQb +f5pJECHV3oaX6g/DZcEU6JngYWyG4gAovBph/EXaPn3saHUo7u75yD6HnLxcxa4C +//Zs9NOHmRDxW1AFq6c9qqHjAwiwoWz/1PECgcEAyMKx1WjcdW7AU4TmMoWY7dwc +ginhBzEne7z5hgnabsnFaudRpAix/IBT0G0/lDEBXja+j8V56Jy7xCVLmJi044nj +fzCn0bbtOHOE3BztGP7eWRODN+2u/V9xk6v7y4R7NOLzE7+1/SupaYWW5uQo9Z1v +CamU7MuIXq6b9BS3HD8vS9IpeDQIJKQ9G0NIRN9naLwyfLk0EXBDqE0VlXWusDi8 +B9W5ZQ0l9dY2XLCx8Gx7Foc8UA85EvivtfpC3bXrAoHACywfYXHyNze2LlS0+rhT +d0zbXpecO8a2QrMGuV1M9Lsj96Hq+MFoZTFnKn6KmpgYQ5/eOhRVMgVV/7Qu4xIs +MynAXldArVyYnW52TDwf+l6jwf4mKnjrwuvUjRI0R5OKEYhjScY1pamCD9noo9Ti +nxGoWC0o31l2NEVfj9nxa6PLPnJNUGn7SakTMP/+h/yVv9wXvYQ6dWui/umXn3f4 +annZwx0t2CGAZ04El1x/MW2CV7RAPsR0eOil3IkNFufRAoHAVDtj879oaBkMtr4W ++3GURZBJoc9CbAsSntcd9kAiFsOvgfgGCAXh76hEAjokJ+Aby9S6RYY8bP19xoFD +Y4YGt0U+Xzoh31qZ00qcnuHAFPGyhrsqHggqmII4HBZXsf8m1ny2Mj4IdG2iSfTT +6JIoIU1prispoeSPlfI62sDqRv63sF9AKP/jvsPuI4cqRkNZltcHc88c6ogoyu90 +s93JaoSTV9IzVBOdLrUu39r+/Xn2dvBMvOZ2MuCGkJqs/Wr7AoHBAL1k1bH0+xs3 +sMQjxXyo5CYe5fmi1y8Gnt05kivgvGaGPLIb2lG8JRfIhasO04DrvxnW5EBiap6s +rtAF+MU55/EjXn97fs1TvDRwZ2/SJRCACHepFnXrPMz1dBBe8IG7s8Ai5WTDuVbb +7T4/8fwSrqAnIF7oQwHFwlpDnFGUJLZCJ/+H/jjcn2TgTnGIENTwlSIofhcWT+Ot +GtlLLU4J6+l07vVfueEofoJMfqWjDUpOr3FmnP+K2drZWFnzv/3Rgg== +-----END RSA PRIVATE KEY----- diff --git a/bootloader/mcuboot/samples/mcuboot_config/mcuboot_config.template.h b/bootloader/mcuboot/samples/mcuboot_config/mcuboot_config.template.h new file mode 100644 index 0000000..ce613bd --- /dev/null +++ b/bootloader/mcuboot/samples/mcuboot_config/mcuboot_config.template.h @@ -0,0 +1,198 @@ +/* + * Copyright (c) 2018 Open Source Foundries Limited + * Copyright (c) 2019-2024 Arm Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __MCUBOOT_CONFIG_H__ +#define __MCUBOOT_CONFIG_H__ + +/* + * Template configuration file for MCUboot. + * + * When porting MCUboot to a new target, copy it somewhere that your + * include path can find it as mcuboot_config/mcuboot_config.h, and + * make adjustments to suit your platform. + * + * For examples, see: + * + * boot/zephyr/include/mcuboot_config/mcuboot_config.h + * boot/mynewt/mcuboot_config/include/mcuboot_config/mcuboot_config.h + */ + +/* + * Signature types + * + * You must choose exactly one signature type. + */ + +/* Uncomment for RSA signature support */ +/* #define MCUBOOT_SIGN_RSA */ + +/* Uncomment for ECDSA signatures using curve P-256. */ +/* #define MCUBOOT_SIGN_EC256 */ + +/* + * Public key handling + * + * Choose one or none from the different public key handling options. + */ + +/* Uncomment to use key hash(es) instead of incorporating + * the public key into the code. */ +/* #define MCUBOOT_HW_KEY */ +/* Uncomment to use builtin key(s) instead of incorporating + * the public key into the code. */ +/* #define MCUBOOT_BUILTIN_KEY */ + +/* + * Upgrade mode + * + * The default is to support A/B image swapping with rollback. Other modes + * with simpler code path, which only supports overwriting the existing image + * with the update image or running the newest image directly from its flash + * partition, are also available. + * + * You can enable only one mode at a time from the list below to override + * the default upgrade mode. + */ + +/* Uncomment to enable the overwrite-only code path. */ +/* #define MCUBOOT_OVERWRITE_ONLY */ + +#ifdef MCUBOOT_OVERWRITE_ONLY +/* Uncomment to only erase and overwrite those primary slot sectors needed + * to install the new image, rather than the entire image slot. */ +/* #define MCUBOOT_OVERWRITE_ONLY_FAST */ +#endif + +/* Uncomment to enable the direct-xip code path. */ +/* #define MCUBOOT_DIRECT_XIP */ +/* Uncomment to enable the revert mechanism in direct-xip mode. */ +/* #define MCUBOOT_DIRECT_XIP_REVERT */ + +/* Uncomment to enable the ram-load code path. */ +/* #define MCUBOOT_RAM_LOAD */ + +/* + * Cryptographic settings + * + * You must choose between mbedTLS and Tinycrypt as source of + * cryptographic primitives. Other cryptographic settings are also + * available. + */ + +/* Uncomment to use ARM's mbedTLS cryptographic primitives */ +/* #define MCUBOOT_USE_MBED_TLS */ +/* Uncomment to use Tinycrypt's. */ +/* #define MCUBOOT_USE_TINYCRYPT */ + +/* + * Encrypted images + * + * Uncomment one of the below options (MCUBOOT_ENCRYPT_x) to enable + * encrypted image upgrades. + */ + +/* Uncomment to use RSA-OAEP for key encryption */ +/* #define MCUBOOT_ENCRYPT_RSA */ +/* Uncomment to use AES-KW for key encryption */ +/* #define MCUBOOT_ENCRYPT_KW */ +/* Uncomment to use ECIES-P256 for key encryption */ +/* #define MCUBOOT_ENCRYPT_EC256 */ +/* Uncomment to use ECIES-X25519 for key encryption */ +/* #define MCUBOOT_ENCRYPT_X25519 */ + +/* Uncomment to use a builtin key-encryption key (retrieved from a trusted + * source - if implemented) instead of a key embedded in the bootloader. */ +/* #define MCUBOOT_ENC_BUILTIN_KEY */ + +#if defined(MCUBOOT_ENCRYPT_RSA) || \ + defined(MCUBOOT_ENCRYPT_KW) || \ + defined(MCUBOOT_ENCRYPT_EC256) || \ + defined(MCUBOOT_ENCRYPT_X25519) +#define MCUBOOT_ENC_IMAGES +#endif + +/* + * Always check the signature of the image in the primary slot before booting, + * even if no upgrade was performed. This is recommended if the boot + * time penalty is acceptable. + */ +#define MCUBOOT_VALIDATE_PRIMARY_SLOT + +/* + * Flash abstraction + */ + +/* Uncomment if your flash map API supports flash_area_get_sectors(). + * See the flash APIs for more details. */ +/* #define MCUBOOT_USE_FLASH_AREA_GET_SECTORS */ + +/* Default maximum number of flash sectors per image slot; change + * as desirable. */ +#define MCUBOOT_MAX_IMG_SECTORS 128 + +/* Default number of separately updateable images; change in case of + * multiple images. */ +#define MCUBOOT_IMAGE_NUMBER 1 + +/* + * Logging + */ + +/* + * If logging is enabled the following functions must be defined by the + * platform: + * + * MCUBOOT_LOG_MODULE_REGISTER(domain) + * Register a new log module and add the current C file to it. + * + * MCUBOOT_LOG_MODULE_DECLARE(domain) + * Add the current C file to an existing log module. + * + * MCUBOOT_LOG_ERR(...) + * MCUBOOT_LOG_WRN(...) + * MCUBOOT_LOG_INF(...) + * MCUBOOT_LOG_DBG(...) + * + * The function priority is: + * + * MCUBOOT_LOG_ERR > MCUBOOT_LOG_WRN > MCUBOOT_LOG_INF > MCUBOOT_LOG_DBG + */ +#define MCUBOOT_HAVE_LOGGING 1 + +/* + * Assertions + */ + +/* Uncomment if your platform has its own mcuboot_config/mcuboot_assert.h. + * If so, it must provide an ASSERT macro for use by bootutil. Otherwise, + * "assert" is used. */ +/* #define MCUBOOT_HAVE_ASSERT_H */ + +/* + * Watchdog feeding + */ + +/* This macro might be implemented if the OS / HW watchdog is enabled while + * doing a swap upgrade and the time it takes for a swapping is long enough + * to cause an unwanted reset. If implementing this, the OS main.c must also + * enable the watchdog (if required)! + * + * #define MCUBOOT_WATCHDOG_FEED() + * do { do watchdog feeding here! } while (0) + */ + +/* If a OS ports support single thread mode or is bare-metal then: + * This macro implements call that switches CPU to an idle state, from which + * the CPU may be woken up by, for example, UART transmission event. + * + * Otherwise this macro should be no-op. + */ +#define MCUBOOT_CPU_IDLE() \ + do { \ + } while (0) + +#endif /* __MCUBOOT_CONFIG_H__ */ diff --git a/bootloader/mcuboot/samples/zephyr/.gitignore b/bootloader/mcuboot/samples/zephyr/.gitignore new file mode 100644 index 0000000..9fa3b42 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/.gitignore @@ -0,0 +1,2 @@ +*.bin +test-images.zip diff --git a/bootloader/mcuboot/samples/zephyr/Makefile b/bootloader/mcuboot/samples/zephyr/Makefile new file mode 100644 index 0000000..dd73702 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/Makefile @@ -0,0 +1,295 @@ +########################################################################### +# Sample multi-part application Makefile +# +# Copyright (c) 2017 Linaro Limited +# Copyright (c) 2017 Open Source Foundries Limited +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +########################################################################### + +# This is an example Makefile to demonstrate how to use mcuboot to +# deploy and upgrade images. The image building should work on any +# supported target, however flashing will likely require changes to +# the flash addresses, depending on the partition layout of the device +# in question. +# +# running +# +# make BOARD=frdm_k64f all +# +# should generate three "*.bin" files in this directory: +# +# mcuboot.bin: The bootloader itself +# signed-hello1.bin: A signed sample. +# signed-hello2.bin: An upgrade image, signed and marked for +# upgrade. +# +# "make flash_boot" should flash the bootloader into the flash, +# erasing the rest of the device. If you examine the device at this +# time, you should see a message about the bootloader not being able +# to find a bootable image. +# +# "make flash_hello1" will then flash the first application into the +# "primary slot". This should boot into this app, print a small message, and +# give the zephyr console. +# +# "make flash_hello2" will flash hello2 into the "secondary slot". The +# reset should upgrade and run the new image. Resetting again should +# then revert back to the first app, since we did not mark this image +# as good. + +# Extra .conf fragments to merge into the MCUboot .config, as a +# semicolon-separated list (i.e., a CMake list). +BOOTLOADER_OVERLAY_CONFIG ?= + +BOARD ?= frdm_k64f +SLOT_SIZE ?= 0x60000 +BOOT_ADDR ?= 0x0 +IMG0_ADDR ?= 0x20000 +IMG1_ADDR ?= 0x80000 + +.PHONY: check boot hello1 clean_boot clean_hello1 \ + hello2 clean_hello2 flash_boot flash_hello1 flash_hello2 + +# For signing, use the default RSA demo key, to match the default in +# the mcuboot Makefile. +SIGNING_KEY ?= ../../root-rsa-2048.pem + +# The header size should match that in hello1/prj.conf +# CONFIG_TEXT_SECTION_OFFSET. This value needs to be a power of two +# that is at least as large as the size of the vector table. The +# value given here of 0x200 should be sufficient for any supported +# devices, but it can be made smaller, as long as this value matches +# that used to build the app. +BOOT_HEADER_LEN = 0x200 + +# For upgrades, the signing tool needs to know the device alignment. +# This requirement will be going away soon. +FLASH_ALIGNMENT = 8 + +IMGTOOL = ../../scripts/imgtool.py +ASSEMBLE = ../../scripts/assemble.py +PYOCD = pyocd + +SOURCE_DIRECTORY := $(CURDIR) +BUILD_DIRECTORY := $(CURDIR)/build/$(BOARD) +BUILD_DIR_BOOT := $(BUILD_DIRECTORY)/mcuboot +BUILD_DIR_HELLO1 := $(BUILD_DIRECTORY)/hello1 +BUILD_DIR_HELLO2 := $(BUILD_DIRECTORY)/hello2 + +help: + @echo "make BOARD=" + @echo ": all, boot, hello1, full.bin" + @echo ": frdm_k64f only for now" + +all: boot hello1 hello2 + +full.bin: boot hello1 hello2 + $(ASSEMBLE) -b $(BUILD_DIR_BOOT) \ + -z $(ZEPHYR_BASE) \ + -p signed-hello1.bin \ + -s signed-hello2.bin \ + -o full.bin + +clean: clean_boot clean_hello1 clean_hello2 + @rm -f signed-hello1.bin + @rm -f signed-hello2.bin + @rm -f mcuboot.bin + +boot: check + @rm -f mcuboot.bin + (mkdir -p $(BUILD_DIR_BOOT) && \ + cd $(BUILD_DIR_BOOT) && \ + cmake -DOVERLAY_CONFIG=$(BOOTLOADER_OVERLAY_CONFIG) \ + -G"Ninja" \ + -DBOARD=$(BOARD) \ + $(SOURCE_DIRECTORY)/../../boot/zephyr && \ + ninja) + cp $(BUILD_DIR_BOOT)/zephyr/zephyr.bin mcuboot.bin + +clean_boot: check + rm -rf $(BUILD_DIR_BOOT) + +# Build and sign "hello1". +hello1: check + (mkdir -p $(BUILD_DIR_HELLO1) && \ + cd $(BUILD_DIR_HELLO1) && \ + cmake -DFROM_WHO=hello1 \ + -G"Ninja" \ + -DBOARD=$(BOARD) \ + $(SOURCE_DIRECTORY)/hello-world && \ + ninja) + $(IMGTOOL) sign \ + --key $(SIGNING_KEY) \ + --header-size $(BOOT_HEADER_LEN) \ + --align $(FLASH_ALIGNMENT) \ + --version 1.2 \ + --slot-size $(SLOT_SIZE) \ + $(BUILD_DIR_HELLO1)/zephyr/zephyr.bin \ + signed-hello1.bin + +clean_hello1: check + rm -rf $(BUILD_DIR_HELLO1) + +# Build and sign "hello2". +# This is the same signing command as above, except that it adds the +# "--pad" argument. This will also add the trailer that indicates +# this image is intended to be an upgrade. It should be flashed into +# the secondary slot instead of the primary slot. +hello2: check + (mkdir -p $(BUILD_DIR_HELLO2) && \ + cd $(BUILD_DIR_HELLO2) && \ + cmake -DFROM_WHO=hello2 \ + -G"Ninja" \ + -DBOARD=$(BOARD) \ + $(SOURCE_DIRECTORY)/hello-world && \ + ninja) + $(IMGTOOL) sign \ + --key $(SIGNING_KEY) \ + --header-size $(BOOT_HEADER_LEN) \ + --align $(FLASH_ALIGNMENT) \ + --version 1.2 \ + --slot-size $(SLOT_SIZE) \ + --pad \ + $(BUILD_DIR_HELLO2)/zephyr/zephyr.bin \ + signed-hello2.bin + +clean_hello2: check + rm -rf $(BUILD_DIR_HELLO2) + +# These flash_* targets use pyocd to flash the images. The addresses +# are hardcoded at this time. + +flash_boot: + $(PYOCD) flash -e chip -a $(BOOT_ADDR) mcuboot.bin + +flash_hello1: + $(PYOCD) flash -a $(IMG0_ADDR) signed-hello1.bin + +flash_hello2: + $(PYOCD) flash -a $(IMG1_ADDR) signed-hello2.bin + +flash_full: + $(PYOCD) flash -e chip -a $(BOOT_ADDR) full.bin + +# These test- targets reinvoke make with the configuration set to test +# various configurations. This will generally be followed by using +# the above flash targets. + +# Test a good image, with a good upgrade, using RSA signatures. +# flash_boot: Unable to find bootable image +# flash_hello1: hello1 runs +# flash_hello2: hello2 runs +# reset: hello1 runs +test-good-rsa: clean + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-rsa.conf \ + all + +# Test a good image, with a good upgrade, using ECDSA signatures. +# flash_boot: Unable to find bootable image +# flash_hello1: hello1 runs +# flash_hello2: hello2 runs +# reset: hello1 runs +test-good-ecdsa: clean + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-ecdsa-p256.conf \ + SIGNING_KEY=../../root-ec-p256.pem \ + all + +# Test (with RSA) that overwrite-only works. This should boot, +# upgrade correctly, but not revert once the upgrade has been done. +# flash_boot: Unable to find bootable image +# flash_hello1: hello1 runs +# flash_hello2: hello2 runs +# reset: hello2 runs +test-overwrite: clean + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-upgrade-only.conf \ + all + +# Test that when configured for RSA, a wrong signature in the upgrade +# image will fail to upgrade. +# flash_boot: Unable to find bootable image +# flash_hello1: hello1 runs +# flash_hello2: hello1 runs +# reset: hello1 runs +test-bad-rsa-upgrade: clean + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-rsa.conf \ + boot hello1 + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-rsa.conf \ + SIGNING_KEY=../../root-ec-p256.pem \ + hello2 + +# Test that when configured for ECDSA, a wrong signature in the upgrade +# image will fail to upgrade. +# flash_boot: Unable to find bootable image +# flash_hello1: hello1 runs +# flash_hello2: hello1 runs +# reset: hello1 runs +test-bad-ecdsa-upgrade: clean + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-ecdsa-p256.conf \ + SIGNING_KEY=../../root-ec-p256.pem \ + boot hello1 + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-ecdsa-p256.conf \ + SIGNING_KEY=../../root-rsa-2048.pem \ + hello2 + +# Test that when configured to not validate the primary slot, we still boot, but +# don't upgrade. +# flash_boot: tries to boot and resets +# flash_hello1: hello1 runs +# flash_hello2: hello1 runs +# reset: hello1 runs +test-no-bootcheck: clean + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-skip-primary-slot-validate.conf \ + SIGNING_KEY=../../root-ec-p256.pem \ + all + +# Test a good image, with a wrong-signature upgrade, using RSA signatures. +# flash_boot: Unable to find bootable image +# flash_hello1: hello1 runs +# flash_hello2: hello1 runs +# reset: hello1 runs +test-wrong-rsa: clean + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-rsa.conf \ + boot hello1 + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-rsa.conf \ + SIGNING_KEY=bad-keys/bad-rsa-2048.pem \ + hello2 + +# Test a good image, with a wrong-signature upgrade, using ECDSA signatures. +# flash_boot: Unable to find bootable image +# flash_hello1: hello1 runs +# flash_hello2: hello1 runs +# reset: hello1 runs +test-wrong-ecdsa: clean + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-ecdsa-p256.conf \ + SIGNING_KEY=../../root-ec-p256.pem \ + boot hello1 + $(MAKE) \ + BOOTLOADER_OVERLAY_CONFIG=$(PWD)/overlay-ecdsa-p256.conf \ + SIGNING_KEY=bad-keys/bad-ec-p256.pem \ + hello2 + +check: + @if [ -z "$$ZEPHYR_BASE" ]; then echo "Zephyr environment not set up"; false; fi + @if [ -z "$(BOARD)" ]; then echo "You must specify BOARD="; false; fi diff --git a/bootloader/mcuboot/samples/zephyr/README.md b/bootloader/mcuboot/samples/zephyr/README.md new file mode 100644 index 0000000..d65341e --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/README.md @@ -0,0 +1,24 @@ +# Zephyr sample application. + +In order to successfully deploy an application using MCUboot, it is +necessary to build at least one other binary: the application itself. +It is beyond the scope of this documentation to describe what an +application is able to do, however a working example is certainly +useful. + +Please see the comments in the Makefile in this directory for more +details on how to build and test this application. + +Note that this sample uses the "ninja" build tool, which can be +installed on most systems using the system package manager, e.g., for +a Debian-based distro: + +``` +$ sudo apt-get install ninja +``` + +or in Fedora: + +``` +$ sudo dnf install ninja +``` diff --git a/bootloader/mcuboot/samples/zephyr/bad-keys/README.md b/bootloader/mcuboot/samples/zephyr/bad-keys/README.md new file mode 100644 index 0000000..621ce96 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/bad-keys/README.md @@ -0,0 +1,6 @@ +# Bad keys for testing + +This directory contains some alternate keys that can be used for +testing. Signing the images with either of these keys, but leaving +the demo keys's public keys in the bootloader should result in it not +upgrading, or not booting. diff --git a/bootloader/mcuboot/samples/zephyr/bad-keys/bad-ec-p256.pem b/bootloader/mcuboot/samples/zephyr/bad-keys/bad-ec-p256.pem new file mode 100644 index 0000000..333f41f --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/bad-keys/bad-ec-p256.pem @@ -0,0 +1,5 @@ +-----BEGIN EC PRIVATE KEY----- +MHcCAQEEILmqmiH6y3EGhLkTcnNtU7hZ1wnc51MIL53npseRX7vJoAoGCCqGSM49 +AwEHoUQDQgAEcX9ExNjZfsckp6AdutjPjVJsvP6ZZkKfLsGnRpKR+9OpO9/qmJHs +ks+ZXo70SEANjWnNlxKNAVci8aUm8UskLw== +-----END EC PRIVATE KEY----- diff --git a/bootloader/mcuboot/samples/zephyr/bad-keys/bad-rsa-2048.pem b/bootloader/mcuboot/samples/zephyr/bad-keys/bad-rsa-2048.pem new file mode 100644 index 0000000..755f95b --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/bad-keys/bad-rsa-2048.pem @@ -0,0 +1,27 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIEowIBAAKCAQEAzXhCIc6kig0DRWEyKj4N8v/bfvh/RmU73Jo0Z0RAFSLnFrE5 +5W5C9tsdDalhN5HV7xBQCzr7GSW1C6MNvtw/lVr4+x4LvgwYD6kl+9IZc5udPIJ1 +R7aLBP2o4r6rJWtCj9Y6bifsMlVkHCONIHDGhp3bSl+9C2EqfwqJENg3mHYyZcbr +kBfLhILE24T+MhxkPZiI3Ox6XthwT7Is8ZCXF6VCYaK6N8jXAXz8OiEhIpMl3Z3m +DqxaM0ovSXfXvOfMeKN76iI9m8S4JnPbuzu+/5GdSnNbIxoluzXU7e52FoKgthNM +2mArAak5x3IqsStY0qDCODSlNnSha9+jfk8ULwIDAQABAoIBAQC7Z6dx7GdY3vuP +yVIXA1h3vfP2gDKeA3GxCRko4zBL1vTNVsJGx+XeAAYk0suwAp0NGmTXiWlDC4hw +37yGy55W3I3hhQsSwTck+ZOCdqPuNQ4aBadwzEdKOw5SGbRCQe2JAc1zcYhWdFoF +7EspPpNkbxB3apEjkvFOxE42Be/XZrwxig1OQJ9DpOhTeV8+jljg6aSzOuQxdR4G +ZXTzACnb20jnefnwmC5lhZxRWYEXkc96onYIvrDpIMdTzTnTbshJjg5HNPOEEgpF +U1x2iCRB3tN9QHbzdH/XrnRBr9Yy62SUIDXf4LBqin/pRQPodh9ZM7zanrhzsuiy +Tro2WKhRAoGBANoAT73haGrUb9ZSdzpu5qOD0eaQZPCIlubRrT5BCXPS2xVIGe+g +eDaBljdlXDJnKvBqjOVQyU7lrZAIVWgz6qD1HNIQZI30WivXejL4GeoXnAnp/ohh +1QmjMVvlcGe/22jpDmJa3Qgm4leaUxnxxilO/pQlZzzndBP88Df4/hIJAoGBAPFI +xBRq0SdBWhSydeEFvm8n37/icrN+V9f/Ka9tbPZcJaowzqQPrAHtu2CBD1JVyo2G +sKxFy867vCHntFu8zq2KSpCPVyeR+pDvwknr9PDm+DiLScBCGdyKqjBazT5+mHzP +fKk6nRV8uoNXLZQtnqKJzN61bYrnFaOQx6GZM6J3AoGAUHqA9bY7GAUo7FQxU88R +Mhg96wIvYWTrYHbToAHefXXAD1E40e/JsUWRsQ2oRas0fOC49wcl6gx8UInjDb7s +xVL3usz2cjlc+IZpxFs3JeZlYnuRzcNgJFispiJDpul7FHXFK6YjpxjDwldkilVp +NGLHNOXCAQfpIF/mRqOTGBECgYAmb7kMp5d58WcwNN2iYw/bFTcHkkNDZLUJq5Qw +ZfYdqMA3RF8ms3hrNjvLO8P9Eb2angI270dwP2fQ3uBUXNdvvb/zF2KC4zZPMGJ6 +9COo3KJeH5I4Fk+YWl6SJWTct74C4+qv6q5rZdswYQrZuAq1Sc5hC/XPUtCXpdCn +ZYhcMQKBgEHN3ZYe7gOfxR4rqk+OIsAUN9P3zyu6kQzUL1BQ7t7Gwi1dv6+E+BGQ +vGUt4RGG10g3K9twfhOHnwAiruEk6CK2+1G/ZsGCrPIE21KCcucUCPvzUGhintO+ +b+Q5kAeZFg5CB9b616SY/GvlzPraNx5OZfI8nw39U9do7N/yFiKT +-----END RSA PRIVATE KEY----- \ No newline at end of file diff --git a/bootloader/mcuboot/samples/zephyr/build-boot.sh b/bootloader/mcuboot/samples/zephyr/build-boot.sh new file mode 100644 index 0000000..81691e7 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/build-boot.sh @@ -0,0 +1,22 @@ +#! /bin/bash + +# Build the bootloader. + +# In order to build successfully, ZEPHYR_SDK_INSTALL_DIR and +# ZEPHYR_GCC_VARIANT need to be set, as well as zephyr/zephyr-env.sh +# must be sourced. + +die() { + echo error: "$@" + exit 1 +} + +if [ -z "$ZEPHYR_BASE" ]; then + die "Please setup for a Zephyr build before running this script." +fi + +if [ -z "$BOARD" ]; then + die "Please set BOARD to a valid board before running this script." +fi + +make BOARD=${BOARD} -j$(nproc) boot || die "Build mcuboot" diff --git a/bootloader/mcuboot/samples/zephyr/build-hello.sh b/bootloader/mcuboot/samples/zephyr/build-hello.sh new file mode 100644 index 0000000..6920f32 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/build-hello.sh @@ -0,0 +1,22 @@ +#! /bin/bash + +# Build the Sample hello program + +# In order to build successfully, ZEPHYR_SDK_INSTALL_DIR and +# ZEPHYR_GCC_VARIANT need to be set, as well as zephyr/zephyr-env.sh +# must be sourced. + +die() { + echo error: "$@" + exit 1 +} + +if [ -z "$ZEPHYR_BASE" ]; then + die "Please setup for a Zephyr build before running this script." +fi + +if [ -z "$BOARD" ]; then + die "Please set BOARD to a valid board before running this script." +fi + +make BOARD=${BOARD} -j$(nproc) hello1 || die "Build hello1" diff --git a/bootloader/mcuboot/samples/zephyr/hello-world/CMakeLists.txt b/bootloader/mcuboot/samples/zephyr/hello-world/CMakeLists.txt new file mode 100644 index 0000000..3cace48 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/hello-world/CMakeLists.txt @@ -0,0 +1,26 @@ +# Top-level CMakeLists.txt for the skeleton application. +# +# Copyright (c) 2017 Open Source Foundries Limited +# Copyright (c) 2018 Foundries.io Ltd +# +# SPDX-License-Identifier: Apache-2.0 +# +# This provides a basic application structure suitable for loading by +# mcuboot, which is easy to customize on a per-board basis. It can be +# used as a starting point for new applications. + +cmake_minimum_required(VERSION 3.8) + +# find_package(Zephyr) in order to load application boilerplate: +# https://docs.zephyrproject.org/latest/develop/application/index.html +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +project(NONE) + +# This string ends up getting printed in the device console +if (NOT DEFINED FROM_WHO) + set(FROM_WHO Zephyr) +endif() + +target_compile_definitions(app PRIVATE "-DMCUBOOT_HELLO_WORLD_FROM=\"${FROM_WHO}\"") + +target_sources(app PRIVATE src/main.c) diff --git a/bootloader/mcuboot/samples/zephyr/hello-world/README.rst b/bootloader/mcuboot/samples/zephyr/hello-world/README.rst new file mode 100644 index 0000000..2c89008 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/hello-world/README.rst @@ -0,0 +1,6 @@ +This is a "Hello world" skeleton application which can be used as a +starting point for Zephyr application development using mcuboot. + +It includes the configuration "glue" needed to make the application +loadable by mcuboot in addition to a basic Zephyr hello world +application's code. diff --git a/bootloader/mcuboot/samples/zephyr/hello-world/boards/.gitignore b/bootloader/mcuboot/samples/zephyr/hello-world/boards/.gitignore new file mode 100644 index 0000000..27e8bd8 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/hello-world/boards/.gitignore @@ -0,0 +1 @@ +*-local.conf diff --git a/bootloader/mcuboot/samples/zephyr/hello-world/boards/README.rst b/bootloader/mcuboot/samples/zephyr/hello-world/boards/README.rst new file mode 100644 index 0000000..615c06e --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/hello-world/boards/README.rst @@ -0,0 +1,2 @@ +You can place per-board configuration here. See the comments in the +CMakeLists.txt for more information. diff --git a/bootloader/mcuboot/samples/zephyr/hello-world/prj.conf b/bootloader/mcuboot/samples/zephyr/hello-world/prj.conf new file mode 100644 index 0000000..12990aa --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/hello-world/prj.conf @@ -0,0 +1,12 @@ +# Print a banner on the UART on startup. +CONFIG_BOOT_BANNER=y + +# Enable console and printk() +CONFIG_PRINTK=y +CONFIG_STDOUT_CONSOLE=y + +# Enable Zephyr application to be booted by MCUboot +CONFIG_BOOTLOADER_MCUBOOT=y + +# Use the default MCUBoot PEM key file (BOOT_SIGNATURE_KEY_FILE) +CONFIG_MCUBOOT_SIGNATURE_KEY_FILE="bootloader/mcuboot/root-rsa-2048.pem" diff --git a/bootloader/mcuboot/samples/zephyr/hello-world/sample.yaml b/bootloader/mcuboot/samples/zephyr/hello-world/sample.yaml new file mode 100644 index 0000000..4241778 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/hello-world/sample.yaml @@ -0,0 +1,9 @@ +sample: + name: Application Skeleton + description: Basic "hello world" application, but loadable by mcuboot + platforms: all +tests: + - test: + build_only: true + tags: samples tests + min_ram: 16 diff --git a/bootloader/mcuboot/samples/zephyr/hello-world/src/Makefile b/bootloader/mcuboot/samples/zephyr/hello-world/src/Makefile new file mode 100644 index 0000000..00066e1 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/hello-world/src/Makefile @@ -0,0 +1 @@ +obj-y = main.o diff --git a/bootloader/mcuboot/samples/zephyr/hello-world/src/main.c b/bootloader/mcuboot/samples/zephyr/hello-world/src/main.c new file mode 100644 index 0000000..66443d7 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/hello-world/src/main.c @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2017 Linaro, Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +void main(void) +{ + printk("Hello World from %s on %s!\n", + MCUBOOT_HELLO_WORLD_FROM, CONFIG_BOARD); +} diff --git a/bootloader/mcuboot/samples/zephyr/mcutests/mcutests.go b/bootloader/mcuboot/samples/zephyr/mcutests/mcutests.go new file mode 100644 index 0000000..e250f98 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/mcutests/mcutests.go @@ -0,0 +1,281 @@ +// Package mcutests +package mcutests // github.com/mcu-tools/mcuboot/samples/zephyr/mcutests + +// The main driver of this consists of a series of tests. Each test +// then contains a series of commands and expect results. +var Tests = []struct { + Name string + ShortName string + Tests []OneTest +}{ + { + Name: "Good RSA", + ShortName: "good-rsa", + Tests: []OneTest{ + { + Build: [][]string{ + {"make", "test-good-rsa"}, + }, + Commands: [][]string{ + {"make", "flash_boot"}, + }, + Expect: "Unable to find bootable image", + }, + { + Commands: [][]string{ + {"make", "flash_hello1"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"make", "flash_hello2"}, + }, + Expect: "Hello World from hello2", + }, + { + Commands: [][]string{ + {"pyocd", "commander", "-c", "reset"}, + }, + Expect: "Hello World from hello1", + }, + }, + }, + { + Name: "Good ECDSA", + ShortName: "good-ecdsa", + Tests: []OneTest{ + { + Build: [][]string{ + {"make", "test-good-ecdsa"}, + }, + Commands: [][]string{ + {"make", "flash_boot"}, + }, + Expect: "Unable to find bootable image", + }, + { + Commands: [][]string{ + {"make", "flash_hello1"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"make", "flash_hello2"}, + }, + Expect: "Hello World from hello2", + }, + { + Commands: [][]string{ + {"pyocd", "commander", "-c", "reset"}, + }, + Expect: "Hello World from hello1", + }, + }, + }, + { + Name: "Overwrite", + ShortName: "overwrite", + Tests: []OneTest{ + { + Build: [][]string{ + {"make", "test-overwrite"}, + }, + Commands: [][]string{ + {"make", "flash_boot"}, + }, + Expect: "Unable to find bootable image", + }, + { + Commands: [][]string{ + {"make", "flash_hello1"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"make", "flash_hello2"}, + }, + Expect: "Hello World from hello2", + }, + { + Commands: [][]string{ + {"pyocd", "commander", "-c", "reset"}, + }, + Expect: "Hello World from hello2", + }, + }, + }, + { + Name: "Bad RSA", + ShortName: "bad-rsa-upgrade", + Tests: []OneTest{ + { + Build: [][]string{ + {"make", "test-bad-rsa-upgrade"}, + }, + Commands: [][]string{ + {"make", "flash_boot"}, + }, + Expect: "Unable to find bootable image", + }, + { + Commands: [][]string{ + {"make", "flash_hello1"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"make", "flash_hello2"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"pyocd", "commander", "-c", "reset"}, + }, + Expect: "Hello World from hello1", + }, + }, + }, + { + Name: "Bad RSA", + ShortName: "bad-ecdsa-upgrade", + Tests: []OneTest{ + { + Build: [][]string{ + {"make", "test-bad-ecdsa-upgrade"}, + }, + Commands: [][]string{ + {"make", "flash_boot"}, + }, + Expect: "Unable to find bootable image", + }, + { + Commands: [][]string{ + {"make", "flash_hello1"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"make", "flash_hello2"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"pyocd", "commander", "-c", "reset"}, + }, + Expect: "Hello World from hello1", + }, + }, + }, + { + Name: "No bootcheck", + ShortName: "no-bootcheck", + Tests: []OneTest{ + { + Build: [][]string{ + {"make", "test-no-bootcheck"}, + }, + Commands: [][]string{ + {"make", "flash_boot"}, + }, + Expect: "Unable to find bootable image", + }, + { + Commands: [][]string{ + {"make", "flash_hello1"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"make", "flash_hello2"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"pyocd", "commander", "-c", "reset"}, + }, + Expect: "Hello World from hello1", + }, + }, + }, + { + Name: "Wrong RSA", + ShortName: "wrong-rsa", + Tests: []OneTest{ + { + Build: [][]string{ + {"make", "test-wrong-rsa"}, + }, + Commands: [][]string{ + {"make", "flash_boot"}, + }, + Expect: "Unable to find bootable image", + }, + { + Commands: [][]string{ + {"make", "flash_hello1"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"make", "flash_hello2"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"pyocd", "commander", "-c", "reset"}, + }, + Expect: "Hello World from hello1", + }, + }, + }, + { + Name: "Wrong ECDSA", + ShortName: "wrong-ecdsa", + Tests: []OneTest{ + { + Build: [][]string{ + {"make", "test-wrong-ecdsa"}, + }, + Commands: [][]string{ + {"make", "flash_boot"}, + }, + Expect: "Unable to find bootable image", + }, + { + Commands: [][]string{ + {"make", "flash_hello1"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"make", "flash_hello2"}, + }, + Expect: "Hello World from hello1", + }, + { + Commands: [][]string{ + {"pyocd", "commander", "-c", "reset"}, + }, + Expect: "Hello World from hello1", + }, + }, + }, +} + +type OneTest struct { + Build [][]string + Commands [][]string + Expect string +} diff --git a/bootloader/mcuboot/samples/zephyr/overlay-ecdsa-p256.conf b/bootloader/mcuboot/samples/zephyr/overlay-ecdsa-p256.conf new file mode 100644 index 0000000..8bf9512 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/overlay-ecdsa-p256.conf @@ -0,0 +1,4 @@ +# Kconfig overlay for building with ECDSA-P256 signatures +CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256=y +CONFIG_BOOT_SIGNATURE_KEY_FILE="root-ec-p256.pem" +CONFIG_BOOT_SWAP_USING_MOVE=y diff --git a/bootloader/mcuboot/samples/zephyr/overlay-rsa.conf b/bootloader/mcuboot/samples/zephyr/overlay-rsa.conf new file mode 100644 index 0000000..c70349d --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/overlay-rsa.conf @@ -0,0 +1,3 @@ +# Kconfig overlay for building with RSA signatures +CONFIG_BOOT_SIGNATURE_TYPE_RSA=y +CONFIG_BOOT_SWAP_USING_MOVE=y diff --git a/bootloader/mcuboot/samples/zephyr/overlay-skip-primary-slot-validate.conf b/bootloader/mcuboot/samples/zephyr/overlay-skip-primary-slot-validate.conf new file mode 100644 index 0000000..e0c1f98 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/overlay-skip-primary-slot-validate.conf @@ -0,0 +1,4 @@ +# Kconfig overlay for building without validating primary slot. + +# CONFIG_BOOT_VALIDATE_SLOT0 is not set +CONFIG_BOOT_SWAP_USING_MOVE=y diff --git a/bootloader/mcuboot/samples/zephyr/overlay-upgrade-only.conf b/bootloader/mcuboot/samples/zephyr/overlay-upgrade-only.conf new file mode 100644 index 0000000..bdff7ac --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/overlay-upgrade-only.conf @@ -0,0 +1,2 @@ +# Kconfig overlay for building in upgrade-only mode. +CONFIG_BOOT_UPGRADE_ONLY=y diff --git a/bootloader/mcuboot/samples/zephyr/run-tests.go b/bootloader/mcuboot/samples/zephyr/run-tests.go new file mode 100644 index 0000000..f55b0a6 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/run-tests.go @@ -0,0 +1,290 @@ +// +build ignore +// +// Build multiple configurations of MCUboot for Zephyr, making sure +// that they run properly. +// +// Run as: +// +// go run run-tests.go [flags] +// +// Add -help as a flag to get help. See comment below for logIn on +// how to configure terminal output to a file so this program can see +// the output of the Zephyr device. + +package main + +import ( + "archive/zip" + "bufio" + "flag" + "fmt" + "io" + "log" + "os" + "os/exec" + "strings" + "time" + + "github.com/mcu-tools/mcuboot/samples/zephyr/mcutests" +) + +// logIn gives the pathname of the log output from the Zephyr device. +// In order to see the serial output, but still be useful for human +// debugging, the output of the terminal emulator should be teed to a +// file that this program will read from. This can be done with +// something like: +// +// picocom -b 115200 /dev/ttyACM0 | tee /tmp/zephyr.out +// +// Other terminal programs should also have logging options. +var logIn = flag.String("login", "/tmp/zephyr.out", "File name of terminal log from Zephyr device") + +// Output from this test run is written to the given log file. +var logOut = flag.String("logout", "tests.log", "Log file to write to") + +var preBuilt = flag.String("prebuilt", "", "Name of file with prebuilt tests") + +func main() { + err := run() + if err != nil { + log.Fatal(err) + } +} + +func run() error { + flag.Parse() + + lines := make(chan string, 30) + go readLog(lines) + + // Write output to a log file + logFile, err := os.Create(*logOut) + if err != nil { + return err + } + defer logFile.Close() + lg := bufio.NewWriter(logFile) + defer lg.Flush() + + var extractor *Extractor + + if *preBuilt != "" { + // If there are pre-built images, open them. + extractor, err = NewExtractor(*preBuilt) + if err != nil { + return err + } + defer extractor.Close() + } + + for _, group := range mcutests.Tests { + fmt.Printf("Running %q\n", group.Name) + fmt.Fprintf(lg, "-------------------------------------\n") + fmt.Fprintf(lg, "---- Running %q\n", group.Name) + + for _, test := range group.Tests { + if *preBuilt == "" { + // No prebuilt, build the tests + // ourselves. + err = runCommands(test.Build, lg) + if err != nil { + return err + } + } else { + // Extract the build artifacts from + // the zip file. + err = extractor.Extract(group.ShortName) + if err != nil { + return err + } + } + + err = runCommands(test.Commands, lg) + if err != nil { + return err + } + + err = expect(lg, lines, test.Expect) + if err != nil { + return err + } + + fmt.Fprintf(lg, "---- Passed\n") + } + fmt.Printf(" Passed!\n") + } + + return nil +} + +// Run a set of commands +func runCommands(cmds [][]string, lg io.Writer) error { + for _, cmd := range cmds { + fmt.Printf(" %s\n", cmd) + fmt.Fprintf(lg, "---- Run: %s\n", cmd) + err := runCommand(cmd, lg) + if err != nil { + return err + } + } + + return nil +} + +// Run a single command. +func runCommand(cmd []string, lg io.Writer) error { + c := exec.Command(cmd[0], cmd[1:]...) + c.Stdout = lg + c.Stderr = lg + return c.Run() +} + +// Expect the given string. +func expect(lg io.Writer, lines <-chan string, exp string) error { + // Read lines, and if we hit a timeout before seeing our + // expected line, then consider that an error. + fmt.Fprintf(lg, "---- expect: %q\n", exp) + + stopper := time.NewTimer(10 * time.Second) + defer stopper.Stop() +outer: + for { + select { + case line := <-lines: + fmt.Fprintf(lg, "---- target: %q\n", line) + if strings.Contains(line, exp) { + break outer + } + case <-stopper.C: + fmt.Fprintf(lg, "timeout, didn't receive output\n") + return fmt.Errorf("timeout, didn't receive expected string: %q", exp) + } + } + + return nil +} + +// Read things from the log file, discarding everything already there. +func readLog(sink chan<- string) { + file, err := os.Open(*logIn) + if err != nil { + log.Fatal(err) + } + + _, err = file.Seek(0, 2) + if err != nil { + log.Fatal(err) + } + + prefix := "" + for { + // Read lines until EOF, then delay a bit, and do it + // all again. + rd := bufio.NewReader(file) + + for { + line, err := rd.ReadString('\n') + if err == io.EOF { + // A partial line can happen because + // we are racing with the writer. + if line != "" { + prefix = line + } + break + } + if err != nil { + log.Fatal(err) + } + + line = prefix + line + prefix = "" + sink <- line + // fmt.Printf("line: %q\n", line) + } + + // Pause a little + time.Sleep(250 * time.Millisecond) + } +} + +// An Extractor holds an opened Zip file, and is able to extract files +// based on the directory name. +type Extractor struct { + file *os.File + zip *zip.Reader +} + +// NewExtractor returns an Extractor based on the contents of a zip +// file. +func NewExtractor(name string) (*Extractor, error) { + f, err := os.Open(name) + if err != nil { + return nil, err + } + size, err := f.Seek(0, 2) + if err != nil { + f.Close() + return nil, err + } + + rd, err := zip.NewReader(f, size) + if err != nil { + f.Close() + return nil, err + } + + return &Extractor{ + file: f, + zip: rd, + }, nil +} + +func (e *Extractor) Close() error { + return e.file.Close() +} + +// Extract extracts the files of the given directory name into the +// current directory. These files will overwrite any files of these +// names that already exist (presumably from previous extractions). +func (e *Extractor) Extract(dir string) error { + prefix := dir + "/" + + count := 0 + for _, file := range e.zip.File { + if len(file.Name) > len(prefix) && strings.HasPrefix(file.Name, prefix) { + outName := file.Name[len(prefix):len(file.Name)] + fmt.Printf("->%q\n", outName) + + err := e.single(file, outName) + if err != nil { + return err + } + + count += 1 + } + } + + if count == 0 { + return fmt.Errorf("File for %s missing from archive", dir) + } + + return nil +} + +// single extracts a single file from the zip archive, writing the +// results to a file 'outName'. +func (e *Extractor) single(file *zip.File, outName string) error { + inf, err := file.Open() + if err != nil { + return err + } + + outf, err := os.Create(outName) + if err != nil { + return err + } + defer outf.Close() + + _, err = io.Copy(outf, inf) + return err +} diff --git a/bootloader/mcuboot/samples/zephyr/run-tests.sh b/bootloader/mcuboot/samples/zephyr/run-tests.sh new file mode 100644 index 0000000..cdd89e3 --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/run-tests.sh @@ -0,0 +1,4 @@ +#!/bin/bash + +echo "Please use the new test runner: go run run-tests.go" +exit 1 diff --git a/bootloader/mcuboot/samples/zephyr/test-compile.go b/bootloader/mcuboot/samples/zephyr/test-compile.go new file mode 100644 index 0000000..3acfa3c --- /dev/null +++ b/bootloader/mcuboot/samples/zephyr/test-compile.go @@ -0,0 +1,156 @@ +// +build ignore +// +// Build all of the tests. +// +// Run as: +// +// go run test-compile.go -out name.tar + +package main + +import ( + "archive/zip" + "flag" + "fmt" + "io" + "log" + "os" + "os/exec" + "path" + + "github.com/mcu-tools/mcuboot/samples/zephyr/mcutests" +) + +var outFile = flag.String("out", "test-images.zip", "Name of zip file to put built tests into") + +func main() { + err := run() + if err != nil { + log.Fatal(err) + } +} + +func run() error { + flag.Parse() + + zipper, err := NewBuilds() + if err != nil { + return err + } + defer zipper.Close() + + for _, group := range mcutests.Tests { + fmt.Printf("Compiling %q\n", group.ShortName) + c := exec.Command("make", + fmt.Sprintf("test-%s", group.ShortName)) + // TODO: Should capture the output and show it if + // there is an error. + err = c.Run() + if err != nil { + return err + } + + err = zipper.Capture(group.ShortName) + if err != nil { + return err + } + } + + return nil +} + +// A Builds create a zipfile of the contents of various builds. The +// names will be constructed. +type Builds struct { + // The file being written to. + file *os.File + + // The zip writer writing the data. + zip *zip.Writer +} + +func NewBuilds() (*Builds, error) { + name := *outFile + file, err := os.OpenFile(name, os.O_CREATE|os.O_EXCL|os.O_WRONLY, 0644) + if err != nil { + return nil, err + } + + z := zip.NewWriter(file) + + return &Builds{ + file: file, + zip: z, + }, nil +} + +func (b *Builds) Close() error { + return b.zip.Close() +} + +func (b *Builds) Capture(testName string) error { + // Collect stat information from the test directory, which + // should be close enough to make the zip file meaningful. + info, err := os.Stat(".") + if err != nil { + return err + } + + header, err := zip.FileInfoHeader(info) + if err != nil { + return err + } + + header.Name = testName + "/" + + _, err = b.zip.CreateHeader(header) + if err != nil { + return err + } + + for _, name := range []string{ + "mcuboot.bin", + "signed-hello1.bin", + "signed-hello2.bin", + } { + err = b.add(testName, name, name) + if err != nil { + return err + } + } + + return nil +} + +func (b *Builds) add(baseName, zipName, fileName string) error { + inp, err := os.Open(fileName) + if err != nil { + return err + } + defer inp.Close() + + info, err := inp.Stat() + if err != nil { + return err + } + + header, err := zip.FileInfoHeader(info) + if err != nil { + return err + } + + header.Name = path.Join(baseName, zipName) + header.Method = zip.Deflate + + wr, err := b.zip.CreateHeader(header) + if err != nil { + return err + } + + _, err = io.Copy(wr, inp) + if err != nil { + return err + } + + return nil +} diff --git a/bootloader/mcuboot/scripts/assemble.py b/bootloader/mcuboot/scripts/assemble.py new file mode 100644 index 0000000..05f9793 --- /dev/null +++ b/bootloader/mcuboot/scripts/assemble.py @@ -0,0 +1,148 @@ +#! /usr/bin/env python3 +# +# Copyright 2017 Linaro Limited +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +""" +Assemble multiple images into a single image that can be flashed on the device. +""" + +import argparse +import errno +import io +import re +import os +import os.path +import pickle +import sys + +def same_keys(a, b): + """Determine if the dicts a and b have the same keys in them""" + for ak in a.keys(): + if ak not in b: + return False + for bk in b.keys(): + if bk not in a: + return False + return True + +offset_re = re.compile(r"^#define DT_FLASH_AREA_([0-9A-Z_]+)_OFFSET(_0)?\s+(0x[0-9a-fA-F]+|[0-9]+)$") +size_re = re.compile(r"^#define DT_FLASH_AREA_([0-9A-Z_]+)_SIZE(_0)?\s+(0x[0-9a-fA-F]+|[0-9]+)$") + +class Assembly(): + def __init__(self, output, bootdir, edt): + self.find_slots(edt) + try: + os.unlink(output) + except OSError as e: + if e.errno != errno.ENOENT: + raise + self.output = output + + def find_slots(self, edt): + offsets = {} + sizes = {} + + part_nodes = edt.compat2nodes["fixed-partitions"] + for node in part_nodes: + for child in node.children.values(): + if "label" in child.props: + label = child.props["label"].val + offsets[label] = child.regs[0].addr + sizes[label] = child.regs[0].size + + if not same_keys(offsets, sizes): + raise Exception("Inconsistent data in devicetree.h") + + # We care about the mcuboot, image-0, and image-1 partitions. + if 'mcuboot' not in offsets: + raise Exception("Board partition table does not have mcuboot partition") + + if 'image-0' not in offsets: + raise Exception("Board partition table does not have image-0 partition") + + if 'image-1' not in offsets: + raise Exception("Board partition table does not have image-1 partition") + + self.offsets = offsets + self.sizes = sizes + + def add_image(self, source, partition): + with open(self.output, 'ab') as ofd: + pos = ofd.tell() + print("partition {}, pos={}, offset={}".format(partition, pos, self.offsets[partition])) + if pos > self.offsets[partition]: + raise Exception("Partitions not in order, unsupported") + if pos < self.offsets[partition]: + buf = b'\xFF' * (self.offsets[partition] - pos) + ofd.write(buf) + with open(source, 'rb') as rfd: + ibuf = rfd.read() + if len(ibuf) > self.sizes[partition]: + raise Exception("Image {} is too large for partition".format(source)) + ofd.write(ibuf) + +def find_board_name(bootdir): + dot_config = os.path.join(bootdir, "zephyr", ".config") + with open(dot_config, "r") as f: + for line in f: + if line.startswith("CONFIG_BOARD="): + return line.split("=", 1)[1].strip('"') + raise Exception("Expected CONFIG_BOARD line in {}".format(dot_config)) + +def main(): + parser = argparse.ArgumentParser() + + parser.add_argument('-b', '--bootdir', required=True, + help='Directory of built bootloader') + parser.add_argument('-p', '--primary', required=True, + help='Signed image file for primary image') + parser.add_argument('-s', '--secondary', + help='Signed image file for secondary image') + parser.add_argument('-o', '--output', required=True, + help='Filename to write full image to') + parser.add_argument('-z', '--zephyr-base', + help='Zephyr base containing the Zephyr repository') + + args = parser.parse_args() + + zephyr_base = args.zephyr_base + if zephyr_base is None: + try: + zephyr_base = os.environ['ZEPHYR_BASE'] + except KeyError: + print('Need to either have ZEPHYR_BASE in environment or pass in -z') + sys.exit(1) + + sys.path.insert(0, os.path.join(zephyr_base, "scripts", "dts", "python-devicetree", "src")) + import devicetree.edtlib + + board = find_board_name(args.bootdir) + + edt_pickle = os.path.join(args.bootdir, "zephyr", "edt.pickle") + with open(edt_pickle, 'rb') as f: + edt = pickle.load(f) + assert isinstance(edt, devicetree.edtlib.EDT) + + output = Assembly(args.output, args.bootdir, edt) + + output.add_image(os.path.join(args.bootdir, 'zephyr', 'zephyr.bin'), 'mcuboot') + output.add_image(args.primary, "image-0") + if args.secondary is not None: + output.add_image(args.secondary, "image-1") + +if __name__ == '__main__': + main() diff --git a/bootloader/mcuboot/scripts/flash.sh b/bootloader/mcuboot/scripts/flash.sh new file mode 100644 index 0000000..7cb5bdb --- /dev/null +++ b/bootloader/mcuboot/scripts/flash.sh @@ -0,0 +1,20 @@ +#! /bin/bash +# +# SPDX-License-Identifier: Apache-2.0 + +source $(dirname $0)/../target.sh + +lscript=/tmp/flash$$.jlink + +cat >$lscript < $gscript < {}; +let + # Nixpkgs has fairly recent versions of the dependencies, so we can + # rely on them without having to build our own derivations. + imgtoolPythonEnv = python37.withPackages ( + _: [ + python37.pkgs.click + python37.pkgs.cryptography + python37.pkgs.intelhex + python37.pkgs.setuptools + python37.pkgs.cbor2 + python37.pkgs.pyyaml + ] + ); +in +myEnvFun { + name = "imgtool"; + + buildInputs = [ imgtoolPythonEnv ]; +} diff --git a/bootloader/mcuboot/scripts/imgtool.py b/bootloader/mcuboot/scripts/imgtool.py new file mode 100644 index 0000000..e29e224 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool.py @@ -0,0 +1,22 @@ +#! /usr/bin/env python3 +# +# Copyright 2017 Linaro Limited +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +from imgtool import main + +if __name__ == '__main__': + main.imgtool() diff --git a/bootloader/mcuboot/scripts/imgtool/__init__.py b/bootloader/mcuboot/scripts/imgtool/__init__.py new file mode 100644 index 0000000..421af3e --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/__init__.py @@ -0,0 +1,17 @@ +# Copyright 2017-2020 Linaro Limited +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +imgtool_version = "2.1.0" diff --git a/bootloader/mcuboot/scripts/imgtool/boot_record.py b/bootloader/mcuboot/scripts/imgtool/boot_record.py new file mode 100644 index 0000000..fb98b2e --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/boot_record.py @@ -0,0 +1,52 @@ +# Copyright (c) 2019-2024, Arm Limited. +# Copyright (c) 2020, Linaro Limited +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +from enum import Enum + +try: + from cbor2 import dumps +except ImportError: + from cbor import dumps + + +class SwComponent(int, Enum): + """ + Software component property IDs specified by + Arm's PSA Attestation API 1.0 document. + """ + TYPE = 1 + MEASUREMENT_VALUE = 2 + VERSION = 4 + SIGNER_ID = 5 + MEASUREMENT_DESCRIPTION = 6 + + +def create_sw_component_data(sw_type, sw_version, sw_measurement_description, + sw_measurement_value, sw_signer_id): + # List of software component properties (Key ID + value) + properties = {SwComponent.TYPE: sw_type, + SwComponent.VERSION: sw_version, + SwComponent.SIGNER_ID: sw_signer_id, + SwComponent.MEASUREMENT_DESCRIPTION: sw_measurement_description, + SwComponent.MEASUREMENT_VALUE: sw_measurement_value, + } + + # Note: The measurement value must be the last item of the property + # list because later it will be modified by the bootloader. + last_key = list(properties.keys())[-1] + assert SwComponent.MEASUREMENT_VALUE == last_key, 'Measurement value is not the last item of the property list' + return dumps(properties) diff --git a/bootloader/mcuboot/scripts/imgtool/dumpinfo.py b/bootloader/mcuboot/scripts/imgtool/dumpinfo.py new file mode 100644 index 0000000..5544657 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/dumpinfo.py @@ -0,0 +1,328 @@ +# Copyright 2023-2024 Arm Limited +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +""" +Parse and print header, TLV area and trailer information of a signed image. +""" +import os.path +import struct +import sys + +import click +import yaml + +from imgtool import image + +HEADER_ITEMS = ("magic", "load_addr", "hdr_size", "protected_tlv_size", + "img_size", "flags", "version") +TLV_TYPES = dict((value, key) for key, value in image.TLV_VALUES.items()) +BOOT_MAGIC = bytes([ + 0x77, 0xc2, 0x95, 0xf3, + 0x60, 0xd2, 0xef, 0x7f, + 0x35, 0x52, 0x50, 0x0f, + 0x2c, 0xb6, 0x79, 0x80, ]) +BOOT_MAGIC_2 = bytes([ + 0x2d, 0xe1, 0x5d, 0x29, + 0x41, 0x0b, 0x8d, 0x77, + 0x67, 0x9c, 0x11, 0x0f, + 0x1f, 0x8a, ]) +BOOT_MAGIC_SIZE = len(BOOT_MAGIC) +_LINE_LENGTH = 60 +STATUS = { + '0x1': 'SET', + '0x2': 'BAD', + '0x3': 'UNSET', + '0x4': 'ANY', +} + + +def parse_enc(key_field_len): + if key_field_len is not None: + return "(len: {}, if BOOT_SWAP_SAVE_ENCTLV is unset)".format(hex(key_field_len)) + else: + return "Image not encrypted" + + +def parse_size(size_hex): + if size_hex == '0xffffffff': + return "unknown" + return size_hex + " octal: " + str(int(size_hex, 0)) + + +def parse_status(status_hex): + return f"{STATUS[status_hex]} ({status_hex})" if status_hex in STATUS else f"INVALID ({status_hex})" + + +def parse_boot_magic(trailer_magic): + magic = "" + for i in range(BOOT_MAGIC_SIZE): + magic += "{0:#04x} ".format(trailer_magic[i]) + if i == (BOOT_MAGIC_SIZE / 2 - 1): + magic += ("\n" + " ") + return magic + + +def print_in_frame(header_text, content): + sepc = " " + header = "#### " + header_text + sepc + post_header = "#" * (_LINE_LENGTH - len(header)) + print(header + post_header) + + print("|", sepc * (_LINE_LENGTH - 2), "|", sep="") + offset = (_LINE_LENGTH - len(content)) // 2 + pre = "|" + (sepc * (offset - 1)) + post = sepc * (_LINE_LENGTH - len(pre) - len(content) - 1) + "|" + print(pre, content, post, sep="") + print("|", sepc * (_LINE_LENGTH - 2), "|", sep="") + print("#" * _LINE_LENGTH) + + +def print_in_row(row_text): + row_text = "#### " + row_text + " " + fill = "#" * (_LINE_LENGTH - len(row_text)) + print(row_text + fill) + + +def print_tlv_records(tlv_list): + indent = _LINE_LENGTH // 8 + for tlv in tlv_list: + print(" " * indent, "-" * 45) + tlv_type, tlv_length, tlv_data = tlv.keys() + + if tlv[tlv_type] in TLV_TYPES: + print(" " * indent, "{}: {} ({})".format( + tlv_type, TLV_TYPES[tlv[tlv_type]], hex(tlv[tlv_type]))) + else: + print(" " * indent, "{}: {} ({})".format( + tlv_type, "UNKNOWN", hex(tlv[tlv_type]))) + print(" " * indent, "{}: ".format(tlv_length), hex(tlv[tlv_length])) + print(" " * indent, "{}: ".format(tlv_data), end="") + + for j, data in enumerate(tlv[tlv_data]): + print("{0:#04x}".format(data), end=" ") + if ((j + 1) % 8 == 0) and ((j + 1) != len(tlv[tlv_data])): + print("\n", end=" " * (indent + 7)) + print() + + +def dump_imginfo(imgfile, outfile=None, silent=False): + """Parse a signed image binary and print/save the available information.""" + trailer_magic = None + # set to INVALID by default + swap_size = 0x99 + swap_info = 0x99 + copy_done = 0x99 + image_ok = 0x99 + trailer = {} + key_field_len = None + + try: + with open(imgfile, "rb") as f: + b = f.read() + except FileNotFoundError: + raise click.UsageError("Image file not found ({})".format(imgfile)) + + # Parsing the image header + _header = struct.unpack('IIHHIIBBHI', b[:28]) + # Image version consists of the last 4 item ('BBHI') + _version = _header[-4:] + header = {} + for i, key in enumerate(HEADER_ITEMS): + if key == "version": + header[key] = "{}.{}.{}+{}".format(*_version) + else: + header[key] = _header[i] + + # Parsing the TLV area + tlv_area = {"tlv_hdr_prot": {}, + "tlvs_prot": [], + "tlv_hdr": {}, + "tlvs": []} + tlv_off = header["hdr_size"] + header["img_size"] + protected_tlv_size = header["protected_tlv_size"] + + if protected_tlv_size != 0: + _tlv_prot_head = struct.unpack( + 'HH', + b[tlv_off:(tlv_off + image.TLV_INFO_SIZE)]) + tlv_area["tlv_hdr_prot"]["magic"] = _tlv_prot_head[0] + tlv_area["tlv_hdr_prot"]["tlv_tot"] = _tlv_prot_head[1] + tlv_end = tlv_off + tlv_area["tlv_hdr_prot"]["tlv_tot"] + tlv_off += image.TLV_INFO_SIZE + + # Iterating through the protected TLV area + while tlv_off < tlv_end: + tlv_type, tlv_len = struct.unpack( + 'HH', + b[tlv_off:(tlv_off + image.TLV_INFO_SIZE)]) + tlv_off += image.TLV_INFO_SIZE + tlv_data = b[tlv_off:(tlv_off + tlv_len)] + tlv_area["tlvs_prot"].append( + {"type": tlv_type, "len": tlv_len, "data": tlv_data}) + tlv_off += tlv_len + + _tlv_head = struct.unpack('HH', b[tlv_off:(tlv_off + image.TLV_INFO_SIZE)]) + tlv_area["tlv_hdr"]["magic"] = _tlv_head[0] + tlv_area["tlv_hdr"]["tlv_tot"] = _tlv_head[1] + + tlv_end = tlv_off + tlv_area["tlv_hdr"]["tlv_tot"] + tlv_off += image.TLV_INFO_SIZE + + # Iterating through the TLV area + while tlv_off < tlv_end: + tlv_type, tlv_len = struct.unpack( + 'HH', + b[tlv_off:(tlv_off + image.TLV_INFO_SIZE)]) + tlv_off += image.TLV_INFO_SIZE + tlv_data = b[tlv_off:(tlv_off + tlv_len)] + tlv_area["tlvs"].append( + {"type": tlv_type, "len": tlv_len, "data": tlv_data}) + tlv_off += tlv_len + + _img_pad_size = len(b) - tlv_end + + if _img_pad_size: + # Parsing the image trailer + trailer_off = -BOOT_MAGIC_SIZE + trailer_magic = b[trailer_off:] + trailer["magic"] = trailer_magic + max_align = None + if trailer_magic == BOOT_MAGIC: + # The maximum supported write alignment is the default 8 Bytes + max_align = 8 + elif trailer_magic[-len(BOOT_MAGIC_2):] == BOOT_MAGIC_2: + # The alignment value is encoded in the magic field + max_align = int.from_bytes(trailer_magic[:2], "little") + else: + # Invalid magic: the rest of the image trailer cannot be processed. + print("Warning: the trailer magic value is invalid!") + + if max_align is not None: + if max_align > BOOT_MAGIC_SIZE: + trailer_off -= max_align - BOOT_MAGIC_SIZE + # Parsing rest of the trailer fields + trailer_off -= max_align + image_ok = b[trailer_off] + trailer["image_ok"] = image_ok + + trailer_off -= max_align + copy_done = b[trailer_off] + trailer["copy_done"] = copy_done + + trailer_off -= max_align + swap_info = b[trailer_off] + trailer["swap_info"] = swap_info + + trailer_off -= max_align + swap_size = int.from_bytes(b[trailer_off:(trailer_off + 4)], + "little") + trailer["swap_size"] = swap_size + + # Encryption key 0/1 + if ((header["flags"] & image.IMAGE_F["ENCRYPTED_AES128"]) or + (header["flags"] & image.IMAGE_F["ENCRYPTED_AES256"])): + # The image is encrypted + # Estimated value of key_field_len is correct if + # BOOT_SWAP_SAVE_ENCTLV is unset + key_field_len = image.align_up(16, max_align) * 2 + + # Generating output yaml file + if outfile is not None: + imgdata = {"header": header, + "tlv_area": tlv_area, + "trailer": trailer} + with open(outfile, "w") as outf: + # sort_keys - from pyyaml 5.1 + yaml.dump(imgdata, outf, sort_keys=False) + + ############################################################################### + + if silent: + sys.exit(0) + + print("Printing content of signed image:", os.path.basename(imgfile), "\n") + + # Image header + section_name = "Image header (offset: 0x0)" + print_in_row(section_name) + for key, value in header.items(): + if key == "flags": + if not value: + flag_string = hex(value) + else: + flag_string = "" + for flag in image.IMAGE_F.keys(): + if value & image.IMAGE_F[flag]: + if flag_string: + flag_string += ("\n" + (" " * 20)) + flag_string += "{} ({})".format( + flag, hex(image.IMAGE_F[flag])) + value = flag_string + + if not isinstance(value, str): + value = hex(value) + print(key, ":", " " * (19 - len(key)), value, sep="") + print("#" * _LINE_LENGTH) + + # Image payload + _sectionoff = header["hdr_size"] + frame_header_text = "Payload (offset: {})".format(hex(_sectionoff)) + frame_content = "FW image (size: {} Bytes)".format(hex(header["img_size"])) + print_in_frame(frame_header_text, frame_content) + + # TLV area + _sectionoff += header["img_size"] + if protected_tlv_size != 0: + # Protected TLV area + section_name = "Protected TLV area (offset: {})".format(hex(_sectionoff)) + print_in_row(section_name) + print("magic: ", hex(tlv_area["tlv_hdr_prot"]["magic"])) + print("area size:", hex(tlv_area["tlv_hdr_prot"]["tlv_tot"])) + print_tlv_records(tlv_area["tlvs_prot"]) + print("#" * _LINE_LENGTH) + + _sectionoff += protected_tlv_size + section_name = "TLV area (offset: {})".format(hex(_sectionoff)) + print_in_row(section_name) + print("magic: ", hex(tlv_area["tlv_hdr"]["magic"])) + print("area size:", hex(tlv_area["tlv_hdr"]["tlv_tot"])) + print_tlv_records(tlv_area["tlvs"]) + print("#" * _LINE_LENGTH) + + if _img_pad_size: + _sectionoff += tlv_area["tlv_hdr"]["tlv_tot"] + _erased_val = b[_sectionoff] + frame_header_text = "Image padding (offset: {})".format(hex(_sectionoff)) + frame_content = "padding ({})".format(hex(_erased_val)) + print_in_frame(frame_header_text, frame_content) + + # Image trailer + section_name = "Image trailer (offset: unknown)" + print_in_row(section_name) + notice = "(Note: some fields may not be used, depending on the update strategy)\n" + notice = '\n'.join(notice[i:i + _LINE_LENGTH] for i in range(0, len(notice), _LINE_LENGTH)) + print(notice) + print("swap status: (len: unknown)") + print("enc. keys: ", parse_enc(key_field_len)) + print("swap size: ", parse_size(hex(swap_size))) + print("swap_info: ", parse_status(hex(swap_info))) + print("copy_done: ", parse_status(hex(copy_done))) + print("image_ok: ", parse_status(hex(image_ok))) + print("boot magic: ", parse_boot_magic(trailer_magic)) + print() + + footer = "End of Image " + print_in_row(footer) diff --git a/bootloader/mcuboot/scripts/imgtool/image.py b/bootloader/mcuboot/scripts/imgtool/image.py new file mode 100644 index 0000000..9946a25 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/image.py @@ -0,0 +1,880 @@ +# Copyright 2018 Nordic Semiconductor ASA +# Copyright 2017-2020 Linaro Limited +# Copyright 2019-2024 Arm Limited +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +""" +Image signing and management. +""" + +from . import version as versmod +from .boot_record import create_sw_component_data +import click +import copy +from enum import Enum +import array +from intelhex import IntelHex +import hashlib +import array +import os.path +import struct +from enum import Enum + +import click +from cryptography.exceptions import InvalidSignature +from cryptography.hazmat.backends import default_backend +from cryptography.hazmat.primitives import hashes, hmac +from cryptography.hazmat.primitives.asymmetric import ec, padding +from cryptography.hazmat.primitives.asymmetric.x25519 import X25519PrivateKey +from cryptography.hazmat.primitives.ciphers import Cipher, algorithms, modes +from cryptography.hazmat.primitives.kdf.hkdf import HKDF +from cryptography.hazmat.primitives.serialization import Encoding, PublicFormat +from intelhex import IntelHex + +from . import version as versmod, keys +from .boot_record import create_sw_component_data +from .keys import rsa, ecdsa, x25519 + +from collections import namedtuple + +IMAGE_MAGIC = 0x96f3b83d +IMAGE_HEADER_SIZE = 32 +BIN_EXT = "bin" +INTEL_HEX_EXT = "hex" +DEFAULT_MAX_SECTORS = 128 +DEFAULT_MAX_ALIGN = 8 +DEP_IMAGES_KEY = "images" +DEP_VERSIONS_KEY = "versions" +MAX_SW_TYPE_LENGTH = 12 # Bytes + +# Image header flags. +IMAGE_F = { + 'PIC': 0x0000001, + 'ENCRYPTED_AES128': 0x0000004, + 'ENCRYPTED_AES256': 0x0000008, + 'NON_BOOTABLE': 0x0000010, + 'RAM_LOAD': 0x0000020, + 'ROM_FIXED': 0x0000100, + 'COMPRESSED_LZMA1': 0x0000200, + 'COMPRESSED_LZMA2': 0x0000400, + 'COMPRESSED_ARM_THUMB': 0x0000800, +} + +TLV_VALUES = { + 'KEYHASH': 0x01, + 'PUBKEY': 0x02, + 'SHA256': 0x10, + 'SHA384': 0x11, + 'SHA512': 0x12, + 'RSA2048': 0x20, + 'ECDSASIG': 0x22, + 'RSA3072': 0x23, + 'ED25519': 0x24, + 'SIG_PURE': 0x25, + 'ENCRSA2048': 0x30, + 'ENCKW': 0x31, + 'ENCEC256': 0x32, + 'ENCX25519': 0x33, + 'DEPENDENCY': 0x40, + 'SEC_CNT': 0x50, + 'BOOT_RECORD': 0x60, + 'DECOMP_SIZE': 0x70, + 'DECOMP_SHA': 0x71, + 'DECOMP_SIGNATURE': 0x72, +} + +TLV_SIZE = 4 +TLV_INFO_SIZE = 4 +TLV_INFO_MAGIC = 0x6907 +TLV_PROT_INFO_MAGIC = 0x6908 + +TLV_VENDOR_RES_MIN = 0x00a0 +TLV_VENDOR_RES_MAX = 0xfffe + +STRUCT_ENDIAN_DICT = { + 'little': '<', + 'big': '>' +} + +VerifyResult = Enum('VerifyResult', + ['OK', 'INVALID_MAGIC', 'INVALID_TLV_INFO_MAGIC', 'INVALID_HASH', 'INVALID_SIGNATURE', + 'KEY_MISMATCH']) + + +def align_up(num, align): + assert (align & (align - 1) == 0) and align != 0 + return (num + (align - 1)) & ~(align - 1) + + +class TLV(): + def __init__(self, endian, magic=TLV_INFO_MAGIC): + self.magic = magic + self.buf = bytearray() + self.endian = endian + + def __len__(self): + return TLV_INFO_SIZE + len(self.buf) + + def add(self, kind, payload): + """ + Add a TLV record. Kind should be a string found in TLV_VALUES above. + """ + e = STRUCT_ENDIAN_DICT[self.endian] + if isinstance(kind, int): + if not TLV_VENDOR_RES_MIN <= kind <= TLV_VENDOR_RES_MAX: + msg = "Invalid custom TLV type value '0x{:04x}', allowed " \ + "value should be between 0x{:04x} and 0x{:04x}".format( + kind, TLV_VENDOR_RES_MIN, TLV_VENDOR_RES_MAX) + raise click.UsageError(msg) + buf = struct.pack(e + 'HH', kind, len(payload)) + else: + buf = struct.pack(e + 'BBH', TLV_VALUES[kind], 0, len(payload)) + self.buf += buf + self.buf += payload + + def get(self): + if len(self.buf) == 0: + return bytes() + e = STRUCT_ENDIAN_DICT[self.endian] + header = struct.pack(e + 'HH', self.magic, len(self)) + return header + bytes(self.buf) + + +SHAAndAlgT = namedtuple('SHAAndAlgT', ['sha', 'alg']) + +TLV_SHA_TO_SHA_AND_ALG = { + TLV_VALUES['SHA256'] : SHAAndAlgT('256', hashlib.sha256), + TLV_VALUES['SHA384'] : SHAAndAlgT('384', hashlib.sha384), + TLV_VALUES['SHA512'] : SHAAndAlgT('512', hashlib.sha512), +} + + +USER_SHA_TO_ALG_AND_TLV = { + 'auto' : (hashlib.sha256, 'SHA256'), + '256' : (hashlib.sha256, 'SHA256'), + '384' : (hashlib.sha384, 'SHA384'), + '512' : (hashlib.sha512, 'SHA512') +} + + +def is_sha_tlv(tlv): + return tlv in TLV_SHA_TO_SHA_AND_ALG.keys() + + +def tlv_sha_to_sha(tlv): + return TLV_SHA_TO_SHA_AND_ALG[tlv].sha + + +# Auto selecting hash algorithm for type(key) +ALLOWED_KEY_SHA = { + keys.ECDSA384P1 : ['384'], + keys.ECDSA384P1Public : ['384'], + keys.ECDSA256P1 : ['256'], + keys.RSA : ['256'], + # This two are set to 256 for compatibility, the right would be 512 + keys.Ed25519 : ['256', '512'], + keys.X25519 : ['256', '512'] +} + +ALLOWED_PURE_KEY_SHA = { + keys.Ed25519 : ['512'] +} + +ALLOWED_PURE_SIG_TLVS = [ + TLV_VALUES['ED25519'] +] + +def key_and_user_sha_to_alg_and_tlv(key, user_sha, is_pure = False): + """Matches key and user requested sha to sha alogrithm and TLV name. + + The returned tuple will contain hash functions and TVL name. + The function is designed to succeed or completely fail execution, + as providing incorrect pair here basically prevents doing + any more work. + """ + if key is None: + # If key is none, we allow whatever user has selected for sha + return USER_SHA_TO_ALG_AND_TLV[user_sha] + + # If key is not None, then we have to filter hash to only allowed + allowed = None + allowed_key_ssh = ALLOWED_PURE_KEY_SHA if is_pure else ALLOWED_KEY_SHA + try: + allowed = allowed_key_ssh[type(key)] + + except KeyError: + raise click.UsageError("Colud not find allowed hash algorithms for {}" + .format(type(key))) + + # Pure enforces auto, and user selection is ignored + if user_sha == 'auto' or is_pure: + return USER_SHA_TO_ALG_AND_TLV[allowed[0]] + + if user_sha in allowed: + return USER_SHA_TO_ALG_AND_TLV[user_sha] + + raise click.UsageError("Key {} can not be used with --sha {}; allowed sha are one of {}" + .format(key.sig_type(), user_sha, allowed)) + + +def get_digest(tlv_type, hash_region): + sha = TLV_SHA_TO_SHA_AND_ALG[tlv_type].alg() + + sha.update(hash_region) + return sha.digest() + + +def tlv_matches_key_type(tlv_type, key): + """Check if provided key matches to TLV record in the image""" + try: + # We do not need the result here, and the key_and_user_sha_to_alg_and_tlv + # will either succeed finding match or rise exception, so on success we + # return True, on exception we return False. + _, _ = key_and_user_sha_to_alg_and_tlv(key, tlv_sha_to_sha(tlv_type)) + return True + except: + pass + + return False + + +class Image: + + def __init__(self, version=None, header_size=IMAGE_HEADER_SIZE, + pad_header=False, pad=False, confirm=False, align=1, + slot_size=0, max_sectors=DEFAULT_MAX_SECTORS, + overwrite_only=False, endian="little", load_addr=0, + rom_fixed=None, erased_val=None, save_enctlv=False, + security_counter=None, max_align=None, + non_bootable=False): + + if load_addr and rom_fixed: + raise click.UsageError("Can not set rom_fixed and load_addr at the same time") + + self.image_hash = None + self.image_size = None + self.signature = None + self.version = version or versmod.decode_version("0") + self.header_size = header_size + self.pad_header = pad_header + self.pad = pad + self.confirm = confirm + self.align = align + self.slot_size = slot_size + self.max_sectors = max_sectors + self.overwrite_only = overwrite_only + self.endian = endian + self.base_addr = None + self.load_addr = 0 if load_addr is None else load_addr + self.rom_fixed = rom_fixed + self.erased_val = 0xff if erased_val is None else int(erased_val, 0) + self.payload = [] + self.infile_data = [] + self.enckey = None + self.save_enctlv = save_enctlv + self.enctlv_len = 0 + self.max_align = max(DEFAULT_MAX_ALIGN, align) if max_align is None else int(max_align) + self.non_bootable = non_bootable + + if self.max_align == DEFAULT_MAX_ALIGN: + self.boot_magic = bytes([ + 0x77, 0xc2, 0x95, 0xf3, + 0x60, 0xd2, 0xef, 0x7f, + 0x35, 0x52, 0x50, 0x0f, + 0x2c, 0xb6, 0x79, 0x80, ]) + else: + lsb = self.max_align & 0x00ff + msb = (self.max_align & 0xff00) >> 8 + align = bytes([msb, lsb]) if self.endian == "big" else bytes([lsb, msb]) + self.boot_magic = align + bytes([0x2d, 0xe1, + 0x5d, 0x29, 0x41, 0x0b, + 0x8d, 0x77, 0x67, 0x9c, + 0x11, 0x0f, 0x1f, 0x8a, ]) + + if security_counter == 'auto': + # Security counter has not been explicitly provided, + # generate it from the version number + self.security_counter = ((self.version.major << 24) + + (self.version.minor << 16) + + self.version.revision) + else: + self.security_counter = security_counter + + def __repr__(self): + return "".format( + self.version, + self.header_size, + self.security_counter, + self.base_addr if self.base_addr is not None else "N/A", + self.load_addr, + self.align, + self.slot_size, + self.max_sectors, + self.overwrite_only, + self.endian, + self.__class__.__name__, + len(self.payload)) + + def load(self, path): + """Load an image from a given file""" + ext = os.path.splitext(path)[1][1:].lower() + try: + if ext == INTEL_HEX_EXT: + ih = IntelHex(path) + self.infile_data = ih.tobinarray() + self.payload = copy.copy(self.infile_data) + self.base_addr = ih.minaddr() + else: + with open(path, 'rb') as f: + self.infile_data = f.read() + self.payload = copy.copy(self.infile_data) + except FileNotFoundError: + raise click.UsageError("Input file not found") + self.image_size = len(self.payload) + + # Add the image header if needed. + if self.pad_header and self.header_size > 0: + if self.base_addr: + # Adjust base_addr for new header + self.base_addr -= self.header_size + self.payload = bytes([self.erased_val] * self.header_size) + \ + self.payload + + self.check_header() + + def load_compressed(self, data, compression_header): + """Load an image from buffer""" + self.payload = compression_header + data + self.image_size = len(self.payload) + + # Add the image header if needed. + if self.pad_header and self.header_size > 0: + if self.base_addr: + # Adjust base_addr for new header + self.base_addr -= self.header_size + self.payload = bytes([self.erased_val] * self.header_size) + \ + self.payload + + self.check_header() + + def save(self, path, hex_addr=None): + """Save an image from a given file""" + ext = os.path.splitext(path)[1][1:].lower() + if ext == INTEL_HEX_EXT: + # input was in binary format, but HEX needs to know the base addr + if self.base_addr is None and hex_addr is None: + raise click.UsageError("No address exists in input file " + "neither was it provided by user") + h = IntelHex() + if hex_addr is not None: + self.base_addr = hex_addr + h.frombytes(bytes=self.payload, offset=self.base_addr) + if self.pad: + trailer_size = self._trailer_size(self.align, self.max_sectors, + self.overwrite_only, + self.enckey, + self.save_enctlv, + self.enctlv_len) + trailer_addr = (self.base_addr + self.slot_size) - trailer_size + if self.confirm and not self.overwrite_only: + magic_align_size = align_up(len(self.boot_magic), + self.max_align) + image_ok_idx = -(magic_align_size + self.max_align) + flag = bytearray([self.erased_val] * self.max_align) + flag[0] = 0x01 # image_ok = 0x01 + h.puts(trailer_addr + trailer_size + image_ok_idx, + bytes(flag)) + h.puts(trailer_addr + (trailer_size - len(self.boot_magic)), + bytes(self.boot_magic)) + h.tofile(path, 'hex') + else: + if self.pad: + self.pad_to(self.slot_size) + with open(path, 'wb') as f: + f.write(self.payload) + + def check_header(self): + if self.header_size > 0 and not self.pad_header: + if any(v != 0 for v in self.payload[0:self.header_size]): + raise click.UsageError("Header padding was not requested and " + "image does not start with zeros") + + def check_trailer(self): + if self.slot_size > 0: + tsize = self._trailer_size(self.align, self.max_sectors, + self.overwrite_only, self.enckey, + self.save_enctlv, self.enctlv_len) + padding = self.slot_size - (len(self.payload) + tsize) + if padding < 0: + msg = "Image size (0x{:x}) + trailer (0x{:x}) exceeds " \ + "requested size 0x{:x}".format( + len(self.payload), tsize, self.slot_size) + raise click.UsageError(msg) + + def ecies_hkdf(self, enckey, plainkey): + if isinstance(enckey, ecdsa.ECDSA256P1Public): + newpk = ec.generate_private_key(ec.SECP256R1(), default_backend()) + shared = newpk.exchange(ec.ECDH(), enckey._get_public()) + else: + newpk = X25519PrivateKey.generate() + shared = newpk.exchange(enckey._get_public()) + derived_key = HKDF( + algorithm=hashes.SHA256(), length=48, salt=None, + info=b'MCUBoot_ECIES_v1', backend=default_backend()).derive(shared) + encryptor = Cipher(algorithms.AES(derived_key[:16]), + modes.CTR(bytes([0] * 16)), + backend=default_backend()).encryptor() + cipherkey = encryptor.update(plainkey) + encryptor.finalize() + mac = hmac.HMAC(derived_key[16:], hashes.SHA256(), + backend=default_backend()) + mac.update(cipherkey) + ciphermac = mac.finalize() + if isinstance(enckey, ecdsa.ECDSA256P1Public): + pubk = newpk.public_key().public_bytes( + encoding=Encoding.X962, + format=PublicFormat.UncompressedPoint) + else: + pubk = newpk.public_key().public_bytes( + encoding=Encoding.Raw, + format=PublicFormat.Raw) + return cipherkey, ciphermac, pubk + + def create(self, key, public_key_format, enckey, dependencies=None, + sw_type=None, custom_tlvs=None, compression_tlvs=None, + compression_type=None, encrypt_keylen=128, clear=False, + fixed_sig=None, pub_key=None, vector_to_sign=None, + user_sha='auto', is_pure=False): + self.enckey = enckey + + # key decides on sha, then pub_key; of both are none default is used + check_key = key if key is not None else pub_key + hash_algorithm, hash_tlv = key_and_user_sha_to_alg_and_tlv(check_key, user_sha, is_pure) + + # Calculate the hash of the public key + if key is not None: + pub = key.get_public_bytes() + sha = hash_algorithm() + sha.update(pub) + pubbytes = sha.digest() + elif pub_key is not None: + if hasattr(pub_key, 'sign'): + print(os.path.basename(__file__) + ": sign the payload") + pub = pub_key.get_public_bytes() + sha = hash_algorithm() + sha.update(pub) + pubbytes = sha.digest() + else: + pubbytes = bytes(hashlib.sha256().digest_size) + + protected_tlv_size = 0 + + if self.security_counter is not None: + # Size of the security counter TLV: header ('HH') + payload ('I') + # = 4 + 4 = 8 Bytes + protected_tlv_size += TLV_SIZE + 4 + + if sw_type is not None: + if len(sw_type) > MAX_SW_TYPE_LENGTH: + msg = "'{}' is too long ({} characters) for sw_type. Its " \ + "maximum allowed length is 12 characters.".format( + sw_type, len(sw_type)) + raise click.UsageError(msg) + + image_version = (str(self.version.major) + '.' + + str(self.version.minor) + '.' + + str(self.version.revision)) + + # The image hash is computed over the image header, the image + # itself and the protected TLV area. However, the boot record TLV + # (which is part of the protected area) should contain this hash + # before it is even calculated. For this reason the script fills + # this field with zeros and the bootloader will insert the right + # value later. + digest = bytes(hash_algorithm().digest_size) + + # Create CBOR encoded boot record + boot_record = create_sw_component_data(sw_type, image_version, + hash_tlv, digest, + pubbytes) + + protected_tlv_size += TLV_SIZE + len(boot_record) + + if dependencies is not None: + # Size of a Dependency TLV = Header ('HH') + Payload('IBBHI') + # = 4 + 12 = 16 Bytes + dependencies_num = len(dependencies[DEP_IMAGES_KEY]) + protected_tlv_size += (dependencies_num * 16) + + if compression_tlvs is not None: + for value in compression_tlvs.values(): + protected_tlv_size += TLV_SIZE + len(value) + if custom_tlvs is not None: + for value in custom_tlvs.values(): + protected_tlv_size += TLV_SIZE + len(value) + + if protected_tlv_size != 0: + # Add the size of the TLV info header + protected_tlv_size += TLV_INFO_SIZE + + # At this point the image is already on the payload + # + # This adds the padding if image is not aligned to the 16 Bytes + # in encrypted mode + if self.enckey is not None: + pad_len = len(self.payload) % 16 + if pad_len > 0: + pad = bytes(16 - pad_len) + if isinstance(self.payload, bytes): + self.payload += pad + else: + self.payload.extend(pad) + + compression_flags = 0x0 + if compression_tlvs is not None: + if compression_type in ["lzma2", "lzma2armthumb"]: + compression_flags = IMAGE_F['COMPRESSED_LZMA2'] + if compression_type == "lzma2armthumb": + compression_flags |= IMAGE_F['COMPRESSED_ARM_THUMB'] + # This adds the header to the payload as well + if encrypt_keylen == 256: + self.add_header(enckey, protected_tlv_size, compression_flags, 256) + else: + self.add_header(enckey, protected_tlv_size, compression_flags) + + prot_tlv = TLV(self.endian, TLV_PROT_INFO_MAGIC) + + # Protected TLVs must be added first, because they are also included + # in the hash calculation + protected_tlv_off = None + if protected_tlv_size != 0: + + e = STRUCT_ENDIAN_DICT[self.endian] + + if self.security_counter is not None: + payload = struct.pack(e + 'I', self.security_counter) + prot_tlv.add('SEC_CNT', payload) + + if sw_type is not None: + prot_tlv.add('BOOT_RECORD', boot_record) + + if dependencies is not None: + for i in range(dependencies_num): + payload = struct.pack( + e + 'B3x' + 'BBHI', + int(dependencies[DEP_IMAGES_KEY][i]), + dependencies[DEP_VERSIONS_KEY][i].major, + dependencies[DEP_VERSIONS_KEY][i].minor, + dependencies[DEP_VERSIONS_KEY][i].revision, + dependencies[DEP_VERSIONS_KEY][i].build + ) + prot_tlv.add('DEPENDENCY', payload) + + if compression_tlvs is not None: + for tag, value in compression_tlvs.items(): + prot_tlv.add(tag, value) + if custom_tlvs is not None: + for tag, value in custom_tlvs.items(): + prot_tlv.add(tag, value) + + protected_tlv_off = len(self.payload) + self.payload += prot_tlv.get() + + tlv = TLV(self.endian) + + # These signature is done over sha of image. In case of + # EC signatures so called Pure algorithm, designated to be run + # over entire message is used with sha of image as message, + # so, for example, in case of ED25519 we have here SHAxxx-ED25519-SHA512. + sha = hash_algorithm() + sha.update(self.payload) + digest = sha.digest() + tlv.add(hash_tlv, digest) + # for external usage + self.image_hash = digest + # Unless pure, we are signing digest. + message = digest + + if is_pure: + # Note that when Pure signature is used, hash TLV is not present. + message = bytes(self.payload) + e = STRUCT_ENDIAN_DICT[self.endian] + sig_pure = struct.pack(e + '?', True) + tlv.add('SIG_PURE', sig_pure) + + if vector_to_sign == 'payload': + # Stop amending data to the image + # Just keep data vector which is expected to be signed + print(os.path.basename(__file__) + ': export payload') + return + elif vector_to_sign == 'digest': + self.payload = digest + print(os.path.basename(__file__) + ': export digest') + return + + if key is not None or fixed_sig is not None: + if public_key_format == 'hash': + tlv.add('KEYHASH', pubbytes) + else: + tlv.add('PUBKEY', pub) + + if key is not None and fixed_sig is None: + # `sign` expects the full image payload (hashing done + # internally), while `sign_digest` expects only the digest + # of the payload + + if hasattr(key, 'sign'): + print(os.path.basename(__file__) + ": sign the payload") + sig = key.sign(bytes(self.payload)) + else: + print(os.path.basename(__file__) + ": sign the digest") + sig = key.sign_digest(message) + tlv.add(key.sig_tlv(), sig) + self.signature = sig + elif fixed_sig is not None and key is None: + tlv.add(pub_key.sig_tlv(), fixed_sig['value']) + self.signature = fixed_sig['value'] + else: + raise click.UsageError("Can not sign using key and provide fixed-signature at the same time") + + # At this point the image was hashed + signed, we can remove the + # protected TLVs from the payload (will be re-added later) + if protected_tlv_off is not None: + self.payload = self.payload[:protected_tlv_off] + + if enckey is not None: + if encrypt_keylen == 256: + plainkey = os.urandom(32) + else: + plainkey = os.urandom(16) + + if isinstance(enckey, rsa.RSAPublic): + cipherkey = enckey._get_public().encrypt( + plainkey, padding.OAEP( + mgf=padding.MGF1(algorithm=hashes.SHA256()), + algorithm=hashes.SHA256(), + label=None)) + self.enctlv_len = len(cipherkey) + tlv.add('ENCRSA2048', cipherkey) + elif isinstance(enckey, (ecdsa.ECDSA256P1Public, + x25519.X25519Public)): + cipherkey, mac, pubk = self.ecies_hkdf(enckey, plainkey) + enctlv = pubk + mac + cipherkey + self.enctlv_len = len(enctlv) + if isinstance(enckey, ecdsa.ECDSA256P1Public): + tlv.add('ENCEC256', enctlv) + else: + tlv.add('ENCX25519', enctlv) + + if not clear: + nonce = bytes([0] * 16) + cipher = Cipher(algorithms.AES(plainkey), modes.CTR(nonce), + backend=default_backend()) + encryptor = cipher.encryptor() + img = bytes(self.payload[self.header_size:]) + self.payload[self.header_size:] = \ + encryptor.update(img) + encryptor.finalize() + + self.payload += prot_tlv.get() + self.payload += tlv.get() + + self.check_trailer() + + def get_struct_endian(self): + return STRUCT_ENDIAN_DICT[self.endian] + + def get_signature(self): + return self.signature + + def get_infile_data(self): + return self.infile_data + + def add_header(self, enckey, protected_tlv_size, compression_flags, aes_length=128): + """Install the image header.""" + + flags = 0 + if enckey is not None: + if aes_length == 128: + flags |= IMAGE_F['ENCRYPTED_AES128'] + else: + flags |= IMAGE_F['ENCRYPTED_AES256'] + if self.load_addr != 0: + # Indicates that this image should be loaded into RAM + # instead of run directly from flash. + flags |= IMAGE_F['RAM_LOAD'] + if self.rom_fixed: + flags |= IMAGE_F['ROM_FIXED'] + if self.non_bootable: + flags |= IMAGE_F['NON_BOOTABLE'] + + e = STRUCT_ENDIAN_DICT[self.endian] + fmt = (e + + # type ImageHdr struct { + 'I' + # Magic uint32 + 'I' + # LoadAddr uint32 + 'H' + # HdrSz uint16 + 'H' + # PTLVSz uint16 + 'I' + # ImgSz uint32 + 'I' + # Flags uint32 + 'BBHI' + # Vers ImageVersion + 'I' # Pad1 uint32 + ) # } + assert struct.calcsize(fmt) == IMAGE_HEADER_SIZE + header = struct.pack(fmt, + IMAGE_MAGIC, + self.rom_fixed or self.load_addr, + self.header_size, + protected_tlv_size, # TLV Info header + + # Protected TLVs + len(self.payload) - self.header_size, # ImageSz + flags | compression_flags, + self.version.major, + self.version.minor or 0, + self.version.revision or 0, + self.version.build or 0, + 0) # Pad1 + self.payload = bytearray(self.payload) + self.payload[:len(header)] = header + + def _trailer_size(self, write_size, max_sectors, overwrite_only, enckey, + save_enctlv, enctlv_len): + # NOTE: should already be checked by the argument parser + magic_size = 16 + magic_align_size = align_up(magic_size, self.max_align) + if overwrite_only: + return self.max_align * 2 + magic_align_size + else: + if write_size not in set([1, 2, 4, 8, 16, 32]): + raise click.BadParameter("Invalid alignment: {}".format( + write_size)) + m = DEFAULT_MAX_SECTORS if max_sectors is None else max_sectors + trailer = m * 3 * write_size # status area + if enckey is not None: + if save_enctlv: + # TLV saved by the bootloader is aligned + keylen = align_up(enctlv_len, self.max_align) + else: + keylen = align_up(16, self.max_align) + trailer += keylen * 2 # encryption keys + trailer += self.max_align * 4 # image_ok/copy_done/swap_info/swap_size + trailer += magic_align_size + return trailer + + def pad_to(self, size): + """Pad the image to the given size, with the given flash alignment.""" + tsize = self._trailer_size(self.align, self.max_sectors, + self.overwrite_only, self.enckey, + self.save_enctlv, self.enctlv_len) + padding = size - (len(self.payload) + tsize) + pbytes = bytearray([self.erased_val] * padding) + pbytes += bytearray([self.erased_val] * (tsize - len(self.boot_magic))) + pbytes += self.boot_magic + if self.confirm and not self.overwrite_only: + magic_size = 16 + magic_align_size = align_up(magic_size, self.max_align) + image_ok_idx = -(magic_align_size + self.max_align) + pbytes[image_ok_idx] = 0x01 # image_ok = 0x01 + self.payload += pbytes + + @staticmethod + def verify(imgfile, key): + ext = os.path.splitext(imgfile)[1][1:].lower() + try: + if ext == INTEL_HEX_EXT: + b = IntelHex(imgfile).tobinstr() + else: + with open(imgfile, 'rb') as f: + b = f.read() + except FileNotFoundError: + raise click.UsageError(f"Image file {imgfile} not found") + + magic, _, header_size, _, img_size = struct.unpack('IIHHI', b[:16]) + version = struct.unpack('BBHI', b[20:28]) + + if magic != IMAGE_MAGIC: + return VerifyResult.INVALID_MAGIC, None, None, None + + tlv_off = header_size + img_size + tlv_info = b[tlv_off:tlv_off + TLV_INFO_SIZE] + magic, tlv_tot = struct.unpack('HH', tlv_info) + if magic == TLV_PROT_INFO_MAGIC: + tlv_off += tlv_tot + tlv_info = b[tlv_off:tlv_off + TLV_INFO_SIZE] + magic, tlv_tot = struct.unpack('HH', tlv_info) + + if magic != TLV_INFO_MAGIC: + return VerifyResult.INVALID_TLV_INFO_MAGIC, None, None, None + + # This is set by existence of TLV SIG_PURE + is_pure = False + + prot_tlv_size = tlv_off + hash_region = b[:prot_tlv_size] + tlv_end = tlv_off + tlv_tot + tlv_off += TLV_INFO_SIZE # skip tlv info + + # First scan all TLVs in search of SIG_PURE + while tlv_off < tlv_end: + tlv = b[tlv_off:tlv_off + TLV_SIZE] + tlv_type, _, tlv_len = struct.unpack('BBH', tlv) + if tlv_type == TLV_VALUES['SIG_PURE']: + is_pure = True + break + tlv_off += TLV_SIZE + tlv_len + + digest = None + tlv_off = header_size + img_size + tlv_end = tlv_off + tlv_tot + tlv_off += TLV_INFO_SIZE # skip tlv info + while tlv_off < tlv_end: + tlv = b[tlv_off:tlv_off + TLV_SIZE] + tlv_type, _, tlv_len = struct.unpack('BBH', tlv) + if is_sha_tlv(tlv_type): + if not tlv_matches_key_type(tlv_type, key): + return VerifyResult.KEY_MISMATCH, None, None, None + off = tlv_off + TLV_SIZE + digest = get_digest(tlv_type, hash_region) + if digest == b[off:off + tlv_len]: + if key is None: + return VerifyResult.OK, version, digest, None + else: + return VerifyResult.INVALID_HASH, None, None, None + elif not is_pure and key is not None and tlv_type == TLV_VALUES[key.sig_tlv()]: + off = tlv_off + TLV_SIZE + tlv_sig = b[off:off + tlv_len] + payload = b[:prot_tlv_size] + try: + if hasattr(key, 'verify'): + key.verify(tlv_sig, payload) + else: + key.verify_digest(tlv_sig, digest) + return VerifyResult.OK, version, digest, None + except InvalidSignature: + # continue to next TLV + pass + elif is_pure and key is not None and tlv_type in ALLOWED_PURE_SIG_TLVS: + off = tlv_off + TLV_SIZE + tlv_sig = b[off:off + tlv_len] + try: + key.verify_digest(tlv_sig, hash_region) + return VerifyResult.OK, version, None, tlv_sig + except InvalidSignature: + # continue to next TLV + pass + tlv_off += TLV_SIZE + tlv_len + return VerifyResult.INVALID_SIGNATURE, None, None, None diff --git a/bootloader/mcuboot/scripts/imgtool/keys/__init__.py b/bootloader/mcuboot/scripts/imgtool/keys/__init__.py new file mode 100644 index 0000000..ed2fed5 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/keys/__init__.py @@ -0,0 +1,105 @@ +# Copyright 2017 Linaro Limited +# Copyright 2023 Arm Limited +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +""" +Cryptographic key management for imgtool. +""" + +from cryptography.hazmat.backends import default_backend +from cryptography.hazmat.primitives import serialization +from cryptography.hazmat.primitives.asymmetric.rsa import ( + RSAPrivateKey, RSAPublicKey) +from cryptography.hazmat.primitives.asymmetric.ec import ( + EllipticCurvePrivateKey, EllipticCurvePublicKey) +from cryptography.hazmat.primitives.asymmetric.ed25519 import ( + Ed25519PrivateKey, Ed25519PublicKey) +from cryptography.hazmat.primitives.asymmetric.x25519 import ( + X25519PrivateKey, X25519PublicKey) + +from .rsa import RSA, RSAPublic, RSAUsageError, RSA_KEY_SIZES +from .ecdsa import (ECDSA256P1, ECDSA256P1Public, + ECDSA384P1, ECDSA384P1Public, ECDSAUsageError) +from .ed25519 import Ed25519, Ed25519Public, Ed25519UsageError +from .x25519 import X25519, X25519Public, X25519UsageError + + +class PasswordRequired(Exception): + """Raised to indicate that the key is password protected, but a + password was not specified.""" + pass + + +def load(path, passwd=None): + """Try loading a key from the given path. + Returns None if the password wasn't specified.""" + with open(path, 'rb') as f: + raw_pem = f.read() + try: + pk = serialization.load_pem_private_key( + raw_pem, + password=passwd, + backend=default_backend()) + # Unfortunately, the crypto library raises unhelpful exceptions, + # so we have to look at the text. + except TypeError as e: + msg = str(e) + if "private key is encrypted" in msg: + return None + raise e + except ValueError: + # This seems to happen if the key is a public key, let's try + # loading it as a public key. + pk = serialization.load_pem_public_key( + raw_pem, + backend=default_backend()) + + if isinstance(pk, RSAPrivateKey): + if pk.key_size not in RSA_KEY_SIZES: + raise Exception("Unsupported RSA key size: " + pk.key_size) + return RSA(pk) + elif isinstance(pk, RSAPublicKey): + if pk.key_size not in RSA_KEY_SIZES: + raise Exception("Unsupported RSA key size: " + pk.key_size) + return RSAPublic(pk) + elif isinstance(pk, EllipticCurvePrivateKey): + if pk.curve.name not in ('secp256r1', 'secp384r1'): + raise Exception("Unsupported EC curve: " + pk.curve.name) + if pk.key_size not in (256, 384): + raise Exception("Unsupported EC size: " + pk.key_size) + if pk.curve.name == 'secp256r1': + return ECDSA256P1(pk) + elif pk.curve.name == 'secp384r1': + return ECDSA384P1(pk) + elif isinstance(pk, EllipticCurvePublicKey): + if pk.curve.name not in ('secp256r1', 'secp384r1'): + raise Exception("Unsupported EC curve: " + pk.curve.name) + if pk.key_size not in (256, 384): + raise Exception("Unsupported EC size: " + pk.key_size) + if pk.curve.name == 'secp256r1': + return ECDSA256P1Public(pk) + elif pk.curve.name == 'secp384r1': + return ECDSA384P1Public(pk) + elif isinstance(pk, Ed25519PrivateKey): + return Ed25519(pk) + elif isinstance(pk, Ed25519PublicKey): + return Ed25519Public(pk) + elif isinstance(pk, X25519PrivateKey): + return X25519(pk) + elif isinstance(pk, X25519PublicKey): + return X25519Public(pk) + else: + raise Exception("Unknown key type: " + str(type(pk))) diff --git a/bootloader/mcuboot/scripts/imgtool/keys/ecdsa.py b/bootloader/mcuboot/scripts/imgtool/keys/ecdsa.py new file mode 100644 index 0000000..52357b1 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/keys/ecdsa.py @@ -0,0 +1,289 @@ +""" +ECDSA key management +""" + +# SPDX-License-Identifier: Apache-2.0 +import os.path +import hashlib + +from cryptography.hazmat.backends import default_backend +from cryptography.hazmat.primitives import serialization +from cryptography.hazmat.primitives.asymmetric import ec +from cryptography.hazmat.primitives.hashes import SHA256, SHA384 + +from .general import KeyClass +from .privatebytes import PrivateBytesMixin + + +class ECDSAUsageError(Exception): + pass + + +class ECDSAPublicKey(KeyClass): + """ + Wrapper around an ECDSA public key. + """ + def __init__(self, key): + self.key = key + + def _unsupported(self, name): + raise ECDSAUsageError("Operation {} requires private key".format(name)) + + def _get_public(self): + return self.key + + def get_public_bytes(self): + # The key is embedded into MBUboot in "SubjectPublicKeyInfo" format + return self._get_public().public_bytes( + encoding=serialization.Encoding.DER, + format=serialization.PublicFormat.SubjectPublicKeyInfo) + + def get_public_pem(self): + return self._get_public().public_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PublicFormat.SubjectPublicKeyInfo) + + def get_private_bytes(self, minimal, format): + self._unsupported('get_private_bytes') + + def export_private(self, path, passwd=None): + self._unsupported('export_private') + + def export_public(self, path): + """Write the public key to the given file.""" + pem = self._get_public().public_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PublicFormat.SubjectPublicKeyInfo) + with open(path, 'wb') as f: + f.write(pem) + + +class ECDSAPrivateKey(PrivateBytesMixin): + """ + Wrapper around an ECDSA private key. + """ + def __init__(self, key): + self.key = key + + def _get_public(self): + return self.key.public_key() + + def _build_minimal_ecdsa_privkey(self, der, format): + ''' + Builds a new DER that only includes the EC private key, removing the + public key that is added as an "optional" BITSTRING. + ''' + + if format == serialization.PrivateFormat.OpenSSH: + print(os.path.basename(__file__) + + ': Warning: --minimal is supported only for PKCS8 ' + 'or TraditionalOpenSSL formats') + return bytearray(der) + + EXCEPTION_TEXT = "Error parsing ecdsa key. Please submit an issue!" + if format == serialization.PrivateFormat.PKCS8: + offset_PUB = 68 # where the context specific TLV starts (tag 0xA1) + if der[offset_PUB] != 0xa1: + raise ECDSAUsageError(EXCEPTION_TEXT) + len_PUB = der[offset_PUB + 1] + 2 # + 2 for 0xA1 0x44 bytes + b = bytearray(der[:offset_PUB]) # remove the TLV with the PUB key + offset_SEQ = 29 + if b[offset_SEQ] != 0x30: + raise ECDSAUsageError(EXCEPTION_TEXT) + b[offset_SEQ + 1] -= len_PUB + offset_OCT_STR = 27 + if b[offset_OCT_STR] != 0x04: + raise ECDSAUsageError(EXCEPTION_TEXT) + b[offset_OCT_STR + 1] -= len_PUB + if b[0] != 0x30 or b[1] != 0x81: + raise ECDSAUsageError(EXCEPTION_TEXT) + # as b[1] has bit7 set, the length is on b[2] + b[2] -= len_PUB + if b[2] < 0x80: + del(b[1]) + + elif format == serialization.PrivateFormat.TraditionalOpenSSL: + offset_PUB = 51 + if der[offset_PUB] != 0xA1: + raise ECDSAUsageError(EXCEPTION_TEXT) + len_PUB = der[offset_PUB + 1] + 2 + b = bytearray(der[0:offset_PUB]) + b[1] -= len_PUB + + return b + + _VALID_FORMATS = { + 'pkcs8': serialization.PrivateFormat.PKCS8, + 'openssl': serialization.PrivateFormat.TraditionalOpenSSL + } + _DEFAULT_FORMAT = 'pkcs8' + + def get_private_bytes(self, minimal, format): + format, priv = self._get_private_bytes(minimal, + format, ECDSAUsageError) + if minimal: + priv = self._build_minimal_ecdsa_privkey( + priv, self._VALID_FORMATS[format]) + return priv + + def export_private(self, path, passwd=None): + """Write the private key to the given file, protecting it with ' + 'the optional password.""" + if passwd is None: + enc = serialization.NoEncryption() + else: + enc = serialization.BestAvailableEncryption(passwd) + pem = self.key.private_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PrivateFormat.PKCS8, + encryption_algorithm=enc) + with open(path, 'wb') as f: + f.write(pem) + + +class ECDSA256P1Public(ECDSAPublicKey): + """ + Wrapper around an ECDSA (p256) public key. + """ + def __init__(self, key): + super().__init__(key) + self.key = key + + def shortname(self): + return "ecdsa" + + def sig_type(self): + return "ECDSA256_SHA256" + + def sig_tlv(self): + return "ECDSASIG" + + def sig_len(self): + # Early versions of MCUboot (< v1.5.0) required ECDSA + # signatures to be padded to 72 bytes. Because the DER + # encoding is done with signed integers, the size of the + # signature will vary depending on whether the high bit is set + # in each value. This padding was done in a + # not-easily-reversible way (by just adding zeros). + # + # The signing code no longer requires this padding, and newer + # versions of MCUboot don't require it. But, continue to + # return the total length so that the padding can be done if + # requested. + return 72 + + def verify(self, signature, payload): + # strip possible paddings added during sign + signature = signature[:signature[1] + 2] + k = self.key + if isinstance(self.key, ec.EllipticCurvePrivateKey): + k = self.key.public_key() + return k.verify(signature=signature, data=payload, + signature_algorithm=ec.ECDSA(SHA256())) + + +class ECDSA256P1(ECDSAPrivateKey, ECDSA256P1Public): + """ + Wrapper around an ECDSA (p256) private key. + """ + def __init__(self, key): + super().__init__(key) + self.key = key + self.pad_sig = False + + @staticmethod + def generate(): + pk = ec.generate_private_key( + ec.SECP256R1(), + backend=default_backend()) + return ECDSA256P1(pk) + + def raw_sign(self, payload): + """Return the actual signature""" + return self.key.sign( + data=payload, + signature_algorithm=ec.ECDSA(SHA256())) + + def sign(self, payload): + sig = self.raw_sign(payload) + if self.pad_sig: + # To make fixed length, pad with one or two zeros. + sig += b'\000' * (self.sig_len() - len(sig)) + return sig + else: + return sig + + +class ECDSA384P1Public(ECDSAPublicKey): + """ + Wrapper around an ECDSA (p384) public key. + """ + def __init__(self, key): + super().__init__(key) + self.key = key + + def shortname(self): + return "ecdsap384" + + def sig_type(self): + return "ECDSA384_SHA384" + + def sig_tlv(self): + return "ECDSASIG" + + def sig_len(self): + # Early versions of MCUboot (< v1.5.0) required ECDSA + # signatures to be padded to a fixed length. Because the DER + # encoding is done with signed integers, the size of the + # signature will vary depending on whether the high bit is set + # in each value. This padding was done in a + # not-easily-reversible way (by just adding zeros). + # + # The signing code no longer requires this padding, and newer + # versions of MCUboot don't require it. But, continue to + # return the total length so that the padding can be done if + # requested. + return 103 + + def verify(self, signature, payload): + # strip possible paddings added during sign + signature = signature[:signature[1] + 2] + k = self.key + if isinstance(self.key, ec.EllipticCurvePrivateKey): + k = self.key.public_key() + return k.verify(signature=signature, data=payload, + signature_algorithm=ec.ECDSA(SHA384())) + + +class ECDSA384P1(ECDSAPrivateKey, ECDSA384P1Public): + """ + Wrapper around an ECDSA (p384) private key. + """ + + def __init__(self, key): + """key should be an instance of EllipticCurvePrivateKey""" + super().__init__(key) + self.key = key + self.pad_sig = False + + @staticmethod + def generate(): + pk = ec.generate_private_key( + ec.SECP384R1(), + backend=default_backend()) + return ECDSA384P1(pk) + + def raw_sign(self, payload): + """Return the actual signature""" + return self.key.sign( + data=payload, + signature_algorithm=ec.ECDSA(SHA384())) + + def sign(self, payload): + sig = self.raw_sign(payload) + if self.pad_sig: + # To make fixed length, pad with one or two zeros. + sig += b'\000' * (self.sig_len() - len(sig)) + return sig + else: + return sig diff --git a/bootloader/mcuboot/scripts/imgtool/keys/ecdsa_test.py b/bootloader/mcuboot/scripts/imgtool/keys/ecdsa_test.py new file mode 100644 index 0000000..55f6cc4 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/keys/ecdsa_test.py @@ -0,0 +1,120 @@ +""" +Tests for ECDSA keys +""" + +# SPDX-License-Identifier: Apache-2.0 + +import io +import os.path +import sys +import tempfile +import unittest + +from cryptography.exceptions import InvalidSignature +from cryptography.hazmat.primitives.asymmetric import ec +from cryptography.hazmat.primitives.hashes import SHA256 + +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), '../..'))) + +from imgtool.keys import load, ECDSA256P1, ECDSAUsageError + +class EcKeyGeneration(unittest.TestCase): + + def setUp(self): + self.test_dir = tempfile.TemporaryDirectory() + + def tname(self, base): + return os.path.join(self.test_dir.name, base) + + def tearDown(self): + self.test_dir.cleanup() + + def test_keygen(self): + name1 = self.tname("keygen.pem") + k = ECDSA256P1.generate() + k.export_private(name1, b'secret') + + self.assertIsNone(load(name1)) + + k2 = load(name1, b'secret') + + pubname = self.tname('keygen-pub.pem') + k2.export_public(pubname) + pk2 = load(pubname) + + # We should be able to export the public key from the loaded + # public key, but not the private key. + pk2.export_public(self.tname('keygen-pub2.pem')) + self.assertRaises(ECDSAUsageError, + pk2.export_private, self.tname('keygen-priv2.pem')) + + def test_emit(self): + """Basic sanity check on the code emitters.""" + k = ECDSA256P1.generate() + + pubpem = io.StringIO() + k.emit_public_pem(pubpem) + self.assertIn("BEGIN PUBLIC KEY", pubpem.getvalue()) + self.assertIn("END PUBLIC KEY", pubpem.getvalue()) + + ccode = io.StringIO() + k.emit_c_public(ccode) + self.assertIn("ecdsa_pub_key", ccode.getvalue()) + self.assertIn("ecdsa_pub_key_len", ccode.getvalue()) + + hashccode = io.StringIO() + k.emit_c_public_hash(hashccode) + self.assertIn("ecdsa_pub_key_hash", hashccode.getvalue()) + self.assertIn("ecdsa_pub_key_hash_len", hashccode.getvalue()) + + rustcode = io.StringIO() + k.emit_rust_public(rustcode) + self.assertIn("ECDSA_PUB_KEY", rustcode.getvalue()) + + # raw data - bytes + pubraw = io.BytesIO() + k.emit_raw_public(pubraw) + self.assertTrue(len(pubraw.getvalue()) > 0) + + hashraw = io.BytesIO() + k.emit_raw_public_hash(hashraw) + self.assertTrue(len(hashraw.getvalue()) > 0) + + def test_emit_pub(self): + """Basic sanity check on the code emitters, from public key.""" + pubname = self.tname("public.pem") + k = ECDSA256P1.generate() + k.export_public(pubname) + + k2 = load(pubname) + + ccode = io.StringIO() + k2.emit_c_public(ccode) + self.assertIn("ecdsa_pub_key", ccode.getvalue()) + self.assertIn("ecdsa_pub_key_len", ccode.getvalue()) + + rustcode = io.StringIO() + k2.emit_rust_public(rustcode) + self.assertIn("ECDSA_PUB_KEY", rustcode.getvalue()) + + def test_sig(self): + k = ECDSA256P1.generate() + buf = b'This is the message' + sig = k.raw_sign(buf) + + # The code doesn't have any verification, so verify this + # manually. + k.key.public_key().verify( + signature=sig, + data=buf, + signature_algorithm=ec.ECDSA(SHA256())) + + # Modify the message to make sure the signature fails. + self.assertRaises(InvalidSignature, + k.key.public_key().verify, + signature=sig, + data=b'This is thE message', + signature_algorithm=ec.ECDSA(SHA256())) + +if __name__ == '__main__': + unittest.main() diff --git a/bootloader/mcuboot/scripts/imgtool/keys/ed25519.py b/bootloader/mcuboot/scripts/imgtool/keys/ed25519.py new file mode 100644 index 0000000..a9959a6 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/keys/ed25519.py @@ -0,0 +1,111 @@ +""" +ED25519 key management +""" + +# SPDX-License-Identifier: Apache-2.0 + +from cryptography.hazmat.primitives import serialization +from cryptography.hazmat.primitives.asymmetric import ed25519 + +from .general import KeyClass + + +class Ed25519UsageError(Exception): + pass + + +class Ed25519Public(KeyClass): + def __init__(self, key): + self.key = key + + def shortname(self): + return "ed25519" + + def _unsupported(self, name): + raise Ed25519UsageError("Operation {} requires private key".format(name)) + + def _get_public(self): + return self.key + + def get_public_bytes(self): + # The key is embedded into MBUboot in "SubjectPublicKeyInfo" format + return self._get_public().public_bytes( + encoding=serialization.Encoding.DER, + format=serialization.PublicFormat.SubjectPublicKeyInfo) + + def get_public_pem(self): + return self._get_public().public_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PublicFormat.SubjectPublicKeyInfo) + + def get_private_bytes(self, minimal, format): + self._unsupported('get_private_bytes') + + def export_private(self, path, passwd=None): + self._unsupported('export_private') + + def export_public(self, path): + """Write the public key to the given file.""" + pem = self._get_public().public_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PublicFormat.SubjectPublicKeyInfo) + with open(path, 'wb') as f: + f.write(pem) + + def sig_type(self): + return "ED25519" + + def sig_tlv(self): + return "ED25519" + + def sig_len(self): + return 64 + + def verify_digest(self, signature, digest): + """Verify that signature is valid for given digest""" + k = self.key + if isinstance(self.key, ed25519.Ed25519PrivateKey): + k = self.key.public_key() + return k.verify(signature=signature, data=digest) + + +class Ed25519(Ed25519Public): + """ + Wrapper around an ED25519 private key. + """ + + def __init__(self, key): + """key should be an instance of EllipticCurvePrivateKey""" + self.key = key + + @staticmethod + def generate(): + pk = ed25519.Ed25519PrivateKey.generate() + return Ed25519(pk) + + def _get_public(self): + return self.key.public_key() + + def get_private_bytes(self, minimal, format): + raise Ed25519UsageError("Operation not supported with {} keys".format( + self.shortname())) + + def export_private(self, path, passwd=None): + """ + Write the private key to the given file, protecting it with the + optional password. + """ + if passwd is None: + enc = serialization.NoEncryption() + else: + enc = serialization.BestAvailableEncryption(passwd) + pem = self.key.private_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PrivateFormat.PKCS8, + encryption_algorithm=enc) + with open(path, 'wb') as f: + f.write(pem) + + def sign_digest(self, digest): + """Return the actual signature""" + return self.key.sign(data=digest) diff --git a/bootloader/mcuboot/scripts/imgtool/keys/ed25519_test.py b/bootloader/mcuboot/scripts/imgtool/keys/ed25519_test.py new file mode 100644 index 0000000..ae9ea49 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/keys/ed25519_test.py @@ -0,0 +1,124 @@ +""" +Tests for ECDSA keys +""" + +# SPDX-License-Identifier: Apache-2.0 + +import hashlib +import io +import os.path +import sys +import tempfile +import unittest + +from cryptography.exceptions import InvalidSignature +from cryptography.hazmat.primitives.asymmetric import ed25519 + +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), '../..'))) + +from imgtool.keys import load, Ed25519, Ed25519UsageError + + +class Ed25519KeyGeneration(unittest.TestCase): + + def setUp(self): + self.test_dir = tempfile.TemporaryDirectory() + + def tname(self, base): + return os.path.join(self.test_dir.name, base) + + def tearDown(self): + self.test_dir.cleanup() + + def test_keygen(self): + name1 = self.tname("keygen.pem") + k = Ed25519.generate() + k.export_private(name1, b'secret') + + self.assertIsNone(load(name1)) + + k2 = load(name1, b'secret') + + pubname = self.tname('keygen-pub.pem') + k2.export_public(pubname) + pk2 = load(pubname) + + # We should be able to export the public key from the loaded + # public key, but not the private key. + pk2.export_public(self.tname('keygen-pub2.pem')) + self.assertRaises(Ed25519UsageError, + pk2.export_private, self.tname('keygen-priv2.pem')) + + def test_emit(self): + """Basic sanity check on the code emitters.""" + k = Ed25519.generate() + + pubpem = io.StringIO() + k.emit_public_pem(pubpem) + self.assertIn("BEGIN PUBLIC KEY", pubpem.getvalue()) + self.assertIn("END PUBLIC KEY", pubpem.getvalue()) + + ccode = io.StringIO() + k.emit_c_public(ccode) + self.assertIn("ed25519_pub_key", ccode.getvalue()) + self.assertIn("ed25519_pub_key_len", ccode.getvalue()) + + hashccode = io.StringIO() + k.emit_c_public_hash(hashccode) + self.assertIn("ed25519_pub_key_hash", hashccode.getvalue()) + self.assertIn("ed25519_pub_key_hash_len", hashccode.getvalue()) + + rustcode = io.StringIO() + k.emit_rust_public(rustcode) + self.assertIn("ED25519_PUB_KEY", rustcode.getvalue()) + + # raw data - bytes + pubraw = io.BytesIO() + k.emit_raw_public(pubraw) + self.assertTrue(len(pubraw.getvalue()) > 0) + + hashraw = io.BytesIO() + k.emit_raw_public_hash(hashraw) + self.assertTrue(len(hashraw.getvalue()) > 0) + + def test_emit_pub(self): + """Basic sanity check on the code emitters, from public key.""" + pubname = self.tname("public.pem") + k = Ed25519.generate() + k.export_public(pubname) + + k2 = load(pubname) + + ccode = io.StringIO() + k2.emit_c_public(ccode) + self.assertIn("ed25519_pub_key", ccode.getvalue()) + self.assertIn("ed25519_pub_key_len", ccode.getvalue()) + + rustcode = io.StringIO() + k2.emit_rust_public(rustcode) + self.assertIn("ED25519_PUB_KEY", rustcode.getvalue()) + + def test_sig(self): + k = Ed25519.generate() + buf = b'This is the message' + sha = hashlib.sha256() + sha.update(buf) + digest = sha.digest() + sig = k.sign_digest(digest) + + # The code doesn't have any verification, so verify this + # manually. + k.key.public_key().verify(signature=sig, data=digest) + + # Modify the message to make sure the signature fails. + sha = hashlib.sha256() + sha.update(b'This is thE message') + new_digest = sha.digest() + self.assertRaises(InvalidSignature, + k.key.public_key().verify, + signature=sig, + data=new_digest) + + +if __name__ == '__main__': + unittest.main() diff --git a/bootloader/mcuboot/scripts/imgtool/keys/general.py b/bootloader/mcuboot/scripts/imgtool/keys/general.py new file mode 100644 index 0000000..4ff700c --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/keys/general.py @@ -0,0 +1,115 @@ +"""General key class.""" + +# SPDX-License-Identifier: Apache-2.0 + +import binascii +import io +import os +import sys +from cryptography.hazmat.primitives.hashes import Hash, SHA256 + +AUTOGEN_MESSAGE = "/* Autogenerated by imgtool.py, do not edit. */" + + +class FileHandler(object): + def __init__(self, file, *args, **kwargs): + self.file_in = file + self.args = args + self.kwargs = kwargs + + def __enter__(self): + if isinstance(self.file_in, (str, bytes, os.PathLike)): + self.file = open(self.file_in, *self.args, **self.kwargs) + else: + self.file = self.file_in + return self.file + + def __exit__(self, *args): + if self.file != self.file_in: + self.file.close() + + +class KeyClass(object): + def _emit(self, header, trailer, encoded_bytes, indent, file=sys.stdout, + len_format=None): + with FileHandler(file, 'w') as file: + self._emit_to_output(header, trailer, encoded_bytes, indent, + file, len_format) + + def _emit_to_output(self, header, trailer, encoded_bytes, indent, file, + len_format): + print(AUTOGEN_MESSAGE, file=file) + print(header, end='', file=file) + for count, b in enumerate(encoded_bytes): + if count % 8 == 0: + print("\n" + indent, end='', file=file) + else: + print(" ", end='', file=file) + print("0x{:02x},".format(b), end='', file=file) + print("\n" + trailer, file=file) + if len_format is not None: + print(len_format.format(len(encoded_bytes)), file=file) + + def _emit_raw(self, encoded_bytes, file): + with FileHandler(file, 'wb') as file: + try: + # file.buffer is not part of the TextIOBase API + # and may not exist in some implementations. + file.buffer.write(encoded_bytes) + except AttributeError: + # raw binary data, can be for example io.BytesIO + file.write(encoded_bytes) + + def emit_c_public(self, file=sys.stdout): + self._emit( + header="const unsigned char {}_pub_key[] = {{" + .format(self.shortname()), + trailer="};", + encoded_bytes=self.get_public_bytes(), + indent=" ", + len_format="const unsigned int {}_pub_key_len = {{}};" + .format(self.shortname()), + file=file) + + def emit_c_public_hash(self, file=sys.stdout): + digest = Hash(SHA256()) + digest.update(self.get_public_bytes()) + self._emit( + header="const unsigned char {}_pub_key_hash[] = {{" + .format(self.shortname()), + trailer="};", + encoded_bytes=digest.finalize(), + indent=" ", + len_format="const unsigned int {}_pub_key_hash_len = {{}};" + .format(self.shortname()), + file=file) + + def emit_raw_public(self, file=sys.stdout): + self._emit_raw(self.get_public_bytes(), file=file) + + def emit_raw_public_hash(self, file=sys.stdout): + digest = Hash(SHA256()) + digest.update(self.get_public_bytes()) + self._emit_raw(digest.finalize(), file=file) + + def emit_rust_public(self, file=sys.stdout): + self._emit( + header="static {}_PUB_KEY: &[u8] = &[" + .format(self.shortname().upper()), + trailer="];", + encoded_bytes=self.get_public_bytes(), + indent=" ", + file=file) + + def emit_public_pem(self, file=sys.stdout): + with FileHandler(file, 'w') as file: + print(str(self.get_public_pem(), 'utf-8'), file=file, end='') + + def emit_private(self, minimal, format, file=sys.stdout): + self._emit( + header="const unsigned char enc_priv_key[] = {", + trailer="};", + encoded_bytes=self.get_private_bytes(minimal, format), + indent=" ", + len_format="const unsigned int enc_priv_key_len = {};", + file=file) diff --git a/bootloader/mcuboot/scripts/imgtool/keys/privatebytes.py b/bootloader/mcuboot/scripts/imgtool/keys/privatebytes.py new file mode 100644 index 0000000..8027ac8 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/keys/privatebytes.py @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: Apache-2.0 + +from cryptography.hazmat.primitives import serialization + + +class PrivateBytesMixin(): + def _get_private_bytes(self, minimal, format, exclass): + if format is None: + format = self._DEFAULT_FORMAT + if format not in self._VALID_FORMATS: + raise exclass("{} does not support {}".format( + self.shortname(), format)) + return format, self.key.private_bytes( + encoding=serialization.Encoding.DER, + format=self._VALID_FORMATS[format], + encryption_algorithm=serialization.NoEncryption()) diff --git a/bootloader/mcuboot/scripts/imgtool/keys/rsa.py b/bootloader/mcuboot/scripts/imgtool/keys/rsa.py new file mode 100644 index 0000000..d4793c5 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/keys/rsa.py @@ -0,0 +1,173 @@ +""" +RSA Key management +""" + +# SPDX-License-Identifier: Apache-2.0 + +from cryptography.hazmat.backends import default_backend +from cryptography.hazmat.primitives import serialization +from cryptography.hazmat.primitives.asymmetric import rsa +from cryptography.hazmat.primitives.asymmetric.padding import PSS, MGF1 +from cryptography.hazmat.primitives.hashes import SHA256 + +from .general import KeyClass +from .privatebytes import PrivateBytesMixin + + +# Sizes that bootutil will recognize +RSA_KEY_SIZES = [2048, 3072] + + +class RSAUsageError(Exception): + pass + + +class RSAPublic(KeyClass): + """The public key can only do a few operations""" + def __init__(self, key): + self.key = key + + def key_size(self): + return self.key.key_size + + def shortname(self): + return "rsa" + + def _unsupported(self, name): + raise RSAUsageError("Operation {} requires private key".format(name)) + + def _get_public(self): + return self.key + + def get_public_bytes(self): + # The key embedded into MCUboot is in PKCS1 format. + return self._get_public().public_bytes( + encoding=serialization.Encoding.DER, + format=serialization.PublicFormat.PKCS1) + + def get_public_pem(self): + return self._get_public().public_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PublicFormat.SubjectPublicKeyInfo) + + def get_private_bytes(self, minimal, format): + self._unsupported('get_private_bytes') + + def export_private(self, path, passwd=None): + self._unsupported('export_private') + + def export_public(self, path): + """Write the public key to the given file.""" + pem = self._get_public().public_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PublicFormat.SubjectPublicKeyInfo) + with open(path, 'wb') as f: + f.write(pem) + + def sig_type(self): + return "PKCS1_PSS_RSA{}_SHA256".format(self.key_size()) + + def sig_tlv(self): + return"RSA{}".format(self.key_size()) + + def sig_len(self): + return self.key_size() / 8 + + def verify(self, signature, payload): + k = self.key + if isinstance(self.key, rsa.RSAPrivateKey): + k = self.key.public_key() + return k.verify(signature=signature, data=payload, + padding=PSS(mgf=MGF1(SHA256()), salt_length=32), + algorithm=SHA256()) + + +class RSA(RSAPublic, PrivateBytesMixin): + """ + Wrapper around an RSA key, with imgtool support. + """ + + def __init__(self, key): + """The key should be a private key from cryptography""" + self.key = key + + @staticmethod + def generate(key_size=2048): + if key_size not in RSA_KEY_SIZES: + raise RSAUsageError("Key size {} is not supported by MCUboot" + .format(key_size)) + pk = rsa.generate_private_key( + public_exponent=65537, + key_size=key_size, + backend=default_backend()) + return RSA(pk) + + def _get_public(self): + return self.key.public_key() + + def _build_minimal_rsa_privkey(self, der): + ''' + Builds a new DER that only includes N/E/D/P/Q RSA parameters; + standard DER private bytes provided by OpenSSL also includes + CRT params (DP/DQ/QP) which can be removed. + ''' + OFFSET_N = 7 # N is always located at this offset + b = bytearray(der) + off = OFFSET_N + if b[off + 1] != 0x82: + raise RSAUsageError("Error parsing N while minimizing") + len_N = (b[off + 2] << 8) + b[off + 3] + 4 + off += len_N + if b[off + 1] != 0x03: + raise RSAUsageError("Error parsing E while minimizing") + len_E = b[off + 2] + 4 + off += len_E + if b[off + 1] != 0x82: + raise RSAUsageError("Error parsing D while minimizing") + len_D = (b[off + 2] << 8) + b[off + 3] + 4 + off += len_D + if b[off + 1] != 0x81: + raise RSAUsageError("Error parsing P while minimizing") + len_P = b[off + 2] + 3 + off += len_P + if b[off + 1] != 0x81: + raise RSAUsageError("Error parsing Q while minimizing") + len_Q = b[off + 2] + 3 + off += len_Q + # adjust DER size for removed elements + b[2] = (off - 4) >> 8 + b[3] = (off - 4) & 0xff + return b[:off] + + _VALID_FORMATS = { + 'openssl': serialization.PrivateFormat.TraditionalOpenSSL + } + _DEFAULT_FORMAT = 'openssl' + + def get_private_bytes(self, minimal, format): + _, priv = self._get_private_bytes(minimal, format, RSAUsageError) + if minimal: + priv = self._build_minimal_rsa_privkey(priv) + return priv + + def export_private(self, path, passwd=None): + """Write the private key to the given file, protecting it with the + optional password.""" + if passwd is None: + enc = serialization.NoEncryption() + else: + enc = serialization.BestAvailableEncryption(passwd) + pem = self.key.private_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PrivateFormat.PKCS8, + encryption_algorithm=enc) + with open(path, 'wb') as f: + f.write(pem) + + def sign(self, payload): + # The verification code only allows the salt length to be the + # same as the hash length, 32. + return self.key.sign( + data=payload, + padding=PSS(mgf=MGF1(SHA256()), salt_length=32), + algorithm=SHA256()) diff --git a/bootloader/mcuboot/scripts/imgtool/keys/rsa_test.py b/bootloader/mcuboot/scripts/imgtool/keys/rsa_test.py new file mode 100644 index 0000000..7610106 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/keys/rsa_test.py @@ -0,0 +1,136 @@ +""" +Tests for RSA keys +""" + +# SPDX-License-Identifier: Apache-2.0 + +import io +import os +import sys +import tempfile +import unittest + +from cryptography.exceptions import InvalidSignature +from cryptography.hazmat.primitives.asymmetric.padding import PSS, MGF1 +from cryptography.hazmat.primitives.hashes import SHA256 + +# Setup sys path so 'imgtool' is in it. +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), + '../..'))) + +from imgtool.keys import load, RSA, RSAUsageError +from imgtool.keys.rsa import RSA_KEY_SIZES + + +class KeyGeneration(unittest.TestCase): + + def setUp(self): + self.test_dir = tempfile.TemporaryDirectory() + + def tname(self, base): + return os.path.join(self.test_dir.name, base) + + def tearDown(self): + self.test_dir.cleanup() + + def test_keygen(self): + # Try generating a RSA key with non-supported size + with self.assertRaises(RSAUsageError): + RSA.generate(key_size=1024) + + for key_size in RSA_KEY_SIZES: + name1 = self.tname("keygen.pem") + k = RSA.generate(key_size=key_size) + k.export_private(name1, b'secret') + + # Try loading the key without a password. + self.assertIsNone(load(name1)) + + k2 = load(name1, b'secret') + + pubname = self.tname('keygen-pub.pem') + k2.export_public(pubname) + pk2 = load(pubname) + + # We should be able to export the public key from the loaded + # public key, but not the private key. + pk2.export_public(self.tname('keygen-pub2.pem')) + self.assertRaises(RSAUsageError, pk2.export_private, + self.tname('keygen-priv2.pem')) + + def test_emit(self): + """Basic sanity check on the code emitters.""" + for key_size in RSA_KEY_SIZES: + k = RSA.generate(key_size=key_size) + + pubpem = io.StringIO() + k.emit_public_pem(pubpem) + self.assertIn("BEGIN PUBLIC KEY", pubpem.getvalue()) + self.assertIn("END PUBLIC KEY", pubpem.getvalue()) + + ccode = io.StringIO() + k.emit_c_public(ccode) + self.assertIn("rsa_pub_key", ccode.getvalue()) + self.assertIn("rsa_pub_key_len", ccode.getvalue()) + + hashccode = io.StringIO() + k.emit_c_public_hash(hashccode) + self.assertIn("rsa_pub_key_hash", hashccode.getvalue()) + self.assertIn("rsa_pub_key_hash_len", hashccode.getvalue()) + + rustcode = io.StringIO() + k.emit_rust_public(rustcode) + self.assertIn("RSA_PUB_KEY", rustcode.getvalue()) + + # raw data - bytes + pubraw = io.BytesIO() + k.emit_raw_public(pubraw) + self.assertTrue(len(pubraw.getvalue()) > 0) + + hashraw = io.BytesIO() + k.emit_raw_public_hash(hashraw) + self.assertTrue(len(hashraw.getvalue()) > 0) + + def test_emit_pub(self): + """Basic sanity check on the code emitters, from public key.""" + pubname = self.tname("public.pem") + for key_size in RSA_KEY_SIZES: + k = RSA.generate(key_size=key_size) + k.export_public(pubname) + + k2 = load(pubname) + + ccode = io.StringIO() + k2.emit_c_public(ccode) + self.assertIn("rsa_pub_key", ccode.getvalue()) + self.assertIn("rsa_pub_key_len", ccode.getvalue()) + + rustcode = io.StringIO() + k2.emit_rust_public(rustcode) + self.assertIn("RSA_PUB_KEY", rustcode.getvalue()) + + def test_sig(self): + for key_size in RSA_KEY_SIZES: + k = RSA.generate(key_size=key_size) + buf = b'This is the message' + sig = k.sign(buf) + + # The code doesn't have any verification, so verify this + # manually. + k.key.public_key().verify( + signature=sig, + data=buf, + padding=PSS(mgf=MGF1(SHA256()), salt_length=32), + algorithm=SHA256()) + + # Modify the message to make sure the signature fails. + self.assertRaises(InvalidSignature, + k.key.public_key().verify, + signature=sig, + data=b'This is thE message', + padding=PSS(mgf=MGF1(SHA256()), salt_length=32), + algorithm=SHA256()) + + +if __name__ == '__main__': + unittest.main() diff --git a/bootloader/mcuboot/scripts/imgtool/keys/x25519.py b/bootloader/mcuboot/scripts/imgtool/keys/x25519.py new file mode 100644 index 0000000..a99cf18 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/keys/x25519.py @@ -0,0 +1,119 @@ +""" +X25519 key management +""" + +# SPDX-License-Identifier: Apache-2.0 + +from cryptography.hazmat.backends import default_backend +from cryptography.hazmat.primitives import serialization +from cryptography.hazmat.primitives.asymmetric import x25519 + +from .general import KeyClass +from .privatebytes import PrivateBytesMixin + + +class X25519UsageError(Exception): + pass + + +class X25519Public(KeyClass): + def __init__(self, key): + self.key = key + + def shortname(self): + return "x25519" + + def _unsupported(self, name): + raise X25519UsageError("Operation {} requires private key".format(name)) + + def _get_public(self): + return self.key + + def get_public_bytes(self): + # The key is embedded into MBUboot in "SubjectPublicKeyInfo" format + return self._get_public().public_bytes( + encoding=serialization.Encoding.DER, + format=serialization.PublicFormat.SubjectPublicKeyInfo) + + def get_public_pem(self): + return self._get_public().public_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PublicFormat.SubjectPublicKeyInfo) + + def get_private_bytes(self, minimal, format): + self._unsupported('get_private_bytes') + + def export_private(self, path, passwd=None): + self._unsupported('export_private') + + def export_public(self, path): + """Write the public key to the given file.""" + pem = self._get_public().public_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PublicFormat.SubjectPublicKeyInfo) + with open(path, 'wb') as f: + f.write(pem) + + def sig_type(self): + return "X25519" + + def sig_tlv(self): + return "X25519" + + def sig_len(self): + return 32 + + +class X25519(X25519Public, PrivateBytesMixin): + """ + Wrapper around an X25519 private key. + """ + + def __init__(self, key): + """key should be an instance of EllipticCurvePrivateKey""" + self.key = key + + @staticmethod + def generate(): + pk = x25519.X25519PrivateKey.generate() + return X25519(pk) + + def _get_public(self): + return self.key.public_key() + + _VALID_FORMATS = { + 'pkcs8': serialization.PrivateFormat.PKCS8 + } + _DEFAULT_FORMAT = 'pkcs8' + + def get_private_bytes(self, minimal, format): + _, priv = self._get_private_bytes(minimal, format, + X25519UsageError) + return priv + + def export_private(self, path, passwd=None): + """ + Write the private key to the given file, protecting it with the + optional password. + """ + if passwd is None: + enc = serialization.NoEncryption() + else: + enc = serialization.BestAvailableEncryption(passwd) + pem = self.key.private_bytes( + encoding=serialization.Encoding.PEM, + format=serialization.PrivateFormat.PKCS8, + encryption_algorithm=enc) + with open(path, 'wb') as f: + f.write(pem) + + def sign_digest(self, digest): + """Return the actual signature""" + return self.key.sign(data=digest) + + def verify_digest(self, signature, digest): + """Verify that signature is valid for given digest""" + k = self.key + if isinstance(self.key, x25519.X25519PrivateKey): + k = self.key.public_key() + return k.verify(signature=signature, data=digest) diff --git a/bootloader/mcuboot/scripts/imgtool/main.py b/bootloader/mcuboot/scripts/imgtool/main.py new file mode 100644 index 0000000..03d46c9 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/main.py @@ -0,0 +1,618 @@ +#! /usr/bin/env python3 +# +# Copyright 2017-2020 Linaro Limited +# Copyright 2019-2023 Arm Limited +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import re +import click +import getpass +import imgtool.keys as keys +import sys +import struct +import os +import lzma +import hashlib +import base64 +from imgtool import image, imgtool_version +from imgtool.version import decode_version +from imgtool.dumpinfo import dump_imginfo +from .keys import ( + RSAUsageError, ECDSAUsageError, Ed25519UsageError, X25519UsageError) + +comp_default_dictsize=131072 +comp_default_pb=2 +comp_default_lc=3 +comp_default_lp=1 +comp_default_preset=9 + + +MIN_PYTHON_VERSION = (3, 6) +if sys.version_info < MIN_PYTHON_VERSION: + sys.exit("Python %s.%s or newer is required by imgtool." + % MIN_PYTHON_VERSION) + + +def gen_rsa2048(keyfile, passwd): + keys.RSA.generate().export_private(path=keyfile, passwd=passwd) + + +def gen_rsa3072(keyfile, passwd): + keys.RSA.generate(key_size=3072).export_private(path=keyfile, + passwd=passwd) + + +def gen_ecdsa_p256(keyfile, passwd): + keys.ECDSA256P1.generate().export_private(keyfile, passwd=passwd) + + +def gen_ecdsa_p384(keyfile, passwd): + keys.ECDSA384P1.generate().export_private(keyfile, passwd=passwd) + + +def gen_ed25519(keyfile, passwd): + keys.Ed25519.generate().export_private(path=keyfile, passwd=passwd) + + +def gen_x25519(keyfile, passwd): + keys.X25519.generate().export_private(path=keyfile, passwd=passwd) + + +valid_langs = ['c', 'rust'] +valid_hash_encodings = ['lang-c', 'raw'] +valid_encodings = ['lang-c', 'lang-rust', 'pem', 'raw'] +keygens = { + 'rsa-2048': gen_rsa2048, + 'rsa-3072': gen_rsa3072, + 'ecdsa-p256': gen_ecdsa_p256, + 'ecdsa-p384': gen_ecdsa_p384, + 'ed25519': gen_ed25519, + 'x25519': gen_x25519, +} +valid_formats = ['openssl', 'pkcs8'] +valid_sha = [ 'auto', '256', '384', '512' ] + + +def load_signature(sigfile): + with open(sigfile, 'rb') as f: + signature = base64.b64decode(f.read()) + return signature + + +def save_signature(sigfile, sig): + with open(sigfile, 'wb') as f: + signature = base64.b64encode(sig) + f.write(signature) + + +def load_key(keyfile): + # TODO: better handling of invalid pass-phrase + key = keys.load(keyfile) + if key is not None: + return key + passwd = getpass.getpass("Enter key passphrase: ").encode('utf-8') + return keys.load(keyfile, passwd) + + +def get_password(): + while True: + passwd = getpass.getpass("Enter key passphrase: ") + passwd2 = getpass.getpass("Reenter passphrase: ") + if passwd == passwd2: + break + print("Passwords do not match, try again") + + # Password must be bytes, always use UTF-8 for consistent + # encoding. + return passwd.encode('utf-8') + + +@click.option('-p', '--password', is_flag=True, + help='Prompt for password to protect key') +@click.option('-t', '--type', metavar='type', required=True, + type=click.Choice(keygens.keys()), prompt=True, + help='{}'.format('One of: {}'.format(', '.join(keygens.keys())))) +@click.option('-k', '--key', metavar='filename', required=True) +@click.command(help='Generate pub/private keypair') +def keygen(type, key, password): + password = get_password() if password else None + keygens[type](key, password) + + +@click.option('-l', '--lang', metavar='lang', + type=click.Choice(valid_langs), + help='This option is deprecated. Please use the ' + '`--encoding` option. ' + 'Valid langs: {}'.format(', '.join(valid_langs))) +@click.option('-e', '--encoding', metavar='encoding', + type=click.Choice(valid_encodings), + help='Valid encodings: {}'.format(', '.join(valid_encodings))) +@click.option('-k', '--key', metavar='filename', required=True) +@click.option('-o', '--output', metavar='output', required=False, + help='Specify the output file\'s name. \ + The stdout is used if it is not provided.') +@click.command(help='Dump public key from keypair') +def getpub(key, encoding, lang, output): + if encoding and lang: + raise click.UsageError('Please use only one of `--encoding/-e` ' + 'or `--lang/-l`') + elif not encoding and not lang: + # Preserve old behavior defaulting to `c`. If `lang` is removed, + # `default=valid_encodings[0]` should be added to `-e` param. + lang = valid_langs[0] + key = load_key(key) + + if not output: + output = sys.stdout + if key is None: + print("Invalid passphrase") + elif lang == 'c' or encoding == 'lang-c': + key.emit_c_public(file=output) + elif lang == 'rust' or encoding == 'lang-rust': + key.emit_rust_public(file=output) + elif encoding == 'pem': + key.emit_public_pem(file=output) + elif encoding == 'raw': + key.emit_raw_public(file=output) + else: + raise click.UsageError() + + +@click.option('-e', '--encoding', metavar='encoding', + type=click.Choice(valid_hash_encodings), + help='Valid encodings: {}. ' + 'Default value is {}.' + .format(', '.join(valid_hash_encodings), + valid_hash_encodings[0])) +@click.option('-k', '--key', metavar='filename', required=True) +@click.option('-o', '--output', metavar='output', required=False, + help='Specify the output file\'s name. \ + The stdout is used if it is not provided.') +@click.command(help='Dump the SHA256 hash of the public key') +def getpubhash(key, output, encoding): + if not encoding: + encoding = valid_hash_encodings[0] + key = load_key(key) + + if not output: + output = sys.stdout + if key is None: + print("Invalid passphrase") + elif encoding == 'lang-c': + key.emit_c_public_hash(file=output) + elif encoding == 'raw': + key.emit_raw_public_hash(file=output) + else: + raise click.UsageError() + + +@click.option('--minimal', default=False, is_flag=True, + help='Reduce the size of the dumped private key to include only ' + 'the minimum amount of data required to decrypt. This ' + 'might require changes to the build config. Check the docs!' + ) +@click.option('-k', '--key', metavar='filename', required=True) +@click.option('-f', '--format', + type=click.Choice(valid_formats), + help='Valid formats: {}'.format(', '.join(valid_formats)) + ) +@click.command(help='Dump private key from keypair') +def getpriv(key, minimal, format): + key = load_key(key) + if key is None: + print("Invalid passphrase") + try: + key.emit_private(minimal, format) + except (RSAUsageError, ECDSAUsageError, Ed25519UsageError, + X25519UsageError) as e: + raise click.UsageError(e) + + +@click.argument('imgfile') +@click.option('-k', '--key', metavar='filename') +@click.command(help="Check that signed image can be verified by given key") +def verify(key, imgfile): + key = load_key(key) if key else None + ret, version, digest, signature = image.Image.verify(imgfile, key) + if ret == image.VerifyResult.OK: + print("Image was correctly validated") + print("Image version: {}.{}.{}+{}".format(*version)) + if digest: + print("Image digest: {}".format(digest.hex())) + if signature and digest is None: + print("Image signature over image: {}".format(signature.hex())) + return + elif ret == image.VerifyResult.INVALID_MAGIC: + print("Invalid image magic; is this an MCUboot image?") + elif ret == image.VerifyResult.INVALID_TLV_INFO_MAGIC: + print("Invalid TLV info magic; is this an MCUboot image?") + elif ret == image.VerifyResult.INVALID_HASH: + print("Image has an invalid hash") + elif ret == image.VerifyResult.INVALID_SIGNATURE: + print("No signature found for the given key") + elif ret == image.VerifyResult.KEY_MISMATCH: + print("Key type does not match TLV record") + else: + print("Unknown return code: {}".format(ret)) + sys.exit(1) + + +@click.argument('imgfile') +@click.option('-o', '--outfile', metavar='filename', required=False, + help='Save image information to outfile in YAML format') +@click.option('-s', '--silent', default=False, is_flag=True, + help='Do not print image information to output') +@click.command(help='Print header, TLV area and trailer information ' + 'of a signed image') +def dumpinfo(imgfile, outfile, silent): + dump_imginfo(imgfile, outfile, silent) + print("dumpinfo has run successfully") + + +def validate_version(ctx, param, value): + try: + decode_version(value) + return value + except ValueError as e: + raise click.BadParameter("{}".format(e)) + + +def validate_security_counter(ctx, param, value): + if value is not None: + if value.lower() == 'auto': + return 'auto' + else: + try: + return int(value, 0) + except ValueError: + raise click.BadParameter( + "{} is not a valid integer. Please use code literals " + "prefixed with 0b/0B, 0o/0O, or 0x/0X as necessary." + .format(value)) + + +def validate_header_size(ctx, param, value): + min_hdr_size = image.IMAGE_HEADER_SIZE + if value < min_hdr_size: + raise click.BadParameter( + "Minimum value for -H/--header-size is {}".format(min_hdr_size)) + return value + + +def get_dependencies(ctx, param, value): + if value is not None: + versions = [] + images = re.findall(r"\((\d+)", value) + if len(images) == 0: + raise click.BadParameter( + "Image dependency format is invalid: {}".format(value)) + raw_versions = re.findall(r",\s*([0-9.+]+)\)", value) + if len(images) != len(raw_versions): + raise click.BadParameter( + '''There's a mismatch between the number of dependency images + and versions in: {}'''.format(value)) + for raw_version in raw_versions: + try: + versions.append(decode_version(raw_version)) + except ValueError as e: + raise click.BadParameter("{}".format(e)) + dependencies = dict() + dependencies[image.DEP_IMAGES_KEY] = images + dependencies[image.DEP_VERSIONS_KEY] = versions + return dependencies + +def create_lzma2_header(dictsize, pb, lc, lp): + header = bytearray() + for i in range(0, 40): + if dictsize <= ((2 | ((i) & 1)) << int((i) / 2 + 11)): + header.append(i) + break + header.append( ( pb * 5 + lp) * 9 + lc) + return header + +class BasedIntParamType(click.ParamType): + name = 'integer' + + def convert(self, value, param, ctx): + try: + return int(value, 0) + except ValueError: + self.fail('%s is not a valid integer. Please use code literals ' + 'prefixed with 0b/0B, 0o/0O, or 0x/0X as necessary.' + % value, param, ctx) + + +@click.argument('outfile') +@click.argument('infile') +@click.option('--non-bootable', default=False, is_flag=True, + help='Mark the image as non-bootable.') +@click.option('--custom-tlv', required=False, nargs=2, default=[], + multiple=True, metavar='[tag] [value]', + help='Custom TLV that will be placed into protected area. ' + 'Add "0x" prefix if the value should be interpreted as an ' + 'integer, otherwise it will be interpreted as a string. ' + 'Specify the option multiple times to add multiple TLVs.') +@click.option('-R', '--erased-val', type=click.Choice(['0', '0xff']), + required=False, + help='The value that is read back from erased flash.') +@click.option('-x', '--hex-addr', type=BasedIntParamType(), required=False, + help='Adjust address in hex output file.') +@click.option('-L', '--load-addr', type=BasedIntParamType(), required=False, + help='Load address for image when it should run from RAM.') +@click.option('-F', '--rom-fixed', type=BasedIntParamType(), required=False, + help='Set flash address the image is built for.') +@click.option('--save-enctlv', default=False, is_flag=True, + help='When upgrading, save encrypted key TLVs instead of plain ' + 'keys. Enable when BOOT_SWAP_SAVE_ENCTLV config option ' + 'was set.') +@click.option('-E', '--encrypt', metavar='filename', + help='Encrypt image using the provided public key. ' + '(Not supported in direct-xip or ram-load mode.)') +@click.option('--encrypt-keylen', default='128', + type=click.Choice(['128', '256']), + help='When encrypting the image using AES, select a 128 bit or ' + '256 bit key len.') +@click.option('--compression', default='disabled', + type=click.Choice(['disabled', 'lzma2', 'lzma2armthumb']), + help='Enable image compression using specified type. ' + 'Will fall back without image compression automatically ' + 'if the compression increases the image size.') +@click.option('-c', '--clear', required=False, is_flag=True, default=False, + help='Output a non-encrypted image with encryption capabilities,' + 'so it can be installed in the primary slot, and encrypted ' + 'when swapped to the secondary.') +@click.option('-e', '--endian', type=click.Choice(['little', 'big']), + default='little', help="Select little or big endian") +@click.option('--overwrite-only', default=False, is_flag=True, + help='Use overwrite-only instead of swap upgrades') +@click.option('--boot-record', metavar='sw_type', help='Create CBOR encoded ' + 'boot record TLV. The sw_type represents the role of the ' + 'software component (e.g. CoFM for coprocessor firmware). ' + '[max. 12 characters]') +@click.option('-M', '--max-sectors', type=int, + help='When padding allow for this amount of sectors (defaults ' + 'to 128)') +@click.option('--confirm', default=False, is_flag=True, + help='When padding the image, mark it as confirmed (implies ' + '--pad)') +@click.option('--pad', default=False, is_flag=True, + help='Pad image to --slot-size bytes, adding trailer magic') +@click.option('-S', '--slot-size', type=BasedIntParamType(), required=True, + help='Size of the slot. If the slots have different sizes, use ' + 'the size of the secondary slot.') +@click.option('--pad-header', default=False, is_flag=True, + help='Add --header-size zeroed bytes at the beginning of the ' + 'image') +@click.option('-H', '--header-size', callback=validate_header_size, + type=BasedIntParamType(), required=True) +@click.option('--pad-sig', default=False, is_flag=True, + help='Add 0-2 bytes of padding to ECDSA signature ' + '(for mcuboot <1.5)') +@click.option('-d', '--dependencies', callback=get_dependencies, + required=False, help='''Add dependence on another image, format: + "(,), ... "''') +@click.option('-s', '--security-counter', callback=validate_security_counter, + help='Specify the value of security counter. Use the `auto` ' + 'keyword to automatically generate it from the image version.') +@click.option('-v', '--version', callback=validate_version, required=True) +@click.option('--align', type=click.Choice(['1', '2', '4', '8', '16', '32']), + default='1', + required=False, + help='Alignment used by swap update modes.') +@click.option('--max-align', type=click.Choice(['8', '16', '32']), + required=False, + help='Maximum flash alignment. Set if flash alignment of the ' + 'primary and secondary slot differ and any of them is larger ' + 'than 8.') +@click.option('--public-key-format', type=click.Choice(['hash', 'full']), + default='hash', help='In what format to add the public key to ' + 'the image manifest: full key or hash of the key.') +@click.option('-k', '--key', metavar='filename') +@click.option('--fix-sig', metavar='filename', + help='fixed signature for the image. It will be used instead of ' + 'the signature calculated using the public key') +@click.option('--fix-sig-pubkey', metavar='filename', + help='public key relevant to fixed signature') +@click.option('--pure', 'is_pure', is_flag=True, default=False, show_default=True, + help='Expected Pure variant of signature; the Pure variant is ' + 'expected to be signature done over an image rather than hash of ' + 'that image.') +@click.option('--sig-out', metavar='filename', + help='Path to the file to which signature will be written. ' + 'The image signature will be encoded as base64 formatted string') +@click.option('--sha', 'user_sha', type=click.Choice(valid_sha), default='auto', + help='selected sha algorithm to use; defaults to "auto" which is 256 if ' + 'no cryptographic signature is used, or default for signature type') +@click.option('--vector-to-sign', type=click.Choice(['payload', 'digest']), + help='send to OUTFILE the payload or payload''s digest instead ' + 'of complied image. These data can be used for external image ' + 'signing') +@click.command(help='''Create a signed or unsigned image\n + INFILE and OUTFILE are parsed as Intel HEX if the params have + .hex extension, otherwise binary format is used''') +def sign(key, public_key_format, align, version, pad_sig, header_size, + pad_header, slot_size, pad, confirm, max_sectors, overwrite_only, + endian, encrypt_keylen, encrypt, compression, infile, outfile, + dependencies, load_addr, hex_addr, erased_val, save_enctlv, + security_counter, boot_record, custom_tlv, rom_fixed, max_align, + clear, fix_sig, fix_sig_pubkey, sig_out, user_sha, is_pure, + vector_to_sign, non_bootable): + + if confirm: + # Confirmed but non-padded images don't make much sense, because + # otherwise there's no trailer area for writing the confirmed status. + pad = True + img = image.Image(version=decode_version(version), header_size=header_size, + pad_header=pad_header, pad=pad, confirm=confirm, + align=int(align), slot_size=slot_size, + max_sectors=max_sectors, overwrite_only=overwrite_only, + endian=endian, load_addr=load_addr, rom_fixed=rom_fixed, + erased_val=erased_val, save_enctlv=save_enctlv, + security_counter=security_counter, max_align=max_align, + non_bootable=non_bootable) + compression_tlvs = {} + img.load(infile) + key = load_key(key) if key else None + enckey = load_key(encrypt) if encrypt else None + if enckey and key: + if ((isinstance(key, keys.ECDSA256P1) and + not isinstance(enckey, keys.ECDSA256P1Public)) + or (isinstance(key, keys.ECDSA384P1) and + not isinstance(enckey, keys.ECDSA384P1Public)) + or (isinstance(key, keys.RSA) and + not isinstance(enckey, keys.RSAPublic))): + # FIXME + raise click.UsageError("Signing and encryption must use the same " + "type of key") + + if pad_sig and hasattr(key, 'pad_sig'): + key.pad_sig = True + + # Get list of custom protected TLVs from the command-line + custom_tlvs = {} + for tlv in custom_tlv: + tag = int(tlv[0], 0) + if tag in custom_tlvs: + raise click.UsageError('Custom TLV %s already exists.' % hex(tag)) + if tag in image.TLV_VALUES.values(): + raise click.UsageError( + 'Custom TLV %s conflicts with predefined TLV.' % hex(tag)) + + value = tlv[1] + if value.startswith('0x'): + if len(value[2:]) % 2: + raise click.UsageError('Custom TLV length is odd.') + custom_tlvs[tag] = bytes.fromhex(value[2:]) + else: + custom_tlvs[tag] = value.encode('utf-8') + + # Allow signature calculated externally. + raw_signature = load_signature(fix_sig) if fix_sig else None + + baked_signature = None + pub_key = None + + if raw_signature is not None: + if fix_sig_pubkey is None: + raise click.UsageError( + 'public key of the fixed signature is not specified') + + pub_key = load_key(fix_sig_pubkey) + + baked_signature = { + 'value': raw_signature + } + + if is_pure and user_sha != 'auto': + raise click.UsageError( + 'Pure signatures, currently, enforces preferred hash algorithm, ' + 'and forbids sha selection by user.') + + img.create(key, public_key_format, enckey, dependencies, boot_record, + custom_tlvs, compression_tlvs, None, int(encrypt_keylen), clear, + baked_signature, pub_key, vector_to_sign, user_sha=user_sha, + is_pure=is_pure) + + if compression in ["lzma2", "lzma2armthumb"]: + compressed_img = image.Image(version=decode_version(version), + header_size=header_size, pad_header=pad_header, + pad=pad, confirm=confirm, align=int(align), + slot_size=slot_size, max_sectors=max_sectors, + overwrite_only=overwrite_only, endian=endian, + load_addr=load_addr, rom_fixed=rom_fixed, + erased_val=erased_val, save_enctlv=save_enctlv, + security_counter=security_counter, max_align=max_align) + compression_filters = [ + {"id": lzma.FILTER_LZMA2, "preset": comp_default_preset, + "dict_size": comp_default_dictsize, "lp": comp_default_lp, + "lc": comp_default_lc} + ] + if compression == "lzma2armthumb": + compression_filters.insert(0, {"id":lzma.FILTER_ARMTHUMB}) + compressed_data = lzma.compress(img.get_infile_data(),filters=compression_filters, + format=lzma.FORMAT_RAW) + uncompressed_size = len(img.get_infile_data()) + compressed_size = len(compressed_data) + print(f"compressed image size: {compressed_size} bytes") + print(f"original image size: {uncompressed_size} bytes") + compression_tlvs["DECOMP_SIZE"] = struct.pack( + img.get_struct_endian() + 'L', img.image_size) + compression_tlvs["DECOMP_SHA"] = img.image_hash + compression_tlvs_size = len(compression_tlvs["DECOMP_SIZE"]) + compression_tlvs_size += len(compression_tlvs["DECOMP_SHA"]) + if img.get_signature(): + compression_tlvs["DECOMP_SIGNATURE"] = img.get_signature() + compression_tlvs_size += len(compression_tlvs["DECOMP_SIGNATURE"]) + if (compressed_size + compression_tlvs_size) < uncompressed_size: + compression_header = create_lzma2_header( + dictsize = comp_default_dictsize, pb = comp_default_pb, + lc = comp_default_lc, lp = comp_default_lp) + compressed_img.load_compressed(compressed_data, compression_header) + compressed_img.base_addr = img.base_addr + compressed_img.create(key, public_key_format, enckey, + dependencies, boot_record, custom_tlvs, compression_tlvs, + compression, int(encrypt_keylen), clear, baked_signature, + pub_key, vector_to_sign) + img = compressed_img + img.save(outfile, hex_addr) + if sig_out is not None: + new_signature = img.get_signature() + save_signature(sig_out, new_signature) + + +class AliasesGroup(click.Group): + + _aliases = { + "create": "sign", + } + + def list_commands(self, ctx): + cmds = [k for k in self.commands] + aliases = [k for k in self._aliases] + return sorted(cmds + aliases) + + def get_command(self, ctx, cmd_name): + rv = click.Group.get_command(self, ctx, cmd_name) + if rv is not None: + return rv + if cmd_name in self._aliases: + return click.Group.get_command(self, ctx, self._aliases[cmd_name]) + return None + + +@click.command(help='Print imgtool version information') +def version(): + print(imgtool_version) + + +@click.command(cls=AliasesGroup, + context_settings=dict(help_option_names=['-h', '--help'])) +def imgtool(): + pass + + +imgtool.add_command(keygen) +imgtool.add_command(getpub) +imgtool.add_command(getpubhash) +imgtool.add_command(getpriv) +imgtool.add_command(verify) +imgtool.add_command(sign) +imgtool.add_command(version) +imgtool.add_command(dumpinfo) + + +if __name__ == '__main__': + imgtool() diff --git a/bootloader/mcuboot/scripts/imgtool/version.py b/bootloader/mcuboot/scripts/imgtool/version.py new file mode 100644 index 0000000..b803834 --- /dev/null +++ b/bootloader/mcuboot/scripts/imgtool/version.py @@ -0,0 +1,56 @@ +# Copyright 2017 Linaro Limited +# Copyright 2024 Arm Limited +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +""" +Semi Semantic Versioning + +Implements a subset of semantic versioning that is supportable by the image +header. +""" +import re +import sys +from collections import namedtuple + +SemiSemVersion = namedtuple('SemiSemVersion', ['major', 'minor', 'revision', + 'build']) + +version_re = re.compile( + r"""^([1-9]\d*|0)(\.([1-9]\d*|0)(\.([1-9]\d*|0)(\+([1-9]\d*|0))?)?)?$""") + + +def decode_version(text): + """Decode the version string, which should be of the form maj.min.rev+build + """ + m = version_re.match(text) + if m: + result = SemiSemVersion( + int(m.group(1)) if m.group(1) else 0, + int(m.group(3)) if m.group(3) else 0, + int(m.group(5)) if m.group(5) else 0, + int(m.group(7)) if m.group(7) else 0) + return result + else: + msg = "Invalid version number, should be maj.min.rev+build with later " + msg += "parts optional" + raise ValueError(msg) + + +if __name__ == '__main__': + if len(sys.argv) > 1: + print(decode_version(sys.argv[1])) + else: + print("Requires an argument, e.g. '1.0.0'") diff --git a/bootloader/mcuboot/scripts/jgdb.sh b/bootloader/mcuboot/scripts/jgdb.sh new file mode 100644 index 0000000..dc59020 --- /dev/null +++ b/bootloader/mcuboot/scripts/jgdb.sh @@ -0,0 +1,8 @@ +#! /bin/bash +# +# SPDX-License-Identifier: Apache-2.0 + +source $(dirname $0)/../target.sh + +# Start the jlink gdb server +JLinkGDBServer -if swd -device $SOC -speed auto diff --git a/bootloader/mcuboot/scripts/jl.sh b/bootloader/mcuboot/scripts/jl.sh new file mode 100644 index 0000000..abc6dab --- /dev/null +++ b/bootloader/mcuboot/scripts/jl.sh @@ -0,0 +1,7 @@ +#!/bin/bash +# +# SPDX-License-Identifier: Apache-2.0 + +source $(dirname $0)/../target.sh + +JLinkExe -speed auto -si SWD -device $SOC diff --git a/bootloader/mcuboot/scripts/mcubin.bt b/bootloader/mcuboot/scripts/mcubin.bt new file mode 100644 index 0000000..e2ec361 --- /dev/null +++ b/bootloader/mcuboot/scripts/mcubin.bt @@ -0,0 +1,135 @@ +// Copyright (C) 2019, Linaro Ltd +// +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); you may +// not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +// This file is a Binary Template file for the 010 Editor +// (http://www.sweetscape.com/010editor/) to allow it to show the +// structure of an MCUboot image. + +LittleEndian(); + +struct ENTRY { + uint32 id; + uint32 offset; + uint32 size; + uint32 pad; +}; + +// The simulator writes the partition table at the beginning of the +// image, so that we can tell where the partitions are. If you are +// trying to view an image captured from a device, you can either +// construct a synthetic partition table in the file, or change code +// described below to hardcode one. +struct PTABLE { + uchar pheader[8]; + if (ptable.pheader != "mcuboot\0") { + // NOTE: Put code here to hard code a partition table, and + // continue. + Warning("Invalid magic on ptable header"); + return -1; + } else { + uint32 count; + struct ENTRY entries[count]; + } +}; + +struct PTABLE ptable; + +struct IMAGE_VERSION { + uchar major; + uchar minor; + uint16 revision; + uint32 build_num; +}; + +struct IHDR { + uint32 magic ; + uint32 load_addr ; + uint16 hdr_size ; + uint16 protect_size ; + uint32 img_size ; + uint32 flags; + struct IMAGE_VERSION ver; + uint32 _pad1; +}; + +struct TLV_HDR { + uint16 magic; + uint16 tlv_tot; +}; + +struct TLV { + uchar type ; + uchar pad; + uint16 len; + + switch (type) { + case 0x01: // keyhash + uchar keyhash[len]; + break; + case 0x40: // dependency + if (len != 12) { + Warning("Invalid dependency size"); + return -1; + } + uchar image_id; + uchar pad1; + uint16 pad2; + struct IMAGE_VERSION version; + break; + default: + // Other, just consume the data. + uchar data[len]; + } +}; + +local int i; +local int epos; + +for (i = 0; i < ptable.count; i++) { + FSeek(ptable.entries[i].offset); + switch (ptable.entries[i].id) { + case 1: + case 2: + case 4: + case 5: + struct IMAGE { + struct IHDR ihdr; + + if (ihdr.magic == 0x96f3b83d) { + uchar payload[ihdr.img_size]; + + epos = FTell(); + struct TLV_HDR tlv_hdr; + + if (tlv_hdr.magic == 0x6907) { + epos += tlv_hdr.tlv_tot; + while (FTell() < epos) { + struct TLV tlv; + } + } + } + // uchar block[ptable.entries[i].size]; + } image; + break; + case 3: + struct SCRATCH { + uchar data[ptable.entries[i].size]; + } scratch; + break; + default: + break; + } +} diff --git a/bootloader/mcuboot/scripts/requirements.txt b/bootloader/mcuboot/scripts/requirements.txt new file mode 100644 index 0000000..33b11bb --- /dev/null +++ b/bootloader/mcuboot/scripts/requirements.txt @@ -0,0 +1,7 @@ +cryptography>=40.0.0 +intelhex +click +cbor2 +setuptools +pyyaml +pytest diff --git a/bootloader/mcuboot/scripts/setup.py b/bootloader/mcuboot/scripts/setup.py new file mode 100644 index 0000000..c97de95 --- /dev/null +++ b/bootloader/mcuboot/scripts/setup.py @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: Apache-2.0 + +import setuptools + +from imgtool import imgtool_version + +setuptools.setup( + name="imgtool", + version=imgtool_version, + author="The MCUboot committers", + author_email="mcuboot@groups.io", + description=("MCUboot's image signing and key management"), + license="Apache Software License", + url="http://github.com/mcu-tools/mcuboot", + packages=setuptools.find_packages(), + python_requires='>=3.6', + install_requires=[ + 'cryptography>=40.0.0', + 'intelhex>=2.2.1', + 'click', + 'cbor2', + 'pyyaml', + ], + entry_points={ + "console_scripts": ["imgtool=imgtool.main:imgtool"] + }, + classifiers=[ + "Programming Language :: Python :: 3", + "Development Status :: 4 - Beta", + "Topic :: Software Development :: Build Tools", + "License :: OSI Approved :: Apache Software License", + ], +) diff --git a/bootloader/mcuboot/scripts/tests/conftest.py b/bootloader/mcuboot/scripts/tests/conftest.py new file mode 100644 index 0000000..797bf25 --- /dev/null +++ b/bootloader/mcuboot/scripts/tests/conftest.py @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import pytest + +# List of tests expected to fail for some reason +XFAILED_TESTS = { + "tests/test_keys.py::test_getpriv[openssl-ed25519]", + "tests/test_keys.py::test_getpriv[openssl-x25519]", + "tests/test_keys.py::test_getpriv[pkcs8-rsa-2048]", + "tests/test_keys.py::test_getpriv[pkcs8-rsa-3072]", + "tests/test_keys.py::test_getpriv[pkcs8-ed25519]", + "tests/test_keys.py::test_getpub[pem-ed25519]", + "tests/test_keys.py::test_sign_verify[x25519]", +} + + +def pytest_runtest_setup(item): + if item.nodeid in XFAILED_TESTS: + pytest.xfail() diff --git a/bootloader/mcuboot/scripts/tests/test_commands.py b/bootloader/mcuboot/scripts/tests/test_commands.py new file mode 100644 index 0000000..458e4e2 --- /dev/null +++ b/bootloader/mcuboot/scripts/tests/test_commands.py @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import pytest + +from click.testing import CliRunner +from imgtool.main import imgtool +from imgtool import imgtool_version + +# all available imgtool commands +COMMANDS = [ + "create", + "dumpinfo", + "getpriv", + "getpub", + "getpubhash", + "keygen", + "sign", + "verify", + "version", +] + + +def test_new_command(): + """Check that no new commands had been added, + so that tests would be updated in such case""" + for cmd in imgtool.commands: + assert cmd in COMMANDS + + +def test_help(): + """Simple test for the imgtool's help option, + mostly just to see that it can be started""" + runner = CliRunner() + + result_short = runner.invoke(imgtool, ["-h"]) + assert result_short.exit_code == 0 + + result_long = runner.invoke(imgtool, ["--help"]) + assert result_long.exit_code == 0 + assert result_short.output == result_long.output + + # by default help should be also produced + result_empty = runner.invoke(imgtool) + assert result_empty.exit_code == 0 + assert result_empty.output == result_short.output + + +def test_version(): + """Check that some version info is produced""" + runner = CliRunner() + + result = runner.invoke(imgtool, ["version"]) + assert result.exit_code == 0 + assert result.output == imgtool_version + "\n" + + result_help = runner.invoke(imgtool, ["version", "-h"]) + assert result_help.exit_code == 0 + assert result_help.output != result.output + + +def test_unknown(): + """Check that unknown command will be handled""" + runner = CliRunner() + + result = runner.invoke(imgtool, ["unknown"]) + assert result.exit_code != 0 + + +@pytest.mark.parametrize("command", COMMANDS) +def test_cmd_help(command): + """Check that all commands have some help""" + runner = CliRunner() + + result_short = runner.invoke(imgtool, [command, "-h"]) + assert result_short.exit_code == 0 + + result_long = runner.invoke(imgtool, [command, "--help"]) + assert result_long.exit_code == 0 + + assert result_short.output == result_long.output + + +@pytest.mark.parametrize("command1", COMMANDS) +@pytest.mark.parametrize("command2", COMMANDS) +def test_cmd_dif_help(command1, command2): + """Check that all commands have some different help""" + runner = CliRunner() + + result_general = runner.invoke(imgtool, "--help") + assert result_general.exit_code == 0 + + result_cmd1 = runner.invoke(imgtool, [command1, "--help"]) + assert result_cmd1.exit_code == 0 + assert result_cmd1.output != result_general.output + + if command1 != command2: + result_cmd2 = runner.invoke(imgtool, [command2, "--help"]) + assert result_cmd2.exit_code == 0 + + assert result_cmd1.output != result_cmd2.output diff --git a/bootloader/mcuboot/scripts/tests/test_keys.py b/bootloader/mcuboot/scripts/tests/test_keys.py new file mode 100644 index 0000000..a812ba2 --- /dev/null +++ b/bootloader/mcuboot/scripts/tests/test_keys.py @@ -0,0 +1,253 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import pytest + +import subprocess +from click.testing import CliRunner +from imgtool import main as imgtool_main +from imgtool.main import imgtool + +# all supported key types for 'keygen' +KEY_TYPES = [*imgtool_main.keygens] +KEY_ENCODINGS = [*imgtool_main.valid_encodings] +PUB_HASH_ENCODINGS = [*imgtool_main.valid_hash_encodings] +PVT_KEY_FORMATS = [*imgtool_main.valid_formats] + +OPENSSL_KEY_TYPES = { + "rsa-2048": "Private-Key: (2048 bit, 2 primes)", + "rsa-3072": "Private-Key: (3072 bit, 2 primes)", + "ecdsa-p256": "Private-Key: (256 bit)", + "ecdsa-p384": "Private-Key: (384 bit)", + "ed25519": "ED25519 Private-Key:", + "x25519": "X25519 Private-Key:", +} + +GEN_KEY_EXT = ".key" +GEN_ANOTHER_KEY_EXT = ".another.key" +PUB_KEY_EXT = ".pub" +PUB_KEY_HASH_EXT = ".pubhash" + + +def tmp_name(tmp_path, key_type, suffix=""): + return tmp_path / (key_type + suffix) + + +@pytest.fixture(scope="session") +def tmp_path_persistent(tmp_path_factory): + return tmp_path_factory.mktemp("keys") + + +@pytest.mark.parametrize("key_type", KEY_TYPES) +def test_keygen(key_type, tmp_path_persistent): + """Generate keys by imgtool""" + + runner = CliRunner() + + gen_key = tmp_name(tmp_path_persistent, key_type, GEN_KEY_EXT) + + assert not gen_key.exists() + result = runner.invoke( + imgtool, ["keygen", "--key", str(gen_key), "--type", key_type] + ) + assert result.exit_code == 0 + assert gen_key.exists() + assert gen_key.stat().st_size > 0 + + # another key + gen_key2 = tmp_name(tmp_path_persistent, key_type, GEN_ANOTHER_KEY_EXT) + + assert str(gen_key2) != str(gen_key) + + assert not gen_key2.exists() + result = runner.invoke( + imgtool, ["keygen", "--key", str(gen_key2), "--type", key_type] + ) + assert result.exit_code == 0 + assert gen_key2.exists() + assert gen_key2.stat().st_size > 0 + + # content must be different + assert gen_key.read_bytes() != gen_key2.read_bytes() + + +@pytest.mark.parametrize("key_type", KEY_TYPES) +def test_keygen_type(key_type, tmp_path_persistent): + """Check generated keys""" + assert key_type in OPENSSL_KEY_TYPES + + gen_key = tmp_name(tmp_path_persistent, key_type, GEN_KEY_EXT) + + result = subprocess.run( + ["openssl", "pkey", "-in", str(gen_key), "-check", "-noout", "-text"], + capture_output=True, + text=True, + ) + assert result.returncode == 0 + assert "Key is valid" in result.stdout + assert OPENSSL_KEY_TYPES[key_type] in result.stdout + + +@pytest.mark.parametrize("key_type", KEY_TYPES) +@pytest.mark.parametrize("format", PVT_KEY_FORMATS) +def test_getpriv(key_type, format, tmp_path_persistent): + """Get private key""" + runner = CliRunner() + + gen_key = tmp_name(tmp_path_persistent, key_type, GEN_KEY_EXT) + + result = runner.invoke( + imgtool, + [ + "getpriv", + "--key", + str(gen_key), + "--format", + format, + ], + ) + assert result.exit_code == 0 + + +@pytest.mark.parametrize("key_type", KEY_TYPES) +@pytest.mark.parametrize("encoding", KEY_ENCODINGS) +def test_getpub(key_type, encoding, tmp_path_persistent): + """Get public key""" + runner = CliRunner() + + gen_key = tmp_name(tmp_path_persistent, key_type, GEN_KEY_EXT) + pub_key = tmp_name(tmp_path_persistent, key_type, PUB_KEY_EXT + + "." + encoding) + + assert not pub_key.exists() + result = runner.invoke( + imgtool, + [ + "getpub", + "--key", + str(gen_key), + "--output", + str(pub_key), + "--encoding", + encoding, + ], + ) + assert result.exit_code == 0 + assert pub_key.exists() + assert pub_key.stat().st_size > 0 + + +@pytest.mark.parametrize("key_type", KEY_TYPES) +@pytest.mark.parametrize("encoding", PUB_HASH_ENCODINGS) +def test_getpubhash(key_type, encoding, tmp_path_persistent): + """Get the hash of the public key""" + runner = CliRunner() + + gen_key = tmp_name(tmp_path_persistent, key_type, GEN_KEY_EXT) + pub_key_hash = tmp_name( + tmp_path_persistent, key_type, PUB_KEY_HASH_EXT + "." + encoding + ) + + assert not pub_key_hash.exists() + result = runner.invoke( + imgtool, + [ + "getpubhash", + "--key", + str(gen_key), + "--output", + str(pub_key_hash), + "--encoding", + encoding, + ], + ) + assert result.exit_code == 0 + assert pub_key_hash.exists() + assert pub_key_hash.stat().st_size > 0 + + +@pytest.mark.parametrize("key_type", KEY_TYPES) +def test_sign_verify(key_type, tmp_path_persistent): + """Test basic sign and verify""" + runner = CliRunner() + + gen_key = tmp_name(tmp_path_persistent, key_type, GEN_KEY_EXT) + wrong_key = tmp_name(tmp_path_persistent, key_type, GEN_ANOTHER_KEY_EXT) + image = tmp_name(tmp_path_persistent, "image", "bin") + image_signed = tmp_name(tmp_path_persistent, "image", "signed") + + with image.open("wb") as f: + f.write(b"\x00" * 1024) + + # not all required arguments are provided + result = runner.invoke( + imgtool, + [ + "sign", + "--key", + str(gen_key), + str(image), + str(image_signed), + ], + ) + assert result.exit_code != 0 + assert not image_signed.exists() + + result = runner.invoke( + imgtool, + [ + "sign", + "--key", + str(gen_key), + "--align", + "16", + "--version", + "1.0.0", + "--header-size", + "0x400", + "--slot-size", + "0x10000", + "--pad-header", + str(image), + str(image_signed), + ], + ) + assert result.exit_code == 0 + assert image_signed.exists() + assert image_signed.stat().st_size > 0 + + # original key can be used to verify a signed image + result = runner.invoke( + imgtool, + [ + "verify", + "--key", + str(gen_key), + str(image_signed), + ], + ) + assert result.exit_code == 0 + + # 'another' key is not valid to verify a signed image + result = runner.invoke( + imgtool, + [ + "verify", + "--key", + str(wrong_key), + str(image_signed), + ], + ) + assert result.exit_code != 0 + image_signed.unlink() diff --git a/bootloader/mcuboot/sim/.gitignore b/bootloader/mcuboot/sim/.gitignore new file mode 100644 index 0000000..9409674 --- /dev/null +++ b/bootloader/mcuboot/sim/.gitignore @@ -0,0 +1,2 @@ +target +.*.swp diff --git a/bootloader/mcuboot/sim/Cargo.toml b/bootloader/mcuboot/sim/Cargo.toml new file mode 100644 index 0000000..7cef823 --- /dev/null +++ b/bootloader/mcuboot/sim/Cargo.toml @@ -0,0 +1,54 @@ +[package] +name = "bootsim" +version = "0.1.0" +authors = ["David Brown "] +edition = "2021" + +[features] +default = [] + +sig-rsa = ["mcuboot-sys/sig-rsa"] +sig-rsa3072 = ["mcuboot-sys/sig-rsa3072"] +sig-ecdsa = ["mcuboot-sys/sig-ecdsa"] +sig-ecdsa-mbedtls = ["mcuboot-sys/sig-ecdsa-mbedtls"] +sig-ecdsa-psa = ["mcuboot-sys/sig-ecdsa-psa", "mcuboot-sys/psa-crypto-api"] +sig-p384 = ["mcuboot-sys/sig-p384"] +sig-ed25519 = ["mcuboot-sys/sig-ed25519"] +overwrite-only = ["mcuboot-sys/overwrite-only"] +swap-move = ["mcuboot-sys/swap-move"] +validate-primary-slot = ["mcuboot-sys/validate-primary-slot"] +enc-rsa = ["mcuboot-sys/enc-rsa"] +enc-aes256-rsa = ["mcuboot-sys/enc-aes256-rsa"] +enc-kw = ["mcuboot-sys/enc-kw"] +enc-aes256-kw = ["mcuboot-sys/enc-aes256-kw"] +enc-ec256 = ["mcuboot-sys/enc-ec256"] +enc-ec256-mbedtls = ["mcuboot-sys/enc-ec256-mbedtls"] +enc-aes256-ec256 = ["mcuboot-sys/enc-aes256-ec256"] +enc-x25519 = ["mcuboot-sys/enc-x25519"] +enc-aes256-x25519 = ["mcuboot-sys/enc-aes256-x25519"] +bootstrap = ["mcuboot-sys/bootstrap"] +multiimage = ["mcuboot-sys/multiimage"] +ram-load = ["mcuboot-sys/ram-load"] +direct-xip = ["mcuboot-sys/direct-xip"] +downgrade-prevention = ["mcuboot-sys/downgrade-prevention"] +max-align-32 = ["mcuboot-sys/max-align-32"] +hw-rollback-protection = ["mcuboot-sys/hw-rollback-protection"] + +[dependencies] +byteorder = "1.4" +libc = "0.2" +rand = { version = "0.8", features = ["small_rng"] } +docopt = "1.1.0" +serde = "1.0" +serde_derive = "1.0" +log = "0.4" +env_logger = "0.9" +simflash = { path = "simflash" } +mcuboot-sys = { path = "mcuboot-sys" } +ring = "0.16.11" +untrusted = "0.9" +pem = "1.0" +cipher = "0.3" +aes = { version = "0.7.4", features = ["ctr"] } +base64 = "0.13.0" +typenum = "1.13.0" diff --git a/bootloader/mcuboot/sim/README.rst b/bootloader/mcuboot/sim/README.rst new file mode 100644 index 0000000..fb9012b --- /dev/null +++ b/bootloader/mcuboot/sim/README.rst @@ -0,0 +1,61 @@ +MCUboot simulator +################# + +This is a small simulator designed to exercise the mcuboot upgrade +code, specifically testing untimely reset scenarios to make sure the +code is robust. + +Prerequisites +============= + +The simulator is written in Rust_, and you will need to install it to +build it. The installation_ page describes this process. The +simulator can be built with the stable release of Rust. + +.. _Rust: https://www.rust-lang.org/ + +.. _installation: https://www.rust-lang.org/en-US/install.html + +Dependent code +-------------- + +The simulator depends on some external modules. These are stored as +submodules within git. To fetch these dependencies the first time:: + + $ git submodule update --init --recursive + +will clone and check out these trees in the appropriate place. + +Testing +======= + +The tests are written as unit tests in Rust, and can be built and run +automatically:: + + $ cargo test + +this should download and compile the necessary dependencies, compile +the relevant modules from mcuboot, build the simulator, and run the +tests. + +There are several different features you can test. For example, +testing RSA signatures can be done with:: + + $ cargo test --features sig-rsa + +For a complete list of features, see Cargo.toml. + +Debugging +========= + +If the simulator indicates a failure, you can turn on additional +logging by setting ``RUST_LOG=warn`` or ``RUST_LOG=error`` in the +environment:: + + $ RUST_LOG=warn ./target/release/bootsim run ... + +It is also possible to run specific tests, for example:: + + $ cargo test -- basic_revert + +which will run only the `basic_revert` test. diff --git a/bootloader/mcuboot/sim/mcuboot-sys/.gitignore b/bootloader/mcuboot/sim/mcuboot-sys/.gitignore new file mode 100644 index 0000000..03314f7 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/.gitignore @@ -0,0 +1 @@ +Cargo.lock diff --git a/bootloader/mcuboot/sim/mcuboot-sys/Cargo.toml b/bootloader/mcuboot/sim/mcuboot-sys/Cargo.toml new file mode 100644 index 0000000..ab97bbf --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/Cargo.toml @@ -0,0 +1,104 @@ +[package] +name = "mcuboot-sys" +version = "0.1.0" +authors = ["David Brown "] +description = "A simple wrapper around the mcuboot code." +build = "build.rs" +publish = false +edition = "2021" + +[features] +# By default, build with simplistic signature verification. +default = [] + +# Verify RSA signatures. Note that at this time, the C code will not +# compile with both sig-rsa and sig-ecdsa enabled. +sig-rsa = [] + +# Verify RSA-3072 signatures. +sig-rsa3072 = [] + +# Verify ECDSA (secp256r1) signatures. +sig-ecdsa = [] + +# Verify ECDSA (secp256r1) signatures using mbed TLS +sig-ecdsa-mbedtls = [] + +# Verify ECDSA (p256 or p384) signatures using PSA Crypto API +sig-ecdsa-psa = [] + +# Enable P384 Curve support (instead of P256) for PSA Crypto +sig-p384 = [] + +# Verify ED25519 signatures. +sig-ed25519 = [] + +# Overwrite only upgrade +overwrite-only = [] + +swap-move = [] + +# Disable validation of the primary slot +validate-primary-slot = [] + +# Encrypt image in the secondary slot using RSA-OAEP-2048 +enc-rsa = [] + +# Encrypt image in the secondary slot using AES-256-CTR and RSA-OAEP-2048 +enc-aes256-rsa = [] + +# Encrypt image in the secondary slot using AES-KW-128 +enc-kw = [] + +# Encrypt image in the secondary slot using AES-256-CTR and AES-KW-256 +enc-aes256-kw = [] + +# Encrypt image in the secondary slot using ECIES-P256 +enc-ec256 = [] + +# Encrypt image in the secondary slot using AES-256-CTR and ECIES-P256 +enc-aes256-ec256 = [] + +# Encrypt image in the secondary slot using ECIES-P256 using Mbed TLS +enc-ec256-mbedtls = [] + +# Encrypt image in the secondary slot using ECIES-X25519 +enc-x25519 = [] + +# Encrypt image in the secondary slot using AES-256-CTR and ECIES-X25519 +enc-aes256-x25519 = [] + +# Allow bootstrapping an empty/invalid primary slot from a valid secondary slot +bootstrap = [] + +# Support multiple images (currently 2 instead of 1). +multiimage = [] + +# Support simulation of ram-loading. No swaps are performed, and the +# image is copied to RAM before loading it. +ram-load = [] + +# Support simulation of direct XIP. No swaps are performed, the image +# is directly executed out of whichever partition contains the most +# appropriate image. +direct-xip = [] + +# Check (in software) against version downgrades. +downgrade-prevention = [] + +# Support images with 32-byte maximum write alignment value. +max-align-32 = [] + +# Enable hardware rollback protection +hw-rollback-protection = [] + +# Enable the PSA Crypto APIs where supported for cryptography related operations. +psa-crypto-api = [] + +[build-dependencies] +cc = "1.0.25" + +[dependencies] +libc = "0.2" +log = "0.4" +simflash = { path = "../simflash" } diff --git a/bootloader/mcuboot/sim/mcuboot-sys/build.rs b/bootloader/mcuboot/sim/mcuboot-sys/build.rs new file mode 100644 index 0000000..ea17d80 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/build.rs @@ -0,0 +1,532 @@ +// Build mcuboot as a library, based on the requested features. + +extern crate cc; + +use std::collections::BTreeSet; +use std::env; +use std::fs; +use std::io; +use std::path::{Path, PathBuf}; + +fn main() { + // Feature flags. + let psa_crypto_api = env::var("CARGO_FEATURE_PSA_CRYPTO_API").is_ok(); + let sig_rsa = env::var("CARGO_FEATURE_SIG_RSA").is_ok(); + let sig_rsa3072 = env::var("CARGO_FEATURE_SIG_RSA3072").is_ok(); + let sig_ecdsa = env::var("CARGO_FEATURE_SIG_ECDSA").is_ok(); + let sig_ecdsa_mbedtls = env::var("CARGO_FEATURE_SIG_ECDSA_MBEDTLS").is_ok(); + let sig_ecdsa_psa = env::var("CARGO_FEATURE_SIG_ECDSA_PSA").is_ok(); + let sig_p384 = env::var("CARGO_FEATURE_SIG_P384").is_ok(); + let sig_ed25519 = env::var("CARGO_FEATURE_SIG_ED25519").is_ok(); + let overwrite_only = env::var("CARGO_FEATURE_OVERWRITE_ONLY").is_ok(); + let swap_move = env::var("CARGO_FEATURE_SWAP_MOVE").is_ok(); + let validate_primary_slot = + env::var("CARGO_FEATURE_VALIDATE_PRIMARY_SLOT").is_ok(); + let enc_rsa = env::var("CARGO_FEATURE_ENC_RSA").is_ok(); + let enc_aes256_rsa = env::var("CARGO_FEATURE_ENC_AES256_RSA").is_ok(); + let enc_kw = env::var("CARGO_FEATURE_ENC_KW").is_ok(); + let enc_aes256_kw = env::var("CARGO_FEATURE_ENC_AES256_KW").is_ok(); + let enc_ec256 = env::var("CARGO_FEATURE_ENC_EC256").is_ok(); + let enc_ec256_mbedtls = env::var("CARGO_FEATURE_ENC_EC256_MBEDTLS").is_ok(); + let enc_aes256_ec256 = env::var("CARGO_FEATURE_ENC_AES256_EC256").is_ok(); + let enc_x25519 = env::var("CARGO_FEATURE_ENC_X25519").is_ok(); + let enc_aes256_x25519 = env::var("CARGO_FEATURE_ENC_AES256_X25519").is_ok(); + let bootstrap = env::var("CARGO_FEATURE_BOOTSTRAP").is_ok(); + let multiimage = env::var("CARGO_FEATURE_MULTIIMAGE").is_ok(); + let downgrade_prevention = env::var("CARGO_FEATURE_DOWNGRADE_PREVENTION").is_ok(); + let ram_load = env::var("CARGO_FEATURE_RAM_LOAD").is_ok(); + let direct_xip = env::var("CARGO_FEATURE_DIRECT_XIP").is_ok(); + let max_align_32 = env::var("CARGO_FEATURE_MAX_ALIGN_32").is_ok(); + let hw_rollback_protection = env::var("CARGO_FEATURE_HW_ROLLBACK_PROTECTION").is_ok(); + + let mut conf = CachedBuild::new(); + conf.conf.define("__BOOTSIM__", None); + conf.conf.define("MCUBOOT_HAVE_LOGGING", None); + conf.conf.define("MCUBOOT_USE_FLASH_AREA_GET_SECTORS", None); + conf.conf.define("MCUBOOT_HAVE_ASSERT_H", None); + conf.conf.define("MCUBOOT_MAX_IMG_SECTORS", Some("128")); + + if max_align_32 { + conf.conf.define("MCUBOOT_BOOT_MAX_ALIGN", Some("32")); + } else { + conf.conf.define("MCUBOOT_BOOT_MAX_ALIGN", Some("8")); + } + + conf.conf.define("MCUBOOT_IMAGE_NUMBER", Some(if multiimage { "2" } else { "1" })); + + if downgrade_prevention && !overwrite_only { + panic!("Downgrade prevention requires overwrite only"); + } + + if bootstrap { + conf.conf.define("MCUBOOT_BOOTSTRAP", None); + conf.conf.define("MCUBOOT_OVERWRITE_ONLY_FAST", None); + } + + if validate_primary_slot { + conf.conf.define("MCUBOOT_VALIDATE_PRIMARY_SLOT", None); + } + + if downgrade_prevention { + conf.conf.define("MCUBOOT_DOWNGRADE_PREVENTION", None); + } + + if ram_load { + conf.conf.define("MCUBOOT_RAM_LOAD", None); + } + + if direct_xip { + conf.conf.define("MCUBOOT_DIRECT_XIP", None); + } + + if hw_rollback_protection { + conf.conf.define("MCUBOOT_HW_ROLLBACK_PROT", None); + conf.file("csupport/security_cnt.c"); + } + + // Currently no more than one sig type can be used simultaneously. + if vec![sig_rsa, sig_rsa3072, sig_ecdsa, sig_ed25519].iter() + .fold(0, |sum, &v| sum + v as i32) > 1 { + panic!("mcuboot does not support more than one sig type at the same time"); + } + + if psa_crypto_api { + if sig_ecdsa || enc_ec256 || enc_x25519 || + enc_aes256_ec256 || sig_ecdsa_mbedtls || enc_aes256_x25519 || + enc_kw || enc_aes256_kw { + conf.file("csupport/psa_crypto_init_stub.c"); + } else { + conf.conf.define("MCUBOOT_USE_PSA_CRYPTO", None); + conf.file("../../ext/mbedtls/library/aes.c"); + conf.file("../../ext/mbedtls/library/aesni.c"); + conf.file("../../ext/mbedtls/library/aria.c"); + conf.file("../../ext/mbedtls/library/asn1write.c"); + conf.file("../../ext/mbedtls/library/base64.c"); + conf.file("../../ext/mbedtls/library/camellia.c"); + conf.file("../../ext/mbedtls/library/ccm.c"); + conf.file("../../ext/mbedtls/library/chacha20.c"); + conf.file("../../ext/mbedtls/library/chachapoly.c"); + conf.file("../../ext/mbedtls/library/cipher.c"); + conf.file("../../ext/mbedtls/library/cipher_wrap.c"); + conf.file("../../ext/mbedtls/library/ctr_drbg.c"); + conf.file("../../ext/mbedtls/library/des.c"); + conf.file("../../ext/mbedtls/library/ecdsa.c"); + conf.file("../../ext/mbedtls/library/ecp.c"); + conf.file("../../ext/mbedtls/library/ecp_curves.c"); + conf.file("../../ext/mbedtls/library/entropy.c"); + conf.file("../../ext/mbedtls/library/entropy_poll.c"); + conf.file("../../ext/mbedtls/library/gcm.c"); + conf.file("../../ext/mbedtls/library/md5.c"); + conf.file("../../ext/mbedtls/library/nist_kw.c"); + conf.file("../../ext/mbedtls/library/oid.c"); + conf.file("../../ext/mbedtls/library/pem.c"); + conf.file("../../ext/mbedtls/library/pk.c"); + conf.file("../../ext/mbedtls/library/pkcs5.c"); + conf.file("../../ext/mbedtls/library/pkcs12.c"); + conf.file("../../ext/mbedtls/library/pkparse.c"); + conf.file("../../ext/mbedtls/library/pk_wrap.c"); + conf.file("../../ext/mbedtls/library/pkwrite.c"); + conf.file("../../ext/mbedtls/library/poly1305.c"); + conf.file("../../ext/mbedtls/library/psa_crypto.c"); + conf.file("../../ext/mbedtls/library/psa_crypto_cipher.c"); + conf.file("../../ext/mbedtls/library/psa_crypto_client.c"); + conf.file("../../ext/mbedtls/library/psa_crypto_driver_wrappers.c"); + conf.file("../../ext/mbedtls/library/psa_crypto_ecp.c"); + conf.file("../../ext/mbedtls/library/psa_crypto_hash.c"); + conf.file("../../ext/mbedtls/library/psa_crypto_mac.c"); + conf.file("../../ext/mbedtls/library/psa_crypto_rsa.c"); + conf.file("../../ext/mbedtls/library/psa_crypto_slot_management.c"); + conf.file("../../ext/mbedtls/library/psa_crypto_storage.c"); + conf.file("../../ext/mbedtls/library/psa_its_file.c"); + conf.file("../../ext/mbedtls/library/ripemd160.c"); + conf.file("../../ext/mbedtls/library/rsa_alt_helpers.c"); + conf.file("../../ext/mbedtls/library/sha1.c"); + conf.file("../../ext/mbedtls/library/sha512.c"); + conf.file("../../ext/mbedtls/tests/src/random.c"); + conf.conf.include("../../ext/mbedtls/library"); + } + + conf.conf.include("../../ext/mbedtls/tests/include/"); + conf.file("../../ext/mbedtls/tests/src/fake_external_rng_for_test.c"); + } + + if sig_rsa || sig_rsa3072 { + conf.conf.define("MCUBOOT_SIGN_RSA", None); + // The Kconfig style defines must be added here as well because + // they are used internally by "config-rsa.h" + if sig_rsa { + conf.conf.define("MCUBOOT_SIGN_RSA_LEN", "2048"); + conf.conf.define("CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN", "2048"); + } else { + conf.conf.define("MCUBOOT_SIGN_RSA_LEN", "3072"); + conf.conf.define("CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN", "3072"); + } + conf.conf.define("MCUBOOT_USE_MBED_TLS", None); + + conf.conf.include("../../ext/mbedtls/include"); + conf.file("../../ext/mbedtls/library/sha256.c"); + conf.file("csupport/keys.c"); + + conf.file("../../ext/mbedtls/library/rsa.c"); + conf.file("../../ext/mbedtls/library/bignum.c"); + conf.file("../../ext/mbedtls/library/platform.c"); + conf.file("../../ext/mbedtls/library/platform_util.c"); + conf.file("../../ext/mbedtls/library/asn1parse.c"); + conf.file("../../ext/mbedtls/library/md.c"); + + } else if sig_ecdsa { + conf.conf.define("MCUBOOT_SIGN_EC256", None); + conf.conf.define("MCUBOOT_USE_TINYCRYPT", None); + + if !enc_kw { + conf.conf.include("../../ext/mbedtls/include"); + } + conf.conf.include("../../ext/tinycrypt/lib/include"); + + conf.file("csupport/keys.c"); + + conf.file("../../ext/tinycrypt/lib/source/utils.c"); + conf.file("../../ext/tinycrypt/lib/source/sha256.c"); + conf.file("../../ext/tinycrypt/lib/source/ecc.c"); + conf.file("../../ext/tinycrypt/lib/source/ecc_dsa.c"); + conf.file("../../ext/tinycrypt/lib/source/ecc_platform_specific.c"); + conf.file("../../ext/mbedtls/library/platform_util.c"); + conf.file("../../ext/mbedtls/library/asn1parse.c"); + } else if sig_ecdsa_mbedtls { + conf.conf.define("MCUBOOT_SIGN_EC256", None); + conf.conf.define("MCUBOOT_USE_MBED_TLS", None); + + conf.conf.include("../../ext/mbedtls/include"); + conf.file("../../ext/mbedtls/library/sha256.c"); + conf.file("csupport/keys.c"); + + conf.file("../../ext/mbedtls/library/asn1parse.c"); + conf.file("../../ext/mbedtls/library/bignum.c"); + conf.file("../../ext/mbedtls/library/ecdsa.c"); + conf.file("../../ext/mbedtls/library/ecp.c"); + conf.file("../../ext/mbedtls/library/ecp_curves.c"); + conf.file("../../ext/mbedtls/library/platform.c"); + conf.file("../../ext/mbedtls/library/platform_util.c"); + } else if sig_ecdsa_psa { + conf.conf.include("../../ext/mbedtls/include"); + + if sig_p384 { + conf.conf.define("MCUBOOT_SIGN_EC384", None); + conf.file("../../ext/mbedtls/library/sha512.c"); + } else { + conf.conf.define("MCUBOOT_SIGN_EC256", None); + conf.file("../../ext/mbedtls/library/sha256.c"); + } + + conf.file("csupport/keys.c"); + conf.file("../../ext/mbedtls/library/asn1parse.c"); + conf.file("../../ext/mbedtls/library/bignum.c"); + conf.file("../../ext/mbedtls/library/ecp.c"); + conf.file("../../ext/mbedtls/library/ecp_curves.c"); + conf.file("../../ext/mbedtls/library/platform.c"); + conf.file("../../ext/mbedtls/library/platform_util.c"); + } else if sig_ed25519 { + conf.conf.define("MCUBOOT_SIGN_ED25519", None); + conf.conf.define("MCUBOOT_USE_TINYCRYPT", None); + + conf.conf.include("../../ext/tinycrypt/lib/include"); + conf.conf.include("../../ext/tinycrypt-sha512/lib/include"); + conf.conf.include("../../ext/mbedtls/include"); + conf.file("../../ext/tinycrypt/lib/source/sha256.c"); + conf.file("../../ext/tinycrypt-sha512/lib/source/sha512.c"); + conf.file("../../ext/tinycrypt/lib/source/utils.c"); + conf.file("csupport/keys.c"); + conf.file("../../ext/fiat/src/curve25519.c"); + conf.file("../../ext/mbedtls/library/platform_util.c"); + conf.file("../../ext/mbedtls/library/asn1parse.c"); + } else if !enc_ec256 && !enc_x25519 { + // No signature type, only sha256 validation. The default + // configuration file bundled with mbedTLS is sufficient. + // When using ECIES-P256 rely on Tinycrypt. + conf.conf.define("MCUBOOT_USE_MBED_TLS", None); + conf.conf.include("../../ext/mbedtls/include"); + conf.file("../../ext/mbedtls/library/sha256.c"); + conf.file("../../ext/mbedtls/library/platform_util.c"); + } + + if overwrite_only { + conf.conf.define("MCUBOOT_OVERWRITE_ONLY", None); + } + + if swap_move { + conf.conf.define("MCUBOOT_SWAP_USING_MOVE", None); + } else if !overwrite_only && !direct_xip && !ram_load { + conf.conf.define("CONFIG_BOOT_SWAP_USING_SCRATCH", None); + conf.conf.define("MCUBOOT_SWAP_USING_SCRATCH", None); + } + + if enc_rsa || enc_aes256_rsa { + if enc_aes256_rsa { + conf.conf.define("MCUBOOT_AES_256", None); + } + conf.conf.define("MCUBOOT_ENCRYPT_RSA", None); + conf.conf.define("MCUBOOT_ENC_IMAGES", None); + conf.conf.define("MCUBOOT_USE_MBED_TLS", None); + + conf.file("../../boot/bootutil/src/encrypted.c"); + conf.file("csupport/keys.c"); + + conf.conf.include("../../ext/mbedtls/include"); + conf.conf.include("../../ext/mbedtls/library"); + conf.file("../../ext/mbedtls/library/sha256.c"); + + conf.file("../../ext/mbedtls/library/platform.c"); + conf.file("../../ext/mbedtls/library/platform_util.c"); + conf.file("../../ext/mbedtls/library/rsa.c"); + conf.file("../../ext/mbedtls/library/rsa_alt_helpers.c"); + conf.file("../../ext/mbedtls/library/md.c"); + conf.file("../../ext/mbedtls/library/aes.c"); + conf.file("../../ext/mbedtls/library/bignum.c"); + conf.file("../../ext/mbedtls/library/asn1parse.c"); + } + + if enc_kw || enc_aes256_kw { + if enc_aes256_kw { + conf.conf.define("MCUBOOT_AES_256", None); + } + conf.conf.define("MCUBOOT_ENCRYPT_KW", None); + conf.conf.define("MCUBOOT_ENC_IMAGES", None); + + conf.file("../../boot/bootutil/src/encrypted.c"); + conf.file("csupport/keys.c"); + + if sig_rsa || sig_rsa3072 { + conf.file("../../ext/mbedtls/library/sha256.c"); + } + + /* Simulator uses Mbed-TLS to wrap keys */ + conf.conf.include("../../ext/mbedtls/include"); + conf.file("../../ext/mbedtls/library/platform.c"); + conf.conf.include("../../ext/mbedtls/library"); + conf.file("../../ext/mbedtls/library/platform_util.c"); + conf.file("../../ext/mbedtls/library/nist_kw.c"); + conf.file("../../ext/mbedtls/library/cipher.c"); + conf.file("../../ext/mbedtls/library/cipher_wrap.c"); + conf.file("../../ext/mbedtls/library/aes.c"); + + if sig_ecdsa { + conf.conf.define("MCUBOOT_USE_TINYCRYPT", None); + + conf.conf.include("../../ext/tinycrypt/lib/include"); + + conf.file("../../ext/tinycrypt/lib/source/utils.c"); + conf.file("../../ext/tinycrypt/lib/source/sha256.c"); + conf.file("../../ext/tinycrypt/lib/source/aes_encrypt.c"); + conf.file("../../ext/tinycrypt/lib/source/aes_decrypt.c"); + conf.file("../../ext/tinycrypt/lib/source/ctr_mode.c"); + } + + if sig_ed25519 { + panic!("ed25519 does not support image encryption with KW yet"); + } + } + + if enc_ec256 { + conf.conf.define("MCUBOOT_ENCRYPT_EC256", None); + conf.conf.define("MCUBOOT_ENC_IMAGES", None); + conf.conf.define("MCUBOOT_USE_TINYCRYPT", None); + conf.conf.define("MCUBOOT_SWAP_SAVE_ENCTLV", None); + + conf.file("../../boot/bootutil/src/encrypted.c"); + conf.file("csupport/keys.c"); + + conf.conf.include("../../ext/mbedtls/include"); + conf.conf.include("../../ext/tinycrypt/lib/include"); + + /* FIXME: fail with other signature schemes ? */ + + conf.file("../../ext/tinycrypt/lib/source/utils.c"); + conf.file("../../ext/tinycrypt/lib/source/sha256.c"); + conf.file("../../ext/tinycrypt/lib/source/ecc.c"); + conf.file("../../ext/tinycrypt/lib/source/ecc_dsa.c"); + conf.file("../../ext/tinycrypt/lib/source/ecc_platform_specific.c"); + + conf.file("../../ext/mbedtls/library/platform_util.c"); + conf.file("../../ext/mbedtls/library/asn1parse.c"); + + conf.file("../../ext/tinycrypt/lib/source/aes_encrypt.c"); + conf.file("../../ext/tinycrypt/lib/source/aes_decrypt.c"); + conf.file("../../ext/tinycrypt/lib/source/ctr_mode.c"); + conf.file("../../ext/tinycrypt/lib/source/hmac.c"); + conf.file("../../ext/tinycrypt/lib/source/ecc_dh.c"); + } else if enc_ec256_mbedtls || enc_aes256_ec256 { + if enc_aes256_ec256 { + conf.conf.define("MCUBOOT_AES_256", None); + } + conf.conf.define("MCUBOOT_ENCRYPT_EC256", None); + conf.conf.define("MCUBOOT_ENC_IMAGES", None); + conf.conf.define("MCUBOOT_USE_MBED_TLS", None); + conf.conf.define("MCUBOOT_SWAP_SAVE_ENCTLV", None); + + conf.conf.include("../../ext/mbedtls/include"); + + conf.file("../../boot/bootutil/src/encrypted.c"); + conf.file("../../ext/mbedtls/library/sha256.c"); + conf.file("../../ext/mbedtls/library/asn1parse.c"); + conf.file("../../ext/mbedtls/library/bignum.c"); + conf.file("../../ext/mbedtls/library/ecdh.c"); + conf.file("../../ext/mbedtls/library/md.c"); + conf.file("../../ext/mbedtls/library/aes.c"); + conf.file("../../ext/mbedtls/library/ecp.c"); + conf.file("../../ext/mbedtls/library/ecp_curves.c"); + conf.file("../../ext/mbedtls/library/platform.c"); + conf.file("../../ext/mbedtls/library/platform_util.c"); + conf.file("csupport/keys.c"); + } + + if enc_x25519 { + conf.conf.define("MCUBOOT_ENCRYPT_X25519", None); + conf.conf.define("MCUBOOT_ENC_IMAGES", None); + conf.conf.define("MCUBOOT_USE_TINYCRYPT", None); + conf.conf.define("MCUBOOT_SWAP_SAVE_ENCTLV", None); + + conf.file("../../boot/bootutil/src/encrypted.c"); + conf.file("csupport/keys.c"); + + conf.conf.include("../../ext/mbedtls/include"); + conf.conf.include("../../ext/tinycrypt/lib/include"); + conf.conf.include("../../ext/tinycrypt-sha512/lib/include"); + + conf.file("../../ext/fiat/src/curve25519.c"); + + conf.file("../../ext/tinycrypt/lib/source/utils.c"); + conf.file("../../ext/tinycrypt/lib/source/sha256.c"); + + conf.file("../../ext/mbedtls/library/platform_util.c"); + conf.file("../../ext/mbedtls/library/asn1parse.c"); + + conf.file("../../ext/tinycrypt/lib/source/aes_encrypt.c"); + conf.file("../../ext/tinycrypt/lib/source/aes_decrypt.c"); + conf.file("../../ext/tinycrypt/lib/source/ctr_mode.c"); + conf.file("../../ext/tinycrypt/lib/source/hmac.c"); + } + + else if enc_aes256_x25519 { + conf.conf.define("MCUBOOT_AES_256", None); + conf.conf.define("MCUBOOT_ENCRYPT_X25519", None); + conf.conf.define("MCUBOOT_ENC_IMAGES", None); + conf.conf.define("MCUBOOT_USE_MBED_TLS", None); + conf.conf.define("MCUBOOT_SWAP_SAVE_ENCTLV", None); + + conf.file("../../boot/bootutil/src/encrypted.c"); + conf.file("csupport/keys.c"); + + conf.conf.include("../../ext/mbedtls/include"); + conf.file("../../ext/fiat/src/curve25519.c"); + conf.file("../../ext/mbedtls/library/asn1parse.c"); + conf.file("../../ext/mbedtls/library/platform.c"); + conf.file("../../ext/mbedtls/library/platform_util.c"); + conf.file("../../ext/mbedtls/library/aes.c"); + conf.file("../../ext/mbedtls/library/sha256.c"); + conf.file("../../ext/mbedtls/library/md.c"); + conf.file("../../ext/mbedtls/library/sha512.c"); + } + + if sig_rsa && enc_kw { + conf.conf.define("MBEDTLS_CONFIG_FILE", Some("")); + } else if sig_rsa || sig_rsa3072 || enc_rsa || enc_aes256_rsa { + conf.conf.define("MBEDTLS_CONFIG_FILE", Some("")); + } else if sig_ecdsa_mbedtls || enc_ec256_mbedtls || enc_aes256_ec256 { + conf.conf.define("MBEDTLS_CONFIG_FILE", Some("")); + } else if (sig_ecdsa || enc_ec256) && !enc_kw { + conf.conf.define("MBEDTLS_CONFIG_FILE", Some("")); + } else if sig_ed25519 || enc_x25519 { + conf.conf.define("MBEDTLS_CONFIG_FILE", Some("")); + } else if enc_kw || enc_aes256_kw { + conf.conf.define("MBEDTLS_CONFIG_FILE", Some("")); + } else if enc_aes256_x25519 { + conf.conf.define("MBEDTLS_CONFIG_FILE", Some("")); + } else if sig_ecdsa_psa { + conf.conf.define("MBEDTLS_CONFIG_FILE", Some("")); + } + + conf.file("../../boot/bootutil/src/image_validate.c"); + if sig_rsa || sig_rsa3072 { + conf.file("../../boot/bootutil/src/image_rsa.c"); + } else if sig_ecdsa || sig_ecdsa_mbedtls || sig_ecdsa_psa { + conf.file("../../boot/bootutil/src/image_ecdsa.c"); + } else if sig_ed25519 { + conf.file("../../boot/bootutil/src/image_ed25519.c"); + } + + conf.file("../../boot/bootutil/src/loader.c"); + conf.file("../../boot/bootutil/src/swap_misc.c"); + conf.file("../../boot/bootutil/src/swap_scratch.c"); + conf.file("../../boot/bootutil/src/swap_move.c"); + conf.file("../../boot/bootutil/src/caps.c"); + conf.file("../../boot/bootutil/src/bootutil_misc.c"); + conf.file("../../boot/bootutil/src/bootutil_public.c"); + conf.file("../../boot/bootutil/src/tlv.c"); + conf.file("../../boot/bootutil/src/fault_injection_hardening.c"); + conf.file("csupport/run.c"); + conf.conf.include("../../boot/bootutil/include"); + conf.conf.include("csupport"); + conf.conf.debug(true); + conf.conf.flag("-Wall"); + conf.conf.flag("-Werror"); + + // FIXME: travis-ci still uses gcc 4.8.4 which defaults to std=gnu90. + // It has incomplete std=c11 and std=c99 support but std=c99 was checked + // to build correctly so leaving it here to updated in the future... + conf.conf.flag("-std=c99"); + + conf.conf.compile("libbootutil.a"); + + walk_dir("../../boot").unwrap(); + walk_dir("../../ext/tinycrypt/lib/source").unwrap(); + walk_dir("../../ext/mbedtls-asn1").unwrap(); + walk_dir("csupport").unwrap(); + walk_dir("../../ext/mbedtls/include").unwrap(); + walk_dir("../../ext/mbedtls/library").unwrap(); +} + +// Output the names of all files within a directory so that Cargo knows when to rebuild. +fn walk_dir>(path: P) -> io::Result<()> { + for ent in fs::read_dir(path.as_ref())? { + let ent = ent?; + let p = ent.path(); + if p.is_dir() { + walk_dir(p)?; + } else { + // Note that non-utf8 names will fail. + let name = p.to_str().unwrap(); + if name.ends_with(".c") || name.ends_with(".h") { + println!("cargo:rerun-if-changed={}", name); + } + } + } + + Ok(()) +} + +/// Wrap the cc::Build type so that we can make sure that files are only added a single time. +/// Other methods can be passed through as needed. +struct CachedBuild { + conf: cc::Build, + seen: BTreeSet, +} + +impl CachedBuild { + fn new() -> CachedBuild { + CachedBuild { + conf: cc::Build::new(), + seen: BTreeSet::new(), + } + } + + /// Works like `file` in the Build, but doesn't add a file if the same path has already been + /// given. + fn file>(&mut self, p: P) -> &mut CachedBuild { + let p = p.as_ref(); + if !self.seen.contains(p) { + self.conf.file(p); + self.seen.insert(p.to_owned()); + } + self + } +} diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/bootsim.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/bootsim.h new file mode 100644 index 0000000..36e4028 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/bootsim.h @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: Apache-2.0 +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_BOOTSIM_ +#define H_BOOTSIM_ + +#include "mcuboot_config/mcuboot_assert.h" + +#endif diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-add-psa-crypto.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-add-psa-crypto.h new file mode 100644 index 0000000..d825be1 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-add-psa-crypto.h @@ -0,0 +1,47 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2023 Arm Limited + */ + +#ifndef MCUBOOT_MBEDTLS_CONFIG_ADD_PSA_CRYPTO_H +#define MCUBOOT_MBEDTLS_CONFIG_ADD_PSA_CRYPTO_H + +#include "mbedtls/build_info.h" + +/* Enable PSA Crypto Core without support for the permanent storage + * Don't define MBEDTLS_PSA_CRYPTO_STORAGE_C to make sure that support + * for permanent keys is not enabled, as it is not usually required during boot + */ +#define MBEDTLS_PSA_CRYPTO_C +#define MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG + +#if defined(MCUBOOT_ENCRYPT_RSA) || defined(MCUBOOT_SIGN_RSA) + #define MBEDTLS_PK_C + #define MBEDTLS_CTR_DRBG_C + #define MBEDTLS_CIPHER_C + #define MBEDTLS_ENTROPY_C + #define MBEDTLS_PK_PARSE_C + #define MBEDTLS_PK_WRITE_C +#endif /* MCUBOOT_ENCRYPT_RSA || MCUBOOT_SIGN_RSA */ + +#if defined(MCUBOOT_ENCRYPT_EC256) || defined(MCUBOOT_ENCRYPT_X25519) + #define MBEDTLS_PLATFORM_FREE_MACRO free + #define MBEDTLS_PLATFORM_CALLOC_MACRO calloc +#endif /* MCUBOOT_ENCRYPT_EC256 || MCUBOOT_ENCRYPT_X25519 */ + +#if !defined(MCUBOOT_ENCRYPT_X25519) + #define MBEDTLS_PSA_BUILTIN_CIPHER 1 +#endif /* MCUBOOT_ENCRYPT_X25519 */ + +#if defined(MCUBOOT_ENCRYPT_KW) + #define MBEDTLS_PSA_CRYPTO_CONFIG + #define MBEDTLS_POLY1305_C +#endif /* MCUBOOT_ENCRYPT_KW */ + +#if MBEDTLS_VERSION_NUMBER == 0x03000000 +/* This PSA define is available only with more recent versions of 3.x */ +#define PSA_KEY_ID_NULL ((psa_key_id_t)0) // not overly happy with this being here +#endif /* MBEDTLS_VERSION_NUMBER == 0x03000000 */ + +#endif /* MCUBOOT_MBEDTLS_CONFIG_ADD_PSA_CRYPTO_H */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-asn1.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-asn1.h new file mode 100644 index 0000000..b9d70df --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-asn1.h @@ -0,0 +1,44 @@ +/* + * Configuration of mbedTLS containing only the ASN.1 parser. + * + * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - RSA or ECDSA signature verification + */ + +#ifndef MBEDTLS_CONFIG_ASN1_H +#define MBEDTLS_CONFIG_ASN1_H + +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +/* mbed TLS modules */ +#define MBEDTLS_ASN1_PARSE_C +// #define MBEDTLS_ASN1_WRITE_C +// #define MBEDTLS_BIGNUM_C +// #define MBEDTLS_MD_C +// #define MBEDTLS_OID_C +// #define MBEDTLS_SHA256_C + +#endif /* MBEDTLS_CONFIG_ASN1_H */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-ec-psa.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-ec-psa.h new file mode 100644 index 0000000..5dbb495 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-ec-psa.h @@ -0,0 +1,35 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2023 Arm Limited + */ + +#ifndef MCUBOOT_PSA_CRYPTO_CONFIG_ECDSA +#define MCUBOOT_PSA_CRYPTO_CONFIG_ECDSA + +#if defined(MCUBOOT_USE_PSA_CRYPTO) +#include "config-add-psa-crypto.h" +#endif + +#define MBEDTLS_ECP_C +#define MBEDTLS_ECP_NIST_OPTIM +#define MBEDTLS_ECDSA_C + +/* mbed TLS modules */ +#define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_ASN1_WRITE_C +#define MBEDTLS_AES_C +#define MBEDTLS_BIGNUM_C +#define MBEDTLS_MD_C +#define MBEDTLS_OID_C +#if defined(MCUBOOT_SIGN_EC384) +#define MBEDTLS_SHA384_C +#define MBEDTLS_SHA512_C +#define MBEDTLS_ECP_DP_SECP384R1_ENABLED +#else +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA224_C +#define MBEDTLS_ECP_DP_SECP256R1_ENABLED +#endif /* MCUBOOT_SIGN_EC384 */ + +#endif /* MCUBOOT_PSA_CRYPTO_CONFIG_ECDSA */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-ec.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-ec.h new file mode 100644 index 0000000..2ce3b8f --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-ec.h @@ -0,0 +1,95 @@ +/* + * Minimal configuration for using TLS in the bootloader + * + * Copyright (C) 2006-2021, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - RSA or ECDSA signature verification + */ + +#ifndef MCUBOOT_MBEDTLS_CONFIG_ECDSA +#define MCUBOOT_MBEDTLS_CONFIG_ECDSA + +#ifdef CONFIG_MCUBOOT_SERIAL +/* Mcuboot uses mbedts-base64 for serial protocol encoding. */ +#define MBEDTLS_BASE64_C +#endif + +/* System support */ +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C +#define MBEDTLS_NO_PLATFORM_ENTROPY +#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/* STD functions */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +#define MBEDTLS_PLATFORM_EXIT_ALT +#define MBEDTLS_PLATFORM_PRINTF_ALT +#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +#if !defined(CONFIG_ARM) +#define MBEDTLS_HAVE_ASM +#endif + +#define MBEDTLS_ECDSA_C +#define MBEDTLS_ECDH_C + +/* mbed TLS modules */ +#define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_ASN1_WRITE_C +#define MBEDTLS_ECP_C +#define MBEDTLS_ECP_DP_SECP256R1_ENABLED +#define MBEDTLS_ECP_NIST_OPTIM +#define MBEDTLS_BIGNUM_C +#define MBEDTLS_MD_C +#define MBEDTLS_OID_C +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA224_C +#define MBEDTLS_AES_C + +/* Bring in support for x509. */ +#define MBEDTLS_X509_USE_C +#define MBEDTLS_PK_C +#define MBEDTLS_PK_PARSE_C +#define MBEDTLS_X509_CRT_PARSE_C + +/* Save RAM by adjusting to our exact needs */ +#define MBEDTLS_ECP_MAX_BITS 256 + +#define MBEDTLS_MPI_MAX_SIZE 32 + +#define MBEDTLS_SSL_MAX_CONTENT_LEN 1024 + +/* Save ROM and a few bytes of RAM by specifying our own ciphersuite list */ +#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + +/* If encryption is being used, also enable the features needed for + * that. */ +#if defined(MCUBOOT_ENC_IMAGES) +#define MBEDTLS_CIPHER_MODE_CTR +#define MBEDTLS_CIPHER_C +#define MBEDTLS_NIST_KW_C +#endif /* MCUBOOT_ENC_IMAGES */ + +#endif /* MCUBOOT_MBEDTLS_CONFIG_ECDSA */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-ed25519.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-ed25519.h new file mode 100644 index 0000000..09b3c21 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-ed25519.h @@ -0,0 +1,77 @@ +/* + * Configuration of mbedTLS containing only the ASN.1 parser. + * + * Copyright (C) 2006-2021, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - ed25519 signature verification + */ + +#ifndef MCUBOOT_MBEDTLS_CONFIG_ED25519 +#define MCUBOOT_MBEDTLS_CONFIG_ED25519 + +#ifdef CONFIG_MCUBOOT_SERIAL +/* Mcuboot uses mbedts-base64 for serial protocol encoding. */ +#define MBEDTLS_BASE64_C +#endif + +/* System support */ +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C +#define MBEDTLS_NO_PLATFORM_ENTROPY +#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/* STD functions */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +#define MBEDTLS_PLATFORM_EXIT_ALT +#define MBEDTLS_PLATFORM_PRINTF_ALT +#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +#if !defined(CONFIG_ARM) +#define MBEDTLS_HAVE_ASM +#endif + +#define MBEDTLS_CIPHER_MODE_CTR + +/* mbed TLS modules */ +#define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_BIGNUM_C +#define MBEDTLS_MD_C +#define MBEDTLS_OID_C +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA224_C +#define MBEDTLS_SHA512_C +#define MBEDTLS_AES_C + +/* Save RAM by adjusting to our exact needs */ +//#define MBEDTLS_ECP_MAX_BITS 2048 + +#define MBEDTLS_MPI_MAX_SIZE 64 + +//#define MBEDTLS_SSL_MAX_CONTENT_LEN 1024 + +/* Save ROM and a few bytes of RAM by specifying our own ciphersuite list */ +#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + +#endif /* MCUBOOT_MBEDTLS_CONFIG_RSA */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-kw.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-kw.h new file mode 100644 index 0000000..116eb40 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-kw.h @@ -0,0 +1,65 @@ +/* + * Minimal configuration for using TLS in the bootloader + * + * Copyright (C) 2006-2021, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - RSA or ECDSA signature verification + */ + +#ifndef MCUBOOT_MBEDTLS_CONFIG_KW +#define MCUBOOT_MBEDTLS_CONFIG_KW + +#ifdef CONFIG_MCUBOOT_SERIAL +/* Mcuboot uses mbedts-base64 for serial protocol encoding. */ +#define MBEDTLS_BASE64_C +#endif + +/* System support */ +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C +#define MBEDTLS_NO_PLATFORM_ENTROPY +#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/* STD functions */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +#define MBEDTLS_PLATFORM_EXIT_ALT +#define MBEDTLS_PLATFORM_PRINTF_ALT +#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +#define MBEDTLS_ASN1_PARSE_C + +#if !defined(CONFIG_ARM) +#define MBEDTLS_HAVE_ASM +#endif + +#define MBEDTLS_CIPHER_MODE_CTR + +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA224_C +#define MBEDTLS_AES_C +#define MBEDTLS_CIPHER_C +#define MBEDTLS_NIST_KW_C + +#endif /* MCUBOOT_MBEDTLS_CONFIG_KW */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-rsa-kw.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-rsa-kw.h new file mode 100644 index 0000000..e06debf --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-rsa-kw.h @@ -0,0 +1,84 @@ +/* + * Minimal configuration for using TLS in the bootloader + * + * Copyright (C) 2006-2023, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - RSA signature verification + NIST Keywrapping support + */ + +#ifndef MCUBOOT_MBEDTLS_CONFIG_RSA_KW +#define MCUBOOT_MBEDTLS_CONFIG_RSA_KW + +#if defined(MCUBOOT_USE_PSA_CRYPTO) +#include "config-add-psa-crypto.h" +#endif /* defined(MCUBOOT_USE_PSA_CRYPTO) */ + +#ifdef CONFIG_MCUBOOT_SERIAL +/* Mcuboot uses mbedts-base64 for serial protocol encoding. */ +#define MBEDTLS_BASE64_C +#endif + +/* System support */ +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C +#define MBEDTLS_NO_PLATFORM_ENTROPY +#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/* STD functions */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +#define MBEDTLS_PLATFORM_EXIT_ALT +#define MBEDTLS_PLATFORM_PRINTF_ALT +#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +#if !defined(CONFIG_ARM) +#define MBEDTLS_HAVE_ASM +#endif + +#define MBEDTLS_RSA_C +#define MBEDTLS_PKCS1_V21 + +#define MBEDTLS_CIPHER_MODE_CTR + +/* mbed TLS modules */ +#define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_BIGNUM_C +#define MBEDTLS_MD_C +#define MBEDTLS_OID_C +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA224_C +#define MBEDTLS_AES_C +#define MBEDTLS_CIPHER_C +#define MBEDTLS_NIST_KW_C + +/* Save RAM by adjusting to our exact needs */ +#define MBEDTLS_ECP_MAX_BITS 2048 +#define MBEDTLS_MPI_MAX_SIZE 256 + +#define MBEDTLS_SSL_MAX_CONTENT_LEN 1024 + +/* Save ROM and a few bytes of RAM by specifying our own ciphersuite list */ +#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + +#endif /* MCUBOOT_MBEDTLS_CONFIG_RSA_KW */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-rsa.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-rsa.h new file mode 100644 index 0000000..6f174f0 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/config-rsa.h @@ -0,0 +1,85 @@ +/* + * Minimal configuration for using TLS in the bootloader + * + * Copyright (C) 2006-2023, ARM Limited, All Rights Reserved + * Copyright (C) 2016, Linaro Ltd + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * This file is part of mbed TLS (https://tls.mbed.org) + */ + +/* + * Minimal configuration for using TLS in the bootloader + * + * - RSA or ECDSA signature verification + */ + +#ifndef MCUBOOT_MBEDTLS_CONFIG_RSA +#define MCUBOOT_MBEDTLS_CONFIG_RSA + +#if defined(MCUBOOT_USE_PSA_CRYPTO) +#include "config-add-psa-crypto.h" +#endif + +#ifdef CONFIG_MCUBOOT_SERIAL +/* Mcuboot uses mbedts-base64 for serial protocol encoding. */ +#define MBEDTLS_BASE64_C +#endif + +/* System support */ +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C +#define MBEDTLS_NO_PLATFORM_ENTROPY +#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/* STD functions */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +#define MBEDTLS_PLATFORM_EXIT_ALT +#define MBEDTLS_PLATFORM_PRINTF_ALT +#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +#if !defined(CONFIG_ARM) +#define MBEDTLS_HAVE_ASM +#endif + +#define MBEDTLS_RSA_C +#define MBEDTLS_PKCS1_V21 + +#define MBEDTLS_CIPHER_MODE_CTR + +/* mbed TLS modules */ +#define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_ASN1_WRITE_C +#define MBEDTLS_BIGNUM_C +#define MBEDTLS_MD_C +#define MBEDTLS_OID_C +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA224_C +#define MBEDTLS_AES_C + +#if (CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN == 3072) +#define MBEDTLS_MPI_MAX_SIZE 384 +#else +#define MBEDTLS_MPI_MAX_SIZE 256 +#endif + +#define MBEDTLS_SSL_MAX_CONTENT_LEN 1024 + +/* Save ROM and a few bytes of RAM by specifying our own ciphersuite list */ +#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + +#endif /* MCUBOOT_MBEDTLS_CONFIG_RSA */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/devicetree.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/devicetree.h new file mode 100644 index 0000000..434e4ee --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/devicetree.h @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2019 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* This file mocks zephyr's flash map / DT macro */ + +#ifndef __DEVICETREE_H__ +#define __DEVICETREE_H__ + +#define FLASH_AREA_ID(x) FLASH_AREA_ID_##x + +#define FLASH_AREA_ID_image_0 1 +#define FLASH_AREA_ID_image_1 2 +#define FLASH_AREA_ID_image_scratch 3 +#define FLASH_AREA_ID_image_2 4 +#define FLASH_AREA_ID_image_3 5 + +#endif /*__DEVICETREE_H__*/ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/flash_map_backend/flash_map_backend.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/flash_map_backend/flash_map_backend.h new file mode 100644 index 0000000..6783544 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/flash_map_backend/flash_map_backend.h @@ -0,0 +1,38 @@ +#ifndef __FLASH_MAP_BACKEND_H__ +#define __FLASH_MAP_BACKEND_H__ + +#include + +static inline uint32_t flash_area_get_off(const struct flash_area *fa) +{ + return (uint32_t)fa->fa_off; +} + +static inline uint32_t flash_area_get_size(const struct flash_area *fa) +{ + return (uint32_t)fa->fa_size; +} + +static inline uint32_t flash_sector_get_off(const struct flash_sector *fs) +{ + return fs->fs_off; +} + +static inline uint32_t flash_sector_get_size(const struct flash_sector *fs) +{ + return fs->fs_size; +} + +#define FLASH_DEVICE_ID 0 + +static inline uint8_t flash_area_get_device_id(const struct flash_area *fa) +{ + return fa->fa_device_id; +} + +static inline uint8_t flash_area_get_id(const struct flash_area *fa) +{ + return fa->fa_id; +} + +#endif /* __FLASH_MAP_BACKEND_H__*/ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/keys.c b/bootloader/mcuboot/sim/mcuboot-sys/csupport/keys.c new file mode 100644 index 0000000..82a746b --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/keys.c @@ -0,0 +1,330 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include + +#include + +#if defined(MCUBOOT_SIGN_RSA) +#if MCUBOOT_SIGN_RSA_LEN == 2048 +#define HAVE_KEYS +const unsigned char root_pub_der[] = { + 0x30, 0x82, 0x01, 0x0a, 0x02, 0x82, 0x01, 0x01, 0x00, 0xd1, 0x06, 0x08, + 0x1a, 0x18, 0x44, 0x2c, 0x18, 0xe8, 0xfb, 0xfd, 0xf7, 0x0d, 0xa3, 0x4f, + 0x1f, 0xbb, 0xee, 0x5e, 0xf9, 0xaa, 0xd2, 0x4b, 0x18, 0xd3, 0x5a, 0xe9, + 0x6d, 0x18, 0x80, 0x19, 0xf9, 0xf0, 0x9c, 0x34, 0x1b, 0xcb, 0xf3, 0xbc, + 0x74, 0xdb, 0x42, 0xe7, 0x8c, 0x7f, 0x10, 0x53, 0x7e, 0x43, 0x5e, 0x0d, + 0x57, 0x2c, 0x44, 0xd1, 0x67, 0x08, 0x0f, 0x0d, 0xbb, 0x5c, 0xee, 0xec, + 0xb3, 0x99, 0xdf, 0xe0, 0x4d, 0x84, 0x0b, 0xaa, 0x77, 0x41, 0x60, 0xed, + 0x15, 0x28, 0x49, 0xa7, 0x01, 0xb4, 0x3c, 0x10, 0xe6, 0x69, 0x8c, 0x2f, + 0x5f, 0xac, 0x41, 0x4d, 0x9e, 0x5c, 0x14, 0xdf, 0xf2, 0xf8, 0xcf, 0x3d, + 0x1e, 0x6f, 0xe7, 0x5b, 0xba, 0xb4, 0xa9, 0xc8, 0x88, 0x7e, 0x47, 0x3c, + 0x94, 0xc3, 0x77, 0x67, 0x54, 0x4b, 0xaa, 0x8d, 0x38, 0x35, 0xca, 0x62, + 0x61, 0x7e, 0xb7, 0xe1, 0x15, 0xdb, 0x77, 0x73, 0xd4, 0xbe, 0x7b, 0x72, + 0x21, 0x89, 0x69, 0x24, 0xfb, 0xf8, 0x65, 0x6e, 0x64, 0x3e, 0xc8, 0x0e, + 0xd7, 0x85, 0xd5, 0x5c, 0x4a, 0xe4, 0x53, 0x0d, 0x2f, 0xff, 0xb7, 0xfd, + 0xf3, 0x13, 0x39, 0x83, 0x3f, 0xa3, 0xae, 0xd2, 0x0f, 0xa7, 0x6a, 0x9d, + 0xf9, 0xfe, 0xb8, 0xce, 0xfa, 0x2a, 0xbe, 0xaf, 0xb8, 0xe0, 0xfa, 0x82, + 0x37, 0x54, 0xf4, 0x3e, 0xe1, 0x2b, 0xd0, 0xd3, 0x08, 0x58, 0x18, 0xf6, + 0x5e, 0x4c, 0xc8, 0x88, 0x81, 0x31, 0xad, 0x5f, 0xb0, 0x82, 0x17, 0xf2, + 0x8a, 0x69, 0x27, 0x23, 0xf3, 0xab, 0x87, 0x3e, 0x93, 0x1a, 0x1d, 0xfe, + 0xe8, 0xf8, 0x1a, 0x24, 0x66, 0x59, 0xf8, 0x1c, 0xab, 0xdc, 0xce, 0x68, + 0x1b, 0x66, 0x64, 0x35, 0xec, 0xfa, 0x0d, 0x11, 0x9d, 0xaf, 0x5c, 0x3a, + 0xa7, 0xd1, 0x67, 0xc6, 0x47, 0xef, 0xb1, 0x4b, 0x2c, 0x62, 0xe1, 0xd1, + 0xc9, 0x02, 0x03, 0x01, 0x00, 0x01 +}; +const unsigned int root_pub_der_len = 270; +#elif MCUBOOT_SIGN_RSA_LEN == 3072 +#define HAVE_KEYS +const unsigned char root_pub_der[] = { + 0x30, 0x82, 0x01, 0x8a, 0x02, 0x82, 0x01, 0x81, + 0x00, 0xb4, 0x2c, 0x0e, 0x98, 0x58, 0x10, 0xa4, + 0xa7, 0x58, 0x99, 0x7c, 0x01, 0xdd, 0x08, 0x2a, + 0x28, 0x34, 0x33, 0xf8, 0x96, 0x1a, 0x34, 0x20, + 0x5d, 0x45, 0xc8, 0x71, 0x26, 0x25, 0xe5, 0xd2, + 0x96, 0xea, 0x7b, 0xb1, 0x15, 0xaa, 0xa6, 0x8a, + 0x63, 0x22, 0x8b, 0x2d, 0x4e, 0x81, 0x73, 0xbf, + 0x6e, 0x15, 0x68, 0x8c, 0x1a, 0xf4, 0xef, 0x2a, + 0x8f, 0x8c, 0x22, 0x9e, 0x71, 0x57, 0x4b, 0xde, + 0x0f, 0x7e, 0x72, 0xd3, 0x7a, 0xb8, 0xa7, 0x1d, + 0x44, 0xad, 0x87, 0x00, 0x83, 0x5c, 0xfd, 0x73, + 0x05, 0x72, 0x46, 0x3f, 0x8b, 0xf9, 0x10, 0x00, + 0xd8, 0x6e, 0xcc, 0x85, 0xed, 0xf9, 0x49, 0xdb, + 0x78, 0x36, 0x80, 0x49, 0x38, 0x76, 0xdd, 0x5f, + 0x54, 0x04, 0xda, 0x8c, 0x34, 0xa7, 0x2b, 0x13, + 0x25, 0x6f, 0xd1, 0x15, 0x4f, 0xad, 0xc2, 0xe1, + 0xa5, 0xd2, 0x4e, 0x57, 0x0c, 0x7e, 0x9c, 0x9b, + 0xba, 0x4e, 0x68, 0xb2, 0xe0, 0x25, 0x02, 0xaa, + 0x00, 0xd3, 0xb4, 0xcc, 0x2f, 0x78, 0xe5, 0xbe, + 0x47, 0x67, 0x1f, 0xc8, 0x6e, 0x22, 0x6c, 0x5e, + 0x61, 0xb6, 0x9a, 0xcd, 0xe5, 0xa8, 0xba, 0x7a, + 0x80, 0x13, 0x1b, 0x17, 0x2e, 0x96, 0xed, 0xcf, + 0xb3, 0x9b, 0xe4, 0x1c, 0xe8, 0xad, 0xa7, 0xf6, + 0x3a, 0x51, 0x66, 0x5e, 0x99, 0x8e, 0x87, 0xee, + 0x60, 0x25, 0xf8, 0x8d, 0xbe, 0xce, 0xa4, 0xa8, + 0xca, 0x93, 0x6c, 0xd7, 0xbf, 0xd4, 0x73, 0x33, + 0x8d, 0x44, 0x85, 0xcc, 0x73, 0x30, 0x08, 0x9c, + 0x4d, 0xb2, 0xaa, 0x5a, 0x6c, 0x6f, 0x7b, 0xab, + 0xb7, 0xb3, 0x7c, 0xc3, 0xfb, 0xe7, 0xca, 0xc4, + 0xf8, 0x9a, 0x6f, 0xcb, 0xbb, 0x5b, 0x82, 0xe7, + 0x7a, 0xe8, 0x19, 0xfd, 0x2f, 0x11, 0x22, 0xfb, + 0x7f, 0x76, 0x8c, 0x6b, 0x94, 0xa4, 0x09, 0x4f, + 0xa5, 0x6a, 0x77, 0x51, 0xeb, 0xa7, 0x7e, 0xda, + 0x87, 0x06, 0xee, 0xdc, 0xbe, 0xd1, 0xea, 0x1a, + 0x40, 0x1d, 0x1b, 0xff, 0x1a, 0xb1, 0x51, 0x7c, + 0x12, 0xb0, 0xf3, 0xf6, 0x83, 0x01, 0x9c, 0xe7, + 0x0c, 0x99, 0xbf, 0xac, 0x68, 0x58, 0x72, 0xa4, + 0xb0, 0x59, 0x85, 0xee, 0x85, 0xac, 0x2a, 0x22, + 0xf4, 0xcf, 0x15, 0x08, 0x80, 0x1f, 0x0d, 0xd0, + 0x1e, 0xa0, 0xa0, 0x94, 0xc8, 0xf7, 0xfa, 0x65, + 0xdd, 0x52, 0xe8, 0x96, 0x37, 0x23, 0x30, 0x57, + 0x36, 0xe6, 0x9d, 0xf4, 0x0c, 0x4a, 0x05, 0x75, + 0x1f, 0xad, 0x01, 0xca, 0xb7, 0x6d, 0x8c, 0x43, + 0x74, 0x06, 0x0a, 0x81, 0xf3, 0x01, 0x62, 0xff, + 0xf7, 0xf5, 0x5f, 0xaf, 0xe7, 0x2b, 0x0e, 0xf8, + 0x81, 0xb5, 0x65, 0xdd, 0x01, 0xd9, 0x9f, 0x07, + 0x17, 0x8a, 0x18, 0xcf, 0x23, 0x6e, 0x88, 0x65, + 0x91, 0xb5, 0x7b, 0xd3, 0xb0, 0x2d, 0xaf, 0x93, + 0x66, 0x63, 0x74, 0xac, 0x5a, 0xe6, 0x73, 0xde, + 0x3b, 0x02, 0x03, 0x01, 0x00, 0x01, +}; +const unsigned int root_pub_der_len = 398; +#endif +#elif defined(MCUBOOT_SIGN_EC256) || \ + defined(MCUBOOT_SIGN_EC384) +#define HAVE_KEYS +#ifndef MCUBOOT_SIGN_EC384 +const unsigned char root_pub_der[] = { + 0x30, 0x59, 0x30, 0x13, 0x06, 0x07, 0x2a, 0x86, + 0x48, 0xce, 0x3d, 0x02, 0x01, 0x06, 0x08, 0x2a, + 0x86, 0x48, 0xce, 0x3d, 0x03, 0x01, 0x07, 0x03, + 0x42, 0x00, 0x04, 0x2a, 0xcb, 0x40, 0x3c, 0xe8, + 0xfe, 0xed, 0x5b, 0xa4, 0x49, 0x95, 0xa1, 0xa9, + 0x1d, 0xae, 0xe8, 0xdb, 0xbe, 0x19, 0x37, 0xcd, + 0x14, 0xfb, 0x2f, 0x24, 0x57, 0x37, 0xe5, 0x95, + 0x39, 0x88, 0xd9, 0x94, 0xb9, 0xd6, 0x5a, 0xeb, + 0xd7, 0xcd, 0xd5, 0x30, 0x8a, 0xd6, 0xfe, 0x48, + 0xb2, 0x4a, 0x6a, 0x81, 0x0e, 0xe5, 0xf0, 0x7d, + 0x8b, 0x68, 0x34, 0xcc, 0x3a, 0x6a, 0xfc, 0x53, + 0x8e, 0xfa, 0xc1, }; +const unsigned int root_pub_der_len = 91; +#else /* MCUBOOT_SIGN_EC384 */ +const unsigned char root_pub_der[] = { + 0x30, 0x76, 0x30, 0x10, 0x06, 0x07, 0x2a, 0x86, + 0x48, 0xce, 0x3d, 0x02, 0x01, 0x06, 0x05, 0x2b, + 0x81, 0x04, 0x00, 0x22, 0x03, 0x62, 0x00, 0x04, + 0x0c, 0x76, 0xca, 0xae, 0x72, 0x3a, 0xa5, 0xe8, + 0xf0, 0xd4, 0xf1, 0x16, 0xb5, 0x02, 0xef, 0x77, + 0xa1, 0x1b, 0x93, 0x61, 0x78, 0xc0, 0x09, 0x26, + 0x7b, 0x3b, 0x40, 0x9c, 0xee, 0x49, 0x85, 0xe0, + 0xc9, 0x4f, 0xe7, 0xf2, 0xba, 0x97, 0x6c, 0xf3, + 0x82, 0x65, 0x14, 0x2c, 0xf5, 0x0c, 0x73, 0x33, + 0x4d, 0x32, 0xe7, 0x9b, 0xd3, 0x42, 0xcc, 0x95, + 0x5a, 0xe5, 0xe2, 0xf5, 0xf4, 0x6e, 0x45, 0xe0, + 0xed, 0x20, 0x35, 0x5c, 0xaf, 0x52, 0x35, 0x81, + 0xd4, 0xdc, 0x9c, 0xe3, 0x9e, 0x22, 0x3e, 0xfb, + 0x3f, 0x22, 0x10, 0xda, 0x70, 0x03, 0x37, 0xad, + 0xa8, 0xf2, 0x48, 0xfe, 0x3a, 0x60, 0x69, 0xa5, +}; +const unsigned int root_pub_der_len = 120; +#endif /* MCUBOOT_SIGN_EC384 */ +#elif defined(MCUBOOT_SIGN_ED25519) +#define HAVE_KEYS +const unsigned char root_pub_der[] = { + 0x30, 0x2a, 0x30, 0x05, 0x06, 0x03, 0x2b, 0x65, + 0x70, 0x03, 0x21, 0x00, 0xd4, 0xb3, 0x1b, 0xa4, + 0x9a, 0x3a, 0xdd, 0x3f, 0x82, 0x5d, 0x10, 0xca, + 0x7f, 0x31, 0xb5, 0x0b, 0x0d, 0xe8, 0x7f, 0x37, + 0xcc, 0xc4, 0x9f, 0x1a, 0x40, 0x3a, 0x5c, 0x13, + 0x20, 0xff, 0xb4, 0xe0, +}; +const unsigned int root_pub_der_len = 44; +#endif + +#if defined(HAVE_KEYS) +const struct bootutil_key bootutil_keys[] = { + { + .key = root_pub_der, + .len = &root_pub_der_len, + }, +}; +const int bootutil_key_cnt = 1; +#endif + +#if defined(MCUBOOT_ENCRYPT_RSA) +unsigned char enc_key[] = { + 0x30, 0x82, 0x04, 0xa4, 0x02, 0x01, 0x00, 0x02, 0x82, 0x01, 0x01, 0x00, + 0xb4, 0x26, 0x14, 0x49, 0x3d, 0x16, 0x13, 0x3a, 0x6d, 0x9c, 0x84, 0xa9, + 0x8b, 0x6a, 0x10, 0x20, 0x61, 0xef, 0x48, 0x04, 0xa4, 0x4b, 0x24, 0xf3, + 0x00, 0x32, 0xac, 0x22, 0xe0, 0x30, 0x27, 0x70, 0x18, 0xe5, 0x55, 0xc8, + 0xb8, 0x05, 0x34, 0x03, 0xb0, 0xf8, 0xa5, 0x96, 0xd2, 0x48, 0x58, 0xef, + 0x70, 0xb0, 0x09, 0xdb, 0xe3, 0x58, 0x62, 0xef, 0x99, 0x63, 0x01, 0xb2, + 0x89, 0xc4, 0xb3, 0xf6, 0x9e, 0x62, 0xbf, 0x4d, 0xc2, 0x8a, 0xd0, 0xc9, + 0x4d, 0x43, 0xa3, 0xd8, 0xe5, 0x1d, 0xec, 0x62, 0x63, 0x08, 0xe2, 0x20, + 0xa5, 0xfc, 0x78, 0xd0, 0x3e, 0x74, 0xc8, 0xa4, 0x1b, 0x36, 0xad, 0x7b, + 0xf5, 0x06, 0xae, 0x4d, 0x51, 0x9b, 0x40, 0xce, 0x30, 0x4f, 0x6c, 0xea, + 0xf9, 0xe9, 0x74, 0xea, 0x06, 0xee, 0x9c, 0xe4, 0x14, 0x68, 0x20, 0xb9, + 0x3d, 0xe7, 0x11, 0x14, 0x8b, 0x25, 0xa3, 0xff, 0x4c, 0x8a, 0xf3, 0x53, + 0xee, 0x6b, 0x3e, 0xef, 0x34, 0xcd, 0x6a, 0x3f, 0x62, 0x68, 0xc0, 0xff, + 0x78, 0x4c, 0xb0, 0xc3, 0xe6, 0x96, 0x61, 0xfc, 0x1f, 0x18, 0xf1, 0x7a, + 0x82, 0xe2, 0x8f, 0x35, 0xa8, 0x2b, 0x86, 0x16, 0xa4, 0x46, 0xfb, 0xac, + 0x7e, 0x41, 0xdb, 0x02, 0x05, 0x91, 0x6d, 0xdf, 0xc1, 0xde, 0x13, 0x95, + 0x9c, 0xf9, 0x9e, 0x5e, 0x72, 0xba, 0xa7, 0x25, 0x93, 0xfb, 0xdc, 0xe8, + 0xab, 0x86, 0x45, 0x88, 0x47, 0x2d, 0xed, 0xee, 0xee, 0x97, 0x9e, 0xce, + 0x5d, 0x9b, 0x04, 0x04, 0x40, 0x7c, 0xcb, 0x7c, 0x3d, 0x2c, 0x74, 0xab, + 0xa4, 0xcc, 0x64, 0xa3, 0x5c, 0x95, 0x3d, 0xd4, 0xa2, 0xdc, 0x92, 0xb2, + 0xc8, 0x18, 0xcb, 0xf9, 0x00, 0x39, 0x81, 0x8f, 0x8f, 0x40, 0xc2, 0xdf, + 0x99, 0x29, 0xac, 0x8a, 0xc2, 0x3b, 0xd8, 0xa4, 0xf2, 0xad, 0xaf, 0x74, + 0xc0, 0x11, 0xc7, 0x99, 0x02, 0x03, 0x01, 0x00, 0x01, 0x02, 0x82, 0x01, + 0x00, 0x42, 0x47, 0x80, 0x4f, 0x31, 0xda, 0x5d, 0x58, 0xb1, 0xdb, 0x54, + 0x33, 0xcc, 0xc7, 0x49, 0x07, 0xa1, 0x00, 0x98, 0x4e, 0x9c, 0xe3, 0xc8, + 0xc4, 0x5e, 0xde, 0x45, 0xd6, 0xcf, 0x04, 0xe8, 0x7d, 0xa5, 0xab, 0x3a, + 0xd4, 0x8e, 0x5f, 0xdb, 0xb3, 0x3f, 0xf9, 0x3b, 0x73, 0x32, 0x0a, 0xcc, + 0x2d, 0xcc, 0x17, 0xf8, 0x88, 0x9e, 0x2c, 0x76, 0xba, 0x10, 0x85, 0x0c, + 0xaa, 0xd3, 0x65, 0x3b, 0x91, 0x10, 0xd4, 0xe3, 0xed, 0x88, 0x15, 0xea, + 0x9b, 0x25, 0x82, 0x2d, 0x56, 0x2f, 0x75, 0xc2, 0xf2, 0xaf, 0xdd, 0x24, + 0xd5, 0x3e, 0x3c, 0x95, 0x76, 0x88, 0x84, 0x0f, 0x0d, 0xd1, 0xb5, 0x5c, + 0x3e, 0xae, 0xf7, 0xb6, 0x49, 0x5c, 0x2c, 0xf2, 0xba, 0xe9, 0xab, 0x4f, + 0x37, 0x64, 0x9b, 0x30, 0x18, 0xaa, 0x54, 0x40, 0x04, 0xea, 0x3d, 0x25, + 0x4d, 0x02, 0x29, 0x71, 0x6f, 0x4d, 0x82, 0x9b, 0xc3, 0x44, 0x2a, 0x9d, + 0x0c, 0x98, 0xd3, 0xc8, 0x15, 0x0d, 0x04, 0x93, 0x60, 0x30, 0xc7, 0x5e, + 0x79, 0xea, 0x53, 0x9d, 0xc0, 0x0e, 0x81, 0xac, 0x90, 0xbc, 0x9e, 0x1e, + 0xd2, 0x28, 0x0f, 0x10, 0xf5, 0x1f, 0xdf, 0x38, 0x7f, 0x8a, 0x90, 0x8d, + 0x49, 0x07, 0x7d, 0x78, 0xcb, 0xa7, 0xef, 0x92, 0x6d, 0x3b, 0x13, 0x95, + 0x9b, 0xba, 0x83, 0xc6, 0xb3, 0x71, 0x25, 0x27, 0x07, 0x99, 0x54, 0x82, + 0x3d, 0xec, 0xc5, 0xf8, 0xb4, 0xa0, 0x38, 0x7a, 0x59, 0x6a, 0x0b, 0xca, + 0x69, 0x6c, 0x17, 0xa4, 0x18, 0xe0, 0xb4, 0xaa, 0x89, 0x99, 0x8f, 0xcb, + 0x71, 0x34, 0x09, 0x1b, 0x6e, 0xe6, 0x87, 0x00, 0xb5, 0xba, 0x70, 0x8a, + 0x29, 0x3d, 0x9a, 0x06, 0x18, 0x2d, 0x66, 0x5e, 0x61, 0x37, 0xeb, 0xdd, + 0x5e, 0xc8, 0x28, 0x92, 0x05, 0x30, 0xfd, 0xb8, 0x65, 0xb1, 0x7f, 0xbf, + 0x2d, 0x55, 0x12, 0x91, 0xc1, 0x02, 0x81, 0x81, 0x00, 0xda, 0x65, 0xda, + 0x38, 0x7c, 0x18, 0xfb, 0x00, 0x11, 0x60, 0xeb, 0x37, 0x65, 0xb8, 0x83, + 0x62, 0x88, 0xc4, 0x3a, 0x4e, 0x64, 0x6a, 0xf3, 0x3e, 0x4e, 0xc0, 0x34, + 0x19, 0x8a, 0xcb, 0x4a, 0xca, 0x2f, 0x5d, 0x50, 0x7a, 0xac, 0xf7, 0x9e, + 0x87, 0x5a, 0xfc, 0x4d, 0x49, 0xd7, 0xf9, 0x21, 0xf5, 0x0b, 0x6f, 0x57, + 0x41, 0x3d, 0x8f, 0xb8, 0xec, 0x7f, 0xcc, 0x92, 0x09, 0xbe, 0xd3, 0xa4, + 0xc3, 0x14, 0x85, 0x21, 0x5d, 0x05, 0xa3, 0xaa, 0x20, 0xf6, 0x62, 0x44, + 0x50, 0x03, 0x5e, 0x53, 0x4a, 0xcd, 0x6a, 0xb6, 0x65, 0x8e, 0x4e, 0x4b, + 0x3f, 0x25, 0xc6, 0x16, 0x31, 0xf5, 0x99, 0x13, 0x77, 0x42, 0xda, 0xdc, + 0x70, 0x4d, 0x65, 0xb0, 0x99, 0x0f, 0xdf, 0x5a, 0xb1, 0x45, 0xf0, 0xb9, + 0x8e, 0xa0, 0xae, 0x4f, 0x4d, 0x65, 0x09, 0x84, 0xb5, 0x38, 0x29, 0xbf, + 0x69, 0xe0, 0x88, 0x1f, 0x27, 0x02, 0x81, 0x81, 0x00, 0xd3, 0x2a, 0x59, + 0xec, 0x28, 0xc3, 0x0d, 0x4f, 0x92, 0x96, 0xca, 0x67, 0x94, 0xfc, 0x2e, + 0xa6, 0x86, 0x68, 0x45, 0x53, 0x92, 0xcc, 0x86, 0x7f, 0x8a, 0xe1, 0x5d, + 0xe8, 0x1d, 0x9e, 0xbb, 0x1e, 0x00, 0x26, 0x1d, 0x80, 0x12, 0xff, 0x9c, + 0x11, 0x0a, 0xbd, 0xa6, 0xc3, 0x8d, 0x48, 0xda, 0xfc, 0x10, 0xf7, 0x7a, + 0x16, 0x07, 0x15, 0xa0, 0x3a, 0xd3, 0x94, 0xfb, 0x52, 0x87, 0x39, 0xee, + 0xe7, 0xc4, 0x26, 0x49, 0x16, 0xc6, 0xc0, 0x83, 0x25, 0xbf, 0x6a, 0x4e, + 0x8c, 0x0b, 0x10, 0x85, 0x66, 0xab, 0x7e, 0xae, 0xac, 0x4c, 0x69, 0x3c, + 0x44, 0xeb, 0xcd, 0xe9, 0xf6, 0x64, 0x8b, 0x4a, 0xd8, 0x6a, 0x4d, 0x6d, + 0x47, 0xa9, 0xb8, 0x55, 0x72, 0xc1, 0xfd, 0xf4, 0x81, 0x4c, 0x66, 0xbe, + 0x49, 0xf2, 0x75, 0x4f, 0x80, 0xf1, 0x20, 0x38, 0xb8, 0x6a, 0x1b, 0x75, + 0x41, 0x30, 0x0f, 0x1b, 0x3f, 0x02, 0x81, 0x80, 0x09, 0x35, 0xfa, 0x7a, + 0x1f, 0x61, 0xbe, 0x54, 0x46, 0x67, 0x5c, 0x04, 0x3e, 0x1a, 0x06, 0x10, + 0x85, 0xcc, 0x20, 0xd9, 0x65, 0x8a, 0xcd, 0x2f, 0x77, 0x8a, 0xcb, 0xa7, + 0xb8, 0x1e, 0xd2, 0xcc, 0xac, 0x2a, 0xb7, 0x56, 0x35, 0x2d, 0x4c, 0x56, + 0x51, 0x14, 0x0a, 0xfe, 0x6e, 0x49, 0x67, 0x91, 0x3a, 0x26, 0x3b, 0xfb, + 0xd8, 0x68, 0xd3, 0x57, 0xc6, 0x1c, 0x0e, 0x9c, 0xb2, 0x9b, 0xa2, 0x7b, + 0x47, 0xc6, 0x45, 0x9d, 0xf2, 0xba, 0xf0, 0x55, 0xeb, 0x8e, 0x41, 0x6b, + 0x4e, 0x79, 0x0f, 0xf2, 0x3b, 0xaf, 0xa0, 0x79, 0xb0, 0x02, 0xc5, 0x51, + 0xa8, 0x7a, 0x2e, 0x3d, 0x75, 0x2a, 0x3b, 0x93, 0xf0, 0x11, 0xe2, 0xf2, + 0x29, 0x91, 0x7c, 0x5d, 0x38, 0x3a, 0x27, 0x4d, 0x0a, 0xb2, 0x18, 0x61, + 0x57, 0x8d, 0x82, 0x72, 0xb5, 0x2c, 0x2d, 0x98, 0xa7, 0x01, 0xbb, 0xbc, + 0xef, 0x67, 0x4e, 0x49, 0x02, 0x81, 0x81, 0x00, 0xb2, 0x70, 0x53, 0x54, + 0x70, 0x8d, 0x82, 0xad, 0xff, 0x1d, 0x55, 0x24, 0x7a, 0x8d, 0x2f, 0x8e, + 0xa0, 0x7d, 0x74, 0x37, 0xcf, 0x10, 0xed, 0x86, 0xd1, 0x80, 0xe7, 0xad, + 0xc1, 0x79, 0xe4, 0x7c, 0xd1, 0x7b, 0x63, 0xea, 0x5a, 0x23, 0x8d, 0x6a, + 0x09, 0x3d, 0x81, 0xb2, 0x35, 0xad, 0x9e, 0xfe, 0xea, 0x07, 0x76, 0x2f, + 0x2f, 0x05, 0x63, 0x44, 0xd2, 0x8e, 0x4e, 0x61, 0xca, 0xcb, 0x75, 0xca, + 0x7b, 0xc2, 0x2e, 0x79, 0x04, 0xb2, 0xa1, 0x20, 0x40, 0xc4, 0x40, 0x63, + 0xae, 0xe5, 0xe3, 0x14, 0x83, 0x4e, 0xa5, 0xa4, 0x0b, 0x5d, 0xd2, 0x04, + 0x1b, 0x8f, 0x01, 0x69, 0xa8, 0x44, 0xdc, 0x96, 0x4c, 0x1d, 0xe9, 0x7e, + 0x69, 0x38, 0xcf, 0x5c, 0x0d, 0xf9, 0xdf, 0xa7, 0x73, 0x3c, 0x4f, 0x08, + 0x85, 0xce, 0x03, 0xc4, 0xdd, 0xfd, 0x70, 0x70, 0xc5, 0x99, 0x36, 0x58, + 0x43, 0x98, 0x40, 0x59, 0x02, 0x81, 0x81, 0x00, 0xd5, 0xaa, 0xfb, 0xec, + 0x8d, 0xc6, 0xdd, 0xfa, 0x2b, 0x5a, 0x24, 0xd0, 0xda, 0x58, 0xbd, 0x87, + 0x92, 0x1a, 0x29, 0x62, 0x13, 0x1d, 0x4b, 0x79, 0x1b, 0xbe, 0x79, 0x7d, + 0xad, 0x79, 0xca, 0x17, 0x75, 0xda, 0xe8, 0x32, 0xe8, 0xa0, 0x9e, 0xa8, + 0x77, 0x53, 0xac, 0x38, 0xd6, 0xeb, 0xe6, 0x22, 0x65, 0xc4, 0xaa, 0x4c, + 0xc8, 0xd0, 0x33, 0x1a, 0x1e, 0xbe, 0xbd, 0x73, 0x09, 0x4a, 0xfa, 0x85, + 0x5c, 0xf3, 0x0c, 0x9c, 0x81, 0x56, 0x30, 0xa7, 0xf7, 0x9b, 0xf4, 0x92, + 0x9c, 0x6b, 0x93, 0x6a, 0x00, 0x33, 0xdc, 0x2f, 0x54, 0x1e, 0x78, 0xd4, + 0x97, 0xec, 0x24, 0xa2, 0xdb, 0x3d, 0x03, 0x33, 0x09, 0xb2, 0x2c, 0x03, + 0x05, 0x40, 0xde, 0x52, 0xf2, 0x9b, 0xfa, 0x00, 0x8d, 0x4b, 0xfe, 0x5b, + 0x9b, 0x9c, 0x73, 0xad, 0xfb, 0x7a, 0x00, 0x42, 0x62, 0x9e, 0xa0, 0x95, + 0x55, 0x50, 0x32, 0x87 +}; +static unsigned int enc_key_len = 1192; +const struct bootutil_key bootutil_enc_key = { + .key = enc_key, + .len = &enc_key_len, +}; +#endif + +#if defined(MCUBOOT_ENCRYPT_KW) +#if defined(MCUBOOT_AES_256) +unsigned char enc_key[] = { + 0xE4, 0x5C, 0x51, 0x46, 0xD2, 0x1C, 0x82, 0x35, 0xCC, 0x1A, 0x19, 0xAF, + 0xA1, 0xF2, 0xAA, 0x20, 0xC8, 0x8C, 0x7F, 0x40, 0x6C, 0xDB, 0x22, 0xAA, + 0x6A, 0xB5, 0xCB, 0xAA, 0xF8, 0xB1, 0x5B, 0xB4 +}; +static unsigned int enc_key_len = 32; +#else +unsigned char enc_key[] = { + 0xd1, 0x5a, 0x04, 0x95, 0xc4, 0xc2, 0xa8, 0xff, 0x30, 0x78, 0xce, 0x49, + 0xb5, 0xfc, 0xb2, 0xdd +}; +static unsigned int enc_key_len = 16; +#endif +const struct bootutil_key bootutil_enc_key = { + .key = enc_key, + .len = &enc_key_len, +}; +#endif + +#if defined(MCUBOOT_ENCRYPT_EC256) +unsigned char enc_key[] = { + 0x30, 0x81, 0x43, 0x02, 0x01, 0x00, 0x30, 0x13, 0x06, 0x07, 0x2a, 0x86, + 0x48, 0xce, 0x3d, 0x02, 0x01, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, + 0x03, 0x01, 0x07, 0x04, 0x29, 0x30, 0x27, 0x02, 0x01, 0x01, 0x04, 0x20, + 0xf6, 0x1e, 0x51, 0x9d, 0xf8, 0xfa, 0xdd, 0xa1, 0xb7, 0xd9, 0xa9, 0x64, + 0x64, 0x3b, 0x54, 0xd0, 0x3d, 0xd0, 0x1f, 0xe5, 0x78, 0xd9, 0x17, 0x98, + 0xa5, 0x28, 0xca, 0xcc, 0x6b, 0x67, 0x9e, 0x06, 0xa1, 0x44, + +}; +static unsigned int enc_key_len = 70; +const struct bootutil_key bootutil_enc_key = { + .key = enc_key, + .len = &enc_key_len, +}; +#endif + +#if defined(MCUBOOT_ENCRYPT_X25519) +unsigned char enc_key[] = { + 0x30, 0x2e, 0x02, 0x01, 0x00, 0x30, 0x05, 0x06, 0x03, 0x2b, 0x65, 0x6e, + 0x04, 0x22, 0x04, 0x20, 0x28, 0x80, 0x2f, 0xef, 0xef, 0x82, 0x95, 0x50, + 0xf1, 0x41, 0x93, 0x03, 0x6c, 0x1b, 0xb9, 0x49, 0x6c, 0x51, 0xe5, 0x26, + 0x87, 0x8f, 0x77, 0x07, 0xf8, 0xb4, 0x1f, 0x04, 0x45, 0x6d, 0x84, 0x4f, +}; +static unsigned int enc_key_len = 48; +const struct bootutil_key bootutil_enc_key = { + .key = enc_key, + .len = &enc_key_len, +}; +#endif diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/mcuboot_config/mcuboot_assert.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/mcuboot_config/mcuboot_assert.h new file mode 100644 index 0000000..3d33d24 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/mcuboot_config/mcuboot_assert.h @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: Apache-2.0 +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef __MCUBOOT_ASSERT_H__ +#define __MCUBOOT_ASSERT_H__ + +#include +void sim_assert(int, const char *test, const char *, unsigned int, const char *); +#define ASSERT(x) sim_assert((x), #x, __FILE__, __LINE__, __func__) + +#endif /* __MCUBOOT_ASSERT_H__ */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/mcuboot_config/mcuboot_config.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/mcuboot_config/mcuboot_config.h new file mode 100644 index 0000000..97a0ac5 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/mcuboot_config/mcuboot_config.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2022 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __MCUBOOT_CONFIG_H__ +#define __MCUBOOT_CONFIG_H__ + +/* + * This file is included by the simulator, but we don't want to + * define almost anything here. + * + * Instead of using mcuboot_config.h, the simulator adds MCUBOOT_xxx + * configuration flags to the compiler command lines based on the + * values of environment variables. However, the file still must + * exist, or bootutil won't build. + */ + +#define MCUBOOT_WATCHDOG_FEED() \ + do { \ + } while (0) + +#define MCUBOOT_CPU_IDLE() \ + do { \ + } while (0) + +#endif /* __MCUBOOT_CONFIG_H__ */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/mcuboot_config/mcuboot_logging.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/mcuboot_config/mcuboot_logging.h new file mode 100644 index 0000000..bb4ff30 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/mcuboot_config/mcuboot_logging.h @@ -0,0 +1,107 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef __MCUBOOT_LOGGING_H__ +#define __MCUBOOT_LOGGING_H__ + +#include + +#define MCUBOOT_LOG_LEVEL_OFF 0 +#define MCUBOOT_LOG_LEVEL_ERROR 1 +#define MCUBOOT_LOG_LEVEL_WARNING 2 +#define MCUBOOT_LOG_LEVEL_INFO 3 +#define MCUBOOT_LOG_LEVEL_DEBUG 4 +#define MCUBOOT_LOG_LEVEL_SIM 5 /* RUST_LOG=trace */ + +/* + * The compiled log level determines the maximum level that can be + * printed. Messages at or below this level can be printed, provided + * they are also enabled through the Rust logging system, such as by + * setting RUST_LOG to bootsim::api=info. + */ +#ifndef MCUBOOT_LOG_LEVEL +#define MCUBOOT_LOG_LEVEL MCUBOOT_LOG_LEVEL_DEBUG +#endif + +#define MCUBOOT_LOG_MODULE_DECLARE(domain) /* ignore */ +#define MCUBOOT_LOG_MODULE_REGISTER(domain) /* ignore */ + +int sim_log_enabled(int level); + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_ERROR +#define MCUBOOT_LOG_ERR(_fmt, ...) \ + do { \ + if (sim_log_enabled(MCUBOOT_LOG_LEVEL_ERROR)) { \ + fprintf(stderr, "[ERR] " _fmt "\n", ##__VA_ARGS__); \ + fflush(stderr); \ + } \ + } while (0) +#else +#define MCUBOOT_LOG_ERR(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_WARNING +#define MCUBOOT_LOG_WRN(_fmt, ...) \ + do { \ + if (sim_log_enabled(MCUBOOT_LOG_LEVEL_WARNING)) { \ + fprintf(stderr, "[WRN] " _fmt "\n", ##__VA_ARGS__); \ + fflush(stderr); \ + } \ + } while (0) +#else +#define MCUBOOT_LOG_WRN(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_INFO +#define MCUBOOT_LOG_INF(_fmt, ...) \ + do { \ + if (sim_log_enabled(MCUBOOT_LOG_LEVEL_INFO)) { \ + fprintf(stderr, "[INF] " _fmt "\n", ##__VA_ARGS__); \ + fflush(stderr); \ + } \ + } while (0) +#else +#define MCUBOOT_LOG_INF(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_DEBUG +#define MCUBOOT_LOG_DBG(_fmt, ...) \ + do { \ + if (sim_log_enabled(MCUBOOT_LOG_LEVEL_DEBUG)) { \ + fprintf(stderr, "[DBG] " _fmt "\n", ##__VA_ARGS__); \ + fflush(stderr); \ + } \ + } while (0) +#else +#define MCUBOOT_LOG_DBG(...) IGNORE(__VA_ARGS__) +#endif + +#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_SIM +#define MCUBOOT_LOG_SIM(_fmt, ...) \ + do { \ + if (sim_log_enabled(MCUBOOT_LOG_LEVEL_SIM)) { \ + fprintf(stderr, "[SIM] " _fmt "\n", ##__VA_ARGS__); \ + fflush(stderr); \ + } \ + } while (0) +#else +#define MCUBOOT_LOG_SIM(...) IGNORE(__VA_ARGS__) +#endif + +#endif /* __MCUBOOT_LOGGING_H__ */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/os/os_heap.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/os/os_heap.h new file mode 100644 index 0000000..dfe162a --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/os/os_heap.h @@ -0,0 +1,10 @@ +/* + * Copyright (c) 2022 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef H_OS_HEAP_ +#define H_OS_HEAP_ + +#endif diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/os/os_malloc.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/os/os_malloc.h new file mode 100644 index 0000000..4139d4a --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/os/os_malloc.h @@ -0,0 +1,10 @@ +/* + * Copyright (c) 2022 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef H_OS_MALLOC_ +#define H_OS_MALLOC_ + +#endif diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/psa_crypto_init_stub.c b/bootloader/mcuboot/sim/mcuboot-sys/csupport/psa_crypto_init_stub.c new file mode 100644 index 0000000..1362ac3 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/psa_crypto_init_stub.c @@ -0,0 +1,22 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2023 Arm Limited + */ + +/* This file, and the methods within are required when PSA Crypto API is enabled + * (--features psa-crypto-api), but the selected combination of features does + * not rely on any PSA Crypto APIs, and will not be adding any of them to the build. + */ + +#include + +int psa_crypto_init() +{ + BOOT_LOG_SIM("psa_crypto_init() is being stubbed.\n"); + return 0; +} + +void mbedtls_test_enable_insecure_external_rng(){ + BOOT_LOG_SIM("mbedtls_test_enable_insecure_external_rng() is being stubbed.\n"); +} diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/run.c b/bootloader/mcuboot/sim/mcuboot-sys/csupport/run.c new file mode 100644 index 0000000..9868996 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/run.c @@ -0,0 +1,543 @@ +/* Run the boot image. */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "../../../boot/bootutil/src/bootutil_priv.h" +#include "bootsim.h" + +#ifdef MCUBOOT_ENCRYPT_RSA +#include "mbedtls/rsa.h" +#include "mbedtls/asn1.h" +#endif + +#ifdef MCUBOOT_ENCRYPT_KW +#include "mbedtls/nist_kw.h" +#endif + +#define BOOT_LOG_LEVEL BOOT_LOG_LEVEL_ERROR +#include +#include "bootutil/crypto/common.h" + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +struct area_desc; +extern struct area_desc *sim_get_flash_areas(void); +extern void sim_set_flash_areas(struct area_desc *areas); +extern void sim_reset_flash_areas(void); + +struct sim_context; +extern struct sim_context *sim_get_context(void); +extern void sim_set_context(struct sim_context *ctx); +extern void sim_reset_context(void); + +extern int sim_flash_erase(uint8_t flash_id, uint32_t offset, uint32_t size); +extern int sim_flash_read(uint8_t flash_id, uint32_t offset, uint8_t *dest, + uint32_t size); +extern int sim_flash_write(uint8_t flash_id, uint32_t offset, const uint8_t *src, + uint32_t size); +extern uint32_t sim_flash_align(uint8_t flash_id); +extern uint8_t sim_flash_erased_val(uint8_t flash_id); + +struct sim_context { + int flash_counter; + int jumped; + uint8_t c_asserts; + uint8_t c_catch_asserts; + jmp_buf boot_jmpbuf; +}; + +#ifdef MCUBOOT_ENCRYPT_RSA +static int +parse_pubkey(mbedtls_rsa_context *ctx, uint8_t **p, uint8_t *end) +{ + int rc; + size_t len; + + if ((rc = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + return -1; + } + + if (*p + len != end) { + return -2; + } + + if ((rc = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + return -3; + } + + *p += len; + + if ((rc = mbedtls_asn1_get_tag(p, end, &len, MBEDTLS_ASN1_BIT_STRING)) != 0) { + return -4; + } + + if (**p != MBEDTLS_ASN1_PRIMITIVE) { + return -5; + } + + *p += 1; + + if ((rc = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + return -6; + } + + if (mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(N)) != 0) { + return -7; + } + + if (mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(E)) != 0) { + return -8; + } + + ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N)); + + if (*p != end) { + return -9; + } + + if (mbedtls_rsa_check_pubkey(ctx) != 0) { + return -10; + } + + return 0; +} + +static int +fake_rng(void *p_rng, unsigned char *output, size_t len) +{ + size_t i; + + (void)p_rng; + for (i = 0; i < len; i++) { + output[i] = (char)i; + } + + return 0; +} +#endif + +int mbedtls_platform_set_calloc_free(void * (*calloc_func)(size_t, size_t), + void (*free_func)(void *)); + +int rsa_oaep_encrypt_(const uint8_t *pubkey, unsigned pubkey_len, + const uint8_t *seckey, unsigned seckey_len, + uint8_t *encbuf) +{ +#ifdef MCUBOOT_ENCRYPT_RSA + mbedtls_rsa_context ctx; + uint8_t *cp; + uint8_t *cpend; + int rc; + + mbedtls_platform_set_calloc_free(calloc, free); + +#if MBEDTLS_VERSION_NUMBER >= 0x03000000 + mbedtls_rsa_init(&ctx); + mbedtls_rsa_set_padding(&ctx, MBEDTLS_RSA_PKCS_V21, MBEDTLS_MD_SHA256); +#else + mbedtls_rsa_init(&ctx, MBEDTLS_RSA_PKCS_V21, MBEDTLS_MD_SHA256); +#endif + + cp = (uint8_t *)pubkey; + cpend = cp + pubkey_len; + + rc = parse_pubkey(&ctx, &cp, cpend); + if (rc) { + goto done; + } + +#if MBEDTLS_VERSION_NUMBER >= 0x03000000 + rc = mbedtls_rsa_rsaes_oaep_encrypt(&ctx, fake_rng, NULL, + NULL, 0, seckey_len, seckey, encbuf); +#else + rc = mbedtls_rsa_rsaes_oaep_encrypt(&ctx, fake_rng, NULL, MBEDTLS_RSA_PUBLIC, + NULL, 0, seckey_len, seckey, encbuf); +#endif + if (rc) { + goto done; + } + +done: + mbedtls_rsa_free(&ctx); + return rc; + +#else + (void)pubkey; + (void)pubkey_len; + (void)seckey; + (void)seckey_len; + (void)encbuf; + return 0; +#endif +} + +int kw_encrypt_(const uint8_t *kek, const uint8_t *seckey, uint8_t *encbuf) +{ +#ifdef MCUBOOT_ENCRYPT_KW +#ifdef MCUBOOT_AES_256 + int key_len = 256; + int out_size = 40; + int in_len = 32; +#else + int key_len = 128; + int out_size = 24; + int in_len = 16; +#endif + mbedtls_nist_kw_context kw; + size_t olen; + int rc; + + mbedtls_platform_set_calloc_free(calloc, free); + + mbedtls_nist_kw_init(&kw); + + rc = mbedtls_nist_kw_setkey(&kw, MBEDTLS_CIPHER_ID_AES, kek, key_len, 1); + if (rc) { + goto done; + } + + rc = mbedtls_nist_kw_wrap(&kw, MBEDTLS_KW_MODE_KW, seckey, in_len, encbuf, + &olen, out_size); + +done: + mbedtls_nist_kw_free(&kw); + return rc; + +#else + (void)kek; + (void)seckey; + (void)encbuf; + return 0; +#endif +} + +uint32_t flash_area_align(const struct flash_area *area) +{ + return sim_flash_align(area->fa_device_id); +} + +uint8_t flash_area_erased_val(const struct flash_area *area) +{ + return sim_flash_erased_val(area->fa_device_id); +} + +struct area { + struct flash_area whole; + struct flash_area *areas; + uint32_t num_areas; + uint8_t id; +}; + +struct area_desc { + struct area slots[16]; + uint32_t num_slots; +}; + +int invoke_boot_go(struct sim_context *ctx, struct area_desc *adesc, + struct boot_rsp *rsp, int image_id) +{ + int res; + struct boot_loader_state *state; + +#if defined(MCUBOOT_SIGN_RSA) || \ + (defined(MCUBOOT_SIGN_EC256) && defined(MCUBOOT_USE_MBED_TLS)) ||\ + (defined(MCUBOOT_ENCRYPT_EC256) && defined(MCUBOOT_USE_MBED_TLS)) ||\ + (defined(MCUBOOT_ENCRYPT_X25519) && defined(MCUBOOT_USE_MBED_TLS)) + mbedtls_platform_set_calloc_free(calloc, free); +#endif + + state = malloc(sizeof(struct boot_loader_state)); + + sim_set_flash_areas(adesc); + sim_set_context(ctx); + + if (setjmp(ctx->boot_jmpbuf) == 0) { + boot_state_clear(state); + +#if BOOT_IMAGE_NUMBER > 1 + if (image_id >= 0) { + memset(state->img_mask, 1, sizeof(state->img_mask)); + state->img_mask[image_id] = 0; + } +#else + (void) image_id; +#endif /* BOOT_IMAGE_NUMBER > 1 */ + + res = context_boot_go(state, rsp); + sim_reset_flash_areas(); + sim_reset_context(); + free(state); + /* printf("boot_go off: %d (0x%08x)\n", res, rsp.br_image_off); */ + return res; + } else { + sim_reset_flash_areas(); + sim_reset_context(); + free(state); + return -0x13579; + } +} + +void *os_malloc(size_t size) +{ + // printf("os_malloc 0x%x bytes\n", size); + return malloc(size); +} + +int flash_area_id_from_multi_image_slot(int image_index, int slot) +{ + switch (slot) { + case 0: return FLASH_AREA_IMAGE_PRIMARY(image_index); + case 1: return FLASH_AREA_IMAGE_SECONDARY(image_index); + case 2: return FLASH_AREA_IMAGE_SCRATCH; + } + + printf("Image flash area ID not found\n"); + return -1; /* flash_area_open will fail on that */ +} + +int flash_area_open(uint8_t id, const struct flash_area **area) +{ + uint32_t i; + struct area_desc *flash_areas; + + flash_areas = sim_get_flash_areas(); + for (i = 0; i < flash_areas->num_slots; i++) { + if (flash_areas->slots[i].id == id) + break; + } + if (i == flash_areas->num_slots) { + printf("Unsupported area\n"); + abort(); + } + + /* Unsure if this is right, just returning the first area. */ + *area = &flash_areas->slots[i].whole; + return 0; +} + +void flash_area_close(const struct flash_area *area) +{ + (void)area; +} + +/* + * Read/write/erase. Offset is relative from beginning of flash area. + */ +int flash_area_read(const struct flash_area *area, uint32_t off, void *dst, + uint32_t len) +{ + BOOT_LOG_SIM("%s: area=%d, off=%x, len=%x", + __func__, area->fa_id, off, len); + return sim_flash_read(area->fa_device_id, area->fa_off + off, dst, len); +} + +int flash_area_write(const struct flash_area *area, uint32_t off, const void *src, + uint32_t len) +{ + BOOT_LOG_SIM("%s: area=%d, off=%x, len=%x", __func__, + area->fa_id, off, len); + struct sim_context *ctx = sim_get_context(); + if (--(ctx->flash_counter) == 0) { + ctx->jumped++; + longjmp(ctx->boot_jmpbuf, 1); + } + return sim_flash_write(area->fa_device_id, area->fa_off + off, src, len); +} + +int flash_area_erase(const struct flash_area *area, uint32_t off, uint32_t len) +{ + BOOT_LOG_SIM("%s: area=%d, off=%x, len=%x", __func__, + area->fa_id, off, len); + struct sim_context *ctx = sim_get_context(); + if (--(ctx->flash_counter) == 0) { + ctx->jumped++; + longjmp(ctx->boot_jmpbuf, 1); + } + return sim_flash_erase(area->fa_device_id, area->fa_off + off, len); +} + +int flash_area_to_sectors(int idx, int *cnt, struct flash_area *ret) +{ + uint32_t i; + struct area *slot; + struct area_desc *flash_areas; + + flash_areas = sim_get_flash_areas(); + for (i = 0; i < flash_areas->num_slots; i++) { + if (flash_areas->slots[i].id == idx) + break; + } + if (i == flash_areas->num_slots) { + printf("Unsupported area\n"); + abort(); + } + + slot = &flash_areas->slots[i]; + + if (slot->num_areas > (uint32_t)*cnt) { + printf("Too many areas in slot\n"); + abort(); + } + + *cnt = slot->num_areas; + memcpy(ret, slot->areas, slot->num_areas * sizeof(struct flash_area)); + + return 0; +} + +int flash_area_get_sectors(int fa_id, uint32_t *count, + struct flash_sector *sectors) +{ + uint32_t i; + struct area *slot; + struct area_desc *flash_areas; + + flash_areas = sim_get_flash_areas(); + for (i = 0; i < flash_areas->num_slots; i++) { + if (flash_areas->slots[i].id == fa_id) + break; + } + if (i == flash_areas->num_slots) { + printf("Unsupported area\n"); + abort(); + } + + slot = &flash_areas->slots[i]; + + if (slot->num_areas > *count) { + printf("Too many areas in slot\n"); + abort(); + } + + for (i = 0; i < slot->num_areas; i++) { + sectors[i].fs_off = slot->areas[i].fa_off - + slot->whole.fa_off; + sectors[i].fs_size = slot->areas[i].fa_size; + } + *count = slot->num_areas; + + return 0; +} + +int flash_area_id_to_multi_image_slot(int image_index, int area_id) +{ + if (area_id == FLASH_AREA_IMAGE_PRIMARY(image_index)) { + return 0; + } + if (area_id == FLASH_AREA_IMAGE_SECONDARY(image_index)) { + return 1; + } + + printf("Unsupported image area ID\n"); + abort(); +} + +int flash_area_id_from_image_slot(int slot) { + /* For single image cases, just use the first image. */ + return flash_area_id_from_multi_image_slot(0, slot); +} + +int flash_area_sector_from_off(uint32_t off, struct flash_sector *sector) +{ + uint32_t i, sec_off, sec_size; + struct area *slot; + struct area_desc *flash_areas; + + flash_areas = sim_get_flash_areas(); + for (i = 0; i < flash_areas->num_slots; i++) { + if (flash_areas->slots[i].id == FLASH_AREA_ID(image_0)) + break; + } + + if (i == flash_areas->num_slots) { + printf("Unsupported area\n"); + abort(); + } + + slot = &flash_areas->slots[i]; + + for (i = 0; i < slot->num_areas; i++) { + sec_off = slot->areas[i].fa_off - slot->whole.fa_off; + sec_size = slot->areas[i].fa_size; + + if (off >= sec_off && off < (sec_off + sec_size)) { + sector->fs_off = sec_off; + sector->fs_size = sec_size; + break; + } + } + + return (i < slot->num_areas) ? 0 : -1; +} + +int flash_area_get_sector(const struct flash_area *fa, uint32_t off, + struct flash_sector *sector) +{ + uint32_t i, sec_off, sec_size; + struct area *slot; + struct area_desc *flash_areas; + + flash_areas = sim_get_flash_areas(); + for (i = 0; i < flash_areas->num_slots; i++) { + if (&flash_areas->slots[i].whole == fa) + break; + } + + if (i == flash_areas->num_slots) { + printf("Unsupported area\n"); + abort(); + } + + slot = &flash_areas->slots[i]; + + for (i = 0; i < slot->num_areas; i++) { + sec_off = slot->areas[i].fa_off - slot->whole.fa_off; + sec_size = slot->areas[i].fa_size; + + if (off >= sec_off && off < (sec_off + sec_size)) { + sector->fs_off = sec_off; + sector->fs_size = sec_size; + break; + } + } + + return (i < slot->num_areas) ? 0 : -1; +} + +void sim_assert(int x, const char *assertion, const char *file, unsigned int line, const char *function) +{ + if (!(x)) { + struct sim_context *ctx = sim_get_context(); + if (ctx->c_catch_asserts) { + ctx->c_asserts++; + } else { + BOOT_LOG_ERR("%s:%d: %s: Assertion `%s' failed.", file, line, function, assertion); + + /* NOTE: if the assert below is triggered, the place where it was originally + * asserted is printed by the message above... + */ + assert(x); + } + } +} + +uint32_t boot_max_align(void) +{ + return BOOT_MAX_ALIGN; +} + +uint32_t boot_magic_sz(void) +{ + return BOOT_MAGIC_ALIGN_SIZE; +} diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/security_cnt.c b/bootloader/mcuboot/sim/mcuboot-sys/csupport/security_cnt.c new file mode 100644 index 0000000..0f79d8d --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/security_cnt.c @@ -0,0 +1,43 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2023 Arm Limited + */ + +#include "bootutil/security_cnt.h" +#include "mcuboot_config/mcuboot_logging.h" +#include "bootutil/fault_injection_hardening.h" + +/* + * Since the simulator is executing unit tests in parallel, + * the storage area where the security counter values reside + * has to be managed per thread from Rust's side. + */ +#ifdef MCUBOOT_HW_ROLLBACK_PROT + +int sim_set_nv_counter_for_image(uint32_t image_index, uint32_t security_counter_value); + +int sim_get_nv_counter_for_image(uint32_t image_index, uint32_t* data); + +fih_ret boot_nv_security_counter_init(void) { + return FIH_SUCCESS; +} + +fih_ret boot_nv_security_counter_get(uint32_t image_id, fih_int *security_cnt) { + uint32_t counter = 0; + FIH_DECLARE(fih_rc, FIH_FAILURE); + fih_rc = fih_ret_encode_zero_equality(sim_get_nv_counter_for_image(image_id, &counter)); + + MCUBOOT_LOG_INF("Read security counter value (%d) for image: %d\n", counter, image_id); + *security_cnt = fih_int_encode(counter); + + FIH_RET(fih_rc); +} + +int32_t boot_nv_security_counter_update(uint32_t image_id, uint32_t img_security_cnt) { + MCUBOOT_LOG_INF("Writing security counter value (%d) for image: %d\n", img_security_cnt, image_id); + + return sim_set_nv_counter_for_image(image_id, img_security_cnt); +} + +#endif /* MCUBOOT_HW_ROLLBACK_PROT */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/storage/flash_map.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/storage/flash_map.h new file mode 100644 index 0000000..1c54597 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/storage/flash_map.h @@ -0,0 +1,171 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef H_UTIL_FLASH_MAP_ +#define H_UTIL_FLASH_MAP_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * + * Provides abstraction of flash regions for type of use. + * I.e. dude where's my image? + * + * System will contain a map which contains flash areas. Every + * region will contain flash identifier, offset within flash and length. + * + * 1. This system map could be in a file within filesystem (Initializer + * must know/figure out where the filesystem is at). + * 2. Map could be at fixed location for project (compiled to code) + * 3. Map could be at specific place in flash (put in place at mfg time). + * + * Note that the map you use must be valid for BSP it's for, + * match the linker scripts when platform executes from flash, + * and match the target offset specified in download script. + */ +#include + +/** + * @brief Structure describing an area on a flash device. + * + * Multiple flash devices may be available in the system, each of + * which may have its own areas. For this reason, flash areas track + * which flash device they are part of. + */ +struct flash_area { + /** + * This flash area's ID; unique in the system. + */ + uint8_t fa_id; + + /** + * ID of the flash device this area is a part of. + */ + uint8_t fa_device_id; + + uint16_t pad16; + + /** + * This area's offset, relative to the beginning of its flash + * device's storage. + */ + uint32_t fa_off; + + /** + * This area's size, in bytes. + */ + uint32_t fa_size; +}; + +/** + * @brief Structure describing a sector within a flash area. + * + * Each sector has an offset relative to the start of its flash area + * (NOT relative to the start of its flash device), and a size. A + * flash area may contain sectors with different sizes. + */ +struct flash_sector { + /** + * Offset of this sector, from the start of its flash area (not device). + */ + uint32_t fs_off; + + /** + * Size of this sector, in bytes. + */ + uint32_t fs_size; +}; + +/* + * Retrieve a memory-mapped flash device's base address. + * + * On success, the address will be stored in the value pointed to by + * ret. + * + * Returns 0 on success, or an error code on failure. + */ +int flash_device_base(uint8_t fd_id, uintptr_t *ret); + +/* + * Start using flash area. + */ +int flash_area_open(uint8_t id, const struct flash_area **); + +void flash_area_close(const struct flash_area *); + +/* + * Read/write/erase. Offset is relative from beginning of flash area. + */ +int flash_area_read(const struct flash_area *, uint32_t off, void *dst, + uint32_t len); +int flash_area_write(const struct flash_area *, uint32_t off, const void *src, + uint32_t len); +int flash_area_erase(const struct flash_area *, uint32_t off, uint32_t len); + +/* + * Alignment restriction for flash writes. + */ +uint32_t flash_area_align(const struct flash_area *); + +/* + * What is value is read from erased flash bytes. + */ +uint8_t flash_area_erased_val(const struct flash_area *); + +/* + * Given flash area ID, return info about sectors within the area. + */ +int flash_area_get_sectors(int fa_id, uint32_t *count, + struct flash_sector *sectors); + + +/* Retrieve the flash sector a given offset belongs to. + * + * Returns 0 on success, or an error code on failure. + */ +int flash_area_sector_from_off(uint32_t off, struct flash_sector *sector); + +/* Retrieve the flash sector a given offset, within flash area. + * + * @param fa flash area. + * @param off offset of sector. + * @param sector pointer to structure for obtained information. + * Returns 0 on success, or an error code on failure. + */ +int flash_area_get_sector(const struct flash_area *fa, uint32_t off, + struct flash_sector *sector); + +/* + * Similar to flash_area_get_sectors(), but return the values in an + * array of struct flash_area instead. + */ +__attribute__((deprecated)) +int flash_area_to_sectors(int idx, int *cnt, struct flash_area *ret); + +int flash_area_id_from_image_slot(int slot); +int flash_area_id_from_multi_image_slot(int image_index, int slot); +int flash_area_id_to_multi_image_slot(int image_index, int area_id); + +#ifdef __cplusplus +} +#endif + +#endif /* H_UTIL_FLASH_MAP_ */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/csupport/sysflash/sysflash.h b/bootloader/mcuboot/sim/mcuboot-sys/csupport/sysflash/sysflash.h new file mode 100644 index 0000000..7f723a4 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/csupport/sysflash/sysflash.h @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2022 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __SYSFLASH_H__ +#define __SYSFLASH_H__ + +#include +#include + +#if (MCUBOOT_IMAGE_NUMBER == 1) +/* + * NOTE: the definition below returns the same values for true/false on + * purpose, to avoid having to mark x as non-used by all callers when + * running in single image mode. + */ +#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? \ + FLASH_AREA_ID(image_0) : \ + FLASH_AREA_ID(image_0)) +#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? \ + FLASH_AREA_ID(image_1) : \ + FLASH_AREA_ID(image_1)) +#elif (MCUBOOT_IMAGE_NUMBER == 2) +/* MCUBoot currently supports only up to 2 updateable firmware images. + * If the number of the current image is greater than MCUBOOT_IMAGE_NUMBER - 1 + * then a dummy value will be assigned to the flash area macros. + */ +#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? \ + FLASH_AREA_ID(image_0) : \ + ((x) == 1) ? \ + FLASH_AREA_ID(image_2) : \ + 255) +#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? \ + FLASH_AREA_ID(image_1) : \ + ((x) == 1) ? \ + FLASH_AREA_ID(image_3) : \ + 255) +#else +#error "Image slot and flash area mapping is not defined" +#endif + +#define FLASH_AREA_IMAGE_SCRATCH FLASH_AREA_ID(image_scratch) + +#endif /* __SYSFLASH_H__ */ diff --git a/bootloader/mcuboot/sim/mcuboot-sys/src/api.rs b/bootloader/mcuboot/sim/mcuboot-sys/src/api.rs new file mode 100644 index 0000000..0a098ff --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/src/api.rs @@ -0,0 +1,390 @@ +// Copyright (c) 2017-2021 Linaro LTD +// Copyright (c) 2018-2019 JUUL Labs +// Copyright (c) 2023 Arm Limited +// +// SPDX-License-Identifier: Apache-2.0 + +//! HAL api for MyNewt applications + +use crate::area::CAreaDesc; +use log::{Level, log_enabled, warn}; +use simflash::{Result, Flash, FlashPtr}; +use std::{ + cell::RefCell, + collections::HashMap, + mem, + ptr, + slice, +}; + +/// A FlashMap maintain a table of [device_id -> Flash trait] +pub type FlashMap = HashMap; + +pub struct FlashParamsStruct { + align: u32, + erased_val: u8, +} + +pub type FlashParams = HashMap; + +/// The `boot_rsp` structure used by boot_go. +#[repr(C)] +#[derive(Debug)] +pub struct BootRsp { + pub br_hdr: *const ImageHeader, + pub flash_dev_id: u8, + pub image_off: u32, +} + +// TODO: Don't duplicate this image header declaration. +#[repr(C)] +#[derive(Debug)] +pub struct ImageHeader { + magic: u32, + load_addr: u32, + hdr_size: u16, + protect_tlv_size: u16, + img_size: u32, + flags: u32, + ver: ImageVersion, + _pad2: u32, +} + +#[repr(C)] +#[derive(Debug)] +pub struct ImageVersion { + pub major: u8, + pub minor: u8, + pub revision: u16, + pub build_num: u32, +} + +pub struct CAreaDescPtr { + pub ptr: *const CAreaDesc, +} + +pub struct FlashContext { + flash_map: FlashMap, + flash_params: FlashParams, + flash_areas: CAreaDescPtr, +} + +impl FlashContext { + pub fn new() -> FlashContext { + FlashContext { + flash_map: HashMap::new(), + flash_params: HashMap::new(), + flash_areas: CAreaDescPtr{ptr: ptr::null()}, + } + } +} + +impl Default for FlashContext { + fn default() -> FlashContext { + FlashContext { + flash_map: HashMap::new(), + flash_params: HashMap::new(), + flash_areas: CAreaDescPtr{ptr: ptr::null()}, + } + } +} + +#[repr(C)] +#[derive(Debug)] +pub struct CSimContext { + pub flash_counter: libc::c_int, + pub jumped: libc::c_int, + pub c_asserts: u8, + pub c_catch_asserts: u8, + // NOTE: Always leave boot_jmpbuf declaration at the end; this should + // store a "jmp_buf" which is arch specific and not defined by libc crate. + // The size below is enough to store data on a x86_64 machine. + pub boot_jmpbuf: [u64; 48], +} + +impl Default for CSimContext { + fn default() -> Self { + CSimContext { + flash_counter: 0, + jumped: 0, + c_asserts: 0, + c_catch_asserts: 0, + boot_jmpbuf: [0; 48], + } + } +} + +pub struct CSimContextPtr { + pub ptr: *const CSimContext, +} + +impl CSimContextPtr { + pub fn new() -> CSimContextPtr { + CSimContextPtr { + ptr: ptr::null(), + } + } +} + +impl Default for CSimContextPtr { + fn default() -> CSimContextPtr { + CSimContextPtr { + ptr: ptr::null(), + } + } +} + +/// This struct describes the RAM layout of the current device. It will be stashed, per test +/// thread, and queried by the C code. +#[repr(C)] +#[derive(Debug, Default)] +pub struct BootsimRamInfo { + pub start: u32, + pub size: u32, + pub base: usize, +} + +/// This struct stores the non-volatile security counter per image. It will be stored per test thread, +/// and the C code will set / get the values here. +#[repr(C)] +#[derive(Debug, Default)] +pub struct NvCounterStorage { + pub storage: Vec, +} + +impl NvCounterStorage { + pub fn new() -> Self { + let count = if cfg!(feature = "multiimage") { + 2 + } else { + 1 + }; + Self { + storage: vec![0; count] + } + } +} + +thread_local! { + pub static THREAD_CTX: RefCell = RefCell::new(FlashContext::new()); + pub static SIM_CTX: RefCell = RefCell::new(CSimContextPtr::new()); + pub static RAM_CTX: RefCell = RefCell::new(BootsimRamInfo::default()); + pub static NV_COUNTER_CTX: RefCell = RefCell::new(NvCounterStorage::new()); +} + +/// Set the flash device to be used by the simulation. The pointer is unsafely stashed away. +/// +/// # Safety +/// +/// This uses mem::transmute to stash a Rust pointer into a C value to +/// retrieve later. It should be safe to use this. +pub fn set_flash(dev_id: u8, dev: &mut dyn Flash) { + THREAD_CTX.with(|ctx| { + ctx.borrow_mut().flash_params.insert(dev_id, FlashParamsStruct { + align: dev.align() as u32, + erased_val: dev.erased_val(), + }); + unsafe { + let dev: &'static mut dyn Flash = mem::transmute(dev); + ctx.borrow_mut().flash_map.insert( + dev_id, FlashPtr{ptr: dev as *mut dyn Flash}); + } + }); +} + +pub fn clear_flash(dev_id: u8) { + THREAD_CTX.with(|ctx| { + ctx.borrow_mut().flash_map.remove(&dev_id); + }); +} + +// This isn't meant to call directly, but by a wrapper. + +#[no_mangle] +pub extern "C" fn sim_get_flash_areas() -> *const CAreaDesc { + THREAD_CTX.with(|ctx| { + ctx.borrow().flash_areas.ptr + }) +} + +#[no_mangle] +pub extern "C" fn sim_set_flash_areas(areas: *const CAreaDesc) { + THREAD_CTX.with(|ctx| { + ctx.borrow_mut().flash_areas.ptr = areas; + }); +} + +#[no_mangle] +pub extern "C" fn sim_reset_flash_areas() { + THREAD_CTX.with(|ctx| { + ctx.borrow_mut().flash_areas.ptr = ptr::null(); + }); +} + +#[no_mangle] +pub extern "C" fn sim_get_context() -> *const CSimContext { + SIM_CTX.with(|ctx| { + ctx.borrow().ptr + }) +} + +#[no_mangle] +pub extern "C" fn sim_set_context(ptr: *const CSimContext) { + SIM_CTX.with(|ctx| { + ctx.borrow_mut().ptr = ptr; + }); +} + +#[no_mangle] +pub extern "C" fn sim_reset_context() { + SIM_CTX.with(|ctx| { + ctx.borrow_mut().ptr = ptr::null(); + }); +} + +#[no_mangle] +pub extern "C" fn bootsim_get_ram_info() -> *const BootsimRamInfo { + RAM_CTX.with(|ctx| { + if ctx.borrow().base == 0 { + // Option is messier to get a pointer out of, so just check if the base has been set to + // anything. + panic!("ram info not set, but being used"); + } + ctx.as_ptr() + }) +} + +/// Store a copy of this RAM info. +pub fn set_ram_info(info: BootsimRamInfo) { + RAM_CTX.with(|ctx| { + ctx.replace(info); + }); +} + +/// Clear out the ram info. +pub fn clear_ram_info() { + RAM_CTX.with(|ctx| { + ctx.borrow_mut().base = 0; + }); +} + +#[no_mangle] +pub extern "C" fn sim_flash_erase(dev_id: u8, offset: u32, size: u32) -> libc::c_int { + let mut rc: libc::c_int = -19; + THREAD_CTX.with(|ctx| { + if let Some(flash) = ctx.borrow().flash_map.get(&dev_id) { + let dev = unsafe { &mut *(flash.ptr) }; + rc = map_err(dev.erase(offset as usize, size as usize)); + } + }); + rc +} + +#[no_mangle] +pub extern "C" fn sim_flash_read(dev_id: u8, offset: u32, dest: *mut u8, size: u32) -> libc::c_int { + let mut rc: libc::c_int = -19; + THREAD_CTX.with(|ctx| { + if let Some(flash) = ctx.borrow().flash_map.get(&dev_id) { + let mut buf: &mut[u8] = unsafe { slice::from_raw_parts_mut(dest, size as usize) }; + let dev = unsafe { &mut *(flash.ptr) }; + rc = map_err(dev.read(offset as usize, &mut buf)); + } + }); + rc +} + +#[no_mangle] +pub extern "C" fn sim_flash_write(dev_id: u8, offset: u32, src: *const u8, size: u32) -> libc::c_int { + let mut rc: libc::c_int = -19; + THREAD_CTX.with(|ctx| { + if let Some(flash) = ctx.borrow().flash_map.get(&dev_id) { + let buf: &[u8] = unsafe { slice::from_raw_parts(src, size as usize) }; + let dev = unsafe { &mut *(flash.ptr) }; + rc = map_err(dev.write(offset as usize, &buf)); + } + }); + rc +} + +#[no_mangle] +pub extern "C" fn sim_flash_align(id: u8) -> u32 { + THREAD_CTX.with(|ctx| { + ctx.borrow().flash_params.get(&id).unwrap().align + }) +} + +#[no_mangle] +pub extern "C" fn sim_flash_erased_val(id: u8) -> u8 { + THREAD_CTX.with(|ctx| { + ctx.borrow().flash_params.get(&id).unwrap().erased_val + }) +} + +fn map_err(err: Result<()>) -> libc::c_int { + match err { + Ok(()) => 0, + Err(e) => { + warn!("{}", e); + -1 + }, + } +} + +/// Called by C code to determine if we should log at this level. Levels are defined in +/// bootutil/bootutil_log.h. This makes the logging from the C code controlled by bootsim::api, so +/// for example, it can be enabled with something like: +/// RUST_LOG=bootsim::api=info cargo run --release runall +/// or +/// RUST_LOG=bootsim=info cargo run --release runall +#[no_mangle] +pub extern "C" fn sim_log_enabled(level: libc::c_int) -> libc::c_int { + let res = match level { + 1 => log_enabled!(Level::Error), + 2 => log_enabled!(Level::Warn), + 3 => log_enabled!(Level::Info), + 4 => log_enabled!(Level::Debug), + 5 => log_enabled!(Level::Trace), // log level == SIM + _ => false, + }; + if res { + 1 + } else { + 0 + } +} + +#[no_mangle] +pub extern "C" fn sim_set_nv_counter_for_image(image_index: u32, security_counter_value: u32) -> libc::c_int { + let mut rc = 0; + NV_COUNTER_CTX.with(|ctx| { + let mut counter_storage = ctx.borrow_mut(); + if image_index as usize >= counter_storage.storage.len() { + rc = -1; + return; + } + if counter_storage.storage[image_index as usize] > security_counter_value { + rc = -2; + warn!("Failed to set security counter value ({}) for image index {}", security_counter_value, image_index); + return; + } + + counter_storage.storage[image_index as usize] = security_counter_value; + }); + + return rc; +} + +#[no_mangle] +pub extern "C" fn sim_get_nv_counter_for_image(image_index: u32, security_counter_value: *mut u32) -> libc::c_int { + let mut rc = 0; + NV_COUNTER_CTX.with(|ctx| { + let counter_storage = ctx.borrow(); + if image_index as usize >= counter_storage.storage.len() { + rc = -1; + return; + } + unsafe { *security_counter_value = counter_storage.storage[image_index as usize] }; + + }); + return rc; +} diff --git a/bootloader/mcuboot/sim/mcuboot-sys/src/area.rs b/bootloader/mcuboot/sim/mcuboot-sys/src/area.rs new file mode 100644 index 0000000..1ebb405 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/src/area.rs @@ -0,0 +1,210 @@ +// Copyright (c) 2017-2021 Linaro LTD +// Copyright (c) 2018-2019 JUUL Labs +// Copyright (c) 2019 Arm Limited +// +// SPDX-License-Identifier: Apache-2.0 + +//! Describe flash areas. + +use simflash::{Flash, SimFlash, Sector}; +use std::ptr; +use std::collections::HashMap; +use std::borrow::BorrowMut; + +/// Structure to build up the boot area table. +#[derive(Debug, Default, Clone)] +pub struct AreaDesc { + areas: Vec>, + whole: Vec, + sectors: HashMap>, +} + +impl AreaDesc { + pub fn new() -> AreaDesc { + AreaDesc { + areas: vec![], + whole: vec![], + sectors: HashMap::new(), + } + } + + pub fn add_flash_sectors(&mut self, id: u8, flash: &SimFlash) { + self.sectors.insert(id, flash.sector_iter().collect()); + } + + /// Add a slot to the image. The slot must align with erasable units in the flash device. + /// Panics if the description is not valid. There are also bootloader assumptions that the + /// slots are PRIMARY_SLOT, SECONDARY_SLOT, and SCRATCH in that order. + pub fn add_image(&mut self, base: usize, len: usize, id: FlashId, dev_id: u8) { + let nid = id as usize; + let orig_base = base; + let orig_len = len; + let mut base = base; + let mut len = len; + + while nid > self.areas.len() { + self.areas.push(vec![]); + self.whole.push(Default::default()); + } + + if nid != self.areas.len() { + panic!("Flash areas not added in order"); + } + + let mut area = vec![]; + + for sector in &self.sectors[&dev_id] { + if len == 0 { + break; + }; + if base > sector.base + sector.size - 1 { + continue; + } + if sector.base != base { + panic!("Image does not start on a sector boundary"); + } + + area.push(FlashArea { + flash_id: id, + device_id: dev_id, + pad16: 0, + off: sector.base as u32, + size: sector.size as u32, + }); + + base += sector.size; + len -= sector.size; + } + + if len != 0 { + panic!("Image goes past end of device"); + } + + self.areas.push(area); + self.whole.push(FlashArea { + flash_id: id, + device_id: dev_id, + pad16: 0, + off: orig_base as u32, + size: orig_len as u32, + }); + } + + // Add a simple slot to the image. This ignores the device layout, and just adds the area as a + // single unit. It assumes that the image lines up with image boundaries. This tests + // configurations where the partition table uses larger sectors than the underlying flash + // device. + pub fn add_simple_image(&mut self, base: usize, len: usize, id: FlashId, dev_id: u8) { + let area = vec![FlashArea { + flash_id: id, + device_id: dev_id, + pad16: 0, + off: base as u32, + size: len as u32, + }]; + + self.areas.push(area); + self.whole.push(FlashArea { + flash_id: id, + device_id: dev_id, + pad16: 0, + off: base as u32, + size: len as u32, + }); + } + + // Look for the image with the given ID, and return its offset, size and + // device id. Returns None if the area is not present. + pub fn find(&self, id: FlashId) -> Option<(usize, usize, u8)> { + for area in &self.whole { + // FIXME: should we ensure id is not duplicated over multiple devices? + if area.flash_id == id { + return Some((area.off as usize, area.size as usize, area.device_id)); + } + } + None + } + + pub fn get_c(&self) -> Box { + let mut areas_box: Box = Box::new(Default::default()); + let areas: &mut CAreaDesc = areas_box.borrow_mut(); + + assert_eq!(self.areas.len(), self.whole.len()); + + for (i, area) in self.areas.iter().enumerate() { + if !area.is_empty() { + areas.slots[i].areas = &area[0]; + areas.slots[i].whole = self.whole[i].clone(); + areas.slots[i].num_areas = area.len() as u32; + areas.slots[i].id = area[0].flash_id; + } + } + + areas.num_slots = self.areas.len() as u32; + + areas_box + } + + /// Return an iterator over all `FlashArea`s present. + pub fn iter_areas(&self) -> impl Iterator { + self.whole.iter() + } +} + +/// The area descriptor, C format. +#[repr(C)] +#[derive(Debug, Default)] +pub struct CAreaDesc { + slots: [CArea; 16], + num_slots: u32, +} + +#[repr(C)] +#[derive(Debug)] +pub struct CArea { + whole: FlashArea, + areas: *const FlashArea, + num_areas: u32, + // FIXME: is this not already available on whole/areas? + id: FlashId, +} + +impl Default for CArea { + fn default() -> CArea { + CArea { + areas: ptr::null(), + whole: Default::default(), + id: FlashId::BootLoader, + num_areas: 0, + } + } +} + +/// Flash area map. +#[repr(u8)] +#[derive(Copy, Clone, Debug, Eq, PartialEq)] +#[allow(dead_code)] +pub enum FlashId { + BootLoader = 0, + Image0 = 1, + Image1 = 2, + ImageScratch = 3, + Image2 = 4, + Image3 = 5, +} + +impl Default for FlashId { + fn default() -> FlashId { + FlashId::BootLoader + } +} + +#[repr(C)] +#[derive(Debug, Clone, Default)] +pub struct FlashArea { + pub flash_id: FlashId, + pub device_id: u8, + pad16: u16, + pub off: u32, + pub size: u32, +} diff --git a/bootloader/mcuboot/sim/mcuboot-sys/src/c.rs b/bootloader/mcuboot/sim/mcuboot-sys/src/c.rs new file mode 100644 index 0000000..9d2a321 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/src/c.rs @@ -0,0 +1,226 @@ +// Copyright (c) 2017-2021 Linaro LTD +// Copyright (c) 2017-2019 JUUL Labs +// Copyright (c) 2019-2023 Arm Limited +// +// SPDX-License-Identifier: Apache-2.0 + +//! Interface wrappers to C API entering to the bootloader + +use crate::area::AreaDesc; +use simflash::SimMultiFlash; +use crate::api; + +#[allow(unused)] +use std::sync::Once; + +use std::borrow::Borrow; + +/// The result of an invocation of `boot_go`. This is intentionally opaque so that we can provide +/// accessors for everything we need from this. +#[derive(Debug)] +pub enum BootGoResult { + /// This run was stopped by the flash simulation mechanism. + Stopped, + /// The bootloader ran to completion with the following data. + Normal { + result: i32, + asserts: u8, + + resp: api::BootRsp, + }, +} + +impl BootGoResult { + /// Was this run interrupted. + pub fn interrupted(&self) -> bool { + matches!(self, BootGoResult::Stopped) + } + + /// Was this boot run successful (returned 0) + pub fn success(&self) -> bool { + matches!(self, BootGoResult::Normal { result: 0, .. }) + } + + /// Success, but also no asserts. + pub fn success_no_asserts(&self) -> bool { + matches!(self, BootGoResult::Normal { + result: 0, + asserts: 0, + .. + }) + } + + /// Get the asserts count. An interrupted run will be considered to have no asserts. + pub fn asserts(&self) -> u8 { + match self { + BootGoResult::Normal { asserts, .. } => *asserts, + _ => 0, + } + } + + /// Retrieve the 'resp' field that is filled in. + pub fn resp(&self) -> Option<&api::BootRsp> { + match self { + BootGoResult::Normal { resp, .. } => Some(resp), + _ => None, + } + } +} + +/// Invoke the bootloader on this flash device. +pub fn boot_go(multiflash: &mut SimMultiFlash, areadesc: &AreaDesc, + counter: Option<&mut i32>, image_index: Option, + catch_asserts: bool) -> BootGoResult { + init_crypto(); + + for (&dev_id, flash) in multiflash.iter_mut() { + api::set_flash(dev_id, flash); + } + let mut sim_ctx = api::CSimContext { + flash_counter: match counter { + None => 0, + Some(ref c) => **c as libc::c_int + }, + c_catch_asserts: if catch_asserts { 1 } else { 0 }, + .. Default::default() + }; + let mut rsp = api::BootRsp { + br_hdr: std::ptr::null(), + flash_dev_id: 0, + image_off: 0, + }; + let result: i32 = unsafe { + let adesc = areadesc.get_c(); + match image_index { + None => raw::invoke_boot_go(&mut sim_ctx as *mut _, + adesc.borrow() as *const _, + &mut rsp as *mut _, -1) as i32, + Some(i) => raw::invoke_boot_go(&mut sim_ctx as *mut _, + adesc.borrow() as *const _, + &mut rsp as *mut _, + i as i32) as i32 + } + }; + let asserts = sim_ctx.c_asserts; + if let Some(c) = counter { + *c = sim_ctx.flash_counter; + } + for &dev_id in multiflash.keys() { + api::clear_flash(dev_id); + } + if result == -0x13579 { + BootGoResult::Stopped + } else { + BootGoResult::Normal { result, asserts, resp: rsp } + } +} + +pub fn boot_trailer_sz(align: u32) -> u32 { + unsafe { raw::boot_trailer_sz(align) } +} + +pub fn boot_status_sz(align: u32) -> u32 { + unsafe { raw::boot_status_sz(align) } +} + +pub fn boot_magic_sz() -> usize { + unsafe { raw::boot_magic_sz() as usize } +} + +pub fn boot_max_align() -> usize { + unsafe { raw::boot_max_align() as usize } +} + +pub fn rsa_oaep_encrypt(pubkey: &[u8], seckey: &[u8]) -> Result<[u8; 256], &'static str> { + unsafe { + let mut encbuf: [u8; 256] = [0; 256]; + if raw::rsa_oaep_encrypt_(pubkey.as_ptr(), pubkey.len() as u32, + seckey.as_ptr(), seckey.len() as u32, + encbuf.as_mut_ptr()) == 0 { + return Ok(encbuf); + } + Err("Failed to encrypt buffer") + } +} + +pub fn kw_encrypt(kek: &[u8], seckey: &[u8], keylen: u32) -> Result, &'static str> { + unsafe { + let mut encbuf = vec![0u8; 24]; + if keylen == 32 { + encbuf = vec![0u8; 40]; + } + if raw::kw_encrypt_(kek.as_ptr(), seckey.as_ptr(), encbuf.as_mut_ptr()) == 0 { + return Ok(encbuf); + } + Err("Failed to encrypt buffer") + } +} + +pub fn set_security_counter(image_index: u32, security_counter_value: u32) { + api::sim_set_nv_counter_for_image(image_index, security_counter_value); +} + +pub fn get_security_counter(image_index: u32) -> u32 { + let mut counter_val: u32 = 0; + api::sim_get_nv_counter_for_image(image_index, &mut counter_val as *mut u32); + return counter_val; +} + +mod raw { + use crate::area::CAreaDesc; + use crate::api::{BootRsp, CSimContext}; + + extern "C" { + // This generates a warning about `CAreaDesc` not being foreign safe. There doesn't appear to + // be any way to get rid of this warning. See https://github.com/rust-lang/rust/issues/34798 + // for information and tracking. + pub fn invoke_boot_go(sim_ctx: *mut CSimContext, areadesc: *const CAreaDesc, + rsp: *mut BootRsp, image_index: libc::c_int) -> libc::c_int; + + pub fn boot_trailer_sz(min_write_sz: u32) -> u32; + pub fn boot_status_sz(min_write_sz: u32) -> u32; + + pub fn boot_magic_sz() -> u32; + pub fn boot_max_align() -> u32; + + pub fn rsa_oaep_encrypt_(pubkey: *const u8, pubkey_len: libc::c_uint, + seckey: *const u8, seckey_len: libc::c_uint, + encbuf: *mut u8) -> libc::c_int; + + pub fn kw_encrypt_(kek: *const u8, seckey: *const u8, + encbuf: *mut u8) -> libc::c_int; + + #[allow(unused)] + pub fn psa_crypto_init() -> u32; + + #[allow(unused)] + pub fn mbedtls_test_enable_insecure_external_rng(); + } +} + +#[allow(unused)] +static PSA_INIT_SYNC: Once = Once::new(); + +#[allow(unused)] +static MBEDTLS_EXTERNAL_RNG_ENABLE_SYNC: Once = Once::new(); + +#[cfg(feature = "psa-crypto-api")] +fn init_crypto() { + PSA_INIT_SYNC.call_once(|| { + assert_eq!(unsafe { raw::psa_crypto_init() }, 0); + }); + + /* The PSA APIs require properly initialisation of the entropy subsystem + * The configuration adds the option MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG when the + * psa-crypto-api feature is enabled. As a result the tests use the implementation + * of the test external rng that needs to be initialised before being able to use it + */ + MBEDTLS_EXTERNAL_RNG_ENABLE_SYNC.call_once(|| { + unsafe { raw::mbedtls_test_enable_insecure_external_rng() } + }); +} + +#[cfg(not(feature = "psa-crypto-api"))] +fn init_crypto() { + // When the feature is not enabled, the init is just empty +} diff --git a/bootloader/mcuboot/sim/mcuboot-sys/src/lib.rs b/bootloader/mcuboot/sim/mcuboot-sys/src/lib.rs new file mode 100644 index 0000000..bc3fc49 --- /dev/null +++ b/bootloader/mcuboot/sim/mcuboot-sys/src/lib.rs @@ -0,0 +1,52 @@ +// Copyright (c) 2017-2019 Linaro LTD +// +// SPDX-License-Identifier: Apache-2.0 + +mod area; +pub mod c; + +// The API needs to be public, even though it isn't intended to be called by Rust code, but the +// functions are exported to C code. +pub mod api; + +pub use crate::area::{AreaDesc, FlashId}; + +/// For testing the ram load feature, we need to emulate a block of RAM and be able to pass that +/// down to the C code. The call down to boot_go should go through this object so that the buffer +/// itself is managed properly. +pub struct RamBlock { + ram: Vec, + offset: u32, // 32-bit offset. +} + +impl RamBlock { + pub fn new(size: u32, offset: u32) -> RamBlock { + RamBlock { + ram: vec![0; size as usize], + offset: offset, + } + } + + /// Borrow the RAM buffer, with 'offset' being the beginning of the buffer. + pub fn borrow(&self) -> &[u8] { + &self.ram + } + + /// Borrow a piece of the ram, with 'offset' being the beginning of the buffer. + pub fn borrow_part(&self, base: usize, size: usize) -> &[u8] { + &self.ram[base..base+size] + } + + pub fn invoke(&self, act: F) -> R + where F: FnOnce() -> R + { + api::set_ram_info(api::BootsimRamInfo { + start: self.offset, + size: self.ram.len() as u32, + base: &self.ram[0] as *const u8 as usize - self.offset as usize, + }); + let result = act(); + api::clear_ram_info(); + result + } +} diff --git a/bootloader/mcuboot/sim/simflash/.gitignore b/bootloader/mcuboot/sim/simflash/.gitignore new file mode 100644 index 0000000..03314f7 --- /dev/null +++ b/bootloader/mcuboot/sim/simflash/.gitignore @@ -0,0 +1 @@ +Cargo.lock diff --git a/bootloader/mcuboot/sim/simflash/Cargo.toml b/bootloader/mcuboot/sim/simflash/Cargo.toml new file mode 100644 index 0000000..e745a0c --- /dev/null +++ b/bootloader/mcuboot/sim/simflash/Cargo.toml @@ -0,0 +1,10 @@ +[package] +name = "simflash" +version = "0.1.0" +authors = ["David Brown "] +edition = "2021" + +[dependencies] +rand = "0.8" +log = "0.4" +thiserror = "1.0" diff --git a/bootloader/mcuboot/sim/simflash/src/lib.rs b/bootloader/mcuboot/sim/simflash/src/lib.rs new file mode 100644 index 0000000..4c49ccb --- /dev/null +++ b/bootloader/mcuboot/sim/simflash/src/lib.rs @@ -0,0 +1,377 @@ +// Copyright (c) 2017-2021 Linaro LTD +// Copyright (c) 2017-2018 JUUL Labs +// +// SPDX-License-Identifier: Apache-2.0 + +//! A flash simulator +//! +//! This module is capable of simulating the type of NOR flash commonly used in microcontrollers. +//! These generally can be written as individual bytes, but must be erased in larger units. + +mod pdump; + +use crate::pdump::HexDump; +use log::info; +use rand::{ + self, + distributions::Standard, + Rng, +}; +use std::{ + collections::HashMap, + fs::File, + io::{self, Write}, + iter::Enumerate, + path::Path, + slice, +}; +use thiserror::Error; + +pub type Result = std::result::Result; + +#[derive(Error, Debug)] +pub enum FlashError { + #[error("Offset out of bounds: {0}")] + OutOfBounds(String), + #[error("Invalid write: {0}")] + Write(String), + #[error("Write failed by chance: {0}")] + SimulatedFail(String), + #[error("{0}")] + Io(#[from] io::Error), +} + +// Transition from error-chain. +macro_rules! bail { + ($item:expr) => (return Err($item.into());) +} + +pub struct FlashPtr { + pub ptr: *mut dyn Flash, +} +unsafe impl Send for FlashPtr {} + +pub trait Flash { + fn erase(&mut self, offset: usize, len: usize) -> Result<()>; + fn write(&mut self, offset: usize, payload: &[u8]) -> Result<()>; + fn read(&self, offset: usize, data: &mut [u8]) -> Result<()>; + + fn add_bad_region(&mut self, offset: usize, len: usize, rate: f32) -> Result<()>; + fn reset_bad_regions(&mut self); + + fn set_verify_writes(&mut self, enable: bool); + + fn sector_iter(&self) -> SectorIter<'_>; + fn device_size(&self) -> usize; + + fn align(&self) -> usize; + fn erased_val(&self) -> u8; +} + +fn ebounds>(message: T) -> FlashError { + FlashError::OutOfBounds(message.as_ref().to_owned()) +} + +#[allow(dead_code)] +fn ewrite>(message: T) -> FlashError { + FlashError::Write(message.as_ref().to_owned()) +} + +#[allow(dead_code)] +fn esimulatedwrite>(message: T) -> FlashError { + FlashError::SimulatedFail(message.as_ref().to_owned()) +} + +/// An emulated flash device. It is represented as a block of bytes, and a list of the sector +/// mappings. +#[derive(Clone)] +pub struct SimFlash { + data: Vec, + write_safe: Vec, + sectors: Vec, + bad_region: Vec<(usize, usize, f32)>, + // Alignment required for writes. + align: usize, + verify_writes: bool, + erased_val: u8, +} + +impl SimFlash { + /// Given a sector size map, construct a flash device for that. + pub fn new(sectors: Vec, align: usize, erased_val: u8) -> SimFlash { + // Verify that the alignment is a positive power of two. + assert!(align > 0); + assert!(align & (align - 1) == 0); + + let total = sectors.iter().sum(); + SimFlash { + data: vec![erased_val; total], + write_safe: vec![true; total], + sectors, + bad_region: Vec::new(), + align, + verify_writes: true, + erased_val, + } + } + + #[allow(dead_code)] + pub fn dump(&self) { + self.data.dump(); + } + + /// Dump this image to the given file. + #[allow(dead_code)] + pub fn write_file>(&self, path: P) -> Result<()> { + let mut fd = File::create(path)?; + fd.write_all(&self.data)?; + Ok(()) + } + + // Scan the sector map, and return the base and offset within a sector for this given byte. + // Returns None if the value is outside of the device. + fn get_sector(&self, offset: usize) -> Option<(usize, usize)> { + let mut offset = offset; + for (sector, &size) in self.sectors.iter().enumerate() { + if offset < size { + return Some((sector, offset)); + } + offset -= size; + } + None + } + +} + +pub type SimMultiFlash = HashMap; + +impl Flash for SimFlash { + /// The flash drivers tend to erase beyond the bounds of the given range. Instead, we'll be + /// strict, and make sure that the passed arguments are exactly at a sector boundary, otherwise + /// return an error. + fn erase(&mut self, offset: usize, len: usize) -> Result<()> { + let (_start, slen) = self.get_sector(offset).ok_or_else(|| ebounds("start"))?; + let (end, elen) = self.get_sector(offset + len - 1).ok_or_else(|| ebounds("end"))?; + + if slen != 0 { + bail!(ebounds("offset not at start of sector")); + } + if elen != self.sectors[end] - 1 { + bail!(ebounds("end not at start of sector")); + } + + for x in &mut self.data[offset .. offset + len] { + *x = self.erased_val; + } + + for x in &mut self.write_safe[offset .. offset + len] { + *x = true; + } + + Ok(()) + } + + /// We restrict to only allowing writes of values that are: + /// + /// 1. being written to for the first time + /// 2. being written to after being erased + /// + /// This emulates a flash device which starts out erased, with the + /// added restriction that repeated writes to the same location + /// are disallowed, even if they would be safe to do. + fn write(&mut self, offset: usize, payload: &[u8]) -> Result<()> { + for &(off, len, rate) in &self.bad_region { + if offset >= off && (offset + payload.len()) <= (off + len) { + let mut rng = rand::thread_rng(); + let samp: f32 = rng.sample(Standard); + if samp < rate { + bail!(esimulatedwrite( + format!("Ignoring write to {:#x}-{:#x}", off, off + len))); + } + } + } + + if offset + payload.len() > self.data.len() { + panic!("Write outside of device"); + } + + // Verify the alignment (which must be a power of two). + if offset & (self.align - 1) != 0 { + panic!("Misaligned write address"); + } + + if payload.len() & (self.align - 1) != 0 { + panic!("Write length not multiple of alignment"); + } + + for (i, x) in &mut self.write_safe[offset .. offset + payload.len()].iter_mut().enumerate() { + if self.verify_writes && !(*x) { + panic!("Write to unerased location at 0x{:x}", offset + i); + } + *x = false; + } + + let sub = &mut self.data[offset .. offset + payload.len()]; + sub.copy_from_slice(payload); + Ok(()) + } + + /// Read is simple. + fn read(&self, offset: usize, data: &mut [u8]) -> Result<()> { + if offset + data.len() > self.data.len() { + bail!(ebounds("Read outside of device")); + } + + let sub = &self.data[offset .. offset + data.len()]; + data.copy_from_slice(sub); + Ok(()) + } + + /// Adds a new flash bad region. Writes to this area fail with a chance + /// given by `rate`. + fn add_bad_region(&mut self, offset: usize, len: usize, rate: f32) -> Result<()> { + if !(0.0..=1.0).contains(&rate) { + bail!(ebounds("Invalid rate")); + } + + info!("Adding new bad region {:#x}-{:#x}", offset, offset + len); + self.bad_region.push((offset, len, rate)); + + Ok(()) + } + + fn reset_bad_regions(&mut self) { + self.bad_region.clear(); + } + + fn set_verify_writes(&mut self, enable: bool) { + self.verify_writes = enable; + } + + /// An iterator over each sector in the device. + fn sector_iter(&self) -> SectorIter<'_> { + SectorIter { + iter: self.sectors.iter().enumerate(), + base: 0, + } + } + + fn device_size(&self) -> usize { + self.data.len() + } + + fn align(&self) -> usize { + self.align + } + + fn erased_val(&self) -> u8 { + self.erased_val + } +} + +/// It is possible to iterate over the sectors in the device, each element returning this. +#[derive(Debug, Clone)] +pub struct Sector { + /// Which sector is this, starting from 0. + pub num: usize, + /// The offset, in bytes, of the start of this sector. + pub base: usize, + /// The length, in bytes, of this sector. + pub size: usize, +} + +pub struct SectorIter<'a> { + iter: Enumerate>, + base: usize, +} + +impl<'a> Iterator for SectorIter<'a> { + type Item = Sector; + + fn next(&mut self) -> Option { + match self.iter.next() { + None => None, + Some((num, &size)) => { + let base = self.base; + self.base += size; + Some(Sector { + num, + base, + size, + }) + } + } + } +} + +#[cfg(test)] +mod test { + use super::{Flash, FlashError, SimFlash, Result, Sector}; + + #[test] + fn test_flash() { + for &erased_val in &[0, 0xff] { + // NXP-style, uniform sectors. + let mut f1 = SimFlash::new(vec![4096usize; 256], 1, erased_val); + test_device(&mut f1, erased_val); + + // STM style, non-uniform sectors. + let mut f2 = SimFlash::new(vec![16 * 1024, 16 * 1024, 16 * 1024, 64 * 1024, + 128 * 1024, 128 * 1024, 128 * 1024], 1, erased_val); + test_device(&mut f2, erased_val); + } + } + + fn test_device(flash: &mut dyn Flash, erased_val: u8) { + let sectors: Vec = flash.sector_iter().collect(); + + flash.erase(0, sectors[0].size).unwrap(); + let flash_size = flash.device_size(); + flash.erase(0, flash_size).unwrap(); + assert!(flash.erase(0, sectors[0].size - 1).is_bounds()); + + // Verify that write and erase do something. + flash.write(0, &[0x55]).unwrap(); + let mut buf = [0xAA; 4]; + flash.read(0, &mut buf).unwrap(); + assert_eq!(buf, [0x55, erased_val, erased_val, erased_val]); + + flash.erase(0, sectors[0].size).unwrap(); + flash.read(0, &mut buf).unwrap(); + assert_eq!(buf, [erased_val; 4]); + + // Program the first and last byte of each sector, verify that has been done, and then + // erase to verify the erase boundaries. + for sector in §ors { + let byte = [(sector.num & 127) as u8]; + flash.write(sector.base, &byte).unwrap(); + flash.write(sector.base + sector.size - 1, &byte).unwrap(); + } + + // Verify the above + let mut buf = Vec::new(); + for sector in §ors { + let byte = (sector.num & 127) as u8; + buf.resize(sector.size, 0); + flash.read(sector.base, &mut buf).unwrap(); + assert_eq!(buf.first(), Some(&byte)); + assert_eq!(buf.last(), Some(&byte)); + assert!(buf[1..buf.len()-1].iter().all(|&x| x == erased_val)); + } + } + + // Helper checks for the result type. + trait EChecker { + fn is_bounds(&self) -> bool; + } + + impl EChecker for Result { + + fn is_bounds(&self) -> bool { + match *self { + Err(FlashError::OutOfBounds(_)) => true, + _ => false, + } + } + } +} diff --git a/bootloader/mcuboot/sim/simflash/src/pdump.rs b/bootloader/mcuboot/sim/simflash/src/pdump.rs new file mode 100644 index 0000000..b2f403f --- /dev/null +++ b/bootloader/mcuboot/sim/simflash/src/pdump.rs @@ -0,0 +1,80 @@ +// Copyright (c) 2017,2021 Linaro LTD +// +// SPDX-License-Identifier: Apache-2.0 + +// Printable hexdump. + +pub trait HexDump { + // Output the data value in hex. + fn dump(&self); +} + +struct Dumper { + hex: String, + ascii: String, + count: usize, + total_count: usize, +} + +impl Dumper { + fn new() -> Dumper { + Dumper { + hex: String::with_capacity(49), + ascii: String::with_capacity(16), + count: 0, + total_count: 0, + } + } + + fn add_byte(&mut self, ch: u8) { + if self.count == 16 { + self.ship(); + } + if self.count == 8 { + self.hex.push(' '); + } + self.hex.push_str(&format!(" {:02x}", ch)[..]); + self.ascii.push(if (b' '..=b'~').contains(&ch) { + ch as char + } else { + '.' + }); + self.count += 1; + } + + fn ship(&mut self) { + if self.count == 0 { + return; + } + + println!("{:06x} {:-49} |{}|", self.total_count, self.hex, self.ascii); + + self.hex.clear(); + self.ascii.clear(); + self.total_count += 16; + self.count = 0; + } +} + +impl<'a> HexDump for &'a [u8] { + fn dump(&self) { + let mut dump = Dumper::new(); + for ch in self.iter() { + dump.add_byte(*ch); + } + dump.ship(); + } +} + +impl HexDump for Vec { + fn dump(&self) { + (&self[..]).dump() + } +} + +#[test] +fn samples() { + "Hello".as_bytes().dump(); + "This is a much longer string".as_bytes().dump(); + "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f".as_bytes().dump(); +} diff --git a/bootloader/mcuboot/sim/src/caps.rs b/bootloader/mcuboot/sim/src/caps.rs new file mode 100644 index 0000000..d8dd068 --- /dev/null +++ b/bootloader/mcuboot/sim/src/caps.rs @@ -0,0 +1,62 @@ +// Copyright (c) 2017-2021 Linaro LTD +// Copyright (c) 2019 JUUL Labs +// Copyright (c) 2019-2023 Arm Limited +// +// SPDX-License-Identifier: Apache-2.0 + +// Query the bootloader's capabilities. + +#[repr(u32)] +#[derive(Copy, Clone, Debug, Eq, PartialEq)] +#[allow(unused)] +pub enum Caps { + RSA2048 = (1 << 0), + /* reserved (1 << 1) */ + EcdsaP256 = (1 << 2), + SwapUsingScratch = (1 << 3), + OverwriteUpgrade = (1 << 4), + EncRsa = (1 << 5), + EncKw = (1 << 6), + ValidatePrimarySlot = (1 << 7), + RSA3072 = (1 << 8), + Ed25519 = (1 << 9), + EncEc256 = (1 << 10), + SwapUsingMove = (1 << 11), + DowngradePrevention = (1 << 12), + EncX25519 = (1 << 13), + Bootstrap = (1 << 14), + Aes256 = (1 << 15), + RamLoad = (1 << 16), + DirectXip = (1 << 17), + HwRollbackProtection = (1 << 18), + EcdsaP384 = (1 << 19), +} + +impl Caps { + pub fn present(self) -> bool { + let caps = unsafe { bootutil_get_caps() }; + (caps as u32) & (self as u32) != 0 + } + + /// Does this build have ECDSA of some type enabled for signatures. + pub fn has_ecdsa() -> bool { + Caps::EcdsaP256.present() || Caps::EcdsaP384.present() + } + + /// Query for the number of images that have been configured into this + /// MCUboot build. + pub fn get_num_images() -> usize { + (unsafe { bootutil_get_num_images() }) as usize + } + + /// Query if this configuration performs some kind of upgrade by writing to flash. + pub fn modifies_flash() -> bool { + // All other configurations perform upgrades by writing to flash. + !(Self::RamLoad.present() || Self::DirectXip.present()) + } +} + +extern "C" { + fn bootutil_get_caps() -> Caps; + fn bootutil_get_num_images() -> u32; +} diff --git a/bootloader/mcuboot/sim/src/depends.rs b/bootloader/mcuboot/sim/src/depends.rs new file mode 100644 index 0000000..229b3e2 --- /dev/null +++ b/bootloader/mcuboot/sim/src/depends.rs @@ -0,0 +1,187 @@ +// Copyright (c) 2019-2021 Linaro LTD +// +// SPDX-License-Identifier: Apache-2.0 + +//! Support and tests related to the dependency management for multi-image +//! support. + +use crate::image::ImageVersion; + +pub trait Depender { + /// Generate a version for this particular image. The slot indicates + /// which slot this is being put in. + fn my_version(&self, offset: usize, slot: usize) -> ImageVersion; + + /// Return dependencies for this image/slot combination. + fn my_deps(&self, offset: usize, slot: usize) -> Vec; + + /// Return the image ID of the other version. + fn other_id(&self) -> u8; +} + +/// A boring image is used when we aren't testing dependencies. There will +/// be meaningful version numbers. The size field is the image number we +/// are. +pub struct BoringDep { + number: usize, + test: DepTest, +} + +impl BoringDep { + pub fn new(number: usize, test: &DepTest) -> BoringDep { + BoringDep { + number, + test: test.clone(), + } + } +} + +impl Depender for BoringDep { + fn my_version(&self, _offset: usize, slot: usize) -> ImageVersion { + let slot = if self.test.downgrade { + 1 - slot + } else { + slot + }; + ImageVersion::new_synthetic(self.number as u8, slot as u8, 0) + } + + fn my_deps(&self, _offset: usize, _slot: usize) -> Vec { + vec![] + } + + fn other_id(&self) -> u8 { + 0 + } +} + +/// An individual test of the dependency mechanism describes one of the +/// possibilities for the dependency information for each image, and what +/// the expected outcome is. +#[derive(Clone, Debug)] +pub struct DepTest { + /// What kinds of dependency should be installed in the image. + pub depends: [DepType; 2], + + /// What is the expected outcome of the upgrade. + pub upgrades: [UpgradeInfo; 2], + + /// Should this be considered a downgrade (cause the version number to + /// decrease). + pub downgrade: bool, +} + +/// Describes the various types of dependency information that can be +/// provided. +#[derive(Clone, Debug)] +pub enum DepType { + /// Do not include dependency information + Nothing, + /// Provide dependency information that matches the other image. + Correct, + /// Provide a dependency that matches the old version of the other + /// image. + OldCorrect, + /// Provide dependency information describing something newer than the + /// other image. + Newer, + /// Don't provide an upgrade image at all for this image + NoUpgrade, +} + +/// Describes what our expectation is for an upgrade. +#[derive(Clone, Debug, PartialEq, Eq)] +pub enum UpgradeInfo { + /// The current version should be held. + Held, + /// The image should be upgraded + Upgraded, +} + +/// A "test" that gives no dependency information. +pub static NO_DEPS: DepTest = DepTest { + depends: [DepType::Nothing, DepType::Nothing], + upgrades: [UpgradeInfo::Upgraded, UpgradeInfo::Upgraded], + downgrade: false, +}; + +/// A "test" with no dependency information, and the images marked as a +/// downgrade. +pub static REV_DEPS: DepTest = DepTest { + depends: [DepType::Nothing, DepType::Nothing], + upgrades: [UpgradeInfo::Held, UpgradeInfo::Held], + downgrade: true, +}; + +/// A PairDep describes the dependencies between two pairs. +pub struct PairDep { + /// The image number of this image. + number: usize, + + test: DepTest, +} + +impl PairDep { + pub fn new(total_image: usize, my_image: usize, deps: &DepTest) -> PairDep { + if total_image != 2 { + panic!("PairDep only works when there are two images"); + } + + PairDep { + number: my_image, + test: deps.clone(), + } + } +} + +impl Depender for PairDep { + fn my_version(&self, _offset: usize, slot: usize) -> ImageVersion { + let slot = if self.test.downgrade { + 1 - slot + } else { + slot + }; + ImageVersion::new_synthetic(self.number as u8, slot as u8, 0) + } + + fn my_deps(&self, _offset: usize, slot: usize) -> Vec { + // For now, don't put any dependencies in slot zero. They could be + // added here if we someday implement checking these. + if slot == 0 { + vec![] + } else { + match self.test.depends[self.number] { + DepType::Nothing => vec![], + DepType::NoUpgrade => panic!("Shouldn't get to this point"), + DepType::Correct => vec![ + ImageVersion::new_synthetic(self.other_id(), slot as u8, 0) + ], + DepType::OldCorrect => vec![ + ImageVersion::new_synthetic(self.other_id(), 0, 0) + ], + DepType::Newer => vec![ + ImageVersion::new_synthetic(self.other_id(), slot as u8, 1) + ], + } + } + } + + fn other_id(&self) -> u8 { + (1 - self.number) as u8 + } +} + +impl ImageVersion { + /// Generate an image version based on some key information. The image + /// number influences the major version number (by an arbitrary factor), + /// and the slot affects the major number on the build_number. The minor + /// number can also be given to force numbers to be different. + fn new_synthetic(image_id: u8, slot: u8, minor: u8) -> ImageVersion { + ImageVersion { + major: image_id * 20 + slot, + minor, + revision: 1, + build_num: slot as u32, + } + } +} diff --git a/bootloader/mcuboot/sim/src/ecdsa_pub_key-rs.txt b/bootloader/mcuboot/sim/src/ecdsa_pub_key-rs.txt new file mode 100644 index 0000000..3d86436 --- /dev/null +++ b/bootloader/mcuboot/sim/src/ecdsa_pub_key-rs.txt @@ -0,0 +1,32 @@ +static ECDSA256_PUB_KEY: &[u8] = &[ + 0x30, 0x59, 0x30, 0x13, 0x06, 0x07, 0x2a, 0x86, + 0x48, 0xce, 0x3d, 0x02, 0x01, 0x06, 0x08, 0x2a, + 0x86, 0x48, 0xce, 0x3d, 0x03, 0x01, 0x07, 0x03, + 0x42, 0x00, 0x04, 0x2a, 0xcb, 0x40, 0x3c, 0xe8, + 0xfe, 0xed, 0x5b, 0xa4, 0x49, 0x95, 0xa1, 0xa9, + 0x1d, 0xae, 0xe8, 0xdb, 0xbe, 0x19, 0x37, 0xcd, + 0x14, 0xfb, 0x2f, 0x24, 0x57, 0x37, 0xe5, 0x95, + 0x39, 0x88, 0xd9, 0x94, 0xb9, 0xd6, 0x5a, 0xeb, + 0xd7, 0xcd, 0xd5, 0x30, 0x8a, 0xd6, 0xfe, 0x48, + 0xb2, 0x4a, 0x6a, 0x81, 0x0e, 0xe5, 0xf0, 0x7d, + 0x8b, 0x68, 0x34, 0xcc, 0x3a, 0x6a, 0xfc, 0x53, + 0x8e, 0xfa, 0xc1, +]; + +static ECDSAP384_PUB_KEY: &[u8] = &[ + 0x30, 0x76, 0x30, 0x10, 0x06, 0x07, 0x2a, 0x86, + 0x48, 0xce, 0x3d, 0x02, 0x01, 0x06, 0x05, 0x2b, + 0x81, 0x04, 0x00, 0x22, 0x03, 0x62, 0x00, 0x04, + 0x0c, 0x76, 0xca, 0xae, 0x72, 0x3a, 0xa5, 0xe8, + 0xf0, 0xd4, 0xf1, 0x16, 0xb5, 0x02, 0xef, 0x77, + 0xa1, 0x1b, 0x93, 0x61, 0x78, 0xc0, 0x09, 0x26, + 0x7b, 0x3b, 0x40, 0x9c, 0xee, 0x49, 0x85, 0xe0, + 0xc9, 0x4f, 0xe7, 0xf2, 0xba, 0x97, 0x6c, 0xf3, + 0x82, 0x65, 0x14, 0x2c, 0xf5, 0x0c, 0x73, 0x33, + 0x4d, 0x32, 0xe7, 0x9b, 0xd3, 0x42, 0xcc, 0x95, + 0x5a, 0xe5, 0xe2, 0xf5, 0xf4, 0x6e, 0x45, 0xe0, + 0xed, 0x20, 0x35, 0x5c, 0xaf, 0x52, 0x35, 0x81, + 0xd4, 0xdc, 0x9c, 0xe3, 0x9e, 0x22, 0x3e, 0xfb, + 0x3f, 0x22, 0x10, 0xda, 0x70, 0x03, 0x37, 0xad, + 0xa8, 0xf2, 0x48, 0xfe, 0x3a, 0x60, 0x69, 0xa5, +]; diff --git a/bootloader/mcuboot/sim/src/ed25519_pub_key-rs.txt b/bootloader/mcuboot/sim/src/ed25519_pub_key-rs.txt new file mode 100644 index 0000000..8abce32 --- /dev/null +++ b/bootloader/mcuboot/sim/src/ed25519_pub_key-rs.txt @@ -0,0 +1,8 @@ +static ED25519_PUB_KEY: &[u8] = &[ + 0x30, 0x2a, 0x30, 0x05, 0x06, 0x03, 0x2b, 0x65, + 0x70, 0x03, 0x21, 0x00, 0xd4, 0xb3, 0x1b, 0xa4, + 0x9a, 0x3a, 0xdd, 0x3f, 0x82, 0x5d, 0x10, 0xca, + 0x7f, 0x31, 0xb5, 0x0b, 0x0d, 0xe8, 0x7f, 0x37, + 0xcc, 0xc4, 0x9f, 0x1a, 0x40, 0x3a, 0x5c, 0x13, + 0x20, 0xff, 0xb4, 0xe0, +]; diff --git a/bootloader/mcuboot/sim/src/image.rs b/bootloader/mcuboot/sim/src/image.rs new file mode 100644 index 0000000..4cd6488 --- /dev/null +++ b/bootloader/mcuboot/sim/src/image.rs @@ -0,0 +1,2332 @@ +// Copyright (c) 2019-2021 Linaro LTD +// Copyright (c) 2019-2020 JUUL Labs +// Copyright (c) 2019-2023 Arm Limited +// +// SPDX-License-Identifier: Apache-2.0 + +use byteorder::{ + LittleEndian, WriteBytesExt, +}; +use log::{ + Level::Info, + error, + info, + log_enabled, + warn, +}; +use rand::{ + Rng, RngCore, SeedableRng, + rngs::SmallRng, +}; +use std::{ + collections::{BTreeMap, HashSet}, io::{Cursor, Write}, mem, rc::Rc, slice +}; +use aes::{ + Aes128, + Aes128Ctr, + Aes256, + Aes256Ctr, + NewBlockCipher, +}; +use cipher::{ + FromBlockCipher, + generic_array::GenericArray, + StreamCipher, + }; + +use simflash::{Flash, SimFlash, SimMultiFlash}; +use mcuboot_sys::{c, AreaDesc, FlashId, RamBlock}; +use crate::{ + ALL_DEVICES, + DeviceName, +}; +use crate::caps::Caps; +use crate::depends::{ + BoringDep, + Depender, + DepTest, + DepType, + NO_DEPS, + PairDep, + UpgradeInfo, +}; +use crate::tlv::{ManifestGen, TlvGen, TlvFlags}; +use crate::utils::align_up; +use typenum::{U32, U16}; + +/// For testing, use a non-zero offset for the ram-load, to make sure the offset is getting used +/// properly, but the value is not really that important. +const RAM_LOAD_ADDR: u32 = 1024; + +/// A builder for Images. This describes a single run of the simulator, +/// capturing the configuration of a particular set of devices, including +/// the flash simulator(s) and the information about the slots. +#[derive(Clone)] +pub struct ImagesBuilder { + flash: SimMultiFlash, + areadesc: Rc, + slots: Vec<[SlotInfo; 2]>, + ram: RamData, +} + +/// Images represents the state of a simulation for a given set of images. +/// The flash holds the state of the simulated flash, whereas primaries +/// and upgrades hold the expected contents of these images. +pub struct Images { + flash: SimMultiFlash, + areadesc: Rc, + images: Vec, + total_count: Option, + ram: RamData, +} + +/// When doing multi-image, there is an instance of this information for +/// each of the images. Single image there will be one of these. +struct OneImage { + slots: [SlotInfo; 2], + primaries: ImageData, + upgrades: ImageData, +} + +/// The Rust-side representation of an image. For unencrypted images, this +/// is just the unencrypted payload. For encrypted images, we store both +/// the encrypted and the plaintext. +struct ImageData { + size: usize, + plain: Vec, + cipher: Option>, +} + +/// For the RamLoad test cases, we need a contiguous area of RAM to load these images into. For +/// multi-image builds, these may not correspond with the offsets. This has to be computed early, +/// before images are built, because each image contains the offset where the image is to be loaded +/// in the header, which is contained within the signature. +#[derive(Clone, Debug)] +struct RamData { + places: BTreeMap, + total: u32, +} + +/// Every slot is indexed by this key. +#[derive(Clone, Debug, Eq, Ord, PartialEq, PartialOrd)] +struct SlotKey { + dev_id: u8, + base_off: usize, +} + +#[derive(Clone, Debug)] +struct SlotPlace { + offset: u32, + size: u32, +} + +#[derive(Copy, Clone, Debug, Eq, PartialEq)] +pub enum ImageManipulation { + None, + BadSignature, + WrongOffset, + IgnoreRamLoadFlag, + /// True to use same address, + /// false to overlap by 1 byte + OverlapImages(bool), + CorruptHigherVersionImage, +} + + +impl ImagesBuilder { + /// Construct a new image builder for the given device. Returns + /// Some(builder) if is possible to test this configuration, or None if + /// not possible (for example, if there aren't enough image slots). + pub fn new(device: DeviceName, align: usize, erased_val: u8) -> Result { + let (flash, areadesc, unsupported_caps) = Self::make_device(device, align, erased_val); + + for cap in unsupported_caps { + if cap.present() { + return Err(format!("unsupported {:?}", cap)); + } + } + + let num_images = Caps::get_num_images(); + + let mut slots = Vec::with_capacity(num_images); + for image in 0..num_images { + // This mapping must match that defined in + // `boot/zephyr/include/sysflash/sysflash.h`. + let id0 = match image { + 0 => FlashId::Image0, + 1 => FlashId::Image2, + _ => panic!("More than 2 images not supported"), + }; + let (primary_base, primary_len, primary_dev_id) = match areadesc.find(id0) { + Some(info) => info, + None => return Err("insufficient partitions".to_string()), + }; + let id1 = match image { + 0 => FlashId::Image1, + 1 => FlashId::Image3, + _ => panic!("More than 2 images not supported"), + }; + let (secondary_base, secondary_len, secondary_dev_id) = match areadesc.find(id1) { + Some(info) => info, + None => return Err("insufficient partitions".to_string()), + }; + + let offset_from_end = c::boot_magic_sz() + c::boot_max_align() * 4; + + // Construct a primary image. + let primary = SlotInfo { + base_off: primary_base as usize, + trailer_off: primary_base + primary_len - offset_from_end, + len: primary_len as usize, + dev_id: primary_dev_id, + index: 0, + }; + + // And an upgrade image. + let secondary = SlotInfo { + base_off: secondary_base as usize, + trailer_off: secondary_base + secondary_len - offset_from_end, + len: secondary_len as usize, + dev_id: secondary_dev_id, + index: 1, + }; + + slots.push([primary, secondary]); + } + + let ram = RamData::new(&slots); + + Ok(ImagesBuilder { + flash, + areadesc, + slots, + ram, + }) + } + + pub fn each_device(f: F) + where F: Fn(Self) + { + for &dev in ALL_DEVICES { + for &align in test_alignments() { + for &erased_val in &[0, 0xff] { + match Self::new(dev, align, erased_val) { + Ok(run) => f(run), + Err(msg) => warn!("Skipping {}: {}", dev, msg), + } + } + } + } + } + + /// Construct an `Images` that doesn't expect an upgrade to happen. + pub fn make_no_upgrade_image(self, deps: &DepTest, img_manipulation: ImageManipulation) -> Images { + let num_images = self.num_images(); + let mut flash = self.flash; + let ram = self.ram.clone(); // TODO: Avoid this clone. + let mut higher_version_corrupted = false; + let images = self.slots.into_iter().enumerate().map(|(image_num, slots)| { + let dep: Box = if num_images > 1 { + Box::new(PairDep::new(num_images, image_num, deps)) + } else { + Box::new(BoringDep::new(image_num, deps)) + }; + + let (primaries,upgrades) = if img_manipulation == ImageManipulation::CorruptHigherVersionImage && !higher_version_corrupted { + higher_version_corrupted = true; + let prim = install_image(&mut flash, &slots[0], + maximal(42784), &ram, &*dep, ImageManipulation::None, Some(0)); + let upgr = match deps.depends[image_num] { + DepType::NoUpgrade => install_no_image(), + _ => install_image(&mut flash, &slots[1], + maximal(46928), &ram, &*dep, ImageManipulation::BadSignature, Some(0)) + }; + (prim, upgr) + } else { + let prim = install_image(&mut flash, &slots[0], + maximal(42784), &ram, &*dep, img_manipulation, Some(0)); + let upgr = match deps.depends[image_num] { + DepType::NoUpgrade => install_no_image(), + _ => install_image(&mut flash, &slots[1], + maximal(46928), &ram, &*dep, img_manipulation, Some(0)) + }; + (prim, upgr) + }; + OneImage { + slots, + primaries, + upgrades, + }}).collect(); + install_ptable(&mut flash, &self.areadesc); + Images { + flash, + areadesc: self.areadesc, + images, + total_count: None, + ram: self.ram, + } + } + + pub fn make_image(self, deps: &DepTest, permanent: bool) -> Images { + let mut images = self.make_no_upgrade_image(deps, ImageManipulation::None); + for image in &images.images { + mark_upgrade(&mut images.flash, &image.slots[1]); + } + + // The count is meaningless if no flash operations are performed. + if !Caps::modifies_flash() { + return images; + } + + // upgrades without fails, counts number of flash operations + let total_count = match images.run_basic_upgrade(permanent) { + Some(v) => v, + None => + if deps.upgrades.iter().any(|u| *u == UpgradeInfo::Held) { + 0 + } else { + panic!("Unable to perform basic upgrade"); + } + }; + + images.total_count = Some(total_count); + images + } + + pub fn make_bad_secondary_slot_image(self) -> Images { + let mut bad_flash = self.flash; + let ram = self.ram.clone(); // TODO: Avoid this clone. + let images = self.slots.into_iter().enumerate().map(|(image_num, slots)| { + let dep = BoringDep::new(image_num, &NO_DEPS); + let primaries = install_image(&mut bad_flash, &slots[0], + maximal(32784), &ram, &dep, ImageManipulation::None, Some(0)); + let upgrades = install_image(&mut bad_flash, &slots[1], + maximal(41928), &ram, &dep, ImageManipulation::BadSignature, Some(0)); + OneImage { + slots, + primaries, + upgrades, + }}).collect(); + Images { + flash: bad_flash, + areadesc: self.areadesc, + images, + total_count: None, + ram: self.ram, + } + } + + pub fn make_oversized_secondary_slot_image(self) -> Images { + let mut bad_flash = self.flash; + let ram = self.ram.clone(); // TODO: Avoid this clone. + let images = self.slots.into_iter().enumerate().map(|(image_num, slots)| { + let dep = BoringDep::new(image_num, &NO_DEPS); + let primaries = install_image(&mut bad_flash, &slots[0], + maximal(32784), &ram, &dep, ImageManipulation::None, Some(0)); + let upgrades = install_image(&mut bad_flash, &slots[1], + ImageSize::Oversized, &ram, &dep, ImageManipulation::None, Some(0)); + OneImage { + slots, + primaries, + upgrades, + }}).collect(); + Images { + flash: bad_flash, + areadesc: self.areadesc, + images, + total_count: None, + ram: self.ram, + } + } + + pub fn make_erased_secondary_image(self) -> Images { + let mut flash = self.flash; + let ram = self.ram.clone(); // TODO: Avoid this clone. + let images = self.slots.into_iter().enumerate().map(|(image_num, slots)| { + let dep = BoringDep::new(image_num, &NO_DEPS); + let primaries = install_image(&mut flash, &slots[0], + maximal(32784), &ram, &dep,ImageManipulation::None, Some(0)); + let upgrades = install_no_image(); + OneImage { + slots, + primaries, + upgrades, + }}).collect(); + Images { + flash, + areadesc: self.areadesc, + images, + total_count: None, + ram: self.ram, + } + } + + pub fn make_bootstrap_image(self) -> Images { + let mut flash = self.flash; + let ram = self.ram.clone(); // TODO: Avoid this clone. + let images = self.slots.into_iter().enumerate().map(|(image_num, slots)| { + let dep = BoringDep::new(image_num, &NO_DEPS); + let primaries = install_no_image(); + let upgrades = install_image(&mut flash, &slots[1], + maximal(32784), &ram, &dep, ImageManipulation::None, Some(0)); + OneImage { + slots, + primaries, + upgrades, + }}).collect(); + Images { + flash, + areadesc: self.areadesc, + images, + total_count: None, + ram: self.ram, + } + } + + pub fn make_oversized_bootstrap_image(self) -> Images { + let mut flash = self.flash; + let ram = self.ram.clone(); // TODO: Avoid this clone. + let images = self.slots.into_iter().enumerate().map(|(image_num, slots)| { + let dep = BoringDep::new(image_num, &NO_DEPS); + let primaries = install_no_image(); + let upgrades = install_image(&mut flash, &slots[1], + ImageSize::Oversized, &ram, &dep, ImageManipulation::None, Some(0)); + OneImage { + slots, + primaries, + upgrades, + }}).collect(); + Images { + flash, + areadesc: self.areadesc, + images, + total_count: None, + ram: self.ram, + } + } + + /// If security_cnt is None then do not add a security counter TLV, otherwise add the specified value. + pub fn make_image_with_security_counter(self, security_cnt: Option) -> Images { + let mut flash = self.flash; + let ram = self.ram.clone(); // TODO: Avoid this clone. + let images = self.slots.into_iter().enumerate().map(|(image_num, slots)| { + let dep = BoringDep::new(image_num, &NO_DEPS); + let primaries = install_image(&mut flash, &slots[0], + maximal(32784), &ram, &dep, ImageManipulation::None, security_cnt); + let upgrades = install_image(&mut flash, &slots[1], + maximal(41928), &ram, &dep, ImageManipulation::None, security_cnt.map(|v| v + 1)); + OneImage { + slots, + primaries, + upgrades, + }}).collect(); + Images { + flash, + areadesc: self.areadesc, + images, + total_count: None, + ram: self.ram, + } + } + + /// Build the Flash and area descriptor for a given device. + pub fn make_device(device: DeviceName, align: usize, erased_val: u8) -> (SimMultiFlash, Rc, &'static [Caps]) { + match device { + DeviceName::Stm32f4 => { + // STM style flash. Large sectors, with a large scratch area. + // The flash layout as described is not present in any real STM32F4 device, but it + // serves to exercise support for sectors of varying sizes inside a single slot, + // as long as they are compatible in both slots and all fit in the scratch. + let dev = SimFlash::new(vec![16 * 1024, 16 * 1024, 16 * 1024, 16 * 1024, 64 * 1024, + 32 * 1024, 32 * 1024, 64 * 1024, + 32 * 1024, 32 * 1024, 64 * 1024, + 128 * 1024], + align as usize, erased_val); + let dev_id = 0; + let mut areadesc = AreaDesc::new(); + areadesc.add_flash_sectors(dev_id, &dev); + areadesc.add_image(0x020000, 0x020000, FlashId::Image0, dev_id); + areadesc.add_image(0x040000, 0x020000, FlashId::Image1, dev_id); + areadesc.add_image(0x060000, 0x020000, FlashId::ImageScratch, dev_id); + + let mut flash = SimMultiFlash::new(); + flash.insert(dev_id, dev); + (flash, Rc::new(areadesc), &[Caps::SwapUsingMove]) + } + DeviceName::K64f => { + // NXP style flash. Small sectors, one small sector for scratch. + let dev = SimFlash::new(vec![4096; 128], align as usize, erased_val); + + let dev_id = 0; + let mut areadesc = AreaDesc::new(); + areadesc.add_flash_sectors(dev_id, &dev); + areadesc.add_image(0x020000, 0x020000, FlashId::Image0, dev_id); + areadesc.add_image(0x040000, 0x020000, FlashId::Image1, dev_id); + areadesc.add_image(0x060000, 0x001000, FlashId::ImageScratch, dev_id); + + let mut flash = SimMultiFlash::new(); + flash.insert(dev_id, dev); + (flash, Rc::new(areadesc), &[]) + } + DeviceName::K64fBig => { + // Simulating an STM style flash on top of an NXP style flash. Underlying flash device + // uses small sectors, but we tell the bootloader they are large. + let dev = SimFlash::new(vec![4096; 128], align as usize, erased_val); + + let dev_id = 0; + let mut areadesc = AreaDesc::new(); + areadesc.add_flash_sectors(dev_id, &dev); + areadesc.add_simple_image(0x020000, 0x020000, FlashId::Image0, dev_id); + areadesc.add_simple_image(0x040000, 0x020000, FlashId::Image1, dev_id); + areadesc.add_simple_image(0x060000, 0x020000, FlashId::ImageScratch, dev_id); + + let mut flash = SimMultiFlash::new(); + flash.insert(dev_id, dev); + (flash, Rc::new(areadesc), &[Caps::SwapUsingMove]) + } + DeviceName::Nrf52840 => { + // Simulating the flash on the nrf52840 with partitions set up so that the scratch size + // does not divide into the image size. + let dev = SimFlash::new(vec![4096; 128], align as usize, erased_val); + + let dev_id = 0; + let mut areadesc = AreaDesc::new(); + areadesc.add_flash_sectors(dev_id, &dev); + areadesc.add_image(0x008000, 0x034000, FlashId::Image0, dev_id); + areadesc.add_image(0x03c000, 0x034000, FlashId::Image1, dev_id); + areadesc.add_image(0x070000, 0x00d000, FlashId::ImageScratch, dev_id); + + let mut flash = SimMultiFlash::new(); + flash.insert(dev_id, dev); + (flash, Rc::new(areadesc), &[]) + } + DeviceName::Nrf52840UnequalSlots => { + let dev = SimFlash::new(vec![4096; 128], align as usize, erased_val); + + let dev_id = 0; + let mut areadesc = AreaDesc::new(); + areadesc.add_flash_sectors(dev_id, &dev); + areadesc.add_image(0x008000, 0x03c000, FlashId::Image0, dev_id); + areadesc.add_image(0x044000, 0x03b000, FlashId::Image1, dev_id); + + let mut flash = SimMultiFlash::new(); + flash.insert(dev_id, dev); + (flash, Rc::new(areadesc), &[Caps::SwapUsingScratch, Caps::OverwriteUpgrade]) + } + DeviceName::Nrf52840SpiFlash => { + // Simulate nrf52840 with external SPI flash. The external SPI flash + // has a larger sector size so for now store scratch on that flash. + let dev0 = SimFlash::new(vec![4096; 128], align as usize, erased_val); + let dev1 = SimFlash::new(vec![8192; 64], align as usize, erased_val); + + let mut areadesc = AreaDesc::new(); + areadesc.add_flash_sectors(0, &dev0); + areadesc.add_flash_sectors(1, &dev1); + + areadesc.add_image(0x008000, 0x068000, FlashId::Image0, 0); + areadesc.add_image(0x000000, 0x068000, FlashId::Image1, 1); + areadesc.add_image(0x068000, 0x018000, FlashId::ImageScratch, 1); + + let mut flash = SimMultiFlash::new(); + flash.insert(0, dev0); + flash.insert(1, dev1); + (flash, Rc::new(areadesc), &[Caps::SwapUsingMove]) + } + DeviceName::K64fMulti => { + // NXP style flash, but larger, to support multiple images. + let dev = SimFlash::new(vec![4096; 256], align as usize, erased_val); + + let dev_id = 0; + let mut areadesc = AreaDesc::new(); + areadesc.add_flash_sectors(dev_id, &dev); + areadesc.add_image(0x020000, 0x020000, FlashId::Image0, dev_id); + areadesc.add_image(0x040000, 0x020000, FlashId::Image1, dev_id); + areadesc.add_image(0x060000, 0x001000, FlashId::ImageScratch, dev_id); + areadesc.add_image(0x080000, 0x020000, FlashId::Image2, dev_id); + areadesc.add_image(0x0a0000, 0x020000, FlashId::Image3, dev_id); + + let mut flash = SimMultiFlash::new(); + flash.insert(dev_id, dev); + (flash, Rc::new(areadesc), &[]) + } + } + } + + pub fn num_images(&self) -> usize { + self.slots.len() + } +} + +impl Images { + /// A simple upgrade without forced failures. + /// + /// Returns the number of flash operations which can later be used to + /// inject failures at chosen steps. Returns None if it was unable to + /// count the operations in a basic upgrade. + pub fn run_basic_upgrade(&self, permanent: bool) -> Option { + let (flash, total_count) = self.try_upgrade(None, permanent); + info!("Total flash operation count={}", total_count); + + if !self.verify_images(&flash, 0, 1) { + warn!("Image mismatch after first boot"); + None + } else { + Some(total_count) + } + } + + pub fn run_bootstrap(&self) -> bool { + let mut flash = self.flash.clone(); + let mut fails = 0; + + if Caps::Bootstrap.present() { + info!("Try bootstraping image in the primary"); + + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Failed first boot"); + fails += 1; + } + + if !self.verify_images(&flash, 0, 1) { + warn!("Image in the first slot was not bootstrapped"); + fails += 1; + } + + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_SET) { + warn!("Mismatched trailer for the primary slot"); + fails += 1; + } + } + + if fails > 0 { + error!("Expected trailer on secondary slot to be erased"); + } + + fails > 0 + } + + pub fn run_oversized_bootstrap(&self) -> bool { + let mut flash = self.flash.clone(); + let mut fails = 0; + + if Caps::Bootstrap.present() { + info!("Try bootstraping image in the primary"); + + let boot_result = c::boot_go(&mut flash, &self.areadesc, None, None, false).interrupted(); + + if boot_result { + warn!("Failed first boot"); + fails += 1; + } + + if self.verify_images(&flash, 0, 1) { + warn!("Image in the first slot was not bootstrapped"); + fails += 1; + } + + if self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_SET) { + warn!("Mismatched trailer for the primary slot"); + fails += 1; + } + } + + if fails > 0 { + error!("Expected trailer on secondary slot to be erased"); + } + + fails > 0 + } + + + /// Test a simple upgrade, with dependencies given, and verify that the + /// image does as is described in the test. + pub fn run_check_deps(&self, deps: &DepTest) -> bool { + if !Caps::modifies_flash() { + return false; + } + + let (flash, _) = self.try_upgrade(None, true); + + self.verify_dep_images(&flash, deps) + } + + fn is_swap_upgrade(&self) -> bool { + Caps::SwapUsingScratch.present() || Caps::SwapUsingMove.present() + } + + pub fn run_basic_revert(&self) -> bool { + if Caps::OverwriteUpgrade.present() || !Caps::modifies_flash() { + return false; + } + + let mut fails = 0; + + // FIXME: this test would also pass if no swap is ever performed??? + if self.is_swap_upgrade() { + for count in 2 .. 5 { + info!("Try revert: {}", count); + let flash = self.try_revert(count); + if !self.verify_images(&flash, 0, 0) { + error!("Revert failure on count {}", count); + fails += 1; + } + } + } + + fails > 0 + } + + pub fn run_perm_with_fails(&self) -> bool { + if !Caps::modifies_flash() { + return false; + } + + let mut fails = 0; + let total_flash_ops = self.total_count.unwrap(); + + if skip_slow_test() { + return false; + } + + // Let's try an image halfway through. + for i in 1 .. total_flash_ops { + info!("Try interruption at {}", i); + let (flash, count) = self.try_upgrade(Some(i), true); + info!("Second boot, count={}", count); + if !self.verify_images(&flash, 0, 1) { + warn!("FAIL at step {} of {}", i, total_flash_ops); + fails += 1; + } + + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_SET) { + warn!("Mismatched trailer for the primary slot"); + fails += 1; + } + + if !self.verify_trailers(&flash, 1, BOOT_MAGIC_UNSET, + BOOT_FLAG_UNSET, BOOT_FLAG_UNSET) { + warn!("Mismatched trailer for the secondary slot"); + fails += 1; + } + + if self.is_swap_upgrade() && !self.verify_images(&flash, 1, 0) { + warn!("Secondary slot FAIL at step {} of {}", + i, total_flash_ops); + fails += 1; + } + } + + if fails > 0 { + error!("{} out of {} failed {:.2}%", fails, total_flash_ops, + fails as f32 * 100.0 / total_flash_ops as f32); + } + + fails > 0 + } + + pub fn run_perm_with_random_fails(&self, total_fails: usize) -> bool { + if !Caps::modifies_flash() { + return false; + } + + let mut fails = 0; + let total_flash_ops = self.total_count.unwrap(); + let (flash, total_counts) = self.try_random_fails(total_flash_ops, total_fails); + info!("Random interruptions at reset points={:?}", total_counts); + + let primary_slot_ok = self.verify_images(&flash, 0, 1); + let secondary_slot_ok = if self.is_swap_upgrade() { + // TODO: This result is ignored. + self.verify_images(&flash, 1, 0) + } else { + true + }; + if !primary_slot_ok || !secondary_slot_ok { + error!("Image mismatch after random interrupts: primary slot={} \ + secondary slot={}", + if primary_slot_ok { "ok" } else { "fail" }, + if secondary_slot_ok { "ok" } else { "fail" }); + fails += 1; + } + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_SET) { + error!("Mismatched trailer for the primary slot"); + fails += 1; + } + if !self.verify_trailers(&flash, 1, BOOT_MAGIC_UNSET, + BOOT_FLAG_UNSET, BOOT_FLAG_UNSET) { + error!("Mismatched trailer for the secondary slot"); + fails += 1; + } + + if fails > 0 { + error!("Error testing perm upgrade with {} fails", total_fails); + } + + fails > 0 + } + + pub fn run_revert_with_fails(&self) -> bool { + if Caps::OverwriteUpgrade.present() || !Caps::modifies_flash() { + return false; + } + + let mut fails = 0; + + if skip_slow_test() { + return false; + } + + if self.is_swap_upgrade() { + for i in 1 .. self.total_count.unwrap() { + info!("Try interruption at {}", i); + if self.try_revert_with_fail_at(i) { + error!("Revert failed at interruption {}", i); + fails += 1; + } + } + } + + fails > 0 + } + + pub fn run_norevert(&self) -> bool { + if Caps::OverwriteUpgrade.present() || !Caps::modifies_flash() { + return false; + } + + let mut flash = self.flash.clone(); + let mut fails = 0; + + info!("Try norevert"); + + // First do a normal upgrade... + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Failed first boot"); + fails += 1; + } + + //FIXME: copy_done is written by boot_go, is it ok if no copy + // was ever done? + + if !self.verify_images(&flash, 0, 1) { + warn!("Primary slot image verification FAIL"); + fails += 1; + } + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_UNSET, BOOT_FLAG_SET) { + warn!("Mismatched trailer for the primary slot"); + fails += 1; + } + if !self.verify_trailers(&flash, 1, BOOT_MAGIC_UNSET, + BOOT_FLAG_UNSET, BOOT_FLAG_UNSET) { + warn!("Mismatched trailer for the secondary slot"); + fails += 1; + } + + // Marks image in the primary slot as permanent, + // no revert should happen... + self.mark_permanent_upgrades(&mut flash, 0); + + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_SET) { + warn!("Mismatched trailer for the primary slot"); + fails += 1; + } + + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Failed second boot"); + fails += 1; + } + + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_SET) { + warn!("Mismatched trailer for the primary slot"); + fails += 1; + } + if !self.verify_images(&flash, 0, 1) { + warn!("Failed image verification"); + fails += 1; + } + + if fails > 0 { + error!("Error running upgrade without revert"); + } + + fails > 0 + } + + // Test taht too big upgrade image will be rejected + pub fn run_oversizefail_upgrade(&self) -> bool { + let mut flash = self.flash.clone(); + let mut fails = 0; + + info!("Try upgrade image with to big size"); + + // Only perform this test if an upgrade is expected to happen. + if !Caps::modifies_flash() { + info!("Skipping upgrade image with bad signature"); + return false; + } + + self.mark_upgrades(&mut flash, 0); + self.mark_permanent_upgrades(&mut flash, 0); + self.mark_upgrades(&mut flash, 1); + + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_UNSET) { + warn!("1. Mismatched trailer for the primary slot"); + fails += 1; + } + + // Run the bootloader... + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Failed first boot"); + fails += 1; + } + + // State should not have changed + if !self.verify_images(&flash, 0, 0) { + warn!("Failed image verification"); + fails += 1; + } + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_UNSET) { + warn!("2. Mismatched trailer for the primary slot"); + fails += 1; + } + + if fails > 0 { + error!("Expected an upgrade failure when image has to big size"); + } + + fails > 0 + } + + // Test that an upgrade is rejected. Assumes that the image was build + // such that the upgrade is instead a downgrade. + pub fn run_nodowngrade(&self) -> bool { + if !Caps::DowngradePrevention.present() { + return false; + } + + let mut flash = self.flash.clone(); + let mut fails = 0; + + info!("Try no downgrade"); + + // First, do a normal upgrade. + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Failed first boot"); + fails += 1; + } + + if !self.verify_images(&flash, 0, 0) { + warn!("Failed verification after downgrade rejection"); + fails += 1; + } + + if fails > 0 { + error!("Error testing downgrade rejection"); + } + + fails > 0 + } + + // Tests a new image written to the primary slot that already has magic and + // image_ok set while there is no image on the secondary slot, so no revert + // should ever happen... + pub fn run_norevert_newimage(&self) -> bool { + if !Caps::modifies_flash() { + info!("Skipping run_norevert_newimage, as configuration doesn't modify flash"); + return false; + } + + let mut flash = self.flash.clone(); + let mut fails = 0; + + info!("Try non-revert on imgtool generated image"); + + self.mark_upgrades(&mut flash, 0); + + // This simulates writing an image created by imgtool to + // the primary slot + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_UNSET, BOOT_FLAG_UNSET) { + warn!("Mismatched trailer for the primary slot"); + fails += 1; + } + + // Run the bootloader... + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Failed first boot"); + fails += 1; + } + + // State should not have changed + if !self.verify_images(&flash, 0, 0) { + warn!("Failed image verification"); + fails += 1; + } + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_UNSET, BOOT_FLAG_UNSET) { + warn!("Mismatched trailer for the primary slot"); + fails += 1; + } + if !self.verify_trailers(&flash, 1, BOOT_MAGIC_UNSET, + BOOT_FLAG_UNSET, BOOT_FLAG_UNSET) { + warn!("Mismatched trailer for the secondary slot"); + fails += 1; + } + + if fails > 0 { + error!("Expected a non revert with new image"); + } + + fails > 0 + } + + // Tests a new image written to the primary slot that already has magic and + // image_ok set while there is no image on the secondary slot, so no revert + // should ever happen... + pub fn run_signfail_upgrade(&self) -> bool { + let mut flash = self.flash.clone(); + let mut fails = 0; + + info!("Try upgrade image with bad signature"); + + // Only perform this test if an upgrade is expected to happen. + if !Caps::modifies_flash() { + info!("Skipping upgrade image with bad signature"); + return false; + } + + self.mark_upgrades(&mut flash, 0); + self.mark_permanent_upgrades(&mut flash, 0); + self.mark_upgrades(&mut flash, 1); + + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_UNSET) { + warn!("Mismatched trailer for the primary slot"); + fails += 1; + } + + // Run the bootloader... + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Failed first boot"); + fails += 1; + } + + // State should not have changed + if !self.verify_images(&flash, 0, 0) { + warn!("Failed image verification"); + fails += 1; + } + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_UNSET) { + warn!("Mismatched trailer for the primary slot"); + fails += 1; + } + + if fails > 0 { + error!("Expected an upgrade failure when image has bad signature"); + } + + fails > 0 + } + + // Should detect there is a leftover trailer in an otherwise erased + // secondary slot and erase its trailer. + pub fn run_secondary_leftover_trailer(&self) -> bool { + if !Caps::modifies_flash() { + return false; + } + + let mut flash = self.flash.clone(); + let mut fails = 0; + + info!("Try with a leftover trailer in the secondary; must be erased"); + + // Add a trailer on the secondary slot + self.mark_permanent_upgrades(&mut flash, 1); + self.mark_upgrades(&mut flash, 1); + + // Run the bootloader... + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Failed first boot"); + fails += 1; + } + + // State should not have changed + if !self.verify_images(&flash, 0, 0) { + warn!("Failed image verification"); + fails += 1; + } + if !self.verify_trailers(&flash, 1, BOOT_MAGIC_UNSET, + BOOT_FLAG_UNSET, BOOT_FLAG_UNSET) { + warn!("Mismatched trailer for the secondary slot"); + fails += 1; + } + + if fails > 0 { + error!("Expected trailer on secondary slot to be erased"); + } + + fails > 0 + } + + fn trailer_sz(&self, align: usize) -> usize { + c::boot_trailer_sz(align as u32) as usize + } + + fn status_sz(&self, align: usize) -> usize { + c::boot_status_sz(align as u32) as usize + } + + /// This test runs a simple upgrade with no fails in the images, but + /// allowing for fails in the status area. This should run to the end + /// and warn that write fails were detected... + pub fn run_with_status_fails_complete(&self) -> bool { + if !Caps::ValidatePrimarySlot.present() || !Caps::modifies_flash() { + return false; + } + + let mut flash = self.flash.clone(); + let mut fails = 0; + + info!("Try swap with status fails"); + + self.mark_permanent_upgrades(&mut flash, 1); + self.mark_bad_status_with_rate(&mut flash, 0, 1.0); + + let result = c::boot_go(&mut flash, &self.areadesc, None, None, true); + if !result.success() { + warn!("Failed!"); + fails += 1; + } + + // Failed writes to the marked "bad" region don't assert anymore. + // Any detected assert() is happening in another part of the code. + if result.asserts() != 0 { + warn!("At least one assert() was called"); + fails += 1; + } + + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_SET) { + warn!("Mismatched trailer for the primary slot"); + fails += 1; + } + + if !self.verify_images(&flash, 0, 1) { + warn!("Failed image verification"); + fails += 1; + } + + info!("validate primary slot enabled; \ + re-run of boot_go should just work"); + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Failed!"); + fails += 1; + } + + if fails > 0 { + error!("Error running upgrade with status write fails"); + } + + fails > 0 + } + + /// This test runs a simple upgrade with no fails in the images, but + /// allowing for fails in the status area. This should run to the end + /// and warn that write fails were detected... + pub fn run_with_status_fails_with_reset(&self) -> bool { + if Caps::OverwriteUpgrade.present() || !Caps::modifies_flash() { + false + } else if Caps::ValidatePrimarySlot.present() { + + let mut flash = self.flash.clone(); + let mut fails = 0; + let mut count = self.total_count.unwrap() / 2; + + //info!("count={}\n", count); + + info!("Try interrupted swap with status fails"); + + self.mark_permanent_upgrades(&mut flash, 1); + self.mark_bad_status_with_rate(&mut flash, 0, 0.5); + + // Should not fail, writing to bad regions does not assert + let asserts = c::boot_go(&mut flash, &self.areadesc, + Some(&mut count), None, true).asserts(); + if asserts != 0 { + warn!("At least one assert() was called"); + fails += 1; + } + + self.reset_bad_status(&mut flash, 0); + + info!("Resuming an interrupted swap operation"); + let asserts = c::boot_go(&mut flash, &self.areadesc, None, None, + true).asserts(); + + // This might throw no asserts, for large sector devices, where + // a single failure writing is indistinguishable from no failure, + // or throw a single assert for small sector devices that fail + // multiple times... + if asserts > 1 { + warn!("Expected single assert validating the primary slot, \ + more detected {}", asserts); + fails += 1; + } + + if fails > 0 { + error!("Error running upgrade with status write fails"); + } + + fails > 0 + } else { + let mut flash = self.flash.clone(); + let mut fails = 0; + + info!("Try interrupted swap with status fails"); + + self.mark_permanent_upgrades(&mut flash, 1); + self.mark_bad_status_with_rate(&mut flash, 0, 1.0); + + // This is expected to fail while writing to bad regions... + let asserts = c::boot_go(&mut flash, &self.areadesc, None, None, + true).asserts(); + if asserts == 0 { + warn!("No assert() detected"); + fails += 1; + } + + fails > 0 + } + } + + /// Test the direct XIP configuration. With this mode, flash images are never moved, and the + /// bootloader merely selects which partition is the proper one to boot. + pub fn run_direct_xip(&self) -> bool { + if !Caps::DirectXip.present() { + return false; + } + + // Clone the flash so we can tell if unchanged. + let mut flash = self.flash.clone(); + + let result = c::boot_go(&mut flash, &self.areadesc, None, None, true); + + // Ensure the boot was successful. + let resp = if let Some(resp) = result.resp() { + resp + } else { + panic!("Boot didn't return a valid result"); + }; + + // This configuration should always try booting from the first upgrade slot. + if let Some((offset, _, dev_id)) = self.areadesc.find(FlashId::Image1) { + assert_eq!(offset, resp.image_off as usize); + assert_eq!(dev_id, resp.flash_dev_id); + } else { + panic!("Unable to find upgrade image"); + } + false + } + + /// Test the ram-loading. + pub fn run_ram_load(&self) -> bool { + if !Caps::RamLoad.present() { + return false; + } + + // Clone the flash so we can tell if unchanged. + let mut flash = self.flash.clone(); + + // Setup ram based on the ram configuration we determined earlier for the images. + let ram = RamBlock::new(self.ram.total - RAM_LOAD_ADDR, RAM_LOAD_ADDR); + + // println!("Ram: {:#?}", self.ram); + + // Verify that the images area loaded into this. + let result = ram.invoke(|| c::boot_go(&mut flash, &self.areadesc, None, + None, true)); + if !result.success() { + error!("Failed to execute ram-load"); + return true; + } + + // Verify each image. + for image in &self.images { + let place = self.ram.lookup(&image.slots[0]); + let ram_image = ram.borrow_part(place.offset as usize - RAM_LOAD_ADDR as usize, + place.size as usize); + let src_sz = image.upgrades.size(); + if src_sz > ram_image.len() { + error!("Image ended up too large, nonsensical"); + return true; + } + let src_image = &image.upgrades.plain[0..src_sz]; + let ram_image = &ram_image[0..src_sz]; + if ram_image != src_image { + error!("Image not loaded correctly"); + return true; + } + + } + + return false; + } + + /// Test the split ram-loading. + pub fn run_split_ram_load(&self) -> bool { + if !Caps::RamLoad.present() { + return false; + } + + // Clone the flash so we can tell if unchanged. + let mut flash = self.flash.clone(); + + // Setup ram based on the ram configuration we determined earlier for the images. + let ram = RamBlock::new(self.ram.total - RAM_LOAD_ADDR, RAM_LOAD_ADDR); + + for (idx, _image) in (&self.images).iter().enumerate() { + // Verify that the images area loaded into this. + let result = ram.invoke(|| c::boot_go(&mut flash, &self.areadesc, + None, Some(idx as i32), true)); + if !result.success() { + error!("Failed to execute ram-load"); + return true; + } + } + + // Verify each image. + for image in &self.images { + let place = self.ram.lookup(&image.slots[0]); + let ram_image = ram.borrow_part(place.offset as usize - RAM_LOAD_ADDR as usize, + place.size as usize); + let src_sz = image.upgrades.size(); + if src_sz > ram_image.len() { + error!("Image ended up too large, nonsensical"); + return true; + } + let src_image = &image.upgrades.plain[0..src_sz]; + let ram_image = &ram_image[0..src_sz]; + if ram_image != src_image { + error!("Image not loaded correctly"); + return true; + } + + } + + return false; + } + + pub fn run_hw_rollback_prot(&self) -> bool { + if !Caps::HwRollbackProtection.present() { + return false; + } + + let mut flash = self.flash.clone(); + + // set the "stored" security counter to a fixed value. + c::set_security_counter(0, 30); + + let result = c::boot_go(&mut flash, &self.areadesc, None, None, true); + + if result.success() { + warn!("Successful boot when it did not suppose to happen!"); + return true; + } + let counter_val = c::get_security_counter(0); + if counter_val != 30 { + warn!("Counter was changed when it did not suppose to!"); + return true; + } + + false + } + + pub fn run_ram_load_boot_with_result(&self, expected_result: bool) -> bool { + if !Caps::RamLoad.present() { + return false; + } + // Clone the flash so we can tell if unchanged. + let mut flash = self.flash.clone(); + + // Create RAM config. + let ram = RamBlock::new(self.ram.total - RAM_LOAD_ADDR, RAM_LOAD_ADDR); + + // Run the bootloader, and verify that it couldn't run to completion. + let result = ram.invoke(|| c::boot_go(&mut flash, &self.areadesc, None, + None, true)); + + if result.success() != expected_result { + error!("RAM load boot result was not of the expected value! (was: {}, expected: {})", result.success(), expected_result); + return true; + } + + false + } + + /// Adds a new flash area that fails statistically + fn mark_bad_status_with_rate(&self, flash: &mut SimMultiFlash, slot: usize, + rate: f32) { + if Caps::OverwriteUpgrade.present() { + return; + } + + // Set this for each image. + for image in &self.images { + let dev_id = &image.slots[slot].dev_id; + let dev = flash.get_mut(&dev_id).unwrap(); + let align = dev.align(); + let off = &image.slots[slot].base_off; + let len = &image.slots[slot].len; + let status_off = off + len - self.trailer_sz(align); + + // Mark the status area as a bad area + let _ = dev.add_bad_region(status_off, self.status_sz(align), rate); + } + } + + fn reset_bad_status(&self, flash: &mut SimMultiFlash, slot: usize) { + if !Caps::ValidatePrimarySlot.present() { + return; + } + + for image in &self.images { + let dev_id = &image.slots[slot].dev_id; + let dev = flash.get_mut(&dev_id).unwrap(); + dev.reset_bad_regions(); + + // Disabling write verification the only assert triggered by + // boot_go should be checking for integrity of status bytes. + dev.set_verify_writes(false); + } + } + + /// Test a boot, optionally stopping after 'n' flash options. Returns a count + /// of the number of flash operations done total. + fn try_upgrade(&self, stop: Option, permanent: bool) -> (SimMultiFlash, i32) { + // Clone the flash to have a new copy. + let mut flash = self.flash.clone(); + + if permanent { + self.mark_permanent_upgrades(&mut flash, 1); + } + + let mut counter = stop.unwrap_or(0); + + let (first_interrupted, count) = match c::boot_go(&mut flash, + &self.areadesc, + Some(&mut counter), + None, false) { + x if x.interrupted() => (true, stop.unwrap()), + x if x.success() => (false, -counter), + x => panic!("Unknown return: {:?}", x), + }; + + counter = 0; + if first_interrupted { + // fl.dump(); + match c::boot_go(&mut flash, &self.areadesc, Some(&mut counter), + None, false) { + x if x.interrupted() => panic!("Shouldn't stop again"), + x if x.success() => (), + x => panic!("Unknown return: {:?}", x), + } + } + + (flash, count - counter) + } + + fn try_revert(&self, count: usize) -> SimMultiFlash { + let mut flash = self.flash.clone(); + + // fl.write_file("image0.bin").unwrap(); + for i in 0 .. count { + info!("Running boot pass {}", i + 1); + assert!(c::boot_go(&mut flash, &self.areadesc, None, None, false).success_no_asserts()); + } + flash + } + + fn try_revert_with_fail_at(&self, stop: i32) -> bool { + let mut flash = self.flash.clone(); + let mut fails = 0; + + let mut counter = stop; + if !c::boot_go(&mut flash, &self.areadesc, Some(&mut counter), None, + false).interrupted() { + warn!("Should have stopped test at interruption point"); + fails += 1; + } + + // In a multi-image setup, copy done might be set if any number of + // images was already successfully swapped. + if !self.verify_trailers_loose(&flash, 0, None, None, BOOT_FLAG_UNSET) { + warn!("copy_done should be unset"); + fails += 1; + } + + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Should have finished test upgrade"); + fails += 1; + } + + if !self.verify_images(&flash, 0, 1) { + warn!("Image in the primary slot before revert is invalid at stop={}", + stop); + fails += 1; + } + if !self.verify_images(&flash, 1, 0) { + warn!("Image in the secondary slot before revert is invalid at stop={}", + stop); + fails += 1; + } + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_UNSET, BOOT_FLAG_SET) { + warn!("Mismatched trailer for the primary slot before revert"); + fails += 1; + } + if !self.verify_trailers(&flash, 1, BOOT_MAGIC_UNSET, + BOOT_FLAG_UNSET, BOOT_FLAG_UNSET) { + warn!("Mismatched trailer for the secondary slot before revert"); + fails += 1; + } + + // Do Revert + let mut counter = stop; + if !c::boot_go(&mut flash, &self.areadesc, Some(&mut counter), None, + false).interrupted() { + warn!("Should have stopped revert at interruption point"); + fails += 1; + } + + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Should have finished revert upgrade"); + fails += 1; + } + + if !self.verify_images(&flash, 0, 0) { + warn!("Image in the primary slot after revert is invalid at stop={}", + stop); + fails += 1; + } + if !self.verify_images(&flash, 1, 1) { + warn!("Image in the secondary slot after revert is invalid at stop={}", + stop); + fails += 1; + } + + if !self.verify_trailers(&flash, 0, BOOT_MAGIC_GOOD, + BOOT_FLAG_SET, BOOT_FLAG_SET) { + warn!("Mismatched trailer for the primary slot after revert"); + fails += 1; + } + if !self.verify_trailers(&flash, 1, BOOT_MAGIC_UNSET, + BOOT_FLAG_UNSET, BOOT_FLAG_UNSET) { + warn!("Mismatched trailer for the secondary slot after revert"); + fails += 1; + } + + if !c::boot_go(&mut flash, &self.areadesc, None, None, false).success() { + warn!("Should have finished 3rd boot"); + fails += 1; + } + + if !self.verify_images(&flash, 0, 0) { + warn!("Image in the primary slot is invalid on 1st boot after revert"); + fails += 1; + } + if !self.verify_images(&flash, 1, 1) { + warn!("Image in the secondary slot is invalid on 1st boot after revert"); + fails += 1; + } + + fails > 0 + } + + + fn try_random_fails(&self, total_ops: i32, count: usize) -> (SimMultiFlash, Vec) { + let mut flash = self.flash.clone(); + + self.mark_permanent_upgrades(&mut flash, 1); + + let mut rng = rand::thread_rng(); + let mut resets = vec![0i32; count]; + let mut remaining_ops = total_ops; + for reset in &mut resets { + let reset_counter = rng.gen_range(1 ..= remaining_ops / 2); + let mut counter = reset_counter; + match c::boot_go(&mut flash, &self.areadesc, Some(&mut counter), + None, false) { + x if x.interrupted() => (), + x => panic!("Unknown return: {:?}", x), + } + remaining_ops -= reset_counter; + *reset = reset_counter; + } + + match c::boot_go(&mut flash, &self.areadesc, None, None, false) { + x if x.interrupted() => panic!("Should not be have been interrupted!"), + x if x.success() => (), + x => panic!("Unknown return: {:?}", x), + } + + (flash, resets) + } + + /// Verify the image in the given flash device, the specified slot + /// against the expected image. + fn verify_images(&self, flash: &SimMultiFlash, slot: usize, against: usize) -> bool { + self.images.iter().all(|image| { + verify_image(flash, &image.slots[slot], + match against { + 0 => &image.primaries, + 1 => &image.upgrades, + _ => panic!("Invalid 'against'") + }) + }) + } + + /// Verify the images, according to the dependency test. + fn verify_dep_images(&self, flash: &SimMultiFlash, deps: &DepTest) -> bool { + for (image_num, (image, upgrade)) in self.images.iter().zip(deps.upgrades.iter()).enumerate() { + info!("Upgrade: slot:{}, {:?}", image_num, upgrade); + if !verify_image(flash, &image.slots[0], + match upgrade { + UpgradeInfo::Upgraded => &image.upgrades, + UpgradeInfo::Held => &image.primaries, + }) { + error!("Failed to upgrade properly: image: {}, upgrade: {:?}", image_num, upgrade); + return true; + } + } + + false + } + + /// Verify that at least one of the trailers of the images have the + /// specified values. + fn verify_trailers_loose(&self, flash: &SimMultiFlash, slot: usize, + magic: Option, image_ok: Option, + copy_done: Option) -> bool { + self.images.iter().any(|image| { + verify_trailer(flash, &image.slots[slot], + magic, image_ok, copy_done) + }) + } + + /// Verify that the trailers of the images have the specified + /// values. + fn verify_trailers(&self, flash: &SimMultiFlash, slot: usize, + magic: Option, image_ok: Option, + copy_done: Option) -> bool { + self.images.iter().all(|image| { + verify_trailer(flash, &image.slots[slot], + magic, image_ok, copy_done) + }) + } + + /// Mark each of the images for permanent upgrade. + fn mark_permanent_upgrades(&self, flash: &mut SimMultiFlash, slot: usize) { + for image in &self.images { + mark_permanent_upgrade(flash, &image.slots[slot]); + } + } + + /// Mark each of the images for permanent upgrade. + fn mark_upgrades(&self, flash: &mut SimMultiFlash, slot: usize) { + for image in &self.images { + mark_upgrade(flash, &image.slots[slot]); + } + } + + /// Dump out the flash image(s) to one or more files for debugging + /// purposes. The names will be written as either "{prefix}.mcubin" or + /// "{prefix}-001.mcubin" depending on how many images there are. + pub fn debug_dump(&self, prefix: &str) { + for (id, fdev) in &self.flash { + let name = if self.flash.len() == 1 { + format!("{}.mcubin", prefix) + } else { + format!("{}-{:>0}.mcubin", prefix, id) + }; + fdev.write_file(&name).unwrap(); + } + } +} + +impl RamData { + // TODO: This is not correct. The second slot of each image should be at the same address as + // the primary. + fn new(slots: &[[SlotInfo; 2]]) -> RamData { + let mut addr = RAM_LOAD_ADDR; + let mut places = BTreeMap::new(); + // println!("Setup:-------------"); + for imgs in slots { + for si in imgs { + // println!("Setup: si: {:?}", si); + let offset = addr; + let size = si.len as u32; + places.insert(SlotKey { + dev_id: si.dev_id, + base_off: si.base_off, + }, SlotPlace { offset, size }); + // println!(" load: offset: {}, size: {}", offset, size); + } + addr += imgs[0].len as u32; + } + RamData { + places, + total: addr, + } + } + + /// Lookup the ram data associated with a given flash partition. We just panic if not present, + /// because all slots used should be in the map. + fn lookup(&self, slot: &SlotInfo) -> &SlotPlace { + self.places.get(&SlotKey{dev_id: slot.dev_id, base_off: slot.base_off}) + .expect("RamData should contain all slots") + } +} + +/// Show the flash layout. +#[allow(dead_code)] +fn show_flash(flash: &dyn Flash) { + println!("---- Flash configuration ----"); + for sector in flash.sector_iter() { + println!(" {:3}: 0x{:08x}, 0x{:08x}", + sector.num, sector.base, sector.size); + } + println!(); +} + +#[derive(Debug)] +enum ImageSize { + /// Make the image the specified given size. + Given(usize), + /// Make the image as large as it can be for the partition/device. + Largest, + /// Make the image quite larger than it can be for the partition/device/ + Oversized, +} + +#[cfg(not(feature = "max-align-32"))] +fn tralier_estimation(dev: &dyn Flash) -> usize { + c::boot_trailer_sz(dev.align() as u32) as usize +} + +#[cfg(feature = "max-align-32")] +fn tralier_estimation(dev: &dyn Flash) -> usize { + + let sector_size = dev.sector_iter().next().unwrap().size as u32; + + align_up(c::boot_trailer_sz(dev.align() as u32), sector_size) as usize +} + +fn image_largest_trailer(dev: &dyn Flash) -> usize { + // Using the header size we know, the trailer size, and the slot size, we can compute + // the largest image possible. + let trailer = if Caps::OverwriteUpgrade.present() { + // This computation is incorrect, and we need to figure out the correct size. + // c::boot_status_sz(dev.align() as u32) as usize + 16 + 4 * dev.align() + } else if Caps::SwapUsingMove.present() { + let sector_size = dev.sector_iter().next().unwrap().size as u32; + align_up(c::boot_trailer_sz(dev.align() as u32), sector_size) as usize + } else if Caps::SwapUsingScratch.present() { + tralier_estimation(dev) + } else { + panic!("The maximum image size can't be calculated.") + }; + + trailer +} + +/// Install a "program" into the given image. This fakes the image header, or at least all of the +/// fields used by the given code. Returns a copy of the image that was written. +fn install_image(flash: &mut SimMultiFlash, slot: &SlotInfo, len: ImageSize, + ram: &RamData, + deps: &dyn Depender, img_manipulation: ImageManipulation, security_counter:Option) -> ImageData { + let offset = slot.base_off; + let slot_len = slot.len; + let dev_id = slot.dev_id; + let dev = flash.get_mut(&dev_id).unwrap(); + + let mut tlv: Box = Box::new(make_tlv()); + if img_manipulation == ImageManipulation::IgnoreRamLoadFlag { + tlv.set_ignore_ram_load_flag(); + } + + tlv.set_security_counter(security_counter); + + + // Add the dependencies early to the tlv. + for dep in deps.my_deps(offset, slot.index) { + tlv.add_dependency(deps.other_id(), &dep); + } + + const HDR_SIZE: usize = 32; + let place = ram.lookup(&slot); + let load_addr = if Caps::RamLoad.present() { + match img_manipulation { + ImageManipulation::WrongOffset => u32::MAX, + ImageManipulation::OverlapImages(true) => RAM_LOAD_ADDR, + ImageManipulation::OverlapImages(false) => place.offset - 1, + _ => place.offset + } + } else { + 0 + }; + + let len = match len { + ImageSize::Given(size) => size, + ImageSize::Largest => { + let trailer = image_largest_trailer(dev); + let tlv_len = tlv.estimate_size(); + info!("slot: 0x{:x}, HDR: 0x{:x}, trailer: 0x{:x}", + slot_len, HDR_SIZE, trailer); + slot_len - HDR_SIZE - trailer - tlv_len + }, + ImageSize::Oversized => { + let trailer = image_largest_trailer(dev); + let tlv_len = tlv.estimate_size(); + info!("slot: 0x{:x}, HDR: 0x{:x}, trailer: 0x{:x}", + slot_len, HDR_SIZE, trailer); + // the overflow size is rougly estimated to work for all + // configurations. It might be precise if tlv_len will be maked precise. + slot_len - HDR_SIZE - trailer - tlv_len + dev.align()*4 + } + + }; + + // Generate a boot header. Note that the size doesn't include the header. + let header = ImageHeader { + magic: tlv.get_magic(), + load_addr, + hdr_size: HDR_SIZE as u16, + protect_tlv_size: tlv.protect_size(), + img_size: len as u32, + flags: tlv.get_flags(), + ver: deps.my_version(offset, slot.index), + _pad2: 0, + }; + + let mut b_header = [0; HDR_SIZE]; + b_header[..32].clone_from_slice(header.as_raw()); + assert_eq!(b_header.len(), HDR_SIZE); + + tlv.add_bytes(&b_header); + + // The core of the image itself is just pseudorandom data. + let mut b_img = vec![0; len]; + splat(&mut b_img, offset); + + // Add some information at the start of the payload to make it easier + // to see what it is. This will fail if the image itself is too small. + { + let mut wr = Cursor::new(&mut b_img); + writeln!(&mut wr, "offset: {:#x}, dev_id: {:#x}, slot_info: {:?}", + offset, dev_id, slot).unwrap(); + writeln!(&mut wr, "version: {:?}", deps.my_version(offset, slot.index)).unwrap(); + } + + // TLV signatures work over plain image + tlv.add_bytes(&b_img); + + // Generate encrypted images + let flag = TlvFlags::ENCRYPTED_AES128 as u32 | TlvFlags::ENCRYPTED_AES256 as u32; + let is_encrypted = (tlv.get_flags() & flag) != 0; + let mut b_encimg = vec![]; + if is_encrypted { + let flag = TlvFlags::ENCRYPTED_AES256 as u32; + let aes256 = (tlv.get_flags() & flag) == flag; + tlv.generate_enc_key(); + let enc_key = tlv.get_enc_key(); + let nonce = GenericArray::from_slice(&[0; 16]); + b_encimg = b_img.clone(); + if aes256 { + let key: &GenericArray = GenericArray::from_slice(enc_key.as_slice()); + let block = Aes256::new(&key); + let mut cipher = Aes256Ctr::from_block_cipher(block, &nonce); + cipher.apply_keystream(&mut b_encimg); + } else { + let key: &GenericArray = GenericArray::from_slice(enc_key.as_slice()); + let block = Aes128::new(&key); + let mut cipher = Aes128Ctr::from_block_cipher(block, &nonce); + cipher.apply_keystream(&mut b_encimg); + } + } + + // Build the TLV itself. + if img_manipulation == ImageManipulation::BadSignature { + tlv.corrupt_sig(); + } + let mut b_tlv = tlv.make_tlv(); + + let mut buf = vec![]; + buf.append(&mut b_header.to_vec()); + buf.append(&mut b_img); + buf.append(&mut b_tlv.clone()); + + // Pad the buffer to a multiple of the flash alignment. + let align = dev.align(); + let image_sz = buf.len(); + while buf.len() % align != 0 { + buf.push(dev.erased_val()); + } + + let mut encbuf = vec![]; + if is_encrypted { + encbuf.append(&mut b_header.to_vec()); + encbuf.append(&mut b_encimg); + encbuf.append(&mut b_tlv); + + while encbuf.len() % align != 0 { + encbuf.push(dev.erased_val()); + } + } + + // Since images are always non-encrypted in the primary slot, we first write + // an encrypted image, re-read to use for verification, erase + flash + // un-encrypted. In the secondary slot the image is written un-encrypted, + // and if encryption is requested, it follows an erase + flash encrypted. + // + // In the case of ram-load when encryption is enabled both slots have to + // be encrypted so in the event when the image is in the primary slot + // the verification will fail as the image is not encrypted. + if slot.index == 0 && !Caps::RamLoad.present() { + let enc_copy: Option>; + + if is_encrypted { + dev.write(offset, &encbuf).unwrap(); + + let mut enc = vec![0u8; encbuf.len()]; + dev.read(offset, &mut enc).unwrap(); + + enc_copy = Some(enc); + + dev.erase(offset, slot_len).unwrap(); + } else { + enc_copy = None; + } + + dev.write(offset, &buf).unwrap(); + + let mut copy = vec![0u8; buf.len()]; + dev.read(offset, &mut copy).unwrap(); + + ImageData { + size: image_sz, + plain: copy, + cipher: enc_copy, + } + } else { + + dev.write(offset, &buf).unwrap(); + + let mut copy = vec![0u8; buf.len()]; + dev.read(offset, &mut copy).unwrap(); + + let enc_copy: Option>; + + if is_encrypted { + dev.erase(offset, slot_len).unwrap(); + + dev.write(offset, &encbuf).unwrap(); + + let mut enc = vec![0u8; encbuf.len()]; + dev.read(offset, &mut enc).unwrap(); + + enc_copy = Some(enc); + } else { + enc_copy = None; + } + + ImageData { + size: image_sz, + plain: copy, + cipher: enc_copy, + } + } +} + +/// Install no image. This is used when no upgrade happens. +fn install_no_image() -> ImageData { + ImageData { + size: 0, + plain: vec![], + cipher: None, + } +} + +/// Construct a TLV generator based on how MCUboot is currently configured. The returned +/// ManifestGen will generate the appropriate entries based on this configuration. +fn make_tlv() -> TlvGen { + let aes_key_size = if Caps::Aes256.present() { 256 } else { 128 }; + + if Caps::EncKw.present() { + if Caps::RSA2048.present() { + TlvGen::new_rsa_kw(aes_key_size) + } else if Caps::EcdsaP256.present() { + TlvGen::new_ecdsa_kw(aes_key_size) + } else { + TlvGen::new_enc_kw(aes_key_size) + } + } else if Caps::EncRsa.present() { + if Caps::RSA2048.present() { + TlvGen::new_sig_enc_rsa(aes_key_size) + } else { + TlvGen::new_enc_rsa(aes_key_size) + } + } else if Caps::EncEc256.present() { + if Caps::EcdsaP256.present() { + TlvGen::new_ecdsa_ecies_p256(aes_key_size) + } else { + TlvGen::new_ecies_p256(aes_key_size) + } + } else if Caps::EncX25519.present() { + if Caps::Ed25519.present() { + TlvGen::new_ed25519_ecies_x25519(aes_key_size) + } else { + TlvGen::new_ecies_x25519(aes_key_size) + } + } else { + // The non-encrypted configuration. + if Caps::RSA2048.present() { + TlvGen::new_rsa_pss() + } else if Caps::RSA3072.present() { + TlvGen::new_rsa3072_pss() + } else if Caps::EcdsaP256.present() || Caps::EcdsaP384.present() { + TlvGen::new_ecdsa() + } else if Caps::Ed25519.present() { + TlvGen::new_ed25519() + } else if Caps::HwRollbackProtection.present() { + TlvGen::new_sec_cnt() + } else { + TlvGen::new_hash_only() + } + } +} + +impl ImageData { + /// Find the image contents for the given slot. This assumes that slot 0 + /// is unencrypted, and slot 1 is encrypted. + fn find(&self, slot: usize) -> &Vec { + let encrypted = Caps::EncRsa.present() || Caps::EncKw.present() || + Caps::EncEc256.present() || Caps::EncX25519.present(); + match (encrypted, slot) { + (false, _) => &self.plain, + (true, 0) => &self.plain, + (true, 1) => self.cipher.as_ref().expect("Invalid image"), + _ => panic!("Invalid slot requested"), + } + } + + fn size(&self) -> usize { + self.size + } +} + +/// Verify that given image is present in the flash at the given offset. +fn verify_image(flash: &SimMultiFlash, slot: &SlotInfo, images: &ImageData) -> bool { + let image = images.find(slot.index); + let buf = image.as_slice(); + let dev_id = slot.dev_id; + + let mut copy = vec![0u8; buf.len()]; + let offset = slot.base_off; + let dev = flash.get(&dev_id).unwrap(); + dev.read(offset, &mut copy).unwrap(); + + if buf != ©[..] { + for i in 0 .. buf.len() { + if buf[i] != copy[i] { + info!("First failure for slot{} at {:#x} ({:#x} within) {:#x}!={:#x}", + slot.index, offset + i, i, buf[i], copy[i]); + break; + } + } + false + } else { + true + } +} + +fn verify_trailer(flash: &SimMultiFlash, slot: &SlotInfo, + magic: Option, image_ok: Option, + copy_done: Option) -> bool { + if Caps::OverwriteUpgrade.present() { + return true; + } + + let offset = slot.trailer_off + c::boot_max_align(); + let dev_id = slot.dev_id; + let mut copy = vec![0u8; c::boot_magic_sz() + c::boot_max_align() * 3]; + let mut failed = false; + + let dev = flash.get(&dev_id).unwrap(); + let erased_val = dev.erased_val(); + dev.read(offset, &mut copy).unwrap(); + + failed |= match magic { + Some(v) => { + let magic_off = (c::boot_max_align() * 3) + (c::boot_magic_sz() - MAGIC.len()); + if v == 1 && ©[magic_off..] != MAGIC { + warn!("\"magic\" mismatch at {:#x}", offset); + true + } else if v == 3 { + let expected = [erased_val; 16]; + if copy[magic_off..] != expected { + warn!("\"magic\" mismatch at {:#x}", offset); + true + } else { + false + } + } else { + false + } + }, + None => false, + }; + + failed |= match image_ok { + Some(v) => { + let image_ok_off = c::boot_max_align() * 2; + if (v == 1 && copy[image_ok_off] != v) || (v == 3 && copy[image_ok_off] != erased_val) { + warn!("\"image_ok\" mismatch at {:#x} v={} val={:#x}", offset, v, copy[image_ok_off]); + true + } else { + false + } + }, + None => false, + }; + + failed |= match copy_done { + Some(v) => { + let copy_done_off = c::boot_max_align(); + if (v == 1 && copy[copy_done_off] != v) || (v == 3 && copy[copy_done_off] != erased_val) { + warn!("\"copy_done\" mismatch at {:#x} v={} val={:#x}", offset, v, copy[copy_done_off]); + true + } else { + false + } + }, + None => false, + }; + + !failed +} + +/// Install a partition table. This is a simplified partition table that +/// we write at the beginning of flash so make it easier for external tools +/// to analyze these images. +fn install_ptable(flash: &mut SimMultiFlash, areadesc: &AreaDesc) { + let ids: HashSet = areadesc.iter_areas().map(|area| area.device_id).collect(); + for &id in &ids { + // If there are any partitions in this device that start at 0, and + // aren't marked as the BootLoader partition, avoid adding the + // partition table. This makes it harder to view the image, but + // avoids messing up images already written. + let skip_ptable = areadesc + .iter_areas() + .any(|area| { + area.device_id == id && + area.off == 0 && + area.flash_id != FlashId::BootLoader + }); + if skip_ptable { + if log_enabled!(Info) { + let special: Vec = areadesc.iter_areas() + .filter(|area| area.device_id == id && area.off == 0) + .map(|area| area.flash_id) + .collect(); + info!("Skipping partition table: {:?}", special); + } + break; + } + + let mut buf: Vec = vec![]; + write!(&mut buf, "mcuboot\0").unwrap(); + + // Iterate through all of the partitions in that device, and encode + // into the table. + let count = areadesc.iter_areas().filter(|area| area.device_id == id).count(); + buf.write_u32::(count as u32).unwrap(); + + for area in areadesc.iter_areas().filter(|area| area.device_id == id) { + buf.write_u32::(area.flash_id as u32).unwrap(); + buf.write_u32::(area.off).unwrap(); + buf.write_u32::(area.size).unwrap(); + buf.write_u32::(0).unwrap(); + } + + let dev = flash.get_mut(&id).unwrap(); + + // Pad to alignment. + while buf.len() % dev.align() != 0 { + buf.push(0); + } + + dev.write(0, &buf).unwrap(); + } +} + +/// The image header +#[repr(C)] +#[derive(Debug)] +pub struct ImageHeader { + magic: u32, + load_addr: u32, + hdr_size: u16, + protect_tlv_size: u16, + img_size: u32, + flags: u32, + ver: ImageVersion, + _pad2: u32, +} + +impl AsRaw for ImageHeader {} + +#[repr(C)] +#[derive(Clone, Debug)] +pub struct ImageVersion { + pub major: u8, + pub minor: u8, + pub revision: u16, + pub build_num: u32, +} + +#[derive(Clone, Debug)] +pub struct SlotInfo { + pub base_off: usize, + pub trailer_off: usize, + pub len: usize, + // Which slot within this device. + pub index: usize, + pub dev_id: u8, +} + +#[cfg(not(feature = "max-align-32"))] +const MAGIC: &[u8] = &[0x77, 0xc2, 0x95, 0xf3, + 0x60, 0xd2, 0xef, 0x7f, + 0x35, 0x52, 0x50, 0x0f, + 0x2c, 0xb6, 0x79, 0x80]; + +#[cfg(feature = "max-align-32")] +const MAGIC: &[u8] = &[0x20, 0x00, 0x2d, 0xe1, + 0x5d, 0x29, 0x41, 0x0b, + 0x8d, 0x77, 0x67, 0x9c, + 0x11, 0x0f, 0x1f, 0x8a]; + +// Replicates defines found in bootutil.h +const BOOT_MAGIC_GOOD: Option = Some(1); +const BOOT_MAGIC_UNSET: Option = Some(3); + +const BOOT_FLAG_SET: Option = Some(1); +const BOOT_FLAG_UNSET: Option = Some(3); + +/// Write out the magic so that the loader tries doing an upgrade. +pub fn mark_upgrade(flash: &mut SimMultiFlash, slot: &SlotInfo) { + let dev = flash.get_mut(&slot.dev_id).unwrap(); + let align = dev.align(); + let offset = slot.trailer_off + c::boot_max_align() * 4; + if offset % align != 0 || MAGIC.len() % align != 0 { + // The write size is larger than the magic value. Fill a buffer + // with the erased value, put the MAGIC in it, and write it in its + // entirety. + let mut buf = vec![dev.erased_val(); c::boot_max_align()]; + let magic_off = (offset % align) + (c::boot_magic_sz() - MAGIC.len()); + buf[magic_off..].copy_from_slice(MAGIC); + dev.write(offset - (offset % align), &buf).unwrap(); + } else { + dev.write(offset, MAGIC).unwrap(); + } +} + +/// Writes the image_ok flag which, guess what, tells the bootloader +/// the this image is ok (not a test, and no revert is to be performed). +fn mark_permanent_upgrade(flash: &mut SimMultiFlash, slot: &SlotInfo) { + // Overwrite mode always is permanent, and only the magic is used in + // the trailer. To avoid problems with large write sizes, don't try to + // set anything in this case. + if Caps::OverwriteUpgrade.present() { + return; + } + + let dev = flash.get_mut(&slot.dev_id).unwrap(); + let align = dev.align(); + let mut ok = vec![dev.erased_val(); align]; + ok[0] = 1u8; + let off = slot.trailer_off + c::boot_max_align() * 3; + dev.write(off, &ok).unwrap(); +} + +// Drop some pseudo-random gibberish onto the data. +fn splat(data: &mut [u8], seed: usize) { + let mut seed_block = [0u8; 32]; + let mut buf = Cursor::new(&mut seed_block[..]); + buf.write_u32::(0x135782ea).unwrap(); + buf.write_u32::(0x92184728).unwrap(); + buf.write_u32::(data.len() as u32).unwrap(); + buf.write_u32::(seed as u32).unwrap(); + let mut rng: SmallRng = SeedableRng::from_seed(seed_block); + rng.fill_bytes(data); +} + +/// Return a read-only view into the raw bytes of this object +trait AsRaw : Sized { + fn as_raw(&self) -> &[u8] { + unsafe { slice::from_raw_parts(self as *const _ as *const u8, + mem::size_of::()) } + } +} + +/// Determine whether it makes sense to test this configuration with a maximally-sized image. +/// Returns an ImageSize representing the best size to test, possibly just with the given size. +fn maximal(size: usize) -> ImageSize { + if Caps::OverwriteUpgrade.present() || + Caps::SwapUsingMove.present() + { + ImageSize::Given(size) + } else { + ImageSize::Largest + } +} + +pub fn show_sizes() { + // This isn't panic safe. + for min in &[1, 2, 4, 8] { + let msize = c::boot_trailer_sz(*min); + println!("{:2}: {} (0x{:x})", min, msize, msize); + } +} + +#[cfg(not(feature = "max-align-32"))] +fn test_alignments() -> &'static [usize] { + &[1, 2, 4, 8] +} + +#[cfg(feature = "max-align-32")] +fn test_alignments() -> &'static [usize] { + &[32] +} + +/// For testing, some of the tests are quite slow. This will query for an +/// environment variable `MCUBOOT_SKIP_SLOW_TESTS`, which can be set to avoid +/// running these tests. +fn skip_slow_test() -> bool { + if let Ok(_) = std::env::var("MCUBOOT_SKIP_SLOW_TESTS") { + true + } else { + false + } +} diff --git a/bootloader/mcuboot/sim/src/lib.rs b/bootloader/mcuboot/sim/src/lib.rs new file mode 100644 index 0000000..fe43e46 --- /dev/null +++ b/bootloader/mcuboot/sim/src/lib.rs @@ -0,0 +1,231 @@ +// Copyright (c) 2017-2019 Linaro LTD +// Copyright (c) 2017-2019 JUUL Labs +// Copyright (c) 2019-2023 Arm Limited +// +// SPDX-License-Identifier: Apache-2.0 + +use docopt::Docopt; +use log::{warn, error}; +use std::{ + fmt, + process, +}; +use serde_derive::Deserialize; + +mod caps; +mod depends; +mod image; +mod tlv; +mod utils; +pub mod testlog; + +pub use crate::{ + depends::{ + DepTest, + DepType, + UpgradeInfo, + NO_DEPS, + REV_DEPS, + }, + image::{ + ImagesBuilder, + Images, + ImageManipulation, + show_sizes, + }, +}; + +const USAGE: &str = " +Mcuboot simulator + +Usage: + bootsim sizes + bootsim run --device TYPE [--align SIZE] + bootsim runall + bootsim (--help | --version) + +Options: + -h, --help Show this message + --version Version + --device TYPE MCU to simulate + Valid values: stm32f4, k64f + --align SIZE Flash write alignment +"; + +#[derive(Debug, Deserialize)] +struct Args { + flag_device: Option, + flag_align: Option, + cmd_sizes: bool, + cmd_run: bool, + cmd_runall: bool, +} + +#[derive(Copy, Clone, Debug, Deserialize)] +pub enum DeviceName { + Stm32f4, K64f, K64fBig, K64fMulti, Nrf52840, Nrf52840SpiFlash, + Nrf52840UnequalSlots, +} + +pub static ALL_DEVICES: &[DeviceName] = &[ + DeviceName::Stm32f4, + DeviceName::K64f, + DeviceName::K64fBig, + DeviceName::K64fMulti, + DeviceName::Nrf52840, + DeviceName::Nrf52840SpiFlash, + DeviceName::Nrf52840UnequalSlots, +]; + +impl fmt::Display for DeviceName { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + let name = match *self { + DeviceName::Stm32f4 => "stm32f4", + DeviceName::K64f => "k64f", + DeviceName::K64fBig => "k64fbig", + DeviceName::K64fMulti => "k64fmulti", + DeviceName::Nrf52840 => "nrf52840", + DeviceName::Nrf52840SpiFlash => "Nrf52840SpiFlash", + DeviceName::Nrf52840UnequalSlots => "Nrf52840UnequalSlots", + }; + f.write_str(name) + } +} + +#[derive(Debug)] +struct AlignArg(usize); + +struct AlignArgVisitor; + +impl<'de> serde::de::Visitor<'de> for AlignArgVisitor { + type Value = AlignArg; + + fn expecting(&self, formatter: &mut fmt::Formatter<'_>) -> fmt::Result { + formatter.write_str("1, 2, 4 or 8") + } + + fn visit_u32(self, n: u32) -> Result + where E: serde::de::Error + { + Ok(match n { + 1 | 2 | 4 | 8 => AlignArg(n as usize), + n => { + let err = format!("Could not deserialize '{}' as alignment", n); + return Err(E::custom(err)); + } + }) + } +} + +impl<'de> serde::de::Deserialize<'de> for AlignArg { + fn deserialize(d: D) -> Result + where D: serde::de::Deserializer<'de> + { + d.deserialize_u8(AlignArgVisitor) + } +} + +pub fn main() { + let args: Args = Docopt::new(USAGE) + .and_then(|d| d.deserialize()) + .unwrap_or_else(|e| e.exit()); + // println!("args: {:#?}", args); + + if args.cmd_sizes { + show_sizes(); + return; + } + + let mut status = RunStatus::new(); + if args.cmd_run { + + let align = args.flag_align.map(|x| x.0).unwrap_or(1); + + + let device = match args.flag_device { + None => panic!("Missing mandatory device argument"), + Some(dev) => dev, + }; + + status.run_single(device, align, 0xff); + } + + if args.cmd_runall { + for &dev in ALL_DEVICES { + for &align in &[1, 2, 4, 8] { + for &erased_val in &[0, 0xff] { + status.run_single(dev, align, erased_val); + } + } + } + } + + if status.failures > 0 { + error!("{} Tests ran with {} failures", status.failures + status.passes, status.failures); + process::exit(1); + } else { + error!("{} Tests ran successfully", status.passes); + process::exit(0); + } +} + +#[derive(Default)] +pub struct RunStatus { + failures: usize, + passes: usize, +} + +impl RunStatus { + pub fn new() -> RunStatus { + RunStatus { + failures: 0, + passes: 0, + } + } + + pub fn run_single(&mut self, device: DeviceName, align: usize, erased_val: u8) { + warn!("Running on device {} with alignment {}", device, align); + + let run = match ImagesBuilder::new(device, align, erased_val) { + Ok(builder) => builder, + Err(msg) => { + warn!("Skipping {}: {}", device, msg); + return; + } + }; + + let mut failed = false; + + // Creates a badly signed image in the secondary slot to check that + // it is not upgraded to + let bad_secondary_slot_image = run.clone().make_bad_secondary_slot_image(); + + failed |= bad_secondary_slot_image.run_signfail_upgrade(); + + let images = run.clone().make_no_upgrade_image(&NO_DEPS, ImageManipulation::None); + failed |= images.run_norevert_newimage(); + + let images = run.make_image(&NO_DEPS, true); + + failed |= images.run_basic_revert(); + failed |= images.run_revert_with_fails(); + failed |= images.run_perm_with_fails(); + failed |= images.run_perm_with_random_fails(5); + failed |= images.run_norevert(); + + failed |= images.run_with_status_fails_complete(); + failed |= images.run_with_status_fails_with_reset(); + + //show_flash(&flash); + + if failed { + self.failures += 1; + } else { + self.passes += 1; + } + } + + pub fn failures(&self) -> usize { + self.failures + } +} diff --git a/bootloader/mcuboot/sim/src/main.rs b/bootloader/mcuboot/sim/src/main.rs new file mode 100644 index 0000000..85036a8 --- /dev/null +++ b/bootloader/mcuboot/sim/src/main.rs @@ -0,0 +1,10 @@ +// Copyright (c) 2017-2019 Linaro LTD +// Copyright (c) 2017-2019 JUUL Labs +// +// SPDX-License-Identifier: Apache-2.0 + +fn main() { + env_logger::init(); + + bootsim::main(); +} diff --git a/bootloader/mcuboot/sim/src/rsa3072_pub_key-rs.txt b/bootloader/mcuboot/sim/src/rsa3072_pub_key-rs.txt new file mode 100644 index 0000000..16ca30d --- /dev/null +++ b/bootloader/mcuboot/sim/src/rsa3072_pub_key-rs.txt @@ -0,0 +1,53 @@ +/* Autogenerated by imgtool.py, do not edit. */ +static RSA3072_PUB_KEY: &[u8] = &[ + 0x30, 0x82, 0x01, 0x8a, 0x02, 0x82, 0x01, 0x81, + 0x00, 0xb4, 0x2c, 0x0e, 0x98, 0x58, 0x10, 0xa4, + 0xa7, 0x58, 0x99, 0x7c, 0x01, 0xdd, 0x08, 0x2a, + 0x28, 0x34, 0x33, 0xf8, 0x96, 0x1a, 0x34, 0x20, + 0x5d, 0x45, 0xc8, 0x71, 0x26, 0x25, 0xe5, 0xd2, + 0x96, 0xea, 0x7b, 0xb1, 0x15, 0xaa, 0xa6, 0x8a, + 0x63, 0x22, 0x8b, 0x2d, 0x4e, 0x81, 0x73, 0xbf, + 0x6e, 0x15, 0x68, 0x8c, 0x1a, 0xf4, 0xef, 0x2a, + 0x8f, 0x8c, 0x22, 0x9e, 0x71, 0x57, 0x4b, 0xde, + 0x0f, 0x7e, 0x72, 0xd3, 0x7a, 0xb8, 0xa7, 0x1d, + 0x44, 0xad, 0x87, 0x00, 0x83, 0x5c, 0xfd, 0x73, + 0x05, 0x72, 0x46, 0x3f, 0x8b, 0xf9, 0x10, 0x00, + 0xd8, 0x6e, 0xcc, 0x85, 0xed, 0xf9, 0x49, 0xdb, + 0x78, 0x36, 0x80, 0x49, 0x38, 0x76, 0xdd, 0x5f, + 0x54, 0x04, 0xda, 0x8c, 0x34, 0xa7, 0x2b, 0x13, + 0x25, 0x6f, 0xd1, 0x15, 0x4f, 0xad, 0xc2, 0xe1, + 0xa5, 0xd2, 0x4e, 0x57, 0x0c, 0x7e, 0x9c, 0x9b, + 0xba, 0x4e, 0x68, 0xb2, 0xe0, 0x25, 0x02, 0xaa, + 0x00, 0xd3, 0xb4, 0xcc, 0x2f, 0x78, 0xe5, 0xbe, + 0x47, 0x67, 0x1f, 0xc8, 0x6e, 0x22, 0x6c, 0x5e, + 0x61, 0xb6, 0x9a, 0xcd, 0xe5, 0xa8, 0xba, 0x7a, + 0x80, 0x13, 0x1b, 0x17, 0x2e, 0x96, 0xed, 0xcf, + 0xb3, 0x9b, 0xe4, 0x1c, 0xe8, 0xad, 0xa7, 0xf6, + 0x3a, 0x51, 0x66, 0x5e, 0x99, 0x8e, 0x87, 0xee, + 0x60, 0x25, 0xf8, 0x8d, 0xbe, 0xce, 0xa4, 0xa8, + 0xca, 0x93, 0x6c, 0xd7, 0xbf, 0xd4, 0x73, 0x33, + 0x8d, 0x44, 0x85, 0xcc, 0x73, 0x30, 0x08, 0x9c, + 0x4d, 0xb2, 0xaa, 0x5a, 0x6c, 0x6f, 0x7b, 0xab, + 0xb7, 0xb3, 0x7c, 0xc3, 0xfb, 0xe7, 0xca, 0xc4, + 0xf8, 0x9a, 0x6f, 0xcb, 0xbb, 0x5b, 0x82, 0xe7, + 0x7a, 0xe8, 0x19, 0xfd, 0x2f, 0x11, 0x22, 0xfb, + 0x7f, 0x76, 0x8c, 0x6b, 0x94, 0xa4, 0x09, 0x4f, + 0xa5, 0x6a, 0x77, 0x51, 0xeb, 0xa7, 0x7e, 0xda, + 0x87, 0x06, 0xee, 0xdc, 0xbe, 0xd1, 0xea, 0x1a, + 0x40, 0x1d, 0x1b, 0xff, 0x1a, 0xb1, 0x51, 0x7c, + 0x12, 0xb0, 0xf3, 0xf6, 0x83, 0x01, 0x9c, 0xe7, + 0x0c, 0x99, 0xbf, 0xac, 0x68, 0x58, 0x72, 0xa4, + 0xb0, 0x59, 0x85, 0xee, 0x85, 0xac, 0x2a, 0x22, + 0xf4, 0xcf, 0x15, 0x08, 0x80, 0x1f, 0x0d, 0xd0, + 0x1e, 0xa0, 0xa0, 0x94, 0xc8, 0xf7, 0xfa, 0x65, + 0xdd, 0x52, 0xe8, 0x96, 0x37, 0x23, 0x30, 0x57, + 0x36, 0xe6, 0x9d, 0xf4, 0x0c, 0x4a, 0x05, 0x75, + 0x1f, 0xad, 0x01, 0xca, 0xb7, 0x6d, 0x8c, 0x43, + 0x74, 0x06, 0x0a, 0x81, 0xf3, 0x01, 0x62, 0xff, + 0xf7, 0xf5, 0x5f, 0xaf, 0xe7, 0x2b, 0x0e, 0xf8, + 0x81, 0xb5, 0x65, 0xdd, 0x01, 0xd9, 0x9f, 0x07, + 0x17, 0x8a, 0x18, 0xcf, 0x23, 0x6e, 0x88, 0x65, + 0x91, 0xb5, 0x7b, 0xd3, 0xb0, 0x2d, 0xaf, 0x93, + 0x66, 0x63, 0x74, 0xac, 0x5a, 0xe6, 0x73, 0xde, + 0x3b, 0x02, 0x03, 0x01, 0x00, 0x01, +]; diff --git a/bootloader/mcuboot/sim/src/rsa_pub_key-rs.txt b/bootloader/mcuboot/sim/src/rsa_pub_key-rs.txt new file mode 100644 index 0000000..f6466f8 --- /dev/null +++ b/bootloader/mcuboot/sim/src/rsa_pub_key-rs.txt @@ -0,0 +1,37 @@ +/* Autogenerated by imgtool.py, do not edit. */ +static RSA_PUB_KEY: &[u8] = &[ + 0x30, 0x82, 0x01, 0x0a, 0x02, 0x82, 0x01, 0x01, + 0x00, 0xd1, 0x06, 0x08, 0x1a, 0x18, 0x44, 0x2c, + 0x18, 0xe8, 0xfb, 0xfd, 0xf7, 0x0d, 0xa3, 0x4f, + 0x1f, 0xbb, 0xee, 0x5e, 0xf9, 0xaa, 0xd2, 0x4b, + 0x18, 0xd3, 0x5a, 0xe9, 0x6d, 0x18, 0x80, 0x19, + 0xf9, 0xf0, 0x9c, 0x34, 0x1b, 0xcb, 0xf3, 0xbc, + 0x74, 0xdb, 0x42, 0xe7, 0x8c, 0x7f, 0x10, 0x53, + 0x7e, 0x43, 0x5e, 0x0d, 0x57, 0x2c, 0x44, 0xd1, + 0x67, 0x08, 0x0f, 0x0d, 0xbb, 0x5c, 0xee, 0xec, + 0xb3, 0x99, 0xdf, 0xe0, 0x4d, 0x84, 0x0b, 0xaa, + 0x77, 0x41, 0x60, 0xed, 0x15, 0x28, 0x49, 0xa7, + 0x01, 0xb4, 0x3c, 0x10, 0xe6, 0x69, 0x8c, 0x2f, + 0x5f, 0xac, 0x41, 0x4d, 0x9e, 0x5c, 0x14, 0xdf, + 0xf2, 0xf8, 0xcf, 0x3d, 0x1e, 0x6f, 0xe7, 0x5b, + 0xba, 0xb4, 0xa9, 0xc8, 0x88, 0x7e, 0x47, 0x3c, + 0x94, 0xc3, 0x77, 0x67, 0x54, 0x4b, 0xaa, 0x8d, + 0x38, 0x35, 0xca, 0x62, 0x61, 0x7e, 0xb7, 0xe1, + 0x15, 0xdb, 0x77, 0x73, 0xd4, 0xbe, 0x7b, 0x72, + 0x21, 0x89, 0x69, 0x24, 0xfb, 0xf8, 0x65, 0x6e, + 0x64, 0x3e, 0xc8, 0x0e, 0xd7, 0x85, 0xd5, 0x5c, + 0x4a, 0xe4, 0x53, 0x0d, 0x2f, 0xff, 0xb7, 0xfd, + 0xf3, 0x13, 0x39, 0x83, 0x3f, 0xa3, 0xae, 0xd2, + 0x0f, 0xa7, 0x6a, 0x9d, 0xf9, 0xfe, 0xb8, 0xce, + 0xfa, 0x2a, 0xbe, 0xaf, 0xb8, 0xe0, 0xfa, 0x82, + 0x37, 0x54, 0xf4, 0x3e, 0xe1, 0x2b, 0xd0, 0xd3, + 0x08, 0x58, 0x18, 0xf6, 0x5e, 0x4c, 0xc8, 0x88, + 0x81, 0x31, 0xad, 0x5f, 0xb0, 0x82, 0x17, 0xf2, + 0x8a, 0x69, 0x27, 0x23, 0xf3, 0xab, 0x87, 0x3e, + 0x93, 0x1a, 0x1d, 0xfe, 0xe8, 0xf8, 0x1a, 0x24, + 0x66, 0x59, 0xf8, 0x1c, 0xab, 0xdc, 0xce, 0x68, + 0x1b, 0x66, 0x64, 0x35, 0xec, 0xfa, 0x0d, 0x11, + 0x9d, 0xaf, 0x5c, 0x3a, 0xa7, 0xd1, 0x67, 0xc6, + 0x47, 0xef, 0xb1, 0x4b, 0x2c, 0x62, 0xe1, 0xd1, + 0xc9, 0x02, 0x03, 0x01, 0x00, 0x01, +]; diff --git a/bootloader/mcuboot/sim/src/testlog.rs b/bootloader/mcuboot/sim/src/testlog.rs new file mode 100644 index 0000000..77619e4 --- /dev/null +++ b/bootloader/mcuboot/sim/src/testlog.rs @@ -0,0 +1,23 @@ +// Copyright (c) 2017 Linaro LTD +// Copyright (c) 2019 JUUL Labs +// +// SPDX-License-Identifier: Apache-2.0 + +//! Logging support for the test framework. +//! +//! https://stackoverflow.com/questions/30177845/how-to-initialize-the-logger-for-integration-tests +//! +//! The test framework runs the tests, possibly simultaneously, and in various orders. This helper +//! function, which should be called at the beginning of each test, will setup logging for all of +//! the tests. + +use std::sync::Once; + +static INIT: Once = Once::new(); + +/// Setup the logging system. Intended to be called at the beginning of each test. +pub fn setup() { + INIT.call_once(|| { + env_logger::init(); + }); +} diff --git a/bootloader/mcuboot/sim/src/tlv.rs b/bootloader/mcuboot/sim/src/tlv.rs new file mode 100644 index 0000000..ce6876e --- /dev/null +++ b/bootloader/mcuboot/sim/src/tlv.rs @@ -0,0 +1,841 @@ +// Copyright (c) 2017-2021 Linaro LTD +// Copyright (c) 2017-2020 JUUL Labs +// Copyright (c) 2021-2023 Arm Limited +// +// SPDX-License-Identifier: Apache-2.0 + +//! TLV Support +//! +//! mcuboot images are followed immediately by a list of TLV items that contain integrity +//! information about the image. Their generation is made a little complicated because the size of +//! the TLV block is in the image header, which is included in the hash. Since some signatures can +//! vary in size, we just make them the largest size possible. +//! +//! Because of this header, we have to make two passes. The first pass will compute the size of +//! the TLV, and the second pass will build the data for the TLV. + +use byteorder::{ + LittleEndian, WriteBytesExt, +}; +use cipher::FromBlockCipher; +use crate::caps::Caps; +use crate::image::ImageVersion; +use log::info; +use ring::{digest, rand, agreement, hkdf, hmac}; +use ring::rand::SecureRandom; +use ring::signature::{ + RsaKeyPair, + RSA_PSS_SHA256, + EcdsaKeyPair, + ECDSA_P256_SHA256_ASN1_SIGNING, + Ed25519KeyPair, + ECDSA_P384_SHA384_ASN1_SIGNING, +}; +use aes::{ + Aes128, + Aes128Ctr, + Aes256, + Aes256Ctr, + NewBlockCipher +}; +use cipher::{ + generic_array::GenericArray, + StreamCipher, +}; +use mcuboot_sys::c; +use typenum::{U16, U32}; + +#[repr(u16)] +#[derive(Copy, Clone, Debug, PartialEq, Eq)] +#[allow(dead_code)] // TODO: For now +pub enum TlvKinds { + KEYHASH = 0x01, + SHA256 = 0x10, + SHA384 = 0x11, + RSA2048 = 0x20, + ECDSASIG = 0x22, + RSA3072 = 0x23, + ED25519 = 0x24, + ENCRSA2048 = 0x30, + ENCKW = 0x31, + ENCEC256 = 0x32, + ENCX25519 = 0x33, + DEPENDENCY = 0x40, + SECCNT = 0x50, +} + +#[allow(dead_code, non_camel_case_types)] +pub enum TlvFlags { + PIC = 0x01, + NON_BOOTABLE = 0x02, + ENCRYPTED_AES128 = 0x04, + ENCRYPTED_AES256 = 0x08, + RAM_LOAD = 0x20, +} + +/// A generator for manifests. The format of the manifest can be either a +/// traditional "TLV" or a SUIT-style manifest. +pub trait ManifestGen { + /// Retrieve the header magic value for this manifest type. + fn get_magic(&self) -> u32; + + /// Retrieve the flags value for this particular manifest type. + fn get_flags(&self) -> u32; + + /// Retrieve the number of bytes of this manifest that is "protected". + /// This field is stored in the outside image header instead of the + /// manifest header. + fn protect_size(&self) -> u16; + + /// Add a dependency on another image. + fn add_dependency(&mut self, id: u8, version: &ImageVersion); + + /// Add a sequence of bytes to the payload that the manifest is + /// protecting. + fn add_bytes(&mut self, bytes: &[u8]); + + /// Set an internal flag indicating that the next `make_tlv` should + /// corrupt the signature. + fn corrupt_sig(&mut self); + + /// Estimate the size of the TLV. This can be called before the payload is added (but after + /// other information is added). Some of the signature algorithms can generate variable sized + /// data, and therefore, this can slightly overestimate the size. + fn estimate_size(&self) -> usize; + + /// Construct the manifest for this payload. + fn make_tlv(self: Box) -> Vec; + + /// Generate a new encryption random key + fn generate_enc_key(&mut self); + + /// Return the current encryption key + fn get_enc_key(&self) -> Vec; + + /// Set the security counter to the specified value. + fn set_security_counter(&mut self, security_cnt: Option); + + /// Sets the ignore_ram_load_flag so that can be validated when it is missing, + /// it will not load successfully. + fn set_ignore_ram_load_flag(&mut self); +} + +#[derive(Debug, Default)] +pub struct TlvGen { + flags: u32, + kinds: Vec, + payload: Vec, + dependencies: Vec, + enc_key: Vec, + /// Should this signature be corrupted. + gen_corrupted: bool, + security_cnt: Option, + /// Ignore RAM_LOAD flag + ignore_ram_load_flag: bool, +} + +#[derive(Debug)] +struct Dependency { + id: u8, + version: ImageVersion, +} + +impl TlvGen { + /// Construct a new tlv generator that will only contain a hash of the data. + #[allow(dead_code)] + pub fn new_hash_only() -> TlvGen { + TlvGen { + kinds: vec![TlvKinds::SHA256], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_rsa_pss() -> TlvGen { + TlvGen { + kinds: vec![TlvKinds::SHA256, TlvKinds::RSA2048], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_rsa3072_pss() -> TlvGen { + TlvGen { + kinds: vec![TlvKinds::SHA256, TlvKinds::RSA3072], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_ecdsa() -> TlvGen { + let hash_kind = if cfg!(feature = "sig-p384") { + TlvKinds::SHA384 + } else { + TlvKinds::SHA256 + }; + TlvGen { + kinds: vec![hash_kind, TlvKinds::ECDSASIG], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_ed25519() -> TlvGen { + TlvGen { + kinds: vec![TlvKinds::SHA256, TlvKinds::ED25519], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_enc_rsa(aes_key_size: u32) -> TlvGen { + let flag = if aes_key_size == 256 { + TlvFlags::ENCRYPTED_AES256 as u32 + } else { + TlvFlags::ENCRYPTED_AES128 as u32 + }; + TlvGen { + flags: flag, + kinds: vec![TlvKinds::SHA256, TlvKinds::ENCRSA2048], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_sig_enc_rsa(aes_key_size: u32) -> TlvGen { + let flag = if aes_key_size == 256 { + TlvFlags::ENCRYPTED_AES256 as u32 + } else { + TlvFlags::ENCRYPTED_AES128 as u32 + }; + TlvGen { + flags: flag, + kinds: vec![TlvKinds::SHA256, TlvKinds::RSA2048, TlvKinds::ENCRSA2048], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_enc_kw(aes_key_size: u32) -> TlvGen { + let flag = if aes_key_size == 256 { + TlvFlags::ENCRYPTED_AES256 as u32 + } else { + TlvFlags::ENCRYPTED_AES128 as u32 + }; + TlvGen { + flags: flag, + kinds: vec![TlvKinds::SHA256, TlvKinds::ENCKW], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_rsa_kw(aes_key_size: u32) -> TlvGen { + let flag = if aes_key_size == 256 { + TlvFlags::ENCRYPTED_AES256 as u32 + } else { + TlvFlags::ENCRYPTED_AES128 as u32 + }; + TlvGen { + flags: flag, + kinds: vec![TlvKinds::SHA256, TlvKinds::RSA2048, TlvKinds::ENCKW], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_ecdsa_kw(aes_key_size: u32) -> TlvGen { + let flag = if aes_key_size == 256 { + TlvFlags::ENCRYPTED_AES256 as u32 + } else { + TlvFlags::ENCRYPTED_AES128 as u32 + }; + TlvGen { + flags: flag, + kinds: vec![TlvKinds::SHA256, TlvKinds::ECDSASIG, TlvKinds::ENCKW], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_ecies_p256(aes_key_size: u32) -> TlvGen { + let flag = if aes_key_size == 256 { + TlvFlags::ENCRYPTED_AES256 as u32 + } else { + TlvFlags::ENCRYPTED_AES128 as u32 + }; + TlvGen { + flags: flag, + kinds: vec![TlvKinds::SHA256, TlvKinds::ENCEC256], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_ecdsa_ecies_p256(aes_key_size: u32) -> TlvGen { + let flag = if aes_key_size == 256 { + TlvFlags::ENCRYPTED_AES256 as u32 + } else { + TlvFlags::ENCRYPTED_AES128 as u32 + }; + TlvGen { + flags: flag, + kinds: vec![TlvKinds::SHA256, TlvKinds::ECDSASIG, TlvKinds::ENCEC256], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_ecies_x25519(aes_key_size: u32) -> TlvGen { + let flag = if aes_key_size == 256 { + TlvFlags::ENCRYPTED_AES256 as u32 + } else { + TlvFlags::ENCRYPTED_AES128 as u32 + }; + TlvGen { + flags: flag, + kinds: vec![TlvKinds::SHA256, TlvKinds::ENCX25519], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_ed25519_ecies_x25519(aes_key_size: u32) -> TlvGen { + let flag = if aes_key_size == 256 { + TlvFlags::ENCRYPTED_AES256 as u32 + } else { + TlvFlags::ENCRYPTED_AES128 as u32 + }; + TlvGen { + flags: flag, + kinds: vec![TlvKinds::SHA256, TlvKinds::ED25519, TlvKinds::ENCX25519], + ..Default::default() + } + } + + #[allow(dead_code)] + pub fn new_sec_cnt() -> TlvGen { + TlvGen { + kinds: vec![TlvKinds::SHA256, TlvKinds::SECCNT], + ..Default::default() + } + } + +} + +impl ManifestGen for TlvGen { + fn get_magic(&self) -> u32 { + 0x96f3b83d + } + + /// Retrieve the header flags for this configuration. This can be called at any time. + fn get_flags(&self) -> u32 { + // For the RamLoad case, add in the flag for this feature. + if Caps::RamLoad.present() && !self.ignore_ram_load_flag { + self.flags | (TlvFlags::RAM_LOAD as u32) + } else { + self.flags + } + } + + /// Add bytes to the covered hash. + fn add_bytes(&mut self, bytes: &[u8]) { + self.payload.extend_from_slice(bytes); + } + + fn protect_size(&self) -> u16 { + let mut size = 0; + if !self.dependencies.is_empty() || (Caps::HwRollbackProtection.present() && self.security_cnt.is_some()) { + // include the TLV area header. + size += 4; + // add space for each dependency. + size += (self.dependencies.len() as u16) * (4 + std::mem::size_of::() as u16); + if Caps::HwRollbackProtection.present() && self.security_cnt.is_some() { + size += 4 + 4; + } + } + size + } + + fn add_dependency(&mut self, id: u8, version: &ImageVersion) { + self.dependencies.push(Dependency { + id, + version: version.clone(), + }); + } + + fn corrupt_sig(&mut self) { + self.gen_corrupted = true; + } + + fn estimate_size(&self) -> usize { + // Begin the estimate with the 4 byte header. + let mut estimate = 4; + // A very poor estimate. + + // Estimate the size of the image hash. + if self.kinds.contains(&TlvKinds::SHA256) { + estimate += 4 + 32; + } else if self.kinds.contains(&TlvKinds::SHA384) { + estimate += 4 + 48; + } + + // Add an estimate in for each of the signature algorithms. + if self.kinds.contains(&TlvKinds::RSA2048) { + estimate += 4 + 32; // keyhash + estimate += 4 + 256; // RSA2048 + } + if self.kinds.contains(&TlvKinds::RSA3072) { + estimate += 4 + 32; // keyhash + estimate += 4 + 384; // RSA3072 + } + if self.kinds.contains(&TlvKinds::ED25519) { + estimate += 4 + 32; // keyhash + estimate += 4 + 64; // ED25519 signature. + } + if self.kinds.contains(&TlvKinds::ECDSASIG) { + // ECDSA signatures are encoded as ASN.1 with the x and y values + // stored as signed integers. As such, the size can vary by 2 bytes, + // if for example the 256-bit value has the high bit, it takes an + // extra 0 byte to avoid it being seen as a negative number. + if self.kinds.contains(&TlvKinds::SHA384) { + estimate += 4 + 48; // SHA384 + estimate += 4 + 104; // ECDSA384 (varies) + } else { + estimate += 4 + 32; // SHA256 + estimate += 4 + 72; // ECDSA256 (varies) + } + } + + // Estimate encryption. + let flag = TlvFlags::ENCRYPTED_AES256 as u32; + let aes256 = (self.get_flags() & flag) == flag; + + if self.kinds.contains(&TlvKinds::ENCRSA2048) { + estimate += 4 + 256; + } + if self.kinds.contains(&TlvKinds::ENCKW) { + estimate += 4 + if aes256 { 40 } else { 24 }; + } + if self.kinds.contains(&TlvKinds::ENCEC256) { + estimate += 4 + if aes256 { 129 } else { 113 }; + } + if self.kinds.contains(&TlvKinds::ENCX25519) { + estimate += 4 + if aes256 { 96 } else { 80 }; + } + + // Gather the size of the protected TLV area. + estimate += self.protect_size() as usize; + + estimate + } + + /// Compute the TLV given the specified block of data. + fn make_tlv(self: Box) -> Vec { + let size_estimate = self.estimate_size(); + + let mut protected_tlv: Vec = vec![]; + + if self.protect_size() > 0 { + protected_tlv.push(0x08); + protected_tlv.push(0x69); + let size = self.protect_size(); + protected_tlv.write_u16::(size).unwrap(); + for dep in &self.dependencies { + protected_tlv.write_u16::(TlvKinds::DEPENDENCY as u16).unwrap(); + protected_tlv.write_u16::(12).unwrap(); + + // The dependency. + protected_tlv.push(dep.id); + protected_tlv.push(0); + protected_tlv.write_u16::(0).unwrap(); + protected_tlv.push(dep.version.major); + protected_tlv.push(dep.version.minor); + protected_tlv.write_u16::(dep.version.revision).unwrap(); + protected_tlv.write_u32::(dep.version.build_num).unwrap(); + } + + // Security counter has to be at the protected TLV area also + if Caps::HwRollbackProtection.present() && self.security_cnt.is_some() { + protected_tlv.write_u16::(TlvKinds::SECCNT as u16).unwrap(); + protected_tlv.write_u16::(std::mem::size_of::() as u16).unwrap(); + protected_tlv.write_u32::(self.security_cnt.unwrap() as u32).unwrap(); + } + + assert_eq!(size, protected_tlv.len() as u16, "protected TLV length incorrect"); + } + + // Ring does the signature itself, which means that it must be + // given a full, contiguous payload. Although this does help from + // a correct usage perspective, it is fairly stupid from an + // efficiency view. If this is shown to be a performance issue + // with the tests, the protected data could be appended to the + // payload, and then removed after the signature is done. For now, + // just make a signed payload. + let mut sig_payload = self.payload.clone(); + sig_payload.extend_from_slice(&protected_tlv); + + let mut result: Vec = vec![]; + + // add back signed payload + result.extend_from_slice(&protected_tlv); + + // add non-protected payload + let npro_pos = result.len(); + result.push(0x07); + result.push(0x69); + // Placeholder for the size. + result.write_u16::(0).unwrap(); + + if self.kinds.iter().any(|v| v == &TlvKinds::SHA256 || v == &TlvKinds::SHA384) { + // If a signature is not requested, corrupt the hash we are + // generating. But, if there is a signature, output the + // correct hash. We want the hash test to pass so that the + // signature verification can be validated. + let mut corrupt_hash = self.gen_corrupted; + for k in &[TlvKinds::RSA2048, TlvKinds::RSA3072, + TlvKinds::ED25519, TlvKinds::ECDSASIG] + { + if self.kinds.contains(k) { + corrupt_hash = false; + break; + } + } + + if corrupt_hash { + sig_payload[0] ^= 1; + } + let (hash,hash_size,tlv_kind) = if self.kinds.contains(&TlvKinds::SHA256) + { + let hash = digest::digest(&digest::SHA256, &sig_payload); + (hash,32,TlvKinds::SHA256) + } + else { + let hash = digest::digest(&digest::SHA384, &sig_payload); + (hash,48,TlvKinds::SHA384) + }; + let hash = hash.as_ref(); + + assert!(hash.len() == hash_size); + result.write_u16::(tlv_kind as u16).unwrap(); + result.write_u16::(hash_size as u16).unwrap(); + result.extend_from_slice(hash); + + // Undo the corruption. + if corrupt_hash { + sig_payload[0] ^= 1; + } + + } + + if self.gen_corrupted { + // Corrupt what is signed by modifying the input to the + // signature code. + sig_payload[0] ^= 1; + } + + if self.kinds.contains(&TlvKinds::RSA2048) || + self.kinds.contains(&TlvKinds::RSA3072) { + + let is_rsa2048 = self.kinds.contains(&TlvKinds::RSA2048); + + // Output the hash of the public key. + let hash = if is_rsa2048 { + digest::digest(&digest::SHA256, RSA_PUB_KEY) + } else { + digest::digest(&digest::SHA256, RSA3072_PUB_KEY) + }; + let hash = hash.as_ref(); + + assert!(hash.len() == 32); + result.write_u16::(TlvKinds::KEYHASH as u16).unwrap(); + result.write_u16::(32).unwrap(); + result.extend_from_slice(hash); + + // For now assume PSS. + let key_bytes = if is_rsa2048 { + pem::parse(include_bytes!("../../root-rsa-2048.pem").as_ref()).unwrap() + } else { + pem::parse(include_bytes!("../../root-rsa-3072.pem").as_ref()).unwrap() + }; + assert_eq!(key_bytes.tag, "RSA PRIVATE KEY"); + let key_pair = RsaKeyPair::from_der(&key_bytes.contents).unwrap(); + let rng = rand::SystemRandom::new(); + let mut signature = vec![0; key_pair.public_modulus_len()]; + if is_rsa2048 { + assert_eq!(signature.len(), 256); + } else { + assert_eq!(signature.len(), 384); + } + key_pair.sign(&RSA_PSS_SHA256, &rng, &sig_payload, &mut signature).unwrap(); + + if is_rsa2048 { + result.write_u16::(TlvKinds::RSA2048 as u16).unwrap(); + } else { + result.write_u16::(TlvKinds::RSA3072 as u16).unwrap(); + } + result.write_u16::(signature.len() as u16).unwrap(); + result.extend_from_slice(&signature); + } + + if self.kinds.contains(&TlvKinds::ECDSASIG) { + let rng = rand::SystemRandom::new(); + let (signature, keyhash, keyhash_size) = if self.kinds.contains(&TlvKinds::SHA384) { + let keyhash = digest::digest(&digest::SHA384, ECDSAP384_PUB_KEY); + let key_bytes = pem::parse(include_bytes!("../../root-ec-p384-pkcs8.pem").as_ref()).unwrap(); + let sign_algo = &ECDSA_P384_SHA384_ASN1_SIGNING; + let key_pair = EcdsaKeyPair::from_pkcs8(sign_algo, &key_bytes.contents).unwrap(); + (key_pair.sign(&rng, &sig_payload).unwrap(), keyhash, 48) + } else { + let keyhash = digest::digest(&digest::SHA256, ECDSA256_PUB_KEY); + let key_bytes = pem::parse(include_bytes!("../../root-ec-p256-pkcs8.pem").as_ref()).unwrap(); + let sign_algo = &ECDSA_P256_SHA256_ASN1_SIGNING; + let key_pair = EcdsaKeyPair::from_pkcs8(sign_algo, &key_bytes.contents).unwrap(); + (key_pair.sign(&rng, &sig_payload).unwrap(), keyhash, 32) + }; + + // Write public key + let keyhash_slice = keyhash.as_ref(); + assert!(keyhash_slice.len() == keyhash_size); + result.write_u16::(TlvKinds::KEYHASH as u16).unwrap(); + result.write_u16::(keyhash_size as u16).unwrap(); + result.extend_from_slice(keyhash_slice); + + // Write signature + result.write_u16::(TlvKinds::ECDSASIG as u16).unwrap(); + let signature = signature.as_ref().to_vec(); + result.write_u16::(signature.len() as u16).unwrap(); + result.extend_from_slice(&signature); + } + + if self.kinds.contains(&TlvKinds::ED25519) { + let keyhash = digest::digest(&digest::SHA256, ED25519_PUB_KEY); + let keyhash = keyhash.as_ref(); + + assert!(keyhash.len() == 32); + result.write_u16::(TlvKinds::KEYHASH as u16).unwrap(); + result.write_u16::(32).unwrap(); + result.extend_from_slice(keyhash); + + let hash = digest::digest(&digest::SHA256, &sig_payload); + let hash = hash.as_ref(); + assert!(hash.len() == 32); + + let key_bytes = pem::parse(include_bytes!("../../root-ed25519.pem").as_ref()).unwrap(); + assert_eq!(key_bytes.tag, "PRIVATE KEY"); + + let key_pair = Ed25519KeyPair::from_seed_and_public_key( + &key_bytes.contents[16..48], &ED25519_PUB_KEY[12..44]).unwrap(); + let signature = key_pair.sign(&hash); + + result.write_u16::(TlvKinds::ED25519 as u16).unwrap(); + + let signature = signature.as_ref().to_vec(); + result.write_u16::(signature.len() as u16).unwrap(); + result.extend_from_slice(signature.as_ref()); + } + + if self.kinds.contains(&TlvKinds::ENCRSA2048) { + let key_bytes = pem::parse(include_bytes!("../../enc-rsa2048-pub.pem") + .as_ref()).unwrap(); + assert_eq!(key_bytes.tag, "PUBLIC KEY"); + + let cipherkey = self.get_enc_key(); + let cipherkey = cipherkey.as_slice(); + let encbuf = match c::rsa_oaep_encrypt(&key_bytes.contents, cipherkey) { + Ok(v) => v, + Err(_) => panic!("Failed to encrypt secret key"), + }; + + assert!(encbuf.len() == 256); + result.write_u16::(TlvKinds::ENCRSA2048 as u16).unwrap(); + result.write_u16::(256).unwrap(); + result.extend_from_slice(&encbuf); + } + + if self.kinds.contains(&TlvKinds::ENCKW) { + let flag = TlvFlags::ENCRYPTED_AES256 as u32; + let aes256 = (self.get_flags() & flag) == flag; + let key_bytes = if aes256 { + base64::decode( + include_str!("../../enc-aes256kw.b64").trim()).unwrap() + } else { + base64::decode( + include_str!("../../enc-aes128kw.b64").trim()).unwrap() + }; + let cipherkey = self.get_enc_key(); + let cipherkey = cipherkey.as_slice(); + let keylen = if aes256 { 32 } else { 16 }; + let encbuf = match c::kw_encrypt(&key_bytes, cipherkey, keylen) { + Ok(v) => v, + Err(_) => panic!("Failed to encrypt secret key"), + }; + + let size = if aes256 { 40 } else { 24 }; + assert!(encbuf.len() == size); + result.write_u16::(TlvKinds::ENCKW as u16).unwrap(); + result.write_u16::(size as u16).unwrap(); + result.extend_from_slice(&encbuf); + } + + if self.kinds.contains(&TlvKinds::ENCEC256) || self.kinds.contains(&TlvKinds::ENCX25519) { + let key_bytes = if self.kinds.contains(&TlvKinds::ENCEC256) { + pem::parse(include_bytes!("../../enc-ec256-pub.pem").as_ref()).unwrap() + } else { + pem::parse(include_bytes!("../../enc-x25519-pub.pem").as_ref()).unwrap() + }; + assert_eq!(key_bytes.tag, "PUBLIC KEY"); + let rng = rand::SystemRandom::new(); + let alg = if self.kinds.contains(&TlvKinds::ENCEC256) { + &agreement::ECDH_P256 + } else { + &agreement::X25519 + }; + let pk = match agreement::EphemeralPrivateKey::generate(alg, &rng) { + Ok(v) => v, + Err(_) => panic!("Failed to generate ephemeral keypair"), + }; + + let pubk = match pk.compute_public_key() { + Ok(pubk) => pubk, + Err(_) => panic!("Failed computing ephemeral public key"), + }; + + let peer_pubk = if self.kinds.contains(&TlvKinds::ENCEC256) { + agreement::UnparsedPublicKey::new(&agreement::ECDH_P256, &key_bytes.contents[26..]) + } else { + agreement::UnparsedPublicKey::new(&agreement::X25519, &key_bytes.contents[12..]) + }; + + #[derive(Debug, PartialEq)] + struct OkmLen(T); + + impl hkdf::KeyType for OkmLen { + fn len(&self) -> usize { + self.0 + } + } + + let flag = TlvFlags::ENCRYPTED_AES256 as u32; + let aes256 = (self.get_flags() & flag) == flag; + + let derived_key = match agreement::agree_ephemeral( + pk, &peer_pubk, ring::error::Unspecified, |shared| { + let salt = hkdf::Salt::new(hkdf::HKDF_SHA256, &[]); + let prk = salt.extract(&shared); + let okm_len = if aes256 { 64 } else { 48 }; + let okm = match prk.expand(&[b"MCUBoot_ECIES_v1"], OkmLen(okm_len)) { + Ok(okm) => okm, + Err(_) => panic!("Failed building HKDF OKM"), + }; + let mut buf = if aes256 { vec![0u8; 64] } else { vec![0u8; 48] }; + match okm.fill(&mut buf) { + Ok(_) => Ok(buf), + Err(_) => panic!("Failed generating HKDF output"), + } + }, + ) { + Ok(v) => v, + Err(_) => panic!("Failed building HKDF"), + }; + + let nonce = GenericArray::from_slice(&[0; 16]); + let mut cipherkey = self.get_enc_key(); + if aes256 { + let key: &GenericArray = GenericArray::from_slice(&derived_key[..32]); + let block = Aes256::new(&key); + let mut cipher = Aes256Ctr::from_block_cipher(block, &nonce); + cipher.apply_keystream(&mut cipherkey); + } else { + let key: &GenericArray = GenericArray::from_slice(&derived_key[..16]); + let block = Aes128::new(&key); + let mut cipher = Aes128Ctr::from_block_cipher(block, &nonce); + cipher.apply_keystream(&mut cipherkey); + } + + let size = if aes256 { 32 } else { 16 }; + let key = hmac::Key::new(hmac::HMAC_SHA256, &derived_key[size..]); + let tag = hmac::sign(&key, &cipherkey); + + let mut buf = vec![]; + buf.append(&mut pubk.as_ref().to_vec()); + buf.append(&mut tag.as_ref().to_vec()); + buf.append(&mut cipherkey); + + if self.kinds.contains(&TlvKinds::ENCEC256) { + let size = if aes256 { 129 } else { 113 }; + assert!(buf.len() == size); + result.write_u16::(TlvKinds::ENCEC256 as u16).unwrap(); + result.write_u16::(size as u16).unwrap(); + } else { + let size = if aes256 { 96 } else { 80 }; + assert!(buf.len() == size); + result.write_u16::(TlvKinds::ENCX25519 as u16).unwrap(); + result.write_u16::(size as u16).unwrap(); + } + result.extend_from_slice(&buf); + } + + // Patch the size back into the TLV header. + let size = (result.len() - npro_pos) as u16; + let mut size_buf = &mut result[npro_pos + 2 .. npro_pos + 4]; + size_buf.write_u16::(size).unwrap(); + + // ECDSA is stored as an ASN.1 integer. For a 128-bit value, this maximally results in 33 + // bytes of storage for each of the two values. If the high bit is zero, it will take 32 + // bytes, if the top 8 bits are zero, it will take 31 bits, and so on. The smaller size + // will occur with decreasing likelihood. We'll allow this to get a bit smaller, hopefully + // allowing the tests to pass with false failures rare. For this case, we'll handle up to + // the top 16 bits of both numbers being all zeros (1 in 2^32). + if !Caps::has_ecdsa() { + if size_estimate != result.len() { + panic!("Incorrect size estimate: {} (actual {})", size_estimate, result.len()); + } + } else { + if size_estimate < result.len() || size_estimate > result.len() + 6 { + panic!("Incorrect size estimate: {} (actual {})", size_estimate, result.len()); + } + } + if size_estimate != result.len() { + log::warn!("Size off: {} actual {}", size_estimate, result.len()); + } + + result + } + + fn generate_enc_key(&mut self) { + let rng = rand::SystemRandom::new(); + let flag = TlvFlags::ENCRYPTED_AES256 as u32; + let aes256 = (self.get_flags() & flag) == flag; + let mut buf = if aes256 { + vec![0u8; 32] + } else { + vec![0u8; 16] + }; + if rng.fill(&mut buf).is_err() { + panic!("Error generating encrypted key"); + } + info!("New encryption key: {:02x?}", buf); + self.enc_key = buf; + } + + fn get_enc_key(&self) -> Vec { + if self.enc_key.len() != 32 && self.enc_key.len() != 16 { + panic!("No random key was generated"); + } + self.enc_key.clone() + } + + fn set_security_counter(&mut self, security_cnt: Option) { + self.security_cnt = security_cnt; + } + + fn set_ignore_ram_load_flag(&mut self) { + self.ignore_ram_load_flag = true; + } +} + +include!("rsa_pub_key-rs.txt"); +include!("rsa3072_pub_key-rs.txt"); +include!("ecdsa_pub_key-rs.txt"); +include!("ed25519_pub_key-rs.txt"); diff --git a/bootloader/mcuboot/sim/src/utils.rs b/bootloader/mcuboot/sim/src/utils.rs new file mode 100644 index 0000000..abbac3c --- /dev/null +++ b/bootloader/mcuboot/sim/src/utils.rs @@ -0,0 +1,11 @@ +// SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD +// +// SPDX-License-Identifier: Apache-2.0 + +//! Utility functions used throughout MCUboot + +pub fn align_up(num: u32, align: u32) -> u32 { + assert!(align.is_power_of_two()); + + (num + (align - 1)) & !(align - 1) +} diff --git a/bootloader/mcuboot/sim/tests/core.rs b/bootloader/mcuboot/sim/tests/core.rs new file mode 100644 index 0000000..ee941fe --- /dev/null +++ b/bootloader/mcuboot/sim/tests/core.rs @@ -0,0 +1,201 @@ +// Copyright (c) 2017-2021 Linaro LTD +// Copyright (c) 2017-2019 JUUL Labs +// Copyright (c) 2021-2023 Arm Limited +// +// SPDX-License-Identifier: Apache-2.0 + +//! Core tests +//! +//! Run the existing testsuite as a Rust unit test. + +use bootsim::{ + DepTest, DepType, UpgradeInfo, + ImagesBuilder, + Images, + NO_DEPS, + REV_DEPS, + testlog, + ImageManipulation +}; +use std::{ + env, + sync::atomic::{AtomicUsize, Ordering}, +}; + +/// A single test, after setting up logging and such. Within the $body, +/// $arg will be bound to each device. +macro_rules! test_shell { + ($name:ident, $arg: ident, $body:expr) => { + #[test] + fn $name() { + testlog::setup(); + ImagesBuilder::each_device(|$arg| { + $body; + }); + } + } +} + +/// A typical test calls a particular constructor, and runs a given test on +/// that constructor. +macro_rules! sim_test { + ($name:ident, $maker:ident($($margs:expr),*), $test:ident($($targs:expr),*)) => { + test_shell!($name, r, { + let image = r.$maker($($margs),*); + dump_image(&image, stringify!($name)); + assert!(!image.$test($($targs),*)); + }); + }; +} + +sim_test!(bad_secondary_slot, make_bad_secondary_slot_image(), run_signfail_upgrade()); +sim_test!(secondary_trailer_leftover, make_erased_secondary_image(), run_secondary_leftover_trailer()); +sim_test!(bootstrap, make_bootstrap_image(), run_bootstrap()); +sim_test!(oversized_bootstrap, make_oversized_bootstrap_image(), run_oversized_bootstrap()); +sim_test!(norevert_newimage, make_no_upgrade_image(&NO_DEPS, ImageManipulation::None), run_norevert_newimage()); +sim_test!(basic_revert, make_image(&NO_DEPS, true), run_basic_revert()); +sim_test!(revert_with_fails, make_image(&NO_DEPS, false), run_revert_with_fails()); +sim_test!(perm_with_fails, make_image(&NO_DEPS, true), run_perm_with_fails()); +sim_test!(perm_with_random_fails, make_image(&NO_DEPS, true), run_perm_with_random_fails(5)); +sim_test!(norevert, make_image(&NO_DEPS, true), run_norevert()); + +#[cfg(not(feature = "max-align-32"))] +sim_test!(oversized_secondary_slot, make_oversized_secondary_slot_image(), run_oversizefail_upgrade()); + +sim_test!(status_write_fails_complete, make_image(&NO_DEPS, true), run_with_status_fails_complete()); +sim_test!(status_write_fails_with_reset, make_image(&NO_DEPS, true), run_with_status_fails_with_reset()); +sim_test!(downgrade_prevention, make_image(&REV_DEPS, true), run_nodowngrade()); + +sim_test!(direct_xip_first, make_no_upgrade_image(&NO_DEPS, ImageManipulation::None), run_direct_xip()); +sim_test!(ram_load_first, make_no_upgrade_image(&NO_DEPS, ImageManipulation::None), run_ram_load()); +sim_test!(ram_load_split, make_no_upgrade_image(&NO_DEPS, ImageManipulation::None), run_split_ram_load()); +sim_test!(hw_prot_failed_security_cnt_check, make_image_with_security_counter(Some(0)), run_hw_rollback_prot()); +sim_test!(hw_prot_missing_security_cnt, make_image_with_security_counter(None), run_hw_rollback_prot()); +sim_test!(ram_load_out_of_bounds, make_no_upgrade_image(&NO_DEPS, ImageManipulation::WrongOffset), run_ram_load_boot_with_result(false)); +sim_test!(ram_load_missing_header_flag, make_no_upgrade_image(&NO_DEPS, ImageManipulation::IgnoreRamLoadFlag), run_ram_load_boot_with_result(false)); +sim_test!(ram_load_failed_validation, make_no_upgrade_image(&NO_DEPS, ImageManipulation::BadSignature), run_ram_load_boot_with_result(false)); +sim_test!(ram_load_corrupt_higher_version_image, make_no_upgrade_image(&NO_DEPS, ImageManipulation::CorruptHigherVersionImage), run_ram_load_boot_with_result(true)); + +#[cfg(feature = "multiimage")] +sim_test!(ram_load_overlapping_images_same_base, make_no_upgrade_image(&NO_DEPS, ImageManipulation::OverlapImages(true)), run_ram_load_boot_with_result(false)); +#[cfg(feature = "multiimage")] +sim_test!(ram_load_overlapping_images_offset, make_no_upgrade_image(&NO_DEPS, ImageManipulation::OverlapImages(false)), run_ram_load_boot_with_result(false)); + +// Test various combinations of incorrect dependencies. +test_shell!(dependency_combos, r, { + // Only test setups with two images. + if r.num_images() != 2 { + return; + } + + for dep in TEST_DEPS { + let image = r.clone().make_image(&dep, true); + dump_image(&image, "dependency_combos"); + assert!(!image.run_check_deps(&dep)); + } +}); + +/// These are the variants of dependencies we will test. +pub static TEST_DEPS: &[DepTest] = &[ + // A sanity test, no dependencies should upgrade. + DepTest { + depends: [DepType::Nothing, DepType::Nothing], + upgrades: [UpgradeInfo::Upgraded, UpgradeInfo::Upgraded], + downgrade: false, + }, + + // If all of the dependencies are met, we should also upgrade. + DepTest { + depends: [DepType::Correct, DepType::Correct], + upgrades: [UpgradeInfo::Upgraded, UpgradeInfo::Upgraded], + downgrade: false, + }, + + // If none of the dependencies are met, the images should be held. + DepTest { + depends: [DepType::Newer, DepType::Newer], + upgrades: [UpgradeInfo::Held, UpgradeInfo::Held], + downgrade: false, + }, + + // If the first image is not met, we should hold back on the + // dependencies (it is not well defined what the correct behavior is + // here, it could also be correct to upgrade only the second image). + DepTest { + depends: [DepType::Newer, DepType::Correct], + upgrades: [UpgradeInfo::Held, UpgradeInfo::Held], + downgrade: false, + }, + + // Test the variant in the other direction. + DepTest { + depends: [DepType::Correct, DepType::Newer], + upgrades: [UpgradeInfo::Held, UpgradeInfo::Held], + downgrade: false, + }, + + // Test where only the first image is upgraded, and there are no + // dependencies. + DepTest { + depends: [DepType::Nothing, DepType::NoUpgrade], + upgrades: [UpgradeInfo::Upgraded, UpgradeInfo::Held], + downgrade: false, + }, + + // Test one image with a valid dependency on the first image. + DepTest { + depends: [DepType::OldCorrect, DepType::NoUpgrade], + upgrades: [UpgradeInfo::Upgraded, UpgradeInfo::Held], + downgrade: false, + }, + + // Test one image with an invalid dependency on the first image. + DepTest { + depends: [DepType::Newer, DepType::NoUpgrade], + upgrades: [UpgradeInfo::Held, UpgradeInfo::Held], + downgrade: false, + }, + + // Test where only the second image is upgraded, and there are no + // dependencies. + DepTest { + depends: [DepType::NoUpgrade, DepType::Nothing], + upgrades: [UpgradeInfo::Held, UpgradeInfo::Upgraded], + downgrade: false, + }, + + // Test one image with a valid dependency on the second image. + DepTest { + depends: [DepType::NoUpgrade, DepType::OldCorrect], + upgrades: [UpgradeInfo::Held, UpgradeInfo::Upgraded], + downgrade: false, + }, + + // Test one image with an invalid dependency on the second image. + DepTest { + depends: [DepType::NoUpgrade, DepType::Newer], + upgrades: [UpgradeInfo::Held, UpgradeInfo::Held], + downgrade: false, + }, +]; + +/// Counter for the image number. +static IMAGE_NUMBER: AtomicUsize = AtomicUsize::new(0); + +/// Dump an image if that makes sense. The name is the name of the test +/// being run. If the MCUBOT_DEBUG_DUMP environment variable contains, in +/// one of its comma separate strings a substring of this name, then this +/// image will be dumped. As a special case, we will dump everything if +/// this environment variable is set to all. +fn dump_image(image: &Images, name: &str) { + if let Ok(request) = env::var("MCUBOOT_DEBUG_DUMP") { + if request.split(',').any(|req| { + req == "all" || name.contains(req) + }) { + let count = IMAGE_NUMBER.fetch_add(1, Ordering::SeqCst); + let full_name = format!("{}-{:04}", name, count); + log::info!("Dump {:?}", full_name); + image.debug_dump(&full_name); + } + } +} diff --git a/bootloader/mcuboot/testplan/mynewt/Makefile b/bootloader/mcuboot/testplan/mynewt/Makefile new file mode 100644 index 0000000..86e7b9c --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/Makefile @@ -0,0 +1,91 @@ +BLINKY := k64f_blinky +BLINKY2 := k64f_blinky2 + +SLINKY := k64f_slinky +SLINKY2 := k64f_slinky2 + +BOOT_RSA := k64f_boot_rsa +BOOT_RSA_PSS := k64f_boot_rsa_pss +BOOT_EC := k64f_boot_ec +BOOT_EC256 := k64f_boot_ec256 +BOOT_RSA_EC := k64f_boot_rsa_ec +BOOT_RSA_VALIDATE0 := k64f_boot_rsa_validate0 +BOOT_RSA_NOSWAP := k64f_boot_rsa_noswap + +RSA_KEY_1 := key_rsa.pem +RSA_KEY_2 := key_rsa_2.pem + +BLINKY2_IMG := bin/targets/$(BLINKY2)/app/apps/blinky/blinky.img + +FLASH_ERASE := pyocd-flashtool -ce + +NEWTMGR_CONN := --conn k64f +NEWTMGR_IMG := newtmgr $(NEWTMGR_CONN) image + +all: build-apps build-mcuboot + +build-blinky: + @echo "* Building blinky for the primary slot... \c" + @newt build -q $(BLINKY) + @echo "ok" + +build-blinky2: + @echo "* Building blinky2 for the secondary slot... \c" + @newt build -q $(BLINKY2) + @echo "ok" + +build-slinky: + @echo "* Building slinky for the primary slot... \c" + @newt build -q $(SLINKY) + @echo "ok" + +build-slinky2: + @echo "* Building slinky2 for the secondary slot... \c" + @newt build -q $(SLINKY2) + @echo "ok" + +build-boot-rsa: + @echo "* Building mcuboot with RSA... \c" + @newt build -q $(BOOT_RSA) + @echo "ok" + +build-boot-rsa-pss: + @echo "* Building mcuboot with RSA/PSS... \c" + @newt build -q $(BOOT_RSA_PSS) + @echo "ok" + +build-boot-ec: + @echo "* Building mcuboot with EC... \c" + @newt build -q $(BOOT_EC) + @echo "ok" + +build-boot-ec256: + @echo "* Building mcuboot with EC256... \c" + @newt build -q $(BOOT_EC256) + @echo "ok" + +# FIXME: multi-key signing does not work yet... +build-boot-rsa-ec: + @echo "* Building mcuboot with RSA + EC... \c" + @newt build -q $(BOOT_RSA_EC) + @echo "ok" + +build-boot-rsa-validate0: + @echo "* Building mcuboot with primary slot validation... \c" + @newt build -q $(BOOT_RSA_VALIDATE0) + @echo "ok" + +build-boot-rsa-noswap: + @echo "* Building mcuboot with overwrite only upgrade... \c" + @newt build -q $(BOOT_RSA_NOSWAP) + @echo "ok" + +build-apps: build-blinky build-blinky2 build-slinky build-slinky2 + +build-mcuboot: build-boot-rsa build-boot-rsa-pss build-boot-ec \ + build-boot-ec256 build-boot-rsa-validate0 build-boot-rsa-noswap + +clean: + rm -rf bin/ + +.PHONY: all clean diff --git a/bootloader/mcuboot/testplan/mynewt/apps/blinky/pkg.yml b/bootloader/mcuboot/testplan/mynewt/apps/blinky/pkg.yml new file mode 100644 index 0000000..f6f8b8b --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/apps/blinky/pkg.yml @@ -0,0 +1,35 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: apps/blinky +pkg.type: app +pkg.description: Basic example application which blinks an LED. +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: + +pkg.deps: + - "@mcuboot/boot/bootutil" + - "@apache-mynewt-core/kernel/os" + - "@apache-mynewt-core/hw/hal" + - "@apache-mynewt-core/sys/console/full" + - "@apache-mynewt-core/mgmt/smp" + - "@apache-mynewt-core/mgmt/smp/transport/smp_shell" + - "@apache-mynewt-core/mgmt/imgmgr" + - "@apache-mynewt-core/sys/log/stub" diff --git a/bootloader/mcuboot/testplan/mynewt/apps/blinky/src/main.c b/bootloader/mcuboot/testplan/mynewt/apps/blinky/src/main.c new file mode 100644 index 0000000..c02cb6d --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/apps/blinky/src/main.c @@ -0,0 +1,78 @@ +/** + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include +#include + +#include "sysinit/sysinit.h" +#include "os/os.h" +#include "bsp/bsp.h" +#include "hal/hal_gpio.h" +#ifdef ARCH_sim +#include "mcu/mcu_sim.h" +#endif + +#define BLINKY_PRIO (8) +#define BLINKY_STACK_SIZE OS_STACK_ALIGN(128) +static struct os_task task1; +static volatile int g_task1_loops; + +/* For LED toggling */ +int g_led_pin; + +static void +blinky_handler(void *arg) +{ + while (1) { + ++g_task1_loops; + + os_time_delay(OS_TICKS_PER_SEC / MYNEWT_VAL(BLINKY_TICKS_PER_SEC)); + + /* Toggle the LED */ + hal_gpio_toggle(g_led_pin); + } +} + +int +main(int argc, char **argv) +{ + os_stack_t *pstack; + +#ifdef ARCH_sim + mcu_sim_parse_args(argc, argv); +#endif + + sysinit(); + + g_led_pin = LED_BLINK_PIN; + hal_gpio_init_out(g_led_pin, 1); + + pstack = malloc(sizeof(os_stack_t) * BLINKY_STACK_SIZE); + assert(pstack); + + os_task_init(&task1, "blinky", blinky_handler, NULL, + BLINKY_PRIO, OS_WAIT_FOREVER, pstack, BLINKY_STACK_SIZE); + + while (1) { + os_eventq_run(os_eventq_dflt_get()); + } + + return 0; +} + diff --git a/bootloader/mcuboot/testplan/mynewt/apps/blinky/syscfg.yml b/bootloader/mcuboot/testplan/mynewt/apps/blinky/syscfg.yml new file mode 100644 index 0000000..e99da2b --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/apps/blinky/syscfg.yml @@ -0,0 +1,8 @@ +syscfg.defs: + BLINKY_TICKS_PER_SEC: + value: 1 + +syscfg.vals: + REBOOT_LOG_ENTRY_COUNT: 0 + REBOOT_LOG_CONSOLE: 0 + SHELL_TASK: 1 diff --git a/bootloader/mcuboot/testplan/mynewt/apps/slinky/pkg.yml b/bootloader/mcuboot/testplan/mynewt/apps/slinky/pkg.yml new file mode 100644 index 0000000..96f8eb7 --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/apps/slinky/pkg.yml @@ -0,0 +1,39 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +pkg.name: apps/slinky +pkg.type: app +pkg.description: "Example application which uses a variety of mynewt features." +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" +pkg.keywords: + +pkg.deps: + - "@mcuboot/boot/bootutil" + - "@apache-mynewt-core/test/flash_test" + - "@apache-mynewt-core/mgmt/imgmgr" + - "@apache-mynewt-core/mgmt/smp" + - "@apache-mynewt-core/mgmt/smp/transport/smp_shell" + - "@apache-mynewt-core/kernel/os" + - "@apache-mynewt-core/sys/shell" + - "@apache-mynewt-core/sys/config" + - "@apache-mynewt-core/sys/console/full" + - "@apache-mynewt-core/sys/id" + - "@apache-mynewt-core/sys/log/full" + - "@apache-mynewt-core/sys/stats/full" diff --git a/bootloader/mcuboot/testplan/mynewt/apps/slinky/src/main.c b/bootloader/mcuboot/testplan/mynewt/apps/slinky/src/main.c new file mode 100644 index 0000000..4da3eeb --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/apps/slinky/src/main.c @@ -0,0 +1,296 @@ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include "syscfg/syscfg.h" +#include "sysinit/sysinit.h" +#include "sysflash/sysflash.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "flash_map_backend/flash_map_backend.h" +#include +#if MYNEWT_VAL(SPLIT_LOADER) +#include "split/split.h" +#endif +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef ARCH_sim +#include +#endif + +/* Task 1 */ +#define TASK1_PRIO (8) +#define TASK1_STACK_SIZE OS_STACK_ALIGN(192) +#define MAX_CBMEM_BUF 600 +static struct os_task task1; +static volatile int g_task1_loops; + +/* Task 2 */ +#define TASK2_PRIO (9) +#define TASK2_STACK_SIZE OS_STACK_ALIGN(64) +static struct os_task task2; + +static struct log my_log; + +static volatile int g_task2_loops; + +/* Global test semaphore */ +static struct os_sem g_test_sem; + +/* For LED toggling */ +static int g_led_pin; + +STATS_SECT_START(gpio_stats) +STATS_SECT_ENTRY(toggles) +STATS_SECT_END + +static STATS_SECT_DECL(gpio_stats) g_stats_gpio_toggle; + +static STATS_NAME_START(gpio_stats) +STATS_NAME(gpio_stats, toggles) +STATS_NAME_END(gpio_stats) + +static char *test_conf_get(int argc, char **argv, char *val, int max_len); +static int test_conf_set(int argc, char **argv, char *val); +static int test_conf_commit(void); +static int test_conf_export(void (*export_func)(char *name, char *val), + enum conf_export_tgt tgt); + +static struct conf_handler test_conf_handler = { + .ch_name = "test", + .ch_get = test_conf_get, + .ch_set = test_conf_set, + .ch_commit = test_conf_commit, + .ch_export = test_conf_export +}; + +static uint8_t test8; +static uint8_t test8_shadow; +static char test_str[32]; +static uint32_t cbmem_buf[MAX_CBMEM_BUF]; +static struct cbmem cbmem; + +static char * +test_conf_get(int argc, char **argv, char *buf, int max_len) +{ + if (argc == 1) { + if (!strcmp(argv[0], "8")) { + return conf_str_from_value(CONF_INT8, &test8, buf, max_len); + } else if (!strcmp(argv[0], "str")) { + return test_str; + } + } + return NULL; +} + +static int +test_conf_set(int argc, char **argv, char *val) +{ + if (argc == 1) { + if (!strcmp(argv[0], "8")) { + return CONF_VALUE_SET(val, CONF_INT8, test8_shadow); + } else if (!strcmp(argv[0], "str")) { + return CONF_VALUE_SET(val, CONF_STRING, test_str); + } + } + return OS_ENOENT; +} + +static int +test_conf_commit(void) +{ + test8 = test8_shadow; + + return 0; +} + +static int +test_conf_export(void (*func)(char *name, char *val), enum conf_export_tgt tgt) +{ + char buf[4]; + + conf_str_from_value(CONF_INT8, &test8, buf, sizeof(buf)); + func("test/8", buf); + func("test/str", test_str); + return 0; +} + +static void +task1_handler(void *arg) +{ + struct os_task *t; + int prev_pin_state, curr_pin_state; + struct image_version ver; + + /* Set the led pin for the E407 devboard */ + g_led_pin = LED_BLINK_PIN; + hal_gpio_init_out(g_led_pin, 1); + + if (imgr_my_version(&ver) == 0) { + console_printf("\nSlinky %u.%u.%u.%u\n", + ver.iv_major, ver.iv_minor, ver.iv_revision, + (unsigned int)ver.iv_build_num); + } else { + console_printf("\nSlinky\n"); + } + + while (1) { + t = os_sched_get_current_task(); + assert(t->t_func == task1_handler); + + ++g_task1_loops; + + /* Wait one second */ + os_time_delay(OS_TICKS_PER_SEC / MYNEWT_VAL(BLINKY_TICKS_PER_SEC)); + + /* Toggle the LED */ + prev_pin_state = hal_gpio_read(g_led_pin); + curr_pin_state = hal_gpio_toggle(g_led_pin); + LOG_INFO(&my_log, LOG_MODULE_DEFAULT, "GPIO toggle from %u to %u", + prev_pin_state, curr_pin_state); + STATS_INC(g_stats_gpio_toggle, toggles); + + /* Release semaphore to task 2 */ + os_sem_release(&g_test_sem); + } +} + +static void +task2_handler(void *arg) +{ + struct os_task *t; + + while (1) { + /* just for debug; task 2 should be the running task */ + t = os_sched_get_current_task(); + assert(t->t_func == task2_handler); + + /* Increment # of times we went through task loop */ + ++g_task2_loops; + + /* Wait for semaphore from ISR */ + os_sem_pend(&g_test_sem, OS_TIMEOUT_NEVER); + } +} + +/** + * init_tasks + * + * Called by main.c after sysinit(). This function performs initializations + * that are required before tasks are running. + * + * @return int 0 success; error otherwise. + */ +static void +init_tasks(void) +{ + os_stack_t *pstack; + + /* Initialize global test semaphore */ + os_sem_init(&g_test_sem, 0); + + pstack = malloc(sizeof(os_stack_t)*TASK1_STACK_SIZE); + assert(pstack); + + os_task_init(&task1, "task1", task1_handler, NULL, + TASK1_PRIO, OS_WAIT_FOREVER, pstack, TASK1_STACK_SIZE); + + pstack = malloc(sizeof(os_stack_t)*TASK2_STACK_SIZE); + assert(pstack); + + os_task_init(&task2, "task2", task2_handler, NULL, + TASK2_PRIO, OS_WAIT_FOREVER, pstack, TASK2_STACK_SIZE); +} + +int read_random_data(void); + +/** + * main + * + * The main task for the project. This function initializes the packages, calls + * init_tasks to initialize additional tasks (and possibly other objects), + * then starts serving events from default event queue. + * + * @return int NOTE: this function should never return! + */ +int +main(int argc, char **argv) +{ + int rc; + +#ifdef ARCH_sim + mcu_sim_parse_args(argc, argv); +#endif + + sysinit(); + + rc = conf_register(&test_conf_handler); + assert(rc == 0); + + cbmem_init(&cbmem, cbmem_buf, MAX_CBMEM_BUF); + log_register("log", &my_log, &log_cbmem_handler, &cbmem, LOG_SYSLEVEL); + + stats_init(STATS_HDR(g_stats_gpio_toggle), + STATS_SIZE_INIT_PARMS(g_stats_gpio_toggle, STATS_SIZE_32), + STATS_NAME_INIT_PARMS(gpio_stats)); + + stats_register("gpio_toggle", STATS_HDR(g_stats_gpio_toggle)); + + conf_load(); + + reboot_start(hal_reset_cause()); + + (void) read_random_data(); + + init_tasks(); + + /* If this app is acting as the loader in a split image setup, jump into + * the second stage application instead of starting the OS. + */ +#if MYNEWT_VAL(SPLIT_LOADER) + { + void *entry; + rc = split_app_go(&entry, true); + if(rc == 0) { + hal_system_restart(entry); + } + } +#endif + + /* + * As the last thing, process events from default event queue. + */ + while (1) { + os_eventq_run(os_eventq_dflt_get()); + } +} diff --git a/bootloader/mcuboot/testplan/mynewt/apps/slinky/src/random_data.c b/bootloader/mcuboot/testplan/mynewt/apps/slinky/src/random_data.c new file mode 100644 index 0000000..cc8c4c7 --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/apps/slinky/src/random_data.c @@ -0,0 +1,21354 @@ +#include +static const unsigned char random_bin[] = { + 0x12, 0x3d, 0x29, 0x6d, 0x1e, 0x9a, 0xbf, 0x19, 0xdb, 0x98, 0x7e, 0x80, + 0xb6, 0x2e, 0x25, 0x13, 0xb5, 0x5a, 0x0e, 0xdc, 0x5a, 0x3e, 0xf5, 0x9a, + 0xf1, 0x8a, 0x37, 0xbd, 0x82, 0x3e, 0x99, 0x5d, 0x23, 0x7e, 0x44, 0xd5, + 0x09, 0xdd, 0x2c, 0xfa, 0x51, 0xfb, 0xa4, 0x2e, 0x2b, 0x63, 0x19, 0xd4, + 0x00, 0x1b, 0x4e, 0x53, 0x24, 0xef, 0xdb, 0xa4, 0xd1, 0xe1, 0x0d, 0xa8, + 0xf6, 0x90, 0x03, 0x21, 0x1e, 0xda, 0x94, 0x1f, 0x67, 0xb6, 0xd8, 0x18, + 0x8a, 0x9c, 0xae, 0x4a, 0x9d, 0xd1, 0x09, 0xff, 0x8a, 0xb3, 0x83, 0xeb, + 0x8f, 0x25, 0x5b, 0x4e, 0xad, 0x8c, 0x4d, 0x79, 0x0e, 0x92, 0x67, 0x2a, + 0x4c, 0x71, 0xaf, 0xfb, 0x85, 0xc5, 0x18, 0x30, 0x74, 0x13, 0x13, 0xbf, + 0x09, 0x21, 0xc7, 0x27, 0xef, 0x50, 0x8c, 0x43, 0xc4, 0x41, 0x10, 0xb2, + 0xac, 0x09, 0x9f, 0x43, 0xa3, 0x58, 0xbd, 0xde, 0x85, 0x61, 0x58, 0x65, + 0x5e, 0x0d, 0x71, 0xfa, 0x39, 0xbd, 0x9a, 0x7d, 0xe6, 0x1f, 0x4c, 0x72, + 0x11, 0xb3, 0x1e, 0x81, 0xf8, 0x38, 0x7f, 0x05, 0x67, 0xb1, 0x57, 0x66, + 0x54, 0x5c, 0xcd, 0xc6, 0x69, 0x80, 0x0b, 0xd1, 0x2c, 0xa4, 0xd4, 0x8c, + 0x6d, 0xd7, 0x63, 0x6b, 0x66, 0xa2, 0xc3, 0x46, 0xca, 0x81, 0x3a, 0xaa, + 0xb0, 0x16, 0x40, 0x7e, 0xad, 0xe0, 0x62, 0x39, 0x35, 0x98, 0xed, 0x63, + 0x9b, 0x7a, 0x22, 0xfd, 0xb9, 0x1a, 0x05, 0x59, 0x49, 0xb5, 0x12, 0x20, + 0xbf, 0x9e, 0x3f, 0xe5, 0x50, 0x6e, 0x4d, 0x58, 0xb9, 0xfc, 0x46, 0xd5, + 0x6f, 0x86, 0xc3, 0x52, 0xd7, 0x70, 0x5f, 0xc1, 0x46, 0xf9, 0x88, 0x82, + 0x7d, 0x7b, 0xa1, 0xe9, 0x71, 0xe2, 0xff, 0x7a, 0x44, 0x88, 0x6d, 0x51, + 0x4b, 0x98, 0x37, 0x36, 0xf7, 0xcd, 0x55, 0x93, 0x40, 0x40, 0x91, 0xf0, + 0x6e, 0x9a, 0xb8, 0xa9, 0xa0, 0xa6, 0xaa, 0xd8, 0x0d, 0xc4, 0x84, 0x1e, + 0xbe, 0x70, 0x7a, 0xb8, 0xa6, 0x09, 0x38, 0x13, 0x0b, 0xb2, 0x56, 0x67, + 0xbe, 0x21, 0x61, 0x7d, 0xc6, 0x5d, 0xe5, 0xfe, 0xd8, 0x54, 0xe0, 0xc5, + 0x42, 0xed, 0x76, 0x7f, 0xd5, 0x42, 0x38, 0x8e, 0x83, 0x60, 0xc1, 0x4c, + 0xe6, 0x7e, 0xa4, 0x6e, 0x6b, 0x04, 0xd4, 0x38, 0xe0, 0x6f, 0xfe, 0xe0, + 0xd2, 0x79, 0xd6, 0xe9, 0x3c, 0xa9, 0xb6, 0x0d, 0x2a, 0xc3, 0x3f, 0x35, + 0xa6, 0x95, 0xb5, 0x62, 0xc4, 0xfb, 0x48, 0x89, 0x7c, 0x17, 0x65, 0xb9, + 0xa2, 0x4e, 0xe2, 0x09, 0xd2, 0xcd, 0xcf, 0x87, 0xb4, 0x7f, 0x17, 0x42, + 0xcc, 0x3a, 0x89, 0x38, 0x4e, 0x6d, 0xbf, 0x66, 0xec, 0xa1, 0x65, 0xea, + 0xd3, 0x1d, 0x19, 0x42, 0xb2, 0xc0, 0x81, 0x27, 0x10, 0xd9, 0x3f, 0x6c, + 0x42, 0x3e, 0xcd, 0x16, 0x8b, 0x35, 0x43, 0xea, 0x3b, 0x43, 0x95, 0x25, + 0x81, 0x80, 0x45, 0x25, 0xe1, 0x15, 0x36, 0xa7, 0x4e, 0x70, 0x02, 0x16, + 0xa8, 0x79, 0x88, 0xf3, 0x52, 0x06, 0x17, 0x9d, 0xa1, 0x4d, 0x4d, 0x67, + 0xdf, 0x2b, 0x25, 0xe3, 0xf2, 0xf0, 0x10, 0x21, 0x3c, 0x7a, 0xc6, 0xb1, + 0xa7, 0xa4, 0x9d, 0x58, 0x64, 0x4c, 0xed, 0xa3, 0x27, 0x91, 0xba, 0x6a, + 0xc3, 0x27, 0x47, 0xd7, 0x16, 0x72, 0x52, 0x83, 0xac, 0xd9, 0x85, 0x47, + 0x06, 0x5d, 0x76, 0xd9, 0x62, 0x89, 0x49, 0xca, 0x7e, 0x67, 0x6a, 0x99, + 0xa8, 0x2a, 0xf6, 0x57, 0xb1, 0x42, 0x13, 0x74, 0xc3, 0x13, 0xe3, 0x91, + 0x38, 0x0c, 0x07, 0xb3, 0xbf, 0xd4, 0x05, 0xb4, 0xd8, 0x90, 0x65, 0x4b, + 0x10, 0x08, 0xe6, 0xa1, 0x76, 0x09, 0x46, 0x4e, 0xe4, 0xda, 0xc2, 0xaa, + 0x7b, 0xab, 0xcf, 0x83, 0xe4, 0x19, 0x5e, 0x4b, 0xf5, 0x7a, 0x32, 0x6c, + 0x25, 0x8d, 0xd8, 0x58, 0x61, 0x02, 0x1a, 0x0b, 0x8d, 0xc8, 0x80, 0xd3, + 0x7b, 0xba, 0xb2, 0x5f, 0xd3, 0xe9, 0xc9, 0x4c, 0x15, 0xe5, 0x76, 0xfe, + 0x3a, 0x1f, 0x26, 0x2b, 0xe7, 0x49, 0x5f, 0xdc, 0x6b, 0xab, 0xd4, 0x3b, + 0x69, 0x84, 0x75, 0x75, 0x65, 0x3a, 0xcb, 0xd7, 0xea, 0x20, 0xda, 0xf8, + 0x4c, 0xd1, 0x78, 0x08, 0xdf, 0x67, 0x22, 0x0f, 0xb2, 0xa9, 0x32, 0x27, + 0xca, 0x17, 0x89, 0x7b, 0x16, 0x9f, 0x48, 0x4f, 0xc4, 0x59, 0x48, 0x8e, + 0xe5, 0x26, 0x3a, 0x19, 0x50, 0x44, 0xad, 0x69, 0xed, 0x58, 0x1a, 0xbb, + 0x72, 0x9c, 0x4c, 0x48, 0x7c, 0x1b, 0x42, 0x13, 0x03, 0x3f, 0xb6, 0xb5, + 0x37, 0xca, 0x97, 0xf1, 0x82, 0x68, 0xdd, 0xf8, 0x22, 0x63, 0xf0, 0x80, + 0xf2, 0x7b, 0xee, 0xb9, 0x5f, 0x6d, 0x15, 0xed, 0xa5, 0x26, 0xd1, 0x3f, + 0xb1, 0xfd, 0x9a, 0x7e, 0xe9, 0x5b, 0x46, 0x04, 0x63, 0xe5, 0xb5, 0x1b, + 0x25, 0x5b, 0x65, 0x17, 0x03, 0x55, 0x3a, 0x3f, 0x23, 0xde, 0x55, 0x56, + 0xcd, 0xcc, 0x92, 0xc1, 0x26, 0xbf, 0x7f, 0x6b, 0x2c, 0x9e, 0xed, 0x05, + 0xd7, 0x7f, 0x8d, 0x37, 0xe2, 0x55, 0x15, 0x72, 0x8a, 0xa7, 0x30, 0x84, + 0x7d, 0x9c, 0x36, 0x95, 0x2d, 0x6a, 0x0f, 0xfe, 0x6b, 0x85, 0x0c, 0x6e, + 0xdc, 0x2b, 0x78, 0x75, 0xd8, 0x65, 0xe4, 0xae, 0x8b, 0xca, 0x71, 0x92, + 0x63, 0xe3, 0xd4, 0x49, 0xa2, 0xa1, 0xde, 0x87, 0xfe, 0x6f, 0xb5, 0x26, + 0x80, 0xfd, 0xda, 0x02, 0xfc, 0xf1, 0xc0, 0x4d, 0xda, 0xf4, 0x58, 0x98, + 0x9f, 0x41, 0xcc, 0xc9, 0xcf, 0xbb, 0x85, 0xe8, 0x83, 0x6e, 0x2a, 0xc0, + 0x01, 0xaf, 0x8c, 0x98, 0x26, 0xd8, 0x08, 0x62, 0x40, 0x0c, 0x8c, 0xfd, + 0x0a, 0xd5, 0x1e, 0xdc, 0xa9, 0x72, 0x07, 0xf9, 0x75, 0x9e, 0x22, 0xa2, + 0xfd, 0x8c, 0x61, 0xee, 0xb9, 0x9b, 0x6a, 0x95, 0x73, 0xaa, 0xe6, 0x97, + 0x68, 0x07, 0x91, 0xc4, 0x46, 0x05, 0x6d, 0x2a, 0x8b, 0x45, 0x71, 0x20, + 0x90, 0x3b, 0x31, 0x3c, 0xac, 0xc4, 0x51, 0x31, 0xb1, 0x95, 0x0e, 0x70, + 0x1a, 0x28, 0x31, 0x14, 0x13, 0x5c, 0xb7, 0x1f, 0x60, 0x0b, 0x21, 0xc8, + 0x62, 0x00, 0x42, 0x5a, 0xbe, 0x72, 0xe7, 0xb1, 0x4b, 0x05, 0xe0, 0xe8, + 0xcc, 0x0e, 0xdb, 0xbb, 0xc3, 0x6b, 0x9c, 0x98, 0xa2, 0x7c, 0x64, 0xdf, + 0xaa, 0x5f, 0xdd, 0x77, 0x15, 0xe6, 0x54, 0x1b, 0x64, 0xe6, 0xf0, 0x7b, + 0x22, 0xdd, 0x7b, 0x4d, 0x35, 0xb5, 0x08, 0x69, 0xe8, 0x3e, 0xaa, 0x0c, + 0xf3, 0x2e, 0x40, 0xa2, 0x3a, 0x61, 0x61, 0x45, 0xa4, 0x0f, 0xea, 0xca, + 0xa2, 0x42, 0x35, 0xac, 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0x7d, 0x5b, 0x9c, 0xa0, 0x70, 0xa0, 0x3c, 0xee, + 0x2f, 0xbb, 0xac, 0xaa, 0x2a, 0xba, 0x6a, 0x53, 0xd4, 0xd8, 0x0d, 0x9f, + 0xec, 0x7f, 0x00, 0x2e, 0xdb, 0x73, 0x84, 0xb9, 0x97, 0xfa, 0xf1, 0x22, + 0x8a, 0x5f, 0xa3, 0xd5, 0xcf, 0x61, 0x23, 0xeb, 0x91, 0xc9, 0x08, 0xa5, + 0x96, 0x76, 0xb0, 0xb6, 0xad, 0x11, 0xfd, 0xe0, 0x31, 0x0e, 0xfa, 0x50, + 0xd1, 0xfa, 0x55, 0xe8, 0xc6, 0xde, 0x2f, 0xdd, 0x72, 0xa0, 0x6b, 0x41, + 0x56, 0x8d, 0x3c, 0x6c, 0x92, 0x8b, 0xe2, 0x95, 0x40, 0x9b, 0xc8, 0x9a, + 0xb5, 0xef, 0x99, 0xd0, 0xc7, 0x0e, 0x8b, 0xb5, 0xd1, 0xe1, 0x80, 0x32, + 0x22, 0x71, 0x76, 0xc8, 0xf7, 0x3b, 0xa8, 0xce, 0x14, 0x2b, 0xee, 0x14, + 0x95, 0x3a, 0x1f, 0xdf, 0x6c, 0x56, 0x4b, 0x90, 0xe9, 0xc0, 0x0f, 0x5e, + 0xfa, 0x95, 0x68, 0x8d, 0x98, 0xc7, 0x88, 0xdf, 0xe4, 0x6b, 0xa7, 0x73, + 0x11, 0x3e, 0x5b, 0xad, 0xdd, 0x7e, 0x8e, 0x8d, 0x65, 0x8d, 0x19, 0xd5, + 0xa8, 0x2d, 0x6f, 0x25 +}; +static const unsigned int random_bin_len = 256000; +static uint32_t value; + +/* + * This file has one purpose which is to make the firmware big! + */ +int +read_random_data(void) +{ + int i; + + for (value = 0, i = 0; i < random_bin_len; i++) { + value += random_bin[i]; + } + + return value; +} diff --git a/bootloader/mcuboot/testplan/mynewt/apps/slinky/syscfg.yml b/bootloader/mcuboot/testplan/mynewt/apps/slinky/syscfg.yml new file mode 100644 index 0000000..1005edc --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/apps/slinky/syscfg.yml @@ -0,0 +1,34 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +syscfg.defs: + BLINKY_TICKS_PER_SEC: + value: 1 + +syscfg.vals: + SHELL_TASK: 1 + STATS_NAMES: 1 + REBOOT_LOG_FCB: 1 + LOG_FCB: 1 + CONFIG_FCB: 1 + STATS_CLI: 1 + LOG_CLI: 1 + CONFIG_CLI: 1 + STATS_MGMT: 1 + LOG_MGMT: 1 + CONFIG_MGMT: 1 diff --git a/bootloader/mcuboot/testplan/mynewt/key_ec.pem b/bootloader/mcuboot/testplan/mynewt/key_ec.pem new file mode 100644 index 0000000..7307800 --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/key_ec.pem @@ -0,0 +1,5 @@ +-----BEGIN EC PRIVATE KEY----- +MGgCAQEEHKDCA+0fUA9P6MkTZvGlO4IN8kQfMbD4xyt619WgBwYFK4EEACGhPAM6 +AASgjFrWmCAa1bnE/X+l0wjKAJFexpJJzhjFZBftv2PQzbj3/yklNVp6IDDJJpWy +V9FGDWkYE8l9sw== +-----END EC PRIVATE KEY----- diff --git a/bootloader/mcuboot/testplan/mynewt/key_ec256.pem b/bootloader/mcuboot/testplan/mynewt/key_ec256.pem new file mode 100644 index 0000000..0f9264f --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/key_ec256.pem @@ -0,0 +1,5 @@ +-----BEGIN EC PRIVATE KEY----- +MHcCAQEEINtq7Uc92lGcI9pcfwU7IEWfjtYKMpG3iSLy8vdn3p0poAoGCCqGSM49 +AwEHoUQDQgAEbmhhf9fiyT20CixtsNDO/lS4lq38YIeJQektIcg+HV7Dd/1iX7v7 +2hCnWiOq/AG13HM9N8FFj5A7Zv0rlWacyQ== +-----END EC PRIVATE KEY----- diff --git a/bootloader/mcuboot/testplan/mynewt/key_ec256_2.pem b/bootloader/mcuboot/testplan/mynewt/key_ec256_2.pem new file mode 100644 index 0000000..da05302 --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/key_ec256_2.pem @@ -0,0 +1,5 @@ +-----BEGIN EC PRIVATE KEY----- +MHcCAQEEICDt9+UM3LnshnbYzo73AGTWav9ZmRYDydJAarzx4Og8oAoGCCqGSM49 +AwEHoUQDQgAEDv6jJOUwhCpzEH3T7yWlAOZRTLIlC0q/JMHyJR0PkPMS+eyq7fEp +hOnAXbCNx5PLyVLR2NSnOU1A6QiLHW1j0A== +-----END EC PRIVATE KEY----- diff --git a/bootloader/mcuboot/testplan/mynewt/key_ec_2.pem b/bootloader/mcuboot/testplan/mynewt/key_ec_2.pem new file mode 100644 index 0000000..82dff43 --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/key_ec_2.pem @@ -0,0 +1,5 @@ +-----BEGIN EC PRIVATE KEY----- +MGgCAQEEHCN8/JmSnXMbwvimYU61t5J3BqSog3UD9rszWEugBwYFK4EEACGhPAM6 +AATihCbugkqIXekQOh7iZZZPghfS/bQID5ad8FRY1xnL5rBd2nR7gFqTXxV9M9tF +EJFA+MwFnIbgng== +-----END EC PRIVATE KEY----- diff --git a/bootloader/mcuboot/testplan/mynewt/key_rsa.pem b/bootloader/mcuboot/testplan/mynewt/key_rsa.pem new file mode 100644 index 0000000..c43da3b --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/key_rsa.pem @@ -0,0 +1,27 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIEpgIBAAKCAQEA4khfMQhQLk9tv83QCfFc1gjphM91LIgHzA75U65KmpO0G1VD +t34QqFDZFJAFgBWgjNvcGwNW1keURKHoFfR3SWBFNKQXmoGo/LbZIfZo+noT5SXN +pQt3Cl/2C500j8P0kferKBJS3LuykoCY4hMz58MqHCeY/P8H210W0lDBjhL6lZhR +kbv57sNlpALgv7axxiDHn/5jYWpo9gjKVTLAUN2NUnMDer7XMtlhmRn/DeaCyBw9 +BxrpqHutdSwmhz1nK1rEf3CGcIp+7ekvvirVtDN7zInNVwi7ct8AjuqKKqigHLiK +Ya8yPUHp9rGic8L/0TJVH9oJI8GDUeFP1WU+lwIDAQABAoIBAQDBV+8mGSFRgIKY +2UVByZ52LyVAWnaW9yAaZkz5CDose7nvhNoYZbnb50Ckhi588327/XvDBQZkjsKM +Jf8FC14FLyHSycZ1OQZn79/1WfL22eo36CYfOH2dOsMjx04K7PcC5aiz03xDqIj7 +DrASsy+tfp9zcQ4SVeKjt5VxXJkVR1wMTUM08N7GXTf71YpTLSb0drbovWS8QUYq +JIUh36EMhNOIqNyXVBBxCHdbUEvN0p4185mciK+P42JJvTm1i9ooyuYQUaF3U25y +yDyhMGxVxPwgREaIhA/xfmU2Dsqrmq0pitiVZ9qJqbuWIuxZJTd2l9tkeEr4hdHB +zCgFqyKhAoGBAP/iDrMUdf+KB53U7le2xIk+MJwNDSblVF/O2t93hvMk39Y0bT9y +YvGaVh3Ryqoy4/g81nwbvQs36IMb3XGvbn3N4a5XGBlysOLOzwF0piYNX1ZyRgxn +2wxw1O24uE1qN4Eh0UrLDvN07nKRJ6V9az+zSW3EAxwwUDWBIFL0pM8xAoGBAOJi +2cbIfHXEpt46aDEN7BwBog+8KL5Mima13zN8Melu6WvhB69JGG8IlUstMPPAq6uL +Wd72vVkN0Vy7kr6dHCa+/IzdW47ukUFIB4IaMAHYTByWaY7Hh7mnIUyNUIojou9e +o49DKdpV/xOksJWljwhtiHy6QCivbka3prTBikhHAoGBAMFQn5pbkuoD9c0f2REb +W0/0U/URRyZji2L2fBTn0GRRL2o9IWwVlvrAht7waBQ9bk1UaRZKPoADNP4YRyxk +RS12JVH5KpPPOiOf6nRHFF8bKzO8EX+91peHhtYx/8s8u8IrMls3HYyAgsS7NSCp +qCTv5kGvHEpnlbFWZH1HpluBAoGBAJT3wSA6SxPfzIJNYsRsyeJ//JloElNu4F/H +69DgN6PI1Rak5D6m1coylrL6UM0FCrH+J6w9JsnT+uGPmHePwLeKU3uKKbZ7K+AO +OsqU2uRL5YGmRF2s1JYI8TODhezwmEX1O6GI66B9mDTf2UcPw3gjQ333vUJIdkNY +k/07off/AoGBAPx9NTR13dbDhlG6hyxEtCrTyxKKXs3vmTfjmaQnicvM/oceRYed +h8+q/YN2ePvxeOYiOgluFWJz+pOrWKYm1sFYEa6+GtCnBwyv5fmxLxY/99ULIMYA +Jyudi8CusEM1q5TetFMoNcRSj7iPLUyFO1thUoRpCTJ/bUcD0Dl9PL20 +-----END RSA PRIVATE KEY----- diff --git a/bootloader/mcuboot/testplan/mynewt/key_rsa_2.pem b/bootloader/mcuboot/testplan/mynewt/key_rsa_2.pem new file mode 100644 index 0000000..c0dba0a --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/key_rsa_2.pem @@ -0,0 +1,27 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIEpAIBAAKCAQEArKyBv+rzsk2frv0lqcYNJ0o2ahMwS/lpXXvfkd9cGvgX+Xf+ +Zdv54VHO6cpvp1CExOoeVwhK+78ETYTXuOqIzJB2uv+MtcvlwN/OH14g0TmMb14Z +n3iaV9I9/VLEt2BxI0gAp+megUAz5CW66BMw/cfxX0jvWYhHr8qFRWSbZkExivwy +b10azCw+g6xk+NlOddd9x0Jw1UjIZcSKoVdLcuhctBTqteMqhFUIsR9LjzEj0VQk +nXtHFABIXGsc4J20WvLMueLIyd5AW1J4EKLHLcpvBuNFQTil3U8T5mmdfarVaqVr +7AHINsv3ROIw6sWzA1S9baB8Ok9cDzkZLK0XgwIDAQABAoIBAQCUUXT9ya3b2Qsx +fuYsBx9jQT6uLJ9OkwSrNOzb2rS9wZ6uPSC6k5H2tZN6g9UWLXZtwf+fmFL4HKJw +h4vYnTQ2Klyh0UInIeXOny7pCKw9qyXyvyxZK3m/t6phfwfTz7Y+rOlLUcNBmEk6 +TiJWl618P5MX2oklKYcR+24wJfPJhwpclnrxw5UzqUbDSFfSL/zDjlnPEeQ8tQ1Z +WQISqUim6bMk3J62AiOUwH9QsOj7seEQG7zCqVc+MWQ5OloI1wlPyACLDAvnBBT5 +9VaP8ixEaJbarpMXH9j9qnRRsEeLa8BGqJ6qZIlf9zyWEQrkzLAi75oTdiRL5cm1 +VSiXVAhJAoGBAN7s7537JJuPFMHwurAUbYd02rqv6pWztwmVJZzsILOPjVBOyb9E +QJXCnJ1OfL1lhtegndP36Sb/mGwdK6IWDLH2+E/eLcWzcUXNvI0H02pbvzq/Vbh+ +Q0VxFblhvwGhvi0+SydC9MowTzcv/5wAV7zp2AK6+fBjenE3aCPNZCyNAoGBAMZK +7sgIOuvLS0qVd7YXJpcBcjZRNpRc14T8Qh+AXRLv5qbFjMjwc3usJo3E4+EIE7eq +IopMw54emT7qDfRoZXXjPPDawixTRMFDBEFHbXb1KB3sDp8xyghZ1f8296Y00NJ9 +3pNba/UBTgVXNspZ5gTois8HsLrAnbqjNuA5NrhPAoGBAMaZ63ehUKHNvL5zSr6n +1FSDRIJhSuqHqx+8YkAFFbUixNCxAIeHtMo3EPQMApFxK8paa4F2MZ7uwso+yqqi +XjkGP35YAAtLrDR17+7s8+qjRiB+aU3uHtx0vNflPxejExyXjLizrAWdOFWAS4ad +v4ysACeekCEbXvASXpLW3tHZAoGAemvWwb57CgpnwHNJBi2C0KW+6pP3O1+aW2sW +M7afP8rGvt2mDoSM96SP5OTSv6Kp8bFjQ7ki6GMBv5rm5KbzRPX3MMgOKyl5gEus +u9SqW0/95YNQf65QihlUig1Ylc9zwRCesqE1pHyau6ddl04rOYqL8EdSL+otNwX/ +Ii2Qf/cCgYBi5WOv0cFyff+uQNUGEv1l896+8yhyml2ogE8PTdrBX16e4/N89vG4 +5vXEmPmqk9qYxmKIr5MLM9229gWCCGt7wWdH5Xt0AT7ZUvxwyKnaS/QimOVU2X1t +3lpGMTJkRq5bxMUUbC1n9e6o/GFrlmtLjCTYgRLOBKNy36bxxZnOZw== +-----END RSA PRIVATE KEY----- diff --git a/bootloader/mcuboot/testplan/mynewt/keys/ec256/pkg.yml b/bootloader/mcuboot/testplan/mynewt/keys/ec256/pkg.yml new file mode 100644 index 0000000..2467ce4 --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/keys/ec256/pkg.yml @@ -0,0 +1,3 @@ +pkg.name: keys/ec256 +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" diff --git a/bootloader/mcuboot/testplan/mynewt/keys/ec256/src/keys.c b/bootloader/mcuboot/testplan/mynewt/keys/ec256/src/keys.c new file mode 100644 index 0000000..ece45c3 --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/keys/ec256/src/keys.c @@ -0,0 +1,19 @@ +#include +static unsigned char key[] = { + 0x30, 0x59, 0x30, 0x13, 0x06, 0x07, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x02, + 0x01, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x03, 0x01, 0x07, 0x03, + 0x42, 0x00, 0x04, 0x6e, 0x68, 0x61, 0x7f, 0xd7, 0xe2, 0xc9, 0x3d, 0xb4, + 0x0a, 0x2c, 0x6d, 0xb0, 0xd0, 0xce, 0xfe, 0x54, 0xb8, 0x96, 0xad, 0xfc, + 0x60, 0x87, 0x89, 0x41, 0xe9, 0x2d, 0x21, 0xc8, 0x3e, 0x1d, 0x5e, 0xc3, + 0x77, 0xfd, 0x62, 0x5f, 0xbb, 0xfb, 0xda, 0x10, 0xa7, 0x5a, 0x23, 0xaa, + 0xfc, 0x01, 0xb5, 0xdc, 0x73, 0x3d, 0x37, 0xc1, 0x45, 0x8f, 0x90, 0x3b, + 0x66, 0xfd, 0x2b, 0x95, 0x66, 0x9c, 0xc9 +}; +static unsigned int key_len = 91; +const struct bootutil_key bootutil_keys[] = { + [0] = { + .key = key, + .len = &key_len, + }, +}; +const int bootutil_key_cnt = 1; diff --git a/bootloader/mcuboot/testplan/mynewt/keys/pkg.yml b/bootloader/mcuboot/testplan/mynewt/keys/pkg.yml new file mode 100644 index 0000000..82d0e84 --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/keys/pkg.yml @@ -0,0 +1,9 @@ +pkg.name: keys +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" + +pkg.deps.BOOTUTIL_SIGN_RSA: + - keys/rsa + +pkg.deps.BOOTUTIL_SIGN_EC256: + - keys/ec256 diff --git a/bootloader/mcuboot/testplan/mynewt/keys/rsa/pkg.yml b/bootloader/mcuboot/testplan/mynewt/keys/rsa/pkg.yml new file mode 100644 index 0000000..eaadda1 --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/keys/rsa/pkg.yml @@ -0,0 +1,3 @@ +pkg.name: keys/rsa +pkg.author: "Apache Mynewt " +pkg.homepage: "http://mynewt.apache.org/" diff --git a/bootloader/mcuboot/testplan/mynewt/keys/rsa/src/keys.c b/bootloader/mcuboot/testplan/mynewt/keys/rsa/src/keys.c new file mode 100644 index 0000000..bc59322 --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/keys/rsa/src/keys.c @@ -0,0 +1,34 @@ +#include +static unsigned char key[] = { + 0x30, 0x82, 0x01, 0x0a, 0x02, 0x82, 0x01, 0x01, 0x00, 0xe2, 0x48, 0x5f, + 0x31, 0x08, 0x50, 0x2e, 0x4f, 0x6d, 0xbf, 0xcd, 0xd0, 0x09, 0xf1, 0x5c, + 0xd6, 0x08, 0xe9, 0x84, 0xcf, 0x75, 0x2c, 0x88, 0x07, 0xcc, 0x0e, 0xf9, + 0x53, 0xae, 0x4a, 0x9a, 0x93, 0xb4, 0x1b, 0x55, 0x43, 0xb7, 0x7e, 0x10, + 0xa8, 0x50, 0xd9, 0x14, 0x90, 0x05, 0x80, 0x15, 0xa0, 0x8c, 0xdb, 0xdc, + 0x1b, 0x03, 0x56, 0xd6, 0x47, 0x94, 0x44, 0xa1, 0xe8, 0x15, 0xf4, 0x77, + 0x49, 0x60, 0x45, 0x34, 0xa4, 0x17, 0x9a, 0x81, 0xa8, 0xfc, 0xb6, 0xd9, + 0x21, 0xf6, 0x68, 0xfa, 0x7a, 0x13, 0xe5, 0x25, 0xcd, 0xa5, 0x0b, 0x77, + 0x0a, 0x5f, 0xf6, 0x0b, 0x9d, 0x34, 0x8f, 0xc3, 0xf4, 0x91, 0xf7, 0xab, + 0x28, 0x12, 0x52, 0xdc, 0xbb, 0xb2, 0x92, 0x80, 0x98, 0xe2, 0x13, 0x33, + 0xe7, 0xc3, 0x2a, 0x1c, 0x27, 0x98, 0xfc, 0xff, 0x07, 0xdb, 0x5d, 0x16, + 0xd2, 0x50, 0xc1, 0x8e, 0x12, 0xfa, 0x95, 0x98, 0x51, 0x91, 0xbb, 0xf9, + 0xee, 0xc3, 0x65, 0xa4, 0x02, 0xe0, 0xbf, 0xb6, 0xb1, 0xc6, 0x20, 0xc7, + 0x9f, 0xfe, 0x63, 0x61, 0x6a, 0x68, 0xf6, 0x08, 0xca, 0x55, 0x32, 0xc0, + 0x50, 0xdd, 0x8d, 0x52, 0x73, 0x03, 0x7a, 0xbe, 0xd7, 0x32, 0xd9, 0x61, + 0x99, 0x19, 0xff, 0x0d, 0xe6, 0x82, 0xc8, 0x1c, 0x3d, 0x07, 0x1a, 0xe9, + 0xa8, 0x7b, 0xad, 0x75, 0x2c, 0x26, 0x87, 0x3d, 0x67, 0x2b, 0x5a, 0xc4, + 0x7f, 0x70, 0x86, 0x70, 0x8a, 0x7e, 0xed, 0xe9, 0x2f, 0xbe, 0x2a, 0xd5, + 0xb4, 0x33, 0x7b, 0xcc, 0x89, 0xcd, 0x57, 0x08, 0xbb, 0x72, 0xdf, 0x00, + 0x8e, 0xea, 0x8a, 0x2a, 0xa8, 0xa0, 0x1c, 0xb8, 0x8a, 0x61, 0xaf, 0x32, + 0x3d, 0x41, 0xe9, 0xf6, 0xb1, 0xa2, 0x73, 0xc2, 0xff, 0xd1, 0x32, 0x55, + 0x1f, 0xda, 0x09, 0x23, 0xc1, 0x83, 0x51, 0xe1, 0x4f, 0xd5, 0x65, 0x3e, + 0x97, 0x02, 0x03, 0x01, 0x00, 0x01 +}; +static unsigned int key_len = 270; +const struct bootutil_key bootutil_keys[] = { + [0] = { + .key = key, + .len = &key_len, + }, +}; +const int bootutil_key_cnt = 1; diff --git a/bootloader/mcuboot/testplan/mynewt/project.yml b/bootloader/mcuboot/testplan/mynewt/project.yml new file mode 100644 index 0000000..76c0e24 --- /dev/null +++ b/bootloader/mcuboot/testplan/mynewt/project.yml @@ -0,0 +1,36 @@ +# +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# + +project.name: "mcuboot-test" + +project.repositories: + - apache-mynewt-core + - mcuboot + +repository.apache-mynewt-core: + type: github + vers: 0-dev + user: apache + repo: mynewt-core + +repository.mcuboot: + type: github + vers: 0-dev + user: mcu-tools + repo: mcuboot diff --git a/bootloader/mcuboot/zephyr/module.yml b/bootloader/mcuboot/zephyr/module.yml new file mode 100644 index 0000000..9360dbf --- /dev/null +++ b/bootloader/mcuboot/zephyr/module.yml @@ -0,0 +1,6 @@ +samples: + - boot/zephyr +build: + cmake-ext: True + kconfig-ext: True + sysbuild-cmake: boot/zephyr/sysbuild diff --git a/docs/BLE.xlsx b/docs/BLE.xlsx new file mode 100644 index 0000000000000000000000000000000000000000..3a11617dc973784dc200b3f87a5c602fdb18a901 GIT binary patch literal 9852 zcmeHtg;!hK_H}Rz#i3|{0>xbmEmB+pr8q^36emD%cPLhzq6LZ*THLj`7N-y#in}|% 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z|0ccyDJ|mG075h>9@E5rGn0HjA7c@V$~*KbxE;MC%DpR_h48dsI$i6A(PAhY93Eqs9Gq45Ha{2~dZN*C^W+LyF#ZufQBZl1S@WOY7Wwz>`uFi4 z-W>sH{@uXeTiO2x{yP5Z-TkGpeH(bYz4s@yA1Tt@YWCd*|Gky)Clmn4#Q6>W|1=hE z+qo?#|7mFf@BjUY{}7jNTe+<){b_}o_#btq+Xilz^?w?er~GZ;&m#Xe^mZ}yClrCy zxsc1~e!DcfZQ*tu@TUb1y5AQ5Ru$Yv|2+f$i3I?*k?8-($G72s51@aAJ2LzQ{;zNf W(gY%X>pip install cryptography + - cbor package + >> pip install cbor + +The key generator is provided within the Nordic SDK/bootloader/mcuboot/scripts/imgtool.py +Run the following to generate key: + >>python /booloader/mcuboot/scripts/imgtool.py keygen -t ecdsa-p256 -k .pem + +NOTE: in application, sysbuild.conf needs to be updated to contain path of generated keys: + SB_CONFIG_BOOT_SIGNATURE_KEY_FILE="C:/cyber/scope/sw/keys/cyber_pk.pem" \ No newline at end of file diff --git a/keys/test_pk.pem b/keys/test_pk.pem new file mode 100644 index 0000000..8501c59 --- /dev/null +++ b/keys/test_pk.pem @@ -0,0 +1,5 @@ +-----BEGIN PRIVATE KEY----- +MIGHAgEAMBMGByqGSM49AgEGCCqGSM49AwEHBG0wawIBAQQgs5jc/9scXf5KxYgU +2enoeOqMZPaEEfmtuqvaIMxWyBmhRANCAAQnjE3ae+5AQTmT7o1y1sxECTqD4MRO +ukTHeDUcJD1C9qbXLK6phyMFGB57S9LMlBiYnpuVS57rElDcHgWmm76Q +-----END PRIVATE KEY----- diff --git a/prj.conf b/prj.conf new file mode 100644 index 0000000..be2b428 --- /dev/null +++ b/prj.conf @@ -0,0 +1,192 @@ +#--------------------------------------------------------------------------------------------------- +# BOOTLOADER +#--------------------------------------------------------------------------------------------------- +# Enable FOTA over BLE +CONFIG_NCS_SAMPLE_MCUMGR_BT_OTA_DFU=y +CONFIG_NCS_BOOT_BANNER=n +CONFIG_BOOT_BANNER=n + + +#--------------------------------------------------------------------------------------------------- +# MCU +#--------------------------------------------------------------------------------------------------- +# Stack size +# 2048 does not work for fs_init () when we have a lot of files. +CONFIG_MAIN_STACK_SIZE=16384 + +CONFIG_REBOOT=y +CONFIG_POWEROFF=y + + +# DEBUG CONFIGS +CONFIG_DBG_STATS=n +CONFIG_ASSERT=y +CONFIG_ASSERT_LEVEL=2 +# Memory/etc configs +CONFIG_DEBUG=n +CONFIG_DEBUG_OPTIMIZATIONS=n + + +#--------------------------------------------------------------------------------------------------- +# PRINTING AND LOGGING +#--------------------------------------------------------------------------------------------------- + +# For printing floating point +CONFIG_NEWLIB_LIBC=y +CONFIG_NEWLIB_LIBC_FLOAT_PRINTF=y +CONFIG_CBPRINTF_FP_SUPPORT=y + + +#--------------------------------------------------------------------------------------------------- +# PERIPHERALS +#--------------------------------------------------------------------------------------------------- +# RTC +CONFIG_RTC=y +CONFIG_COUNTER=y + +CONFIG_CLOCK_CONTROL_NRF=y + +# GPIO +CONFIG_GPIO=y + +# POWER MANAGEMENT +CONFIG_PM=y +CONFIG_PM_DEVICE=y +CONFIG_PM_DEVICE_RUNTIME=y + +# CRC (using our own in FS. Enabling for mcuboot) +CONFIG_CRC=y + +# ADC +CONFIG_ADC=y + +# SPI +CONFIG_SPI=y + +# I2C +CONFIG_I2C=y +CONFIG_I2C_TARGET=y +CONFIG_I2C_NRFX=y +#CONFIG_I2C_NRFX_TWIM=y +CONFIG_NRFX_TWIM1=y + +# UART +CONFIG_SERIAL=y +CONFIG_UART_ASYNC_API=y + +# PWM +CONFIG_PWM=y + +# Watchdog +CONFIG_WATCHDOG=y +CONFIG_WDT_DISABLE_AT_BOOT=y + +# Bluetooth +CONFIG_BT=y +CONFIG_BT_PERIPHERAL=y +CONFIG_BT_RX_STACK_SIZE=4096 +# Bonding / pairing +CONFIG_BT_SETTINGS=y +CONFIG_BT_DEVICE_NAME="Cyber Scope" +CONFIG_BT_DEVICE_NAME_DYNAMIC=y +CONFIG_BT_DEVICE_NAME_MAX=16 +CONFIG_BT_SMP=y +CONFIG_BT_BONDABLE=y +CONFIG_BT_MAX_PAIRED=5 +CONFIG_BT_KEYS_OVERWRITE_OLDEST=y +CONFIG_BT_FIXED_PASSKEY=n +CONFIG_BT_GATT_CACHING=n +CONFIG_BT_GATT_CLIENT=y +CONFIG_BT_L2CAP_TX_MTU=515 +CONFIG_BT_BUF_ACL_RX_SIZE=519 + +# Zephyr's BLE stack automatically persist service changed (SC) and client characteristic configuration (CCC). +# This means every subscription on the phone side will trigger a change, and therefore, a flash write. +# Use lazy loading (won't write unless actually accessed) and only write when bt_gatt_store_ccc () is called explicitly to prevent flash wear. +CONFIG_BT_SETTINGS_CCC_LAZY_LOADING=y +CONFIG_BT_SETTINGS_USE_PRINTK=n +CONFIG_BT_SETTINGS_CCC_STORE_ON_WRITE=n + + + +CONFIG_BT_SMP_APP_PAIRING_ACCEPT=y +CONFIG_BT_SMP_SC_ONLY=n +CONFIG_BT_SMP_OOB_LEGACY_PAIR_ONLY=n +CONFIG_BT_SMP_SC_PAIR_ONLY=n +CONFIG_BT_SMP_ENFORCE_MITM=n +CONFIG_BT_SMP_DISABLE_LEGACY_JW_PASSKEY=n +CONFIG_BT_CTLR_LE_ENC=y +CONFIG_BT_SMP_ALLOW_UNAUTH_OVERWRITE=y + +CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=4096 + +# Settings subsystem (required for bond storage) +CONFIG_SETTINGS=y +CONFIG_SETTINGS_CUSTOM=y + +# TODO: review. +# CONFIG_HW_STACK_PROTECTION=n + +# For use with ws2812 LEDs +CONFIG_LED_STRIP=y + +# Enable Timing ralated functions +CONFIG_TIMING_FUNCTIONS=y + +# Thread Analyze Options +# Enable the thread analyzer module +#CONFIG_THREAD_ANALYZER=y +# Allow the analyzer to print stats to the console/log output +#CONFIG_THREAD_ANALYZER_USE_PRINTK=y +#Run periodic thread analysis in a thread +#CONFIG_THREAD_ANALYZER_AUTO=y +#Thread analysis interval +#CONFIG_THREAD_ANALYZER_AUTO_INTERVAL=30 +# Give threads names for easier identification +#CONFIG_THREAD_NAME=y +# Also track stack space usage, which is very useful for debugging +#CONFIG_THREAD_STACK_INFO=y + + +#--------------------------------------------------------------------------------------------------- +# LITTLE FS +#--------------------------------------------------------------------------------------------------- +# CONFIG_SPI_NOR=y +# CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096 + +# CONFIG_FLASH=y +# CONFIG_FLASH_MAP=y + +# CONFIG_FILE_SYSTEM=y +# CONFIG_FILE_SYSTEM_LITTLEFS=y + + +#--------------------------------------------------------------------------------------------------- +# TODO : EXPLORE +#--------------------------------------------------------------------------------------------------- +##### PRINTING | LOGGING ##### +# Print configs +# CONFIG_PRINTK=n +# CONFIG_USE_SEGGER_RTT=y +# CONFIG_RTT_CONSOLE=n +# CONFIG_CONSOLE=y +# CONFIG_UART_CONSOLE=y +# Logging +# CONFIG_LOG=n +# CONFIG_LOG_MAX_LEVEL=4 +# CONFIG_LOG_BACKEND_RTT=y +# CONFIG_LOG_BUFFER_SIZE=1024 +# CONFIG_LOG_STRDUP_BUF_COUNT=128 + +# Clock Configs +# CONFIG_CLOCK_CONTROL=y +# CONFIG_CLOCK_CONTROL_NRF=y +# CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y +# CONFIG_NRF_RTC_TIMER=y + +# # Power +# CONFIG_SYS_POWER_MANAGEMENT=y +# CONFIG_DEVICE_POWER_MANAGEMENT=y +# CONFIG_DEVICE_IDLE_PM=y +# CONFIG_BOARD_ENABLE_DCDC=y + diff --git a/releases/20251216_v1_0_0.zip b/releases/20251216_v1_0_0.zip new file mode 100644 index 0000000000000000000000000000000000000000..31d6a74ed30884c0a7360cc3e953d5ed83509214 GIT binary patch literal 354619 zcmeFZ3v|;}_CI>Qk38CjHf;ez%Ohz3O9Pq~R0KxSqzUS<7&OZC>v-dvx?34L0&qLD-Xkyj2f9X}xK6 z@gt8t^x#d)iXZ#M2OT@3usk94MT%(hr(co(|MUN83Xt)f{-t)Fy!0JUs_^^M=cjzY z(ob{_ma}yBwRH1Up1fld3H$v|&zhfKRo5PVsDjQ&#oncGdMh*Y#{~?$y_N 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Define use cases +2. Define modes +3. Define behaviors +4. Define IMU motion sensitivities and hysterisis +4. Generate requirements +5. Code +6. Test +7. Maintain user interface, especially three button interface, so we don't piss off customers who learn one way to have the rug pulled out from under them because another customer made a persausive argument to make a change. + A. Also reduces the number of demo videos we would have to make. + B. Also reduces support calls. (We want to scale, cannot clone Kenny, and even if we could) +8. Limit changes to three button interface to absolute minimum. + +## Possible 3-button UI changes +1. Keep left to right 3 button motion for pairing/enabling bluetooth. +2. Implement right to left 3 button motion to disable bluetooth (without losing pairing keys) +3. Add mode change to the middle button hold-to-config. + A. Make the mode change the first option for quick change. + B. Display rainbow or TBD in 1/4 ring increments for different modes + i. 1/4 - Treestand Hunting (Default) + ii. 1/2 - Still Hunting ; May be too complicated, doesn't cover future bright ideas. + iii. 3/4 - 3D / Field ; May be too complicated, doesn't cover future bright ideas. + iv. Full - Target ; May be too complicated, doesn't cover future bright ideas. + +Recommend only revert to default without app. See Goal 7. The three button interface is already to complex for most people, who will use application anyway. + +## Possible Cyber Shot UI changes +1. Allow users to setup their own scenerios. + A. Scenerios can be named and saved for loading up settings the user previously liked. +2. We can provide templates (e.g., Vegas, Still Hunting) as starting points that can be modified and renamed. +3. Configurable options include: + A. How to turn on + B. If, how, and when to disable illumination. (e.g., 1 shot, N shots, timer, motion, combination thereof) + C. If, how, and when to enable bluetooth. (e.g., 1 shot, N shots, timer, motion, combination thereof) + D. If, how, and when to transfer shots. (E.g., automatically after 1 shot, automatically after N shots, only when requested) + E. How to enter lowest power mode (button, timeout, lack of motion, etc.) + + +# Illumination (On/off) settings +## Auto illumination setting + 1. Button + 2. IMU based setting AI_IMU_MOV0 +## Auto deillumination setting + 1. Button based + 2. IMU based setting ADI_IMU_STILL0 + 3. IMU based shot detected ADI_IMU_SD0 + 4. Timer based setting ADI_TIMER0 + +# Bluetooth settings +## Bluetooth pairing + 1. LCR roll +## Auto Bluetooth enable + 1. Auto bluetooth was previously enabled and illumination just enabled + 2. IMU based shot detected AI_IMU_BT0 +## Auto Bluetooth shot transfer +## Manual Bluetooth shot transfer +## Auto Bluetooth disable +## Manual bluetooth disable + 1. RCL roll + + +## Use cases + +Goals: Preserve battery life without annoying the archer. Archer may actively be using bluetooth at times and may want to connect/autoconnect (assumes previously paired). Archer may want to have the radio disabled to preserve battery life in other situations. + +### Stand Hunting +Auto illumination on and auto illumination off presents technical challanges while stand hunting. + + Typically Pick Bow from bow hanger, less frequently hunter is holding bow. Many hunters will want auto +illumination, while others may want push button. + For auto illumination, if the hunter is holding the bow for long periods, the scope may stay illuminated for long + periods without any benefit, draining battery, due to motion sensitivity setting to tigger illumuination off. +. + However, requiring a button push to illuminate while stand hunting may be annoying to some, and if possible we should endeavor to use + motion hysterisys or some other motion based solution. + + Illumination Time The archer may draw back for extended periods waiting for the best, most ethical kill shot. If possible + detecting bow draw and staying illuminated until release would be goood, to avoid time based trigger to turn + Illumination off. + Shots Typicallly 1 + Enable: Cyber Shot app only, Disable: TBD. + 3D / Field Enable: Cyber Shot app only, Disable: TBD. + Target Enable: Cyber Shot app only, Disable: TBD. + +- Archer is elevated and stationary, often in saddle or tree stand. Bow is often on a bow hanger. Wind may rock bow. Archer may hold bow for extended times, and may hold the bow drawn for extended times. Archer may take follow up shot if opportunity or exigencies require. + +### Still Hunting +- Archer spot-and-stalk / ground hunting. Archer and bow is mobile. Archer may hold bow for extended times, and may hold the bow drawn for extended times. Archer may take follow up shot if opportunity or exigencies require. Phone with app most often stays with archer, needs to auto reconnect with cyber scope, if archer is using shot data with scoring. Archer may select to only enable bluetooth after shot, waiting for game to bleed out. + +### Target + +#### NFAA Indoor round + +Bows stay behind line during arrow retrieval, archers walk downrange to score and retrieve. Phone with app most often stays with archer who may be using it to log scores. The phone app needs to automatically reconnect with cyber scope if archer is using shot data with scoring. + +Note: Possible conflict. + 4.3 The method of breaking ties will be at the discretion of the tournament director. + 5.2 X-rings shall be counted and used as tie breakers and will be considered part of the official score. + +Kenny says: In the event of tie, and Xs are also tied, in practice the tournament director can do 1 arrow shoot off closest to center, or 20 arrow most "inside out" (arrow is inside the X without touching circle) Xs. + + +##### One Spot Indoor round +-One spot indoor round, NFAA Indoor (300): standard unit is 60 arrows. end of 5 arrows, 4 ends per game, 3 games per round, max score of 300. Possible some events may not use Xs as tiebreaker. + +##### Five spot Indoor round +-Five spot indoor round, NFAA Indoor (300): standard unit is 60 arrows. end of 5 arrows, 4 ends per game, 3 games per round, max score of 300. Possible some events may not use Xs as tiebreaker. + +#### Vegas Round + +-Vegas round, NFAA Indoor (900): standard unit of 30 arrows. end of 3 arrows, 5 ends per game. 3 games per round, max score of 900. Bullseye 10 points, X is a tie breaker. 3 targets/spots on sheet, archer can use any or all. + +-NFAA Outdoor Target: end of 5 arrows. 4 minutes per end. Classic 600 + 900 Round shot across two days. + +-NFAA Outdoor Field: Field, Hunter, and Animal Rounds across three days. Each round typically 28 targets, 4 arrows per target (112 arrows per round). Walk-through course--archers carry bows to target to score and pull arrows, then to next station. Some hang bow on rack at target while pulling arrows, but bow is carried the whole course. Phone with app most often stays with archer, needs to auto reconnect with cyber scope, if archer is using shot data with scoring. + +References: + -https://nfaausa.com/files/nfaa-round-basics-160223233655.pdf + + -https://nfaausa.com/about/constitution/official-nfaa-rounds + +### 3D +-ASA: 1 arrow per shooter per target, shot from designated stake. Pro/Am: two rounds of 20 targets (40 arrows total, one or two days). Federation qualifiers: minimum one round of 20 targets in one day. No strict per-arrow time limit--pacing is group-based. + +-IBO: 40 targets, walk-through course, 1 arrow per target, max score 440. World Championship: two 20-target courses over two days. No per-shot time limit--group pacing applies. + +-Regional Park Walk-Through: (rules typically require bow left on hanger when retrieving arrows, with some exceptions) + +### Indoor practice +- Arrows are shot. Bow stays behind line during arrow retrieval, archers walk downrange to retrieve arrows. Phone with app most often stays with archer, needs to auto reconnect with cyber scope, if archer is using shot data with or without scoring. + +### Outdoor practice +- Field + One or more arrows are shot at each target. Bow is hung at the shooting zone, archers walk to target to retrieve arrows. Phone with app most often stays with archer, needs to auto reconnect with cyber scope, if archer is using shot data with or without scoring. + +- Target + Arrows are shot. Bow stays behind line during arrow retrieval, archers walk downrange to retrieve arrows. Phone with app most often stays with archer, needs to auto reconnect with cyber scope, if archer is using shot data with or without scoring. + +### 3D practice +- Arrows are shot. Bow stays behind line during arrow retrieval, archers walk downrange to retrieve arrows. Phone with app most often stays with archer, needs to auto reconnect with cyber scope, if archer is using shot data with or without scoring. + +### Future +- Future competition rules may come out requiring future updates. A way to avoid this is to allow the user to define his own scenerio as discussed in "Possible Cyber Shot UI changes" above. + +### Excluded +-USA Archery / World Archery: No electronics of any kind on bow. Cyber Scope not permitted. + + diff --git a/requirements/tbd.md b/requirements/tbd.md new file mode 100644 index 0000000..ca24a68 --- /dev/null +++ b/requirements/tbd.md @@ -0,0 +1,94 @@ +# Move this to docx + +# Cyber Scope--Mode Use Cases (Draft) + +## Power States (Working Definitions) + +The following states are tenatively defined. However, each scenerio may have different settings for a state. This is just preliminary, need to work out the logic. + +|---------|-----------------------------------------------------------------------------------------------------| +| State | Description | +|---------|-----------------------------------------------------------------------------------------------------| +| Off | Lowest sleep mode. Wake only on center button press. | +| Sleep | Lowest MCU sleep mode, IMU wakes on acceleration threshold met. | +| Idle | MCU low-power, IMU sampling. No illumination. Bluetooth active. | +| Active | Full illumination per user config. IMU active. | +|---------|-----------------------------------------------------------------------------------------------------| + +--- + +|---------------|---------------------------------------------------------------| +| Mode | How to Enable/Disable | +|---------------|---------------------------------------------------------------| +| Stand Hunting | Default. Selectable via 3-button interface or Cyber Shot app. | +| Still Hunting | Enable: Cyber Shot app only, Disable: TBD. | +| 3D / Field | Enable: Cyber Shot app only, Disable: TBD. | +| Target | Enable: Cyber Shot app only, Disable: TBD. | +|---------------|---------------------------------------------------------------| + +- Mode is sticky--survives power cycles until changed. +- Return to Stand Hunting is always possible via 3-button interface (no app required). +- Entry into Still, 3D, or Target requires Cyber Shot app to keep 3-button interface manageable. + +--- + +## Mode 1: Stand Hunting (Default Mode) + +- Bow on hanger for long periods, occasionally picked up. +- On draw, archer may hold at full draw 5+ minutes waiting for shot opportunity. +- Wake: IMU motion above threshold (deliberate pickup, not wind/vibration). +- Stay Active: Sleep threshold lower than wake threshold--scope stays lit through extended stillness at full draw. +- Active → Sleep: Return to stillness below sleep threshold for duration 10 seconds. +- Off → Off: Center button full power-off; center button power-on shows battery on alignment ring. +- Post-shot: Archer may review shot data on phone via Cyber Shot app. May happen minutes to hours later. + +--- + +## Mode 2: Still Hunting + +- Archer stalking with bow in hand all day. Constant motion. +- IMU wake would drain battery--motion is continuous. +- Wake: Center button only. +- Active: Illumination stays on until manually turned off. No auto-off on shot detection--archer may need follow-up shot. +- Off: Center button only. No timeout, no IMU-based sleep. +- Post-shot: No change in state. Illumination remains on. +- Shot data review: Archer may review shot data on phone via Cyber Shot app. May happen minutes to hours later. + +--- + +## Mode 3: 3D + +- Archer walks course, carries bow between stations. +- At station, archer presses center button → Active (no battery display, immediate illumination). +- Archer shoots. IMU detects shot → illumination off immediately. +- Archer carries bow to target, retrieves arrows, walks to next station. Scope stays non-illuminated despite motion. +- Wake: Center button only. IMU motion does NOT trigger illumination. +- Post-shot: Illumination off immediately. Scope enters Off or Idle. +- Timeout: 2 minutes, may add as fallback if archer forgets to shoot / walks off. +- Shot data review: Archer may review shot data and enter score per shot in Cyber Shot app. Typically 1 shot per station. + +--- + +## Mode 4: Target + +- Bow on stand or hanger between ends/practice groups. May swing due to stabilizers. +- Archer picks up bow and IMU wakes MCU → Active. +- Shoots multiple arrows per end. Timer resets on each shot detected. +- When done, archer hangs bow or sets on stand. +- Wake: IMU motion above threshold (must distinguish deliberate pickup from stabilizer oscillation on hanger). +- Stay Active: Timeout resets on each shot detected and on each pickup event. +- Active → Sleep: Timeout expires with no shot/pickup. +- Known issue: Target bows with stabilizers oscillate on hangers, preventing motion-based idle. Mitigation: archer presses center button or settles bow. Firmware does not attempt to distinguish oscillation from pickup. +- Bluetooth: TBD--may use Standby for shot data transfer after end. +- Shot data review: Archer may review shot data and enter score per shot in Cyber Shot app. Typically 5 shots per end. Shot data correlated with score for replay. + +--- + +## Open Questions + +1. Standby vs Idle distinction: depends on whether Bluetooth is needed post-shot (3D, Target). Deferred to per-mode state definitions. +2. All timeout durations TBD. +3. Stand Hunting asymmetric wake/sleep thresholds--values TBD. +4. Battery display: shown on full power-on (Stand Hunting). Suppressed on center-button quick wake (3D). Target TBD. +5. 3D center button behavior: first press → Active, second press → Off (full power-on with battery display on next press). Post-shot state TBD (Idle vs Off, depends on Bluetooth/shot data transfer needs). +6. Per-mode state definitions (STAND_S0, STILL_S0, 3D_S0, TARGET_S0, etc.)--deferred until use cases complete. diff --git a/src/app/app.c b/src/app/app.c new file mode 100644 index 0000000..397dfce --- /dev/null +++ b/src/app/app.c @@ -0,0 +1,537 @@ +/** + * @file app.c + * @brief Application module + * @author Kenny Tran + * @date May 05 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include + +#include "../lib/errno.h" +#include "../lib/print.h" +#include "../lib/fs.h" + +#include "../bsp/als.h" +#include "../bsp/battery.h" +#include "../bsp/button.h" +#include "../bsp/imu.h" +#include "../bsp/led_ring.h" +#include "../bsp/led.h" +#include "../bsp/mcu.h" +#include "../bsp/nvm_ext.h" +#include "../bsp/power.h" +#include "../bsp/rtc.h" +#include "../bsp/wdt.h" + +#include "app_cli.h" +#include "ble.h" +#include "bubble.h" +#include "fiber.h" +#include "fsm.h" +#include "event.h" +#include "light_sensor.h" +#include "motion.h" +#include "pin.h" +#include "scope_ring.h" +#include "shot_storage.h" +#include "shot_capture.h" + +#include "app.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS, STRUCTURES & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static FS_file_t _app_file; +static APP_info_s _app_info = (APP_info_s) { + .main_pcb_version = { 1, 0, 0 }, + .ring_pcb_version = { 1, 0, 0 }, + .version = { APP_MAJOR, APP_MINOR, APP_BUILD }, + .mfg_id = 888000000, + .mfg_date = 20251215, + .pn = APP_PN, + .sn = APP_SN, + .power_cnt = 0, + .cli_enabled = (uint8_t) true, + .imu_temp_offset = 25 +}; + + +/*------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *-----------------------------------------------------------------------------------------------*/ +static void _app_init (void); +static void _app_cmd_register (void); +static void _app_cli_cmd (int32_t argc, char **argv); +static void _app_info_read (void); +static void _app_info_write (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void APP_init (void) +{ + volatile uint32_t irq_key = irq_lock (); + + /* BSP */ + (void) MCU_init (); + + /* Initialize filesystem for file IO. */ + (void) FS_init (); + + /* Initialize and start watchdog. */ + (void) WDT_init (); + + /* Fetch application info stored. */ + _app_info_read (); + /* Update power count. */ + _app_info.power_cnt++; + /* Write updates to flash. */ + _app_info_write (); + + /* Initialize app modules. */ + _app_init (); + + /* Register app command. */ + if (_app_info.cli_enabled) + { + _app_cmd_register (); + } + + (void) irq_unlock (irq_key); +} + +void APP_start (void) +{ + /* Install application tasks */ + if (_app_info.cli_enabled) + { + APP_CLI_task_install (); + } + + EVENT_task_install (); + MOTION_task_install (); + SCOPE_RING_task_install (); + FSM_task_install (); + + /* README: Not used in initial release. */ + SHOT_CAPTURE_task_install(); + SHOT_STORAGE_task_install(); + + /* Install BSP tasks */ + IMU_task_install (); + IMU_interrupt_handler_task_install (); +} + +void APP_reset (void) +{ + MCU_reset (true); +} + +void APP_cli_enable (bool en) +{ + _app_info.cli_enabled = (uint8_t) en; + + /* Write updates to flash. */ + _app_info_write (); + + if (MCU_reset (true) != ERRNO_SUCCESS) + { + PRINT (INFO, "Failure to reset.\r\n"); + } +} + +void APP_factory_reset (void) +{ + /* Get current application info to preserve after erasing flash. */ + APP_info_s info = APP_info_get (); + /* Get motion calibration info. */ + MOTION_config_s *p_motion_cfg = MOTION_config_get (); + + PRINT (INFO, "Performing factory reset...\r\n"); + + /* Erase entire flash. */ + if (NVM_EXT_erase_all () != ERRNO_SUCCESS) + { + PRINT (INFO, "Failure to erase flash.\r\n"); + } + + /* Restore application info that should be preserved. */ + _app_info = info; + + /* Update app version. */ + _app_info.version.major = APP_MAJOR; + _app_info.version.minor = APP_MINOR; + _app_info.version.build = APP_BUILD; + /* Clear power count. */ + _app_info.power_cnt = 0; + + /* With flash erased, calling _app_info_read should find no file and write a new file + with current info structure. */ + _app_info_read (); + + /* Set back calibration info so we don't lose it. */ + MOTION_config_set (*p_motion_cfg); + + if (MCU_reset (true) != ERRNO_SUCCESS) + { + PRINT (INFO, "Failure to reset.\r\n"); + } +} + +void APP_temp_calibrate (float current_temp) +{ + float temp = 0.0; + + if (IMU_temp_c_read (&temp) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to read IMU temp sensor.\r\n"); + return; + } + + /* Update offset and save to flash. */ + _app_info.imu_temp_offset = (current_temp - temp); + + _app_info_write (); +} + +float APP_temp_c_get (void) +{ + float temp = 0.0; + + if (IMU_temp_c_read (&temp)) + { + PRINT (ERROR, "Failure to read IMU temp sensor.\r\n"); + } + + return (temp + _app_info.imu_temp_offset); +} + +APP_info_s APP_info_get (void) +{ + return _app_info; +} + + +/*------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *-----------------------------------------------------------------------------------------------*/ +static void _app_init (void) +{ + /* Application */ + if (_app_info.cli_enabled) + { + APP_CLI_init (); + } + else + { + /* Disable PRINT. */ + PRINT_level_set (DISABLED); + } + + BLE_init (); + BUBBLE_init (); + FIBER_init (); + FSM_init (); + EVENT_init (); + LIGHT_SENSOR_init (); + MOTION_init (); + PIN_init (); + SCOPE_RING_init (); + + /* README: Not used in initial release. */ + SHOT_STORAGE_init(); + SHOT_CAPTURE_init(); +} + +static void _app_cmd_register (void) +{ + /* APP */ + CLI_cmd_register (CLI_CMD_APP, (char *) "app", _app_cli_cmd); + CLI_cmd_register (CLI_CMD_APP, (char *) "ble", BLE_cli_cmd); + CLI_cmd_register (CLI_CMD_APP, (char *) "bubble", BUBBLE_cli_cmd); + CLI_cmd_register (CLI_CMD_APP, (char *) "fiber", FIBER_cli_cmd); + CLI_cmd_register (CLI_CMD_APP, (char *) "fsm", FSM_cli_cmd); + CLI_cmd_register (CLI_CMD_APP, (char *) "event", EVENT_cli_cmd); + CLI_cmd_register (CLI_CMD_APP, (char *) "light_sensor", LIGHT_SENSOR_cli_cmd); + CLI_cmd_register (CLI_CMD_APP, (char *) "motion", MOTION_cli_cmd); + CLI_cmd_register (CLI_CMD_APP, (char *) "pin", PIN_cli_cmd); + CLI_cmd_register (CLI_CMD_APP, (char *) "scope_ring", SCOPE_RING_cli_cmd); + /* README: Not used in initial release. */ + CLI_cmd_register (CLI_CMD_APP, (char *) "ss", SHOT_STORAGE_cli_cmd); + CLI_cmd_register (CLI_CMD_APP, (char *) "sc", SHOT_CAPTURE_cli_cmd); + + /* BSP */ + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "als", ALS_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "battery", BATTERY_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "button", BUTTON_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "imu", IMU_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "led_ring", LED_RING_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "led", LED_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "mcu", MCU_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "nvm", NVM_EXT_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "power", POWER_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "rtc", RTC_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "wdt", WDT_cli_cmd); + + /* LIB */ + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "errno", ERRNO_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "fs", FS_cli_cmd); + CLI_cmd_register (CLI_CMD_DEBUG, (char *) "print", PRINT_cli_cmd); +} + +static void _app_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + PRINT (INFO, "APP\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "Main PCB Version : %d.%d.%d\r\n", _app_info.main_pcb_version.major, + _app_info.main_pcb_version.minor, + _app_info.main_pcb_version.build); + PRINT (INFO, "Ring PCB Version : %d.%d.%d\r\n", _app_info.ring_pcb_version.major, + _app_info.ring_pcb_version.minor, + _app_info.ring_pcb_version.build); + PRINT (INFO, "Build Version : %d.%d.%d\r\n", _app_info.version.major, + _app_info.version.minor, + _app_info.version.build); + PRINT (INFO, "Build DTS : %s %s\r\n", APP_BUILD_DATE, APP_BUILD_TIME); + PRINT (INFO, "Part Number : %s\r\n", _app_info.pn); + PRINT (INFO, "Serial Number : %s\r\n", _app_info.sn); + PRINT (INFO, "MFG ID : %d\r\n", _app_info.mfg_id); + PRINT (INFO, "MFG Date : %d\r\n", _app_info.mfg_date); + PRINT (INFO, "Power On Count : %d\r\n", _app_info.power_cnt); + } + else if (argc == 2) + { + if (!strcmp (argv[0], "-cli")) + { + if (!strcmp (argv[1], "true")) + { + APP_cli_enable (true); + } + else if (!strcmp (argv[1], "false")) + { + APP_cli_enable (false); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-mfgid")) + { + _app_info.mfg_id = strtoul (argv[1], NULL, 0); + + /* Write changes to flash. */ + _app_info_write (); + } + else if (!strcmp (argv[0], "-mfgdate")) + { + _app_info.mfg_date = strtoul (argv[1], NULL, 0); + + /* Write changes to flash. */ + _app_info_write (); + } + else if (!strcmp (argv[0], "-pn")) + { + uint8_t len = strlen(argv[1]); + + /* -1 for null termination. */ + if (len > (sizeof (_app_info.pn)-1)) + { + PRINT (INFO, "Max length of %d characters!\r\n", (sizeof (_app_info.pn)-1)); + return; + } + + memset (_app_info.pn, 0, sizeof (_app_info.pn)); + memcpy (_app_info.pn, argv[1], len); + + /* Write changes to flash. */ + _app_info_write (); + } + else if (!strcmp (argv[0], "-sn")) + { + char sn[sizeof (_app_info.sn)]; + uint8_t len = strlen(argv[1]); + + /* -4 for null termination and "CS_" prefix for BLE. */ + if (len > (sizeof (_app_info.sn)-4)) + { + PRINT (INFO, "Max length of %d characters!\r\n", (sizeof (_app_info.pn)-4)); + return; + } + + memset (_app_info.sn, 0, sizeof (_app_info.sn)); + memcpy (_app_info.sn, argv[1], len); + + /* Write changes to flash. */ + _app_info_write (); + + /* Setup initial advertising name to prefix + sn. */ + strcpy (sn, BLE_DEVICE_NAME_PREFIX); + strcat (sn, _app_info.sn); + + BLE_adv_name_set (sn); + } + else if (!strcmp (argv[0], "-tc")) + { + float offset = strtof (argv[1], NULL); + + APP_temp_calibrate (offset); + } + else + { + goto USAGE; + } + } + else if (argc == 4) + { + if (!strcmp (argv[0], "-mpcb")) + { + _app_info.main_pcb_version.major = (uint8_t) strtoul (argv[1], NULL, 0); + _app_info.main_pcb_version.minor = (uint8_t) strtoul (argv[2], NULL, 0); + _app_info.main_pcb_version.build = (uint8_t) strtoul (argv[3], NULL, 0); + + /* Write changes to flash. */ + _app_info_write (); + } + else if (!strcmp (argv[0], "-rpcb")) + { + _app_info.ring_pcb_version.major = (uint8_t) strtoul (argv[1], NULL, 0); + _app_info.ring_pcb_version.minor = (uint8_t) strtoul (argv[2], NULL, 0); + _app_info.ring_pcb_version.build = (uint8_t) strtoul (argv[3], NULL, 0); + + /* Write changes to flash. */ + _app_info_write (); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: app [OPTION...]\r\n"); + PRINT (INFO, " -cli Enables or disables command line.\r\n"); + PRINT (INFO, " <%%b> true to enable, false to disable.\r\n"); + PRINT (INFO, " -mpcb Sets the main pcb version.\r\n"); + PRINT (INFO, " <%%d> Major\r\n"); + PRINT (INFO, " <%%d> Minor\r\n"); + PRINT (INFO, " <%%d> Build\r\n"); + PRINT (INFO, " -rpcb Sets the ring pcb version.\r\n"); + PRINT (INFO, " <%%d> Major\r\n"); + PRINT (INFO, " <%%d> Minor\r\n"); + PRINT (INFO, " <%%d> Build\r\n"); + PRINT (INFO, " -mfgid Sets the manufacturing ID.\r\n"); + PRINT (INFO, " <%%d> Manufacturing ID\r\n"); + PRINT (INFO, " -mfgdate Sets the manufacturing date.\r\n"); + PRINT (INFO, " <%%d> Format YYYYMMDD\r\n"); + PRINT (INFO, " -pn Sets the part number.\r\n"); + PRINT (INFO, " <%%s> Part number (max of 15 chars)\r\n"); + PRINT (INFO, " -sn Sets the part number.\r\n"); + PRINT (INFO, " <%%s> Part number (max of 12 chars)\r\n"); + PRINT (INFO, " -tc Calibrates temperature sensor offset\r\n"); + PRINT (INFO, " <%%f> current temperature\r\n"); + } +} + +static void _app_info_read (void) +{ + ERRNO_e err; + APP_info_s info; + + err = FS_open_or_create (APP_FILENAME, &_app_file, sizeof (APP_info_s), (FS_FILE_DEPTH_DEFAULT * 8)); + if (err == ERRNO_SUCCESS) + { + /* Read file. */ + err = FS_read (_app_file, (uint8_t *) &info, 0, sizeof (APP_info_s)); + + /* Check file entry is valid. */ + if (err != ERRNO_SUCCESS) + { + /* Write defaults to file. */ + _app_info_write (); + return; + } + + /* Validate read file. */ + if (info.power_cnt > 1000000) + { + /* Write defaults to file. */ + _app_info_write (); + return; + } + + /* Update app info to what was read from flash and validated. */ + _app_info = info; + + /* Update app version if, current is newer. */ + _app_info.version.major = APP_MAJOR; + _app_info.version.minor = APP_MINOR; + _app_info.version.build = APP_BUILD; + } + else if (err == ERRNO_SIZE_MISMATCH) + { + /* App info has been modified, need to delete old file and write new info. */ + err = FS_delete (APP_FILENAME); + + if (err != ERRNO_SUCCESS) + { + /* Something else is going on... */ + PRINT (ERROR, "Failure to delete old app file.\r\n"); + return; + } + + /* Create new file. */ + err = FS_open_or_create (MOTION_FILENAME, &_app_file, sizeof (APP_info_s), FS_FILE_DEPTH_DEFAULT); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to create app file.\r\n"); + } + else + { + PRINT (INFO, "New app file created successfully\r\n"); + } + + /* Write default info to file. */ + _app_info_write (); + } + else + { + /* Write defaults to file. */ + _app_info_write (); + } +} + +static void _app_info_write (void) +{ + if (FS_write (_app_file, (uint8_t *) &_app_info) != ERRNO_SUCCESS) + { + PRINT (INFO, "Failed to write app info to file.\r\n"); + } +} diff --git a/src/app/app.h b/src/app/app.h new file mode 100644 index 0000000..409d765 --- /dev/null +++ b/src/app/app.h @@ -0,0 +1,93 @@ +/** + * @file app.h + * @brief Application module + * @author Kenny Tran + * @date May 05 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef APP_H_ +#define APP_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define APP_MAJOR (1) +#define APP_MINOR (3) +#define APP_BUILD (2) +#define APP_BUILD_DATE (__DATE__) +#define APP_BUILD_TIME (__TIME__) +#define APP_PN ("CYBERSCOPE-000") +#define APP_SN ("251215-XXX") + +#define APP_FILENAME ("app") + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct APP_version +{ + uint8_t major : 8; + uint8_t minor : 8; + uint8_t build : 8; +} __attribute__((packed, aligned(1))) APP_version_s; + +typedef struct APP_info +{ + APP_version_s main_pcb_version; + APP_version_s ring_pcb_version; + APP_version_s version; + uint32_t mfg_id; + uint32_t mfg_date; /* Format YYYYMMDD */ + char pn[16]; + char sn[16]; + uint32_t power_cnt; + uint8_t cli_enabled; + float imu_temp_offset; +} __attribute__((packed, aligned(1))) APP_info_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void APP_init (void); + +void APP_start (void); + +void APP_reset (void); + +void APP_cli_enable (bool en); + +void APP_factory_reset (void); + +void APP_temp_calibrate (float current_temp); + +float APP_temp_c_get (void); + +APP_info_s APP_info_get (void); + + +#endif /* APP_H_ */ diff --git a/src/app/app_cli.c b/src/app/app_cli.c new file mode 100644 index 0000000..618b1c2 --- /dev/null +++ b/src/app/app_cli.c @@ -0,0 +1,109 @@ +/** + * @file cli.c + * @brief Command line interface + * @author Kenny Tran + * @date Apr 25 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include + +#include "../lib/errno.h" +#include "../lib/print.h" +#include "../lib/cli.h" + +#include "app_cli.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * THREAD DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +K_THREAD_STACK_DEFINE(_app_cli_stack, APP_CLI_STACK_SIZE); + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static struct k_thread _app_cli_thread; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _app_cli_task (void *p1, void *p2, void *p3); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void APP_CLI_init (void) +{ + PRINT (INFO, "Initializing APP_CLI...\r\n"); + + /* Initialize CLI. */ + if (CLI_init () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize CLI\r\n"); + + } +} + +void APP_CLI_task_suspend (void) +{ + k_thread_suspend (&_app_cli_thread); +} + +void APP_CLI_task_resume (void) +{ + k_thread_resume (&_app_cli_thread); +} + +void APP_CLI_task_install (void) +{ + static k_tid_t id; + + id = k_thread_create (&_app_cli_thread, + _app_cli_stack, + APP_CLI_STACK_SIZE, + _app_cli_task, + NULL, + NULL, + NULL, + APP_CLI_THREAD_PRIORITY, + 0, + K_NO_WAIT); + k_thread_name_set(&_app_cli_thread, "APP_CLI_task"); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _app_cli_task (void *p1, void *p2, void *p3) +{ + while (1) + { + CLI_task (); + + k_msleep (APP_CLI_TASK_PERIOD_MS); + } +} diff --git a/src/app/app_cli.h b/src/app/app_cli.h new file mode 100644 index 0000000..dd6d295 --- /dev/null +++ b/src/app/app_cli.h @@ -0,0 +1,50 @@ +/** + * @file cli.h + * @brief Command line interface + * @author Kenny Tran + * @date Apr 25 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef APP_CLI_H_ +#define APP_CLI_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include "../lib/cli.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define APP_CLI_TASK_PERIOD_MS (CLI_TASK_PERIOD_MS) +#define APP_CLI_STACK_SIZE (2048) +#define APP_CLI_THREAD_PRIORITY (5) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void APP_CLI_init (void); + +void APP_CLI_task_suspend (void); + +void APP_CLI_task_resume (void); + +void APP_CLI_task_install (void); + +void APP_CLI_cmd (int32_t argc, char **argv); + + +#endif /* APP_CLI_H_ */ diff --git a/src/app/ble.c b/src/app/ble.c new file mode 100644 index 0000000..11d9345 --- /dev/null +++ b/src/app/ble.c @@ -0,0 +1,2265 @@ +/** + * @file ble.c + * @brief BLE module + * @author Kenny Tran + * @date Jul 06 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../lib/errno.h" +#include "../lib/fs.h" +#include "../lib/print.h" +#include "../lib/rgb.h" + +#include "../bsp/als.h" +#include "../bsp/rtc.h" +#include "../bsp/wdt.h" + +#include "app.h" +#include "bubble.h" +#include "fiber.h" +#include "fsm.h" +#include "motion.h" +#include "pin.h" +#include "scope_ring.h" +#include "shot_capture.h" +#include "shot_storage.h" +#include "uuid.h" + +#include "ble.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define _BLE_DEVICE_NAME_LEN (sizeof(BLE_DEVICE_NAME) - 1) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS, STRUCTURES & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct bt_conn_cb _ble_conn_s; +typedef struct bt_data _ble_data_s; +typedef struct bt_conn_auth_cb _ble_conn_auth_s; +typedef struct bt_conn_auth_info_cb _ble_conn_auth_info_s; +typedef struct bt_gatt_exchange_params _ble_mtu_exchange_params_s; +typedef struct bt_gatt_cb _ble_gatt_cb_s; +typedef struct k_work_delayable _ble_delayed_work_s; +typedef struct _ble_char +{ + uint32_t uuid[4]; /* 128-bit */ + bool notify; + struct bt_gatt_attr *p_notify_service; + BLE_read_cb_t read_cb; + BLE_write_cb_t write_cb; + BLE_ccc_cb_t ccc_cb; +} _ble_char_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +/* BLE core */ +static FS_file_t _ble_settings_file = NULL; +static FS_file_t _ble_config_file = NULL; +static bool _ble_fs_ready = false; +static atomic_t _ble_settings_loading = ATOMIC_INIT(0); +static bool _ble_enabled = false; +static bool _ble_connected = false; +static struct bt_conn *_ble_current_conn = NULL; +static BLE_settings_s _ble_settings = { 0 }; +static BLE_config_s _ble_config = (BLE_config_s) { + .adv_name = BLE_DEVICE_NAME_PREFIX, + .enabled = false, +}; +static _ble_conn_s _ble_conn_cbs; +static _ble_conn_auth_s _ble_conn_auth_cbs; +static _ble_conn_auth_info_s _ble_conn_auth_info_cbs; +static _ble_mtu_exchange_params_s _ble_mtu_exchange_params; +static _ble_gatt_cb_s _ble_gatt_cbs; + +static _ble_data_s _ble_ad_data[] = +{ + (_ble_data_s) { + .type = BT_DATA_FLAGS, + .data_len = sizeof((uint8_t []) { (BT_LE_AD_GENERAL | BT_LE_AD_NO_BREDR) }), + .data = (const uint8_t *) ((uint8_t []) { (BT_LE_AD_GENERAL | BT_LE_AD_NO_BREDR) }) + }, + (_ble_data_s) { + .type = BT_DATA_NAME_COMPLETE, + .data_len = (sizeof (BLE_DEVICE_NAME_PREFIX) - 1), + .data = (const uint8_t *) BLE_DEVICE_NAME_PREFIX + } +}; +static const _ble_data_s _ble_scan_data[] = +{ + BT_DATA_BYTES(BT_DATA_UUID128_ALL, UUID_CONTROLS_SERVICE_VAL) +}; +static _ble_delayed_work_s _ble_delayed_work; +static _ble_char_s _ble_char_table[BLE_CHAR_COUNT]; + +/* Shot data transfer state. */ +static uint8_t _ble_shot_data_status = 0; +static uint8_t *_ble_shot_data_buf = NULL; +static uint32_t _ble_shot_data_total_len = 0; +static uint32_t _ble_shot_data_sent = 0; +static bool _ble_shot_data_transferring = false; +static uint16_t _ble_shot_data_chunk_size = 0; +static struct k_work _ble_eraseall_work; +static struct k_work _ble_dur_loc_work; +static uint8_t _ble_dur_loc_duration; +static uint8_t _ble_dur_loc_location; + +/* BLE pairing. */ +static struct k_work _ble_pair_smp_work; +static struct k_work_delayable _ble_pair_delay_work; +static struct bt_conn *_ble_pair_conn = NULL; +static struct k_work_delayable _ble_settings_write_dwork; +static struct k_work_delayable _ble_bond_clear_dwork; + +/* Custom settings backend (persists Zephyr BT bond keys into _ble_config). */ +static struct settings_store_itf _settings_itf; +static struct settings_store _settings_store; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +/* Connection callbacks */ +static void _ble_connected_cb (struct bt_conn *conn, uint8_t err); +static void _ble_disconnected_cb (struct bt_conn *conn, uint8_t err); +static void _ble_security_changed_cb (struct bt_conn *conn, bt_security_t level, + enum bt_security_err err); +static void _ble_auth_cancel_cb (struct bt_conn *conn); +static void _ble_pairing_complete_cb (struct bt_conn *conn, bool bonded); +static enum bt_security_err _ble_pairing_accept_cb (struct bt_conn *conn, const struct bt_conn_pairing_feat *const feat); +static void _ble_pairing_failed_cb (struct bt_conn *conn, enum bt_security_err reason); +static void _ble_att_mtu_updated_cb (struct bt_conn *conn, uint16_t tx, uint16_t rx); +static void _ble_pair_delay_handler (struct k_work *work); +static void _ble_mtu_exchange_cb (struct bt_conn *conn, uint8_t err, struct bt_gatt_exchange_params *params); + +/* Config persistence. */ +static void _ble_settings_read (void); +static void _ble_settings_write (void); + +static void _ble_config_read (void); +static void _ble_config_write (void); + +/* Advertising name characteristic */ +static ssize_t _ble_adv_name_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_adv_name_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); + +/* Bond clear. */ +static ssize_t _ble_bond_clear_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); + +static void _ble_reenable_later (struct k_work *work); + +/* Work handlers */ +static void _ble_eraseall_work_handler (struct k_work *work); +static void _ble_dur_loc_work_handler (struct k_work *work); +static void _ble_settings_write_work_handler (struct k_work *work); +static void _ble_bond_clear_dwork_handler (struct k_work *work); + +/* APP characteristics */ +static ssize_t _ble_app_main_pcb_version_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_app_ring_pcb_version_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_app_version_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_app_mfg_id_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_app_mfg_date_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_app_pn_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_app_sn_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_app_power_count_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_app_cli_enabled_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, + uint8_t flags); +static ssize_t _ble_app_cli_enabled_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_app_reset_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, + uint8_t flags); + +/* SCOPE RING characteristics */ +static ssize_t _ble_level_option_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_level_option_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_level_option_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_level_viscosity_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_level_viscosity_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_level_viscosity_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_level_sensitivity_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_level_sensitivity_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_level_sensitivity_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_ring_color_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_ring_color_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_ring_color_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_ring_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_ring_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_ring_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_indicator_color_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_indicator_color_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_indicator_color_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_indicator_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_indicator_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_indicator_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_level_color_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_level_color_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_level_color_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_level_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_level_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_level_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value); + +/* BUBBLE / FIBER / PIN */ +static ssize_t _ble_bubble_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_bubble_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_bubble_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_fiber_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_fiber_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_fiber_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_pin_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_pin_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_pin_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value); + +/* MOTION */ +static ssize_t _ble_level_calibrate_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_level_calibrate_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_level_calibrate_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_level_angle_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_level_angle_changed (const struct bt_gatt_attr *attr, uint16_t value); + +/* ALS */ +static ssize_t _ble_ambient_light_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_ambient_light_changed (const struct bt_gatt_attr *attr, uint16_t value); + +/* FSM */ +static ssize_t _ble_fsm_timeout_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_fsm_timeout_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_fsm_timeout_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_fsm_auto_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_fsm_auto_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_fsm_auto_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_fsm_mode_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_fsm_mode_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_fsm_mode_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_fsm_app_config_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_fsm_app_config_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); + +/* BATTERY */ +static ssize_t _ble_battery_level_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_battery_level_changed (const struct bt_gatt_attr *attr, uint16_t value); + +/* SHOT CAPTURE */ +static ssize_t _ble_shot_capture_tap_ths_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_shot_capture_tap_ths_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_shot_capture_quiet_time_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_shot_capture_quiet_time_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_shot_capture_shock_time_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_shot_capture_shock_time_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_shot_capture_user_shot_cnt_reset (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_shot_capture_user_shot_cnt_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _shot_capture_user_shot_cnt_ccc_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_shot_capture_shot_cnt_reset (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_shot_capture_shot_cnt_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _shot_capture_shot_cnt_ccc_changed (const struct bt_gatt_attr *attr, uint16_t value); +static ssize_t _ble_shot_capture_capture_en_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_shot_capture_capture_en_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_shot_capture_dur_loc_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_shot_capture_dur_loc_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static ssize_t _ble_shot_data_request_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); +static ssize_t _ble_shot_data_request_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +static void _ble_shot_data_request_ccc_changed (const struct bt_gatt_attr *attr, uint16_t value); +static void _ble_shot_data_ccc_changed (const struct bt_gatt_attr *attr, uint16_t value); +static void _ble_shot_data_send_next (struct bt_conn *conn, void *user_data); + +/* BLE PAIRING */ +static void _ble_pair_smp_handler (struct k_work *work); +static void _ble_bond_clear (void); + +/* RTC */ +static ssize_t _ble_rtc_secs_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset); +{ + uint32_t s_elapsed = (uint32_t) RTC_seconds_elapsed (); + + return bt_gatt_attr_read (conn, attr, buf, len, offset, s_elapsed, sizeof (s_elapsed)); +} + +/* SETTINGS BACKEND */ +static ssize_t _settings_read_cb (void *cb_arg, void *data, size_t len); +static int _settings_load (struct settings_store *cs, const struct settings_load_arg *arg); +static int _settings_save (struct settings_store *cs, const char *name, + const void *value, size_t val_len); +static int _settings_entry_find (const char *key); +static int _settings_entry_alloc (const char *key); + + +/*-------------------------------------------------------------------------------------------------- + * BLE SERVICES & CHARACTERISTICS + *------------------------------------------------------------------------------------------------*/ +BT_GATT_SERVICE_DEFINE(_ble_service, + BT_GATT_PRIMARY_SERVICE(UUID_CONTROLS_SERVICE), /* Index 0 */ + + /* ADV_NAME - Index 1, 2, 3 */ + BT_GATT_CHARACTERISTIC(UUID_BLE_ADV_NAME, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_adv_name_read, _ble_adv_name_write, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* BOND_CLEAR - Index 4, 5 (write-only, no CCC) */ + BT_GATT_CHARACTERISTIC(UUID_BLE_BOND_CLEAR, BT_GATT_CHRC_WRITE, + BT_GATT_PERM_WRITE, NULL, _ble_bond_clear_write, NULL), + + /* RING_COLOR - Index 6, 7, 8 */ + BT_GATT_CHARACTERISTIC(UUID_RING_COLOR, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_ring_color_read, _ble_ring_color_write, NULL), + BT_GATT_CCC(_ble_ring_color_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* RING_BRIGHTNESS - Index 9, 10, 11 */ + BT_GATT_CHARACTERISTIC(UUID_RING_BRIGHTNESS, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_ring_brightness_read, _ble_ring_brightness_write, NULL), + BT_GATT_CCC(_ble_ring_brightness_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* INDICATOR_COLOR - Index 12, 13, 14 */ + BT_GATT_CHARACTERISTIC(UUID_INDICATOR_COLOR, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_indicator_color_read, _ble_indicator_color_write, NULL), + BT_GATT_CCC(_ble_indicator_color_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* INDICATOR_BRIGHTNESS - Index 15, 16, 17 */ + BT_GATT_CHARACTERISTIC(UUID_INDICATOR_BRIGHTNESS, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_indicator_brightness_read, _ble_indicator_brightness_write, NULL), + BT_GATT_CCC(_ble_indicator_brightness_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* LEVEL_COLOR - Index 18, 19, 20 */ + BT_GATT_CHARACTERISTIC(UUID_LEVEL_COLOR, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_level_color_read, _ble_level_color_write, NULL), + BT_GATT_CCC(_ble_level_color_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* LEVEL_BRIGHTNESS - Index 21, 22, 23 */ + BT_GATT_CHARACTERISTIC(UUID_LEVEL_BRIGHTNESS, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_level_brightness_read, _ble_level_brightness_write, NULL), + BT_GATT_CCC(_ble_level_brightness_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* BUBBLE_BRIGHTNESS - Index 24, 25, 26 */ + BT_GATT_CHARACTERISTIC(UUID_BUBBLE_BRIGHTNESS, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_bubble_brightness_read, _ble_bubble_brightness_write, NULL), + BT_GATT_CCC(_ble_bubble_brightness_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* FIBER_BRIGHTNESS - Index 27, 28, 29 */ + BT_GATT_CHARACTERISTIC(UUID_FIBER_BRIGHTNESS, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_fiber_brightness_read, _ble_fiber_brightness_write, NULL), + BT_GATT_CCC(_ble_fiber_brightness_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* PIN_BRIGHTNESS - Index 30, 31, 32 */ + BT_GATT_CHARACTERISTIC(UUID_PIN_BRIGHTNESS, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_pin_brightness_read, _ble_pin_brightness_write, NULL), + BT_GATT_CCC(_ble_pin_brightness_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* LEVEL_CALIBRATE - Index 33, 34, 35 */ + BT_GATT_CHARACTERISTIC(UUID_LEVEL_CALIBRATE, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_level_calibrate_read, _ble_level_calibrate_write, NULL), + BT_GATT_CCC(_ble_level_calibrate_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* LEVEL_SENSITIVITY - Index 36, 37, 38 */ + BT_GATT_CHARACTERISTIC(UUID_LEVEL_SENSITIVITY, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_level_sensitivity_read, _ble_level_sensitivity_write, NULL), + BT_GATT_CCC(_ble_level_sensitivity_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* LEVEL_OPTION - Index 39, 40, 41 */ + BT_GATT_CHARACTERISTIC(UUID_LEVEL_OPTION, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_level_option_read, _ble_level_option_write, NULL), + BT_GATT_CCC(_ble_level_option_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* LEVEL_VISCOSITY - Index 42, 43, 44 */ + BT_GATT_CHARACTERISTIC(UUID_LEVEL_VISCOSITY, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_level_viscosity_read, _ble_level_viscosity_write, NULL), + BT_GATT_CCC(_ble_level_viscosity_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* LEVEL_ANGLE - Index 45, 46, 47 */ + BT_GATT_CHARACTERISTIC(UUID_LEVEL_ANGLE, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_level_angle_read, NULL, NULL), + BT_GATT_CCC(_ble_level_angle_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* AMBIENT_LIGHT - Index 48, 49, 50 */ + BT_GATT_CHARACTERISTIC(UUID_AMBIENT_LIGHT, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_ambient_light_read, NULL, NULL), + BT_GATT_CCC(_ble_ambient_light_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* FSM_TIMEOUT - Index 51, 52, 53 */ + BT_GATT_CHARACTERISTIC(UUID_FSM_TIMEOUT, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_fsm_timeout_read, _ble_fsm_timeout_write, NULL), + BT_GATT_CCC(_ble_fsm_timeout_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* FSM_AUTO_BRIGHTNESS - Index 54, 55, 56 */ + BT_GATT_CHARACTERISTIC(UUID_FSM_AUTO_BRIGHTNESS, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_fsm_auto_brightness_read, _ble_fsm_auto_brightness_write, NULL), + BT_GATT_CCC(_ble_fsm_auto_brightness_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* FSM_APP_CONFIG - Index 57, 58, 59 */ + BT_GATT_CHARACTERISTIC(UUID_FSM_APP_CONFIG, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_fsm_app_config_read, _ble_fsm_app_config_write, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* APP_MPCB_VERSION - Index 60, 61, 62 */ + BT_GATT_CHARACTERISTIC(UUID_APP_MPCB_VERSION, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_app_main_pcb_version_read, NULL, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* APP_RPCB_VERSION - Index 63, 64, 65 */ + BT_GATT_CHARACTERISTIC(UUID_APP_RPCB_VERSION, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_app_ring_pcb_version_read, NULL, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* APP_VERSION - Index 66, 67, 68 */ + BT_GATT_CHARACTERISTIC(UUID_APP_VERSION, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_app_version_read, NULL, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* APP_MFG_ID - Index 69, 70, 71 */ + BT_GATT_CHARACTERISTIC(UUID_APP_MFG_ID, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_app_mfg_id_read, NULL, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* APP_MFG_DATE - Index 72, 73, 74 */ + BT_GATT_CHARACTERISTIC(UUID_APP_MFG_DATE, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_app_mfg_date_read, NULL, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* APP_PN - Index 75, 76, 77 */ + BT_GATT_CHARACTERISTIC(UUID_APP_PN, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_app_pn_read, NULL, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* APP_SN - Index 78, 79, 80 */ + BT_GATT_CHARACTERISTIC(UUID_APP_SN, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_app_sn_read, NULL, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* APP_POWER_COUNT - Index 81, 82, 83 */ + BT_GATT_CHARACTERISTIC(UUID_APP_POWER_COUNT, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_app_power_count_read, NULL, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* APP_CLI_ENABLED - Index 84, 85, 86 */ + BT_GATT_CHARACTERISTIC(UUID_APP_CLI_ENABLED, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_app_cli_enabled_read, _ble_app_cli_enabled_write, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* APP_RESET - Index 87, 88 (write-only, no CCC) */ + BT_GATT_CHARACTERISTIC(UUID_APP_RESET, BT_GATT_CHRC_WRITE, + BT_GATT_PERM_WRITE, NULL, _ble_app_reset_write, NULL), + + /* BATTERY_STATUS - Index 89, 90, 91 */ + BT_GATT_CHARACTERISTIC(UUID_BATTERY_STATUS, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_battery_level_read, NULL, NULL), + BT_GATT_CCC(_ble_battery_level_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* FSM_MODE - Index 92, 93, 94 */ + BT_GATT_CHARACTERISTIC(UUID_FSM_MODE, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_fsm_mode_read, _ble_fsm_mode_write, NULL), + BT_GATT_CCC(_ble_fsm_mode_changed, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), + + /* RTC - Index 95, 96, 97 */ + BT_GATT_CHARACTERISTIC(UUID_RTC_SECS, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY), + BT_GATT_PERM_READ, _ble_rtc_secs_read, NULL, NULL), + BT_GATT_CCC(NULL, (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE)), +); + +BT_GATT_SERVICE_DEFINE( + _shot_capture_service, BT_GATT_PRIMARY_SERVICE(UUID_SHOT_CAPTURE_SERVICE), + BT_GATT_CHARACTERISTIC(UUID_SHOT_CAPTURE_TAP_THS, (BT_GATT_CHRC_READ | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_shot_capture_tap_ths_read, _ble_shot_capture_tap_ths_write, NULL), + BT_GATT_CHARACTERISTIC(UUID_SHOT_CAPTURE_QUIET_TIME, (BT_GATT_CHRC_READ | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_shot_capture_quiet_time_read, _ble_shot_capture_quiet_time_write, NULL), + BT_GATT_CHARACTERISTIC(UUID_SHOT_CAPTURE_SHOCK_TIME, (BT_GATT_CHRC_READ | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_shot_capture_shock_time_read, _ble_shot_capture_shock_time_write, NULL), + BT_GATT_CHARACTERISTIC(UUID_SHOT_CAPTURE_USER_SHOT_CNT, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_shot_capture_user_shot_cnt_read, _ble_shot_capture_user_shot_cnt_reset, NULL), + BT_GATT_CCC(_shot_capture_user_shot_cnt_ccc_changed, BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), + BT_GATT_CHARACTERISTIC(UUID_SHOT_CAPTURE_SHOT_CNT, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_shot_capture_shot_cnt_read, _ble_shot_capture_shot_cnt_reset, NULL), + BT_GATT_CCC(_shot_capture_shot_cnt_ccc_changed, BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), + BT_GATT_CHARACTERISTIC(UUID_SHOT_CAPTURE_CAPTURE_EN, (BT_GATT_CHRC_READ | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_shot_capture_capture_en_read, _ble_shot_capture_capture_en_write, NULL), + BT_GATT_CHARACTERISTIC(UUID_SHOT_CAPTURE_DUR_LOC, (BT_GATT_CHRC_READ | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_shot_capture_dur_loc_read, _ble_shot_capture_dur_loc_write, NULL), + BT_GATT_CHARACTERISTIC(UUID_SHOT_CAPTURE_SHOT_DATA_REQUEST, (BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_WRITE), + (BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), _ble_shot_data_request_read, _ble_shot_data_request_write, NULL), + BT_GATT_CCC(_ble_shot_data_request_ccc_changed, BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), + BT_GATT_CHARACTERISTIC(UUID_SHOT_CAPTURE_SHOT_DATA, BT_GATT_CHRC_NOTIFY, + BT_GATT_PERM_NONE, NULL, NULL, NULL), + BT_GATT_CCC(_ble_shot_data_ccc_changed, BT_GATT_PERM_READ | BT_GATT_PERM_WRITE), +); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void BLE_init (void) +{ + PRINT (INFO, "Initializing BLE...\r\n"); + + if (FS_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize filesystem.\r\n"); + } + + _ble_config_read (); + _ble_settings_read (); + + _ble_conn_cbs.connected = _ble_connected_cb; + _ble_conn_cbs.disconnected = _ble_disconnected_cb; + _ble_conn_cbs.security_changed = _ble_security_changed_cb; + _ble_gatt_cbs.att_mtu_updated = _ble_att_mtu_updated_cb; + bt_conn_cb_register (&_ble_conn_cbs); + bt_gatt_cb_register (&_ble_gatt_cbs); + + _ble_conn_auth_cbs.passkey_display = NULL; + _ble_conn_auth_cbs.passkey_entry = NULL; + _ble_conn_auth_cbs.passkey_confirm = NULL; + _ble_conn_auth_cbs.pairing_accept = _ble_pairing_accept_cb; + _ble_conn_auth_cbs.cancel = _ble_auth_cancel_cb; + _ble_conn_auth_info_cbs.pairing_complete = _ble_pairing_complete_cb; + _ble_conn_auth_info_cbs.pairing_failed = _ble_pairing_failed_cb; + + if (bt_conn_auth_cb_register (&_ble_conn_auth_cbs)) + { + PRINT (ERROR, "Failed to register authorization callbacks.\n"); + return; + } + if (bt_conn_auth_info_cb_register (&_ble_conn_auth_info_cbs)) + { + PRINT (ERROR, "Failed to register authorization info callbacks.\n"); + return; + } + + if (!strcmp (_ble_config.adv_name, BLE_DEVICE_NAME_PREFIX)) + { + strcat (_ble_config.adv_name, APP_info_get().sn); + _ble_config_write (); + } + _ble_ad_data[1].data = _ble_config.adv_name; + _ble_ad_data[1].data_len = strlen (_ble_config.adv_name); + bt_set_name (_ble_config.adv_name); + + /* Work items. */ + k_work_init_delayable (&_ble_delayed_work, _ble_reenable_later); + k_work_init_delayable (&_ble_pair_delay_work, _ble_pair_delay_handler); + k_work_init_delayable (&_ble_settings_write_dwork, _ble_settings_write_work_handler); + k_work_init_delayable (&_ble_bond_clear_dwork, _ble_bond_clear_dwork_handler); + k_work_init (&_ble_eraseall_work, _ble_eraseall_work_handler); + k_work_init (&_ble_dur_loc_work, _ble_dur_loc_work_handler); + k_work_init (&_ble_pair_smp_work, _ble_pair_smp_handler); + + + /* Set up notify service attribute pointers. */ + /* _ble_service */ + _ble_char_table[(uint32_t) BLE_CHAR_ADV_NAME].p_notify_service = &_ble_service.attrs[2]; + /* BLE_CHAR_PAIRING (BOND_CLEAR) is write-only — no notify needed */ + _ble_char_table[(uint32_t) BLE_CHAR_RING_COLOR].p_notify_service = &_ble_service.attrs[7]; + _ble_char_table[(uint32_t) BLE_CHAR_RING_BRIGHTNESS].p_notify_service = &_ble_service.attrs[10]; + _ble_char_table[(uint32_t) BLE_CHAR_INDICATOR_COLOR].p_notify_service = &_ble_service.attrs[13]; + _ble_char_table[(uint32_t) BLE_CHAR_INDICATOR_BRIGHTNESS].p_notify_service = &_ble_service.attrs[16]; + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_COLOR].p_notify_service = &_ble_service.attrs[19]; + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_BRIGHTNESS].p_notify_service = &_ble_service.attrs[22]; + _ble_char_table[(uint32_t) BLE_CHAR_BUBBLE_BRIGHTNESS].p_notify_service = &_ble_service.attrs[25]; + _ble_char_table[(uint32_t) BLE_CHAR_FIBER_BRIGHTNESS].p_notify_service = &_ble_service.attrs[28]; + _ble_char_table[(uint32_t) BLE_CHAR_PIN_BRIGHTNESS].p_notify_service = &_ble_service.attrs[31]; + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_CALIBRATE].p_notify_service = &_ble_service.attrs[34]; + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_SENSITIVITY].p_notify_service = &_ble_service.attrs[37]; + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_OPTION].p_notify_service = &_ble_service.attrs[40]; + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_VISCOSITY].p_notify_service = &_ble_service.attrs[43]; + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_ANGLE].p_notify_service = &_ble_service.attrs[46]; + _ble_char_table[(uint32_t) BLE_CHAR_AMBIENT_LIGHT].p_notify_service = &_ble_service.attrs[49]; + _ble_char_table[(uint32_t) BLE_CHAR_FSM_TIMEOUT].p_notify_service = &_ble_service.attrs[52]; + _ble_char_table[(uint32_t) BLE_CHAR_FSM_AUTO_BRIGHTNESS].p_notify_service = &_ble_service.attrs[55]; + _ble_char_table[(uint32_t) BLE_CHAR_FSM_APP_CONFIG].p_notify_service = &_ble_service.attrs[58]; + _ble_char_table[(uint32_t) BLE_CHAR_APP_MPCB_VERSION].p_notify_service = &_ble_service.attrs[61]; + _ble_char_table[(uint32_t) BLE_CHAR_APP_RPCB_VERSION].p_notify_service = &_ble_service.attrs[64]; + _ble_char_table[(uint32_t) BLE_CHAR_APP_VERSION].p_notify_service = &_ble_service.attrs[67]; + _ble_char_table[(uint32_t) BLE_CHAR_APP_MFG_ID].p_notify_service = &_ble_service.attrs[70]; + _ble_char_table[(uint32_t) BLE_CHAR_APP_MFG_DATE].p_notify_service = &_ble_service.attrs[73]; + _ble_char_table[(uint32_t) BLE_CHAR_APP_PN].p_notify_service = &_ble_service.attrs[76]; + _ble_char_table[(uint32_t) BLE_CHAR_APP_SN].p_notify_service = &_ble_service.attrs[79]; + _ble_char_table[(uint32_t) BLE_CHAR_APP_POWER_COUNT].p_notify_service = &_ble_service.attrs[82]; + _ble_char_table[(uint32_t) BLE_CHAR_APP_CLI_ENABLED].p_notify_service = &_ble_service.attrs[85]; + /* APP_RESET is write-only, no notify */ + _ble_char_table[(uint32_t) BLE_CHAR_BATTERY_LEVEL].p_notify_service = &_ble_service.attrs[90]; + _ble_char_table[(uint32_t) BLE_CHAR_FSM_MODE].p_notify_service = &_ble_service.attrs[93]; + + /* _shot_capture_service */ + _ble_char_table[(uint32_t) BLE_CHAR_USER_SHOT_CNT].p_notify_service = &_shot_capture_service.attrs[8]; + _ble_char_table[(uint32_t) BLE_CHAR_TOTAL_SHOT_CNT].p_notify_service = &_shot_capture_service.attrs[11]; + _ble_char_table[(uint32_t) BLE_CHAR_SHOT_DATA_REQUEST].p_notify_service = &_shot_capture_service.attrs[18]; + _ble_char_table[(uint32_t) BLE_CHAR_SHOT_DATA].p_notify_service = &_shot_capture_service.attrs[21]; + + /* Check and enable BLE. */ + if (_ble_config.enabled) + { + BLE_enable (true, false); + } +} + +void BLE_adv_name_set (char *p_str) +{ + memset (_ble_config.adv_name, 0, sizeof (_ble_config.adv_name)); + strcpy (_ble_config.adv_name, p_str); + _ble_config_write (); + + _ble_ad_data[1].data = _ble_config.adv_name; + _ble_ad_data[1].data_len = strlen (_ble_config.adv_name); + + k_work_schedule (&_ble_delayed_work, K_MSEC(500)); +} + +void BLE_enable (bool en, bool save) +{ + int32_t err; + + if (en) + { + err = bt_enable (NULL); + if (err) + { + PRINT (ERROR, "Enabling bluetooth failed (err %d)\r\n", err); + return; + } + + PRINT (INFO, "Bluetooth enabled\r\n"); + + if (IS_ENABLED(CONFIG_SETTINGS)) { + settings_load (); + } + + err = bt_le_adv_start (BT_LE_ADV_CONN, _ble_ad_data, ARRAY_SIZE(_ble_ad_data), + _ble_scan_data, ARRAY_SIZE(_ble_scan_data)); + if (err) + { + PRINT (ERROR, "Advertising failed to start (err %d)\r\n", err); + return; + } + + PRINT (INFO, "Advertising successfully started\r\n"); + _ble_enabled = true; + } + else + { + err = bt_le_adv_stop (); + if (err) + { + PRINT (ERROR, "Advertising failed to stop (err %d)\r\n", err); + return; + } + + PRINT (INFO, "Advertising stopped\r\n"); + + err = bt_disable (); + if (err) + { + PRINT (ERROR, "Disabling bluetooth failed (err %d)\r\n", err); + return; + } + + PRINT (INFO, "Bluetooth disabled\r\n"); + _ble_enabled = false; + } + + if (save) + { + _ble_config.enabled = _ble_enabled; + _ble_config_write (); + } +} + +bool BLE_is_enabled (void) +{ + return _ble_enabled; +} + +bool BLE_is_connected (void) +{ + return _ble_connected; +} + +void BLE_notify (BLE_char_e idx, const void *p_data, uint16_t len) +{ + if (!_ble_connected) + { + return; + } + else if (!_ble_char_table[(uint32_t) idx].notify) + { + return; + } + + int err = bt_gatt_notify (NULL, _ble_char_table[(uint32_t) idx].p_notify_service, p_data, len); + if (err) + { + PRINT (ERROR, "BLE notify failed for char %d (err %d)\r\n", idx, err); + } +} + +void BLE_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + PRINT (INFO, "BLE\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "Status : %s\r\n", (_ble_enabled) ? "enabled" : "disabled"); + PRINT (INFO, "Advertising Name: %s\r\n", _ble_config.adv_name); + PRINT (INFO, "Bonded : %s\r\n", (_ble_settings.bonded) ? "yes" : "no"); + if (_ble_settings.bonded) + { + char addr[BT_ADDR_LE_STR_LEN]; + + bt_addr_le_to_str (&_ble_settings.peer_addr, addr, sizeof (addr)); + + PRINT (INFO, " Peer Addr : %s\r\n", addr); + } + } + else if (argc == 1) + { + if (!strcmp (argv[0], "--name")) + { + PRINT (INFO, "%s\r\n", _ble_config.adv_name); + } + else if (!strcmp (argv[0], "--bondclr")) + { + _ble_bond_clear (); + } + else + { + goto USAGE; + } + } + else if (argc == 2) + { + if (!strcmp (argv[0], "-e") || !strcmp (argv[0], "--enable")) + { + if (!strcmp (argv[1], "true")) + { + BLE_enable (true, false); + } + else if (!strcmp (argv[1], "false")) + { + BLE_enable (false, false); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "--name")) + { + BLE_adv_name_set (argv[1]); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: ble [OPTION...]\r\n"); + PRINT (INFO, " -e | --enable Enables BLE\r\n"); + PRINT (INFO, " <%%b> true = enable\r\n"); + PRINT (INFO, " false = disable\r\n"); + PRINT (INFO, " --name Gets/sets BLE advertising name\r\n"); + PRINT (INFO, " <%%s> name\r\n"); + PRINT (INFO, " --bondclr Clears stored bond and bond keys\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — BLE core + *------------------------------------------------------------------------------------------------*/ +static void _ble_connected_cb (struct bt_conn *conn, uint8_t err) +{ + if (err) + { + PRINT (INFO, "Connection failed (err %u)\n", err); + return; + } + + _ble_connected = true; + _ble_current_conn = bt_conn_ref (conn); + + PRINT (INFO, "Connected\n"); + + /* Always request MTU exchange immediately on connect — Android won't + * re-initiate it on bonded reconnects, causing transfers to run at + * 20 bytes/chunk instead of 514. */ + _ble_mtu_exchange_params.func = _ble_mtu_exchange_cb; + int mtu_err = bt_gatt_exchange_mtu (conn, &_ble_mtu_exchange_params); + if (mtu_err) + { + PRINT (ERROR, "BLE: MTU exchange request failed (err %d)\r\n", mtu_err); + } + + if (_ble_settings.bonded) + { + PRINT (INFO, "BLE: bonded, requesting security\n"); + int sec_err = bt_conn_set_security (conn, BT_SECURITY_L2); + if (sec_err) + { + PRINT (ERROR, "BLE: bt_conn_set_security failed (err %d)\n", sec_err); + bt_conn_disconnect (conn, BT_HCI_ERR_AUTH_FAIL); + } + } + else + { + PRINT (INFO, "BLE: unbonded, scheduling pairing in 1000ms\n"); + k_work_schedule (&_ble_pair_delay_work, K_MSEC(1000)); + } +} + +// static void _ble_connected_cb (struct bt_conn *conn, uint8_t err) +// { +// if (err) +// { +// PRINT (INFO, "Connection failed (err %u)\n", err); +// return; +// } + +// _ble_connected = true; +// _ble_current_conn = bt_conn_ref (conn); + +// PRINT (INFO, "Connected\n"); + +// if (_ble_settings.bonded) +// { +// PRINT (INFO, "BLE: bonded, requesting security\n"); +// int sec_err = bt_conn_set_security (conn, BT_SECURITY_L2); +// if (sec_err) +// { +// PRINT (ERROR, "BLE: bt_conn_set_security failed (err %d)\n", sec_err); +// bt_conn_disconnect (conn, BT_HCI_ERR_AUTH_FAIL); +// } +// } +// else +// { +// /* Delay pairing request to let Android finish MTU exchange and +// * service discovery first. 1000ms is enough for Android 16. */ +// PRINT (INFO, "BLE: unbonded, scheduling pairing in 1000ms\n"); +// k_work_schedule (&_ble_pair_delay_work, K_MSEC(1000)); +// } +// } + +static void _ble_disconnected_cb (struct bt_conn *conn, uint8_t reason) +{ + _ble_connected = false; + + if (_ble_current_conn) + { + bt_conn_unref (_ble_current_conn); + _ble_current_conn = NULL; + } + + k_work_cancel_delayable (&_ble_pair_delay_work); + + _ble_pair_conn = NULL; + + /* Reset shot data transfer state. */ + _ble_shot_data_transferring = false; + k_sem_reset(&read_shotdata_consumed); + + PRINT (INFO, "Disconnected (reason %u)\n", reason); + + /* Restart advertising so the phone can reconnect. */ + int err = bt_le_adv_start (BT_LE_ADV_CONN, _ble_ad_data, ARRAY_SIZE(_ble_ad_data), + _ble_scan_data, ARRAY_SIZE(_ble_scan_data)); + if (err) + { + PRINT (ERROR, "Advertising failed to restart (err %d)\r\n", err); + } + else + { + PRINT (INFO, "Advertising restarted\r\n"); + } +} + +static void _ble_security_changed_cb (struct bt_conn *conn, bt_security_t level, + enum bt_security_err err) +{ + char addr[BT_ADDR_LE_STR_LEN]; + bt_addr_le_to_str (bt_conn_get_dst (conn), addr, sizeof (addr)); + + if (!err) + { + PRINT (INFO, "Security changed: %s level %u\n", addr, level); + } + else + { + PRINT (INFO, "Security failed: %s level %u err %d\n", addr, level, err); + + if (_ble_settings.bonded && + (err == BT_SECURITY_ERR_AUTH_FAIL || + err == BT_SECURITY_ERR_PIN_OR_KEY_MISSING)) + { + PRINT (INFO, "BLE: stale bond detected, clearing\n"); + _ble_bond_clear (); + } + } +} + +static void _ble_auth_cancel_cb (struct bt_conn *conn) +{ + char addr[BT_ADDR_LE_STR_LEN]; + + bt_addr_le_to_str (bt_conn_get_dst (conn), addr, sizeof (addr)); + + PRINT (INFO, "Pairing cancelled: %s\n", addr); +} + +static void _ble_pairing_complete_cb(struct bt_conn *conn, bool bonded) +{ + char addr[BT_ADDR_LE_STR_LEN]; + + bt_addr_le_to_str (bt_conn_get_dst(conn), addr, sizeof(addr)); + PRINT (INFO, "Pairing completed: %s, bonded: %d\n", addr, bonded); + + if (bonded) + { + _ble_settings.bonded = true; + _ble_settings.peer_addr = *bt_conn_get_dst(conn); + k_work_schedule (&_ble_settings_write_dwork, K_MSEC(2000)); + PRINT (INFO, "BLE: bond saved for %s\n", addr); + } +} + +static enum bt_security_err _ble_pairing_accept_cb ( struct bt_conn *conn, const struct bt_conn_pairing_feat *const feat) +{ + PRINT (INFO, "BLE: pairing accept\n"); + return BT_SECURITY_ERR_SUCCESS; +} + +static void _ble_pairing_failed_cb (struct bt_conn *conn, enum bt_security_err reason) +{ + char addr[BT_ADDR_LE_STR_LEN]; + uint8_t state; + + bt_addr_le_to_str (bt_conn_get_dst (conn), addr, sizeof (addr)); + + PRINT (INFO, "Pairing failed conn: %s, reason %d\n", addr, reason); + + if (reason == BT_SECURITY_ERR_PIN_OR_KEY_MISSING) + { + _ble_bond_clear (); + } +} + +static void _ble_att_mtu_updated_cb (struct bt_conn *conn, uint16_t tx, uint16_t rx) +{ + PRINT (INFO, "ATT MTU updated: TX %u, RX %u (usable payload: %u bytes)\n", tx, rx, tx - 1); +} + +static void _ble_pair_delay_handler (struct k_work *work) +{ + if (!_ble_current_conn) + { + return; + } + + PRINT (INFO, "BLE: initiating pairing after delay\n"); + int err = bt_conn_set_security (_ble_current_conn, BT_SECURITY_L2); + if (err) + { + PRINT (ERROR, "BLE: bt_conn_set_security failed (err %d)\n", err); + bt_conn_disconnect (_ble_current_conn, BT_HCI_ERR_AUTH_FAIL); + } +} + +static void _ble_mtu_exchange_cb (struct bt_conn *conn, uint8_t err, struct bt_gatt_exchange_params *params) +{ + if (err) + { + PRINT (ERROR, "BLE: MTU exchange failed (err %d)\n", err); + } + else + { + PRINT (INFO, "BLE: MTU exchange complete, MTU = %u\n", bt_gatt_get_mtu (conn)); + } +} + +static void _ble_settings_read (void) +{ + ERRNO_e err; + BLE_settings_s settings; + + /* Increasing file depth since BLE needs to write at least once on every power up. */ + err = FS_open_or_create (BLE_SETTINGS_FILENAME, &_ble_settings_file, sizeof (BLE_settings_s), (FS_FILE_DEPTH_DEFAULT * 8)); + if (err == ERRNO_SUCCESS) + { + _ble_fs_ready = true; + + err = FS_read (_ble_settings_file, (uint8_t *) &settings, 0, sizeof (BLE_settings_s)); + if (err != ERRNO_SUCCESS) + { + _ble_settings_write (); + return; + } + _ble_settings = settings; + } + else if (err == ERRNO_SIZE_MISMATCH) + { + /* Config struct changed size — wipe and recreate. */ + err = FS_delete (BLE_SETTINGS_FILENAME); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to delete old ble settings file.\r\n"); + return; + } + err = FS_open_or_create (BLE_SETTINGS_FILENAME, &_ble_settings_file, sizeof (BLE_settings_s), (FS_FILE_DEPTH_DEFAULT * 8)); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to create ble settings file.\r\n"); + return; + } + + PRINT (INFO, "New ble settings file created successfully\r\n"); + + _ble_settings_write (); + } + else + { + _ble_settings_write (); + } +} + +static void _ble_settings_write (void) +{ + if (_ble_settings_file == NULL) + { + PRINT (ERROR, "BLE settings file not open, skipping write.\r\n"); + return; + } + if (FS_write (_ble_settings_file, (uint8_t *) &_ble_settings) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failed to write ble settings to file.\r\n"); + } +} + +static void _ble_config_read (void) +{ + ERRNO_e err; + BLE_config_s cfg; + + err = FS_open_or_create (BLE_FILENAME, &_ble_config_file, sizeof (BLE_config_s), FS_FILE_DEPTH_DEFAULT); + if (err == ERRNO_SUCCESS) + { + err = FS_read (_ble_config_file, (uint8_t *) &cfg, 0, sizeof (BLE_config_s)); + if (err != ERRNO_SUCCESS) + { + _ble_config_write (); + return; + } + _ble_config = cfg; + } + else if (err == ERRNO_SIZE_MISMATCH) + { + /* Config struct changed size — wipe and recreate. */ + err = FS_delete (BLE_FILENAME); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to delete old ble file.\r\n"); + return; + } + err = FS_open_or_create (BLE_FILENAME, &_ble_config_file, sizeof (BLE_config_s), FS_FILE_DEPTH_DEFAULT); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to create ble configuration file.\r\n"); + return; + } + + PRINT (INFO, "New ble file created successfully\r\n"); + _ble_config_write (); + } + else + { + _ble_config_write (); + } +} + +static void _ble_config_write (void) +{ + if (_ble_config_file == NULL) + { + PRINT (ERROR, "BLE config file not open, skipping write.\r\n"); + return; + } + if (FS_write (_ble_config_file, (uint8_t *) &_ble_config) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failed to write ble config to file.\r\n"); + } +} + +static void _ble_reenable_later (struct k_work *work) +{ + BLE_enable (false, false); + BLE_enable (true, false); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — Settings backend + * + * Zephyr's BT stack calls settings_save_one() for each bond sub-key when a + * bond is formed. settings_load() is called at BLE_enable() time to restore + * keys. We store all entries in the BLE_config_s.settings[] array and flush + * the whole struct to external flash via _ble_settings_write(). + *------------------------------------------------------------------------------------------------*/ + +/* Find a slot whose key matches. Returns index or -1. */ +static int _settings_entry_find (const char *key) +{ + for (int i = 0; i < BLE_PAIRING_MAX_ENTRIES; i++) + { + if (_ble_settings.settings[i].used && + strncmp(_ble_settings.settings[i].key, key, BLE_PAIRING_MAX_KEY_LEN) == 0) + { + return i; + } + } + return -1; +} + +/* Allocate a new slot, pre-filling the key. Returns index or -1 if full. */ +static int _settings_entry_alloc (const char *key) +{ + for (int i = 0; i < BLE_PAIRING_MAX_ENTRIES; i++) + { + if (!_ble_settings.settings[i].used) + { + strncpy(_ble_settings.settings[i].key, key, BLE_PAIRING_MAX_KEY_LEN - 1); + _ble_settings.settings[i].key[BLE_PAIRING_MAX_KEY_LEN - 1] = '\0'; + _ble_settings.settings[i].used = true; + return i; + } + } + return -1; +} + +static ssize_t _settings_read_cb (void *cb_arg, void *data, size_t len) +{ + const BLE_settings_entry_s *e = (const BLE_settings_entry_s *) cb_arg; + size_t copy_len = (len < e->val_len) ? len : e->val_len; + + memcpy (data, e->val, copy_len); + + return (ssize_t) copy_len; +} + +/** + * @brief Called by settings_load(). Replay all stored entries back to Zephyr. + */ +static int _settings_load (struct settings_store *cs, const struct settings_load_arg *arg) +{ + PRINT (INFO, "BLE settings: load called, _ble_settings_file=%p\r\n", (void*)_ble_settings_file); + + if (!_ble_fs_ready) + { + PRINT (WARNING, "BLE settings: FS not ready, skipping load\r\n"); + return 0; + } + + /* Prevent _ble_settings_write() during load */ + atomic_set(&_ble_settings_loading, 1); + + for (int i = 0; i < BLE_PAIRING_MAX_ENTRIES; i++) + { + BLE_settings_entry_s *e = &_ble_settings.settings[i]; + if (!e->used) continue; + + PRINT (INFO, "BLE settings: replaying '%s' (%u bytes)\r\n", e->key, e->val_len); // ADD + + const char *name = e->key; + if (arg->subtree) + { + size_t sub_len = strlen(arg->subtree); + if (strncmp(name, arg->subtree, sub_len) != 0) continue; + name += sub_len; + if (*name == '/') name++; + } + + int err = settings_call_set_handler (name, e->val_len, _settings_read_cb, e, arg); + if (err) + { + PRINT (WARNING, "BLE settings: set_handler err %d for '%s'\r\n", err, e->key); + } + } + + /* Restore */ + atomic_set (&_ble_settings_loading, 0); + + return 0; +} + +/** + * @brief Called by settings_save_one() / settings_delete(). + * Upserts or removes one entry then flushes to FS. + */ +static int _settings_save (struct settings_store *cs, const char *name, + const void *value, size_t val_len) +{ + PRINT (INFO, "BLE settings: saving '%s' (%u bytes)\r\n", name, (unsigned)val_len); + + /* bt/hash is recomputed every boot — no need to persist it. */ + if (strcmp (name, "bt/hash") == 0) + { + return 0; + } + + /* Skip 0-byte deletes of keys we don't have — nothing to delete. */ + if (value == NULL || val_len == 0) +{ + /* During load, the BT stack issues 0-byte saves as housekeeping — + * never delete a key we have stored, as the real data is about to + * be (or just was) replayed. */ + if (atomic_get (&_ble_settings_loading)) + { + return 0; + } + + /* Outside of load, only delete if explicitly present. */ + int idx = _settings_entry_find (name); + if (idx >= 0) + { + memset (&_ble_settings.settings[idx], 0, sizeof (BLE_settings_entry_s)); + if (_ble_fs_ready) + { + k_work_schedule (&_ble_settings_write_dwork, K_MSEC(2000)); + } + } + return 0; +} + + int idx = _settings_entry_find (name); + if (idx < 0) + { + idx = _settings_entry_alloc (name); + } + if (idx < 0) + { + PRINT (ERROR, "BLE settings: table full, cannot save '%s'\r\n", name); + return -ENOMEM; + } + + size_t clamped = (val_len > BLE_PAIRING_MAX_VAL_LEN) ? BLE_PAIRING_MAX_VAL_LEN : val_len; + memcpy (_ble_settings.settings[idx].val, value, clamped); + _ble_settings.settings[idx].val_len = (uint8_t) clamped; + + if (_ble_fs_ready && !atomic_get(&_ble_settings_loading)) + { + k_work_schedule (&_ble_settings_write_dwork, K_MSEC(2000)); + } + + return 0; +} + +/* Required entry point when CONFIG_SETTINGS_CUSTOM=y. + Zephyr has the prototype. */ +int settings_backend_init (void) +{ + PRINT (INFO, "BLE: settings_backend_init called\r\n"); + _settings_itf.csi_load = _settings_load; + _settings_itf.csi_save = _settings_save; + _settings_store.cs_itf = &_settings_itf; + + settings_dst_register (&_settings_store); + settings_src_register (&_settings_store); + + return 0; +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — Pairing challenge + *------------------------------------------------------------------------------------------------*/ +static void _ble_pair_smp_handler (struct k_work *work) +{ + if (_ble_pair_conn == NULL) return; + + int err = bt_conn_set_security (_ble_pair_conn, BT_SECURITY_L2); + if (err) + { + PRINT (ERROR, "BLE pair: bt_conn_set_security failed (err %d)\r\n", err); + bt_conn_disconnect (_ble_pair_conn, BT_HCI_ERR_AUTH_FAIL); + } +} + +static void _ble_bond_clear (void) +{ + if (_ble_settings.bonded) + { + bt_unpair (BT_ID_DEFAULT, &_ble_settings.peer_addr); + } + + _ble_settings.bonded = false; + + memset (&_ble_settings.peer_addr, 0, sizeof(_ble_settings.peer_addr)); + memset (_ble_settings.settings, 0, sizeof(_ble_settings.settings)); + + _ble_settings_write (); + + PRINT (INFO, "BLE bond cleared.\r\n"); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — Advertising name characteristic + *------------------------------------------------------------------------------------------------*/ +static ssize_t _ble_adv_name_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + BLE_adv_name_set ((char *) buf); + return len; +} + +static ssize_t _ble_adv_name_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + return bt_gatt_attr_read (conn, attr, buf, len, offset, + _ble_config.adv_name, strlen (_ble_config.adv_name)); +} + +static ssize_t _ble_bond_clear_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + k_work_schedule (&_ble_bond_clear_dwork, K_MSEC(1000)); + + return len; +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — APP characteristics + *------------------------------------------------------------------------------------------------*/ + +static ssize_t _ble_app_main_pcb_version_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t version[3]; + version[0] = APP_info_get ().main_pcb_version.major; + version[1] = APP_info_get ().main_pcb_version.minor; + version[2] = APP_info_get ().main_pcb_version.build; + return bt_gatt_attr_read (conn, attr, buf, len, offset, version, 3); +} + +static ssize_t _ble_app_ring_pcb_version_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t version[3]; + version[0] = APP_info_get ().ring_pcb_version.major; + version[1] = APP_info_get ().ring_pcb_version.minor; + version[2] = APP_info_get ().ring_pcb_version.build; + return bt_gatt_attr_read (conn, attr, buf, len, offset, version, 3); +} + +static ssize_t _ble_app_version_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t version[3]; + version[0] = APP_info_get ().version.major; + version[1] = APP_info_get ().version.minor; + version[2] = APP_info_get ().version.build; + return bt_gatt_attr_read (conn, attr, buf, len, offset, version, 3); +} + +static ssize_t _ble_app_mfg_id_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint32_t mfg_id = APP_info_get ().mfg_id; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &mfg_id, sizeof (mfg_id)); +} + +static ssize_t _ble_app_mfg_date_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint32_t mfg_date = APP_info_get ().mfg_date; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &mfg_date, sizeof (mfg_date)); +} + +static ssize_t _ble_app_pn_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + APP_info_s info = APP_info_get (); + return bt_gatt_attr_read (conn, attr, buf, len, offset, info.pn, strlen(info.pn)); +} + +static ssize_t _ble_app_sn_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + APP_info_s info = APP_info_get (); + return bt_gatt_attr_read (conn, attr, buf, len, offset, info.sn, strlen(info.sn)); +} + +static ssize_t _ble_app_power_count_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint32_t power_count = APP_info_get ().power_cnt; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &power_count, sizeof (power_count)); +} + +static ssize_t _ble_app_cli_enabled_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, + uint8_t flags) +{ + uint8_t en = *((uint8_t *) buf); + APP_cli_enable (en); + return len; +} + +static ssize_t _ble_app_cli_enabled_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t cli_enabled = APP_info_get ().cli_enabled; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &cli_enabled, sizeof (cli_enabled)); +} + +static ssize_t _ble_app_reset_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + APP_reset (); + return len; +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — SCOPE RING characteristics + *------------------------------------------------------------------------------------------------*/ + +static ssize_t _ble_level_option_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + SCOPE_RING_level_option_set ((SCOPE_RING_level_option_e) *((uint8_t *) buf)); + return len; +} + +static ssize_t _ble_level_option_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t option = SCOPE_RING_config_get ().level_option; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &option, sizeof(option)); +} + +static void _ble_level_option_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_OPTION].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_level_viscosity_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + SCOPE_RING_level_viscosity_set (*((float *) buf)); + return len; +} + +static ssize_t _ble_level_viscosity_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + float viscosity = SCOPE_RING_config_get ().level_viscosity; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &viscosity, sizeof(viscosity)); +} + +static void _ble_level_viscosity_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_VISCOSITY].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_level_sensitivity_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + SCOPE_RING_level_sensitivity_set (*((float *) buf)); + return len; +} + +static ssize_t _ble_level_sensitivity_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + float sensitivity = SCOPE_RING_config_get ().level_sensitivity; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &sensitivity, sizeof(sensitivity)); +} + +static void _ble_level_sensitivity_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_SENSITIVITY].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_ring_color_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + SCOPE_RING_color_set (SCOPE_RING_LED_BACKGROUND, (RGB_color_e) *((uint8_t *) buf)); + return len; +} + +static ssize_t _ble_ring_color_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = SCOPE_RING_config_get ().background_color; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _ble_ring_color_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_RING_COLOR].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_ring_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, *((uint8_t *) buf), true); + return len; +} + +static ssize_t _ble_ring_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = SCOPE_RING_config_get ().background_brightness; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _ble_ring_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_RING_BRIGHTNESS].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_indicator_color_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + SCOPE_RING_color_set (SCOPE_RING_LED_INDICATORS, (RGB_color_e) *((uint8_t *) buf)); + return len; +} + +static ssize_t _ble_indicator_color_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = SCOPE_RING_config_get ().indicators_color; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _ble_indicator_color_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_INDICATOR_COLOR].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_indicator_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + SCOPE_RING_brightness_set (SCOPE_RING_LED_INDICATORS, *((uint8_t *) buf), true); + return len; +} + +static ssize_t _ble_indicator_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = SCOPE_RING_config_get ().indicators_brightness; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _ble_indicator_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_INDICATOR_BRIGHTNESS].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_level_color_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + SCOPE_RING_color_set (SCOPE_RING_LED_LEVEL, (RGB_color_e) *((uint8_t *) buf)); + return len; +} + +static ssize_t _ble_level_color_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = SCOPE_RING_config_get ().level_color; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _ble_level_color_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_COLOR].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_level_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + SCOPE_RING_brightness_set (SCOPE_RING_LED_LEVEL, *((uint8_t *) buf), true); + return len; +} + +static ssize_t _ble_level_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = SCOPE_RING_config_get ().level_brightness; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _ble_level_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_BRIGHTNESS].notify = (value == BT_GATT_CCC_NOTIFY); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — BUBBLE / FIBER / PIN + *------------------------------------------------------------------------------------------------*/ + +static ssize_t _ble_bubble_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + BUBBLE_brightness_set (*((uint8_t *) buf), true); + return len; +} + +static ssize_t _ble_bubble_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = BUBBLE_brightness_get (); + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _ble_bubble_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_BUBBLE_BRIGHTNESS].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_fiber_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + FIBER_brightness_set (*((uint8_t *) buf), true); + return len; +} + +static ssize_t _ble_fiber_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = FIBER_brightness_get (); + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _ble_fiber_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_FIBER_BRIGHTNESS].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_pin_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + PIN_brightness_set (*((uint8_t *) buf), true); + return len; +} + +static ssize_t _ble_pin_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = PIN_brightness_get (); + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _ble_pin_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_PIN_BRIGHTNESS].notify = (value == BT_GATT_CCC_NOTIFY); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — MOTION + *------------------------------------------------------------------------------------------------*/ + +static ssize_t _ble_level_calibrate_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + FSM_level_calibrate (); + return len; +} + +static ssize_t _ble_level_calibrate_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + const char *value = attr->user_data; + return bt_gatt_attr_read (conn, attr, buf, len, offset, value, sizeof(*value)); +} + +static void _ble_level_calibrate_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_CALIBRATE].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_level_angle_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + float angle = MOTION_angle_get (MOTION_AXIS_Y); + return bt_gatt_attr_read (conn, attr, buf, len, offset, &angle, sizeof(angle)); +} + +static void _ble_level_angle_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_LEVEL_ANGLE].notify = (value == BT_GATT_CCC_NOTIFY); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — ALS + *------------------------------------------------------------------------------------------------*/ + +static ssize_t _ble_ambient_light_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + ALS_data_s data; + uint32_t val = 0; + + if (ALS_read (&data) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to read ALS.\n"); + } + else + { + val = data.visible; + } + + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _ble_ambient_light_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_AMBIENT_LIGHT].notify = (value == BT_GATT_CCC_NOTIFY); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — FSM + *------------------------------------------------------------------------------------------------*/ + +static ssize_t _ble_fsm_timeout_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + FSM_timout_set (*((uint32_t *) buf)); + return len; +} + +static ssize_t _ble_fsm_timeout_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint32_t val = FSM_timout_get (); + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _ble_fsm_timeout_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_FSM_TIMEOUT].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_fsm_auto_brightness_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + FSM_auto_brightness_set ((bool) *((uint8_t *) buf)); + return len; +} + +static ssize_t _ble_fsm_auto_brightness_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t auto_brightness = (uint8_t) FSM_auto_brightness_get (); + return bt_gatt_attr_read (conn, attr, buf, len, offset, &auto_brightness, sizeof (auto_brightness)); +} + +static void _ble_fsm_auto_brightness_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_FSM_AUTO_BRIGHTNESS].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_fsm_mode_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + FSM_mode_set ((FSM_MODE_e) *((uint8_t *) buf)); + return len; +} + +static ssize_t _ble_fsm_mode_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t mode = (uint8_t) FSM_mode_get (); + return bt_gatt_attr_read (conn, attr, buf, len, offset, &mode, sizeof (mode)); +} + +static void _ble_fsm_mode_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_FSM_MODE].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_fsm_app_config_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + FSM_app_config_set ((bool) *((uint8_t *) buf)); + return len; +} + +static ssize_t _ble_fsm_app_config_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t app_config = (uint8_t) FSM_app_config_get (); + return bt_gatt_attr_read (conn, attr, buf, len, offset, &app_config, sizeof (app_config)); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — BATTERY + *------------------------------------------------------------------------------------------------*/ + +static ssize_t _ble_battery_level_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + float batt_life = FSM_battery_life_get (); + return bt_gatt_attr_read (conn, attr, buf, len, offset, &batt_life, sizeof(batt_life)); +} + +static void _ble_battery_level_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_BATTERY_LEVEL].notify = (value == BT_GATT_CCC_NOTIFY); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — SHOT CAPTURE + *------------------------------------------------------------------------------------------------*/ + +static ssize_t _ble_shot_capture_tap_ths_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + if (len != 1U) { + PRINT(INFO, "_ble_shot_capture_tap_ths_write: Incorrect data length"); + return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN); + } + SHOT_CAPTURE_tap_ths_set(*((uint8_t *) buf)); + return len; +} + +static ssize_t _ble_shot_capture_tap_ths_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = SHOT_CAPTURE_config_get()->tap_ths; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static ssize_t _ble_shot_capture_quiet_time_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + if (len != 1U) { + PRINT(INFO, "_ble_shot_capture_quiet_time_write: Incorrect data length"); + return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN); + } + SHOT_CAPTURE_quiet_time_set(*((LSM6DS3TR_C_QUIET_e *) buf)); + return len; +} + +static ssize_t _ble_shot_capture_quiet_time_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = (uint8_t)SHOT_CAPTURE_config_get()->quiet_time; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static ssize_t _ble_shot_capture_shock_time_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + if (len != 1U) { + PRINT(INFO, "_ble_shot_capture_shock_time_write: Incorrect data length"); + return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN); + } + SHOT_CAPTURE_shock_time_set(*((LSM6DS3TR_C_SHOCK_e *) buf)); + return len; +} + +static ssize_t _ble_shot_capture_shock_time_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = (uint8_t)SHOT_CAPTURE_config_get()->shock_time; + return bt_gatt_attr_read (conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static ssize_t _ble_shot_capture_user_shot_cnt_reset (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + if (len != 1U) { + PRINT(INFO, "_ble_shot_capture_user_shot_cnt_reset: Incorrect data length"); + return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN); + } + uint8_t zero = 0; + if (*((uint8_t *) buf) == 1) { + SHOT_CAPTURE_config_get()->user_shot_cnt = 0; + } + BLE_notify (BLE_CHAR_USER_SHOT_CNT, &zero, sizeof (zero)); + return len; +} + +static ssize_t _ble_shot_capture_user_shot_cnt_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint32_t val = SHOT_CAPTURE_config_get()->user_shot_cnt; + return bt_gatt_attr_read(conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _shot_capture_user_shot_cnt_ccc_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_USER_SHOT_CNT].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_shot_capture_shot_cnt_reset (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + if (len != 1U) { + PRINT(INFO, "_ble_shot_capture_shot_cnt_reset: Incorrect data length"); + return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN); + } + uint8_t zero = 0; + if (*((uint8_t *) buf) == 1) { + SHOT_CAPTURE_config_get()->shot_cnt = 0; + } + BLE_notify (BLE_CHAR_TOTAL_SHOT_CNT, &zero, sizeof (zero)); + return len; +} + +static ssize_t _ble_shot_capture_shot_cnt_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint32_t val = SHOT_CAPTURE_config_get()->shot_cnt; + return bt_gatt_attr_read(conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static void _shot_capture_shot_cnt_ccc_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_TOTAL_SHOT_CNT].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static ssize_t _ble_shot_capture_capture_en_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + if (len != 1U) { + PRINT(INFO, "_ble_shot_capture_capture_en_write: Incorrect data length\r\n"); + return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN); + } + SHOT_CAPTURE_config_get()->shot_capture_en = (*((uint8_t *) buf) == 1) ? 1 : 0; + return len; +} + +static ssize_t _ble_shot_capture_capture_en_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t val = SHOT_CAPTURE_config_get()->shot_capture_en; + return bt_gatt_attr_read(conn, attr, buf, len, offset, &val, sizeof(val)); +} + +static ssize_t _ble_shot_capture_dur_loc_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + if (len != 2U) { + PRINT(INFO, "_ble_shot_capture_dur_loc_write: Incorrect data length\r\n"); + return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN); + } + _ble_dur_loc_duration = ((uint8_t *) buf)[0]; + _ble_dur_loc_location = ((uint8_t *) buf)[1]; + k_work_submit(&_ble_dur_loc_work); + return len; +} + +static ssize_t _ble_shot_capture_dur_loc_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + uint8_t dur_loc[2]; + dur_loc[0] = SHOT_CAPTURE_config_get()->shot_duration; + dur_loc[1] = SHOT_CAPTURE_config_get()->shot_location; + return bt_gatt_attr_read(conn, attr, buf, len, offset, &dur_loc, sizeof(dur_loc)); +} + +/* + * SHOT DATA REQUEST characteristic + * + * Phone writes: + * 0x01 = Request shot data read from flash + * 0x02 = Start transfer (phone ready to receive data chunks) + * 0x03 = Consumed (phone confirmed all data received) + * 0x04 = Erase all shot data + * 0x05 = Get file count + * + * Device notifies: + * 0x01 = Data ready [1 byte status + 4 bytes total_len] + * 0x02 = No file found + * 0x03 = Timeout + * 0x04 = Erase done + * 0x05 = Erase failed + * 0x06 = File count [1 byte status + 4 bytes count] + */ +static ssize_t _ble_shot_data_request_write (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags) +{ + if (len != 1U) { + PRINT(INFO, "_ble_shot_data_request_write: Incorrect data length\r\n"); + return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN); + } + + uint8_t cmd = *((uint8_t *)buf); + + if (cmd == 0x01) { + PRINT(INFO, "BLE: Shot data read requested\r\n"); + SHOT_STORAGE_request_read(READ_REQ_BLE); + } else if (cmd == 0x02) { + if (_ble_shot_data_buf == NULL || _ble_shot_data_total_len == 0) { + PRINT(WARNING, "BLE: Start transfer requested but no data available\r\n"); + return BT_GATT_ERR(BT_ATT_ERR_UNLIKELY); + } + PRINT(INFO, "BLE: Phone ready, starting shot data transfer (%u bytes)\r\n", _ble_shot_data_total_len); + _ble_shot_data_sent = 0; + _ble_shot_data_chunk_size = bt_gatt_get_mtu(conn) - 3; + PRINT(INFO, "BLE: chunk size %u bytes (MTU %u)\r\n", _ble_shot_data_chunk_size, _ble_shot_data_chunk_size + 3); + + if (_ble_shot_data_chunk_size < 182) + { + PRINT (WARNING, "BLE: MTU too low (%u), aborting transfer\n", _ble_shot_data_chunk_size + 3); + uint8_t status = 0x07; + BLE_notify (BLE_CHAR_SHOT_DATA_REQUEST, &status, sizeof(status)); + return BT_GATT_ERR(BT_ATT_ERR_UNLIKELY); + } + + _ble_shot_data_transferring = true; + _ble_shot_data_send_next(conn, NULL); + } else if (cmd == 0x03) { + PRINT(INFO, "BLE: Phone confirmed shot data consumed\r\n"); + _ble_shot_data_buf = NULL; + _ble_shot_data_total_len = 0; + _ble_shot_data_sent = 0; + _ble_shot_data_transferring = false; + _ble_shot_data_status = 0; + SHOT_STORAGE_read_done(); + } else if (cmd == 0x04) { + PRINT(INFO, "BLE: Erase all shot data requested\r\n"); + k_work_submit(&_ble_eraseall_work); + } else if (cmd == 0x05) { + uint32_t cnt = SHOT_STORAGE_get_file_cnt(); + uint8_t notify_buf[5]; + notify_buf[0] = 0x06; + notify_buf[1] = (uint8_t)(cnt & 0xFF); + notify_buf[2] = (uint8_t)((cnt >> 8) & 0xFF); + notify_buf[3] = (uint8_t)((cnt >> 16) & 0xFF); + notify_buf[4] = (uint8_t)((cnt >> 24) & 0xFF); + BLE_notify(BLE_CHAR_SHOT_DATA_REQUEST, notify_buf, sizeof(notify_buf)); + PRINT(INFO, "BLE: File count requested: %u\r\n", cnt); + } else { + PRINT(INFO, "_ble_shot_data_request_write: Unknown command 0x%02X\r\n", cmd); + return BT_GATT_ERR(BT_ATT_ERR_VALUE_NOT_ALLOWED); + } + + return len; +} + +static ssize_t _ble_shot_data_request_read (struct bt_conn *conn, const struct bt_gatt_attr *attr, + void *buf, uint16_t len, uint16_t offset) +{ + return bt_gatt_attr_read(conn, attr, buf, len, offset, + &_ble_shot_data_status, sizeof(_ble_shot_data_status)); +} + +static void _ble_shot_data_request_ccc_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_SHOT_DATA_REQUEST].notify = (value == BT_GATT_CCC_NOTIFY); +} + +static void _ble_shot_data_ccc_changed (const struct bt_gatt_attr *attr, uint16_t value) +{ + _ble_char_table[(uint32_t) BLE_CHAR_SHOT_DATA].notify = (value == BT_GATT_CCC_NOTIFY); + PRINT(INFO, "BLE: Shot data notifications %s\r\n", value ? "enabled" : "disabled"); +} + +static void _ble_shot_data_send_next (struct bt_conn *conn, void *user_data) +{ + if (conn == NULL || !_ble_shot_data_transferring) { + return; + } + + if (_ble_shot_data_sent >= _ble_shot_data_total_len) { + _ble_shot_data_transferring = false; + PRINT(INFO, "BLE: Shot data transfer complete: %u bytes sent\r\n", _ble_shot_data_sent); + return; + } + + uint32_t remaining = _ble_shot_data_total_len - _ble_shot_data_sent; + uint16_t chunk_size = (remaining > _ble_shot_data_chunk_size) + ? _ble_shot_data_chunk_size : (uint16_t)remaining; + + struct bt_gatt_notify_params params = { + .uuid = NULL, + .attr = _ble_char_table[(uint32_t) BLE_CHAR_SHOT_DATA].p_notify_service, + .data = &_ble_shot_data_buf[_ble_shot_data_sent], + .len = chunk_size, + .func = _ble_shot_data_send_next, + }; + + int err = bt_gatt_notify_cb(conn, ¶ms); + if (err) { + if (err == -ENOMEM) { + k_msleep(1); + _ble_shot_data_send_next(conn, NULL); + return; + } + PRINT(ERROR, "BLE: notify failed (err %d), aborting transfer\r\n", err); + _ble_shot_data_transferring = false; + return; + } + + _ble_shot_data_sent += chunk_size; +} + +void BLE_shot_data_ready (uint8_t *p_data, uint32_t total_len) +{ + _ble_shot_data_buf = p_data; + _ble_shot_data_total_len = total_len; + _ble_shot_data_sent = 0; + _ble_shot_data_status = 0x01; + + uint8_t notify_buf[5]; + notify_buf[0] = _ble_shot_data_status; + notify_buf[1] = (uint8_t)(total_len & 0xFF); + notify_buf[2] = (uint8_t)((total_len >> 8) & 0xFF); + notify_buf[3] = (uint8_t)((total_len >> 16) & 0xFF); + notify_buf[4] = (uint8_t)((total_len >> 24) & 0xFF); + BLE_notify(BLE_CHAR_SHOT_DATA_REQUEST, notify_buf, sizeof(notify_buf)); +} + +void BLE_shot_data_not_found (void) +{ + _ble_shot_data_buf = NULL; + _ble_shot_data_total_len = 0; + _ble_shot_data_sent = 0; + _ble_shot_data_transferring = false; + _ble_shot_data_status = 0x02; + BLE_notify(BLE_CHAR_SHOT_DATA_REQUEST, &_ble_shot_data_status, sizeof(_ble_shot_data_status)); +} + +void BLE_shot_data_timeout (void) +{ + _ble_shot_data_buf = NULL; + _ble_shot_data_total_len = 0; + _ble_shot_data_sent = 0; + _ble_shot_data_transferring = false; + _ble_shot_data_status = 0x03; + BLE_notify(BLE_CHAR_SHOT_DATA_REQUEST, &_ble_shot_data_status, sizeof(_ble_shot_data_status)); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS — Shot data work handlers + *------------------------------------------------------------------------------------------------*/ +static void _ble_dur_loc_work_handler (struct k_work *work) +{ + SHOT_CAPTURE_task_disable_and_wait(); + SHOT_STORAGE_wait_write_task_idle(); + SHOT_CAPTURE_shotdata_duration_location_set(_ble_dur_loc_duration, _ble_dur_loc_location); + SHOT_CAPTURE_task_resume(); +} + +static void _ble_eraseall_work_handler (struct k_work *work) +{ + SHOT_CAPTURE_task_disable_and_wait(); + SHOT_STORAGE_wait_write_task_idle(); + + if (SHOT_STORAGE_eraseall() == ERRNO_SUCCESS) { + _ble_shot_data_status = 0x04; + } else { + _ble_shot_data_status = 0x05; + } + BLE_notify(BLE_CHAR_SHOT_DATA_REQUEST, &_ble_shot_data_status, sizeof(_ble_shot_data_status)); + + SHOT_CAPTURE_task_resume(); +} + +static void _ble_settings_write_work_handler (struct k_work *work) +{ + _ble_settings_write (); +} + +static void _ble_bond_clear_dwork_handler (struct k_work *work) +{ + _ble_bond_clear (); +} diff --git a/src/app/ble.h b/src/app/ble.h new file mode 100644 index 0000000..ed9d5ec --- /dev/null +++ b/src/app/ble.h @@ -0,0 +1,187 @@ +/** + * @file ble.h + * @brief BLE module + * @author Kenny Tran + * @date Jul 06 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef BLE_H_ +#define BLE_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include + +#include +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define BLE_FILENAME ("ble") +#define BLE_SETTINGS_FILENAME ("ble_settings") + +#define BLE_DEVICE_NAME_PREFIX ("CS_") + +/* + * Settings backend storage limits. + * Zephyr's BT stack stores ~8 sub-keys per bonded peer (LTK, peer addr, + * IRK, CSRK, flags, CCC entries, etc.). 24 slots gives comfortable headroom. + */ +#define BLE_PAIRING_MAX_ENTRIES (8) +#define BLE_PAIRING_MAX_KEY_LEN (32) +#define BLE_PAIRING_MAX_VAL_LEN (96) + + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct BLE_config +{ + char adv_name[16]; + bool enabled : 1; + uint8_t reserved : 7; +} __attribute__((packed, aligned(1))) BLE_config_s; + +typedef struct +{ + char key[BLE_PAIRING_MAX_KEY_LEN]; + uint8_t val[BLE_PAIRING_MAX_VAL_LEN]; + uint8_t val_len; + bool used : 1; + uint8_t reserved : 7; +} __attribute__((packed, aligned(1))) BLE_settings_entry_s; + +typedef struct BLE_settings +{ + bt_addr_le_t peer_addr; /* 7 bytes: type (1) + addr (6) */ + bool bonded : 1; + uint8_t reserved : 7; + BLE_settings_entry_s settings[BLE_PAIRING_MAX_ENTRIES]; +} __attribute__((packed, aligned(1))) BLE_settings_s; + +/* Read callback */ +typedef ssize_t (*BLE_read_cb_t) (struct bt_conn *conn, const struct bt_gatt_attr *attr, void *buf, + uint16_t len, uint16_t offset); +/* Write callback. */ +typedef ssize_t (*BLE_write_cb_t) (struct bt_conn *conn, const struct bt_gatt_attr *attr, + const void *buf, uint16_t len, uint16_t offset, uint8_t flags); + +/* CCC callback. */ +typedef void (*BLE_ccc_cb_t) (const struct bt_gatt_attr *attr, uint16_t value); + + +/* Characteristics table for notifications. */ +/*-------------------------------------------------------------------------------------------------- + * ATTRIBUTE INDEX LOOKUP TABLE + * + * Each characteristic with CCC takes 3 indices: + * - Characteristic declaration + * - Characteristic value (this is what we notify on) + * - CCC descriptor + * + * Formula: value_index = 1 + (char_position * 3) + 1 + * Where char_position is 0-based position in service definition + *------------------------------------------------------------------------------------------------*/ +typedef enum +{ + BLE_CHAR_ADV_NAME = 0, + BLE_CHAR_PAIRING, + BLE_CHAR_RING_COLOR, + BLE_CHAR_RING_BRIGHTNESS, + BLE_CHAR_INDICATOR_COLOR, + BLE_CHAR_INDICATOR_BRIGHTNESS, + BLE_CHAR_LEVEL_COLOR, + BLE_CHAR_LEVEL_BRIGHTNESS, + BLE_CHAR_BUBBLE_BRIGHTNESS, + BLE_CHAR_FIBER_BRIGHTNESS, + BLE_CHAR_PIN_BRIGHTNESS, + BLE_CHAR_LEVEL_CALIBRATE, + BLE_CHAR_LEVEL_SENSITIVITY, + BLE_CHAR_LEVEL_OPTION, + BLE_CHAR_LEVEL_VISCOSITY, + BLE_CHAR_LEVEL_ANGLE, + BLE_CHAR_AMBIENT_LIGHT, + BLE_CHAR_FSM_TIMEOUT, + BLE_CHAR_FSM_AUTO_BRIGHTNESS, + BLE_CHAR_FSM_APP_CONFIG, + BLE_CHAR_APP_MPCB_VERSION, + BLE_CHAR_APP_RPCB_VERSION, + BLE_CHAR_APP_VERSION, + BLE_CHAR_APP_MFG_ID, + BLE_CHAR_APP_MFG_DATE, + BLE_CHAR_APP_PN, + BLE_CHAR_APP_SN, + BLE_CHAR_APP_POWER_COUNT, + BLE_CHAR_APP_CLI_ENABLED, + BLE_CHAR_BATTERY_LEVEL, + BLE_CHAR_FSM_MODE, + + /* Shot capture service. */ + BLE_CHAR_USER_SHOT_CNT, + BLE_CHAR_TOTAL_SHOT_CNT, + BLE_CHAR_SHOT_DATA_REQUEST, + BLE_CHAR_SHOT_DATA, + + BLE_CHAR_COUNT +} BLE_char_e; + + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void BLE_init (void); + +void BLE_adv_name_set (char *p_str); + +void BLE_enable (bool en, bool save); + +bool BLE_is_enabled (void); + +bool BLE_is_connected (void); + +void BLE_notify (BLE_char_e idx, const void *p_data, uint16_t len); + +/** + * @brief Notify BLE that shot data is ready, then push it to phone via notifications. + * @param p_data Pointer to shot data buffer (header + data). + * @param total_len Total length of header + shot data. + */ +void BLE_shot_data_ready(uint8_t *p_data, uint32_t total_len); + +/** + * @brief Notify BLE that no shot data file was found. + */ +void BLE_shot_data_not_found(void); + +/** + * @brief Notify BLE that a timeout occurred while waiting for phone to send shot data consumed. + */ +void BLE_shot_data_timeout(void); + +void BLE_cli_cmd (int32_t argc, char **argv); + + +#endif /* BLE_H_ */ diff --git a/src/app/bubble.c b/src/app/bubble.c new file mode 100644 index 0000000..c883a89 --- /dev/null +++ b/src/app/bubble.c @@ -0,0 +1,261 @@ +/** + * @file bubble.c + * @brief Bubble LED Module + * @author Kenny Tran + * @date Mar 08 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include "../lib/fs.h" +#include "../lib/errno.h" +#include "../lib/gamma.h" +#include "../lib/print.h" + +#include "../bsp/led.h" + +#include "ble.h" + +#include "bubble.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static FS_file_t _bubble_file; +static BUBBLE_config_s _bubble_config = (BUBBLE_config_s) { + .brightness_step = BUBBLE_BRIGHTNESS_STEP_DEFAULT, + .reserved_0 = 0xFF, + .reserved_1 = 0xFF, + .reserved_2 = 0xFF +}; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _bubble_config_read (void); +static void _bubble_config_write (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void BUBBLE_init (void) +{ + PRINT (INFO, "Initializing BUBBLE...\r\n"); + + if (LED_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize LEDs.\r\n"); + return; + } + + /* Initialize filesystem. */ + if (FS_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize filesystem.\r\n"); + return; + } + + /* Fetch configuration settings stored for bubble. */ + _bubble_config_read (); +} + +void BUBBLE_brightness_set (uint8_t step, bool save_settings) +{ + if (step > BUBBLE_BRIGHTNESS_STEPS) + { + PRINT (ERROR, "Invalid brightness step.\r\n"); + return; + } + + /* Set brightness step. */ + _bubble_config.brightness_step = step; + + if (save_settings) + { + /* Write new settings to file. */ + _bubble_config_write (); + + /* Notify changes to BLE subscriber. */ + BLE_notify (BLE_CHAR_BUBBLE_BRIGHTNESS, &step, sizeof (step)); + } +} + +uint8_t BUBBLE_brightness_get (void) +{ + return _bubble_config.brightness_step; +} + +void BUBBLE_enable (bool en) +{ + float duty; + + if (en) + { + /* 100 for 100% max duty cycle. BUBBLE_BRIGHTNESS_STEPS + 1 extra step for off. */ + duty = (float) GAMMA_corrected_get ((uint32_t) _bubble_config.brightness_step, + (uint32_t) (BUBBLE_BRIGHTNESS_STEPS + 1), + (uint32_t) 100, + (double) BUBBLE_BRIGHTNESS_GAMMA_CF); + } + else + { + duty = 0.0; + } + + if (LED_pwm_set (LED_BUBBLE, duty) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to set bubble LED brightness.\r\n"); + } +} + +void BUBBLE_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + PRINT (INFO, "BUBBLE UV LED\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "brightness_step (0 - %d) : %d\r\n", BUBBLE_BRIGHTNESS_STEPS, _bubble_config.brightness_step); + } + else if (argc == 2) + { + if (!strcmp (argv[0], "-e") || !strcmp (argv[0], "--enable")) + { + if (!strcmp (argv[1], "true")) + { + BUBBLE_enable (true); + } + else if (!strcmp (argv[1], "false")) + { + BUBBLE_enable (false); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-s")) + { + uint8_t step = (uint8_t) strtoul (argv[1], NULL, 0); + + BUBBLE_brightness_set (step, true); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: bubble [OPTION...]\r\n"); + PRINT (INFO, " -e | --enable Enables bubble LED\r\n"); + PRINT (INFO, " <%%b> true = enable\r\n"); + PRINT (INFO, " false = disable\r\n"); + PRINT (INFO, " -s Sets bubble UV LED brightness step\r\n"); + PRINT (INFO, " <%%d> Brightness step [0-%d]\r\n", BUBBLE_BRIGHTNESS_STEPS); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _bubble_config_read (void) +{ + ERRNO_e err; + BUBBLE_config_s cfg; + + err = FS_open_or_create (BUBBLE_FILENAME, &_bubble_file, sizeof (BUBBLE_config_s), FS_FILE_DEPTH_DEFAULT); + if (err == ERRNO_SUCCESS) + { + /* Read file. */ + err = FS_read (_bubble_file, (uint8_t *) &cfg, 0, sizeof (BUBBLE_config_s)); + + /* Check file entry is valid. */ + if (err != ERRNO_SUCCESS) + { + /* Write defaults to file. */ + _bubble_config_write (); + return; + } + + /* Validate read file. */ + if (cfg.brightness_step > BUBBLE_BRIGHTNESS_STEPS) + { + /* Write defaults to file. */ + _bubble_config_write (); + return; + } + + /* Update bubble configuration to what was read from flash and validated. */ + _bubble_config = cfg; + } + else if (err == ERRNO_SIZE_MISMATCH) + { + /* Config has been modified, need to delete old file and write new configuration. */ + err = FS_delete (BUBBLE_FILENAME); + + if (err != ERRNO_SUCCESS) + { + /* Something else is going on... */ + PRINT (ERROR, "Failure to delete old bubble file.\r\n"); + return; + } + + /* Create new file. */ + err = FS_open_or_create (BUBBLE_FILENAME, &_bubble_file, sizeof (BUBBLE_config_s), FS_FILE_DEPTH_DEFAULT); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to create bubble configuration file.\r\n"); + } + else + { + PRINT (INFO, "New bubble file created successfully\r\n"); + } + + /* Write default config to file. */ + _bubble_config_write (); + } + else + { + /* Write defaults to file. */ + _bubble_config_write (); + } +} + +static void _bubble_config_write (void) +{ + if (FS_write (_bubble_file, (uint8_t *) &_bubble_config) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failed to write bubble configuration to file.\r\n"); + } +} diff --git a/src/app/bubble.h b/src/app/bubble.h new file mode 100644 index 0000000..3113465 --- /dev/null +++ b/src/app/bubble.h @@ -0,0 +1,65 @@ +/** + * @file bubble.h + * @brief Bubble LED Module + * @author Kenny Tran + * @date Mar 08 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef BUBBLE_H_ +#define BUBBLE_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define BUBBLE_BRIGHTNESS_STEPS (10) +#define BUBBLE_BRIGHTNESS_STEP_DEFAULT (5) +#define BUBBLE_BRIGHTNESS_GAMMA_CF (1.6) /* Gamma correction factor */ + +#define BUBBLE_FILENAME ("bubble") + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct BUBBLE_config +{ + uint8_t brightness_step : 8; + uint8_t reserved_0 : 8; + uint8_t reserved_1 : 8; + uint8_t reserved_2 : 8; +} __attribute__((packed, aligned(1))) BUBBLE_config_s; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void BUBBLE_init (void); + +void BUBBLE_brightness_set (uint8_t step, bool save_settings); + +uint8_t BUBBLE_brightness_get (void); + +void BUBBLE_enable (bool en); + +void BUBBLE_cli_cmd (int32_t argc, char **argv); + + +#endif /* BUBBLE_H_ */ diff --git a/src/app/event.c b/src/app/event.c new file mode 100644 index 0000000..47b1857 --- /dev/null +++ b/src/app/event.c @@ -0,0 +1,984 @@ +/** + * @file event.c + * @brief Event module + * @author Kenny Tran + * @date Nov 19 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include + +#include +#include + +#include "../lib/errno.h" +#include "../lib/print.h" +#include "../lib/debug.h" + +#include "../bsp/button.h" +#include "../bsp/battery.h" +#include "../bsp/wdt.h" + +#include "../app/ble.h" +#include "../app/motion.h" +#include "../app/shot_capture.h" + +#include "event.h" + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum +{ + _EVENT_STATE_INIT, + _EVENT_STATE_IDLE, + + _EVENT_STATE_LP, + _EVENT_STATE_CP, + _EVENT_STATE_RP, + + _EVENT_STATE_CH, /* Center press and long hold to enter subconfig. */ + + _EVENT_STATE_SUBCONFIG, + _EVENT_STATE_SUBCONFIG_LP, + _EVENT_STATE_SUBCONFIG_CP, + _EVENT_STATE_SUBCONFIG_RP, + _EVENT_STATE_SUBCONFIG_CH, /* Center press and long hold in subconfig to exit subconfig. */ + + _EVENT_STATE_RHLP, /* Right hold, Left pressed */ + + _EVENT_STATE_RHCP, /* Right hold, center pressed */ + + _EVENT_STATE_LHCP, /* Left hold, center pressed */ + + _EVENT_STATE_LHRP, /* Left hold, right pressed */ + + _EVENT_STATE_RHCHLP, /* Right hold, center hold, left pressed */ + + _EVENT_STATE_LHCHRP, /* Left hold, center hold, right pressed */ + + + _EVENT_STATE_SUBCAL, + _EVENT_STATE_SUBCAL_CH, +} _event_state_e; + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +K_THREAD_STACK_DEFINE(_event_stack, EVENT_STACK_SIZE); + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static struct k_thread _event_thread; +static _event_state_e _event_state = _EVENT_STATE_INIT; +static EVENT_e _event = EVENT_NONE; +static uint32_t _event_timer_ms = 0; +static uint16_t _event_batt_charging __attribute__((section(".noinit"))); + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _event_task (void *p1, void *p2, void *p3); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void EVENT_init (void) +{ + PRINT (INFO, "Initializing EVENT...\r\n"); + + /* Initialize BUTTON module. */ + if (BUTTON_init () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize BUTTON.\r\n"); + } + + /* Initialize shot capture. */ + (void) SHOT_CAPTURE_init (); +} + +void EVENT_reset (void) +{ + _event_state = _EVENT_STATE_IDLE; + _event = EVENT_NONE; + _event_timer_ms = 0; +} + +bool EVENT_in_process (void) +{ + /* An event is in process if we are not in idle. */ + if (_event_state != _EVENT_STATE_IDLE) + { + return true; + } + + return false; +} + +EVENT_e EVENT_last_get (void) +{ + EVENT_e evt = _event; + + /* Clear event once read. */ + _event = EVENT_NONE; + + return evt; +} + +void EVENT_force (EVENT_e event) +{ + switch (event) + { + case EVENT_CHARGER_CONNECTED: + _event = EVENT_CHARGER_CONNECTED; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_CHARGER_DISCONNECTED: + _event = EVENT_CHARGER_DISCONNECTED; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_BATTERY_FULL: + _event = EVENT_BATTERY_FULL; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_ACCEL_MOTION: + _event = EVENT_ACCEL_MOTION; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_GYRO_MOTION: + _event = EVENT_GYRO_MOTION; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_POWER: + _event = EVENT_POWER; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_DECREASE_PIN_BRIGHTNESS: + _event = EVENT_DECREASE_PIN_BRIGHTNESS; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_INCREASE_PIN_BRIGHTNESS: + _event = EVENT_INCREASE_PIN_BRIGHTNESS; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_DECREASE_RING_BRIGHTNESS: + _event = EVENT_DECREASE_RING_BRIGHTNESS; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_INCREASE_RING_BRIGHTNESS: + _event = EVENT_INCREASE_RING_BRIGHTNESS; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_CONFIG_ENTER: + _event = EVENT_CONFIG_ENTER; + _event_state = _EVENT_STATE_CH; + break; + + case EVENT_SUBCONFIG_PREV: + _event = EVENT_SUBCONFIG_PREV; + _event_state = _EVENT_STATE_SUBCONFIG; + break; + + case EVENT_SUBCONFIG_MODE_CHANGE: + _event = EVENT_SUBCONFIG_MODE_CHANGE; + _event_state = _EVENT_STATE_SUBCONFIG; + break; + + case EVENT_SUBCONFIG_NEXT: + _event = EVENT_SUBCONFIG_NEXT; + _event_state = _EVENT_STATE_SUBCONFIG; + break; + + case EVENT_CONFIG_EXIT: + _event = EVENT_CONFIG_EXIT; + _event_state = _EVENT_STATE_SUBCONFIG_CH; + break; + + case EVENT_AUTO_BRIGHTNESS: + _event = EVENT_AUTO_BRIGHTNESS; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_BLE_ENABLE: + _event = EVENT_BLE_ENABLE; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_BLE_DISABLE: + _event = EVENT_BLE_DISABLE; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_BLE_CONNECTED: + _event = EVENT_BLE_CONNECTED; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_BLE_DISCONNECTED: + _event = EVENT_BLE_DISCONNECTED; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_FACTORY_RESET: + _event = EVENT_FACTORY_RESET; + _event_state = _EVENT_STATE_IDLE; + break; + + case EVENT_SUBCAL_START: + _event = EVENT_SUBCAL_START; + _event_state = _EVENT_STATE_SUBCAL; + break; + + case EVENT_SUBCAL_NEXT: + _event = EVENT_SUBCAL_NEXT; + _event_state = _EVENT_STATE_SUBCAL; + break; + + case EVENT_SHOT_DETECTED: + _event = EVENT_SHOT_DETECTED; + _event_state = _EVENT_STATE_IDLE; + break; + } + + /* Reset timer counter. */ + _event_timer_ms = 0; +} + +void EVENT_task_suspend (void) +{ + k_thread_suspend (&_event_thread); +} + +void EVENT_task_resume (void) +{ + k_thread_resume (&_event_thread); +} + +void EVENT_task_install (void) +{ + static k_tid_t id; + + id = k_thread_create (&_event_thread, + _event_stack, + EVENT_STACK_SIZE, + _event_task, + NULL, + NULL, + NULL, + EVENT_THREAD_PRIORITY, + 0, + K_NO_WAIT); + k_thread_name_set(&_event_thread, "EVENT_task"); +} + +void EVENT_cli_cmd (int32_t argc, char **argv) +{ + EVENT_e evt; + + if (argc == 0) + { + evt = EVENT_last_get (); + + PRINT (INFO, "EVENT\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "Last event : "); + switch (evt) + { + case EVENT_NONE: + PRINT (INFO, "NONE\r\n"); + break; + + case EVENT_CHARGER_CONNECTED: + PRINT (INFO, "CHARGER_CONNECTED\r\n"); + break; + + case EVENT_CHARGER_DISCONNECTED: + PRINT (INFO, "CHARGER_DISCONNECTED\r\n"); + break; + + case EVENT_BATTERY_FULL: + PRINT (INFO, "BATTERY_FULL\r\n"); + break; + + case EVENT_ACCEL_MOTION: + PRINT (INFO, "ACCEL_MOTION\r\n"); + break; + + case EVENT_GYRO_MOTION: + PRINT (INFO, "GYRO_MOTION\r\n"); + break; + + case EVENT_POWER: + PRINT (INFO, "POWER\r\n"); + break; + + case EVENT_DECREASE_PIN_BRIGHTNESS: + PRINT (INFO, "DECREASE_PIN_BRIGHTNESS\r\n"); + break; + + case EVENT_INCREASE_PIN_BRIGHTNESS: + PRINT (INFO, "INCREASE_PIN_BRIGHTNESS\r\n"); + break; + + case EVENT_DECREASE_RING_BRIGHTNESS: + PRINT (INFO, "DECREASE_RING_BRIGHTNESS\r\n"); + break; + + case EVENT_INCREASE_RING_BRIGHTNESS: + PRINT (INFO, "INCREASE_RING_BRIGHTNESS\r\n"); + break; + + case EVENT_CONFIG_ENTER: + PRINT (INFO, "CONFIG_ENTER\r\n"); + break; + + case EVENT_SUBCONFIG_PREV: + PRINT (INFO, "SUBCONFIG_PREV\r\n"); + break; + + case EVENT_SUBCONFIG_MODE_CHANGE: + PRINT (INFO, "SUBCONFIG_MODE_CHANGE\r\n"); + break; + + case EVENT_SUBCONFIG_NEXT: + PRINT (INFO, "SUBCONFIG_NEXT\r\n"); + break; + + case EVENT_CONFIG_EXIT: + PRINT (INFO, "CONFIG_EXIT\r\n"); + break; + + case EVENT_AUTO_BRIGHTNESS: + PRINT (INFO, "AUTO_BRIGHTNESS\r\n"); + break; + + case EVENT_BLE_ENABLE: + PRINT (INFO, "EVENT_BLE_ENABLE\r\n"); + break; + + case EVENT_BLE_DISABLE: + PRINT (INFO, "EVENT_BLE_DISABLE\r\n"); + break; + + case EVENT_BLE_CONNECTED: + PRINT (INFO, "BLE_CONNECTED\r\n"); + break; + + case EVENT_BLE_DISCONNECTED: + PRINT (INFO, "BLE_DISCONNECTED\r\n"); + break; + + case EVENT_FACTORY_RESET: + PRINT (INFO, "FACTORY RESET\r\n"); + break; + + case EVENT_SUBCAL_START: + PRINT (INFO, "SUBCAL_START\r\n"); + break; + + case EVENT_SUBCAL_NEXT: + PRINT (INFO, "SUBCAL_NEXT\r\n"); + break; + + case EVENT_SHOT_DETECTED: + PRINT (INFO, "SHOT_DETECTED\r\n"); + break; + } + + PRINT (INFO, "_event_state : %d\r\n", _event_state); + } + else if (argc == 2) + { + if (!strcmp (argv[0], "--set") || !strcmp (argv[0], "-s")) + { + if (!strcmp (argv[1], "cc")) + { + EVENT_force (EVENT_CHARGER_CONNECTED); + } + else if (!strcmp (argv[1], "cd")) + { + EVENT_force (EVENT_CHARGER_DISCONNECTED); + } + else if (!strcmp (argv[1], "bfull")) + { + EVENT_force (EVENT_BATTERY_FULL); + } + else if (!strcmp (argv[1], "accel_motion")) + { + EVENT_force (EVENT_ACCEL_MOTION); + } + else if (!strcmp (argv[1], "gyro_motion")) + { + EVENT_force (EVENT_GYRO_MOTION); + } + else if (!strcmp (argv[1], "power")) + { + EVENT_force (EVENT_POWER); + } + else if (!strcmp (argv[1], "p-")) + { + EVENT_force (EVENT_DECREASE_PIN_BRIGHTNESS); + } + else if (!strcmp (argv[1], "p+")) + { + EVENT_force (EVENT_INCREASE_PIN_BRIGHTNESS); + } + else if (!strcmp (argv[1], "r-")) + { + EVENT_force (EVENT_DECREASE_RING_BRIGHTNESS); + } + else if (!strcmp (argv[1], "r+")) + { + EVENT_force (EVENT_INCREASE_RING_BRIGHTNESS); + } + else if (!strcmp (argv[1], "cfg")) + { + EVENT_force (EVENT_CONFIG_ENTER); + } + else if (!strcmp (argv[1], "cfg-")) + { + EVENT_force (EVENT_SUBCONFIG_PREV); + } + else if (!strcmp (argv[1], "cfgmode")) + { + EVENT_force (EVENT_SUBCONFIG_MODE_CHANGE); + } + else if (!strcmp (argv[1], "cfg+")) + { + EVENT_force (EVENT_SUBCONFIG_NEXT); + } + else if (!strcmp (argv[1], "cfgexit")) + { + EVENT_force (EVENT_CONFIG_EXIT); + } + else if (!strcmp (argv[1], "autobright")) + { + EVENT_force (EVENT_AUTO_BRIGHTNESS); + } + else if (!strcmp (argv[1], "bleen")) + { + EVENT_force (EVENT_BLE_ENABLE); + } + else if (!strcmp (argv[1], "bledis")) + { + EVENT_force (EVENT_BLE_DISABLE); + } + else if (!strcmp (argv[1], "bleconn")) + { + EVENT_force (EVENT_BLE_CONNECTED); + } + else if (!strcmp (argv[1], "bledisconn")) + { + EVENT_force (EVENT_BLE_DISCONNECTED); + } + else if (!strcmp (argv[1], "freset")) + { + EVENT_force (EVENT_FACTORY_RESET); + } + else if (!strcmp (argv[1], "calstart")) + { + EVENT_force (EVENT_SUBCAL_START); + } + else if (!strcmp (argv[1], "calnext")) + { + EVENT_force (EVENT_SUBCAL_NEXT); + } + else if (!strcmp (argv[1], "shotdet")) + { + EVENT_force (EVENT_SUBCAL_NEXT); + } + else + { + goto USAGE; + } + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: event [OPTION...]\r\n"); + PRINT (INFO, " -s | --set Set an event\r\n"); + PRINT (INFO, " <%%s> cc (charger connected)\r\n"); + PRINT (INFO, " cd (charger disconnected)\r\n"); + PRINT (INFO, " bfull (battery full)\r\n"); + PRINT (INFO, " accel_motion\r\n"); + PRINT (INFO, " gyro_motion\r\n"); + PRINT (INFO, " power\r\n"); + PRINT (INFO, " p- (decrease pin brightness)\r\n"); + PRINT (INFO, " p+ (increase pin brightness)\r\n"); + PRINT (INFO, " r- (decrease ring brightness)\r\n"); + PRINT (INFO, " r+ (increase ring brightness)\r\n"); + PRINT (INFO, " cfg\r\n"); + PRINT (INFO, " cfg-\r\n"); + PRINT (INFO, " cfgmode\r\n"); + PRINT (INFO, " cfg+\r\n"); + PRINT (INFO, " cfgexit\r\n"); + PRINT (INFO, " ble\r\n"); + PRINT (INFO, " freset\r\n"); + PRINT (INFO, " calstart\r\n"); + PRINT (INFO, " calnext\r\n"); + PRINT (INFO, " shotdet\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _event_task (void *p1, void *p2, void *p3) +{ + static bool prev_ble_connected = false; + static uint32_t prev_shot_count = 0; + bool left_pressed; + bool center_pressed; + bool right_pressed; + bool is_charging; + + while (1) + { + DBG_STAT_INC(event_task_counter); + DBG_STAT_INC_IF(i2c_transfer_active,event_task_during_i2c_counter); + /* Read button states. */ + (void) BUTTON_is_pressed (BUTTON_LEFT, &left_pressed); + (void) BUTTON_is_pressed (BUTTON_CENTER, ¢er_pressed); + (void) BUTTON_is_pressed (BUTTON_RIGHT, &right_pressed); + + /* Check charging status. */ + is_charging = BATTERY_is_charging (); + + switch (_event_state) + { + case _EVENT_STATE_INIT: + /* Update previous charging state. */ + _event_batt_charging = (_event_batt_charging << 1) | (uint16_t) is_charging; + + /* On init, prev shot count will be 0. This will always generate a SHOT DETECTED event in IDLE. + Set here to prevent false event. */ + prev_shot_count = SHOT_CAPTURE_config_get ()->user_shot_cnt; + + _event_state = _EVENT_STATE_IDLE; + break; + + case _EVENT_STATE_IDLE: + /* Check for button presses. */ + if (left_pressed) + { + _event_state = _EVENT_STATE_LP; + } + else if (center_pressed) + { + _event_state = _EVENT_STATE_CP; + } + else if (right_pressed) + { + _event_state = _EVENT_STATE_RP; + } + + /* Check if charger is connected / disconnected. */ + if ((_event_batt_charging == 0) && is_charging) + { + float voltage; + + if (BATTERY_voltage_get (&voltage)) + { + PRINT (ERROR, "Failure to read battery voltage.\r\n"); + } + + /* If we are greated than 4.1V, connected event likely means it's because the battery is full and pulse charging. */ + if (voltage < 4.1f) + { + _event = EVENT_CHARGER_CONNECTED; + } + } + else if ((_event_batt_charging == 0xFFFF) && !is_charging) + { + float voltage; + + if (BATTERY_voltage_get (&voltage)) + { + PRINT (ERROR, "Failure to read battery voltage.\r\n"); + } + + /* If we are greated than 4.1V, disconnected event likely means it's because the battery is full. */ + if (voltage >= 4.1f) + { + _event = EVENT_BATTERY_FULL; + } + else + { + _event = EVENT_CHARGER_DISCONNECTED; + } + } + /* Check for BLE connection. */ + else if (!prev_ble_connected && BLE_is_connected ()) + { + _event = EVENT_BLE_CONNECTED; + } + else if (prev_ble_connected && !BLE_is_connected ()) + { + _event = EVENT_BLE_DISCONNECTED; + } + /* Check for shot. */ + else if (SHOT_CAPTURE_config_get ()->user_shot_cnt != prev_shot_count) + { + _event = EVENT_SHOT_DETECTED; + } + /* Check for accel motion. */ + else if (MOTION_linear_detected ()) + { + _event = EVENT_ACCEL_MOTION; + } + + /* Check for gyro motion. */ + else if (MOTION_angular_detected()) + { + _event = EVENT_GYRO_MOTION; + } + + /* Update previous shot count. */ + prev_shot_count = SHOT_CAPTURE_config_get ()->user_shot_cnt; + + /* Update previous charging state. */ + _event_batt_charging = (_event_batt_charging << 1) | (uint16_t) is_charging; + + /* Update previous BLE state. */ + prev_ble_connected = BLE_is_connected (); + break; + + case _EVENT_STATE_LP: + if (left_pressed) + { + /* Check if center is pressed while left is held. */ + if (center_pressed) + { + _event_state = _EVENT_STATE_LHCP; + } + else if (right_pressed) + { + _event_state = _EVENT_STATE_LHRP; + } + /* Check if hold time meets short hold interval. */ + else if (_event_timer_ms >= EVENT_SHORT_HOLD_PERIOD_MS) + { + /* Center button has been held for EVENT_SHORT_HOLD_PERIOD_MS. Set event */ + _event = EVENT_DECREASE_RING_BRIGHTNESS; + _event_state = _EVENT_STATE_IDLE; + /* Reset timer counter. */ + _event_timer_ms = 0; + } + else + { + _event_timer_ms += EVENT_TASK_PERIOD_MS; + } + } + else + { + /* Left button pressed and released. Set event and reset to idle state. */ + _event = EVENT_DECREASE_PIN_BRIGHTNESS; + _event_state = _EVENT_STATE_IDLE; + } + break; + + case _EVENT_STATE_CP: + if (center_pressed) + { + /* Check if hold time meets long hold interval. */ + if (_event_timer_ms >= EVENT_LONG_HOLD_PERIOD_MS) + { + /* Center button has been held for EVENT_LONG_HOLD_PERIOD_MS. Set event and move to sub config state. */ + _event = EVENT_CONFIG_ENTER; + _event_state = _EVENT_STATE_CH; + /* Reset timer counter. */ + _event_timer_ms = 0; + } + else + { + _event_timer_ms += EVENT_TASK_PERIOD_MS; + } + } + else + { + /* Reset timer counter. */ + _event_timer_ms = 0; + /* Center button pressed and released. Set event and reset to idle state. */ + _event = EVENT_POWER; + _event_state = _EVENT_STATE_IDLE; + } + break; + + case _EVENT_STATE_RP: + if (right_pressed) + { + /* Check if left is pressed while right is held. */ + if (left_pressed) + { + _event_state = _EVENT_STATE_RHLP; + } + /* Check if center is pressed while right is held. */ + else if (center_pressed) + { + _event_state = _EVENT_STATE_RHCP; + } + /* Check if hold time meets short hold interval. */ + else if (_event_timer_ms >= EVENT_SHORT_HOLD_PERIOD_MS) + { + /* Center button has been held for EVENT_SHORT_HOLD_PERIOD_MS. Set event */ + _event = EVENT_INCREASE_RING_BRIGHTNESS; + _event_state = _EVENT_STATE_IDLE; + /* Reset timer counter. */ + _event_timer_ms = 0; + } + else + { + _event_timer_ms += EVENT_TASK_PERIOD_MS; + } + } + else + { + /* Right button pressed and released. Set event and reset to idle state. */ + _event = EVENT_INCREASE_PIN_BRIGHTNESS; + _event_state = _EVENT_STATE_IDLE; + } + break; + + case _EVENT_STATE_CH: + if (!center_pressed) + { + /* Once released, go to subconfig state. */ + _event_state = _EVENT_STATE_SUBCONFIG; + } + break; + + case _EVENT_STATE_SUBCONFIG: + if (left_pressed) + { + _event_state = _EVENT_STATE_SUBCONFIG_LP; + } + else if (center_pressed) + { + _event_state = _EVENT_STATE_SUBCONFIG_CP; + } + else if (right_pressed) + { + _event_state = _EVENT_STATE_SUBCONFIG_RP; + } + break; + + case _EVENT_STATE_SUBCONFIG_LP: + if (!left_pressed) + { + /* Left button pressed while in subconfig. Set event and go back to subconfig state. */ + _event = EVENT_SUBCONFIG_PREV; + _event_state = _EVENT_STATE_SUBCONFIG; + } + break; + + case _EVENT_STATE_SUBCONFIG_CP: + if (center_pressed) + { + /* Check if hold time meets long hold interval. */ + if (_event_timer_ms >= EVENT_LONG_HOLD_PERIOD_MS) + { + /* Center button has been held for EVENT_LONG_HOLD_PERIOD_MS. Set event and reset state. */ + _event = EVENT_CONFIG_EXIT; + _event_state = _EVENT_STATE_SUBCONFIG_CH; + /* Reset timer counter. */ + _event_timer_ms = 0; + } + else + { + _event_timer_ms += EVENT_TASK_PERIOD_MS; + } + } + else + { + /* Reset timer counter. */ + _event_timer_ms = 0; + /* Center button pressed and released while in sub config. Set event and go back to subconfig state. */ + _event = EVENT_SUBCONFIG_MODE_CHANGE; + _event_state = _EVENT_STATE_SUBCONFIG; + } + break; + + case _EVENT_STATE_SUBCONFIG_RP: + if (!right_pressed) + { + /* Right button pressed while in subconfig. Set event and go back to subconfig state. */ + _event = EVENT_SUBCONFIG_NEXT; + _event_state = _EVENT_STATE_SUBCONFIG; + } + break; + + + case _EVENT_STATE_SUBCONFIG_CH: + if (!center_pressed) + { + /* Once released, go back to idle. */ + _event_state = _EVENT_STATE_IDLE; + } + break; + + case _EVENT_STATE_RHLP: + if (left_pressed && right_pressed) + { + /* Check if hold time meets long hold interval. */ + if (_event_timer_ms >= EVENT_CALIBRATION_PERIOD_MS) + { + /* Right and left habe been held for EVENT_CALIBRATION_PERIOD_MS. Set event. */ + _event = EVENT_SUBCAL_START; + _event_state = _EVENT_STATE_SUBCAL; + /* Reset timer counter. */ + _event_timer_ms = 0; + } + else + { + _event_timer_ms += EVENT_TASK_PERIOD_MS; + } + } + else + { + /* Reset timer counter. */ + _event_timer_ms = 0; + _event_state = _EVENT_STATE_IDLE; + } + break; + + case _EVENT_STATE_RHCP: + if (right_pressed && center_pressed) + { + /* Check if left is pressed while right and center are held. */ + if (left_pressed) + { + _event_state = _EVENT_STATE_RHCHLP; + } + } + else + { + /* Reset to idle state. */ + _event_state = _EVENT_STATE_IDLE; + } + break; + + + case _EVENT_STATE_LHRP: + if (!right_pressed) + { + /* If left pressed and held, then right pressed and released, set auto brightness event. */ + _event = EVENT_AUTO_BRIGHTNESS; + _event_state = _EVENT_STATE_IDLE; + } + break; + + case _EVENT_STATE_LHCP: + if (left_pressed && center_pressed) + { + /* Check if right is pressed while left and center are held. */ + if (right_pressed) + { + _event_state = _EVENT_STATE_LHCHRP; + } + } + else + { + /* Reset to idle state. */ + _event_state = _EVENT_STATE_IDLE; + } + break; + + case _EVENT_STATE_RHCHLP: + if (right_pressed && center_pressed && left_pressed) + { + + } + else + { + /* Reset timer counter. */ + _event_timer_ms = 0; + /* On all three button released, enable BLE. */ + _event = EVENT_BLE_DISABLE; + _event_state = _EVENT_STATE_IDLE; + } + break; + + case _EVENT_STATE_LHCHRP: + if (left_pressed && center_pressed && right_pressed) + { + /* Check if hold time meets long hold interval. */ + if (_event_timer_ms >= EVENT_FACTORY_RESET_PERIOD_MS) + { + /* Center button has been held for EVENT_FACTORY_RESET_PERIOD_MS. Set event. */ + _event = EVENT_FACTORY_RESET; + _event_state = _EVENT_STATE_IDLE; + /* Reset timer counter. */ + _event_timer_ms = 0; + } + else + { + _event_timer_ms += EVENT_TASK_PERIOD_MS; + } + } + else + { + /* Reset timer counter. */ + _event_timer_ms = 0; + /* On all three button released, enable BLE. */ + _event = EVENT_BLE_ENABLE; + _event_state = _EVENT_STATE_IDLE; + } + break; + + case _EVENT_STATE_SUBCAL: + if (center_pressed) + { + /* Reset timer counter. */ + _event_timer_ms = 0; + _event_state = _EVENT_STATE_SUBCAL_CH; + } + break; + + case _EVENT_STATE_SUBCAL_CH: + if (!center_pressed) + { + /* Reset timer counter. */ + _event_timer_ms = 0; + _event = EVENT_SUBCAL_NEXT; + _event_state = _EVENT_STATE_SUBCAL; + } + break; + } + + /* Feed watchdog at end of loop. */ + WDT_feed (); + + k_msleep (EVENT_TASK_PERIOD_MS); + } +} diff --git a/src/app/event.h b/src/app/event.h new file mode 100644 index 0000000..86d2af0 --- /dev/null +++ b/src/app/event.h @@ -0,0 +1,92 @@ +/** + * @file event.h + * @brief Event module + * @author Kenny Tran + * @date Nov 19 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef EVENT_H_ +#define EVENT_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define EVENT_TASK_PERIOD_MS (100) +#define EVENT_STACK_SIZE (1024) +#define EVENT_THREAD_PRIORITY (7) + +#define EVENT_SHORT_HOLD_PERIOD_MS (750) +#define EVENT_LONG_HOLD_PERIOD_MS (3000) +#define EVENT_FACTORY_RESET_PERIOD_MS (10000) + +#define EVENT_CALIBRATION_PERIOD_MS (10000) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum EVENT +{ + EVENT_NONE = 0, + EVENT_CHARGER_CONNECTED, + EVENT_CHARGER_DISCONNECTED, + EVENT_BATTERY_FULL, + EVENT_ACCEL_MOTION, + EVENT_GYRO_MOTION, + EVENT_POWER, + EVENT_DECREASE_PIN_BRIGHTNESS, + EVENT_INCREASE_PIN_BRIGHTNESS, + EVENT_DECREASE_RING_BRIGHTNESS, + EVENT_INCREASE_RING_BRIGHTNESS, + EVENT_CONFIG_ENTER, + EVENT_SUBCONFIG_PREV, + EVENT_SUBCONFIG_MODE_CHANGE, + EVENT_SUBCONFIG_NEXT, + EVENT_CONFIG_EXIT, + EVENT_AUTO_BRIGHTNESS, + EVENT_BLE_ENABLE, + EVENT_BLE_DISABLE, + EVENT_BLE_CONNECTED, + EVENT_BLE_DISCONNECTED, + EVENT_FACTORY_RESET, + EVENT_SUBCAL_START, + EVENT_SUBCAL_NEXT, + EVENT_SHOT_DETECTED, +} EVENT_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void EVENT_init (void); + +void EVENT_reset (void); + +bool EVENT_in_process (void); + +EVENT_e EVENT_last_get (void); + +void EVENT_force (EVENT_e event); + +void EVENT_task_suspend (void); + +void EVENT_task_resume (void); + +void EVENT_task_install (void); + +void EVENT_cli_cmd (int32_t argc, char **argv); + +#endif /* EVENT_H_ */ diff --git a/src/app/fiber.c b/src/app/fiber.c new file mode 100644 index 0000000..d4135d6 --- /dev/null +++ b/src/app/fiber.c @@ -0,0 +1,261 @@ +/** + * @file fiber.c + * @brief Fiber LED Module + * @author Kenny Tran + * @date Jul 18 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include "../lib/fs.h" +#include "../lib/errno.h" +#include "../lib/gamma.h" +#include "../lib/print.h" + +#include "../bsp/led.h" + +#include "ble.h" + +#include "fiber.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static FS_file_t _fiber_file; +static FIBER_config_s _fiber_config = (FIBER_config_s) { + .brightness_step = FIBER_BRIGHTNESS_STEP_DEFAULT, + .reserved_0 = 0xFF, + .reserved_1 = 0xFF, + .reserved_2 = 0xFF +}; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _fiber_config_read (void); +static void _fiber_config_write (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void FIBER_init (void) +{ + PRINT (INFO, "Initializing FIBER...\r\n"); + + if (LED_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize LEDs.\r\n"); + return; + } + + /* Initialize filesystem. */ + if (FS_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize filesystem.\r\n"); + return; + } + + /* Fetch configuration settings stored for fiber. */ + _fiber_config_read (); +} + +void FIBER_brightness_set (uint8_t step, bool save_settings) +{ + if (step > FIBER_BRIGHTNESS_STEPS) + { + PRINT (ERROR, "ERROR : Invalid brightness step.\r\n"); + return; + } + + /* Set brightness step. */ + _fiber_config.brightness_step = step; + + if (save_settings) + { + /* Write new settings to file. */ + _fiber_config_write (); + + /* Notify changes to BLE subscriber. */ + BLE_notify (BLE_CHAR_FIBER_BRIGHTNESS, &step, sizeof (step)); + } +} + +uint8_t FIBER_brightness_get (void) +{ + return _fiber_config.brightness_step; +} + +void FIBER_enable (bool en) +{ + float duty; + + if (en) + { + /* 100 for 100% max duty cycle. FIBER_BRIGHTNESS_STEPS + 1 extra step for off. */ + duty = (float) GAMMA_corrected_get ((uint32_t) _fiber_config.brightness_step, + (uint32_t) (FIBER_BRIGHTNESS_STEPS + 1), + (uint32_t) 100, + (double) FIBER_BRIGHTNESS_GAMMA_CF); + } + else + { + duty = 0.0; + } + + if (LED_pwm_set (LED_FIBER, duty) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to set fiber LED brightness.\r\n"); + } +} + +void FIBER_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + PRINT (INFO, "FIBER UV LED\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "brightness_step (0 - %d) : %d\r\n", FIBER_BRIGHTNESS_STEPS, _fiber_config.brightness_step); + } + else if (argc == 2) + { + if (!strcmp (argv[0], "-e") || !strcmp (argv[0], "--enable")) + { + if (!strcmp (argv[1], "true")) + { + FIBER_enable (true); + } + else if (!strcmp (argv[1], "false")) + { + FIBER_enable (false); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-s")) + { + uint8_t step = (uint8_t) strtoul (argv[1], NULL, 0); + + FIBER_brightness_set (step, true); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: fiber [OPTION...]\r\n"); + PRINT (INFO, " -e | --enable Enables fiber LED\r\n"); + PRINT (INFO, " <%%b> true = enable\r\n"); + PRINT (INFO, " false = disable\r\n"); + PRINT (INFO, " -s Sets fiber UV LED brightness step\r\n"); + PRINT (INFO, " <%%d> Brightness step [0-%d]\r\n", FIBER_BRIGHTNESS_STEPS); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _fiber_config_read (void) +{ + ERRNO_e err; + FIBER_config_s cfg; + + err = FS_open_or_create (FIBER_FILENAME, &_fiber_file, sizeof (FIBER_config_s), FS_FILE_DEPTH_DEFAULT); + if (err == ERRNO_SUCCESS) + { + /* Read file. */ + err = FS_read (_fiber_file, (uint8_t *) &cfg, 0, sizeof (FIBER_config_s)); + + /* Check file entry is valid. */ + if (err != ERRNO_SUCCESS) + { + /* Write defaults to file. */ + _fiber_config_write (); + return; + } + + /* Validate read file. */ + if (cfg.brightness_step > FIBER_BRIGHTNESS_STEPS) + { + /* Write defaults to file. */ + _fiber_config_write (); + return; + } + + /* Update fiber configuration to what was read from flash and validated. */ + _fiber_config = cfg; + } + else if (err == ERRNO_SIZE_MISMATCH) + { + /* Config has been modified, need to delete old file and write new configuration. */ + err = FS_delete (FIBER_FILENAME); + + if (err != ERRNO_SUCCESS) + { + /* Something else is going on... */ + PRINT (ERROR, "Failure to delete old fiber file.\r\n"); + return; + } + + /* Create new file. */ + err = FS_open_or_create (FIBER_FILENAME, &_fiber_file, sizeof (FIBER_config_s), FS_FILE_DEPTH_DEFAULT); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to create fiber configuration file.\r\n"); + } + else + { + PRINT (INFO, "New fiber file created successfully\r\n"); + } + + /* Write default config to file. */ + _fiber_config_write (); + } + else + { + /* Write defaults to file. */ + _fiber_config_write (); + } +} + +static void _fiber_config_write (void) +{ + if (FS_write (_fiber_file, (uint8_t *) &_fiber_config) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failed to write fiber configuration to file.\r\n"); + } +} diff --git a/src/app/fiber.h b/src/app/fiber.h new file mode 100644 index 0000000..8c3cc6f --- /dev/null +++ b/src/app/fiber.h @@ -0,0 +1,65 @@ +/** + * @file fiber.h + * @brief Fiber LED Module + * @author Kenny Tran + * @date Jul 18 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef FIBER_H_ +#define FIBER_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define FIBER_BRIGHTNESS_STEPS (10) +#define FIBER_BRIGHTNESS_STEP_DEFAULT (5) +#define FIBER_BRIGHTNESS_GAMMA_CF (1.6) /* Gamma correction factor */ + +#define FIBER_FILENAME ("fiber") + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct FIBER_config +{ + uint8_t brightness_step : 8; + uint8_t reserved_0 : 8; + uint8_t reserved_1 : 8; + uint8_t reserved_2 : 8; +} __attribute__((packed, aligned(1))) FIBER_config_s; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void FIBER_init (void); + +void FIBER_brightness_set (uint8_t step, bool save_settings); + +uint8_t FIBER_brightness_get (void); + +void FIBER_enable (bool en); + +void FIBER_cli_cmd (int32_t argc, char **argv); + + +#endif /* FIBER_H_ */ diff --git a/src/app/fsm.c b/src/app/fsm.c new file mode 100644 index 0000000..a21fbca --- /dev/null +++ b/src/app/fsm.c @@ -0,0 +1,2237 @@ +/** + * @file fsm.c + * @brief Finite State Machine + * @author Kenny Tran + * @date July 13 2022 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include +#include + +#include "../wrappers/uart.h" +#include "../wrappers/spi.h" +#include "../wrappers/pwm.h" +#include "../wrappers/i2c.h" + +#include "../lib/fs.h" +#include "../lib/errno.h" +#include "../lib/print.h" +#include "../lib/rgb.h" +#include "../lib/debug.h" + +#include "../bsp/als.h" +#include "../bsp/battery.h" +#include "../bsp/button.h" +#include "../bsp/mcu.h" +#include "../bsp/power.h" +#include "../bsp/nvm_ext.h" +#include "../bsp/imu.h" +#include "../bsp/wdt.h" + +#include "../app/app.h" +#include "../app/app_cli.h" +#include "../app/ble.h" +#include "../app/bubble.h" +#include "../app/fiber.h" +#include "../app/event.h" +#include "../app/light_sensor.h" +#include "../app/pin.h" +#include "../app/motion.h" +#include "../app/scope_ring.h" +#include "../app/shot_capture.h" + +#include "fsm.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * THREAD DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +K_THREAD_STACK_DEFINE(_fsm_stack, FSM_STACK_SIZE); + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum +{ + _FSM_EVT_SUBCONFIG_BUBBLE_BRIGHTNESS = 0, + _FSM_EVT_SUBCONFIG_PIN_BRIGHTNESS, + _FSM_EVT_SUBCONFIG_FIBER_BRIGHTNESS, + _FSM_EVT_SUBCONFIG_RING_BACKGROUND_COLOR, + _FSM_EVT_SUBCONFIG_RING_BACKGROUND_BRIGHTNESS, + _FSM_EVT_SUBCONFIG_RING_LEVEL_COLOR, + _FSM_EVT_SUBCONFIG_RING_LEVEL_BRIGHTNESS, + _FSM_EVT_SUBCONFIG_RING_INDICATORS_COLOR, + _FSM_EVT_SUBCONFIG_RING_INDICATORS_BRIGHTNESS, + _FSM_EVT_SUBCONFIG_LEVEL_SENSITIVITY, + _FSM_EVT_SUBCONFIG_LEVEL_OPTION, +} _fsm_evt_subconfig_e; + +typedef enum +{ + _FSM_EVT_SUBCAL_SET_FLAT = 0, + _FSM_EVT_SUBCAL_FLAT, + _FSM_EVT_SUBCAL_SET_BACK, + _FSM_EVT_SUBCAL_BACK, + _FSM_EVT_SUBCAL_SET_FRONT, + _FSM_EVT_SUBCAL_FRONT, +} _fsm_evt_subcal_e; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static struct k_thread _fsm_thread; +static FS_file_t _fsm_file; +static FSM_e _fsm_state = FSM_INIT; +static bool _fsm_state_entry = false; +static uint32_t _fsm_timeout_cnt = 0; +static FSM_config_s _fsm_config = (FSM_config_s) { + .motion_timeout_ms = FSM_MOTION_TIMEOUT_PERIOD_MS, + .auto_brightness = false, + .mode = FSM_MODE_TARGET +}; +static bool _fsm_evt_busy = false; +static _fsm_evt_subconfig_e _fsm_evt_subconfig = _FSM_EVT_SUBCONFIG_BUBBLE_BRIGHTNESS; +static _fsm_evt_subcal_e _fsm_evt_subcal = _FSM_EVT_SUBCAL_SET_FLAT; +static uint32_t _fsm_motion_timer = 0; +static bool _fsm_app_config = false; +static float _fsm_batt_life = 0.0; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _fsm_task (void *p1, void *p2, void *p3); +static void _fsm_config_read (void); +static void _fsm_config_write (void); +static void _fsm_state_set (FSM_e state); +static void _fsm_evt_handler (EVENT_e event); +static void _fsm_auto_brightness (bool enabled); +static void _fsm_low_power_enter (bool wake_on_motion, bool wake_on_charge); +static void _fsm_battery_read (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void FSM_init (void) +{ + PRINT (INFO, "Initializing FSM...\r\n"); + + /* Fetch FSM state from RAM if stored. */ + if (MCU_ram_fetch ((uint8_t *) &_fsm_state, sizeof (_fsm_state)) != ERRNO_SUCCESS) + { + _fsm_state = FSM_INIT; + } + + /* Initialize battery module. */ + if (BATTERY_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize Battery.\r\n"); + } + + /* Initialize 5V step-up converter. */ + if (POWER_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize Power.\r\n"); + } + + /* Fetch configuration settings stored for fsm. */ + _fsm_config_read (); +} + +void FSM_level_calibrate (void) +{ + /* Force event calibration. */ + EVENT_force (EVENT_SUBCAL_START); +} + +void FSM_task_suspend (void) +{ + k_thread_suspend (&_fsm_thread); +} + +void FSM_task_resume (void) +{ + k_thread_resume (&_fsm_thread); +} + +void FSM_task_install (void) +{ + static k_tid_t id; + + id = k_thread_create (&_fsm_thread, + _fsm_stack, + FSM_STACK_SIZE, + _fsm_task, + NULL, + NULL, + NULL, + FSM_THREAD_PRIORITY, + 0, + K_NO_WAIT); + k_thread_name_set(&_fsm_thread, "FSM_task"); +} + +void FSM_timout_set (uint32_t ms) +{ + if (ms < 1000) + { + PRINT (ERROR, "Minimum timeout is 1000 ms.\r\n"); + } + + _fsm_config.motion_timeout_ms = ms; + + /* Write new settings to file. */ + _fsm_config_write (); +} + +uint32_t FSM_timout_get (void) +{ + return _fsm_config.motion_timeout_ms; +} + +void FSM_auto_brightness_set (bool enabled) +{ + _fsm_config.auto_brightness = enabled; + + /* Write new settings to file. */ + _fsm_config_write (); + + BLE_notify (BLE_CHAR_FSM_AUTO_BRIGHTNESS, &enabled, sizeof (enabled)); +} + +bool FSM_auto_brightness_get (void) +{ + return _fsm_config.auto_brightness; +} + +void FSM_mode_set (FSM_MODE_e mode) +{ + _fsm_config.mode = (uint8_t) mode; + + /* Write new settings to file. */ + _fsm_config_write (); + + BLE_notify (BLE_CHAR_FSM_MODE, &mode, sizeof (mode)); +} + +FSM_MODE_e FSM_mode_get (void) +{ + return (FSM_MODE_e) _fsm_config.mode; +} + +void FSM_app_config_set (bool val) +{ + _fsm_app_config = val; +} + +bool FSM_app_config_get (void) +{ + return _fsm_app_config; +} + +float FSM_battery_life_get (void) +{ + return _fsm_batt_life; +} + +void FSM_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + PRINT (INFO, "FSM\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "state : %d\r\n", _fsm_state); + PRINT (INFO, "timeout (ms) : %d\r\n", _fsm_config.motion_timeout_ms); + PRINT (INFO, "timeout counter (ms) : %d\r\n", _fsm_timeout_cnt); + PRINT (INFO, "auto brightness : %s\r\n", (_fsm_config.auto_brightness ? "true" : "false")); + PRINT (INFO, "mode : %d\r\n", _fsm_config.mode); + PRINT (INFO, "app config : %s\r\n", (_fsm_app_config ? "true" : "false")); + } + else if (argc == 1) + { + if (!strcmp (argv[0], "--list")) + { + PRINT (INFO, " 0 = FSM_INIT\r\n"); + PRINT (INFO, " 1 = FSM_CHARGING\r\n"); + PRINT (INFO, " 2 = FSM_LOW_BATTERY\r\n"); + PRINT (INFO, " 3 = FSM_POWER_ON\r\n"); + PRINT (INFO, " 4 = FSM_IDLE\r\n"); + PRINT (INFO, " 5 = FSM_SLEEP\r\n"); + PRINT (INFO, " 6 = FSM_3D_SLEEP\r\n"); + PRINT (INFO, " 7 = FSM_CHARGER_CONNECTED\r\n"); + PRINT (INFO, " 8 = FSM_CHARGER_DISCONNECTED\r\n"); + PRINT (INFO, " 9 = FSM_LEVELING\r\n"); + PRINT (INFO, " 10 = FSM_POWER_OFF\r\n"); + PRINT (INFO, " 11 = FSM_OFF\r\n"); + PRINT (INFO, " 12 = FSM_BATTERY_FULL\r\n"); + PRINT (INFO, " 13 = FSM_BLE_ENABLE\r\n"); + PRINT (INFO, " 14 = FSM_BLE_DISABLE\r\n"); + PRINT (INFO, " 15 = FSM_RAINBOW\r\n"); + PRINT (INFO, " 16 = FSM_FLAT_CALIBRATE\r\n"); + PRINT (INFO, " 17 = FSM_BACK_CALIBRATE\r\n"); + PRINT (INFO, " 18 = FSM_FRONT_CALIBRATE\r\n"); + PRINT (INFO, "255 = FSM_DEBUG\r\n"); + } + else + { + goto USAGE; + } + } + else if (argc == 2) + { + if (!strcmp (argv[0], "-s")) + { + FSM_e state = (FSM_e) strtoul (argv[1], NULL, 0); + + _fsm_state_set (state); + } + else if (!strcmp (argv[0], "-m")) + { + FSM_MODE_e mode = (FSM_MODE_e) strtoul (argv[1], NULL, 0); + + FSM_mode_set (mode); + } + else if (!strcmp (argv[0], "-ab")) + { + if (!strcmp (argv[1], "true")) + { + FSM_auto_brightness_set (true); + } + else if (!strcmp (argv[1], "false")) + { + FSM_auto_brightness_set (false); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-to") || !strcmp (argv[0], "--timeout")) + { + uint32_t timeout_ms = strtoul (argv[1], NULL, 0); + + FSM_timout_set (timeout_ms); + } + else if (!strcmp (argv[0], "-ac") || !strcmp (argv[0], "--appcfg")) + { + if (!strcmp (argv[1], "true")) + { + FSM_app_config_set (true); + } + else if (!strcmp (argv[1], "false")) + { + FSM_app_config_set (false); + } + else + { + goto USAGE; + } + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: fsm [OPTION...]\r\n"); + PRINT (INFO, " --list Lists all FSM states\r\n"); + PRINT (INFO, " -s Sets new FSM state\r\n"); + PRINT (INFO, " <%%d> [0 - 18, 255]\r\n"); + PRINT (INFO, " -m Sets FSM mode\r\n"); + PRINT (INFO, " <%%d> [0 - target, 1 - 3D]\r\n"); + PRINT (INFO, " -ab Sets auto brightness\r\n"); + PRINT (INFO, " <%%b> true = enabled, false = disabled\r\n"); + PRINT (INFO, " -to | --timeout Enables fiber LED\r\n"); + PRINT (INFO, " <%%d> timeout in milliseconds\r\n"); + PRINT (INFO, " -ac | --appcfg Enables BLE app config\r\n"); + PRINT (INFO, " <%%b> true = enabled, false = disabled\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _fsm_task (void *p1, void *p2, void *p3) +{ + EVENT_e event; + bool state_finished; + static bool in_use = false; + static uint32_t timer_60s = 0; + static FSM_e prev_state = FSM_INIT; + static uint32_t batt_low_timeout = 0; + static uint32_t timer_3s = 0; + + /* On startup, read the battery before turning on LEDs (causing voltage drop). */ + _fsm_battery_read (); + + while (1) + { + DBG_STAT_INC(fsm_task_counter); + DBG_STAT_INC_IF(i2c_transfer_active,fsm_task_during_i2c_counter); + /* Check for events. */ + event = EVENT_last_get (); + + /* Handle any events from event. */ + _fsm_evt_handler (event); + + /* Process if event occurs, else go into state machine. */ + if (_fsm_evt_busy) + { + /* If we are in config and stuck at one state for too long, exit. */ + if (_fsm_timeout_cnt >= FSM_CONFIG_TIMEOUT_PERIOD_MS) + { + /* Force exit once we've hit timeout. */ + _fsm_evt_handler (EVENT_CONFIG_EXIT); + + /* Reset event so we are no longer in subconfig. */ + EVENT_reset (); + + /* Reset timeout counter. */ + _fsm_timeout_cnt = 0; + } + } + else + { + if (in_use) + { + /* Indicate battery status every 60 seconds if in use. */ + if (timer_60s == 0) + { + if (!BATTERY_is_charging ()) + { + /* Don't let it get below 10 %. */ + if (_fsm_batt_life <= (float) 0.10) + { + PRINT (INFO, "Dead battery. %f\r\n"); + _fsm_state_set (FSM_POWER_OFF); + } + else if (_fsm_batt_life <= (float) 0.20) + { + PRINT (INFO, "Low battery.\r\n"); + /* Calling _fsm_state_set() resets timer. If timeout matches battery check interval, + we go to FSM_LOW_BATTERY to blink status then return to operation. If timer resets, + we keep switching states and end up in a loop. */ + _fsm_state = FSM_LOW_BATTERY; + } + } + + /* Increment timer. */ + timer_60s += FSM_TASK_PERIOD_MS; + } + else if (timer_60s >= 60000) + { + /* Reset timer. */ + timer_60s = 0; + } + else + { + /* Increment timer. */ + timer_60s += FSM_TASK_PERIOD_MS; + } + } + + /* Get status of scope ring state. */ + (void) SCOPE_RING_state_get (&state_finished); + + switch (_fsm_state) + { + case FSM_INIT: + if (BATTERY_is_charging ()) + { + _fsm_state_set (FSM_CHARGING); + } + else + { + /* If configured for 3D, go straight to leveling to save time. */ + if (_fsm_config.mode == FSM_MODE_3D) + { + _fsm_state_set (FSM_LEVELING); + } + else + { + _fsm_state_set (FSM_POWER_ON); + } + } + break; + + case FSM_CHARGING: + { + /* _fsm_timeout_cnt is reset every state change. Use as a flag for one time entry. */ + if (_fsm_state_entry) + { + /* Enable 5v */ + POWER_enable (true); + + /* Disable other LEDs. */ + SHOT_CAPTURE_enable (false); + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + + SCOPE_RING_state_set (SCOPE_RING_STATE_CHARGING, FSM_CHARGING_BLINK_PERIOD_MS); + } + } + break; + + case FSM_LOW_BATTERY: + if (batt_low_timeout >= FSM_LOW_BATTERY_BLINK_PERIOD_MS * 5) + { + if (in_use) + { + /* Calling _fsm_state_set() resets timer. If timeout matches battery check interval, + we go to FSM_LOW_BATTERY to blink status then return to operation. If timer resets, + we keep switching states and end up in a loop. */ + _fsm_state = FSM_LEVELING; + } + else + { + _fsm_state_set (FSM_IDLE); + } + + /* Reset timeout count. */ + batt_low_timeout = 0; + } + else + { + static uint8_t bubble_brightness; + + if (batt_low_timeout == 0) + { + bubble_brightness = BUBBLE_brightness_get (); + + /* Enable 5v */ + POWER_enable (true); + /* Set to max in case user has it off, but don't save config to flash. */ + BUBBLE_brightness_set (BUBBLE_BRIGHTNESS_STEPS, false); + } + else if (batt_low_timeout == FSM_LOW_BATTERY_BLINK_PERIOD_MS) + { + BUBBLE_enable (true); + } + else if (batt_low_timeout == (FSM_LOW_BATTERY_BLINK_PERIOD_MS * 2)) + { + BUBBLE_enable (false); + } + else if (batt_low_timeout == (FSM_LOW_BATTERY_BLINK_PERIOD_MS * 3)) + { + BUBBLE_enable (true); + } + else if (batt_low_timeout == (FSM_LOW_BATTERY_BLINK_PERIOD_MS * 4)) + { + BUBBLE_enable (false); + + /* Restore bubble brightness. */ + BUBBLE_brightness_set (bubble_brightness, false); + } + + /* Update timeout count. */ + batt_low_timeout += FSM_TASK_PERIOD_MS; + } + break; + + case FSM_POWER_ON: + if (_fsm_state_entry) + { + /* Enable 5v */ + POWER_enable (true); + + /* Run through scope ring power up sequence. */ + SCOPE_RING_state_set (SCOPE_RING_STATE_POWER_ON, 0); + } + else if (state_finished) + { + _fsm_state_set (FSM_LEVELING); + } + break; + + case FSM_IDLE: + /* If the phone app is configuring parameters, we want to go to level to see changes.*/ + if (_fsm_app_config) + { + if (BLE_is_connected ()) + { + IMU_motion_int_enable (false, 0x2, 0x1); + _fsm_state_set (FSM_LEVELING); + } + else + { + _fsm_app_config = false; + } + } + else if (_fsm_state_entry) + { + /* When idle, this means scope is stationary. Perform gyro recalibration. */ + MOTION_gyro_recalibrate (); + + /* When idling, we turn off LEDs to save power. */ + SHOT_CAPTURE_enable (false); + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + + /* Disable 5v */ + POWER_enable (false); + + /* Read battery when all LEDs are off. */ + _fsm_battery_read (); + + /* Enable IMU motion wake up function every time we enter idle*/ + IMU_motion_int_enable (true, 0x2, 0x1); + + /* Reset motion timer. */ + _fsm_motion_timer = 0; + + /* Reset in-use flag. */ + in_use = false; + + /* Reset 60s timer for low battery status. */ + timer_60s = 0; + } + else + { + /* Check calibration status. */ + if (MOTION_gyro_recalibrate_status_get () == 1.0f) + { + /* Never go to sleep if BLE is enabled, else connection breaks. */ + if (!BLE_is_enabled ()) + { + _fsm_state_set (FSM_SLEEP); + } + // /* If idle for too long, power down to save power. */ + // if (_fsm_timeout_cnt >= FSM_IDLE_TIMEOUT_PERIOD_MS) + // { + // _fsm_state_set (FSM_OFF); + // } + // else + // { + // /* Never go to sleep if BLE is enabled, else connection breaks. */ + // if (!BLE_is_enabled ()) + // { + // _fsm_state_set (FSM_SLEEP); + // } + // } + } + } + break; + + case FSM_SLEEP: + PRINT (INFO, "System is sleeping...\r\n"); + + /* In sleep, enter low power and allow motion and charger to wake processor. */ + _fsm_low_power_enter (true, false); + break; + + case FSM_3D_SLEEP: + if (_fsm_state_entry) + { + /* First power everything off to get proper battery reading. */ + SHOT_CAPTURE_enable (false); + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + + /* Disable 5v */ + POWER_enable (false); + + /* Read battery. */ + _fsm_battery_read (); + + /* Never go to sleep if BLE is enabled, else connection breaks. */ + if (!BLE_is_enabled ()) + { + /* In off state, enter low power and disable motion but enable charger interrupts to wake processor. */ + _fsm_low_power_enter (false, true); + } + } + /* If in 3D sleep for more than 30 minutes, user likely forgot to turn system off. */ + else if (_fsm_timeout_cnt >= 1800000) + { + /* Disable BLE and power off.*/ + BLE_enable (false, false); + + _fsm_state_set (FSM_OFF); + } + break; + + case FSM_CHARGER_CONNECTED: + if (_fsm_state_entry) + { + /* Enable 5v */ + POWER_enable (true); + + /* Run through charger connected sequence. */ + SCOPE_RING_state_set (SCOPE_RING_STATE_CHARGER_CONNECTED, 0); + } + else if (state_finished) + { + if (in_use) + { + _fsm_state_set (FSM_LEVELING); + } + else + { + _fsm_state_set (FSM_CHARGING); + } + } + break; + + case FSM_CHARGER_DISCONNECTED: + if (_fsm_state_entry) + { + /* Enable 5v */ + POWER_enable (true); + + /* Run through charger disconnected sequence. */ + SCOPE_RING_state_set (SCOPE_RING_STATE_CHARGER_DISCONNECTED, 0); + } + else if (state_finished) + { + if (in_use) + { + _fsm_state_set (FSM_LEVELING); + } + else + { + _fsm_state_set (FSM_BATTERY_FULL); + } + } + break; + + case FSM_LEVELING: + /* When device is not stationary, we abort gyro recalibration. */ + MOTION_gyro_recalibrate_abort (); + + /* If the phone app is configuring parameters, reset timer so we stay in leveling until config is done.*/ + if (_fsm_app_config) + { + if (BLE_is_connected ()) + { + _fsm_timeout_cnt = 0; + } + else + { + _fsm_app_config = false; + } + } + + if (_fsm_state_entry) + { + /* Enable 5V power. */ + POWER_enable (true); + + _fsm_auto_brightness (_fsm_config.auto_brightness); + + /* Enable peripherals with saved settings. */ + SCOPE_RING_state_set (SCOPE_RING_STATE_ON, 0); + + /* Set in-use flag so we don't shutdown if charger is connected. */ + in_use = true; + } + else if (_fsm_timeout_cnt >= _fsm_config.motion_timeout_ms) + { + _fsm_state_set (FSM_IDLE); + } + else + { + /* If we are in the leveling state for FSM_MOTION_TIMEOUT_MAX_MS and no shot has + been detected, assume false motion and go to sleep to save power. */ + // FIXME FSM_MOTION_TIMEOUT_MAX_MS value, sleep or off? + if (_fsm_motion_timer >= 120000) + { + /* When idling, we turn off LEDs to save power. */ + SHOT_CAPTURE_enable (false); + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + + /* Disable 5v */ + POWER_enable (false); + + /* Read battery when all LEDs are off. */ + _fsm_battery_read (); + + /* Reset motion timer. */ + _fsm_motion_timer = 0; + + /* Reset in-use flag. */ + in_use = false; + + /* Reset 60s timer for low battery status. */ + timer_60s = 0; + + _fsm_state_set (FSM_SLEEP); + } + else + { + _fsm_auto_brightness (_fsm_config.auto_brightness); + + SHOT_CAPTURE_enable (true); + BUBBLE_enable (true); + FIBER_enable (true); + PIN_enable (true); + + /* Update motion timer. */ + _fsm_motion_timer += FSM_TASK_PERIOD_MS; + } + } + break; + + case FSM_POWER_OFF: + if (_fsm_state_entry) + { + /* First power everything off to get proper battery reading. */ + SHOT_CAPTURE_enable (false); + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + + /* Disable 5v */ + POWER_enable (false); + + /* Read battery. */ + _fsm_battery_read (); + + /* Reset 3s timer. */ + timer_3s = 0; + + /* Enable 5v */ + POWER_enable (true); + + /* Run through scope ring power down sequence. */ + SCOPE_RING_state_set (SCOPE_RING_STATE_POWER_OFF, 0); + } + else if (state_finished) + { + /* Disable BLE if enabled before shutting down. FSM_CHARGING is a state of shut down. */ + if (BLE_is_enabled ()) + { + BLE_enable (false, false); + } + + if (BATTERY_is_charging ()) + { + _fsm_state_set (FSM_CHARGING); + } + else + { + _fsm_state_set (FSM_OFF); + } + } + break; + + case FSM_OFF: + PRINT (INFO, "System is powering off...\r\n"); + + /* In off state, enter low power and disable motion but enable charger interrupts to wake processor. */ + _fsm_low_power_enter (false, true); + break; + + case FSM_BATTERY_FULL: + PRINT (INFO, "Battery is full. System is powering off...\r\n"); + + /* In battery full state, enter low power and disable motion and charger interrupts that wake processor. */ + _fsm_low_power_enter (false, false); + break; + + case FSM_BLE_ENABLE: + if (_fsm_state_entry) + { + /* Enable 5v */ + POWER_enable (true); + + /* Run through scope ring BLE enabled sequence. */ + SCOPE_RING_state_set (SCOPE_RING_STATE_BLE_ENABLED, 0); + } + else if (state_finished) + { + _fsm_state_set (FSM_LEVELING); + } + break; + + case FSM_BLE_DISABLE: + if (_fsm_state_entry) + { + /* Enable 5v */ + POWER_enable (true); + + /* Run through scope ring BLE disabled sequence. */ + SCOPE_RING_state_set (SCOPE_RING_STATE_BLE_DISABLED, 0); + } + else if (state_finished) + { + _fsm_state_set (FSM_LEVELING); + } + break; + + case FSM_RAINBOW: + /* Enable 5V power. */ + POWER_enable (true); + + /* Turn everything off. */ + SHOT_CAPTURE_enable (false); + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_RAINBOW, 0); + break; + + + case FSM_FLAT_CALIBRATE: + if (timer_3s == 0) + { + /* Enable 5v */ + POWER_enable (true); + + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_SET_FLAT, 0); + + timer_3s += FSM_TASK_PERIOD_MS; + } + else if (timer_3s < 3000) + { + timer_3s += FSM_TASK_PERIOD_MS; + } + else if (timer_3s == 3000) + { + /* Start calibration */ + MOTION_calibrate (MOTION_CAL_ORIENTATION_FLAT); + + /* Set scope ting state to display calibration status. */ + SCOPE_RING_state_set (SCOPE_RING_STATE_FLAT_CALIBRATION, 0); + + timer_3s += FSM_TASK_PERIOD_MS; + } + else if (MOTION_calibrate_status_get (MOTION_CAL_ORIENTATION_FLAT) == (float) 1.0) + { + uint8_t notify_data = MOTION_CAL_ORIENTATION_FLAT; + + /* Reset 3 second timer for next calibration. */ + timer_3s = 0; + + /* Notify flat cal is done. */ + BLE_notify (BLE_CHAR_LEVEL_CALIBRATE, ¬ify_data, sizeof (notify_data)); + + _fsm_evt_handler (EVENT_SUBCAL_NEXT); + } + break; + + case FSM_BACK_CALIBRATE: + if (timer_3s == 0) + { + /* Enable 5v */ + POWER_enable (true); + + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_SET_BACK, 0); + + timer_3s += FSM_TASK_PERIOD_MS; + } + else if (timer_3s < 3000) + { + timer_3s += FSM_TASK_PERIOD_MS; + } + else if (timer_3s == 3000) + { + /* Start calibration */ + MOTION_calibrate (MOTION_CAL_ORIENTATION_BACK); + + /* Set scope ting state to display calibration status. */ + SCOPE_RING_state_set (SCOPE_RING_STATE_BACK_CALIBRATION, 0); + + timer_3s += FSM_TASK_PERIOD_MS; + } + else if (MOTION_calibrate_status_get (MOTION_CAL_ORIENTATION_BACK) == (float) 1.0) + { + uint8_t notify_data = MOTION_CAL_ORIENTATION_BACK; + + /* Reset 3 second timer for next calibration. */ + timer_3s = 0; + + /* Notify back cal is done. */ + BLE_notify (BLE_CHAR_LEVEL_CALIBRATE, ¬ify_data, sizeof (notify_data)); + + _fsm_evt_handler (EVENT_SUBCAL_NEXT); + } + break; + + case FSM_FRONT_CALIBRATE: + if (timer_3s == 0) + { + /* Enable 5v */ + POWER_enable (true); + + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_SET_FRONT, 0); + + timer_3s += FSM_TASK_PERIOD_MS; + } + else if (timer_3s < 3000) + { + timer_3s += FSM_TASK_PERIOD_MS; + } + else if (timer_3s == 3000) + { + /* Start calibration */ + MOTION_calibrate (MOTION_CAL_ORIENTATION_FRONT); + + /* Set scope ting state to display calibration status. */ + SCOPE_RING_state_set (SCOPE_RING_STATE_FRONT_CALIBRATION, 0); + + timer_3s += FSM_TASK_PERIOD_MS; + } + else if (MOTION_calibrate_status_get (MOTION_CAL_ORIENTATION_FRONT) == (float) 1.0) + { + uint8_t notify_data = MOTION_CAL_ORIENTATION_FRONT; + + /* Reset 3 second timer for next calibration. */ + timer_3s = 0; + + /* Notify front cal is done. */ + BLE_notify (BLE_CHAR_LEVEL_CALIBRATE, ¬ify_data, sizeof (notify_data)); + + _fsm_evt_handler (EVENT_SUBCAL_NEXT); + } + break; + + case FSM_DEBUG: + break; + + default: + /* NOTE: Should never get here. Put back into idle. */ + PRINT (INFO, "ERROR: Invalid FSM state.\r\n"); + _fsm_state_set (FSM_IDLE); + } + } + + _fsm_state_entry = (_fsm_state != prev_state) ? true : false; + + /* Update previous state. */ + prev_state = _fsm_state; + + /* Update elapsed time. */ + _fsm_timeout_cnt += FSM_TASK_PERIOD_MS; + + /* Feed watchdog at end of loop. */ + WDT_feed (); + + k_msleep (FSM_TASK_PERIOD_MS); + } +} + +static void _fsm_config_read (void) +{ + ERRNO_e err; + FSM_config_s cfg; + + err = FS_open_or_create (FSM_FILENAME, &_fsm_file, sizeof (FSM_config_s), FS_FILE_DEPTH_DEFAULT); + if (err == ERRNO_SUCCESS) + { + /* Read file. */ + err = FS_read (_fsm_file, (uint8_t *) &cfg, 0, sizeof (FSM_config_s)); + + /* Check file entry is valid. */ + if (err != ERRNO_SUCCESS) + { + /* Write defaults to file. */ + _fsm_config_write (); + return; + } + + /* Validate read file. */ + if (cfg.motion_timeout_ms > FSM_MOTION_TIMEOUT_MAX_MS) + { + /* Write defaults to file. */ + _fsm_config_write (); + return; + } + else if (cfg.auto_brightness > 1) + { + /* Write defaults to file. */ + _fsm_config_write (); + return; + } + else if (cfg.mode > FSM_MODE_COUNT) + { + /* Write defaults to file. */ + _fsm_config_write (); + return; + } + + /* Update fsm configuration to what was read from flash and validated. */ + _fsm_config = cfg; + } + else if (err == ERRNO_SIZE_MISMATCH) + { + /* Config has been modified, need to delete old file and write new configuration. */ + err = FS_delete (FSM_FILENAME); + + if (err != ERRNO_SUCCESS) + { + /* Something else is going on... */ + PRINT (ERROR, "Failure to delete old fsm file.\r\n"); + return; + } + + /* Create new file. */ + err = FS_open_or_create (FSM_FILENAME, &_fsm_file, sizeof (FSM_config_s), FS_FILE_DEPTH_DEFAULT); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to create fsm configuration file.\r\n"); + } + else + { + PRINT (INFO, "New fsm file created successfully\r\n"); + } + + /* Write default config to file. */ + _fsm_config_write (); + } + else + { + /* Write defaults to file. */ + _fsm_config_write (); + } +} + +static void _fsm_config_write (void) +{ + if (FS_write (_fsm_file, (uint8_t *) &_fsm_config) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failed to write fsm configuration to file.\r\n"); + } +} + +static void _fsm_state_set (FSM_e state) +{ + /* Reset timer every time we change states. */ + _fsm_timeout_cnt = 0; + + _fsm_state = state; +} + +static void _fsm_evt_handler (EVENT_e event) +{ + uint8_t bubble_brightness; + uint8_t pin_brightness; + uint8_t fiber_brightness; + SCOPE_RING_config_s scope_ring_config; + + switch (event) + { + case EVENT_NONE: + break; + + + case EVENT_CHARGER_CONNECTED: + _fsm_state_set (FSM_CHARGER_CONNECTED); + break; + + case EVENT_CHARGER_DISCONNECTED: + if (_fsm_state == FSM_CHARGING) + { + _fsm_state_set (FSM_BATTERY_FULL); + } + else + { + _fsm_state_set (FSM_CHARGER_DISCONNECTED); + } + break; + + case EVENT_BATTERY_FULL: + if (_fsm_state == FSM_CHARGING) + { + _fsm_state_set (FSM_BATTERY_FULL); + } + break; + + case EVENT_GYRO_MOTION: + if (_fsm_state == FSM_LEVELING) + { + _fsm_state_set (FSM_LEVELING); + } + break; + + case EVENT_ACCEL_MOTION: + if (_fsm_state == FSM_IDLE) + { + _fsm_state_set (FSM_LEVELING); + } + break; + + case EVENT_POWER: + /* If power button is pressed while in charging state or 3D sleep, power on and go to leveling. */ + if (_fsm_state == FSM_CHARGING || _fsm_state == FSM_3D_SLEEP) + { + _fsm_state_set (FSM_LEVELING); + } + else + { + _fsm_state_set (FSM_POWER_OFF); + } + break; + + case EVENT_DECREASE_PIN_BRIGHTNESS: + pin_brightness = PIN_brightness_get (); + fiber_brightness = FIBER_brightness_get (); + + /* Pin LEDs are active. */ + if (pin_brightness && !fiber_brightness) + { + if (pin_brightness > 1) + { + /* Decrease brightness step. */ + pin_brightness--; + /* Set new brightness step. */ + PIN_brightness_set (pin_brightness, true); + } + } + /* Fiber LEDs are active. */ + else if (fiber_brightness && !pin_brightness) + { + if (fiber_brightness > 1) + { + /* Decrease brightness step. */ + fiber_brightness--; + /* Set new brightness step. */ + FIBER_brightness_set (fiber_brightness, true); + } + } + /* Shouldn't have both active but in case both are... */ + else + { + if (pin_brightness > 1) + { + /* Decrease brightness step. */ + pin_brightness--; + /* Set new brightness step. */ + PIN_brightness_set (pin_brightness, true); + } + if (fiber_brightness > 1) + { + /* Decrease brightness step. */ + fiber_brightness--; + /* Set new brightness step. */ + FIBER_brightness_set (fiber_brightness, true); + } + } + break; + + case EVENT_INCREASE_PIN_BRIGHTNESS: + pin_brightness = PIN_brightness_get (); + fiber_brightness = FIBER_brightness_get (); + + /* If both are inactive, default to pin. */ + if (!pin_brightness && !fiber_brightness) + { + if (pin_brightness < PIN_BRIGHTNESS_STEPS) + { + /* Increase brightness step. */ + pin_brightness++; + /* Set new brightness step. */ + PIN_brightness_set (pin_brightness, true); + } + } + /* Pin LEDs are active. */ + else if (pin_brightness && !fiber_brightness) + { + if (pin_brightness < PIN_BRIGHTNESS_STEPS) + { + /* Increase brightness step. */ + pin_brightness++; + /* Set new brightness step. */ + PIN_brightness_set (pin_brightness, true); + } + } + /* Fiber LEDs are active. */ + else if (fiber_brightness && !pin_brightness) + { + if (fiber_brightness < FIBER_BRIGHTNESS_STEPS) + { + /* Increase brightness step. */ + fiber_brightness++; + /* Set new brightness step. */ + FIBER_brightness_set (fiber_brightness, true); + } + } + /* Shouldn't have both active but in case both are... */ + else + { + if (pin_brightness < PIN_BRIGHTNESS_STEPS) + { + /* Increase brightness step. */ + pin_brightness++; + /* Set new brightness step. */ + PIN_brightness_set (pin_brightness, true); + } + if (fiber_brightness < FIBER_BRIGHTNESS_STEPS) + { + /* Increase brightness step. */ + fiber_brightness++; + /* Set new brightness step. */ + FIBER_brightness_set (fiber_brightness, true); + } + } + break; + + case EVENT_DECREASE_RING_BRIGHTNESS: + scope_ring_config = SCOPE_RING_config_get (); + + /* Do not fully disable. Minimum step of 1. */ + if (scope_ring_config.background_brightness > 1) + { + scope_ring_config.background_brightness--; + + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, scope_ring_config.background_brightness, false); + } + /* Do not fully disable. */ + if (scope_ring_config.indicators_brightness > 1) + { + scope_ring_config.indicators_brightness--; + + SCOPE_RING_brightness_set (SCOPE_RING_LED_INDICATORS, scope_ring_config.indicators_brightness, false); + } + /* Do not fully disable. */ + if (scope_ring_config.level_brightness > 1) + { + scope_ring_config.level_brightness--; + + SCOPE_RING_brightness_set (SCOPE_RING_LED_LEVEL, scope_ring_config.level_brightness, false); + } + + /* Saving one will save the rest stored in RAM. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, scope_ring_config.background_brightness, true); + break; + + case EVENT_INCREASE_RING_BRIGHTNESS: + scope_ring_config = SCOPE_RING_config_get (); + + /* Check if enabled and can be increased. */ + if (scope_ring_config.background_brightness && scope_ring_config.background_brightness < SCOPE_RING_BRIGHTNESS_STEPS) + { + scope_ring_config.background_brightness++; + + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, scope_ring_config.background_brightness, false); + } + /* Check if enabled and can be increased. */ + if (scope_ring_config.indicators_brightness && scope_ring_config.indicators_brightness < SCOPE_RING_BRIGHTNESS_STEPS) + { + scope_ring_config.indicators_brightness++; + + SCOPE_RING_brightness_set (SCOPE_RING_LED_INDICATORS, scope_ring_config.indicators_brightness, false); + } + /* Check if enabled and can be increased. */ + if (scope_ring_config.level_brightness && scope_ring_config.level_brightness < SCOPE_RING_BRIGHTNESS_STEPS) + { + scope_ring_config.level_brightness++; + + SCOPE_RING_brightness_set (SCOPE_RING_LED_LEVEL, scope_ring_config.level_brightness, false); + } + + /* Saving one will save the rest stored in RAM. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, scope_ring_config.background_brightness, true); + break; + + case EVENT_CONFIG_ENTER: + /* Set event busy flag for configuration. */ + _fsm_evt_busy = true; + + /* Enable 5V power. */ + POWER_enable (true); + + /* Reset timer. */ + _fsm_timeout_cnt = 0; + + /* Disable shot capture. */ + SHOT_CAPTURE_enable (false); + + switch (_fsm_evt_subconfig) + { + case _FSM_EVT_SUBCONFIG_BUBBLE_BRIGHTNESS: + /* Enable bubble and disable all other peripherals. */ + /* We set to default so user can see and know which one they are setting. */ + BUBBLE_brightness_set (BUBBLE_BRIGHTNESS_STEP_DEFAULT, true); + BUBBLE_enable (true); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + break; + + case _FSM_EVT_SUBCONFIG_PIN_BRIGHTNESS: + /* Enable pin and disable all other peripherals. */ + BUBBLE_enable (false); + FIBER_enable (false); + /* We set to default so user can see and know which one they are setting. */ + PIN_brightness_set (PIN_BRIGHTNESS_STEP_DEFAULT, true); + PIN_enable (true); + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + break; + + case _FSM_EVT_SUBCONFIG_FIBER_BRIGHTNESS: + /* Enable fiber and disable all other peripherals. */ + BUBBLE_enable (false); + /* We set to default so user can see and know which one they are setting. */ + FIBER_brightness_set (FIBER_BRIGHTNESS_STEP_DEFAULT, true); + FIBER_enable (true); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + break; + + case _FSM_EVT_SUBCONFIG_RING_BACKGROUND_COLOR: + /* Enable level and disable all other peripherals. */ + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + /* We set to default so user can see and know which one they are setting. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, SCOPE_RING_BRIGHTNESS_STEP_DEFAULT, true); + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_BACKGROUND_COLOR, FSM_CONFIG_BLINK_PERIOD_MS); + break; + + case _FSM_EVT_SUBCONFIG_RING_BACKGROUND_BRIGHTNESS: + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_BACKGROUND_BRIGHTNESS, 0); + break; + + case _FSM_EVT_SUBCONFIG_RING_LEVEL_COLOR: + /* Enable level and disable all other peripherals. */ + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + /* We set to default so user can see and know which one they are setting. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_LEVEL, SCOPE_RING_BRIGHTNESS_STEP_DEFAULT, true); + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_LEVEL_COLOR, FSM_CONFIG_BLINK_PERIOD_MS); + break; + + case _FSM_EVT_SUBCONFIG_RING_LEVEL_BRIGHTNESS: + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_LEVEL_BRIGHTNESS, 0); + break; + + case _FSM_EVT_SUBCONFIG_RING_INDICATORS_COLOR: + /* Enable level and disable all other peripherals. */ + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + /* We set to default so user can see and know which one they are setting. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_INDICATORS, SCOPE_RING_BRIGHTNESS_STEP_DEFAULT, true); + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_INDICATORS_COLOR, FSM_CONFIG_BLINK_PERIOD_MS); + break; + + case _FSM_EVT_SUBCONFIG_RING_INDICATORS_BRIGHTNESS: + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_INDICATORS_BRIGHTNESS, 0); + break; + + case _FSM_EVT_SUBCONFIG_LEVEL_SENSITIVITY: + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_LEVEL_SENSITIVITY, 0); + break; + + case _FSM_EVT_SUBCONFIG_LEVEL_OPTION: + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_LEVEL_OPTION, 0); + break; + } + break; + + case EVENT_SUBCONFIG_PREV: + /* Reset timer. */ + _fsm_timeout_cnt = 0; + + switch (_fsm_evt_subconfig) + { + case _FSM_EVT_SUBCONFIG_BUBBLE_BRIGHTNESS: + bubble_brightness = BUBBLE_brightness_get (); + + if (bubble_brightness > 0) + { + /* Decrease brightness step. */ + bubble_brightness--; + /* Set new brightness step. */ + BUBBLE_brightness_set (bubble_brightness, true); + /* Need to call enable again to update. */ + BUBBLE_enable (true); + } + break; + + case _FSM_EVT_SUBCONFIG_PIN_BRIGHTNESS: + pin_brightness = PIN_brightness_get (); + + if (pin_brightness > 0) + { + /* Decrease brightness step. */ + pin_brightness--; + /* Set new brightness step. */ + PIN_brightness_set (pin_brightness, true); + /* Need to call enable again to update. */ + PIN_enable (true); + } + break; + + case _FSM_EVT_SUBCONFIG_FIBER_BRIGHTNESS: + fiber_brightness = FIBER_brightness_get (); + + if (fiber_brightness > 0) + { + /* Decrease brightness step. */ + fiber_brightness--; + /* Set new brightness step. */ + FIBER_brightness_set (fiber_brightness, true); + /* Need to call enable again to update. */ + FIBER_enable (true); + } + break; + + case _FSM_EVT_SUBCONFIG_RING_BACKGROUND_COLOR: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.background_color == RGB_COLOR_RED) + { + /* Loop around. */ + scope_ring_config.background_color = RGB_COLOR_WHITE; + } + else + { + scope_ring_config.background_color--; + } + + /* Set new color. */ + SCOPE_RING_color_set (SCOPE_RING_LED_BACKGROUND, scope_ring_config.background_color); + break; + + case _FSM_EVT_SUBCONFIG_RING_BACKGROUND_BRIGHTNESS: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.background_brightness > 0) + { + /* Decrease brightness step. */ + scope_ring_config.background_brightness--; + /* Set new brightness step. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, scope_ring_config.background_brightness, true); + } + break; + + case _FSM_EVT_SUBCONFIG_RING_LEVEL_COLOR: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.level_color == RGB_COLOR_RED) + { + /* Loop around. */ + scope_ring_config.level_color = RGB_COLOR_WHITE; + } + else + { + scope_ring_config.level_color--; + } + + /* Set new color. */ + SCOPE_RING_color_set (SCOPE_RING_LED_LEVEL, scope_ring_config.level_color); + break; + + case _FSM_EVT_SUBCONFIG_RING_LEVEL_BRIGHTNESS: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.level_brightness > 0) + { + /* Decrease brightness step. */ + scope_ring_config.level_brightness--; + /* Set new brightness step. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_LEVEL, scope_ring_config.level_brightness, true); + } + break; + + case _FSM_EVT_SUBCONFIG_RING_INDICATORS_COLOR: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.indicators_color == RGB_COLOR_RED) + { + /* Loop around. */ + scope_ring_config.indicators_color = RGB_COLOR_WHITE; + } + else + { + scope_ring_config.indicators_color--; + } + + /* Set new color. */ + SCOPE_RING_color_set (SCOPE_RING_LED_INDICATORS, scope_ring_config.indicators_color); + break; + + case _FSM_EVT_SUBCONFIG_RING_INDICATORS_BRIGHTNESS: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.indicators_brightness > 0) + { + /* Decrease brightness step. */ + scope_ring_config.indicators_brightness--; + /* Set new brightness step. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_INDICATORS, scope_ring_config.indicators_brightness, true); + } + break; + + case _FSM_EVT_SUBCONFIG_LEVEL_SENSITIVITY: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.level_sensitivity < (float) SCOPE_RING_LEVEL_SENSITIVITY_MAX) + { + /* Decrease sensitivity. */ + scope_ring_config.level_sensitivity+=0.25f; + /* Set new level sensitivity. */ + SCOPE_RING_level_sensitivity_set (scope_ring_config.level_sensitivity); + } + break; + + case _FSM_EVT_SUBCONFIG_LEVEL_OPTION: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.level_option > SCOPE_RING_LEVEL_OPTION_0) + { + /* Decrease option. */ + scope_ring_config.level_option--; + /* Set new level option. */ + SCOPE_RING_level_option_set (scope_ring_config.level_option); + } + break; + } + break; + + case EVENT_SUBCONFIG_MODE_CHANGE: + /* Reset timer. */ + _fsm_timeout_cnt = 0; + + if (_fsm_evt_subconfig == _FSM_EVT_SUBCONFIG_LEVEL_OPTION) + { + /* Circled around. Exit */ + /* Reset subevent for next configuration. */ + _fsm_evt_subconfig = _FSM_EVT_SUBCONFIG_BUBBLE_BRIGHTNESS; + + /* Reset event so we are no longer in subconfig. */ + EVENT_reset (); + + /* Reset event busy flag for configuration. */ + _fsm_evt_busy = false; + + _fsm_state_set (FSM_LEVELING); + + /* Set state entry flag for next FSM entry. */ + _fsm_state_entry = true; + break; + } + else + { + _fsm_evt_subconfig = (_fsm_evt_subconfig_e) (_fsm_evt_subconfig + 1); + } + switch (_fsm_evt_subconfig) + { + case _FSM_EVT_SUBCONFIG_BUBBLE_BRIGHTNESS: + /* Enable bubble and disable all other peripherals. */ + /* We set to default so user can see and know which one they are setting. */ + BUBBLE_brightness_set (BUBBLE_BRIGHTNESS_STEP_DEFAULT, true); + BUBBLE_enable (true); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + break; + + case _FSM_EVT_SUBCONFIG_PIN_BRIGHTNESS: + /* Enable pin and disable all other peripherals. */ + BUBBLE_enable (false); + FIBER_enable (false); + /* We set to default so user can see and know which one they are setting. */ + PIN_brightness_set (PIN_BRIGHTNESS_STEP_DEFAULT, true); + PIN_enable (true); + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + break; + + case _FSM_EVT_SUBCONFIG_FIBER_BRIGHTNESS: + /* Enable fiber and disable all other peripherals. */ + BUBBLE_enable (false); + /* We set to default so user can see and know which one they are setting. */ + FIBER_brightness_set (FIBER_BRIGHTNESS_STEP_DEFAULT, true); + FIBER_enable (true); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + break; + + case _FSM_EVT_SUBCONFIG_RING_BACKGROUND_COLOR: + /* Enable level and disable all other peripherals. */ + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + /* We set to default so user can see and know which one they are setting. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, SCOPE_RING_BRIGHTNESS_STEP_DEFAULT, true); + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_BACKGROUND_COLOR, FSM_CONFIG_BLINK_PERIOD_MS); + break; + + case _FSM_EVT_SUBCONFIG_RING_BACKGROUND_BRIGHTNESS: + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_BACKGROUND_BRIGHTNESS, 0); + break; + + case _FSM_EVT_SUBCONFIG_RING_LEVEL_COLOR: + /* Enable level and disable all other peripherals. */ + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + /* We set to default so user can see and know which one they are setting. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_LEVEL, SCOPE_RING_BRIGHTNESS_STEP_DEFAULT, true); + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_LEVEL_COLOR, FSM_CONFIG_BLINK_PERIOD_MS); + break; + + case _FSM_EVT_SUBCONFIG_RING_LEVEL_BRIGHTNESS: + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_LEVEL_BRIGHTNESS, 0); + break; + + case _FSM_EVT_SUBCONFIG_RING_INDICATORS_COLOR: + /* Enable level and disable all other peripherals. */ + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + /* We set to default so user can see and know which one they are setting. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_INDICATORS, SCOPE_RING_BRIGHTNESS_STEP_DEFAULT, true); + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_INDICATORS_COLOR, FSM_CONFIG_BLINK_PERIOD_MS); + break; + + case _FSM_EVT_SUBCONFIG_RING_INDICATORS_BRIGHTNESS: + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_INDICATORS_BRIGHTNESS, 0); + break; + + case _FSM_EVT_SUBCONFIG_LEVEL_SENSITIVITY: + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_LEVEL_SENSITIVITY, 0); + break; + + case _FSM_EVT_SUBCONFIG_LEVEL_OPTION: + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_LEVEL_OPTION, 0); + break; + } + break; + + case EVENT_SUBCONFIG_NEXT: + /* Reset timer. */ + _fsm_timeout_cnt = 0; + + switch (_fsm_evt_subconfig) + { + case _FSM_EVT_SUBCONFIG_BUBBLE_BRIGHTNESS: + bubble_brightness = BUBBLE_brightness_get (); + + if (bubble_brightness < BUBBLE_BRIGHTNESS_STEPS) + { + /* Increase brightness step. */ + bubble_brightness++; + /* Set new brightness step. */ + BUBBLE_brightness_set (bubble_brightness, true); + /* Need to call enable again to update. */ + BUBBLE_enable (true); + } + break; + + case _FSM_EVT_SUBCONFIG_PIN_BRIGHTNESS: + pin_brightness = PIN_brightness_get (); + + if (pin_brightness < PIN_BRIGHTNESS_STEPS) + { + /* Increase brightness step. */ + pin_brightness++; + /* Set new brightness step. */ + PIN_brightness_set (pin_brightness, true); + /* Need to call enable again to update. */ + PIN_enable (true); + } + break; + + case _FSM_EVT_SUBCONFIG_FIBER_BRIGHTNESS: + fiber_brightness = FIBER_brightness_get (); + + if (fiber_brightness < FIBER_BRIGHTNESS_STEPS) + { + /* Increase brightness step. */ + fiber_brightness++; + /* Set new brightness step. */ + FIBER_brightness_set (fiber_brightness, true); + /* Need to call enable again to update. */ + FIBER_enable (true); + } + break; + + case _FSM_EVT_SUBCONFIG_RING_BACKGROUND_COLOR: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.background_color == RGB_COLOR_WHITE) + { + /* Loop around. */ + scope_ring_config.background_color = RGB_COLOR_RED; + } + else + { + scope_ring_config.background_color++; + } + + /* Set new color. */ + SCOPE_RING_color_set (SCOPE_RING_LED_BACKGROUND, scope_ring_config.background_color); + break; + + case _FSM_EVT_SUBCONFIG_RING_BACKGROUND_BRIGHTNESS: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.background_brightness < SCOPE_RING_BRIGHTNESS_STEPS) + { + /* Increase brightness step. */ + scope_ring_config.background_brightness++; + /* Set new brightness step. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, scope_ring_config.background_brightness, true); + } + break; + + case _FSM_EVT_SUBCONFIG_RING_LEVEL_COLOR: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.level_color == RGB_COLOR_WHITE) + { + /* Loop around. */ + scope_ring_config.level_color = RGB_COLOR_RED; + } + else + { + scope_ring_config.level_color++; + } + + /* Set new color. */ + SCOPE_RING_color_set (SCOPE_RING_LED_LEVEL, scope_ring_config.level_color); + break; + + case _FSM_EVT_SUBCONFIG_RING_LEVEL_BRIGHTNESS: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.level_brightness < SCOPE_RING_BRIGHTNESS_STEPS) + { + /* Increase brightness step. */ + scope_ring_config.level_brightness++; + /* Set new brightness step. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_LEVEL, scope_ring_config.level_brightness, true); + } + break; + + case _FSM_EVT_SUBCONFIG_RING_INDICATORS_COLOR: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.indicators_color == RGB_COLOR_WHITE) + { + /* Loop around. */ + scope_ring_config.indicators_color = RGB_COLOR_RED; + } + else + { + scope_ring_config.indicators_color++; + } + + /* Set new color. */ + SCOPE_RING_color_set (SCOPE_RING_LED_INDICATORS, scope_ring_config.indicators_color); + break; + + case _FSM_EVT_SUBCONFIG_RING_INDICATORS_BRIGHTNESS: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.indicators_brightness < SCOPE_RING_BRIGHTNESS_STEPS) + { + /* Increase brightness step. */ + scope_ring_config.indicators_brightness++; + /* Set new brightness step. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_INDICATORS, scope_ring_config.indicators_brightness, true); + } + break; + + case _FSM_EVT_SUBCONFIG_LEVEL_SENSITIVITY: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.level_sensitivity > (float) SCOPE_RING_LEVEL_SENSITIVITY_MIN) + { + /* Increase sensitivity. */ + scope_ring_config.level_sensitivity-=0.25f; + /* Set new level sensitivity. */ + SCOPE_RING_level_sensitivity_set (scope_ring_config.level_sensitivity); + } + break; + + case _FSM_EVT_SUBCONFIG_LEVEL_OPTION: + scope_ring_config = SCOPE_RING_config_get (); + + if (scope_ring_config.level_option < (SCOPE_RING_LEVEL_OPTION_COUNT - 1)) + { + /* Increase option. */ + scope_ring_config.level_option++; + /* Set new level option. */ + SCOPE_RING_level_option_set (scope_ring_config.level_option); + } + break; + } + break; + + case EVENT_CONFIG_EXIT: + /* Reset subevent for next configuration. */ + _fsm_evt_subconfig = _FSM_EVT_SUBCONFIG_BUBBLE_BRIGHTNESS; + + /* Reset event busy flag for configuration. */ + _fsm_evt_busy = false; + + /* Set state entry flag for first iteration in FSM. */ + _fsm_state_entry = true; + + _fsm_state_set (FSM_LEVELING); + break; + + case EVENT_AUTO_BRIGHTNESS: + /* Toggle auto brightness setting. */ + FSM_auto_brightness_set (!_fsm_config.auto_brightness); + PRINT (INFO, "auto brightness = %d...\r\n", _fsm_config.auto_brightness); + break; + + case EVENT_BLE_ENABLE: + _fsm_state_set (FSM_BLE_ENABLE); + BLE_enable (true, true); + break; + + case EVENT_BLE_DISABLE: + _fsm_state_set (FSM_BLE_DISABLE); + BLE_enable (false, true); + break; + + case EVENT_BLE_CONNECTED: + break; + + case EVENT_BLE_DISCONNECTED: + break; + + case EVENT_FACTORY_RESET: + // TODO / FIXME : Maybe we don't want to erase the entire flash if we event logs are used. + APP_factory_reset (); + break; + + case EVENT_SUBCAL_START: + /* Set event busy flag for calibration. */ + _fsm_evt_busy = true; + + /* Enable 5V power. */ + POWER_enable (true); + + /* Reset timer. */ + _fsm_timeout_cnt = 0; + + /* Disable shot capture. */ + SHOT_CAPTURE_enable (false); + + /* Default subcal event state is _FSM_EVT_SUBCAL_SET_FLAT. */ + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_SET_FLAT, 0); + break; + + + case EVENT_SUBCAL_NEXT: + /* Reset timer. */ + _fsm_timeout_cnt = 0; + + if (_fsm_evt_subcal == _FSM_EVT_SUBCAL_FRONT) + { + /* Circled around. Exit */ + /* Reset subevent for next calibration. */ + _fsm_evt_subcal = _FSM_EVT_SUBCAL_SET_FLAT; + + /* Reset event so we are no longer in subcal. */ + EVENT_reset (); + + /* Reset event busy flag for configuration. */ + _fsm_evt_busy = false; + + _fsm_state_set (FSM_LEVELING); + break; + } + else + { + _fsm_evt_subcal = (_fsm_evt_subcal_e) (_fsm_evt_subcal + 1); + } + + switch (_fsm_evt_subcal) + { + case _FSM_EVT_SUBCAL_SET_FLAT: + _fsm_evt_busy = true; + SCOPE_RING_state_set (SCOPE_RING_STATE_SET_FLAT, 0); + break; + + case _FSM_EVT_SUBCAL_FLAT: + _fsm_evt_busy = false; + _fsm_state_set (FSM_FLAT_CALIBRATE); + break; + + case _FSM_EVT_SUBCAL_SET_BACK: + _fsm_evt_busy = true; + SCOPE_RING_state_set (SCOPE_RING_STATE_SET_BACK, 0); + break; + + case _FSM_EVT_SUBCAL_BACK: + _fsm_evt_busy = false; + _fsm_state_set (FSM_BACK_CALIBRATE); + break; + + case _FSM_EVT_SUBCAL_SET_FRONT: + _fsm_evt_busy = true; + SCOPE_RING_state_set (SCOPE_RING_STATE_SET_FRONT, 0); + break; + + case _FSM_EVT_SUBCAL_FRONT: + _fsm_evt_busy = false; + _fsm_state_set (FSM_FRONT_CALIBRATE); + break; + } + break; + + case EVENT_SHOT_DETECTED: + if (_fsm_config.mode == FSM_MODE_3D) + { + _fsm_state_set (FSM_3D_SLEEP); + } + else + { + /* If shot is detected, reset timeout counter and motion timer. */ + _fsm_timeout_cnt = 0; + _fsm_motion_timer = 0; + } + break; + + default: + break; + } +} + +static void _fsm_auto_brightness (bool enabled) +{ + static bool was_enabled = false; + static uint8_t bubble_brightness; + static uint8_t fiber_brightness; + static uint8_t pin_brightness; + static SCOPE_RING_config_s scope_ring_config; + uint8_t step; + + if (!enabled && !was_enabled) + { + return; + } + else if (enabled && !was_enabled) + { + /* Preserve settings. */ + bubble_brightness = BUBBLE_brightness_get (); + fiber_brightness = FIBER_brightness_get (); + pin_brightness = PIN_brightness_get (); + scope_ring_config = SCOPE_RING_config_get (); + } + + if (enabled) + { + step = LIGHT_SENSOR_step_get (); + /* Handle return step of 0 (total darkness). */ + if (step == 0) + { + /* Set to minimum so we can still see LEDs. */ + step = 1; + } + + /* Read current config for bubble to see if configured to be on. */ + if (bubble_brightness) + { + /* If configured to be on, we scale to light sensor step reading, but do not save config. */ + BUBBLE_brightness_set (step, false); + } + /* Read current config for fiber to see if configured to be on. */ + if (fiber_brightness) + { + /* If configured to be on, we scale to light sensor step reading, but do not save config. */ + FIBER_brightness_set (step, false); + } + /* Read current config for pin to see if configured to be on. */ + if (pin_brightness) + { + /* If configured to be on, we scale to light sensor step reading, but do not save config. */ + PIN_brightness_set (step, false); + } + /* Read current config for scope ring level to see if configured to be on. */ + if (scope_ring_config.level_brightness) + { + if (step < SCOPE_RING_BRIGHTNESS_STEPS) + { + /* If configured to be on, we scale to scope ring level step reading, but do not save config. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_LEVEL, (step + 1), false); + } + else + { + SCOPE_RING_brightness_set (SCOPE_RING_LED_LEVEL, step, false); + } + } + /* Read current config for scope ring indicators to see if configured to be on. */ + if (scope_ring_config.indicators_brightness) + { + if (step < SCOPE_RING_BRIGHTNESS_STEPS) + { + /* If configured to be on, we scale to scope ring indicators step reading, but do not save config. */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_INDICATORS, (step + 1), false); + } + else + { + SCOPE_RING_brightness_set (SCOPE_RING_LED_INDICATORS, step, false); + } + } + /* Read current config for scope ring background to see if configured to be on. */ + if (scope_ring_config.background_brightness) + { + /* If configured to be on, we scale to scope ring background step reading, but do not save config. + * NOTE: We cap brightness for background LEDs to 5 steps, since they are not needed when ambient + * lighting conditions are sufficient. Because of this we will need to scale (divide by 2). */ + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, (uint8_t) ((step / 2) + 1), false); + } + } + else + { + BUBBLE_brightness_set (bubble_brightness, false); + FIBER_brightness_set (fiber_brightness, false); + PIN_brightness_set (pin_brightness, false); + SCOPE_RING_brightness_set (SCOPE_RING_LED_LEVEL, scope_ring_config.level_brightness, false); + SCOPE_RING_brightness_set (SCOPE_RING_LED_INDICATORS, scope_ring_config.indicators_brightness, false); + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, scope_ring_config.background_brightness, false); + } + + was_enabled = enabled; +} + +static void _fsm_low_power_enter (bool wake_on_motion, bool wake_on_charge) +{ + k_sched_lock (); + (void) irq_lock (); + + if (wake_on_motion) + { + /* Set to leveling here because RAM is retained for the state when waking on boot. */ + _fsm_state_set (FSM_LEVELING); + + /* Enable RAM retention for FSM state.*/ + if (MCU_ram_retain ((uint8_t *) &_fsm_state, sizeof (_fsm_state), true) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to configure RAM retention for FSM state.\r\n"); + } + } + else + { + /* Disable RAM retention of FSM state.*/ + if (MCU_ram_retain ((uint8_t *) &_fsm_state, sizeof (_fsm_state), false) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to disable RAM retention for FSM state.\r\n"); + } + } + + /* Turn everything off. */ + SHOT_CAPTURE_enable (false); + BUBBLE_enable (false); + FIBER_enable (false); + PIN_enable (false); + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + + if (SHOT_CAPTURE_save_shot_cnt ()) + { + PRINT (INFO, "Failure to write shot count to flash before OFF.\r\n"); + } + + if (ALS_enable (false)) + { + PRINT (INFO, "Failure to disable ambient light sensor.\r\n"); + } + + if (wake_on_motion) + { + /* Enable interrupts from motion so system can wake. */ + /* Set lowest threshold to lowest threshold for motion/movement detection. + 1 LSB = range / 64 (e.g., for ±2g, 1 LSB ≈ 31.25 mg). */ + if (IMU_motion_int_enable (true, 0x2, 0x1)) + { + PRINT (INFO, "Failure to enable IMU motion interrupt.\r\n"); + } + } + else + { + /* Disable motion interrupt so IMU doesn't wake processor on motion. */ + if (IMU_motion_int_enable (false, 0x1, 0x0)) + { + PRINT (INFO, "Failure to disable IMU motion interrupt.\r\n"); + } + } + + if (IMU_sleep ()) + { + PRINT (INFO, "Failure to put IMU in sleep mode.\r\n"); + } + if (NVM_EXT_power_down ()) + { + PRINT (INFO, "Failure to power down flash.\r\n"); + } + if (POWER_enable (false)) + { + PRINT (INFO, "Failure to disable power.\r\n"); + } + + if (BATTERY_wake_on_charge (wake_on_charge)) + { + PRINT (INFO, "Failure to configure battery wake on charge.\r\n"); + } + + /* Reconfigure GPIO interrupt for center button to be used to wake from sleep. */ + if (BUTTON_wake_on_press (BUTTON_CENTER)) + { + PRINT (INFO, "Failure to configure GPIO center button as interrupt to wake from sleep. %d\r\n"); + } + + /* Put mcu to sleep. */ + MCU_sleep (); +} + +static void _fsm_battery_read (void) +{ + float voltage; + + if (BATTERY_voltage_get (&voltage) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to read battery voltage.\r\n"); + } + + _fsm_batt_life = BATTERY_level_calculate (voltage); + + /* Set battery status for feedback on LED ring. */ + SCOPE_RING_battery_indicator_set (_fsm_batt_life); + + /* Notify BLE of battery status. */ + BLE_notify (BLE_CHAR_BATTERY_LEVEL, &_fsm_batt_life, sizeof (_fsm_batt_life)); +} diff --git a/src/app/fsm.h b/src/app/fsm.h new file mode 100644 index 0000000..8598b9d --- /dev/null +++ b/src/app/fsm.h @@ -0,0 +1,139 @@ +/** + * @file fsm.h + * @brief Finite State Machine + * @author Kenny Tran + * @date July 13 2022 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef FSM_H_ +#define FSM_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "motion.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define FSM_TASK_PERIOD_MS (100) +#define FSM_STACK_SIZE (2048) +#define FSM_THREAD_PRIORITY (7) + +#define FSM_LOW_BATTERY_BLINK_PERIOD_MS (200) + +#define FSM_CONFIG_BLINK_PERIOD_MS (1000) +#define FSM_CONFIG_TIMEOUT_PERIOD_MS (300000) /* Timeout if stuck in config for 5 minutes. */ + +#define FSM_MOTION_TIMEOUT_PERIOD_MS (10000) +#define FSM_MOTION_TIMEOUT_MAX_MS (360000) /* 6 minutes. */ + +#define FSM_BUTTON_PRESS_DURATION_SLEEP_MS (3000) + +#define FSM_IDLE_TIMEOUT_PERIOD_MS (600000) /* If idle for 10 minutes, power down. */ + +#define FSM_CHARGER_CONNECTED_PERIOD_MS (400) +#define FSM_CHARGING_BLINK_PERIOD_MS (1000) + +#define FSM_FILENAME ("fsm") + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct FSM_config +{ + uint32_t motion_timeout_ms; + uint8_t auto_brightness : 8; + uint8_t mode : 2; + uint8_t reserved_0 : 6; + uint8_t reserved_1 : 8; + uint8_t reserved_2 : 8; +} __attribute__((packed, aligned(1))) FSM_config_s; + +typedef enum FSM_MODE +{ + FSM_MODE_TARGET = 0, + FSM_MODE_3D, + + FSM_MODE_COUNT, + FSM_MODE_INVALID = FSM_MODE_COUNT +} FSM_MODE_e; + +typedef enum FSM +{ + FSM_INIT = 0, + FSM_CHARGING, + FSM_LOW_BATTERY, + FSM_POWER_ON, + FSM_IDLE, + FSM_SLEEP, + FSM_3D_SLEEP, + FSM_CHARGER_CONNECTED, + FSM_CHARGER_DISCONNECTED, + FSM_LEVELING, + FSM_POWER_OFF, + FSM_OFF, + FSM_BATTERY_FULL, + FSM_BLE_ENABLE, + FSM_BLE_DISABLE, + + FSM_RAINBOW, + + FSM_FLAT_CALIBRATE, + FSM_BACK_CALIBRATE, + FSM_FRONT_CALIBRATE, + + FSM_DEBUG = 255 +} FSM_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void FSM_init (void); + +void FSM_level_calibrate (void); + +void FSM_task_suspend (void); + +void FSM_task_resume (void); + +void FSM_task_install (void); + +void FSM_timout_set (uint32_t ms); + +uint32_t FSM_timout_get (void); + +void FSM_auto_brightness_set (bool enabled); + +bool FSM_auto_brightness_get (void); + +void FSM_mode_set (FSM_MODE_e mode); + +FSM_MODE_e FSM_mode_get (void); + +void FSM_app_config_set (bool val); + +bool FSM_app_config_get (void); + +float FSM_battery_life_get (void); + +void FSM_cli_cmd (int32_t argc, char **argv); + + +#endif /* FSM_H_ */ diff --git a/src/app/light_sensor.c b/src/app/light_sensor.c new file mode 100644 index 0000000..a3460d5 --- /dev/null +++ b/src/app/light_sensor.c @@ -0,0 +1,210 @@ +/** + * @file light_sensor.c + * @brief Light Sensor Module + * @author Kenny Tran + * @date Mar 08 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "../bsp/als.h" + +#include "light_sensor.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define _LIGHT_SENSOR_BRIGHTNESS_MAX (65535) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static float _light_sensor_brightness_table[LIGHT_SENSOR_BRIGHTNESS_STEPS + 1]; +static uint8_t _light_sensor_step; +static ALS_data_s _light_sensor_data = (ALS_data_s) { + .visible = 0, + .infrared = 0 +}; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _light_sensor_brightness_gamma_populate (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void LIGHT_SENSOR_init (void) +{ + PRINT (INFO, "Initializing LIGHT_SENSOR...\r\n"); + + if (ALS_init () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize ALS\r\n"); + } + + /* Set gain to 4 */ + if (ALS_gain_set (ALS_GAIN_4) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to set ALS gain\r\n"); + } + + /* Set integration time to 100 ms */ + if (ALS_int_time_set (ALS_INT_TIME_100MS) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to set ALS integration time\r\n"); + } + + /* Set measurement rate to 500 ms */ + if (ALS_measure_rate_set (ALS_MEASURE_RATE_100MS) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to set ALS measurement rate\r\n"); + } + + /* TODO: configure gain and measurement time. Need to test heuristically to determine. */ + + /* Populate light sensor brightness gamma table. */ + _light_sensor_brightness_gamma_populate (); + + /* Enable LTR329 for each reading. */ + if (ALS_enable (true) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to enable ALS\r\n"); + } +} + +uint8_t LIGHT_SENSOR_step_get (void) +{ + uint8_t i; + bool new_data = false; + ALS_data_s reading; + uint32_t retries = 0; + + // /* Enable LTR329 for each reading. */ + // if (ALS_enable (true) != ERRNO_SUCCESS) + // { + // PRINT (ERROR, "Failure to enable ALS\r\n"); + // } + + /* Wait for new reading. */ + do { + if (ALS_new_data_available (&new_data) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to read ALS status"); + } + else + { + if (new_data) + { + break; + } + } + retries++; + } while (retries < LIGHT_SENSOR_READ_TRIES); + + if (retries >= LIGHT_SENSOR_READ_TRIES) + { + return (LIGHT_SENSOR_BRIGHTNESS_STEPS / 2); + } + + /* Grab reading. */ + if (ALS_read (&reading) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to read ALS data"); + } + + /* Set local vars. */ + _light_sensor_data.visible = reading.visible; + _light_sensor_data.infrared = reading.infrared; + + /* Compare with companding table to get step. */ + for (i = 0; i < LIGHT_SENSOR_BRIGHTNESS_STEPS; i++) + { + /* NOTE: Currently only looking at visible. */ + if (_light_sensor_data.visible > _light_sensor_brightness_table[i]) + { + /* +1 since we want interface range 1-10. */ + _light_sensor_step = i + 1; + } + } + + // /* Disable LTR329 after reading to conserve power. */ + // if (ALS_enable (false) != ERRNO_SUCCESS) + // { + // PRINT (ERROR, "Failure to disable ALS\r\n"); + // } + + return _light_sensor_step; +} + +void LIGHT_SENSOR_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + /* Perform a reading. */ + LIGHT_SENSOR_step_get (); + + PRINT (INFO, "LIGHT SENSOR\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "Visible + IR : %d\r\n", (_light_sensor_data.visible + _light_sensor_data.infrared)); + PRINT (INFO, "Visible : %d\r\n", _light_sensor_data.visible); + PRINT (INFO, "IR : %d\r\n", _light_sensor_data.infrared); + PRINT (INFO, "Step : %d\r\n", _light_sensor_step); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _light_sensor_brightness_gamma_populate (void) +{ + const uint8_t n_zeroes = 1; + const uint8_t temp_steps = LIGHT_SENSOR_BRIGHTNESS_STEPS + n_zeroes; + float temp_arr[temp_steps + 1]; /* +1 to hold 0th value. */ + uint32_t i; + + /* Using a gamma correction factor of 3.5, the beginning of the curve are zeroes. + Therefore, we (heuristically) calculate with extra steps and count zeroes (n_zeroes) and + fill lookup table starting after zeroes. */ + for (i = 0; i <= temp_steps; i++) + { + temp_arr[i] = (float) pow (((float) i / (float) temp_steps), LIGHT_SENSOR_BRIGHTNESS_GAMMA_CF) * + (float) _LIGHT_SENSOR_BRIGHTNESS_MAX; + } + + /* We start index at 1 to reserve index 0 for 0 %. */ + _light_sensor_brightness_table[0] = 0.0; + + /* Fill lookup table with the non-zeroes. */ + for (i = 1; i <= LIGHT_SENSOR_BRIGHTNESS_STEPS; i++) + { + _light_sensor_brightness_table[i] = temp_arr[i + n_zeroes]; + } +} diff --git a/src/app/light_sensor.h b/src/app/light_sensor.h new file mode 100644 index 0000000..635076c --- /dev/null +++ b/src/app/light_sensor.h @@ -0,0 +1,52 @@ +/** + * @file light_sensor.h + * @brief Light Sensor Module + * @author Kenny Tran + * @date Mar 08 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef LIGHT_SENSOR_H_ +#define LIGHT_SENSOR_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define LIGHT_SENSOR_BRIGHTNESS_STEPS (10) +#define LIGHT_SENSOR_BRIGHTNESS_GAMMA_CF (4) /* Gamma correction factor */ + +#define LIGHT_SENSOR_READ_TRIES (10) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void LIGHT_SENSOR_init (void); + +uint8_t LIGHT_SENSOR_step_get (void); + +void LIGHT_SENSOR_cli_cmd (int32_t argc, char **argv); + + +#endif /* LIGHT_SENSOR_H_ */ diff --git a/src/app/log.c b/src/app/log.c new file mode 100644 index 0000000..2a0b0f9 --- /dev/null +++ b/src/app/log.c @@ -0,0 +1,192 @@ +/** + * @file log.c + * @brief Log Module + * @author Kenny Tran + * @date Jan 29 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include + +#include "../lib/fs.h" +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "../bsp/mcu.h" + +#include "../app/app.h" + +#include "log.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct k_work_delayable _log_delayed_work_s; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static FS_file_t _log_file; +static _log_delayed_work_s _log_delayed_work; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _log_open_file (void); +static void _log_mcu_reset (_log_delayed_work_s dly_work); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void LOG_init (void) +{ + PRINT (INFO, "Initializing LOG...\r\n"); + + /* Initialize filesystem. */ + if (FS_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize filesystem.\r\n"); + return; + } + + _log_open_file (); + + /* Initialize delayed function to reset MCU so prints still come through, + since immediate reset misses prints. */ + k_work_init_delayable (&_log_delayed_work, _log_mcu_reset); +} + +void LOG_msg (char *msg) +{ + // LOG_s log_entry; + + // /* Set power on count. */ + // log_entry.power_cnt = APP_info_get ().power_cnt; + + // /* Clear buffer. */ + // memset (log_entry.msg, 0, LOG_MAX_MSG_LEN); + + // /* Copy message. */ + // strcpy (log_entry.msg, msg); + + // if (FS_write (_log_file, (uint8_t *) &log_entry) != ERRNO_SUCCESS) + // { + // PRINT (ERROR, "Failed to log message to file.\r\n"); + // } + + // /* Schedule MCU reset. */ + // k_work_schedule (&_log_delayed_work, K_MSEC(500)); +} + +LOG_s LOG_last_get (void) +{ + ERRNO_e err; + LOG_s log_entry; + + /* Read file. */ + err = FS_read (_log_file, (uint8_t *) &log_entry, 0, sizeof (LOG_s)); + + /* Check file entry is valid. */ + if (err != ERRNO_SUCCESS) + { + log_entry.power_cnt = 0; + /* Clear buffer. */ + memset (log_entry.msg, 0, LOG_MAX_MSG_LEN); + } + + return log_entry; +} + +void LOG_cli_cmd (int32_t argc, char **argv) +{ + LOG_s log_entry = LOG_last_get (); + + if (argc == 0) + { + + PRINT (INFO, "LOG\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "Power-on Count : %d\r\n", log_entry.power_cnt); + PRINT (INFO, "Message : %s\r\n", log_entry.msg); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _log_open_file (void) +{ + ERRNO_e err; + LOG_s log_entry; + + err = FS_open_or_create (LOG_FILENAME, &_log_file, sizeof (LOG_s), LOG_ENTRY_DEPTH); + if (err == ERRNO_SUCCESS) + { + /* Read file. */ + err = FS_read (_log_file, (uint8_t *) &log_entry, 0, sizeof (LOG_s)); + + /* If file not valid, log initial entry. */ + if (err != ERRNO_SUCCESS) + { + LOG_msg ("Initial entry"); + } + } + else if (err == ERRNO_SIZE_MISMATCH) + { + /* Config has been modified, need to delete old file and write new configuration. */ + err = FS_delete (LOG_FILENAME); + + if (err != ERRNO_SUCCESS) + { + /* Something else is going on... */ + PRINT (ERROR, "Failure to delete old log file.\r\n"); + return; + } + + /* Create new file. */ + err = FS_open_or_create (LOG_FILENAME, &_log_file, sizeof (LOG_s), LOG_ENTRY_DEPTH); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to create log file.\r\n"); + } + else + { + PRINT (INFO, "New log file created successfully\r\n"); + } + + /* Log initial entry. */ + LOG_msg ("Initial entry"); + } +} + +static void _log_mcu_reset (_log_delayed_work_s dly_work) +{ + MCU_reset (true); +} diff --git a/src/app/log.h b/src/app/log.h new file mode 100644 index 0000000..606537f --- /dev/null +++ b/src/app/log.h @@ -0,0 +1,59 @@ +/** + * @file log.h + * @brief Log Module + * @author Kenny Tran + * @date Jan 29 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef LOG_H_ +#define LOG_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define LOG_MAX_MSG_LEN (64) +#define LOG_ENTRY_DEPTH (32) + +#define LOG_FILENAME ("log") + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct LOG +{ + uint32_t power_cnt; + uint8_t msg[LOG_MAX_MSG_LEN]; +} __attribute__((packed, aligned(1))) LOG_s; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void LOG_init (void); + +void LOG_msg (char *msg); + +LOG_s LOG_last_get (void); + +void LOG_cli_cmd (int32_t argc, char **argv); + + +#endif /* LOG_H_ */ diff --git a/src/app/motion.c b/src/app/motion.c new file mode 100644 index 0000000..09dc00d --- /dev/null +++ b/src/app/motion.c @@ -0,0 +1,664 @@ +/** + * @file motion.c + * @brief Motion Module + * @author Kenny Tran + * @date Jan 27 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include + +#include "../lib/fs.h" +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "../bsp/imu.h" +#include "../bsp/wdt.h" + +#include "../wrappers/gpio.h" + +#include "motion.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define _MOTION_PI ((float) 3.14159265359) +/* Exponential moving average filter constant (0.0 to 1.0, higher = more smoothing). + * Also used as scalar for sensor fusion. */ +#define _MOTION_ALPHA ((float) 0.5) + +#define _MOTION_GYRO_MAG_WINDOW_SIZE (10) + + +/*-------------------------------------------------------------------------------------------------- + * THREAD DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +K_THREAD_STACK_DEFINE(_motion_stack, MOTION_STACK_SIZE); + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static struct k_thread _motion_thread; +static FS_file_t _motion_file; +static MOTION_config_s _motion_config = { + .accel_cal = { + .offset = { .x = 0.0, .y = 0.0, .z = 0.0 }, + .scalar = { .x = 1.0, .y = 1.0, .z = 1.0 } + }, + .gyro_cal = { + .offset = { .x = 0.0, .y = 0.0, .z = 0.0 }, + .scalar = { .x = 1.0, .y = 1.0, .z = 1.0 } + }, + .angular_threshold = MOTION_ANG_THRESHOLD_DEFAULT, + .back_cross_axis_factor = 0.0, + .front_cross_axis_factor = 0.0, +}; +static MOTION_vector_s _motion_orientation = { .x = 0.0, .y = 0.0, .z = 0.0 }; +static IMU_data_s _motion_accel_data; +static IMU_data_s _motion_gyro_data; +static float _motion_dt; +static uint32_t _motion_recal_readings = 0; +static bool _motion_gyro_recalibrate = false; +static bool _motion_imu_detected = false; +static MOTION_calibration_data_s _motion_recal_gyro = { .offset = { .x = 0.0, .y = 0.0, .z = 0.0 }, + .scalar = { .x = 1.0, .y = 1.0, .z = 1.0 } }; + +static uint32_t _motion_cal_readings[MOTION_CAL_ORIENTATION_COUNT] = { 0, 0, 0 }; +static bool _motion_cal[MOTION_CAL_ORIENTATION_COUNT] = { false, false, false }; + +/* Variables to dump measured X and Y angles to terminal. */ +static uint32_t _motion_timeout_cnt = 0; +static bool _motion_data_dump = false; +static uint32_t _motion_data_dump_ms = 0; + +/* Variables to to calculate angular magnitude for motion from gyro. */ +static float _motion_angular_mag = 0.0; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _motion_task (void *p1, void *p2, void *p3); +static void _motion_config_read (void); +static void _motion_config_write (void); +static void _motion_data_process (MOTION_vector_s accel_raw, MOTION_vector_s gyro_raw, float dt); +static MOTION_vector_s _motion_apply_cal (MOTION_vector_s raw, MOTION_calibration_data_s cal); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void MOTION_init (void) +{ + PRINT (INFO, "Initializing MOTION...\r\n"); + + /* Initialize IMU. */ + if (IMU_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize IMU.\r\n"); + } + + /* Set delta time, / by 1000.0 to get seconds. */ + _motion_dt = (float) MOTION_TASK_PERIOD_MS / (float) 1000.0; + + /* Get configuration settings. */ + _motion_config_read (); +} + +bool MOTION_linear_detected (void) +{ + bool detected = _motion_imu_detected; + + /* Reset motion detected flag. */ + _motion_imu_detected = false; + + return detected; +} + +bool MOTION_angular_detected (void) +{ + static float mag_history[_MOTION_GYRO_MAG_WINDOW_SIZE] = { 0 }; + static float sum = 0.0f; /* Running sum for average. */ + static float sum_sq = 0.0f; /* Running sum of squares for variance. */ + static uint8_t idx = 0; + + /* Remove old value from sum. */ + float old_mag = mag_history[idx]; + sum -= old_mag; + sum_sq -= (old_mag * old_mag); + + /* Add new value to sums */ + mag_history[idx] = _motion_angular_mag; + sum += _motion_angular_mag; + sum_sq += (_motion_angular_mag * _motion_angular_mag); + + /* Update index */ + idx = (idx + 1) % _MOTION_GYRO_MAG_WINDOW_SIZE; + + /* Calculate variance: Var(X) = E[X²] - E[X]² */ + float mean = sum / _MOTION_GYRO_MAG_WINDOW_SIZE; + float mean_sq = sum_sq / _MOTION_GYRO_MAG_WINDOW_SIZE; + float variance = mean_sq - (mean * mean); + + /* Detect motion when variance exceeds threshold */ + return (variance >= _motion_config.angular_threshold); +} + +void MOTION_angular_threshold_set (float variance) +{ + _motion_config.angular_threshold = variance; + + /* Write new threshold to flash. */ + _motion_config_write (); +} + +float MOTION_angle_get (MOTION_axis_e axis) +{ + float comp; + + switch (axis) + { + case MOTION_AXIS_X: + /* y relative to IMU, x relative to board */ + return (_motion_orientation.y); + + case MOTION_AXIS_Y: + /* x relative to IMU, y relative to board */ + if (_motion_orientation.y > 0) + { + comp = (_motion_orientation.y * _motion_config.back_cross_axis_factor); + } + else + { + comp = (_motion_orientation.y * _motion_config.front_cross_axis_factor); + } + + return (_motion_orientation.x - comp); + + default: + PRINT (ERROR, "Invalid axis.\r\n"); + return 1234.567; + } +} + +void MOTION_calibrate (MOTION_cal_orientation_e orientation) +{ + if (orientation >= MOTION_CAL_ORIENTATION_INVALID) + { + PRINT (ERROR, "Invalid calibration orientation.\r\n"); + return; + } + + /* Reset motion calibration readings. */ + _motion_cal[(uint32_t) orientation] = true; + _motion_cal_readings[(uint32_t) orientation] = 0; +} + +float MOTION_calibrate_status_get (MOTION_cal_orientation_e orientation) +{ + if (orientation >= MOTION_CAL_ORIENTATION_INVALID) + { + PRINT (ERROR, "Invalid calibration orientation.\r\n"); + return 1.0; + } + + return ((float) _motion_cal_readings[(uint32_t) orientation] / (float) MOTION_CAL_READINGS); +} + +void MOTION_gyro_recalibrate (void) +{ + /* Reset motion recalibration readings. */ + _motion_recal_readings = 0; + + _motion_recal_gyro = (MOTION_calibration_data_s) { .offset = { .x = 0.0, .y = 0.0, .z = 0.0 }, + .scalar = { .x = 1.0, .y = 1.0, .z = 1.0 } }; + + _motion_gyro_recalibrate = true; +} + +void MOTION_gyro_recalibrate_abort (void) +{ + _motion_gyro_recalibrate = false; +} + +float MOTION_gyro_recalibrate_status_get (void) +{ + return ((float) _motion_recal_readings / (float) MOTION_GYRO_RECAL_READINGS); +} + +MOTION_config_s *MOTION_config_get (void) +{ + return &_motion_config; +} + +void MOTION_config_set (MOTION_config_s cfg) +{ + _motion_config = cfg; + + _motion_config_write (); +} + +void MOTION_task_suspend (void) +{ + k_thread_suspend (&_motion_thread); +} + +void MOTION_task_resume (void) +{ + k_thread_resume (&_motion_thread); +} + +void MOTION_task_install (void) +{ + static k_tid_t id; + + id = k_thread_create (&_motion_thread, + _motion_stack, + MOTION_STACK_SIZE, + _motion_task, + NULL, + NULL, + NULL, + MOTION_THREAD_PRIORITY, + 0, + K_NO_WAIT); + k_thread_name_set(&_motion_thread, "MOTION_task"); +} + +void MOTION_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + float x_adjusted = MOTION_angle_get (MOTION_AXIS_X); + float y_adjusted = MOTION_angle_get (MOTION_AXIS_Y); + + PRINT (INFO, "MOTION\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "X (Corrected) : %.3f\r\n", (double) x_adjusted); + PRINT (INFO, "Y (Corrected) : %.3f\r\n", (double) y_adjusted); + PRINT (INFO, "Angular Threshold : %.3f\r\n", (double) _motion_config.angular_threshold); + PRINT (INFO, "Back Cal Factor : %.3f\r\n", (double) _motion_config.back_cross_axis_factor); + PRINT (INFO, "Front Cal Factor : %.3f\r\n", (double) _motion_config.front_cross_axis_factor); + PRINT (INFO, "Calibration Data\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "Accelerometer\r\n"); + PRINT (INFO, " Offset X : %.3f\r\n", (double) _motion_config.accel_cal.offset.x); + PRINT (INFO, " Offset Y : %.3f\r\n", (double) _motion_config.accel_cal.offset.y); + PRINT (INFO, " Offset Z : %.3f\r\n", (double) _motion_config.accel_cal.offset.z); + PRINT (INFO, " Scalar X : %.3f\r\n", (double) _motion_config.accel_cal.scalar.x); + PRINT (INFO, " Scalar Y : %.3f\r\n", (double) _motion_config.accel_cal.scalar.y); + PRINT (INFO, " Scalar Z : %.3f\r\n", (double) _motion_config.accel_cal.scalar.z); + PRINT (INFO, "Gyroscope\r\n"); + PRINT (INFO, " Offset X : %.3f\r\n", (double) _motion_config.gyro_cal.offset.x); + PRINT (INFO, " Offset Y : %.3f\r\n", (double) _motion_config.gyro_cal.offset.y); + PRINT (INFO, " Offset Z : %.3f\r\n", (double) _motion_config.gyro_cal.offset.z); + PRINT (INFO, " Scalar X : %.3f\r\n", (double) _motion_config.gyro_cal.scalar.x); + PRINT (INFO, " Scalar Y : %.3f\r\n", (double) _motion_config.gyro_cal.scalar.y); + PRINT (INFO, " Scalar Z : %.3f\r\n", (double) _motion_config.gyro_cal.scalar.z); + } + else if (argc == 2) + { + if (!strcmp (argv[0], "--cal")) + { + MOTION_cal_orientation_e orientation = (MOTION_cal_orientation_e) strtoul (argv[1], NULL, 0); + + PRINT (INFO, "Calibrating with %d readings...\r\n", MOTION_CAL_READINGS); + + MOTION_calibrate (orientation); + } + else if (!strcmp (argv[0], "--dump")) + { + _motion_data_dump_ms = strtoul (argv[1], NULL, 0); + _motion_data_dump = true; + } + else if (!strcmp (argv[0], "--theta")) + { + float deg = strtof (argv[1], NULL); + + MOTION_angular_threshold_set (deg); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: motion [OPTION...]\r\n"); + PRINT (INFO, " --cal Calibrates IMU (offsets).\r\n"); + PRINT (INFO, " <%%d> 0 = flat, 1, = back, 2 = front.\r\n"); + PRINT (INFO, " --dump Dumps calculated angles to terminal.\r\n"); + PRINT (INFO, " <%%d> Duration in milliseconds.\r\n"); + PRINT (INFO, " --theta Sets new angular threshold.\r\n"); + PRINT (INFO, " <%%f> Value to set.\r\n"); + } +} + +void MOTION_detected_flag_set (void) +{ + _motion_imu_detected = true; +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _motion_task (void *p1, void *p2, void *p3) +{ + while (1) + { + /* Read accelerometer data. */ + if (IMU_xl_read (&_motion_accel_data) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to read IMU accel data.\r\n"); + } + + /* Read gyroscope data. */ + if (IMU_gyro_read (&_motion_gyro_data) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to read IMU gyro data.\r\n"); + } + + _motion_data_process ((MOTION_vector_s) _motion_accel_data, (MOTION_vector_s) _motion_gyro_data, _motion_dt); + + if (_motion_cal[MOTION_CAL_ORIENTATION_FLAT]) + { + static MOTION_calibration_data_s accel = { .offset = { .x = 0.0, .y = 0.0, .z = 0.0 }, + .scalar = { .x = 0.0, .y = 0.0, .z = 0.0 } }; + static MOTION_calibration_data_s gyro = { .offset = { .x = 0.0, .y = 0.0, .z = 0.0 }, + .scalar = { .x = 0.0, .y = 0.0, .z = 0.0 } }; + + accel.offset.x += _motion_accel_data.x; + accel.offset.y += _motion_accel_data.y; + accel.offset.z += _motion_accel_data.z; + + gyro.offset.x += _motion_gyro_data.x; + gyro.offset.y += _motion_gyro_data.y; + gyro.offset.z += _motion_gyro_data.z; + + if (++_motion_cal_readings[MOTION_CAL_ORIENTATION_FLAT] == MOTION_CAL_READINGS) + { + _motion_config.accel_cal.offset.x = accel.offset.x / (float) MOTION_CAL_READINGS; + _motion_config.accel_cal.offset.y = accel.offset.y / (float) MOTION_CAL_READINGS; + /* Add 1G (gravity) for z, since IMU is pointing down. */ + _motion_config.accel_cal.offset.z = (accel.offset.z / (float) MOTION_CAL_READINGS) + 1.0f; + + _motion_config.gyro_cal.offset.x = gyro.offset.x / (float) MOTION_CAL_READINGS; + _motion_config.gyro_cal.offset.y = gyro.offset.y / (float) MOTION_CAL_READINGS; + _motion_config.gyro_cal.offset.z = gyro.offset.z / (float) MOTION_CAL_READINGS; + + /* Reset static values for next calibration. */ + _motion_cal[MOTION_CAL_ORIENTATION_FLAT] = false; + + PRINT (INFO, "\r\nCalibration complete!\r\n"); + + /* Write new settings to file. */ + _motion_config_write (); + + /* Reset static values in case calibration is ran again.*/ + accel = (MOTION_calibration_data_s) { .offset = { .x = 0.0, .y = 0.0, .z = 0.0 }, + .scalar = { .x = 0.0, .y = 0.0, .z = 0.0 } }; + gyro = (MOTION_calibration_data_s) { .offset = { .x = 0.0, .y = 0.0, .z = 0.0 }, + .scalar = { .x = 0.0, .y = 0.0, .z = 0.0 } }; + } + else if (_motion_cal_readings[MOTION_CAL_ORIENTATION_FLAT] % 10 == 0) + { + PRINT (INFO, ".\r\n"); + } + } + else if (_motion_cal[MOTION_CAL_ORIENTATION_BACK]) + { + static float x_sum = 0.0; + static float y_sum = 0.0; + + x_sum += _motion_orientation.x; + y_sum += _motion_orientation.y; + + if (++_motion_cal_readings[MOTION_CAL_ORIENTATION_BACK] == MOTION_CAL_READINGS) + { + x_sum /= (float) MOTION_CAL_READINGS; + y_sum /= (float) MOTION_CAL_READINGS; + + _motion_config.back_cross_axis_factor = x_sum / y_sum; + + /* Reset static values for next calibration. */ + _motion_cal[MOTION_CAL_ORIENTATION_BACK] = false; + + PRINT (INFO, "\r\nCalibration complete!\r\n"); + + /* Write new settings to file. */ + _motion_config_write (); + + /* Reset sums for next calibration. */ + x_sum = 0.0; + y_sum = 0.0; + } + else if (_motion_cal_readings[MOTION_CAL_ORIENTATION_BACK] % 10 == 0) + { + PRINT (INFO, ".\r\n"); + } + } + else if (_motion_cal[MOTION_CAL_ORIENTATION_FRONT]) + { + static float x_sum = 0.0; + static float y_sum = 0.0; + + x_sum += _motion_orientation.x; + y_sum += _motion_orientation.y; + + if (++_motion_cal_readings[MOTION_CAL_ORIENTATION_FRONT] == MOTION_CAL_READINGS) + { + x_sum /= (float) MOTION_CAL_READINGS; + y_sum /= (float) MOTION_CAL_READINGS; + + _motion_config.front_cross_axis_factor = x_sum / y_sum; + + /* Reset static values for next calibration. */ + _motion_cal[MOTION_CAL_ORIENTATION_FRONT] = false; + + PRINT (INFO, "\r\nCalibration complete!\r\n"); + + /* Write new settings to file. */ + _motion_config_write (); + + /* Reset sums for next calibration. */ + x_sum = 0.0; + y_sum = 0.0; + } + else if (_motion_cal_readings[MOTION_CAL_ORIENTATION_FRONT] % 10 == 0) + { + PRINT (INFO, ".\r\n"); + } + } + else if (_motion_gyro_recalibrate) + { + _motion_recal_gyro.offset.x += _motion_gyro_data.x; + _motion_recal_gyro.offset.y += _motion_gyro_data.y; + _motion_recal_gyro.offset.z += _motion_gyro_data.z; + + if (++_motion_recal_readings == MOTION_GYRO_RECAL_READINGS) + { + _motion_config.gyro_cal.offset.x = _motion_recal_gyro.offset.x / (float) MOTION_GYRO_RECAL_READINGS; + _motion_config.gyro_cal.offset.y = _motion_recal_gyro.offset.y / (float) MOTION_GYRO_RECAL_READINGS; + _motion_config.gyro_cal.offset.z = _motion_recal_gyro.offset.z / (float) MOTION_GYRO_RECAL_READINGS; + + /* Reset static values for next calibration. */ + _motion_gyro_recalibrate = false; + + /* Write new settings to file. */ + _motion_config_write (); + } + } + + if (_motion_data_dump) + { + if (_motion_timeout_cnt >= _motion_data_dump_ms) + { + /* Reset timeout count. */ + _motion_timeout_cnt = 0; + /* Reset data dump flag. */ + _motion_data_dump = false; + } + else + { + /* Increment timeout counter. */ + _motion_timeout_cnt += MOTION_TASK_PERIOD_MS; + } + + // PRINT (INFO, "x = %.3f, y = %.3f\r\n", (double) _motion_orientation.y, + // (double) _motion_orientation.x); + } + + /* Feed watchdog at end of loop. */ + WDT_feed (); + + k_msleep (MOTION_TASK_PERIOD_MS); + } +} + +static void _motion_config_read (void) +{ + ERRNO_e err; + MOTION_config_s cfg; + + err = FS_open_or_create (MOTION_FILENAME, &_motion_file, sizeof (MOTION_config_s), (FS_FILE_DEPTH_DEFAULT * 8)); + if (err == ERRNO_SUCCESS) + { + /* Read file. */ + err = FS_read (_motion_file, (uint8_t *) &cfg, 0, sizeof (MOTION_config_s)); + + /* Check file entry is valid. */ + if (err != ERRNO_SUCCESS) + { + /* Write defaults to file. */ + _motion_config_write (); + return; + } + + /* Validate read file. */ + // FIXME: find better way to validate + if (isnan (cfg.accel_cal.offset.x) || isnan (cfg.accel_cal.offset.y) || isnan (cfg.accel_cal.offset.z)) + { + cfg.accel_cal.offset = (MOTION_vector_s) { .x = 0.0, .y = 0.0, .z = 0.0 }; + } + if (isnan (cfg.accel_cal.scalar.x) || isnan (cfg.accel_cal.scalar.y) || isnan (cfg.accel_cal.scalar.z)) + { + cfg.accel_cal.scalar = (MOTION_vector_s) { .x = 1.0, .y = 1.0, .z = 1.0 }; + } + if (isnan (cfg.gyro_cal.offset.x) || isnan (cfg.gyro_cal.offset.y) || isnan (cfg.gyro_cal.offset.z)) + { + cfg.gyro_cal.offset = (MOTION_vector_s) { .x = 0.0, .y = 0.0, .z = 0.0 }; + } + if (isnan (cfg.gyro_cal.scalar.x) || isnan (cfg.gyro_cal.scalar.y) || isnan (cfg.gyro_cal.scalar.z)) + { + cfg.gyro_cal.scalar = (MOTION_vector_s) { .x = 1.0, .y = 1.0, .z = 1.0 }; + } + if (isnan (cfg.angular_threshold)) + { + cfg.angular_threshold = MOTION_ANG_THRESHOLD_DEFAULT; + } + + /* Update motion configuration to what was read from flash and validated. */ + _motion_config = cfg; + } + else if (err == ERRNO_SIZE_MISMATCH) + { + /* Config has been modified, need to delete old file and write new configuration. */ + err = FS_delete (MOTION_FILENAME); + + if (err != ERRNO_SUCCESS) + { + /* Something else is going on... */ + PRINT (ERROR, "Failure to delete old motion file.\r\n"); + return; + } + + /* Create new file. */ + err = FS_open_or_create (MOTION_FILENAME, &_motion_file, sizeof (MOTION_config_s), FS_FILE_DEPTH_DEFAULT); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to create motion configuration file.\r\n"); + } + else + { + PRINT (INFO, "New motion file created successfully\r\n"); + } + + /* Write default config to file. */ + _motion_config_write (); + } + else + { + /* Write defaults to file. */ + _motion_config_write (); + } +} + +static void _motion_config_write (void) +{ + if (FS_write (_motion_file, (uint8_t *) &_motion_config) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failed to write motion configuration to file.\r\n"); + } +} + +static void _motion_data_process (MOTION_vector_s accel_raw, MOTION_vector_s gyro_raw, float dt) +{ + /* Apply calibration parameters to raw data. */ + MOTION_vector_s accel_corrected = _motion_apply_cal (accel_raw, _motion_config.accel_cal); + MOTION_vector_s gyro_corrected = _motion_apply_cal (gyro_raw, _motion_config.gyro_cal); + + if (_motion_data_dump) + { + PRINT (INFO, "%.3f, %.3f, %.3f, %.3f, %.3f, %.3f\r\n", accel_corrected.x, accel_corrected.y, accel_corrected.z, + gyro_corrected.x, gyro_corrected.y, gyro_corrected.z); + } + + /* Integrate gyro rates. */ + float gyro_x = _motion_orientation.x + gyro_corrected.x * dt; + float gyro_y = _motion_orientation.y + gyro_corrected.y * dt; + + float accel_x = atan2f (accel_corrected.y, sqrtf(accel_corrected.x * accel_corrected.x + accel_corrected.z * accel_corrected.z)) * 180.0f / _MOTION_PI; + float accel_y = atan2f(-accel_corrected.x, sqrtf(accel_corrected.y * accel_corrected.y + accel_corrected.z * accel_corrected.z)) * 180.0f / _MOTION_PI; + + /* Smoothing filter. */ + _motion_orientation.x = _MOTION_ALPHA * gyro_x + ((1.0f - _MOTION_ALPHA) * accel_x); + _motion_orientation.y = _MOTION_ALPHA * gyro_y + ((1.0f - _MOTION_ALPHA) * accel_y); + /* Z angle cannot be determined from accel/gyro alone (need magnetometer). */ + _motion_orientation.z += (gyro_corrected.z * dt); + + /* Compute magnitude of angular velocity (deg/s) */ + _motion_angular_mag = sqrtf ((gyro_corrected.x * gyro_corrected.x) + + (gyro_corrected.y * gyro_corrected.y) + + (gyro_corrected.z * gyro_corrected.z)); +} + +static MOTION_vector_s _motion_apply_cal (MOTION_vector_s raw, MOTION_calibration_data_s cal) +{ + return (MOTION_vector_s) { + .x = (raw.x - cal.offset.x) * cal.scalar.x, + .y = (raw.y - cal.offset.y) * cal.scalar.y, + .z = (raw.z - cal.offset.z) * cal.scalar.z + }; +} + diff --git a/src/app/motion.h b/src/app/motion.h new file mode 100644 index 0000000..1273990 --- /dev/null +++ b/src/app/motion.h @@ -0,0 +1,120 @@ +/** + * @file motion.h + * @brief Motion Module + * @author Kenny Tran + * @date Jan 27 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef MOTION_H_ +#define MOTION_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../bsp/imu.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define MOTION_TASK_PERIOD_MS (50) +#define MOTION_STACK_SIZE (2048) +#define MOTION_THREAD_PRIORITY (6) + +#define MOTION_ANG_THRESHOLD_DEFAULT (0.035) +#define MOTION_CAL_READINGS (100) + +#define MOTION_GYRO_RECAL_READINGS (50) + +#define MOTION_FILENAME ("motion") + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef IMU_data_s MOTION_vector_s; + +typedef struct MOTION_calibration_data +{ + MOTION_vector_s offset; + MOTION_vector_s scalar; +} MOTION_calibration_data_s; + +typedef struct MOTION_config +{ + MOTION_calibration_data_s accel_cal; + MOTION_calibration_data_s gyro_cal; + float angular_threshold; + float back_cross_axis_factor; + float front_cross_axis_factor; +} __attribute__((packed, aligned(1))) MOTION_config_s; + +typedef enum MOTION_axis +{ + MOTION_AXIS_X = 0, + MOTION_AXIS_Y +} MOTION_axis_e; + +typedef enum MOTION_cal_orientation +{ + MOTION_CAL_ORIENTATION_FLAT = 0, + MOTION_CAL_ORIENTATION_BACK, + MOTION_CAL_ORIENTATION_FRONT, + + MOTION_CAL_ORIENTATION_COUNT, + MOTION_CAL_ORIENTATION_INVALID = MOTION_CAL_ORIENTATION_COUNT +} MOTION_cal_orientation_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void MOTION_init (void); + +bool MOTION_linear_detected (void); + +bool MOTION_angular_detected (void); + +void MOTION_angular_threshold_set (float variance); + +float MOTION_angle_get (MOTION_axis_e axis); + +void MOTION_calibrate (MOTION_cal_orientation_e orientation); + +float MOTION_calibrate_status_get (MOTION_cal_orientation_e orientation); + +void MOTION_gyro_recalibrate (void); + +void MOTION_gyro_recalibrate_abort (void); + +float MOTION_gyro_recalibrate_status_get (void); + +MOTION_config_s *MOTION_config_get (void); + +void MOTION_config_set (MOTION_config_s cfg); + +void MOTION_task_suspend (void); + +void MOTION_task_resume (void); + +void MOTION_task_install (void); + +void MOTION_cli_cmd (int32_t argc, char **argv); + +void MOTION_detected_flag_set (void); + +#endif /* MOTION_H_ */ diff --git a/src/app/pin.c b/src/app/pin.c new file mode 100644 index 0000000..51b081b --- /dev/null +++ b/src/app/pin.c @@ -0,0 +1,261 @@ +/** + * @file pin.c + * @brief Pin LED Module + * @author Kenny Tran + * @date Mar 08 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include "../lib/fs.h" +#include "../lib/errno.h" +#include "../lib/gamma.h" +#include "../lib/print.h" + +#include "../bsp/led.h" + +#include "ble.h" + +#include "pin.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static FS_file_t _pin_file; +static PIN_config_s _pin_config = (PIN_config_s) { + .brightness_step = PIN_BRIGHTNESS_STEP_DEFAULT, + .reserved_0 = 0xFF, + .reserved_1 = 0xFF, + .reserved_2 = 0xFF +}; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _pin_config_read (void); +static void _pin_config_write (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void PIN_init (void) +{ + PRINT (INFO, "Initializing PIN...\r\n"); + + if (LED_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize LEDs.\r\n"); + return; + } + + /* Initialize filesystem. */ + if (FS_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize filesystem.\r\n"); + return; + } + + /* Fetch configuration settings stored for pin. */ + _pin_config_read (); +} + +void PIN_brightness_set (uint8_t step, bool save_settings) +{ + if (step > PIN_BRIGHTNESS_STEPS) + { + PRINT (ERROR, "Invalid brightness step.\r\n"); + return; + } + + /* Set brightness step. */ + _pin_config.brightness_step = step; + + if (save_settings) + { + /* Write new settings to file. */ + _pin_config_write (); + + /* Notify changes to BLE subscriber. */ + BLE_notify (BLE_CHAR_PIN_BRIGHTNESS, &step, sizeof (step)); + } +} + +uint8_t PIN_brightness_get (void) +{ + return _pin_config.brightness_step; +} + +void PIN_enable (bool en) +{ + float duty; + + if (en) + { + /* 100 for 100% max duty cycle. PIN_BRIGHTNESS_STEPS + 1 extra step for off. */ + duty = (float) GAMMA_corrected_get ((uint32_t) _pin_config.brightness_step, + (uint32_t) (PIN_BRIGHTNESS_STEPS + 1), + (uint32_t) 100, + (double) PIN_BRIGHTNESS_GAMMA_CF); + } + else + { + duty = 0.0; + } + + if (LED_pwm_set (LED_PIN, duty) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to set pin LED brightness.\r\n"); + } +} + +void PIN_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + PRINT (INFO, "PIN UV LED\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "brightness_step (0 - %d) : %d\r\n", PIN_BRIGHTNESS_STEPS, _pin_config.brightness_step); + } + else if (argc == 2) + { + if (!strcmp (argv[0], "-e") || !strcmp (argv[0], "--enable")) + { + if (!strcmp (argv[1], "true")) + { + PIN_enable (true); + } + else if (!strcmp (argv[1], "false")) + { + PIN_enable (false); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-s")) + { + uint8_t step = (uint8_t) strtoul (argv[1], NULL, 0); + + PIN_brightness_set (step, true); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: pin [OPTION...]\r\n"); + PRINT (INFO, " -e | --enable Enables pin LED\r\n"); + PRINT (INFO, " <%%b> true = enable\r\n"); + PRINT (INFO, " false = disable\r\n"); + PRINT (INFO, " -s Sets pin UV LED brightness step\r\n"); + PRINT (INFO, " <%%d> Brightness step [0-%d]\r\n", PIN_BRIGHTNESS_STEPS); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _pin_config_read (void) +{ + ERRNO_e err; + PIN_config_s cfg; + + err = FS_open_or_create (PIN_FILENAME, &_pin_file, sizeof (PIN_config_s), FS_FILE_DEPTH_DEFAULT); + if (err == ERRNO_SUCCESS) + { + /* Read file. */ + err = FS_read (_pin_file, (uint8_t *) &cfg, 0, sizeof (PIN_config_s)); + + /* Check file entry is valid. */ + if (err != ERRNO_SUCCESS) + { + /* Write defaults to file. */ + _pin_config_write (); + return; + } + + /* Validate read file. */ + if (cfg.brightness_step > PIN_BRIGHTNESS_STEPS) + { + /* Write defaults to file. */ + _pin_config_write (); + return; + } + + /* Update pin configuration to what was read from flash and validated. */ + _pin_config = cfg; + } + else if (err == ERRNO_SIZE_MISMATCH) + { + /* Config has been modified, need to delete old file and write new configuration. */ + err = FS_delete (PIN_FILENAME); + + if (err != ERRNO_SUCCESS) + { + /* Something else is going on... */ + PRINT (ERROR, "Failure to delete old pin file.\r\n"); + return; + } + + /* Create new file. */ + err = FS_open_or_create (PIN_FILENAME, &_pin_file, sizeof (PIN_config_s), FS_FILE_DEPTH_DEFAULT); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to create pin configuration file.\r\n"); + } + else + { + PRINT (INFO, "New pin file created successfully\r\n"); + } + + /* Write default config to file. */ + _pin_config_write (); + } + else + { + /* Write defaults to file. */ + _pin_config_write (); + } +} + +static void _pin_config_write (void) +{ + if (FS_write (_pin_file, (uint8_t *) &_pin_config) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failed to write pin configuration to file.\r\n"); + } +} diff --git a/src/app/pin.h b/src/app/pin.h new file mode 100644 index 0000000..378f733 --- /dev/null +++ b/src/app/pin.h @@ -0,0 +1,65 @@ +/** + * @file pin.h + * @brief Pin LED Module + * @author Kenny Tran + * @date Mar 08 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef PIN_H_ +#define PIN_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define PIN_BRIGHTNESS_STEPS (10) +#define PIN_BRIGHTNESS_STEP_DEFAULT (5) +#define PIN_BRIGHTNESS_GAMMA_CF (1.6) /* Gamma correction factor */ + +#define PIN_FILENAME ("pin") + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct PIN_config +{ + uint8_t brightness_step : 8; + uint8_t reserved_0 : 8; + uint8_t reserved_1 : 8; + uint8_t reserved_2 : 8; +} __attribute__((packed, aligned(1))) PIN_config_s; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void PIN_init (void); + +void PIN_brightness_set (uint8_t step, bool save_settings); + +uint8_t PIN_brightness_get (void); + +void PIN_enable (bool en); + +void PIN_cli_cmd (int32_t argc, char **argv); + + +#endif /* PIN_H_ */ diff --git a/src/app/scope_ring.c b/src/app/scope_ring.c new file mode 100644 index 0000000..85e2094 --- /dev/null +++ b/src/app/scope_ring.c @@ -0,0 +1,1887 @@ +/** + * @file scope_ring.c + * @brief Scope ring module + * @author Kenny Tran + * @date Apr 05 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include + +#include "../lib/fs.h" +#include "../lib/errno.h" +#include "../lib/print.h" +#include "../lib/rgb.h" + +#include "../bsp/battery.h" +#include "../bsp/led_ring.h" +#include "../bsp/power.h" +#include "../bsp/wdt.h" + +#include "../app/ble.h" +#include "../app/motion.h" + +#include "scope_ring.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define _SCOPE_RING_N_LEDS (LED_RING_PIXELS) +#define _SCOPE_RING_R_INDICATOR_IDX (_SCOPE_RING_N_LEDS / 4) +#define _SCOPE_RING_L_INDICATOR_IDX (_SCOPE_RING_N_LEDS - _SCOPE_RING_R_INDICATOR_IDX) + + +/*-------------------------------------------------------------------------------------------------- + * THREAD DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +K_THREAD_STACK_DEFINE(_scope_ring_stack, SCOPE_RING_STACK_SIZE); + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static struct k_thread _scope_ring_thread; +static FS_file_t _scope_ring_file; +static SCOPE_RING_config_s _scope_ring_config = (SCOPE_RING_config_s) { + .indicators_color = SCOPE_RING_INDICATORS_COLOR_DEFAULT, + .indicators_brightness = SCOPE_RING_BRIGHTNESS_STEP_DEFAULT, + .level_color = SCOPE_RING_LEVEL_COLOR_DEFAULT, + .level_brightness = SCOPE_RING_BRIGHTNESS_STEP_DEFAULT, + .background_color = SCOPE_RING_BACKGROUND_COLOR_DEFAULT, + .background_brightness = SCOPE_RING_BRIGHTNESS_STEP_DEFAULT, + .level_option = SCOPE_RING_LEVEL_OPTION_DEFAULT, + .level_viscosity = SCOPE_RING_LEVEL_VISCOSITY_DEFAULT, + .level_sensitivity = SCOPE_RING_LEVEL_SENSITIVITY_DEFAULT +}; +static SCOPE_RING_state_e _scope_ring_state = SCOPE_RING_STATE_OFF; +static uint32_t _scope_ring_timer_cnt = 0; +static float _scope_ring_battery_life = 0.0; +static uint32_t _scope_ring_state_duration = 0; +static bool _scope_ring_state_finished = false; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _scope_ring_task (void *p1, void *p2, void *p3); +static void _scope_ring_level_process (float angle, SCOPE_RING_level_option_e level_option); +static void _scope_ring_background_set (void); +static void _scope_ring_mirrored_set (uint8_t led, uint8_t r, uint8_t g, uint8_t b); +static void _scope_ring_enable (bool en); +static void _scope_ring_config_read (void); +static void _scope_ring_config_write (void); + +static float _scope_ring_angle_hysteresis_get (float angle); +static float _scope_ring_level_viscosity_get (float angle, float alpha); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void SCOPE_RING_init (void) +{ + PRINT (INFO, "Initializing SCOPE_RING...\r\n"); + + /* Initialize battery module. */ + if (BATTERY_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize Battery.\r\n"); + } + + /* Initialize LED ring. */ + if (LED_RING_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize LED ring.\r\n"); + return; + } + + /* Initialize filesystem. */ + if (FS_init () < ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to initialize filesystem.\r\n"); + return; + } + + /* Fetch configuration settings stored for scope ring. */ + _scope_ring_config_read (); +} + +void SCOPE_RING_state_set (SCOPE_RING_state_e state, uint32_t duration_ms) +{ + if (state >= SCOPE_RING_STATE_INVALID) + { + PRINT (ERROR, "Invalid state.\r\n"); + return; + } + + /* Reset task timer on every state change. */ + _scope_ring_timer_cnt = 0; + + /* Reset state finished flag. */ + _scope_ring_state_finished = false; + + _scope_ring_state = state; + _scope_ring_state_duration = duration_ms; +} + +SCOPE_RING_state_e SCOPE_RING_state_get (bool *p_finshed) +{ + if (p_finshed == NULL) + { + return _scope_ring_state; + } + else + { + *p_finshed = _scope_ring_state_finished; + } + + return _scope_ring_state; +} + +void SCOPE_RING_color_set (SCOPE_RING_led_e led, RGB_color_e color) +{ + if (color >= RGB_COLOR_COUNT) + { + PRINT (ERROR, "Invalid color.\r\n"); + return; + } + + switch (led) + { + case SCOPE_RING_LED_BACKGROUND: + _scope_ring_config.background_color = color; + BLE_notify (BLE_CHAR_RING_COLOR, &color, sizeof (color)); + break; + + case SCOPE_RING_LED_INDICATORS: + _scope_ring_config.indicators_color = color; + BLE_notify (BLE_CHAR_INDICATOR_COLOR, &color, sizeof (color)); + break; + + case SCOPE_RING_LED_LEVEL: + _scope_ring_config.level_color = color; + BLE_notify (BLE_CHAR_LEVEL_COLOR, &color, sizeof (color)); + break; + + default: + PRINT (ERROR, "ERROR : Invalid LED.\r\n"); + return; + } + + /* Write new settings to file. */ + _scope_ring_config_write (); +} + +void SCOPE_RING_brightness_set (SCOPE_RING_led_e led, uint8_t step, bool save_settings) +{ + if (step > SCOPE_RING_BRIGHTNESS_STEPS) + { + PRINT (ERROR, "Invalid brightness step.\r\n"); + return; + } + + switch (led) + { + case SCOPE_RING_LED_BACKGROUND: + _scope_ring_config.background_brightness = step; + break; + + case SCOPE_RING_LED_INDICATORS: + _scope_ring_config.indicators_brightness = step; + break; + + case SCOPE_RING_LED_LEVEL: + _scope_ring_config.level_brightness = step; + break; + + default: + PRINT (ERROR, "Invalid LED.\r\n"); + } + + if (save_settings) + { + /* Write new settings to file. */ + _scope_ring_config_write (); + + switch (led) + { + case SCOPE_RING_LED_BACKGROUND: + BLE_notify (BLE_CHAR_RING_BRIGHTNESS, &step, sizeof (step)); + break; + + case SCOPE_RING_LED_INDICATORS: + BLE_notify (BLE_CHAR_INDICATOR_BRIGHTNESS, &step, sizeof (step)); + break; + + case SCOPE_RING_LED_LEVEL: + BLE_notify (BLE_CHAR_LEVEL_BRIGHTNESS, &step, sizeof (step)); + break; + + default: + PRINT (ERROR, "Invalid LED.\r\n"); + } + } +} + +void SCOPE_RING_battery_indicator_set (float percentage) +{ + if (percentage > 1.0) + { + PRINT (ERROR, "Invalid battery percentage. %f\r\n", percentage); + _scope_ring_battery_life = 1.0; + } + else if (percentage < 0.0) + { + PRINT (ERROR, "Invalid battery percentage.%f\r\n", percentage); + _scope_ring_battery_life = 0.0; + } + else + { + _scope_ring_battery_life = percentage; + } +} + +void SCOPE_RING_level_option_set (SCOPE_RING_level_option_e option) +{ + if (option >= SCOPE_RING_LEVEL_OPTION_COUNT) + { + PRINT (ERROR, "Invalid leveling option.\r\n"); + _scope_ring_config.level_option = SCOPE_RING_LEVEL_COLOR_DEFAULT; + } + else + { + _scope_ring_config.level_option = option; + } + + /* Write new settings to file. */ + _scope_ring_config_write (); + + BLE_notify (BLE_CHAR_LEVEL_OPTION, &option, sizeof (option)); +} + +void SCOPE_RING_level_viscosity_set (float alpha) +{ + _scope_ring_config.level_viscosity = alpha; + + /* Write new settings to file. */ + _scope_ring_config_write (); + + BLE_notify (BLE_CHAR_LEVEL_VISCOSITY, &alpha, sizeof (alpha)); +} + +void SCOPE_RING_level_sensitivity_set (float sensitivity) +{ + _scope_ring_config.level_sensitivity = sensitivity; + + /* Write new settings to file. */ + _scope_ring_config_write (); + + BLE_notify (BLE_CHAR_LEVEL_SENSITIVITY, &sensitivity, sizeof (sensitivity)); +} + +SCOPE_RING_config_s SCOPE_RING_config_get (void) +{ + return _scope_ring_config; +} + +void SCOPE_RING_task_suspend (void) +{ + k_thread_suspend (&_scope_ring_thread); +} + +void SCOPE_RING_task_resume (void) +{ + k_thread_resume (&_scope_ring_thread); +} + +void SCOPE_RING_task_install (void) +{ + static k_tid_t id; + + id = k_thread_create (&_scope_ring_thread, + _scope_ring_stack, + SCOPE_RING_STACK_SIZE, + _scope_ring_task, + NULL, + NULL, + NULL, + SCOPE_RING_THREAD_PRIORITY, + 0, + K_NO_WAIT); + k_thread_name_set(&_scope_ring_thread, "SCOPE_RING_task"); +} + +void SCOPE_RING_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + PRINT (INFO, "SCOPE RING\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "timer counter (ms) : %d\r\n", _scope_ring_timer_cnt); + + PRINT (INFO, "State : "); + switch (_scope_ring_state) + { + case SCOPE_RING_STATE_OFF: + PRINT (INFO, "off\r\n"); + break; + case SCOPE_RING_STATE_ON: + PRINT (INFO, "on\r\n"); + break; + case SCOPE_RING_STATE_SET_FLAT: + PRINT (INFO, "setflat\r\n"); + break; + case SCOPE_RING_STATE_FLAT_CALIBRATION: + PRINT (INFO, "calflat\r\n"); + break; + case SCOPE_RING_STATE_SET_BACK: + PRINT (INFO, "setback\r\n"); + break; + case SCOPE_RING_STATE_BACK_CALIBRATION: + PRINT (INFO, "calback\r\n"); + break; + case SCOPE_RING_STATE_SET_FRONT: + PRINT (INFO, "setfront\r\n"); + break; + case SCOPE_RING_STATE_FRONT_CALIBRATION: + PRINT (INFO, "calfront\r\n"); + break; + case SCOPE_RING_STATE_CONFIG_LEVEL_COLOR: + PRINT (INFO, "lc\r\n"); + break; + case SCOPE_RING_STATE_CONFIG_LEVEL_BRIGHTNESS: + PRINT (INFO, "lb\r\n"); + break; + case SCOPE_RING_STATE_CONFIG_INDICATORS_COLOR: + PRINT (INFO, "ic\r\n"); + break; + case SCOPE_RING_STATE_CONFIG_INDICATORS_BRIGHTNESS: + PRINT (INFO, "ib\r\n"); + break; + case SCOPE_RING_STATE_CONFIG_BACKGROUND_COLOR: + PRINT (INFO, "bc\r\n"); + break; + case SCOPE_RING_STATE_CONFIG_BACKGROUND_BRIGHTNESS: + PRINT (INFO, "bb\r\n"); + break; + case SCOPE_RING_STATE_RAINBOW: + PRINT (INFO, "rainbow\r\n"); + break; + case SCOPE_RING_STATE_CHARGING: + PRINT (INFO, "charging\r\n"); + break; + case SCOPE_RING_STATE_CHARGER_CONNECTED: + PRINT (INFO, "cc\r\n"); + break; + case SCOPE_RING_STATE_CHARGER_DISCONNECTED: + PRINT (INFO, "cd\r\n"); + break; + case SCOPE_RING_STATE_POWER_ON: + PRINT (INFO, "power_on\r\n"); + break; + case SCOPE_RING_STATE_POWER_OFF: + PRINT (INFO, "power_off\r\n"); + break; + case SCOPE_RING_STATE_BLE_ENABLED: + PRINT (INFO, "ble_en\r\n"); + break; + case SCOPE_RING_STATE_BLE_DISABLED: + PRINT (INFO, "ble_dis\r\n"); + break; + } + PRINT (INFO, "Indicators color : "); + switch (_scope_ring_config.indicators_color) + { + case RGB_COLOR_RED: + PRINT (INFO, "red\r\n"); + break; + case RGB_COLOR_GREEN: + PRINT (INFO, "green\r\n"); + break; + case RGB_COLOR_BLUE: + PRINT (INFO, "blue\r\n"); + break; + case RGB_COLOR_ORANGE: + PRINT (INFO, "orange\r\n"); + break; + case RGB_COLOR_YELLOW: + PRINT (INFO, "yellow\r\n"); + break; + case RGB_COLOR_PURPLE: + PRINT (INFO, "purple\r\n"); + break; + case RGB_COLOR_PINK: + PRINT (INFO, "pink\r\n"); + break; + case RGB_COLOR_WHITE: + PRINT (INFO, "white\r\n"); + break; + } + PRINT (INFO, "Indicators brightness step : %d\r\n", _scope_ring_config.indicators_brightness); + PRINT (INFO, "Level color : "); + switch (_scope_ring_config.level_color) + { + case RGB_COLOR_RED: + PRINT (INFO, "red\r\n"); + break; + case RGB_COLOR_GREEN: + PRINT (INFO, "green\r\n"); + break; + case RGB_COLOR_BLUE: + PRINT (INFO, "blue\r\n"); + break; + case RGB_COLOR_ORANGE: + PRINT (INFO, "orange\r\n"); + break; + case RGB_COLOR_YELLOW: + PRINT (INFO, "yellow\r\n"); + break; + case RGB_COLOR_PURPLE: + PRINT (INFO, "purple\r\n"); + break; + case RGB_COLOR_PINK: + PRINT (INFO, "pink\r\n"); + break; + case RGB_COLOR_WHITE: + PRINT (INFO, "white\r\n"); + break; + } + PRINT (INFO, "Level brightness step : %d\r\n", _scope_ring_config.level_brightness); + PRINT (INFO, "Background color : "); + switch (_scope_ring_config.background_color) + { + case RGB_COLOR_RED: + PRINT (INFO, "red\r\n"); + break; + case RGB_COLOR_GREEN: + PRINT (INFO, "green\r\n"); + break; + case RGB_COLOR_BLUE: + PRINT (INFO, "blue\r\n"); + break; + case RGB_COLOR_ORANGE: + PRINT (INFO, "orange\r\n"); + break; + case RGB_COLOR_YELLOW: + PRINT (INFO, "yellow\r\n"); + break; + case RGB_COLOR_PURPLE: + PRINT (INFO, "purple\r\n"); + break; + case RGB_COLOR_PINK: + PRINT (INFO, "pink\r\n"); + break; + case RGB_COLOR_WHITE: + PRINT (INFO, "white\r\n"); + break; + } + PRINT (INFO, "Background brightness step : %d\r\n", _scope_ring_config.background_brightness); + PRINT (INFO, "Leveling option : %d\r\n", _scope_ring_config.level_option); + PRINT (INFO, "Level sensitivity (degrees) : %f\r\n", (SCOPE_RING_LEVEL_SENSITIVITY_MAX + + SCOPE_RING_LEVEL_SENSITIVITY_MIN - + _scope_ring_config.level_sensitivity)); + PRINT (INFO, "Level viscosity (alpha) : %f\r\n", _scope_ring_config.level_viscosity); + } + else if (argc == 2 || argc == 3) + { + if (!strcmp (argv[0], "-s") || !strcmp (argv[0], "--set")) + { + if (!strcmp (argv[1], "off")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_OFF, 0); + } + else if (!strcmp (argv[1], "on")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_ON, 0); + } + else if (!strcmp (argv[1], "setflat")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_SET_FLAT, 0); + } + else if (!strcmp (argv[1], "calflat")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_FLAT_CALIBRATION, 0); + } + else if (!strcmp (argv[1], "setback")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_SET_BACK, 0); + } + else if (!strcmp (argv[1], "calback")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_BACK_CALIBRATION, 0); + } + else if (!strcmp (argv[1], "setfront")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_SET_FRONT, 0); + } + else if (!strcmp (argv[1], "calfront")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_FRONT_CALIBRATION, 0); + } + else if (!strcmp (argv[1], "lc")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_LEVEL_COLOR, 0); + } + else if (!strcmp (argv[1], "lb")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_LEVEL_BRIGHTNESS, 0); + } + else if (!strcmp (argv[1], "ic")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_INDICATORS_COLOR, 0); + } + else if (!strcmp (argv[1], "ib")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_INDICATORS_BRIGHTNESS, 0); + } + else if (!strcmp (argv[1], "bc")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_BACKGROUND_COLOR, 0); + } + else if (!strcmp (argv[1], "bb")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_CONFIG_BACKGROUND_BRIGHTNESS, 0); + } + else if (!strcmp (argv[1], "rainbow")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_RAINBOW, 0); + } + else if (!strcmp (argv[1], "charging")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_CHARGING, 0); + } + else if (!strcmp (argv[1], "cc")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_CHARGER_CONNECTED, 0); + } + else if (!strcmp (argv[1], "cd")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_CHARGER_DISCONNECTED, 0); + } + else if (!strcmp (argv[1], "power_on")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_POWER_ON, 0); + } + else if (!strcmp (argv[1], "power_off")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_POWER_OFF, 0); + } + else if (!strcmp (argv[1], "ble_en")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_BLE_ENABLED, 0); + } + else if (!strcmp (argv[1], "ble_dis")) + { + SCOPE_RING_state_set (SCOPE_RING_STATE_BLE_DISABLED, 0); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-i") || !strcmp (argv[0], "--indicators")) + { + if (!strcmp (argv[1], "red")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_INDICATORS, RGB_COLOR_RED); + } + else if (!strcmp (argv[1], "green")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_INDICATORS, RGB_COLOR_GREEN); + } + else if (!strcmp (argv[1], "blue")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_INDICATORS, RGB_COLOR_BLUE); + } + else if (!strcmp (argv[1], "orange")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_INDICATORS, RGB_COLOR_ORANGE); + } + else if (!strcmp (argv[1], "yellow")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_INDICATORS, RGB_COLOR_YELLOW); + } + else if (!strcmp (argv[1], "purple")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_INDICATORS, RGB_COLOR_PURPLE); + } + else if (!strcmp (argv[1], "pink")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_INDICATORS, RGB_COLOR_PINK); + } + else if (!strcmp (argv[1], "white")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_INDICATORS, RGB_COLOR_WHITE); + } + else + { + goto USAGE; + } + + if (argc == 3) + { + uint8_t step = (uint8_t) strtoul (argv[2], NULL, 0); + + SCOPE_RING_brightness_set (SCOPE_RING_LED_INDICATORS, step, true); + } + } + else if (!strcmp (argv[0], "-l") || !strcmp (argv[0], "--level")) + { + if (!strcmp (argv[1], "red")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_LEVEL, RGB_COLOR_RED); + } + else if (!strcmp (argv[1], "green")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_LEVEL, RGB_COLOR_GREEN); + } + else if (!strcmp (argv[1], "blue")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_LEVEL, RGB_COLOR_BLUE); + } + else if (!strcmp (argv[1], "orange")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_LEVEL, RGB_COLOR_ORANGE); + } + else if (!strcmp (argv[1], "yellow")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_LEVEL, RGB_COLOR_YELLOW); + } + else if (!strcmp (argv[1], "purple")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_LEVEL, RGB_COLOR_PURPLE); + } + else if (!strcmp (argv[1], "pink")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_LEVEL, RGB_COLOR_PINK); + } + else if (!strcmp (argv[1], "white")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_LEVEL, RGB_COLOR_WHITE); + } + else + { + goto USAGE; + } + + if (argc == 3) + { + uint8_t step = (uint8_t) strtoul (argv[2], NULL, 0); + + SCOPE_RING_brightness_set (SCOPE_RING_LED_LEVEL, step, true); + } + } + else if (!strcmp (argv[0], "-b") || !strcmp (argv[0], "--background")) + { + if (!strcmp (argv[1], "red")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_BACKGROUND, RGB_COLOR_RED); + } + else if (!strcmp (argv[1], "green")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_BACKGROUND, RGB_COLOR_GREEN); + } + else if (!strcmp (argv[1], "blue")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_BACKGROUND, RGB_COLOR_BLUE); + } + else if (!strcmp (argv[1], "orange")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_BACKGROUND, RGB_COLOR_ORANGE); + } + else if (!strcmp (argv[1], "yellow")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_BACKGROUND, RGB_COLOR_YELLOW); + } + else if (!strcmp (argv[1], "purple")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_BACKGROUND, RGB_COLOR_PURPLE); + } + else if (!strcmp (argv[1], "pink")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_BACKGROUND, RGB_COLOR_PINK); + } + else if (!strcmp (argv[1], "white")) + { + SCOPE_RING_color_set (SCOPE_RING_LED_BACKGROUND, RGB_COLOR_WHITE); + } + else + { + goto USAGE; + } + + if (argc == 3) + { + uint8_t step = (uint8_t) strtoul (argv[2], NULL, 0); + + SCOPE_RING_brightness_set (SCOPE_RING_LED_BACKGROUND, step, true); + } + } + else if (!strcmp (argv[0], "-ss") || !strcmp (argv[0], "--sensitivity")) + { + if (argc == 2) + { + float sensitivity = strtof (argv[1], NULL); + + SCOPE_RING_level_sensitivity_set (sensitivity); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-v") || !strcmp (argv[0], "--viscosity")) + { + if (argc == 2) + { + float alpha = strtof (argv[1], NULL); + + SCOPE_RING_level_viscosity_set (alpha); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-lo")) + { + uint8_t option = (uint8_t) strtoul (argv[1], NULL, 0); + + SCOPE_RING_level_option_set ((SCOPE_RING_level_option_e) option); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: scope_ring [OPTION...]\r\n"); + PRINT (INFO, " -s | --set Sets scope ring state\r\n"); + PRINT (INFO, " <%%s> off\r\n"); + PRINT (INFO, " on\r\n"); + PRINT (INFO, " setflat\r\n"); + PRINT (INFO, " calflat\r\n"); + PRINT (INFO, " setback\r\n"); + PRINT (INFO, " calback\r\n"); + PRINT (INFO, " setfront\r\n"); + PRINT (INFO, " calfront\r\n"); + PRINT (INFO, " lc - level color\r\n"); + PRINT (INFO, " lb - level brightness\r\n"); + PRINT (INFO, " ic - indicators color\r\n"); + PRINT (INFO, " ib - indicators brightness\r\n"); + PRINT (INFO, " bc - background color\r\n"); + PRINT (INFO, " bb - background brightness\r\n"); + PRINT (INFO, " rainbow\r\n"); + PRINT (INFO, " charging\r\n"); + PRINT (INFO, " cc - charger connected\r\n"); + PRINT (INFO, " cd - charger disconnected\r\n"); + PRINT (INFO, " power_on\r\n"); + PRINT (INFO, " power_off\r\n"); + PRINT (INFO, " -i | --indicators Sets color and brightness of the indicators\r\n"); + PRINT (INFO, " <%%s> red\r\n"); + PRINT (INFO, " green\r\n"); + PRINT (INFO, " blue\r\n"); + PRINT (INFO, " orange\r\n"); + PRINT (INFO, " yellow\r\n"); + PRINT (INFO, " purple\r\n"); + PRINT (INFO, " pink\r\n"); + PRINT (INFO, " white\r\n"); + PRINT (INFO, " <%%d> [0-%d]\r\n", SCOPE_RING_BRIGHTNESS_STEPS); + PRINT (INFO, " -l | --level Sets the level colors\r\n"); + PRINT (INFO, " <%%s> red\r\n"); + PRINT (INFO, " green\r\n"); + PRINT (INFO, " blue\r\n"); + PRINT (INFO, " orange\r\n"); + PRINT (INFO, " yellow\r\n"); + PRINT (INFO, " purple\r\n"); + PRINT (INFO, " pink\r\n"); + PRINT (INFO, " white\r\n"); + PRINT (INFO, " <%%d> [0-%d]\r\n", SCOPE_RING_BRIGHTNESS_STEPS); + PRINT (INFO, " -b | --background Sets the background colors\r\n"); + PRINT (INFO, " <%%s> red\r\n"); + PRINT (INFO, " green\r\n"); + PRINT (INFO, " blue\r\n"); + PRINT (INFO, " orange\r\n"); + PRINT (INFO, " yellow\r\n"); + PRINT (INFO, " purple\r\n"); + PRINT (INFO, " pink\r\n"); + PRINT (INFO, " white\r\n"); + PRINT (INFO, " <%%d> [0-%d]\r\n", SCOPE_RING_BRIGHTNESS_STEPS); + PRINT (INFO, " -ss | --sensitivity Sets the LED level sensitivity\r\n"); + PRINT (INFO, " <%%f> (level, %.1f to %.1f)\r\n", SCOPE_RING_LEVEL_SENSITIVITY_MIN, SCOPE_RING_LEVEL_SENSITIVITY_MAX); + PRINT (INFO, " -v | --viscosity Sets the LED level viscosity\r\n"); + PRINT (INFO, " <%%f> (alpha)\r\n"); + PRINT (INFO, " -lo Sets the leveling option\r\n"); + PRINT (INFO, " <%%d> [0-2]\r\n"); + + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _scope_ring_task (void *p1, void *p2, void *p3) +{ + while (1) + { + uint8_t led; + + /* If timer counter has reached specified task duration, set state finished flag. */ + // if ((_scope_ring_state_duration != 0) && (_scope_ring_timer_cnt == _scope_ring_state_duration)) + // { + // _scope_ring_state_finished = true; + // } + + switch (_scope_ring_state) + { + case SCOPE_RING_STATE_OFF: + /* Turn off ring LEDs. */ + _scope_ring_enable (false); + break; + + case SCOPE_RING_STATE_ON: + if (_scope_ring_config.indicators_brightness == 0 && + _scope_ring_config.level_brightness == 0 && + _scope_ring_config.background_brightness == 0) + { + /* Disable FET to save on quiescent power. */ + _scope_ring_enable (false); + } + else + { + float angle = MOTION_angle_get (MOTION_AXIS_Y); + + _scope_ring_background_set (); + _scope_ring_level_process (angle, _scope_ring_config.level_option); + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + } + break; + + case SCOPE_RING_STATE_SET_FLAT: + { + static bool up_down = true; + static uint8_t brightness = 0; + + for (led = 0; led < _SCOPE_RING_N_LEDS; led++) + { + LED_RING_set (led, brightness, 0, 0); + } + + _scope_ring_enable (true); + + if (up_down) + { + if (brightness == 100) + { + up_down = false; + } + else + { + brightness++; + } + } + else + { + if (brightness == 0) + { + up_down = true; + } + else + { + brightness--; + } + } + } + break; + + case SCOPE_RING_STATE_FLAT_CALIBRATION: + { + static uint8_t prev_bound = 0; + uint8_t led_bound = (uint32_t) (MOTION_calibrate_status_get (MOTION_CAL_ORIENTATION_FLAT) * (float) _SCOPE_RING_N_LEDS); + uint8_t led_idx; + + if (led_bound == prev_bound) + { + break; + } + else + { + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + for (led_idx = 0; led_idx < led_bound; led_idx++) + { + LED_RING_set (led_idx, 100, 0, 0); + } + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + } + + prev_bound = led_bound; + } + break; + + case SCOPE_RING_STATE_SET_BACK: + { + static bool up_down = true; + static uint8_t brightness = 0; + + for (led = 0; led < _SCOPE_RING_N_LEDS; led++) + { + LED_RING_set (led, 0, brightness, 0); + } + + _scope_ring_enable (true); + + if (up_down) + { + if (brightness == 100) + { + up_down = false; + } + else + { + brightness++; + } + } + else + { + if (brightness == 0) + { + up_down = true; + } + else + { + brightness--; + } + } + } + break; + + case SCOPE_RING_STATE_BACK_CALIBRATION: + { + static uint8_t prev_bound = 0; + uint8_t led_bound = (uint32_t) (MOTION_calibrate_status_get (MOTION_CAL_ORIENTATION_BACK) * (float) _SCOPE_RING_N_LEDS); + uint8_t led_idx; + + if (led_bound == prev_bound) + { + break; + } + else + { + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + for (led_idx = 0; led_idx < led_bound; led_idx++) + { + LED_RING_set (led_idx, 0, 100, 0); + } + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + } + + prev_bound = led_bound; + } + break; + + case SCOPE_RING_STATE_SET_FRONT: + { + static bool up_down = true; + static uint8_t brightness = 0; + + for (led = 0; led < _SCOPE_RING_N_LEDS; led++) + { + LED_RING_set (led, 0, 0, brightness); + } + + _scope_ring_enable (true); + + if (up_down) + { + if (brightness == 100) + { + up_down = false; + } + else + { + brightness++; + } + } + else + { + if (brightness == 0) + { + up_down = true; + } + else + { + brightness--; + } + } + } + break; + + case SCOPE_RING_STATE_FRONT_CALIBRATION: + { + static uint8_t prev_bound = 0; + uint8_t led_bound = (uint32_t) (MOTION_calibrate_status_get (MOTION_CAL_ORIENTATION_FRONT) * (float) _SCOPE_RING_N_LEDS); + uint8_t led_idx; + + if (led_bound == prev_bound) + { + break; + } + else + { + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + for (led_idx = 0; led_idx < led_bound; led_idx++) + { + LED_RING_set (led_idx, 0, 0, 100); + } + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + } + + prev_bound = led_bound; + } + break; + + + case SCOPE_RING_STATE_CONFIG_LEVEL_COLOR: + if (_scope_ring_timer_cnt >= (_scope_ring_state_duration / 2)) + { + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + + if (_scope_ring_timer_cnt == _scope_ring_state_duration) + { + _scope_ring_timer_cnt = 0; + } + } + else + { + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + _scope_ring_level_process (0.0, _scope_ring_config.level_option); + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + } + break; + + case SCOPE_RING_STATE_CONFIG_LEVEL_BRIGHTNESS: + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + _scope_ring_level_process (0.0, _scope_ring_config.level_option); + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + break; + + case SCOPE_RING_STATE_CONFIG_INDICATORS_COLOR: + if (_scope_ring_timer_cnt >= (_scope_ring_state_duration / 2)) + { + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + + if (_scope_ring_timer_cnt == _scope_ring_state_duration) + { + _scope_ring_timer_cnt = 0; + } + } + else + { + /* SCOPE_RING_BRIGHTNESS_STEPS + 1 extra step for off. */ + RGB_s indicators = RGB_gamma_corrected (_scope_ring_config.indicators_color, + _scope_ring_config.indicators_brightness, + (SCOPE_RING_BRIGHTNESS_STEPS + 1), + RGB_BRIGHTNESS_MAX, + SCOPE_RING_BRIGHTNESS_GAMMA_CF); + + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + LED_RING_set ( 3, indicators.r, indicators.g, indicators.b); + LED_RING_set ( 9, indicators.r, indicators.g, indicators.b); + LED_RING_set (15, indicators.r, indicators.g, indicators.b); + LED_RING_set (21, indicators.r, indicators.g, indicators.b); + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + } + break; + + case SCOPE_RING_STATE_CONFIG_INDICATORS_BRIGHTNESS: + { + /* SCOPE_RING_BRIGHTNESS_STEPS + 1 extra step for off. */ + RGB_s indicators = RGB_gamma_corrected (_scope_ring_config.indicators_color, + _scope_ring_config.indicators_brightness, + (SCOPE_RING_BRIGHTNESS_STEPS + 1), + RGB_BRIGHTNESS_MAX, + SCOPE_RING_BRIGHTNESS_GAMMA_CF); + + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + LED_RING_set ( 3, indicators.r, indicators.g, indicators.b); + LED_RING_set ( 9, indicators.r, indicators.g, indicators.b); + LED_RING_set (15, indicators.r, indicators.g, indicators.b); + LED_RING_set (21, indicators.r, indicators.g, indicators.b); + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + } + break; + + case SCOPE_RING_STATE_CONFIG_BACKGROUND_COLOR: + if (_scope_ring_timer_cnt >= (_scope_ring_state_duration / 2)) + { + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + + if (_scope_ring_timer_cnt == _scope_ring_state_duration) + { + _scope_ring_timer_cnt = 0; + } + } + else + { + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + _scope_ring_background_set (); + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + } + break; + + case SCOPE_RING_STATE_CONFIG_BACKGROUND_BRIGHTNESS: + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + _scope_ring_background_set (); + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + break; + + case SCOPE_RING_STATE_CONFIG_LEVEL_SENSITIVITY: + { + uint8_t bound = (uint8_t) ((SCOPE_RING_LEVEL_SENSITIVITY_MAX + + SCOPE_RING_LEVEL_SENSITIVITY_MIN - + _scope_ring_config.level_sensitivity) / + (float) SCOPE_RING_LEVEL_SENSITIVITY_MAX * + (float) LED_RING_PIXELS); + + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + /* Use purple to display sensitivity. */ + RGB_s purple = RGB_gamma_corrected (RGB_COLOR_PURPLE, + 10, + (SCOPE_RING_BRIGHTNESS_STEPS + 1), + RGB_BRIGHTNESS_MAX, + SCOPE_RING_BRIGHTNESS_GAMMA_CF); + + for (led = 0; led < bound; led++) + { + LED_RING_set (led, purple.r, purple.g, purple.b); + } + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + } + break; + + case SCOPE_RING_STATE_CONFIG_LEVEL_OPTION: + { + RGB_s indicators = RGB_gamma_corrected (_scope_ring_config.indicators_color, + (RGB_BRIGHTNESS_MAX / 2), + SCOPE_RING_BRIGHTNESS_STEP_DEFAULT, + RGB_BRIGHTNESS_MAX, + SCOPE_RING_BRIGHTNESS_GAMMA_CF); + + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + switch (_scope_ring_config.level_option) + { + case SCOPE_RING_LEVEL_OPTION_0: + LED_RING_set (15, indicators.r, indicators.g, indicators.b); + LED_RING_set (21, indicators.r, indicators.g, indicators.b); + break; + case SCOPE_RING_LEVEL_OPTION_1: + LED_RING_set (18, indicators.r, indicators.g, indicators.b); + break; + case SCOPE_RING_LEVEL_OPTION_2: + LED_RING_set ( 9, indicators.r, indicators.g, indicators.b); + LED_RING_set (21, indicators.r, indicators.g, indicators.b); + break; + } + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + } + break; + + case SCOPE_RING_STATE_RAINBOW: + { + static uint16_t count = 0; + LED_RING_rainbow (count, 1, 255, 100, 1); + + count += 256; + + _scope_ring_enable (true); + } + break; + + case SCOPE_RING_STATE_CHARGING: + if (_scope_ring_timer_cnt < (_scope_ring_state_duration / 2)) + { + uint8_t bounds = (uint8_t) (_scope_ring_battery_life * _SCOPE_RING_N_LEDS); + + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + for (led = 0; led < bounds; led++) + { + LED_RING_set (led, 0, 0, 50); + } + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + } + else if (_scope_ring_timer_cnt == (_scope_ring_state_duration / 2)) + { + float voltage; + float life_remaining; + + /* Disable scope ring to prevent voltage drop before getting battery reading. */ + _scope_ring_enable (false); + + if (BATTERY_voltage_get (&voltage) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to read battery voltage.\r\n"); + } + + life_remaining = BATTERY_level_calculate (voltage); + + /* Set battery status for feedback on LED ring. */ + SCOPE_RING_battery_indicator_set (life_remaining); + } + else if (_scope_ring_timer_cnt >= _scope_ring_state_duration) + { + _scope_ring_timer_cnt = 0; + } + break; + + case SCOPE_RING_STATE_CHARGER_CONNECTED: + if (!_scope_ring_state_finished) + { + static uint8_t bounds = 0; + + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + for (led = 0; led < bounds; led++) + { + LED_RING_set (led, 50, 50, 50); + } + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + + if (bounds == (_SCOPE_RING_N_LEDS - 1)) + { + /* Force finish flag. */ + _scope_ring_state_finished = true; + + bounds = 0; + } + else + { + bounds++; + } + } + break; + + case SCOPE_RING_STATE_CHARGER_DISCONNECTED: + if (!_scope_ring_state_finished) + { + static uint8_t bounds = (_SCOPE_RING_N_LEDS - 1); + + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + for (led = 0; led < bounds; led++) + { + LED_RING_set (led, 50, 50, 50); + } + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + + if (bounds == 0) + { + /* Force finish flag. */ + _scope_ring_state_finished = true; + + bounds = (_SCOPE_RING_N_LEDS - 1); + } + else + { + bounds--; + } + } + break; + + case SCOPE_RING_STATE_POWER_ON: + if (!_scope_ring_state_finished) + { + uint8_t bounds = (uint8_t) (_scope_ring_battery_life * _SCOPE_RING_N_LEDS); + static uint8_t brightness = 0; + + for (led = 0; led < _SCOPE_RING_N_LEDS; led++) + { + if (led < bounds) + { + LED_RING_set (led, 0, brightness, 0); + } + else + { + LED_RING_set (led, 0, 0, 0); + } + } + + _scope_ring_enable (true); + + if (brightness == 100) + { + _scope_ring_state_finished = true; + brightness = 0; + } + else + { + brightness++; + } + } + break; + + case SCOPE_RING_STATE_POWER_OFF: + if (!_scope_ring_state_finished) + { + uint8_t bounds = (uint8_t) (_scope_ring_battery_life * _SCOPE_RING_N_LEDS); + static uint8_t brightness = 100; + + for (led = 0; led < _SCOPE_RING_N_LEDS; led++) + { + if (led < bounds) + { + LED_RING_set (led, 0, brightness, 0); + } + else + { + LED_RING_set (led, 0, 0, 0); + } + } + + _scope_ring_enable (true); + + if (brightness > 0) + { + brightness--; + } + else if (brightness == 0) + { + _scope_ring_state_finished = true; + brightness = 100; + } + } + break; + + case SCOPE_RING_STATE_BLE_ENABLED: + if (!_scope_ring_state_finished) + { + static uint8_t bounds = 0; + + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + for (led = 0; led < bounds; led++) + { + LED_RING_set (led, 0, 0, 50); + } + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + + if (bounds == (_SCOPE_RING_N_LEDS - 1)) + { + /* Force finish flag. */ + _scope_ring_state_finished = true; + + bounds = 0; + } + else + { + bounds++; + } + } + break; + + case SCOPE_RING_STATE_BLE_DISABLED: + if (!_scope_ring_state_finished) + { + static uint8_t bounds = (_SCOPE_RING_N_LEDS - 1); + + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + for (led = (_SCOPE_RING_N_LEDS - 1); led > bounds; led--) + { + LED_RING_set (led, 0, 0, 50); + } + + /* Enable FET for power to ring prior to sending LED ring data. */ + _scope_ring_enable (true); + + if (bounds == 0) + { + /* Force finish flag. */ + _scope_ring_state_finished = true; + + bounds = (_SCOPE_RING_N_LEDS - 1); + } + else + { + bounds--; + } + } + break; + } + + _scope_ring_timer_cnt += SCOPE_RING_TASK_PERIOD_MS; + + /* Feed watchdog at end of loop. */ + WDT_feed (); + + k_msleep (SCOPE_RING_TASK_PERIOD_MS); + } +} + +static void _scope_ring_level_process (float angle, SCOPE_RING_level_option_e option) +{ + uint8_t led_idx; + uint8_t multiplier; + RGB_s level; + RGB_s indicators; + + /* Negating angle turns on opposite LED. Indicating to cant the other direction to level. */ + // angle = -angle; + + /* Calculate scaled level color and brightness. SCOPE_RING_BRIGHTNESS_STEPS + 1 extra step for off. */ + level = RGB_gamma_corrected (_scope_ring_config.level_color, + _scope_ring_config.level_brightness, + (SCOPE_RING_BRIGHTNESS_STEPS + 1), + RGB_BRIGHTNESS_MAX, + SCOPE_RING_BRIGHTNESS_GAMMA_CF); + + /* Calculate scaled indicators color and brightness. SCOPE_RING_BRIGHTNESS_STEPS + 1 extra step for off. */ + indicators = RGB_gamma_corrected (_scope_ring_config.indicators_color, + _scope_ring_config.indicators_brightness, + (SCOPE_RING_BRIGHTNESS_STEPS + 1), + RGB_BRIGHTNESS_MAX, + SCOPE_RING_BRIGHTNESS_GAMMA_CF); + + // angle = _scope_ring_angle_hysteresis_get (angle); + + angle = _scope_ring_level_viscosity_get (angle, _scope_ring_config.level_viscosity); + + switch (option) + { + case SCOPE_RING_LEVEL_OPTION_0: + /* Check if angle is within desired window. */ + if (angle >= -_scope_ring_config.level_sensitivity && + angle <= _scope_ring_config.level_sensitivity) + { + if (_scope_ring_config.level_brightness == 0) + { + _scope_ring_background_set (); + } + else + { + _scope_ring_mirrored_set (0, level.r, level.g, level.b); + } + } + else if (angle < 0) + { + multiplier = _SCOPE_RING_N_LEDS - _SCOPE_RING_L_INDICATOR_IDX; + + for (led_idx = _SCOPE_RING_L_INDICATOR_IDX; led_idx < _SCOPE_RING_N_LEDS; led_idx++) + { + if (angle <= (-_scope_ring_config.level_sensitivity * multiplier--)) + { + _scope_ring_mirrored_set (led_idx, indicators.r, indicators.g, indicators.b); + return; + } + } + } + else + { + multiplier = _SCOPE_RING_R_INDICATOR_IDX; + + for (led_idx = _SCOPE_RING_R_INDICATOR_IDX; led_idx > 0 ; led_idx--) + { + if (angle >= (_scope_ring_config.level_sensitivity * multiplier--)) + { + _scope_ring_mirrored_set (led_idx, indicators.r, indicators.g, indicators.b); + return; + } + } + } + break; + + case SCOPE_RING_LEVEL_OPTION_1: + /* Check if angle is within desired window. */ + if (angle >= -_scope_ring_config.level_sensitivity && + angle <= _scope_ring_config.level_sensitivity) + { + if (_scope_ring_config.level_brightness == 0) + { + _scope_ring_background_set (); + } + else + { + /* Set both left and right leds when level. */ + LED_RING_set (_SCOPE_RING_R_INDICATOR_IDX, level.r, level.g, level.b); + LED_RING_set (_SCOPE_RING_L_INDICATOR_IDX, level.r, level.g, level.b); + } + } + else if (angle < 0) + { + /* Set left LED if we need to cant left for level. */ + LED_RING_set (_SCOPE_RING_L_INDICATOR_IDX, indicators.r, indicators.g, indicators.b); + } + else + { + /* Set right LED if we need to cant right for level. */ + LED_RING_set (_SCOPE_RING_R_INDICATOR_IDX, indicators.r, indicators.g, indicators.b); + } + break; + + case SCOPE_RING_LEVEL_OPTION_2: + /* Check if angle is within desired window. */ + if (angle >= -_scope_ring_config.level_sensitivity && + angle <= _scope_ring_config.level_sensitivity) + { + if (_scope_ring_config.level_brightness == 0) + { + _scope_ring_background_set (); + } + else + { + /* Set both left and right leds when level. */ + LED_RING_set (_SCOPE_RING_R_INDICATOR_IDX, level.r, level.g, level.b); + LED_RING_set (_SCOPE_RING_L_INDICATOR_IDX, level.r, level.g, level.b); + + // LED_RING_set (_SCOPE_RING_R_INDICATOR_IDX-1, level.r, level.g, level.b); + // LED_RING_set (_SCOPE_RING_R_INDICATOR_IDX+1, level.r, level.g, level.b); + + // LED_RING_set (_SCOPE_RING_L_INDICATOR_IDX-1, level.r, level.g, level.b); + // LED_RING_set (_SCOPE_RING_L_INDICATOR_IDX+1, level.r, level.g, level.b); + } + } + else if (angle < 0) + { + multiplier = _SCOPE_RING_N_LEDS - _SCOPE_RING_L_INDICATOR_IDX - 2; + + for (led_idx = (_SCOPE_RING_N_LEDS - 2); led_idx > _SCOPE_RING_L_INDICATOR_IDX; led_idx--) + { + if (angle <= (-_scope_ring_config.level_sensitivity * multiplier--)) + { + LED_RING_set (led_idx, indicators.r, indicators.g, indicators.b); + LED_RING_set ((led_idx + (_SCOPE_RING_N_LEDS / 2)) % _SCOPE_RING_N_LEDS, indicators.r, indicators.g, indicators.b); + return; + } + } + } + else + { + multiplier = _SCOPE_RING_R_INDICATOR_IDX - 2; + + for (led_idx = 2; led_idx < _SCOPE_RING_R_INDICATOR_IDX; led_idx++) + { + if (angle >= (_scope_ring_config.level_sensitivity * multiplier--)) + { + LED_RING_set (led_idx, indicators.r, indicators.g, indicators.b); + LED_RING_set (led_idx + (_SCOPE_RING_N_LEDS / 2), indicators.r, indicators.g, indicators.b); + return; + } + } + } + break; + } +} + +static void _scope_ring_background_set (void) +{ + uint8_t led_idx; + /* Background LEDs never need to be full brightness, we scale back max to 40 instead of 255. + * With max of 40, we use a different gamma value of 1.2. + * SCOPE_RING_BRIGHTNESS_STEPS + 1 extra step for off. */ + RGB_s ring = RGB_gamma_corrected (_scope_ring_config.background_color, + _scope_ring_config.background_brightness, + (SCOPE_RING_BRIGHTNESS_STEPS + 1), + 40, + 1.2); + + /* Turn on all leds to ring color. */ + for (led_idx = 0; led_idx < _SCOPE_RING_N_LEDS; led_idx++) + { + LED_RING_set (led_idx, ring.r, ring.g, ring.b); + } +} + +static void _scope_ring_mirrored_set (uint8_t led, uint8_t r, uint8_t g, uint8_t b) +{ + /* Set top half. */ + LED_RING_set (led, r, g, b); + + /* Check if we are on left half. */ + if (led > (_SCOPE_RING_N_LEDS / 2)) + { + /* Also set mirrored side. */ + LED_RING_set ((_SCOPE_RING_N_LEDS - led) + (_SCOPE_RING_N_LEDS / 2), r, g, b); + } + /* Check if we are on right half. */ + else + { + /* Also set mirrored side. */ + LED_RING_set (((_SCOPE_RING_N_LEDS / 2) - led), r, g, b); + } +} + +static void _scope_ring_enable (bool en) +{ + if (!en) + { + /* If disabled, send data to turn off all LEDs before removing power. */ + if (LED_RING_clear () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to clear LED ring.\r\n"); + } + + if (LED_RING_update () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to update LED ring.\r\n"); + } + + /* Enable / disable FET gating LED ring power. */ + LED_RING_enable (false); + } + else + { + /* Enable FET gating LED ring power before sending pattern. */ + LED_RING_enable (true); + + if (LED_RING_update () != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to update LED ring.\r\n"); + } + } +} + +static void _scope_ring_config_read (void) +{ + ERRNO_e err; + SCOPE_RING_config_s cfg; + + err = FS_open_or_create (SCOPE_RING_FILENAME, &_scope_ring_file, sizeof (SCOPE_RING_config_s), FS_FILE_DEPTH_DEFAULT); + if (err == ERRNO_SUCCESS) + { + /* Read file. */ + err = FS_read (_scope_ring_file, (uint8_t *) &cfg, 0, sizeof (SCOPE_RING_config_s)); + + /* Check file entry is valid. */ + if (err != ERRNO_SUCCESS) + { + /* Write defaults to file. */ + _scope_ring_config_write (); + return; + } + + /* Check if file contents are valid. */ + if (cfg.indicators_color >= RGB_COLOR_INVALID || + cfg.level_color >= RGB_COLOR_INVALID || + cfg.background_color >= RGB_COLOR_INVALID || + cfg.indicators_brightness > SCOPE_RING_BRIGHTNESS_STEPS || + cfg.level_brightness > SCOPE_RING_BRIGHTNESS_STEPS || + cfg.background_brightness > SCOPE_RING_BRIGHTNESS_STEPS || + cfg.level_option >= SCOPE_RING_LEVEL_OPTION_COUNT || + cfg.level_sensitivity <= (float) 0.0 || + cfg.level_viscosity <= (float) 0.0) + { + /* If not valid, write current configuration to file. */ + _scope_ring_config_write (); + return; + } + + /* Update scope ring configuration to what was read from flash and validated. */ + _scope_ring_config = cfg; + } + else if (err == ERRNO_SIZE_MISMATCH) + { + /* Config has been modified, need to delete old file and write new configuration. */ + err = FS_delete (SCOPE_RING_FILENAME); + + if (err != ERRNO_SUCCESS) + { + /* Something else is going on... */ + PRINT (ERROR, "Failure to delete old scope ring file.\r\n"); + return; + } + + /* Create new file. */ + err = FS_open_or_create (SCOPE_RING_FILENAME, &_scope_ring_file, sizeof (SCOPE_RING_config_s), FS_FILE_DEPTH_DEFAULT); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failure to create scope ring configuration file.\r\n"); + } + else + { + PRINT (INFO, "New scope ring file created successfully\r\n"); + } + + /* Write default config to file. */ + _scope_ring_config_write (); + } + else + { + /* Write defaults to file. */ + _scope_ring_config_write (); + } +} + +static void _scope_ring_config_write (void) +{ + if (FS_write (_scope_ring_file, (uint8_t *) &_scope_ring_config) != ERRNO_SUCCESS) + { + PRINT (ERROR, "Failed to write scope ring configuration to file.\r\n"); + } +} + +static float _scope_ring_angle_hysteresis_get (float angle) +{ + static float prev_angle = 0.0; + + /* Increasing. */ + if (angle > prev_angle) + { + if (angle > prev_angle + SCOPE_RING_HYS_ANGLE_THRESHOLD) + { + /* Update previous angle. */ + prev_angle = angle; + } + else + { + angle = prev_angle; + } + } + /* Decreasing. */ + else if (angle < prev_angle) + { + if (angle < prev_angle - SCOPE_RING_HYS_ANGLE_THRESHOLD) + { + /* Update previous angle. */ + prev_angle = angle; + } + else + { + angle = prev_angle; + } + } + + return angle; +} + +static float _scope_ring_level_viscosity_get (float angle, float alpha) +{ + static float previous_angle = 0.0; + + previous_angle = alpha * angle + (1.0f - alpha) * previous_angle; + + return previous_angle; +} diff --git a/src/app/scope_ring.h b/src/app/scope_ring.h new file mode 100644 index 0000000..87018e0 --- /dev/null +++ b/src/app/scope_ring.h @@ -0,0 +1,162 @@ +/** + * @file scope_ring.h + * @brief Scope ring module + * @author Kenny Tran + * @date Apr 05 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef SCOPE_RING_H_ +#define SCOPE_RING_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/rgb.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define SCOPE_RING_TASK_PERIOD_MS (10) +#define SCOPE_RING_STACK_SIZE (2048) +#define SCOPE_RING_THREAD_PRIORITY (11) + +#define SCOPE_RING_BRIGHTNESS_STEPS (10) +#define SCOPE_RING_BRIGHTNESS_GAMMA_CF (1.6) + +#define SCOPE_RING_BRIGHTNESS_STEP_DEFAULT (5) +#define SCOPE_RING_INDICATORS_COLOR_DEFAULT (RGB_COLOR_RED) +#define SCOPE_RING_LEVEL_COLOR_DEFAULT (RGB_COLOR_GREEN) +#define SCOPE_RING_BACKGROUND_COLOR_DEFAULT (RGB_COLOR_WHITE) +#define SCOPE_RING_LEVEL_VISCOSITY_DEFAULT (0.03) +#define SCOPE_RING_LEVEL_SENSITIVITY_DEFAULT (0.5) +#define SCOPE_RING_HYS_ANGLE_THRESHOLD (0.25) + +#define SCOPE_RING_LEVEL_OPTION_DEFAULT (SCOPE_RING_LEVEL_OPTION_0) + +#define SCOPE_RING_LEVEL_SENSITIVITY_MIN (0.25) +#define SCOPE_RING_LEVEL_SENSITIVITY_MAX (3.0) + +#define SCOPE_RING_FILENAME ("scope_ring") + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum SCOPE_RING_led +{ + SCOPE_RING_LED_BACKGROUND = 0, + SCOPE_RING_LED_INDICATORS, + SCOPE_RING_LED_LEVEL +} SCOPE_RING_led_e; + +typedef enum SCOPE_RING_level_option +{ + SCOPE_RING_LEVEL_OPTION_0 = 0, + SCOPE_RING_LEVEL_OPTION_1, + SCOPE_RING_LEVEL_OPTION_2, + + SCOPE_RING_LEVEL_OPTION_COUNT, + SCOPE_RING_LEVEL_OPTION_INVALID = SCOPE_RING_LEVEL_OPTION_COUNT +} SCOPE_RING_level_option_e; + +typedef enum SCOPE_RING_state +{ + SCOPE_RING_STATE_OFF = 0, + SCOPE_RING_STATE_ON, + + SCOPE_RING_STATE_SET_FLAT, + SCOPE_RING_STATE_FLAT_CALIBRATION, + SCOPE_RING_STATE_SET_BACK, + SCOPE_RING_STATE_BACK_CALIBRATION, + SCOPE_RING_STATE_SET_FRONT, + SCOPE_RING_STATE_FRONT_CALIBRATION, + + SCOPE_RING_STATE_CONFIG_LEVEL_COLOR, + SCOPE_RING_STATE_CONFIG_LEVEL_BRIGHTNESS, + SCOPE_RING_STATE_CONFIG_INDICATORS_COLOR, + SCOPE_RING_STATE_CONFIG_INDICATORS_BRIGHTNESS, + SCOPE_RING_STATE_CONFIG_BACKGROUND_COLOR, + SCOPE_RING_STATE_CONFIG_BACKGROUND_BRIGHTNESS, + SCOPE_RING_STATE_CONFIG_LEVEL_SENSITIVITY, + SCOPE_RING_STATE_CONFIG_LEVEL_OPTION, + + SCOPE_RING_STATE_RAINBOW, + SCOPE_RING_STATE_CHARGING, + SCOPE_RING_STATE_CHARGER_CONNECTED, + SCOPE_RING_STATE_CHARGER_DISCONNECTED, + SCOPE_RING_STATE_POWER_ON, + SCOPE_RING_STATE_POWER_OFF, + SCOPE_RING_STATE_BLE_ENABLED, + SCOPE_RING_STATE_BLE_DISABLED, + + SCOPE_RING_STATE_INVALID +} SCOPE_RING_state_e; + +typedef struct SCOPE_RING_config +{ + RGB_color_e indicators_color : 8; + uint8_t indicators_brightness : 8; + RGB_color_e level_color : 8; + uint8_t level_brightness : 8; + RGB_color_e background_color : 8; + uint8_t background_brightness : 8; + uint8_t level_option : 4; + float level_viscosity; + float level_sensitivity; +} __attribute__((packed, aligned(1))) SCOPE_RING_config_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void SCOPE_RING_init (void); + +/* Set duration_ms to 0 to run indefinitely. */ +void SCOPE_RING_state_set (SCOPE_RING_state_e state, uint32_t duration_ms); + +SCOPE_RING_state_e SCOPE_RING_state_get (bool *p_finshed); + +void SCOPE_RING_color_set (SCOPE_RING_led_e led, RGB_color_e color); + +void SCOPE_RING_brightness_set (SCOPE_RING_led_e led, uint8_t step, bool save_settings); + +void SCOPE_RING_battery_indicator_set (float percentage); + +void SCOPE_RING_level_option_set (SCOPE_RING_level_option_e option); + +void SCOPE_RING_level_viscosity_set (float alpha); + +void SCOPE_RING_level_sensitivity_set (float sensitivity); + +SCOPE_RING_config_s SCOPE_RING_config_get (void); + +void SCOPE_RING_task_suspend (void); + +void SCOPE_RING_task_resume (void); + +void SCOPE_RING_task_install (void); + +void SCOPE_RING_cli_cmd (int32_t argc, char **argv); + + +#endif /* SCOPE_RING_H_ */ diff --git a/src/app/shot_capture.c b/src/app/shot_capture.c new file mode 100644 index 0000000..b8712d6 --- /dev/null +++ b/src/app/shot_capture.c @@ -0,0 +1,1001 @@ +/** + * @file shot_capture.c + * @brief Shot Capture module + * @author Eric Xu + * @date Oct 15 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include +#include + +#include "shot_capture.h" + +#include "../app/shot_storage.h" +#include "../app/ble.h" + +#include "../lib/debug.h" +#include "../lib/fs.h" +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "../bsp/als.h" +#include "../bsp/imu.h" +#include "../bsp/imu_reg.h" +#include "../bsp/wdt.h" + +#include "../wrappers/i2c.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +K_MUTEX_DEFINE(shot_data_mutex); /* Protect shared shot_data struct */ +K_MUTEX_DEFINE(FIFO_ring_buf_mutex); /* Protect shared FIFO ring buffer struct */ +K_MUTEX_DEFINE(stat_mutex); /* Protect debug statistic variables */ + +volatile FIFO_ring_buf_s FIFO_ring_buf = {.buf = NULL, + .write_ptr = 0, + .read_ptr = 0, + .loop_ctr = 0}; + +volatile shot_data_status_s shot_data = {.start = 0, + .location = 0, + .words_per_sample_set = WORDS_PER_SAMPLE_SET, + .bytes_per_sample_set = BYTES_PER_SAMPLE_SET, + .size = SHOTDATA_SIZE_IN_BYTES_DEFAULT, + .bytes_after_shot = BYTES_AFTER_SHOT_DEFAULT, + .marked = false, + .ready = false, + .saved = false}; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static FS_file_t _shot_capture_file; +static SHOT_CAPTURE_config_s _shot_capture_config = { + .shot_duration = SHOTDATA_DURATION_DEFAULT, + .shot_location = SHOTDATA_LOCATION_DEFAULT, + .fs_g = LSM6DS3TR_C_FS_G_ABSTR_250dps, + .odr_g = LSM6DS3TR_C_HZ_TO_ODR_G(GYRO_ODR_DEFAULT_HZ), + .fs_xl = LSM6DS3TR_C_FS_XL_2g, + .odr_xl = LSM6DS3TR_C_HZ_TO_ODR_XL(ACCEL_ODR_DEFAULT_HZ), + .tap_ths = 25, + .quiet_time = LSM6DS3TR_C_QUIET_4_OVER_ODR_XL, + .shock_time = LSM6DS3TR_C_SHOCK_16_OVER_ODR_XL, + .user_shot_cnt = 0, + .shot_cnt = 0, + .shot_capture_en = 1 +}; +static atomic_t _shot_capture_is_enabled = ATOMIC_INIT(0); +static atomic_t _start_capture = ATOMIC_INIT(0); + +static uint32_t _user_shot_cnt_rt; +static uint32_t _shot_cnt_rt; +static uint8_t _shot_capture_en_rt; +static LSM6DS3TR_C_FS_G_ABSTR_e _fs_g_orig; +static LSM6DS3TR_C_ODR_G_e _odr_g_orig; +static LSM6DS3TR_C_FS_XL_e _fs_xl_orig; +static LSM6DS3TR_C_ODR_XL_e _odr_xl_orig; +K_MUTEX_DEFINE(shot_capture_enable_mutex); /* Serialize shot capture enable/disable process */ +/* Idle fence for shot capture task */ +K_SEM_DEFINE(shot_capture_idle_sem, 0, 1); +static atomic_t _shot_capture_idle_requested = ATOMIC_INIT(0); + +atomic_t _shot_storage_buf_is_in_use = ATOMIC_INIT(0); + + +/*-------------------------------------------------------------------------------------------------- + * THREAD DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +K_THREAD_STACK_DEFINE(_shot_capture_task_stack, SHOT_CAPTURE_TASK_STACK_SIZE); + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _shot_capture_task(void *p1, void *p2, void *p3); +static ERRNO_e _read_shot_data_into_ring_buf(uint32_t fifo_unread_sample_set_in_bytes, bool end); +static ERRNO_e _read_FIFO_into_ring_buf(int32_t overshoot, uint32_t bytes_to_read); +static void _print_shot_data(void); +static void _shot_capture_config_read(void); +static ERRNO_e _shot_capture_config_write(void); +static void _shot_capture_shotdata_param_cal(void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIOPNS + *------------------------------------------------------------------------------------------------*/ +void SHOT_CAPTURE_init(void) +{ + PRINT(INFO, "Initializing SHOT_CAPTURE...\r\n"); + + /* Initialize IMU. */ + if (IMU_init() < ERRNO_SUCCESS) { + PRINT(CRITICAL, "Failure to initialize IMU.\r\n"); + } + + /* read shot capture config from nvm */ + _shot_capture_config_read(); + + _user_shot_cnt_rt = _shot_capture_config.user_shot_cnt; + _shot_cnt_rt = _shot_capture_config.shot_cnt; + _shot_capture_en_rt = _shot_capture_config.shot_capture_en; +} + +void SHOT_CAPTURE_tap_ths_set(uint8_t tap_ths) +{ + if (tap_ths > 31) { + PRINT(ERROR, "Invalid tap threshold. Use default tap threshold.\r\n"); + if (_shot_capture_config.tap_ths != 4) { + _shot_capture_config.tap_ths = 4; + _shot_capture_config_write(); + } + } else { + if (_shot_capture_config.tap_ths != tap_ths) { + _shot_capture_config.tap_ths = tap_ths; + _shot_capture_config_write(); + } + } + + if (atomic_get(&_shot_capture_is_enabled)) { + /* set tap threshold to be tap_ths * fs_xl/2^5 */ + if (IMU_set_tap_ths(_shot_capture_config.tap_ths) != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to set tap threshold in IMU.\r\n"); + } + } +} + +void SHOT_CAPTURE_quiet_time_set(LSM6DS3TR_C_QUIET_e quiet_time) +{ + if (quiet_time > LSM6DS3TR_C_QUIET_12_OVER_ODR_XL) { + PRINT(ERROR, "Invalid quiet time. Use default quiet time.\r\n"); + if(_shot_capture_config.quiet_time != LSM6DS3TR_C_QUIET_4_OVER_ODR_XL) { + _shot_capture_config.quiet_time = LSM6DS3TR_C_QUIET_4_OVER_ODR_XL; + _shot_capture_config_write(); + } + } else { + if (_shot_capture_config.quiet_time != quiet_time) { + _shot_capture_config.quiet_time = quiet_time; + _shot_capture_config_write(); + } + } + + if (atomic_get(&_shot_capture_is_enabled)) { + /* set the quiet time */ + if (IMU_set_quiet(_shot_capture_config.quiet_time) != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to set quiet time in IMU.\r\n"); + } + } +} + +void SHOT_CAPTURE_shock_time_set(LSM6DS3TR_C_SHOCK_e shock_time) +{ + if (shock_time > LSM6DS3TR_C_SHOCK_24_OVER_ODR_XL) { + PRINT(ERROR, "Invalid shock time. Use default shock time.\r\n"); + if(_shot_capture_config.shock_time != LSM6DS3TR_C_SHOCK_16_OVER_ODR_XL) { + _shot_capture_config.shock_time = LSM6DS3TR_C_SHOCK_16_OVER_ODR_XL; + _shot_capture_config_write(); + } + } else { + if (_shot_capture_config.shock_time != shock_time) { + _shot_capture_config.shock_time = shock_time; + _shot_capture_config_write(); + } + } + + if (atomic_get(&_shot_capture_is_enabled)) { + /* set the shock time */ + if (IMU_set_shock(_shot_capture_config.shock_time) != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to set shock time in IMU.\r\n"); + } + } +} + +void SHOT_CAPTURE_shotdata_duration_location_set(uint8_t duration, uint8_t location) +{ + if (duration < SHOTDATA_DURATION_MIN || duration > SHOTDATA_DURATION_MAX) { + PRINT(ERROR, "Invalid shot data duration. Use default shotdata duration.\r\n"); + if (_shot_capture_config.shot_duration != SHOTDATA_DURATION_DEFAULT) { + _shot_capture_config.shot_duration = SHOTDATA_DURATION_DEFAULT; + _shot_capture_config.shot_location = SHOTDATA_DURATION_DEFAULT / 2; + _shot_capture_config_write(); + _shot_capture_shotdata_param_cal(); + } + } else { + if (_shot_capture_config.shot_duration != duration || _shot_capture_config.shot_location != location) { + _shot_capture_config.shot_duration = duration; + if (location < 0 || location > duration - 1) { + PRINT(ERROR, "Invalid shot data location. Set to middle of shotdata duration.\r\n"); + _shot_capture_config.shot_location = duration / 2; + } else { + _shot_capture_config.shot_location = location; + } + _shot_capture_config_write(); + _shot_capture_shotdata_param_cal(); + } + } +} + +SHOT_CAPTURE_config_s *SHOT_CAPTURE_config_get(void) +{ + return &_shot_capture_config; +} + +ERRNO_e SHOT_CAPTURE_enable(bool enable) +{ + ERRNO_e err = ERRNO_SUCCESS; + uint8_t reg_val = 0; + uint8_t *p_data; + uint32_t size = 0; + + k_mutex_lock(&shot_capture_enable_mutex, K_FOREVER); + + if (enable && !atomic_get(&_shot_capture_is_enabled) && _shot_capture_config.shot_capture_en && !atomic_get(&_shot_storage_buf_is_in_use)) { + k_mutex_lock(&shot_data_mutex, K_FOREVER); + size = shot_data.size; + k_mutex_unlock(&shot_data_mutex); + err = SHOT_STORAGE_get_buf(size, &p_data); + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Cannot enable shot capture, shot storage buffer allocation failed!\r\n"); + goto out; + } else { + k_mutex_lock(&FIFO_ring_buf_mutex, K_FOREVER); + FIFO_ring_buf.buf = p_data; + FIFO_ring_buf.write_ptr = 0; + k_mutex_unlock(&FIFO_ring_buf_mutex); + } + + /* enable shot capture interrupt mode */ + IMU_set_shot_capture_mode(true); + + /* save the original settings for accel and gyro */ + err = IMU_get_fs_xl(&_fs_xl_orig); + + if (err == ERRNO_SUCCESS) { + err = IMU_get_odr_xl(&_odr_xl_orig); + } + + if (err == ERRNO_SUCCESS) { + err = IMU_get_fs_g(&_fs_g_orig); + } + + if (err == ERRNO_SUCCESS) { + err = IMU_get_odr_g(&_odr_g_orig); + } + + /* set accel and gyro to desired settings for shot capture */ + if (err == ERRNO_SUCCESS) { + err = IMU_set_fs_xl(_shot_capture_config.fs_xl); + } + + if (err == ERRNO_SUCCESS) { + err = IMU_set_odr_xl(_shot_capture_config.odr_xl); + } + + if (err == ERRNO_SUCCESS) { + err = IMU_set_fs_g(_shot_capture_config.fs_g); + } + + if (err == ERRNO_SUCCESS) { + err = IMU_set_odr_g(_shot_capture_config.odr_g); + } + + if (err == ERRNO_SUCCESS) { + err = IMU_fifo_th_set(1800); + } + + /* set tap threshold to be 4 * fs_xl/2^5 which is 250mg when fs_xl = 2g*/ + if (err == ERRNO_SUCCESS) { + err = IMU_set_tap_ths(_shot_capture_config.tap_ths); + } + + /* set the quiet time to be 4 * 1/ODR_XL + * in the double-tap case, the quiet time window is the time during which a second tap is + * ignored after the detection of the first tap (for debounce). When the lir bit is set to 0, the quiet time + * also defines the length of the interrupt pulse (in both single and double-tap cases). + * since we set lir to 1, the quiet time here has no effect. + */ + if (err == ERRNO_SUCCESS) { + err = IMU_set_quiet(_shot_capture_config.quiet_time); + } + + /* set the shock time + * the shock time window defines the maximum duration of the overthreshold event: + * the acceleration must return below the threshold before the shock window has expired, + * otherwise the tap event is not detected. + */ + if (err == ERRNO_SUCCESS) { + err = IMU_set_shock(_shot_capture_config.shock_time); + } + + /* enable interrrupt for tap event */ + if (err == ERRNO_SUCCESS) { + err = IMU_set_interrupts_enable(LSM6DS3TR_C_INTERRUPTS_ENABLE); + } + + /* enable tap detection on x direction of imu*/ + if (err == ERRNO_SUCCESS) { + err = IMU_set_tap_x_en(LSM6DS3TR_C_TAP_X_EN_ENABLED); + } + + /* enable latched interrupt*/ + if (err == ERRNO_SUCCESS) { + err = IMU_set_lir(LSM6DS3TR_C_LIR_ENABLED); + } + + /** + * Single-tap interrupt driven to INT1 pin + * According to AN5130 In order to enable the latch feature on the single-tap interrupt + * signal, both the LIR bit and the INT1_DOUBLE_TAP bit of MD1_CFG have to be set to 1: + * the interrupt is kept active until the TAP_SRC register is read. + */ + if (err == ERRNO_SUCCESS) { + err = IMU_set_int1_single_tap(LSM6DS3TR_C_INT1_SINGLE_TAP_ENABLED); + } + + if (err == ERRNO_SUCCESS) { + err = IMU_set_int1_double_tap(LSM6DS3TR_C_INT1_DOUBLE_TAP_ENABLED); + } + + if (err == ERRNO_SUCCESS) { + atomic_set(&_shot_capture_is_enabled, 1); + } + + PRINT(INFO, "SHOT_CAPTURE enabled.\r\n"); + } else if ((!enable || !_shot_capture_config.shot_capture_en || atomic_get(&_shot_storage_buf_is_in_use)) && atomic_get(&_shot_capture_is_enabled)) { + /* Disable single-tap interrupt driven to INT1 pin */ + err = I2C_bytes_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_MD1_CFG, ®_val, 1); + + /* Disable interrupts, lir, and tap detection on X, Y, Z axis */ + if (err == ERRNO_SUCCESS) { + err = I2C_bytes_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_TAP_CFG, ®_val, 1); + } + + /* reads tap source register to clear the interrupt source */ + if (err == ERRNO_SUCCESS) { + err = I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_TAP_SRC, ®_val, 1); + } + + /* disable IMU fifo and FTH interrupt is disconnected to INT1 pin*/ + if (err == ERRNO_SUCCESS) { + err = IMU_fifo_th_set(0); + } + + /* if shot_capture_sem is non zero reset it because _shot_capture_task no longer needs to run */ + k_sem_reset(&shot_capture_sem); + + /* restore original accel and gyro settings */ + if (err == ERRNO_SUCCESS && _fs_xl_orig != _shot_capture_config.fs_xl) { + err = IMU_set_fs_xl(_fs_xl_orig); + } + + if (err == ERRNO_SUCCESS && _odr_xl_orig != _shot_capture_config.odr_xl) { + err = IMU_set_odr_xl(_odr_xl_orig); + } + + if (err == ERRNO_SUCCESS && _fs_g_orig != _shot_capture_config.fs_g) { + err = IMU_set_fs_g(_fs_g_orig); + } + + if (err == ERRNO_SUCCESS && _odr_g_orig != _shot_capture_config.odr_g) { + err = IMU_set_odr_g(_odr_g_orig); + } + + k_mutex_lock(&FIFO_ring_buf_mutex, K_FOREVER); + FIFO_ring_buf.buf = NULL; + k_mutex_unlock(&FIFO_ring_buf_mutex); + + /* disable shot capture interrupt mode */ + IMU_set_shot_capture_mode(false); + + atomic_set(&_shot_capture_is_enabled, 0); + + PRINT(INFO, "SHOT_CAPTURE disabled.\r\n"); + } else { + err = ERRNO_SUCCESS; + goto out; + } + +out: + k_mutex_unlock(&shot_capture_enable_mutex); + return err; +} + +bool SHOT_CAPTURE_is_enabled(void) +{ + return atomic_get(&_shot_capture_is_enabled) ? true : false; +} + +ERRNO_e SHOT_CAPTURE_save_shot_cnt(void) +{ + ERRNO_e err = ERRNO_SUCCESS; + + if (_user_shot_cnt_rt != _shot_capture_config.user_shot_cnt || + _shot_cnt_rt != _shot_capture_config.shot_cnt || + _shot_capture_en_rt != _shot_capture_config.shot_capture_en) { + //_user_shot_cnt_rt = _shot_capture_config.user_shot_cnt; + //_shot_cnt_rt = _shot_capture_config.shot_cnt; + //_shot_capture_en_rt = _shot_capture_config.shot_capture_en; + err = _shot_capture_config_write(); + } + + return err; +} + +void SHOT_CAPTURE_task_install(void) +{ + static k_tid_t id; + static struct k_thread data; + + id = k_thread_create(&data, + _shot_capture_task_stack, + SHOT_CAPTURE_TASK_STACK_SIZE, + _shot_capture_task, + NULL, + NULL, + NULL, + SHOT_CAPTURE_THREAD_PRIORITY, + 0, + K_NO_WAIT); + k_thread_name_set(&data, "SHOT_CAPTURE_task"); +} + +void SHOT_CAPTURE_task_disable_and_wait(void) +{ + /* 1. Disable capture (serialized with FSM) */ + atomic_set(&_shot_storage_buf_is_in_use, 1); + SHOT_CAPTURE_enable(false); + + /* 2. Request idle confirmation from _shot_capture_task */ + k_sem_reset(&shot_capture_idle_sem); + atomic_set(&_shot_capture_idle_requested, 1); + + /* + * 3. Wake the capture task so it can see the idle request. + * If it's already waiting on shot_capture_sem, this + * lets it loop once and post the idle confirmation. + */ + k_sem_give(&shot_capture_sem); + + /* 4. Wait for confirmation that capture task is idle */ + k_sem_take(&shot_capture_idle_sem, K_FOREVER); + atomic_set(&_shot_capture_idle_requested, 0); +} + +void SHOT_CAPTURE_task_resume(void) +{ + atomic_set(&_shot_storage_buf_is_in_use, 0); +} + +void SHOT_CAPTURE_cli_cmd(int32_t argc, char **argv) +{ + if (argc == 0) { + PRINT (INFO, "SHOT CAPTURE\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "shot capture enabled: %s\r\n", SHOT_CAPTURE_is_enabled() ? "true" : "false"); + } else if (argc == 1) { + if (!strcmp (argv[0], "-ps") || !strcmp (argv[0], "--printshot")) { + _print_shot_data(); + } else if (!strcmp (argv[0], "-sc") || !strcmp (argv[0], "--startcapture")) { + atomic_set(&_start_capture, 1); + PRINT(INFO, "Manual start capture triggered.\r\n"); + } else if (!strcmp (argv[0], "-tw") || !strcmp (argv[0], "--testwrite")) { + uint8_t *p_data; + uint32_t test_size = 1000; + uint32_t write_ptr_offset = 700; /* 70% into buffer to test wraparound */ + ERRNO_e err; + + /* 1. Get shared buffer from shot_storage */ + err = SHOT_STORAGE_get_buf(test_size, &p_data); + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to get buffer: %d\r\n", err); + return; + } + + /* 2. Fill buffer with sequential data starting at write_ptr offset. + * Stream cursor reads from write_ptr forward with wrapping: + * buf[700]=0, buf[701]=1, ..., buf[999]=299, buf[0]=300, ..., buf[699]=699 + */ + for (uint32_t i = 0; i < test_size; i++) { + uint32_t buf_pos = (write_ptr_offset + i) % test_size; + p_data[buf_pos] = (uint8_t)(i & 0xFF); + } + + /* 3. Set up shot_data so file_create picks up the right values */ + k_mutex_lock(&shot_data_mutex, K_FOREVER); + shot_data.start = write_ptr_offset; + shot_data.size = test_size; + shot_data.time = k_uptime_get_32(); + shot_data.ambient_light_intensity = 12345; + shot_data.marked = true; + shot_data.ready = true; + shot_data.saved = false; + k_mutex_unlock(&shot_data_mutex); + + /* 4. Create file and write to flash directly (synchronous) */ + err = SHOT_STORAGE_file_create(); + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to create file: %d\r\n", err); + return; + } + SHOT_STORAGE_write(); + + /* 5. Fill buffer with new sequential data starting at write_ptr offset. */ + for (uint32_t i = 0; i < test_size; i++) { + uint32_t buf_pos = (write_ptr_offset + i) % test_size; + p_data[buf_pos] = (uint8_t)((i+10) & 0xFF); + } + + /* 6. Reset shot_data flags */ + k_mutex_lock(&shot_data_mutex, K_FOREVER); + shot_data.marked = false; + shot_data.ready = false; + shot_data.saved = true; + k_mutex_unlock(&shot_data_mutex); + + PRINT(INFO, "Test write complete!\r\n"); + PRINT(INFO, " Data size: %u bytes\r\n", test_size); + PRINT(INFO, " Write ptr (start): %u (tests buffer wraparound)\r\n", write_ptr_offset); + PRINT(INFO, " Expected content after header: 0,1,2,...,255,0,1,...,187 (repeating mod 256)\r\n"); + PRINT(INFO, " Run 'shot_storage --read' to verify.\r\n"); + } else { + goto USAGE; + } + } else if (argc == 2) { + if (!strcmp(argv[0], "-e") || !strcmp(argv[0], "--enable")) { + if (!strcmp(argv[1], "true")) { + SHOT_CAPTURE_enable(true); + } else if (!strcmp(argv[1], "false")) { + SHOT_CAPTURE_enable(false); + } else { + goto USAGE; + } + } else if (!strcmp(argv[0], "-ss") || !strcmp(argv[0], "--setshock")) { + if (!strcmp(argv[1], "0")) { + SHOT_CAPTURE_shock_time_set(LSM6DS3TR_C_SHOCK_4_OVER_ODR_XL); + } else if (!strcmp(argv[1], "1")) { + SHOT_CAPTURE_shock_time_set(LSM6DS3TR_C_SHOCK_8_OVER_ODR_XL); + } else if (!strcmp(argv[1], "2")) { + SHOT_CAPTURE_shock_time_set(LSM6DS3TR_C_SHOCK_16_OVER_ODR_XL); + } else if (!strcmp(argv[1], "3")) { + SHOT_CAPTURE_shock_time_set(LSM6DS3TR_C_SHOCK_24_OVER_ODR_XL); + } else { + goto USAGE; + } + } else if (!strcmp(argv[0], "-sq") || !strcmp(argv[0], "--setquiet")) { + if (!strcmp(argv[1], "0")) { + SHOT_CAPTURE_quiet_time_set(LSM6DS3TR_C_QUIET_2_OVER_ODR_XL); + } else if (!strcmp(argv[1], "1")) { + SHOT_CAPTURE_quiet_time_set(LSM6DS3TR_C_QUIET_4_OVER_ODR_XL); + } else if (!strcmp(argv[1], "2")) { + SHOT_CAPTURE_quiet_time_set(LSM6DS3TR_C_QUIET_8_OVER_ODR_XL); + } else if (!strcmp(argv[1], "3")) { + SHOT_CAPTURE_quiet_time_set(LSM6DS3TR_C_QUIET_12_OVER_ODR_XL); + } else { + goto USAGE; + } + } else if (!strcmp(argv[0], "-sths") || !strcmp(argv[0], "--setthreshold")) { + if (atoi(argv[1]) >= 0 && atoi(argv[1]) <= 31) { + SHOT_CAPTURE_tap_ths_set((uint8_t)atoi(argv[1])); + } else { + goto USAGE; + } + } else { + goto USAGE; + } + } else if (argc == 3) { + if (!strcmp(argv[0], "-sdl") || !strcmp(argv[0], "--shotdurloc")) { + uint8_t duration = (uint8_t)atoi(argv[1]); + uint8_t location = (uint8_t)atoi(argv[2]); + SHOT_CAPTURE_shotdata_duration_location_set(duration, location); + } else { + goto USAGE; + } + } + else { + USAGE: + PRINT(INFO, "Usage: shot_capture [OPTION...]\r\n"); + PRINT(INFO, " -ps | --printshot Prints shot data from ring buffer\r\n"); + PRINT(INFO, " -sc | --startcapture Manually starts shot capture\r\n"); + PRINT(INFO, " -tw | --testwrite Writes test data to flash (use 'shot_storage --read' to verify)\r\n"); + PRINT(INFO, " -e | --enable Enables shot capture\r\n"); + PRINT(INFO, " <%%b> true = enable\r\n"); + PRINT(INFO, " false = disable\r\n"); + PRINT(INFO, " -ss | --setshock Sets shock time\r\n"); + PRINT(INFO, " <%%d> 0 = 4/ODR_XL 1 = 8/ODR_XL 2 = 16/ODR_XL 3 = 24/ODR_XL\r\n"); + PRINT(INFO, " -sq | --setquiet Sets quiet time\r\n"); + PRINT(INFO, " <%%d> 0 = 2/ODR_XL 1 = 4/ODR_XL 2 = 8/ODR_XL 3 = 12/ODR_XL\r\n"); + PRINT(INFO, " -sths | --setthreshold Sets tap threshold\r\n"); + PRINT(INFO, " <%%d> Tap threshold value (0-31)\r\n"); + PRINT(INFO, " -sdl | --shotdurationandlocation Sets shot duration and location\r\n"); + PRINT(INFO, " <%%d> Shot duration\r\n"); + PRINT(INFO, " <%%d> Shot location\r\n"); + } +} + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _shot_capture_task(void *p1, void *p2, void *p3) +{ + uint16_t fifo_unread_words; + uint8_t empty; + uint8_t smart_full; + uint8_t fifo_overrun; + uint8_t fifo_fth_hit; + uint8_t tap_src_reg; + uint32_t fifo_unread_sample_set_in_bytes; + int32_t overshoot; + uint32_t bytes_to_read; + uint32_t bytes_to_read_into_dummy = 0; + uint32_t bytes_to_read_after_shot = 0; + + //timing_init(); + //timing_start(); + + while(1) { + /* Wait for IMU interrupt indefinitely*/ + int ret = k_sem_take(&shot_capture_sem, K_FOREVER); + if (ret != 0) { + /* if k_sem_reset is called ret is -EAGAIN, in that case just continue and wait for the next give */ + continue; + } + + /* Check if someone requested us to confirm idle */ + if (atomic_get(&_shot_capture_idle_requested)) { + k_sem_give(&shot_capture_idle_sem); + /* Stay in loop, will block again on shot_capture_sem. + * Since capture is disabled, no new IMU interrupts will come. */ + continue; + } + + DBG_STAT_INC_SAFE(fifo_read_task_counter, stat_mutex); + /* always check the single tap source register first to clear the interrupt source*/ + I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_TAP_SRC, &tap_src_reg, 1); + /** + * Dectected shot and the ring buffer does not contain shot data then record current + * shot into ring buffer + */ + k_mutex_lock(&shot_data_mutex, K_FOREVER); + k_mutex_lock(&FIFO_ring_buf_mutex, K_FOREVER); + if (((tap_src_reg & 0x40) || atomic_get(&_start_capture)) && !shot_data.marked) { + shot_data.saved = false; + bytes_to_read_after_shot = shot_data.bytes_after_shot; + DBG_STAT_INC_SAFE(read_shot_data_counter, stat_mutex); + IMU_fifo_status_1to2_read(&fifo_unread_words, &empty, &smart_full, &fifo_overrun, &fifo_fth_hit); + /** + * each sample set has shot_data.words_per_sample_set 16-bit samples depending on the + * odr of acclerometer and gyroscope + * we always work on the integer # of sample set in bytes + */ + fifo_unread_sample_set_in_bytes = (fifo_unread_words / shot_data.words_per_sample_set) * shot_data.bytes_per_sample_set; + /* shot data is at the end of the IMU FIFO */ + _read_shot_data_into_ring_buf(fifo_unread_sample_set_in_bytes, true); + + ///* disable shot data interrupt*/ + //I2C_bytes_write (I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_MD1_CFG, (uint8_t[]){0}, 1); + } else { + /** + * 1. no shot detected and shot data is not marked in the ring buffer F,T + * 2. no shot detected and shot data is marked in the ring buffer F,F + * 3. shot detected and shot data is marked in the ring buffer T,F + */ + DBG_STAT_INC_SAFE(fifo_waterM_total_hit_counter, stat_mutex); + IMU_fifo_status_1to2_read(&fifo_unread_words, &empty, &smart_full, &fifo_overrun, &fifo_fth_hit); + if (fifo_fth_hit) { + DBG_STAT_INC_SAFE(fifo_waterM_hit_counter, stat_mutex); + DBG_STAT_INC_IF_SAFE(fifo_overrun, fifo_overrun_counter, stat_mutex); + DBG_STAT_TRACK_VALUE_SAFE(fifo_unread_words, unread_words_before_read, stat_mutex); + DBG_STAT_TRACK_MAX_SAFE(fifo_unread_words, max_unread_words_before_read, stat_mutex); + fifo_unread_sample_set_in_bytes = (fifo_unread_words / shot_data.words_per_sample_set) * shot_data.bytes_per_sample_set; + /** + * shot data is ready but has not been written completely into the flash + * dump shot data into a dummy buffer to not to cause corruption in the ring buffer + */ + if (shot_data.ready == true) { + DBG_STAT_INC_SAFE(read_into_dummy_counter, stat_mutex); + IMU_set_fifo_mode(LSM6DS3TR_C_FIFO_MODE_BYPASS); /* reset the fifo content */ + IMU_set_fifo_mode(LSM6DS3TR_C_FIFO_MODE_CONTINUOUS); + //I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_DATA_OUT_L, &_dummy_buf[0], fifo_unread_sample_set_in_bytes); + } else { + DBG_STAT_INC_SAFE(fifo_read_FTH_counter, stat_mutex); + if (shot_data.marked == true) { + /** + * Takes care of scenario 2 and 3. Read FIFO high watermark data to specified amount + * defined in shot_data.bytes_after_shot + */ + if (bytes_to_read_after_shot > fifo_unread_sample_set_in_bytes) { + bytes_to_read = fifo_unread_sample_set_in_bytes; + bytes_to_read_after_shot = bytes_to_read_after_shot - fifo_unread_sample_set_in_bytes; + } else { + if (bytes_to_read_after_shot < fifo_unread_sample_set_in_bytes) { + bytes_to_read_into_dummy = fifo_unread_sample_set_in_bytes - bytes_to_read_after_shot; + } + bytes_to_read = bytes_to_read_after_shot; + shot_data.ready = true; + } + overshoot = FIFO_ring_buf.write_ptr + bytes_to_read - shot_data.size; + _read_FIFO_into_ring_buf(overshoot, bytes_to_read); + + if (bytes_to_read_into_dummy) { + /* blocking read */ + IMU_set_fifo_mode(LSM6DS3TR_C_FIFO_MODE_BYPASS); /* reset the fifo content */ + IMU_set_fifo_mode(LSM6DS3TR_C_FIFO_MODE_CONTINUOUS); + //I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_DATA_OUT_L, &_dummy_buf[0], bytes_to_read_into_dummy); + bytes_to_read_into_dummy = 0; + } + + if (shot_data.ready) { + shot_data.start = FIFO_ring_buf.write_ptr; + SHOT_STORAGE_begin_write(); + } + IMU_fifo_status_1to2_read(&fifo_unread_words, &empty, &smart_full, &fifo_overrun, &fifo_fth_hit); + DBG_STAT_TRACK_VALUE_SAFE(fifo_unread_words, unread_words_after_read, stat_mutex); + DBG_STAT_TRACK_MAX_SAFE(fifo_unread_words, max_unread_words_after_read, stat_mutex); + } else { + /* takes care of scenario 1 and read FIFO high watermark data*/ + if (NULL != FIFO_ring_buf.buf) { + /* break it into 2 reads if this read is going to exceed the ring buffer size */ + overshoot = FIFO_ring_buf.write_ptr + fifo_unread_sample_set_in_bytes - shot_data.size; + _read_FIFO_into_ring_buf(overshoot, fifo_unread_sample_set_in_bytes); + /* debug*/ + IMU_fifo_status_1to2_read(&fifo_unread_words, &empty, &smart_full, &fifo_overrun, &fifo_fth_hit); + DBG_STAT_TRACK_VALUE_SAFE(fifo_unread_words, unread_words_after_read, stat_mutex); + DBG_STAT_TRACK_MAX_SAFE(fifo_unread_words, max_unread_words_after_read, stat_mutex); + + /* check if the shot motion happens when during the i2c transfer of FIFO high watermark data*/ + I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_TAP_SRC, &tap_src_reg, 1); + + if ((tap_src_reg & 0x40) || atomic_get(&_start_capture)) { + shot_data.saved = false; + DBG_STAT_INC_SAFE(read_shot_data_after_fifo_read_counter, stat_mutex); + IMU_fifo_status_1to2_read(&fifo_unread_words, &empty, &smart_full, &fifo_overrun, &fifo_fth_hit); + fifo_unread_sample_set_in_bytes = (fifo_unread_words / shot_data.words_per_sample_set) * shot_data.bytes_per_sample_set; /* convert integer # of sample set to bytes*/ + /* shot data is not necessarily at the end of IMU FIFO*/ + _read_shot_data_into_ring_buf(fifo_unread_sample_set_in_bytes, false); + k_sem_take(&shot_capture_sem, K_NO_WAIT); + } + } else { + IMU_set_fifo_mode(LSM6DS3TR_C_FIFO_MODE_BYPASS); /* reset the fifo content */ + IMU_set_fifo_mode(LSM6DS3TR_C_FIFO_MODE_CONTINUOUS); + //I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_DATA_OUT_L, &_dummy_buf[0], fifo_unread_sample_set_in_bytes); + /* debug*/ + IMU_fifo_status_1to2_read(&fifo_unread_words, &empty, &smart_full, &fifo_overrun, &fifo_fth_hit); + DBG_STAT_TRACK_VALUE_SAFE(fifo_unread_words, unread_words_after_read, stat_mutex); + DBG_STAT_TRACK_MAX_SAFE(fifo_unread_words, max_unread_words_after_read, stat_mutex); + } + } + } + } + } + atomic_set(&_start_capture, 0); + k_mutex_unlock(&FIFO_ring_buf_mutex); + k_mutex_unlock(&shot_data_mutex); + } +} + + // start_time = timing_counter_get(); + // busy_wait_active = true; + // k_busy_wait(300000); + // busy_wait_active = false; + // end_time = timing_counter_get(); + // cycles_with_dma = timing_cycles_get(&start_time, &end_time); + +static ERRNO_e _read_shot_data_into_ring_buf(uint32_t fifo_unread_sample_set_in_bytes, bool end) +{ + ERRNO_e err; + int32_t overshoot; + uint32_t shot_location; + uint32_t unread_sample_set; + uint32_t unread_sample_set_in_half; + + ALS_read((ALS_data_s *) &shot_data.ambient_light_intensity); + shot_data.time = k_uptime_get_32(); + + /* determine the location of shot_data in the ring buffer */ + if (end == false) { + /* if shot happens during reading high watermark data, we guess the shot data happens in the middle */ + unread_sample_set = fifo_unread_sample_set_in_bytes / shot_data.bytes_per_sample_set; + if (unread_sample_set == 1) { + unread_sample_set_in_half = 1; + } else { + unread_sample_set_in_half = unread_sample_set / 2; + } + overshoot = FIFO_ring_buf.write_ptr + (unread_sample_set_in_half * shot_data.bytes_per_sample_set) - shot_data.size; + } else { + overshoot = FIFO_ring_buf.write_ptr + fifo_unread_sample_set_in_bytes - shot_data.size; + } + + if (overshoot < 0) { + shot_data.location = FIFO_ring_buf.write_ptr + fifo_unread_sample_set_in_bytes - shot_data.bytes_per_sample_set; + } else { + if (overshoot > 0) { + shot_data.location = overshoot - shot_data.bytes_per_sample_set; + + } else { + shot_data.location = shot_data.size - shot_data.bytes_per_sample_set; + } + } + + /* break it into 2 reads if this read is going to exceed the buffer size*/ + overshoot = FIFO_ring_buf.write_ptr + fifo_unread_sample_set_in_bytes - shot_data.size; + err = _read_FIFO_into_ring_buf(overshoot, fifo_unread_sample_set_in_bytes); + + shot_data.marked = true; + + return err; +} + +static ERRNO_e _read_FIFO_into_ring_buf(int32_t overshoot, uint32_t bytes_to_read) +{ + ERRNO_e err; + + if (overshoot < 0) { + err = I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_DATA_OUT_L, &(FIFO_ring_buf.buf[FIFO_ring_buf.write_ptr]), bytes_to_read); + FIFO_ring_buf.write_ptr = FIFO_ring_buf.write_ptr + bytes_to_read; + } else if (overshoot > 0) { + err = I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_DATA_OUT_L, &(FIFO_ring_buf.buf[FIFO_ring_buf.write_ptr]), (shot_data.size - FIFO_ring_buf.write_ptr)); + err = I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_DATA_OUT_L, &(FIFO_ring_buf.buf[0]), overshoot); + FIFO_ring_buf.write_ptr = overshoot; + FIFO_ring_buf.loop_ctr += 1; + } else { + err = I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_DATA_OUT_L, &(FIFO_ring_buf.buf[FIFO_ring_buf.write_ptr]), bytes_to_read); + FIFO_ring_buf.write_ptr = 0; + FIFO_ring_buf.loop_ctr += 1; + } + + return err; +} + +static void _print_shot_data(void) +{ + uint32_t read_ptr; + bool is_shot_data_marked; + bool is_shot_data_ready; + bool is_shot_data_saved; + uint32_t size; + + k_mutex_lock(&shot_data_mutex, K_FOREVER); + is_shot_data_marked = shot_data.marked; + is_shot_data_ready = shot_data.ready; + is_shot_data_saved = shot_data.saved; + size = shot_data.size; + read_ptr = shot_data.start; + k_mutex_unlock(&shot_data_mutex); + + if (is_shot_data_ready && FIFO_ring_buf.buf != NULL) { + /* print each sample set in G GyroX, GyroY, GyroZ, AccX, AccY, AccZ format */ + PRINT(INFO, "%d\r\n", LSM6DS3TR_C_FS_XL_TO_G(_shot_capture_config.fs_xl)); + PRINT(INFO, "%d\r\n", LSM6DS3TR_C_ODR_XL_TO_HZ(_shot_capture_config.odr_xl)); + PRINT(INFO, "GyroX, GyroY, GyroZ, AccX, AccY, AccZ\r\n"); + for (int i = 0; i < size; i += 12) { + PRINT (INFO, "%d,%d,%d,%d,%d,%d\r\n", *((int16_t *) &FIFO_ring_buf.buf[read_ptr]), \ + *((int16_t *) &FIFO_ring_buf.buf[read_ptr + 2]), \ + *((int16_t *) &FIFO_ring_buf.buf[read_ptr + 4]), \ + *((int16_t *) &FIFO_ring_buf.buf[read_ptr + 6]), \ + *((int16_t *) &FIFO_ring_buf.buf[read_ptr + 8]), \ + *((int16_t *) &FIFO_ring_buf.buf[read_ptr + 10])); + if ((read_ptr + 10) == (size - 2)) { + read_ptr = 0; + } else { + read_ptr += 12; + } + /* prevent watchdog timeout due to slow print on serial port over uart*/ + WDT_feed (); + } + + k_mutex_lock(&shot_data_mutex, K_FOREVER); + shot_data.marked = false; + shot_data.ready = false; + shot_data.saved = true; + k_mutex_unlock(&shot_data_mutex); + } else { + PRINT (INFO, "Shot data is not ready!\r\n"); + } +} + +static void _shot_capture_config_read(void) +{ + ERRNO_e err; + SHOT_CAPTURE_config_s cfg; + + err = FS_open_or_create(SHOT_CAPTURE_FILENAME, &_shot_capture_file, sizeof(SHOT_CAPTURE_config_s), FS_FILE_DEPTH_DEFAULT); + if (err == ERRNO_SUCCESS) { + /* Read file. */ + err = FS_read(_shot_capture_file, (uint8_t *) &cfg, 0, sizeof(SHOT_CAPTURE_config_s)); + + /* Check file entry is valid */ + if (err != ERRNO_SUCCESS) { + /* write defaults to file */ + _shot_capture_config_write(); + return; + } + + /* Check file entry is valid. */ + if (cfg.shot_duration < 1 || cfg.shot_duration > 10 || + cfg.shot_location < 0 || cfg.shot_location >= cfg.shot_duration || + cfg.shot_duration * 3 * 2 * (LSM6DS3TR_C_ODR_G_TO_HZ(cfg.odr_g) + LSM6DS3TR_C_ODR_XL_TO_HZ(cfg.odr_xl)) > _SHOT_STORAGE_FILE_SIZE) { + PRINT(ERROR, "Invalid shot_duration in shot capture configuration file. Writing defaults.\r\n"); + _shot_capture_config_write(); + return; + } + + /* Update shot capture configuration to what was read from flash. */ + _shot_capture_config = cfg; + if (_shot_capture_config.shot_duration != SHOTDATA_DURATION_DEFAULT || + _shot_capture_config.shot_location != SHOTDATA_LOCATION_DEFAULT || + _shot_capture_config.odr_g != LSM6DS3TR_C_ODR_G_416Hz || + _shot_capture_config.odr_xl != LSM6DS3TR_C_ODR_XL_416Hz) { + _shot_capture_shotdata_param_cal(); + } + } else if (err == ERRNO_SIZE_MISMATCH) { + /* Config has been modified, need to delete old file and write new configuration. */ + err = FS_delete(SHOT_CAPTURE_FILENAME); + + if (err != ERRNO_SUCCESS) { + /* Something else is going on... */ + PRINT(ERROR, "Failure to delete old shot capture file.\r\n"); + return; + } + + /* Create new file. */ + err = FS_open_or_create (SHOT_CAPTURE_FILENAME, &_shot_capture_file, sizeof (SHOT_CAPTURE_config_s), FS_FILE_DEPTH_DEFAULT); + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failure to create shot capture configuration file.\r\n"); + } + else { + PRINT(INFO, "New shot capture created successfully\r\n"); + } + + /* Write default config to file. */ + _shot_capture_config_write(); + } else { + /* write default */ + _shot_capture_config_write(); + } +} + +static ERRNO_e _shot_capture_config_write(void) +{ + ERRNO_e err; + + err = FS_write(_shot_capture_file, (uint8_t *) &_shot_capture_config); + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to write shot capture configuration to file.\r\n"); + } + return err; +} + +static void _shot_capture_shotdata_param_cal(void) +{ + uint32_t sample_set_odr_Hz; + + sample_set_odr_Hz = LSM6DS3TR_C_ODR_XL_TO_HZ(MIN((uint8_t)_shot_capture_config.odr_g, (uint8_t)_shot_capture_config.odr_xl)); + + k_mutex_lock(&shot_data_mutex, K_FOREVER); + shot_data.words_per_sample_set = ((LSM6DS3TR_C_ODR_G_TO_HZ(_shot_capture_config.odr_g) / sample_set_odr_Hz) + + (LSM6DS3TR_C_ODR_XL_TO_HZ(_shot_capture_config.odr_xl) / sample_set_odr_Hz)) * 3; + shot_data.bytes_per_sample_set = shot_data.words_per_sample_set * 2; + shot_data.size = _shot_capture_config.shot_duration * sample_set_odr_Hz * shot_data.bytes_per_sample_set; + shot_data.bytes_after_shot = (_shot_capture_config.shot_duration - _shot_capture_config.shot_location) * sample_set_odr_Hz * shot_data.bytes_per_sample_set; + k_mutex_unlock(&shot_data_mutex); +} diff --git a/src/app/shot_capture.h b/src/app/shot_capture.h new file mode 100644 index 0000000..cfc96b7 --- /dev/null +++ b/src/app/shot_capture.h @@ -0,0 +1,146 @@ +/** + * @file shot_captre.h + * @brief Shot Capture module + * @author + * @date Oct 16 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef SHOT_CAPTURE_H_ +#define SHOT_CAPTURE_H_ + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include +#include /* Zephyr MIN() macro */ + +#include "../bsp/imu.h" +#include "../bsp/imu_reg.h" + +#include "../lib/errno.h" +#include "../lib/debug.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define SHOT_CAPTURE_TASK_STACK_SIZE (1024) +#define SHOT_CAPTURE_THREAD_PRIORITY (4) + +#define SHOTDATA_DURATION_MIN (2) +#define SHOTDATA_DURATION_MAX (10) +#define GYRO_ODR_DEFAULT_HZ (416) +#define ACCEL_ODR_DEFAULT_HZ (416) +#define SHOTDATA_DURATION_DEFAULT (4) +#define SHOTDATA_LOCATION_DEFAULT (SHOTDATA_DURATION_DEFAULT / 2) +#define SAMPLE_SET_ODR_DEFAULT_HZ MIN(GYRO_ODR_DEFAULT_HZ, ACCEL_ODR_DEFAULT_HZ) +#define BYTES_PER_SAMPLE_SET (GYRO_ODR_DEFAULT_HZ / SAMPLE_SET_ODR_DEFAULT_HZ + ACCEL_ODR_DEFAULT_HZ / SAMPLE_SET_ODR_DEFAULT_HZ) * 3 * 2 +#define WORDS_PER_SAMPLE_SET (GYRO_ODR_DEFAULT_HZ / SAMPLE_SET_ODR_DEFAULT_HZ + ACCEL_ODR_DEFAULT_HZ / SAMPLE_SET_ODR_DEFAULT_HZ) * 3 +#define SHOTDATA_SIZE_IN_BYTES_DEFAULT (SHOTDATA_DURATION_DEFAULT * SAMPLE_SET_ODR_DEFAULT_HZ * BYTES_PER_SAMPLE_SET) +#define BYTES_AFTER_SHOT_DEFAULT (SHOTDATA_DURATION_DEFAULT - SHOTDATA_LOCATION_DEFAULT) * SAMPLE_SET_ODR_DEFAULT_HZ * BYTES_PER_SAMPLE_SET + +#define SHOT_CAPTURE_FILENAME ("shot_capture") + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct FIFO_ring_buf_s { + uint8_t *buf; + uint16_t write_ptr; + uint16_t read_ptr; + uint32_t loop_ctr; +} FIFO_ring_buf_s; + +typedef struct shot_data_status { + /* system up time in ms */ + uint32_t time; + /* start location of shot data in the ring buffer */ + uint32_t start; + /* location of the shot data sample in the ring buffer */ + uint32_t location; + /* words per sample set */ + uint8_t words_per_sample_set; + /* words per sample set */ + uint8_t bytes_per_sample_set; + /* size of shot data in bytes */ + uint32_t size; + /* bytes to read after shot data */ + uint32_t bytes_after_shot; + /* ambient light intensity */ + uint32_t ambient_light_intensity; + /* flag to determine if shot data has been marked */ + bool marked; + /* flag to determine if there are enough samples after shot data */ + bool ready; + /* flag to show if the shot data window is written in to the flash */ + bool saved; +} shot_data_status_s; + +typedef struct SHOT_CAPTURE_config { + uint8_t shot_duration; + uint8_t shot_location; + LSM6DS3TR_C_FS_G_ABSTR_e fs_g; + LSM6DS3TR_C_ODR_G_e odr_g; + LSM6DS3TR_C_FS_XL_e fs_xl; + LSM6DS3TR_C_ODR_XL_e odr_xl; + uint8_t tap_ths; + LSM6DS3TR_C_QUIET_e quiet_time; + LSM6DS3TR_C_SHOCK_e shock_time; + uint32_t user_shot_cnt; + uint32_t shot_cnt; + uint8_t shot_capture_en; +} __attribute__((packed, aligned(1))) SHOT_CAPTURE_config_s; + + +/*-------------------------------------------------------------------------------------------------- + * GLOBAL VARIABLE DECLARATION + *------------------------------------------------------------------------------------------------*/ +extern volatile FIFO_ring_buf_s FIFO_ring_buf; +extern volatile shot_data_status_s shot_data; +extern struct k_mutex shot_data_mutex; +extern struct k_mutex FIFO_ring_buf_mutex; +extern struct k_mutex stat_mutex; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void SHOT_CAPTURE_init(void); + +void SHOT_CAPTURE_tap_ths_set(uint8_t tap_ths); +void SHOT_CAPTURE_quiet_time_set(LSM6DS3TR_C_QUIET_e quiet_time); +void SHOT_CAPTURE_shock_time_set(LSM6DS3TR_C_SHOCK_e shock_time); + +void SHOT_CAPTURE_shotdata_duration_location_set(uint8_t duration, uint8_t location); + +SHOT_CAPTURE_config_s *SHOT_CAPTURE_config_get(void); + +ERRNO_e SHOT_CAPTURE_enable(bool enable); + +bool SHOT_CAPTURE_is_enabled(void); + +ERRNO_e SHOT_CAPTURE_save_shot_cnt(void); + +void SHOT_CAPTURE_task_install(void); + +/** + * @brief Disable shot capture and wait until the capture task is confirmed idle. + * Must NOT be called from _shot_capture_task itself. + */ +void SHOT_CAPTURE_task_disable_and_wait(void); + +void SHOT_CAPTURE_task_resume(void); + +void SHOT_CAPTURE_cli_cmd(int32_t argc, char **argv); + + +#endif /* SHOT_CAPTURE_H */ \ No newline at end of file diff --git a/src/app/shot_storage.c b/src/app/shot_storage.c new file mode 100644 index 0000000..4bda1ae --- /dev/null +++ b/src/app/shot_storage.c @@ -0,0 +1,835 @@ +/** + * @file shot_storage.c + * @brief Shot Storage Module + * @author Kenny Tran + * @date Sep 02 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include +#include +#include /* Zephyr MIN() macro */ + +#include "../app/app.h" +#include "../app/shot_capture.h" +#include "../app/ble.h" +#include "../app/motion.h" + +#include "../lib/errno.h" +#include "../lib/fs.h" +#include "../lib/print.h" + +#include "../bsp/imu.h" +#include "../bsp/nvm_ext.h" +#include "../bsp/wdt.h" + +#include "../wrappers/spi.h" + +#include "shot_storage.h" + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +/** + * @brief For use with reading NVM external status bit. + * */ +#define _SHOT_STORAGE_NVM_STATUS_BUSY_MASK (0x01) +#define _SHOT_STORAGE_NVM_EXT_STATUS_BUSY (0x01) + +#define _SHOT_STORAGE_NVM_PAGE_PROG_LEN (4) + + +K_THREAD_STACK_DEFINE(_shot_storage_write_stack, SHOT_STORAGE_WRITE_THREAD_STACK_SIZE); +K_THREAD_STACK_DEFINE(_shot_storage_read_stack, SHOT_STORAGE_READ_THREAD_STACK_SIZE); + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC VARIABLE DEFINITIOPNS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static SHOT_STORAGE_file_s _shot_storage_files[SHOT_STORAGE_MAX_FILES]; +static SHOT_STORAGE_file_s _shot_storage_current_file = { + .header_ver = 0, + .shot_data_format_ver = 0, + .reserved = 0, + .shot_data_offset = sizeof(SHOT_STORAGE_file_s), + .gyro_bits_per_axis = 16, + .accel_bits_per_axis = 16, + .IMU_orientation = 0x0FED, /* away from user: -x, to the right of user: -y, towards earth: -z */ +}; +K_SEM_DEFINE(write_shotdata_sem, 0, 1); +static char _temp_name[SHOT_STORAGE_FILENAME_LEN]; +static uint8_t _shot_storage_buf[_SHOT_STORAGE_FILE_SIZE]; +static uint32_t _shot_storage_addr = _SHOT_STORAGE_START_ADDR; +static uint32_t _shot_storage_write_pages = 0; +static uint32_t _shot_storage_bytes_remaining = 0; +static uint8_t _shot_storage_staging_buf[_SHOT_STORAGE_NVM_PAGE_PROG_LEN + NVM_EXT_PAGE_SIZE]; +static uint32_t _shot_storage_logic_stream_start = 0; +static FS_file_t _shot_storage_tracking_file; + +/* Circular file storage tracking (persisted to internal flash) */ +static SHOT_STORAGE_tracking_s _shot_storage_tracking = { + .write_idx = 0, + .file_cnt = 0, + .total_written = 0, +}; + +/* Read task synchronization */ +K_SEM_DEFINE(read_shotdata_request, 0, 1); /* Trigger read task */ +K_SEM_DEFINE(read_shotdata_buf_ready, 0, 1); /* Buffer ready for consumer */ +K_SEM_DEFINE(read_shotdata_consumed, 0, 1); /* Consumer finished reading */ + +/* Idle fence for write task */ +static K_SEM_DEFINE(shot_storage_write_idle_sem, 0, 1); +static atomic_t _shot_storage_write_idle_requested = ATOMIC_INIT(0); + +/* Track who requested the read */ +static atomic_t _read_request_source = ATOMIC_INIT(READ_REQ_NONE); + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _shot_storage_files_init (void); +static bool _shot_storage_is_empty (uint8_t *p_data, uint32_t len); +static ERRNO_e _shot_storage_nvm_page_write (uint32_t addr, uint8_t *p_src, uint32_t rem_len); +static void _shot_storage_nvm_wait_til_ready (void); +static void _shot_storage_write_task (void *p1, void *p2, void *p3); +static void _shot_storage_read_task (void *p1, void *p2, void *p3); +static void _shot_storage_tracking_read (void); +static ERRNO_e _shot_storage_tracking_write (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void SHOT_STORAGE_init (void) +{ + PRINT (INFO, "Initializing SHOT STORAGE...\r\n"); + + if (NVM_EXT_init () < ERRNO_SUCCESS) + { + PRINT (CRITICAL, "Failure to initialize NVM_EXT.\r\n"); + } + + _shot_storage_files_init (); +} + +void SHOT_STORAGE_task_install (void) +{ + static k_tid_t write_id; + static struct k_thread write_data; + static k_tid_t read_id; + static struct k_thread read_data; + + write_id = k_thread_create (&write_data, + _shot_storage_write_stack, + SHOT_STORAGE_WRITE_THREAD_STACK_SIZE, + _shot_storage_write_task, + NULL, + NULL, + NULL, + SHOT_STORAGE_WRITE_THREAD_PRIORITY, + 0, + K_NO_WAIT); + + k_thread_name_set(&write_data, "SHOT_STORAGE_write_task"); + + read_id = k_thread_create (&read_data, + _shot_storage_read_stack, + SHOT_STORAGE_READ_THREAD_STACK_SIZE, + _shot_storage_read_task, + NULL, + NULL, + NULL, + SHOT_STORAGE_READ_THREAD_PRIORITY, + 0, + K_NO_WAIT); + + k_thread_name_set(&read_data, "SHOT_STORAGE_read_task"); +} + +ERRNO_e SHOT_STORAGE_get_buf(uint32_t size, uint8_t **pp_data) +{ + if (size > _SHOT_STORAGE_FILE_SIZE) { + *pp_data = NULL; + PRINT (CRITICAL, "Failure to get buffer. Requested size too large!\r\n"); + return ERRNO_EXCEED_FILE_SIZE; + } + + /* return pointer to the statically allocated shot data buffer */ + *pp_data = &_shot_storage_buf[sizeof(SHOT_STORAGE_file_s)]; + + return ERRNO_SUCCESS; +} + +ERRNO_e SHOT_STORAGE_file_create(void) +{ + if (_shot_storage_current_file.shot_data_size > _SHOT_STORAGE_FILE_SIZE) { + PRINT (CRITICAL, "Failure to create new file. File size too large!\r\n"); + return ERRNO_EXCEED_FILE_SIZE; + } + + /* Assign file name. */ + // int len = snprintf(_temp_name, SHOT_STORAGE_FILENAME_LEN, "%s", p_filename); + // if (len >= SHOT_STORAGE_FILENAME_LEN) { + // PRINT(WARNING, "Filename truncated: %s\n", p_filename); + // return ERRNO_EXCEED_NAME_SIZE; + // } + + /* fill file header info */ + k_mutex_lock(&shot_data_mutex, K_FOREVER); + _shot_storage_logic_stream_start = shot_data.start; + _shot_storage_current_file.time_of_shot = shot_data.time; + _shot_storage_current_file.ambient_light_intensity = shot_data.ambient_light_intensity; + _shot_storage_current_file.shot_data_size = shot_data.size; + k_mutex_unlock(&shot_data_mutex); + + _shot_storage_current_file.power_cnt = APP_info_get ().power_cnt; + _shot_storage_current_file.gyro_sample_rate_hz = LSM6DS3TR_C_ODR_G_TO_HZ(SHOT_CAPTURE_config_get()->odr_g); + _shot_storage_current_file.accel_sample_rate_hz = LSM6DS3TR_C_ODR_XL_TO_HZ(SHOT_CAPTURE_config_get()->odr_xl); + _shot_storage_current_file.gyro_full_scale_dps = LSM6DS3TR_C_FS_G_TO_DPS(SHOT_CAPTURE_config_get()->fs_g); + _shot_storage_current_file.accel_full_scale_g = LSM6DS3TR_C_FS_XL_TO_G(SHOT_CAPTURE_config_get()->fs_xl); + _shot_storage_current_file.accel_cal = MOTION_config_get ()->accel_cal; + _shot_storage_current_file.gyro_cal = MOTION_config_get ()->gyro_cal; + + return ERRNO_SUCCESS; +} + +void SHOT_STORAGE_begin_write(void) { + k_sem_give(&write_shotdata_sem); +} + +void SHOT_STORAGE_write (void) { + ERRNO_e err = ERRNO_SUCCESS; + struct stream_cursor cur; + uint32_t copied = 0; + uint32_t slot = _shot_storage_tracking.write_idx; + + /* Generate unique name using total_written counter */ + //int len = snprintf(_shot_storage_current_file.name, SHOT_STORAGE_FILENAME_LEN, "%s_%u", _temp_name, (_shot_storage_tracking.total_written + 1)); + //if (len >= SHOT_STORAGE_FILENAME_LEN) { + // PRINT(WARNING, "Generated filename truncated\n"); + //} + + /* If all slots are full, erase the oldest slot before writing */ + if (_shot_storage_tracking.file_cnt >= SHOT_STORAGE_MAX_FILES) { + uint32_t oldest_addr = _SHOT_STORAGE_START_ADDR + (slot * _SHOT_STORAGE_TOTAL_FILE_SIZE); + if (NVM_EXT_erase_block(oldest_addr, NVM_EXT_BLOCK_SIZE_64KB)) { + PRINT(CRITICAL, "Failure to erase oldest slot %u!\r\n", slot); + return; + } + PRINT(INFO, "Overwrote oldest file: power_cnt: %u, time: %.3f s, (slot %u)\r\n", _shot_storage_files[slot].power_cnt, (float) _shot_storage_files[slot].time_of_shot / 1000.0, slot); + } + + SHOT_STORAGE_stream_cursor_init(&cur, (const uint8_t *)&_shot_storage_current_file, sizeof(SHOT_STORAGE_file_s), + &_shot_storage_buf[sizeof(SHOT_STORAGE_file_s)], _shot_storage_current_file.shot_data_size, _shot_storage_logic_stream_start); + + _shot_storage_addr = _SHOT_STORAGE_START_ADDR + (slot * _SHOT_STORAGE_TOTAL_FILE_SIZE); + + while (stream_cursor_remaining(&cur)) { + copied = stream_cursor_read(&cur, &_shot_storage_staging_buf[4], NVM_EXT_PAGE_SIZE); + err = _shot_storage_nvm_page_write(_shot_storage_addr, _shot_storage_staging_buf, copied); + if (err != ERRNO_SUCCESS) break; + _shot_storage_addr += NVM_EXT_PAGE_SIZE; + } + + if (err != ERRNO_SUCCESS) { + /* Erase the partially written slot */ + uint32_t fail_addr = _SHOT_STORAGE_START_ADDR + (slot * _SHOT_STORAGE_TOTAL_FILE_SIZE); + NVM_EXT_erase_block(fail_addr, NVM_EXT_BLOCK_SIZE_64KB); + PRINT(CRITICAL, "Write failed, erased partial data at slot %u\r\n", slot); + } else { + SHOT_CAPTURE_config_get()->shot_cnt++; + SHOT_CAPTURE_config_get()->user_shot_cnt++; + BLE_notify(BLE_CHAR_USER_SHOT_CNT, &(SHOT_CAPTURE_config_get()->user_shot_cnt), sizeof(SHOT_CAPTURE_config_get()->user_shot_cnt)); + /* Update tracking */ + _shot_storage_files[slot] = _shot_storage_current_file; + if (_shot_storage_tracking.file_cnt < SHOT_STORAGE_MAX_FILES) { + _shot_storage_tracking.file_cnt++; + } + _shot_storage_tracking.write_idx = (slot + 1) % SHOT_STORAGE_MAX_FILES; + _shot_storage_tracking.total_written++; + _shot_storage_tracking_write(); + } +} + +bool SHOT_STORAGE_write_done (void) +{ + return (_shot_storage_write_pages == 0 && _shot_storage_bytes_remaining == 0); +} + +uint8_t *SHOT_STORAGE_last_read (SHOT_STORAGE_file_s *p_file) +{ + uint32_t addr; + uint16_t len; + uint32_t newest_idx; + + if (!_shot_storage_tracking.file_cnt) + { + return NULL; + } + + /* Newest file is the one most recently written */ + newest_idx = (_shot_storage_tracking.write_idx - 1 + SHOT_STORAGE_MAX_FILES) % SHOT_STORAGE_MAX_FILES; + addr = _SHOT_STORAGE_START_ADDR + (newest_idx * _SHOT_STORAGE_TOTAL_FILE_SIZE); + len = _shot_storage_files[newest_idx].shot_data_size + sizeof(SHOT_STORAGE_file_s); + + if (NVM_EXT_read(addr, _shot_storage_buf, (uint32_t) len)) + { + PRINT(CRITICAL, "Failure to read shot data from external NVM...\r\n"); + } + + *p_file = _shot_storage_files[newest_idx]; + + return _shot_storage_buf; +} + +void SHOT_STORAGE_last_erase(void) +{ + uint32_t addr; + uint32_t newest_idx; + + if (!_shot_storage_tracking.file_cnt) { + PRINT(INFO, "No files exist!\r\n"); + return; + } + + newest_idx = (_shot_storage_tracking.write_idx - 1 + SHOT_STORAGE_MAX_FILES) % SHOT_STORAGE_MAX_FILES; + addr = _SHOT_STORAGE_START_ADDR + (newest_idx * _SHOT_STORAGE_TOTAL_FILE_SIZE); + + if (NVM_EXT_erase_block (addr, NVM_EXT_BLOCK_SIZE_64KB)) { + PRINT(CRITICAL, "Failure to erase shot data from external NVM...\r\n"); + return; + } + + memset(&_shot_storage_files[newest_idx], 0xFF, sizeof(SHOT_STORAGE_file_s)); + _shot_storage_tracking.file_cnt--; + _shot_storage_tracking.write_idx = newest_idx; + _shot_storage_tracking_write(); +} + +ERRNO_e SHOT_STORAGE_eraseall(void) +{ + uint32_t addr; + + for (addr = _SHOT_STORAGE_START_ADDR; addr < _SHOT_STORAGE_END_ADDR; addr += NVM_EXT_BLOCK_SIZE_64KB) { + if (NVM_EXT_erase_block(addr, NVM_EXT_BLOCK_SIZE_64KB)) { + PRINT(CRITICAL, "Failure to erase shot data from external NVM...\r\n"); + return ERRNO_NVM_FAILURE; + } + k_msleep(5); /* Sleep to allow other tasks to run and prevent WDT reset during long erase */ + } + + /* Reset tracking and file headers */ + memset(_shot_storage_files, 0xFF, sizeof(_shot_storage_files)); + _shot_storage_tracking.write_idx = 0; + _shot_storage_tracking.file_cnt = 0; + _shot_storage_tracking.total_written = 0; + _shot_storage_tracking_write(); + + return ERRNO_SUCCESS; +} + +uint32_t SHOT_STORAGE_get_file_cnt(void) +{ + return _shot_storage_tracking.file_cnt; +} + +void SHOT_STORAGE_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) { + PRINT (INFO, "SHOT STORAGE\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "Files : %u / %u\r\n", _shot_storage_tracking.file_cnt, SHOT_STORAGE_MAX_FILES); + PRINT (INFO, "Write index : %u\r\n", _shot_storage_tracking.write_idx); + PRINT (INFO, "Total saved : %u\r\n", _shot_storage_tracking.total_written); + } + else if (argc == 1) { + if (!strcmp (argv[0], "--list") || !strcmp (argv[0], "-l")) { + uint32_t i; + + if (!_shot_storage_tracking.file_cnt) { + PRINT (INFO, "No files stored.\r\n"); + } + /* List from oldest to newest */ + for (i = 0; i < _shot_storage_tracking.file_cnt; i++) { + uint32_t idx = (_shot_storage_tracking.write_idx - _shot_storage_tracking.file_cnt + i + SHOT_STORAGE_MAX_FILES) % SHOT_STORAGE_MAX_FILES; + PRINT (INFO, "Slot %2u: power_cnt: %u, time: %.3f s\r\n", idx, _shot_storage_files[idx].power_cnt, (float) _shot_storage_files[idx].time_of_shot / 1000.0); + } + } + else if (!strcmp (argv[0], "--test")) { + #define FNAME ("shot_storage") + uint8_t *p_data; + SHOT_STORAGE_get_buf(50000, &p_data); + SHOT_STORAGE_file_create(); + + memset (p_data, 9, 50000); + + PRINT (INFO, "writing...\r\n"); + + SHOT_STORAGE_write(); + + PRINT (INFO, "writing done. Current file count in flash: %u \r\n", _shot_storage_tracking.file_cnt); + } + else if (!strcmp (argv[0], "--done")) { + PRINT (INFO, "%s\r\n", SHOT_STORAGE_write_done () ? "done" : "not done"); + } + else if (!strcmp (argv[0], "--read") || !strcmp (argv[0], "-r")) { + SHOT_STORAGE_file_s file; + + /* Request the read task to load data from flash */ + SHOT_STORAGE_request_read(READ_REQ_CLI); + + /* Wait for buffer to be ready */ + if (SHOT_STORAGE_wait_buf_ready() != 0) { + PRINT(ERROR, "Failed to get read buffer\r\n"); + return; + } + + uint8_t *p_data = _shot_storage_buf; + + /* Copy the entire file header struct (includes name) */ + memcpy(&file, p_data, sizeof(SHOT_STORAGE_file_s)); + + /* Print file name with guaranteed null termination */ + PRINT(INFO, "Power Count: %u\r\n", file.power_cnt); + PRINT(INFO, "Time of shot: %u ms\r\n", file.time_of_shot); + PRINT(INFO, "Header version: %u\r\n", file.header_ver); + PRINT(INFO, "Shot data format version: %u\r\n", file.shot_data_format_ver); + PRINT(INFO, "Ambient light intensity: %u\r\n", file.ambient_light_intensity); + PRINT(INFO, "Shot data offset: %u bytes\r\n", file.shot_data_offset); + PRINT(INFO, "Shot data size: %u bytes\r\n", file.shot_data_size); + PRINT(INFO, "Gyro bits per axis: %u\r\n", file.gyro_bits_per_axis); + PRINT(INFO, "Accel bits per axis: %u\r\n", file.accel_bits_per_axis); + PRINT(INFO, "Gyro sample rate: %u Hz\r\n", file.gyro_sample_rate_hz); + PRINT(INFO, "Accel sample rate: %u Hz\r\n", file.accel_sample_rate_hz); + PRINT(INFO, "Gyro full scale: %u dps\r\n", file.gyro_full_scale_dps); + PRINT(INFO, "Accel full scale: %u g\r\n", file.accel_full_scale_g); + PRINT(INFO, "IMU orientation: 0x%04X\r\n", file.IMU_orientation); + + /*The shot data in the buffer is already in order thanks to the stream cursor function */ + PRINT(INFO, "GyroX, GyroY, GyroZ, AccX, AccY, AccZ\r\n"); + for (int i = sizeof(SHOT_STORAGE_file_s); i < sizeof(SHOT_STORAGE_file_s) + file.shot_data_size; i += 12) { + PRINT(INFO, "%d,%d,%d,%d,%d,%d\r\n", *((int16_t *) &p_data[i]), \ + *((int16_t *) &p_data[i + 2]), \ + *((int16_t *) &p_data[i + 4]), \ + *((int16_t *) &p_data[i + 6]), \ + *((int16_t *) &p_data[i + 8]), \ + *((int16_t *) &p_data[i + 10])); + WDT_feed(); /* prevent watchdog timeout due to slow print on serial port over uart */ + } + + SHOT_STORAGE_last_erase(); + PRINT (INFO, "Power cnt: %u, time: %.3f s erased...\r\n", file.power_cnt, (float) file.time_of_shot/1000.0); + + /* Signal read task that we're done */ + SHOT_STORAGE_read_done(); + } + else if (!strcmp (argv[0], "--eraseall") || !strcmp (argv[0], "-ra")) { + if (SHOT_STORAGE_eraseall() == ERRNO_SUCCESS) { + PRINT(INFO, "Erased all 64kB sectors and reset tracking!\r\n"); + } + } + } +} + +void SHOT_STORAGE_stream_cursor_init(struct stream_cursor *cur, + const uint8_t *header, uint32_t header_size, + const uint8_t *buffer, uint32_t data_size, + uint32_t write_ptr) +{ + cur->header = header; + cur->header_size = header_size; + cur->buffer = buffer; + cur->data_size = data_size; + cur->write_ptr = write_ptr; + cur->total = header_size + data_size; + cur->offset = 0; +} + +uint32_t stream_cursor_read(struct stream_cursor *cur, uint8_t *dst, uint32_t len) +{ + uint32_t copied = 0; + + while (copied < len && cur->offset < cur->total) { + uint32_t want = len - copied; + + if (cur->offset < cur->header_size) { + /* + * Region 1: Header + * Straightforward linear copy from header array. + */ + uint32_t hdr_remaining = cur->header_size - cur->offset; + uint32_t chunk = MIN(want, hdr_remaining); + + memcpy(dst + copied, cur->header + cur->offset, chunk); + copied += chunk; + cur->offset += chunk; + + } else { + /* + * Region 2: Circular buffer data + * + * Map the logical data offset to a physical buffer position, + * then copy the largest contiguous chunk available without + * crossing the buffer boundary. + */ + uint32_t data_offset = cur->offset - cur->header_size; + uint32_t buf_pos = (cur->write_ptr + data_offset) % cur->data_size; + + /* How much data is left in the logical stream */ + uint32_t data_remaining = cur->data_size - data_offset; + + /* How many contiguous bytes from buf_pos to end of effective region */ + uint32_t contiguous = cur->data_size - buf_pos; + + uint32_t chunk = MIN(want, MIN(data_remaining, contiguous)); + + memcpy(dst + copied, cur->buffer + buf_pos, chunk); + copied += chunk; + cur->offset += chunk; + } + } + + return copied; +} + +uint32_t stream_cursor_remaining(struct stream_cursor *cur) +{ + return cur->total - cur->offset; +} + +void SHOT_STORAGE_wait_write_task_idle(void) +{ + /* 1. Request idle confirmation from _shot_storage_write_task */ + k_sem_reset(&shot_storage_write_idle_sem); + atomic_set(&_shot_storage_write_idle_requested, 1); + + /* + * 2. Wake the write task so it can see the idle request. + * If it's already waiting on shot_capture_sem, this + * lets it loop once and post the idle confirmation. + */ + k_sem_give(&write_shotdata_sem); /* nudge write task so it can see the request */ + + /* 3. Wait for confirmation that write task is idle */ + k_sem_take(&shot_storage_write_idle_sem, K_FOREVER); + atomic_set(&_shot_storage_write_idle_requested, 0); +} + +void SHOT_STORAGE_request_read(read_request_source_e source) +{ + atomic_set(&_read_request_source, (atomic_val_t)source); + k_sem_give(&read_shotdata_request); +} + +int SHOT_STORAGE_wait_buf_ready(void) +{ + return k_sem_take(&read_shotdata_buf_ready, K_FOREVER); +} + +void SHOT_STORAGE_read_done(void) +{ + k_sem_give(&read_shotdata_consumed); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _shot_storage_files_init (void) +{ + /* Read tracking info from internal flash */ + _shot_storage_tracking_read(); + + /* Read file headers for all valid slots based on tracking */ + if (_shot_storage_tracking.file_cnt > 0) { + for (uint32_t i = 0; i < _shot_storage_tracking.file_cnt; i++) { + uint32_t idx = (_shot_storage_tracking.write_idx - _shot_storage_tracking.file_cnt + i + SHOT_STORAGE_MAX_FILES) % SHOT_STORAGE_MAX_FILES; + uint32_t addr = _SHOT_STORAGE_START_ADDR + (idx * _SHOT_STORAGE_TOTAL_FILE_SIZE); + + if (NVM_EXT_read(addr, (uint8_t *) &_shot_storage_files[idx], sizeof(SHOT_STORAGE_file_s))) { + PRINT(CRITICAL, "Failure to read file header from slot %u\r\n", idx); + } + } + } + + PRINT(INFO, "Shot storage: %u files, write_idx=%u, total_written=%u\r\n", + _shot_storage_tracking.file_cnt, _shot_storage_tracking.write_idx, + _shot_storage_tracking.total_written); +} + +static bool _shot_storage_is_empty (uint8_t *p_data, uint32_t len) +{ + uint32_t i; + + /* Loop through the read data. */ + for (i = 0; i < len; i++) { + /* Scan for empty space. */ + if (p_data[i] != 0xFF) { + return false; + } + } + + return true; +} + +static ERRNO_e _shot_storage_nvm_page_write (uint32_t addr, uint8_t *p_src, uint32_t rem_len) +{ + /* Write enable command must set before performing a write. */ + p_src[0] = 0x06; + + if (SPI_xfer (p_src, 1, NULL, 0) != ERRNO_SUCCESS) + { + PRINT (CRITICAL, "SPI failure transferring write enable.\r\n"); + return ERRNO_SPI_FAILURE; + } + + /* Page program opcode is 0x02. */ + p_src[0] = 0x02; + p_src[1] = _SHOT_STORAGE_SPLIT_BYTE (addr, 2); /* A23 - A16 */ + p_src[2] = _SHOT_STORAGE_SPLIT_BYTE (addr, 1); /* A15 - A8 */ + p_src[3] = _SHOT_STORAGE_SPLIT_BYTE (addr, 0); /* A7 - A0 */ + + /* 256 bytes per page + 4 bytes for op code and address. */ + rem_len = rem_len + 4; + + /* Perform write. */ + if (SPI_xfer (p_src, rem_len, NULL, 0) != ERRNO_SUCCESS) + { + return ERRNO_SPI_FAILURE; + } + + /* Wait for write to complete. */ + _shot_storage_nvm_wait_til_ready (); + + return ERRNO_SUCCESS; +} + +static void _shot_storage_nvm_wait_til_ready (void) +{ + uint8_t op_code = 0x05; + uint8_t rx; + + /* Wait for erase to complete by polling READYn/BUSY bit. */ + do + { + if (SPI_xfer (&op_code, 1, &rx, 1) != ERRNO_SUCCESS) + { + PRINT (CRITICAL, "SPI failure polling ready bit.\r\n"); + } + } while ((rx & _SHOT_STORAGE_NVM_STATUS_BUSY_MASK) == _SHOT_STORAGE_NVM_STATUS_BUSY_MASK); +} + +static void _shot_storage_write_task(void *p1, void *p2, void *p3) +{ + ERRNO_e err = ERRNO_SUCCESS; + uint8_t *p_data; + + while (1) { + int ret = k_sem_take(&write_shotdata_sem, K_FOREVER); + if (ret != 0) { + /* if k_sem_reset is called ret is -EAGAIN, in that case just continue and wait for the next give */ + continue; + } + + /* Check if someone requested us to confirm idle */ + if (atomic_get(&_shot_storage_write_idle_requested)) { + k_sem_give(&shot_storage_write_idle_sem); + continue; + } + + /* Create a file for the current shot data */ + err = SHOT_STORAGE_file_create(); + if (err == ERRNO_SUCCESS) { + SHOT_STORAGE_write(); + err = SHOT_STORAGE_get_buf(shot_data.size, &p_data); + if (err != ERRNO_SUCCESS) { + SHOT_CAPTURE_enable(false); + PRINT(CRITICAL, "Cannot enable shot capture, shot storage buffer allocation failed!\r\n"); + } else { + k_mutex_lock(&FIFO_ring_buf_mutex, K_FOREVER); + FIFO_ring_buf.buf = p_data; + k_mutex_unlock(&FIFO_ring_buf_mutex); + } + } else { + SHOT_CAPTURE_enable(false); + if (err == ERRNO_EXCEED_FILE_SIZE) { + PRINT(CRITICAL, "Cannot enable shot capture, shot data size exceed max file size!\r\n"); + } else { + PRINT(CRITICAL, "Cannot enable shot capture, shot storage filename size exceed limit!\r\n"); + } + } + + k_mutex_lock(&shot_data_mutex, K_FOREVER); + shot_data.marked = false; + shot_data.ready = false; + shot_data.saved = true; + k_mutex_unlock(&shot_data_mutex); + } +} + +static void _shot_storage_read_task(void *p1, void *p2, void *p3) +{ + SHOT_STORAGE_file_s file; + + while (1) { + /* 1. Wait for a read request from CLI or BLE */ + int ret = k_sem_take(&read_shotdata_request, K_FOREVER); + if (ret != 0) { + continue; + } + + read_request_source_e source = (read_request_source_e)atomic_get(&_read_request_source); + + /* Disable shot capture and confrim idle (serialized with FSM via mutex)*/ + SHOT_CAPTURE_task_disable_and_wait(); + + /* Wait for write task to finish and confirm idle */ + SHOT_STORAGE_wait_write_task_idle(); + + /* read last shot data from flash to _shot_storage_buf */ + uint8_t *p_data = SHOT_STORAGE_last_read(&file); + + if (NULL == p_data) { + PRINT(INFO, "No file found!\r\n"); + + if (source == READ_REQ_BLE) { + /* Notify phone that no file was found */ + BLE_shot_data_not_found(); + } else if (source == READ_REQ_CLI) { + /* reset read_shotdata_buf_ready so --read command does not block */ + k_sem_reset(&read_shotdata_buf_ready); + } + /* Resume capture. FSM will call SHOT_CAPTURE_enable(true) if appropriate */ + SHOT_CAPTURE_task_resume(); + continue; + } + + if (source == READ_REQ_BLE) { + /* Notify phone that shot data is ready to be read */ + BLE_shot_data_ready(_shot_storage_buf, + sizeof(SHOT_STORAGE_file_s) + file.shot_data_size); + } else { + /* Notify the CLI read command that buffer is ready */ + k_sem_give(&read_shotdata_buf_ready); + } + + /* Wait for the requester to finish consuming the data */ + if (source == READ_REQ_BLE) { + /* + * BLE path: wait for phone to confirm it received the data. + * Use a timeout so we don't block forever if phone is unresponsive. + * If BLE disconnects during the read, the disconnect callback will + * call k_sem_reset, causing k_sem_take to return -EAGAIN. + */ + ret = k_sem_take(&read_shotdata_consumed, K_MSEC(10000)); + if (ret == 0) { + /* Phone confirmed receipt — safe to erase */ + SHOT_STORAGE_last_erase(); + PRINT(INFO, "Power cnt: %u, time: %.3f s erased...\r\n", file.power_cnt, (float) file.time_of_shot / 1000.0); + } else { + /* Timeout or disconnect — do NOT erase so phone can retry */ + BLE_shot_data_timeout(); + PRINT(WARNING, "BLE read not confirmed (ret=%d), keeping flash data for retry\r\n", ret); + } + } else if (source == READ_REQ_CLI) { + /* + * CLI path: CLI handler will take read_shotdata_buf_ready, + * print the data, call SHOT_STORAGE_last_erase(), then + * give read_shotdata_consumed. + */ + k_sem_take(&read_shotdata_consumed, K_FOREVER); + } + + atomic_set(&_read_request_source, READ_REQ_NONE); + /* Resume shot capture. FSM will re-enable if appropriate */ + SHOT_CAPTURE_task_resume(); + } +} + +static void _shot_storage_tracking_read (void) +{ + ERRNO_e err; + SHOT_STORAGE_tracking_s trk; + + /* allocate two sectors to store this tracking file because it updates for every shot */ + err = FS_open_or_create(SHOT_STORAGE_TRACKING_FILENAME, &_shot_storage_tracking_file, + sizeof(SHOT_STORAGE_tracking_s), (FS_SECTOR_SIZE / (sizeof(SHOT_STORAGE_tracking_s) + + FS_FILE_INDEX_SIZE + + FS_FILE_CHECKSUM_SIZE)) * + (SHOT_STORAGE_TRACKING_FILE_SECTOR - 1)); + + if (err == ERRNO_SUCCESS) { + err = FS_read(_shot_storage_tracking_file, (uint8_t *)&trk, 0, sizeof(SHOT_STORAGE_tracking_s)); + if (err != ERRNO_SUCCESS) { + /* First boot or corrupt — write defaults */ + _shot_storage_tracking_write(); + return; + } + + /* Validate read data */ + if (trk.write_idx >= SHOT_STORAGE_MAX_FILES || trk.file_cnt > SHOT_STORAGE_MAX_FILES) { + PRINT(WARNING, "Invalid tracking data, resetting to defaults\r\n"); + _shot_storage_tracking_write(); + return; + } + + _shot_storage_tracking = trk; + } else if (err == ERRNO_SIZE_MISMATCH) { + /* Struct size changed — delete old file and recreate */ + err = FS_delete(SHOT_STORAGE_TRACKING_FILENAME); + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failure to delete old tracking file.\r\n"); + return; + } + + err = FS_open_or_create(SHOT_STORAGE_TRACKING_FILENAME, &_shot_storage_tracking_file, + sizeof(SHOT_STORAGE_tracking_s), (FS_SECTOR_SIZE / (sizeof(SHOT_STORAGE_tracking_s) + + FS_FILE_INDEX_SIZE + + FS_FILE_CHECKSUM_SIZE)) * + (SHOT_STORAGE_TRACKING_FILE_SECTOR - 1)); + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failure to create tracking file.\r\n"); + } else { + PRINT(INFO, "New shot storage tracking file created successfully\r\n"); + } + + _shot_storage_tracking_write(); + } else { + _shot_storage_tracking_write(); + } +} + +static ERRNO_e _shot_storage_tracking_write (void) +{ + ERRNO_e err; + + err = FS_write(_shot_storage_tracking_file, (uint8_t *)&_shot_storage_tracking); + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to write shot storage tracking to file. Errro: %d \r\n", err); + } + + return err; +} \ No newline at end of file diff --git a/src/app/shot_storage.h b/src/app/shot_storage.h new file mode 100644 index 0000000..41a9aec --- /dev/null +++ b/src/app/shot_storage.h @@ -0,0 +1,176 @@ +/** + * @file shot_storage.h + * @brief Shot Storage Module + * @author Kenny Tran + * @date Sep 02 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef SHOT_STORAGE_H_ +#define SHOT_STORAGE_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include "../lib/errno.h" + +#include "../app/motion.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define SHOT_STORAGE_WRITE_THREAD_STACK_SIZE (1024) +#define SHOT_STORAGE_READ_THREAD_STACK_SIZE (1024) +#define SHOT_STORAGE_WRITE_THREAD_PRIORITY (10) +#define SHOT_STORAGE_READ_THREAD_PRIORITY (5) + +#define SHOT_STORAGE_MAX_FILES (16) + +#define SHOT_STORAGE_FILENAME_LEN (16) + +#define SHOT_STORAGE_TRACKING_FILENAME ("shot_strg_trk") +#define SHOT_STORAGE_TRACKING_FILE_SECTOR (3) + +#define _SHOT_STORAGE_SPLIT_BYTE(x, offset) (0xFF & (x >> (8 * offset))) + +#define _SHOT_STORAGE_START_ADDR (NVM_EXT_SIZE / 2) +#define _SHOT_STORAGE_END_ADDR (NVM_EXT_SIZE - 1) + +#define _SHOT_STORAGE_SECTOR_SIZE (4096) + +#define _SHOT_STORAGE_TOTAL_FILE_SIZE (65536) +#define _SHOT_STORAGE_FILE_SIZE (_SHOT_STORAGE_TOTAL_FILE_SIZE - sizeof(SHOT_STORAGE_file_s)) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct +{ + uint8_t header_ver; + uint32_t power_cnt; + uint32_t time_of_shot; + uint32_t reserved; + uint8_t shot_data_format_ver; + uint32_t ambient_light_intensity; + uint32_t shot_data_offset; + uint32_t shot_data_size; + uint8_t gyro_bits_per_axis; + uint8_t accel_bits_per_axis; + uint16_t gyro_sample_rate_hz; + uint16_t accel_sample_rate_hz; + uint16_t gyro_full_scale_dps; + uint8_t accel_full_scale_g; + uint16_t IMU_orientation; + MOTION_calibration_data_s accel_cal; + MOTION_calibration_data_s gyro_cal; +} __attribute__((packed, aligned(1))) SHOT_STORAGE_file_s; + +/** + * @brief Tracking info for circular file storage. + * Persisted to internal flash across reboots. + */ +typedef struct +{ + uint32_t write_idx; /* Next slot to write to (0 to MAX_FILES-1, wraps) */ + uint32_t file_cnt; /* Number of valid files currently stored (0 to MAX_FILES) */ + uint32_t total_written; /* Total files ever written (monotonic, for unique naming) */ +} __attribute__((packed, aligned(1))) SHOT_STORAGE_tracking_s; + +/** + * Stream cursor that presents a linear view over: + * [header] + [circular buffer data starting at write_ptr] + * + * Handles all boundary crossings (header→data, buffer wrap) transparently. + * The caller just asks for N bytes at a time. + */ +struct stream_cursor { + const uint8_t *header; + uint32_t header_size; + + const uint8_t *buffer; + uint32_t data_size; /* effective size the circular buffer wraps at */ + uint32_t write_ptr; /* where writing stopped = logical start of data */ + uint32_t total; /* header_size + data_size, computed once at init */ + + uint32_t offset; /* current position in the logical stream */ +}; + +typedef enum { + READ_REQ_NONE = 0, + READ_REQ_CLI, + READ_REQ_BLE, +} read_request_source_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC VARIABLE + *------------------------------------------------------------------------------------------------*/ +extern struct k_sem read_shotdata_consumed; + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void SHOT_STORAGE_init (void); + +void SHOT_STORAGE_task_install (void); + +ERRNO_e SHOT_STORAGE_get_buf(uint32_t size, uint8_t **pp_data); + +ERRNO_e SHOT_STORAGE_file_create(void); + +void SHOT_STORAGE_begin_write(void); + +void SHOT_STORAGE_write(void); + +bool SHOT_STORAGE_write_done (void); + +uint8_t *SHOT_STORAGE_last_read (SHOT_STORAGE_file_s *p_file); + +void SHOT_STORAGE_last_erase (void); + +ERRNO_e SHOT_STORAGE_eraseall(void); + +uint32_t SHOT_STORAGE_get_file_cnt(void); + +void SHOT_STORAGE_cli_cmd (int32_t argc, char **argv); + +void SHOT_STORAGE_stream_cursor_init(struct stream_cursor *cur, + const uint8_t *header, uint32_t header_size, + const uint8_t *buffer, uint32_t data_size, + uint32_t write_ptr); + +uint32_t stream_cursor_read(struct stream_cursor *cur, uint8_t *dst, uint32_t len); + +uint32_t stream_cursor_remaining(struct stream_cursor *cur); + + +void SHOT_STORAGE_wait_write_task_idle(void); + +/** + * @brief Request a shot data read from flash. + * @param source Who is requesting (CLI or BLE). + */ +void SHOT_STORAGE_request_read(read_request_source_e source); + +/** + * @brief Wait until the read buffer is ready. + * @return 0 on success, negative on error. + */ +int SHOT_STORAGE_wait_buf_ready(void); + +/** + * @brief Signal that the consumer has finished reading the buffer. + */ +void SHOT_STORAGE_read_done(void); + + +#endif /* SHOT_STORAGE_H_ */ diff --git a/src/app/uuid.h b/src/app/uuid.h new file mode 100644 index 0000000..a9dff19 --- /dev/null +++ b/src/app/uuid.h @@ -0,0 +1,181 @@ +/** + * @file uuid.h + * @brief UUID definitions + * @author Kenny Tran + * @date Jul 10 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef UUID_H_ +#define UUID_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +/* BLE */ +#define UUID_BLE_ADV_NAME_VAL BT_UUID_128_ENCODE(0x00001FFF, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_BLE_ADV_NAME BT_UUID_DECLARE_128(UUID_BLE_ADV_NAME_VAL) + +/* BOND CLEAR */ +#define UUID_BLE_BOND_CLEAR_VAL BT_UUID_128_ENCODE(0x00001550, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_BLE_BOND_CLEAR BT_UUID_DECLARE_128(UUID_BLE_BOND_CLEAR_VAL) + +/* BASE SERVICE */ +#define UUID_BASE_SERVICE_VAL BT_UUID_128_ENCODE(0xBA5E0000, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_BASE_SERVICE BT_UUID_DECLARE_128(UUID_BASE_SERVICE_VAL) + +#define UUID_BASE_EPOCH_VAL BT_UUID_128_ENCODE(0xBA5E0001, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_BASE_EPOCH BT_UUID_DECLARE_128(UUID_BASE_EPOCH_VAL) + +#define UUID_BASE_RTC_TICK_VAL BT_UUID_128_ENCODE(0xBA5E0002, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_BASE_RTC_TICK BT_UUID_DECLARE_128(UUID_BASE_RTC_TICK_VAL) + +/* CONTROLS SERVICE */ +#define UUID_CONTROLS_SERVICE_VAL BT_UUID_128_ENCODE(0x00001523, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_CONTROLS_SERVICE BT_UUID_DECLARE_128(UUID_CONTROLS_SERVICE_VAL) + +/* APP */ +#define UUID_APP_MPCB_VERSION_VAL BT_UUID_128_ENCODE(0x00001500, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_APP_MPCB_VERSION BT_UUID_DECLARE_128(UUID_APP_MPCB_VERSION_VAL) + +#define UUID_APP_RPCB_VERSION_VAL BT_UUID_128_ENCODE(0x00001501, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_APP_RPCB_VERSION BT_UUID_DECLARE_128(UUID_APP_RPCB_VERSION_VAL) + +#define UUID_APP_VERSION_VAL BT_UUID_128_ENCODE(0x00001502, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_APP_VERSION BT_UUID_DECLARE_128(UUID_APP_VERSION_VAL) + +#define UUID_APP_MFG_ID_VAL BT_UUID_128_ENCODE(0x00001503, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_APP_MFG_ID BT_UUID_DECLARE_128(UUID_APP_MFG_ID_VAL) + +#define UUID_APP_MFG_DATE_VAL BT_UUID_128_ENCODE(0x00001504, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_APP_MFG_DATE BT_UUID_DECLARE_128(UUID_APP_MFG_DATE_VAL) + +#define UUID_APP_PN_VAL BT_UUID_128_ENCODE(0x00001505, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_APP_PN BT_UUID_DECLARE_128(UUID_APP_PN_VAL) + +#define UUID_APP_SN_VAL BT_UUID_128_ENCODE(0x00001506, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_APP_SN BT_UUID_DECLARE_128(UUID_APP_SN_VAL) + +#define UUID_APP_POWER_COUNT_VAL BT_UUID_128_ENCODE(0x00001507, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_APP_POWER_COUNT BT_UUID_DECLARE_128(UUID_APP_POWER_COUNT_VAL) + +#define UUID_APP_CLI_ENABLED_VAL BT_UUID_128_ENCODE(0x00001508, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_APP_CLI_ENABLED BT_UUID_DECLARE_128(UUID_APP_CLI_ENABLED_VAL) + +#define UUID_APP_RESET_VAL BT_UUID_128_ENCODE(0x00001509, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_APP_RESET BT_UUID_DECLARE_128(UUID_APP_RESET_VAL) + +/* SCOPE RING */ +#define UUID_RING_COLOR_VAL BT_UUID_128_ENCODE(0x00001524, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_RING_COLOR BT_UUID_DECLARE_128(UUID_RING_COLOR_VAL) + +#define UUID_RING_BRIGHTNESS_VAL BT_UUID_128_ENCODE(0x00001525, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_RING_BRIGHTNESS BT_UUID_DECLARE_128(UUID_RING_BRIGHTNESS_VAL) + +#define UUID_INDICATOR_COLOR_VAL BT_UUID_128_ENCODE(0x00001526, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_INDICATOR_COLOR BT_UUID_DECLARE_128(UUID_INDICATOR_COLOR_VAL) + +#define UUID_INDICATOR_BRIGHTNESS_VAL BT_UUID_128_ENCODE(0x00001527, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_INDICATOR_BRIGHTNESS BT_UUID_DECLARE_128(UUID_INDICATOR_BRIGHTNESS_VAL) + +#define UUID_LEVEL_COLOR_VAL BT_UUID_128_ENCODE(0x00001528, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_LEVEL_COLOR BT_UUID_DECLARE_128(UUID_LEVEL_COLOR_VAL) + +#define UUID_LEVEL_BRIGHTNESS_VAL BT_UUID_128_ENCODE(0x00001529, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_LEVEL_BRIGHTNESS BT_UUID_DECLARE_128(UUID_LEVEL_BRIGHTNESS_VAL) + +#define UUID_LEVEL_SENSITIVITY_VAL BT_UUID_128_ENCODE(0x0000152E, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_LEVEL_SENSITIVITY BT_UUID_DECLARE_128(UUID_LEVEL_SENSITIVITY_VAL) + +#define UUID_LEVEL_VISCOSITY_VAL BT_UUID_128_ENCODE(0x00001532, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_LEVEL_VISCOSITY BT_UUID_DECLARE_128(UUID_LEVEL_VISCOSITY_VAL) + +#define UUID_LEVEL_OPTION_VAL BT_UUID_128_ENCODE(0x00001533, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_LEVEL_OPTION BT_UUID_DECLARE_128(UUID_LEVEL_OPTION_VAL) + +/* BUBBLE */ +#define UUID_BUBBLE_BRIGHTNESS_VAL BT_UUID_128_ENCODE(0x0000152A, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_BUBBLE_BRIGHTNESS BT_UUID_DECLARE_128(UUID_BUBBLE_BRIGHTNESS_VAL) + +/* FIBER */ +#define UUID_FIBER_BRIGHTNESS_VAL BT_UUID_128_ENCODE(0x0000152B, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_FIBER_BRIGHTNESS BT_UUID_DECLARE_128(UUID_FIBER_BRIGHTNESS_VAL) + +/* PIN */ +#define UUID_PIN_BRIGHTNESS_VAL BT_UUID_128_ENCODE(0x0000152C, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_PIN_BRIGHTNESS BT_UUID_DECLARE_128(UUID_PIN_BRIGHTNESS_VAL) + +/* MOTION */ +#define UUID_LEVEL_CALIBRATE_VAL BT_UUID_128_ENCODE(0x0000152D, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_LEVEL_CALIBRATE BT_UUID_DECLARE_128(UUID_LEVEL_CALIBRATE_VAL) + +#define UUID_LEVEL_ANGLE_VAL BT_UUID_128_ENCODE(0x0000152F, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_LEVEL_ANGLE BT_UUID_DECLARE_128(UUID_LEVEL_ANGLE_VAL) + +/* ALS */ +#define UUID_AMBIENT_LIGHT_VAL BT_UUID_128_ENCODE(0x00001530, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_AMBIENT_LIGHT BT_UUID_DECLARE_128(UUID_AMBIENT_LIGHT_VAL) + +/* FSM */ +#define UUID_FSM_TIMEOUT_VAL BT_UUID_128_ENCODE(0x00001531, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_FSM_TIMEOUT BT_UUID_DECLARE_128(UUID_FSM_TIMEOUT_VAL) + +#define UUID_FSM_AUTO_BRIGHTNESS_VAL BT_UUID_128_ENCODE(0x00001534, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_FSM_AUTO_BRIGHTNESS BT_UUID_DECLARE_128(UUID_FSM_AUTO_BRIGHTNESS_VAL) + +#define UUID_FSM_MODE_VAL BT_UUID_128_ENCODE(0x00001541, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_FSM_MODE BT_UUID_DECLARE_128(UUID_FSM_MODE_VAL) + +#define UUID_FSM_APP_CONFIG_VAL BT_UUID_128_ENCODE(0x00001535, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_FSM_APP_CONFIG BT_UUID_DECLARE_128(UUID_FSM_APP_CONFIG_VAL) + +/* BATTERY */ +#define UUID_BATTERY_STATUS_VAL BT_UUID_128_ENCODE(0x00001540, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_BATTERY_STATUS BT_UUID_DECLARE_128(UUID_BATTERY_STATUS_VAL) + +/* SHOT_CAPTURE */ +#define UUID_SHOT_CAPTURE_SERVICE_VAL \ + BT_UUID_128_ENCODE(0xdc1753a0, 0x3838, 0x4d8f, 0xb74a, 0x340723444895) +#define UUID_SHOT_CAPTURE_TAP_THS_VAL \ + BT_UUID_128_ENCODE(0xdc1753a1, 0x3838, 0x4d8f, 0xb74a, 0x340723444895) +#define UUID_SHOT_CAPTURE_QUIET_TIME_VAL \ + BT_UUID_128_ENCODE(0xdc1753a2, 0x3838, 0x4d8f, 0xb74a, 0x340723444895) +#define UUID_SHOT_CAPTURE_SHOCK_TIME_VAL \ + BT_UUID_128_ENCODE(0xdc1753a3, 0x3838, 0x4d8f, 0xb74a, 0x340723444895) +#define UUID_SHOT_CAPTURE_USER_SHOT_CNT_VAL \ + BT_UUID_128_ENCODE(0xdc1753a4, 0x3838, 0x4d8f, 0xb74a, 0x340723444895) +#define UUID_SHOT_CAPTURE_SHOT_CNT_VAL \ + BT_UUID_128_ENCODE(0xdc1753a5, 0x3838, 0x4d8f, 0xb74a, 0x340723444895) +#define UUID_SHOT_CAPTURE_CAPTURE_EN_VAL \ + BT_UUID_128_ENCODE(0xdc1753a6, 0x3838, 0x4d8f, 0xb74a, 0x340723444895) +#define UUID_SHOT_CAPTURE_DUR_LOC_VAL \ + BT_UUID_128_ENCODE(0xdc1753a7, 0x3838, 0x4d8f, 0xb74a, 0x340723444895) +#define UUID_SHOT_CAPTURE_SHOT_DATA_REQUEST_VAL \ + BT_UUID_128_ENCODE(0xdc1753a8, 0x3838, 0x4d8f, 0xb74a, 0x340723444895) +#define UUID_SHOT_CAPTURE_SHOT_DATA_VAL \ + BT_UUID_128_ENCODE(0xdc1753a9, 0x3838, 0x4d8f, 0xb74a, 0x340723444895) + +#define UUID_SHOT_CAPTURE_SERVICE BT_UUID_DECLARE_128(UUID_SHOT_CAPTURE_SERVICE_VAL) +#define UUID_SHOT_CAPTURE_TAP_THS BT_UUID_DECLARE_128(UUID_SHOT_CAPTURE_TAP_THS_VAL) +#define UUID_SHOT_CAPTURE_QUIET_TIME BT_UUID_DECLARE_128(UUID_SHOT_CAPTURE_QUIET_TIME_VAL) +#define UUID_SHOT_CAPTURE_SHOCK_TIME BT_UUID_DECLARE_128(UUID_SHOT_CAPTURE_SHOCK_TIME_VAL) +#define UUID_SHOT_CAPTURE_USER_SHOT_CNT BT_UUID_DECLARE_128(UUID_SHOT_CAPTURE_USER_SHOT_CNT_VAL) +#define UUID_SHOT_CAPTURE_SHOT_CNT BT_UUID_DECLARE_128(UUID_SHOT_CAPTURE_SHOT_CNT_VAL) +#define UUID_SHOT_CAPTURE_CAPTURE_EN BT_UUID_DECLARE_128(UUID_SHOT_CAPTURE_CAPTURE_EN_VAL) +#define UUID_SHOT_CAPTURE_DUR_LOC BT_UUID_DECLARE_128(UUID_SHOT_CAPTURE_DUR_LOC_VAL) +#define UUID_SHOT_CAPTURE_SHOT_DATA_REQUEST BT_UUID_DECLARE_128(UUID_SHOT_CAPTURE_SHOT_DATA_REQUEST_VAL) +#define UUID_SHOT_CAPTURE_SHOT_DATA BT_UUID_DECLARE_128(UUID_SHOT_CAPTURE_SHOT_DATA_VAL) + + +#endif /* UUID_H_ */ diff --git a/src/app/uuid_base.h b/src/app/uuid_base.h new file mode 100644 index 0000000..a0d858a --- /dev/null +++ b/src/app/uuid_base.h @@ -0,0 +1,35 @@ +/** + * @file uuid_base.h + * @brief UUID base definitions + * @author Kenny Tran + * @date Mar 19 2026 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef UUID_BASE_H_ +#define UUID_BASE_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +/* BASE SERVICE */ +#define UUID_BASE_SERVICE_VAL BT_UUID_128_ENCODE(0xBA5E0000, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_BASE_SERVICE BT_UUID_DECLARE_128(UUID_BASE_SERVICE_VAL) + +/* RTC */ +#define UUID_RTC_VAL BT_UUID_128_ENCODE(0xBA5E0100, 0x1212, 0xEFDE, 0x1523, 0x785FEABCD123) +#define UUID_RTC BT_UUID_DECLARE_128(UUID_RTC_VAL) + + +#endif /* UUID_BASE_H_ */ diff --git a/src/bsp/als.c b/src/bsp/als.c new file mode 100644 index 0000000..bf62967 --- /dev/null +++ b/src/bsp/als.c @@ -0,0 +1,634 @@ +/** + * @file ltr329.c + * @brief Driver for LTR-329 ambient light sensor. + * https://www.mouser.com/datasheet/2/239/Lite-On_LTR-329ALS-01%20DS_ver1.1-348647.pdf + * @author Kenny Tran + * @date Mar 06 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include + +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "../wrappers/i2c.h" + +#include "als.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define _LTR329_I2C_DEV_ADDR (0x29) /* I2C address */ +#define _LTR329_REG_PART_ID (0x86) /* Part RD/revision register */ +#define _LTR329_REG_MFG_ID (0x87) /* Manufacturer ID register */ +#define _LTR329_REG_CTRL (0x80) /* ALS control register */ +#define _LTR329_REG_MEAS_RATE (0x85) /* Integration time and data rate */ +#define _LTR329_REG_CH1_0_DATA (0x88) /* Data for channel 1 (read all 4 bytes) */ +#define _LTR329_REG_CH1_1_DATA (0x89) +#define _LTR329_REG_CH0_0_DATA (0x8A) +#define _LTR329_REG_CH0_1_DATA (0x8B) +#define _LTR329_REG_STATUS (0x8C) /* Status register */ + +#define _LTR329_PART_ID (0xA0) /* Expected part ID */ +#define _LTR329_MFG_ID (0x05) /* Expected manufacturing ID */ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct +{ + const uint8_t reg; + const uint8_t bit_start; + const uint8_t bit_len; +} _als_field_s; + +typedef struct +{ + const _als_field_s gain; + const _als_field_s rst; + const _als_field_s enable; + const _als_field_s int_time; + const _als_field_s measure_rate; + const _als_field_s part_no; + const _als_field_s rev_id; + const _als_field_s mfg_id; + const _als_field_s data_valid; + const _als_field_s gain_range; + const _als_field_s data_rdy; +} _als_fields_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static bool _als_init = false; +static const _als_fields_s _als_fields = { + .gain = (_als_field_s) { .reg = _LTR329_REG_CTRL, .bit_start = 4, .bit_len = 3 }, + .rst = (_als_field_s) { .reg = _LTR329_REG_CTRL, .bit_start = 1, .bit_len = 1 }, + .enable = (_als_field_s) { .reg = _LTR329_REG_CTRL, .bit_start = 0, .bit_len = 1 }, + .int_time = (_als_field_s) { .reg = _LTR329_REG_MEAS_RATE, .bit_start = 5, .bit_len = 3 }, + .measure_rate = (_als_field_s) { .reg = _LTR329_REG_MEAS_RATE, .bit_start = 2, .bit_len = 3 }, + .part_no = (_als_field_s) { .reg = _LTR329_REG_PART_ID, .bit_start = 7, .bit_len = 4 }, + .rev_id = (_als_field_s) { .reg = _LTR329_REG_PART_ID, .bit_start = 3, .bit_len = 4 }, + .mfg_id = (_als_field_s) { .reg = _LTR329_REG_MFG_ID, .bit_start = 7, .bit_len = 8 }, + .data_valid = (_als_field_s) { .reg = _LTR329_REG_STATUS, .bit_start = 7, .bit_len = 1 }, + .gain_range = (_als_field_s) { .reg = _LTR329_REG_STATUS, .bit_start = 6, .bit_len = 3 }, + .data_rdy = (_als_field_s) { .reg = _LTR329_REG_STATUS, .bit_start = 2, .bit_len = 1 } +}; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIOPNS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e ALS_init (void) +{ + uint8_t rx; + + if (_als_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (I2C_init (I2C_CH_0) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + /* Read part ID. */ + if (I2C_bytes_read (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _LTR329_REG_PART_ID, &rx, 1) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + /* Return error if part ID mismatch. */ + if (rx != _LTR329_PART_ID) + { + return ERRNO_ID_FAILURE; + } + + /* Read manufacturing ID. */ + if (I2C_bytes_read (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _LTR329_REG_MFG_ID, &rx, 1) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + /* Return error if manufacturing ID mismatch. */ + if (rx != _LTR329_MFG_ID) + { + return ERRNO_ID_FAILURE; + } + + /* Set init flag */ + _als_init = true; + + /* Perform a soft reset. */ + return ALS_reset (); +} + +ERRNO_e ALS_reset (void) +{ + if (!_als_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Write soft reset bit to control register. */ + if (I2C_bits_write (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _als_fields.rst.reg, + 1, _als_fields.rst.bit_start, _als_fields.rst.bit_len) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + /* Per datasheet, need to wait at least 10 ms after reset. */ + k_busy_wait (10000); + + return ERRNO_SUCCESS; +} + +ERRNO_e ALS_enable (bool en) +{ + uint8_t val = (uint8_t) en; + + if (!_als_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (en) + { + /* Write enable bit to control register. */ + if (I2C_bits_write (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _als_fields.enable.reg, + val, _als_fields.enable.bit_start, _als_fields.enable.bit_len) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + } + else + { + if (I2C_bits_write (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _als_fields.enable.reg, + val, _als_fields.enable.bit_start, _als_fields.enable.bit_len) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + } + + /* Per datasheet, need to wait 200 ms for measurement. */ + k_sleep (K_MSEC(200)); + + return ERRNO_SUCCESS; +} + +ERRNO_e ALS_is_enabled (bool *p_enabled) +{ + uint8_t rx; + + if (!_als_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (I2C_bits_read (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _als_fields.enable.reg, &rx, + _als_fields.enable.bit_start, _als_fields.enable.bit_len) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + *p_enabled = (bool) rx; + + return ERRNO_SUCCESS; +} + +ERRNO_e ALS_gain_set (ALS_gain_e gain) +{ + uint8_t tx = (uint8_t) gain; + + if (!_als_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Write gain bits to control register. */ + if (I2C_bits_write (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _als_fields.gain.reg, + tx, _als_fields.gain.bit_start, _als_fields.gain.bit_len) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e ALS_gain_get (ALS_gain_e *p_gain) +{ + uint8_t rx; + + if (!_als_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Read gain bits from control register. */ + if (I2C_bits_read (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _als_fields.gain.reg, + &rx, _als_fields.gain.bit_start, _als_fields.gain.bit_len) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + *p_gain = (ALS_gain_e) rx; + + return ERRNO_SUCCESS; +} + +ERRNO_e ALS_int_time_set (ALS_int_time_e time) +{ + uint8_t tx = (uint8_t) time; + + if (!_als_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Write integration time bits to measure rate register. */ + if (I2C_bits_write (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _als_fields.int_time.reg, + tx, _als_fields.int_time.bit_start, _als_fields.int_time.bit_len) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e ALS_int_time_get (ALS_int_time_e *p_time) +{ + uint8_t rx; + + if (!_als_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Read integration time bits from measure rate register. */ + if (I2C_bits_read (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _als_fields.int_time.reg, + &rx, _als_fields.int_time.bit_start, _als_fields.int_time.bit_len) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + *p_time = (ALS_int_time_e) rx; + + return ERRNO_SUCCESS; +} + +ERRNO_e ALS_measure_rate_set (ALS_measure_rate_e rate) +{ + uint8_t tx = (uint8_t) rate; + + if (!_als_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Write measurement bits to measure rate register. */ + if (I2C_bits_write (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _als_fields.measure_rate.reg, + tx, _als_fields.measure_rate.bit_start, _als_fields.measure_rate.bit_len) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e ALS_measure_rate_get (ALS_measure_rate_e *p_rate) +{ + uint8_t rx; + + if (!_als_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Read measurement bits from measure rate register. */ + if (I2C_bits_read (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _als_fields.measure_rate.reg, + &rx, _als_fields.measure_rate.bit_start, _als_fields.measure_rate.bit_len) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + *p_rate = (ALS_measure_rate_e) rx; + + return ERRNO_SUCCESS; +} + +ERRNO_e ALS_new_data_available (bool *p_available) +{ + uint8_t rx; + + if (!_als_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Read measurement bits from measure rate register. */ + if (I2C_bits_read (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _als_fields.data_rdy.reg, + &rx, _als_fields.data_rdy.bit_start, _als_fields.data_rdy.bit_len) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + *p_available = (bool) rx; + + return ERRNO_SUCCESS; +} + +ERRNO_e ALS_read (ALS_data_s *p_data) +{ + ALS_data_s rx; + + if (!_als_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Read measurement bits from measure rate register. */ + if (I2C_bytes_read (I2C_CH_0, _LTR329_I2C_DEV_ADDR, _LTR329_REG_CH1_0_DATA, + (uint8_t *) &rx, sizeof (rx)) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + *p_data = rx; + + return ERRNO_SUCCESS; +} + +void ALS_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + ALS_gain_e gain; + ALS_int_time_e int_time; + ALS_measure_rate_e meas_rate; + ALS_data_s data; + bool enabled; + + (void) ALS_gain_get (&gain); + (void) ALS_int_time_get (&int_time); + (void) ALS_measure_rate_get (&meas_rate); + (void) ALS_read (&data); + (void) ALS_is_enabled (&enabled); + + + PRINT (INFO, "LTR329\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "Enabled : %s\r\n", (enabled ? "true" : "false")); + PRINT (INFO, "Gain : "); + switch (gain) + { + case ALS_GAIN_1: + PRINT (INFO, "1\r\n"); + break; + case ALS_GAIN_2: + PRINT (INFO, "2\r\n"); + break; + case ALS_GAIN_4: + PRINT (INFO, "4\r\n"); + break; + case ALS_GAIN_8: + PRINT (INFO, "8\r\n"); + break; + case ALS_GAIN_48: + PRINT (INFO, "48\r\n"); + break; + case ALS_GAIN_96: + PRINT (INFO, "96\r\n"); + break; + } + PRINT (INFO, "Integration Time (ms) : "); + switch (int_time) + { + case ALS_INT_TIME_100MS: + PRINT (INFO, "100\r\n"); + break; + case ALS_INT_TIME_50MS: + PRINT (INFO, "50\r\n"); + break; + case ALS_INT_TIME_200MS: + PRINT (INFO, "200\n"); + break; + case ALS_INT_TIME_400MS: + PRINT (INFO, "400\n"); + break; + case ALS_INT_TIME_150MS: + PRINT (INFO, "150\r\n"); + break; + case ALS_INT_TIME_250MS: + PRINT (INFO, "250\r\n"); + break; + case ALS_INT_TIME_300MS: + PRINT (INFO, "300\r\n"); + break; + case ALS_INT_TIME_350MS: + PRINT (INFO, "350\r\n"); + break; + } + PRINT (INFO, "Measurement Rate (ms) : "); + switch (meas_rate) + { + case ALS_MEASURE_RATE_50MS: + PRINT (INFO, "50\r\n"); + break; + case ALS_MEASURE_RATE_100MS: + PRINT (INFO, "100\r\n"); + break; + case ALS_MEASURE_RATE_200MS: + PRINT (INFO, "200\n"); + break; + case ALS_MEASURE_RATE_500MS: + PRINT (INFO, "500\n"); + break; + case ALS_MEASURE_RATE_1000MS: + PRINT (INFO, "1000\r\n"); + break; + case ALS_MEASURE_RATE_2000MS: + PRINT (INFO, "2000\r\n"); + break; + } + PRINT (INFO, "Visible : %d\r\n", data.visible); + PRINT (INFO, "Infrared : %d\r\n", data.infrared); + } + else if (argc == 1) + { + if (!strcmp (argv[0], "--init") || !strcmp (argv[0], "-i")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_init ()); + } + else if (!strcmp (argv[0], "--reset") || !strcmp (argv[0], "-r")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_reset ()); + } + else + { + goto USAGE; + } + } + else if (argc == 2) + { + if (!strcmp (argv[0], "--enable") || !strcmp (argv[0], "-e")) + { + if (!strcmp (argv[1], "true")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_enable (true)); + } + else if (!strcmp (argv[1], "false")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_enable (false)); + } + + } + else if (!strcmp (argv[0], "-g")) + { + if (!strcmp (argv[1], "1")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_gain_set (ALS_GAIN_1)); + } + else if (!strcmp (argv[1], "2")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_gain_set (ALS_GAIN_2)); + } + else if (!strcmp (argv[1], "4")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_gain_set (ALS_GAIN_4)); + } + else if (!strcmp (argv[1], "8")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_gain_set (ALS_GAIN_8)); + } + else if (!strcmp (argv[1], "48")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_gain_set (ALS_GAIN_48)); + } + else if (!strcmp (argv[1], "96")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_gain_set (ALS_GAIN_96)); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-it")) + { + if (!strcmp (argv[1], "100")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_int_time_set (ALS_INT_TIME_100MS)); + } + else if (!strcmp (argv[1], "50")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_int_time_set (ALS_INT_TIME_50MS)); + } + else if (!strcmp (argv[1], "200")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_int_time_set (ALS_INT_TIME_200MS)); + } + else if (!strcmp (argv[1], "400")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_int_time_set (ALS_INT_TIME_400MS)); + } + else if (!strcmp (argv[1], "150")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_int_time_set (ALS_INT_TIME_150MS)); + } + else if (!strcmp (argv[1], "250")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_int_time_set (ALS_INT_TIME_250MS)); + } + else if (!strcmp (argv[1], "300")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_int_time_set (ALS_INT_TIME_300MS)); + } + else if (!strcmp (argv[1], "350")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_int_time_set (ALS_INT_TIME_350MS)); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-mr")) + { + if (!strcmp (argv[1], "50")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_measure_rate_set (ALS_MEASURE_RATE_50MS)); + } + else if (!strcmp (argv[1], "100")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_measure_rate_set (ALS_MEASURE_RATE_100MS)); + } + else if (!strcmp (argv[1], "200")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_measure_rate_set (ALS_MEASURE_RATE_200MS)); + } + else if (!strcmp (argv[1], "500")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_measure_rate_set (ALS_MEASURE_RATE_500MS)); + } + else if (!strcmp (argv[1], "1000")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_measure_rate_set (ALS_MEASURE_RATE_1000MS)); + } + else if (!strcmp (argv[1], "2000")) + { + PRINT (INFO, "Ret code : %d\r\n", ALS_measure_rate_set (ALS_MEASURE_RATE_2000MS)); + } + else + { + goto USAGE; + } + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: als [OPTION...]\r\n"); + PRINT (INFO, " -i | --init Initializes LTR329 ALS module\r\n"); + PRINT (INFO, " -r | --reset Resets LTR329 ALS module\r\n"); + PRINT (INFO, " -e | --enable Enable LTR329 ALS to start measuring\r\n"); + PRINT (INFO, " <%%b> true = enable\r\n"); + PRINT (INFO, " false = disable\r\n"); + PRINT (INFO, " -g Sets the gain\r\n"); + PRINT (INFO, " <%%d> [1, 2, 4, 8, 48, 96]\r\n"); + PRINT (INFO, " -it Sets the integration time (ms)\r\n"); + PRINT (INFO, " <%%d> [100, 50, 200, 400, 150, 250, 300, 350]\r\n"); + PRINT (INFO, " -mr Sets the measurement rate (ms)\r\n"); + PRINT (INFO, " <%%d> [50, 100, 200, 500, 1000, 2000]\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ diff --git a/src/bsp/als.h b/src/bsp/als.h new file mode 100644 index 0000000..0c645ba --- /dev/null +++ b/src/bsp/als.h @@ -0,0 +1,105 @@ +/** + * @file als.h + * @brief Driver for LTR-329 ambient light sensor. + * https://www.mouser.com/datasheet/2/239/Lite-On_LTR-329ALS-01%20DS_ver1.1-348647.pdf + * @author Kenny Tran + * @date Mar 06 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef ALS_H_ +#define ALS_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum ALS_gain +{ + ALS_GAIN_1 = 0, + ALS_GAIN_2 = 1, + ALS_GAIN_4 = 2, + ALS_GAIN_8 = 3, + /* Note: 4 & 5 unused .*/ + ALS_GAIN_48 = 6, + ALS_GAIN_96 = 7 +} ALS_gain_e; + +typedef enum ALS_int_time +{ + ALS_INT_TIME_100MS, + ALS_INT_TIME_50MS, + ALS_INT_TIME_200MS, + ALS_INT_TIME_400MS, + ALS_INT_TIME_150MS, + ALS_INT_TIME_250MS, + ALS_INT_TIME_300MS, + ALS_INT_TIME_350MS, +} ALS_int_time_e; + +typedef enum ALS_measure_rate +{ + ALS_MEASURE_RATE_50MS, + ALS_MEASURE_RATE_100MS, + ALS_MEASURE_RATE_200MS, + ALS_MEASURE_RATE_500MS, + ALS_MEASURE_RATE_1000MS, + ALS_MEASURE_RATE_2000MS, +} ALS_measure_rate_e; + +typedef struct ALS_data +{ + uint16_t visible; + uint16_t infrared; +} ALS_data_s; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e ALS_init (void); + +ERRNO_e ALS_reset (void); + +ERRNO_e ALS_enable (bool en); + +ERRNO_e ALS_is_enabled (bool *p_enabled); + +ERRNO_e ALS_gain_set (ALS_gain_e gain); + +ERRNO_e ALS_gain_get (ALS_gain_e *p_gain); + +ERRNO_e ALS_int_time_set (ALS_int_time_e time); + +ERRNO_e ALS_int_time_get (ALS_int_time_e *p_time); + +ERRNO_e ALS_measure_rate_set (ALS_measure_rate_e rate); + +ERRNO_e ALS_measure_rate_get (ALS_measure_rate_e *p_rate); + +ERRNO_e ALS_new_data_available (bool *p_available); + +ERRNO_e ALS_read (ALS_data_s *p_data); + +void ALS_cli_cmd (int32_t argc, char **argv); + + +#endif /* ALS_H_ */ diff --git a/src/bsp/battery.c b/src/bsp/battery.c new file mode 100644 index 0000000..e57d085 --- /dev/null +++ b/src/bsp/battery.c @@ -0,0 +1,416 @@ +/** + * @file battery.h + * @brief Battery module + * @author Kenny Tran + * @date Dec 02 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include + +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "../wrappers/adc.h" +#include "../wrappers/gpio.h" + +#include "../app/app.h" + +#include "battery.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define _BATTERY_CAPACITY_STEPS (11) +#define _BATTERY_N_CURVES (5) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct +{ + float voltage; + float capacity; /* NOTE: 1.0 = 100 % */ +} _battery_point_s; + +typedef struct +{ + int8_t temp_c; + _battery_point_s curve_readings[_BATTERY_CAPACITY_STEPS]; +} _battery_table_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static bool _battery_init = false; +static _battery_table_s _battery_tables[_BATTERY_N_CURVES] = +{ + { + .temp_c = -20, + { (_battery_point_s) { .voltage = 4.20, .capacity = 1.00 }, + (_battery_point_s) { .voltage = 3.36, .capacity = 0.90 }, + (_battery_point_s) { .voltage = 3.34, .capacity = 0.80 }, + (_battery_point_s) { .voltage = 3.32, .capacity = 0.70 }, + (_battery_point_s) { .voltage = 3.29, .capacity = 0.60 }, + (_battery_point_s) { .voltage = 3.24, .capacity = 0.50 }, + (_battery_point_s) { .voltage = 3.19, .capacity = 0.40 }, + (_battery_point_s) { .voltage = 3.08, .capacity = 0.30 }, + (_battery_point_s) { .voltage = 2.84, .capacity = 0.20 }, + (_battery_point_s) { .voltage = 2.50, .capacity = 0.10 }, + (_battery_point_s) { .voltage = 2.00, .capacity = 0.00 } } + }, + { + .temp_c = -10, + { (_battery_point_s) { .voltage = 4.20, .capacity = 1.00 }, + (_battery_point_s) { .voltage = 3.58, .capacity = 0.90 }, + (_battery_point_s) { .voltage = 3.55, .capacity = 0.80 }, + (_battery_point_s) { .voltage = 3.52, .capacity = 0.70 }, + (_battery_point_s) { .voltage = 3.48, .capacity = 0.60 }, + (_battery_point_s) { .voltage = 3.43, .capacity = 0.50 }, + (_battery_point_s) { .voltage = 3.34, .capacity = 0.40 }, + (_battery_point_s) { .voltage = 3.27, .capacity = 0.30 }, + (_battery_point_s) { .voltage = 3.15, .capacity = 0.20 }, + (_battery_point_s) { .voltage = 2.90, .capacity = 0.10 }, + (_battery_point_s) { .voltage = 2.50, .capacity = 0.00 } } + }, + { + .temp_c = 0, + { (_battery_point_s) { .voltage = 4.20, .capacity = 1.00 }, + (_battery_point_s) { .voltage = 3.87, .capacity = 0.90 }, + (_battery_point_s) { .voltage = 3.78, .capacity = 0.80 }, + (_battery_point_s) { .voltage = 3.73, .capacity = 0.70 }, + (_battery_point_s) { .voltage = 3.70, .capacity = 0.60 }, + (_battery_point_s) { .voltage = 3.68, .capacity = 0.50 }, + (_battery_point_s) { .voltage = 3.65, .capacity = 0.40 }, + (_battery_point_s) { .voltage = 3.60, .capacity = 0.30 }, + (_battery_point_s) { .voltage = 3.54, .capacity = 0.20 }, + (_battery_point_s) { .voltage = 3.37, .capacity = 0.10 }, + (_battery_point_s) { .voltage = 2.58, .capacity = 0.00 } } + }, + { + .temp_c = 25, + { (_battery_point_s) { .voltage = 4.20, .capacity = 1.00 }, + (_battery_point_s) { .voltage = 4.03, .capacity = 0.90 }, + (_battery_point_s) { .voltage = 3.96, .capacity = 0.80 }, + (_battery_point_s) { .voltage = 3.91, .capacity = 0.70 }, + (_battery_point_s) { .voltage = 3.89, .capacity = 0.60 }, + (_battery_point_s) { .voltage = 3.87, .capacity = 0.50 }, + (_battery_point_s) { .voltage = 3.85, .capacity = 0.40 }, + (_battery_point_s) { .voltage = 3.81, .capacity = 0.30 }, + (_battery_point_s) { .voltage = 3.75, .capacity = 0.20 }, + (_battery_point_s) { .voltage = 3.62, .capacity = 0.10 }, + (_battery_point_s) { .voltage = 3.10, .capacity = 0.00 } } + }, + { + .temp_c = 60, + { (_battery_point_s) { .voltage = 4.20, .capacity = 1.00 }, + (_battery_point_s) { .voltage = 4.07, .capacity = 0.90 }, + (_battery_point_s) { .voltage = 4.02, .capacity = 0.80 }, + (_battery_point_s) { .voltage = 3.99, .capacity = 0.70 }, + (_battery_point_s) { .voltage = 3.97, .capacity = 0.60 }, + (_battery_point_s) { .voltage = 3.95, .capacity = 0.50 }, + (_battery_point_s) { .voltage = 3.91, .capacity = 0.40 }, + (_battery_point_s) { .voltage = 3.89, .capacity = 0.30 }, + (_battery_point_s) { .voltage = 3.83, .capacity = 0.20 }, + (_battery_point_s) { .voltage = 3.75, .capacity = 0.10 }, + (_battery_point_s) { .voltage = 3.37, .capacity = 0.00 } } + } +}; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static float _battery_interpolate_capacity_at_voltage (_battery_point_s *p_point, float voltage); +static float _battery_interpolate_capacity_across_temps (float T1, float T2, float T, float C1, float C2); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e BATTERY_init (void) +{ + if (_battery_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (GPIO_init () < ERRNO_SUCCESS) + { + return ERRNO_GPIO_FAILURE; + } + + if (GPIO_cfg (GPIO_PIN_BATTERY_CHECK_ENABLE, GPIO_DIRECTION_OUT, GPIO_PULLUP, GPIO_INIT_HIGH, GPIO_INT_STATE_CHANGE_LL_HIGH, NULL)) + { + return ERRNO_GPIO_FAILURE; + } + + if (ADC_init () < ERRNO_SUCCESS) + { + return ERRNO_ADC_FAILURE; + } + + if (ADC_cfg (ADC_CH_0, ADC_GAIN_DIV6, ADC_REF_INT, ADC_RESOLUTION_14_BITS) != ERRNO_SUCCESS) + { + return ERRNO_ADC_FAILURE; + } + + /* Enable buffer to read battery voltage. Active-low. */ + if (GPIO_level_set (GPIO_PIN_BATTERY_CHECK_ENABLE, false)) + { + return ERRNO_GPIO_FAILURE; + } + + /* Configure GPIO to detect when charger / external battery is connected. */ + if (GPIO_cfg (GPIO_PIN_CHARGER_STATUS, GPIO_DIRECTION_IN, GPIO_PULLNONE, GPIO_INIT_HIGH, GPIO_INT_FALLING_EDGE, NULL)) + { + return ERRNO_GPIO_FAILURE; + } + + _battery_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e BATTERY_wake_on_charge (bool enable) +{ + if (!_battery_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (enable) + { + /* Reconfigure GPIO interrupt for charge detection to be used to wake from sleep. + * Note: Only logic level type interrupts can be used for GPIO to wake MCU from sleep. This is because + * putting MCU to sleep uses a slower clock and GPIO sense, so rising and falling edge interrupts don't work. */ + if (GPIO_cfg (GPIO_PIN_CHARGER_STATUS, GPIO_DIRECTION_IN, GPIO_PULLNONE, GPIO_INIT_HIGH, GPIO_INT_LL_LOW, NULL)) + { + return ERRNO_GPIO_FAILURE; + } + } + else + { + if (GPIO_cfg (GPIO_PIN_CHARGER_STATUS, GPIO_DIRECTION_IN, GPIO_PULLNONE, GPIO_INIT_HIGH, GPIO_INT_FALLING_EDGE, NULL)) + { + return ERRNO_GPIO_FAILURE; + } + } + + return ERRNO_SUCCESS; +} + +bool BATTERY_is_charging (void) +{ + /* Active-low */ + return !GPIO_level_get (GPIO_PIN_CHARGER_STATUS); +} + +ERRNO_e BATTERY_voltage_get (float *p_voltage) +{ + const int32_t adc_fullscale = (1 << ADC_RESOLUTION_14_BITS) - 1; + const float v_scaler = BATTERY_VOLTAGE_DIVIDER_R2_OHMS / (BATTERY_VOLTAGE_DIVIDER_R1_OHMS + BATTERY_VOLTAGE_DIVIDER_R2_OHMS); + int32_t adc_raw; + + if (!_battery_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Enable buffer to read battery voltage. Active-low. */ + // if (GPIO_level_set (GPIO_PIN_BATTERY_CHECK_ENABLE, false)) + // { + // return ERRNO_GPIO_FAILURE; + // } + + if (ADC_read (ADC_CH_0, &adc_raw) != ERRNO_SUCCESS) + { + return ERRNO_ADC_FAILURE; + } + + /* NOTE: We are using ADC_REF_INT for reference (0.6V), with prescaler of 1/6. Therefore, the maximum ADC value will be 16383 (14-bits) + with an input voltage of (0.6V * 6) = 3.6V. */ + *p_voltage = ((float) adc_raw / (float) adc_fullscale) * 3.6f; + + /* NOTE: With voltage divider of R2 = 510k and R1 = 1M. A full charge of 4.2V will be seen as ((4.2V * 510k) / (510k + 1M)) ~= 1.419V. + Divide by scaler to get actual voltage. */ + *p_voltage /= v_scaler; + + /* Disable buffer to read battery voltage. Active-low. */ + // if (GPIO_level_set (GPIO_PIN_BATTERY_CHECK_ENABLE, true)) + // { + // return ERRNO_GPIO_FAILURE; + // } + + return ERRNO_SUCCESS; +} + +float BATTERY_level_calculate (float voltage) +{ + float temp = APP_temp_c_get (); + float capacity; + uint8_t curve; + + if (temp <= -20.0f) + { + /* For temperatures at or below -20C, use the -20C curve with interpolation. */ + capacity = _battery_interpolate_capacity_at_voltage (_battery_tables[0].curve_readings, voltage); + + /* Validate interpolation result. */ + if (capacity < 0.0f) + { + /* Below minimum voltage, battery is empty. */ + return 0.0f; + } + + return capacity; + } + else if (temp >= 60.0f) + { + /* For temperatures at or above 60C, use the 60C curve with interpolation. */ + capacity = _battery_interpolate_capacity_at_voltage (_battery_tables[4].curve_readings, voltage); + + /* Validate interpolation result. */ + if (capacity < 0.0f) + { + /* Below minimum voltage, battery is empty. */ + return 0.0f; + } + + return capacity; + } + else + { + /* Loop through the temperature curves. */ + for (curve = 1; curve < _BATTERY_N_CURVES; curve++) + { + /* Find the two curves the temp reading is between. */ + if (temp <= (float) _battery_tables[curve].temp_c) + { + float cap_t1 = _battery_interpolate_capacity_at_voltage (_battery_tables[curve-1].curve_readings, voltage); + float cap_t2 = _battery_interpolate_capacity_at_voltage (_battery_tables[curve].curve_readings, voltage); + + /* Check if either interpolation failed (voltage out of range). */ + if (cap_t1 < 0.0f || cap_t2 < 0.0f) + { + /* Below minimum voltage, battery is empty. */ + return 0.0f; + } + + return _battery_interpolate_capacity_across_temps (_battery_tables[curve-1].temp_c, + _battery_tables[curve].temp_c, + temp, + cap_t1, + cap_t2); + } + } + } + + /* Should never reach here, but return 0 as safe fallback. */ + return 0.0f; +} + +void BATTERY_cli_cmd (int32_t argc, char **argv) +{ + ERRNO_e err; + + if (argc == 0) + { + float voltage = 0.0f; + + PRINT (INFO, "Battery\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + (void) BATTERY_voltage_get (&voltage); + PRINT (INFO, "Voltage : %.3f V\r\n", (double) voltage); + PRINT (INFO, "Level : %.2f %%\r\n", (double) (BATTERY_level_calculate (voltage) * 100.0f)); + PRINT (INFO, "Status : %s...\r\n", BATTERY_is_charging () ? "Charging": "Not Charging"); + } + else if (argc == 2) + { + if (!strcmp (argv[0], "--init") || !strcmp (argv[0], "-i")) + { + err = BATTERY_init (); + PRINT (INFO, "Ret code : %d\r\n", err); + } + else + { + goto USAGE; + } + } + else if (argc == 1) + { + if (!strcmp (argv[0], "--help") || !strcmp (argv[0], "?")) + { + goto USAGE; + } + else if (!strcmp (argv[0], "--init") || !strcmp (argv[0], "-i")) + { + err = BATTERY_init (); + PRINT (INFO, "Ret code : %d\r\n", err); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: battery [OPTION...]\r\n"); + PRINT (INFO, " -i | --init Initializes peripherals necessary to read battery levels\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static float _battery_interpolate_capacity_at_voltage (_battery_point_s *p_point, float voltage) +{ + uint8_t i; + const uint8_t bounds = _BATTERY_CAPACITY_STEPS - 1; + + if (voltage > 4.2f) + { + return 1.0f; + } + + /* Find the two points where voltage lies between. */ + for (i = 0; i < bounds; i++) + { + if (p_point[i].voltage >= voltage && voltage >= p_point[i + 1].voltage) + { + float V1 = p_point[i].voltage; + float V2 = p_point[i + 1].voltage; + float C1 = p_point[i].capacity; + float C2 = p_point[i + 1].capacity; + + /* Linear interpolation: C(V) = C1 + [(C2 - C1) / (V2 - V1)] * (V - V1) */ + return C1 + (C2 - C1) / (V2 - V1) * (voltage - V1); + } + } + + /* Out of range, return -1 */ + return -1.0f; +} + +static float _battery_interpolate_capacity_across_temps (float T1, float T2, float T, float C1, float C2) +{ + /* Linear interpolation: C(T) = C(T1) + [(C(T2) - C(T1)) / (T2 - T1)] * (T - T1) */ + float slope = (C2 - C1) / (T2 - T1); + + return ((slope * (T - T1)) + C1); +} diff --git a/src/bsp/battery.h b/src/bsp/battery.h new file mode 100644 index 0000000..5b71a4e --- /dev/null +++ b/src/bsp/battery.h @@ -0,0 +1,54 @@ +/** + * @file battery.h + * @brief Battery module + * @author Kenny Tran + * @date Dec 02 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef BATTERY_H_ +#define BATTERY_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define BATTERY_VOLTAGE_DIVIDER_R1_OHMS (100000.0) +#define BATTERY_VOLTAGE_DIVIDER_R2_OHMS (270000.0) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e BATTERY_init (void); + +ERRNO_e BATTERY_wake_on_charge (bool enable); + +bool BATTERY_is_charging (void); + +ERRNO_e BATTERY_voltage_get (float *p_voltage); + +float BATTERY_level_calculate (float voltage); + +void BATTERY_cli_cmd (int32_t argc, char **argv); + + +#endif /* BATTERY_H_ */ diff --git a/src/bsp/button.c b/src/bsp/button.c new file mode 100644 index 0000000..b639e50 --- /dev/null +++ b/src/bsp/button.c @@ -0,0 +1,274 @@ +/** + * @file button.c + * @brief Button module + * @author Kenny Tran + * @date Mar 18 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include + +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "../wrappers/gpio.h" + +#include "button.h" + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static bool _button_init = false; +static volatile uint32_t _button_left_pressed = 0; +static volatile uint32_t _button_center_pressed = 0; +static volatile uint32_t _button_right_pressed = 0; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _button_left_isr (void); +static void _button_center_isr (void); +static void _button_right_isr (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e BUTTON_init (void) +{ + if (_button_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (GPIO_init () < ERRNO_SUCCESS) + { + return ERRNO_GPIO_FAILURE; + } + + /* Configure buttons and ISR. */ + if (GPIO_cfg (GPIO_PIN_BUTTON_LEFT, GPIO_DIRECTION_IN, GPIO_PULLNONE, GPIO_INIT_LOW, GPIO_INT_STATE_CHANGE_LL_HIGH, _button_left_isr)) + { + return ERRNO_GPIO_FAILURE; + } + + if (GPIO_cfg (GPIO_PIN_BUTTON_CENTER, GPIO_DIRECTION_IN, GPIO_PULLNONE, GPIO_INIT_LOW, GPIO_INT_STATE_CHANGE_LL_HIGH, _button_center_isr)) + { + return ERRNO_GPIO_FAILURE; + } + + if (GPIO_cfg (GPIO_PIN_BUTTON_RIGHT, GPIO_DIRECTION_IN, GPIO_PULLNONE, GPIO_INIT_LOW, GPIO_INT_STATE_CHANGE_LL_HIGH, _button_right_isr)) + { + return ERRNO_GPIO_FAILURE; + } + + /* Set initialized flag. */ + _button_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e BUTTON_wake_on_press (BUTTON_e button) +{ + if (!_button_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Reconfigure GPIO interrupt for buttons to be used to wake from sleep. */ + switch (button) + { + case BUTTON_LEFT: + if (GPIO_cfg (GPIO_PIN_BUTTON_LEFT, GPIO_DIRECTION_IN, GPIO_PULLNONE, GPIO_INIT_LOW, GPIO_INT_LL_HIGH, NULL)) + { + return ERRNO_GPIO_FAILURE; + } + break; + + case BUTTON_CENTER: + if (GPIO_cfg (GPIO_PIN_BUTTON_CENTER, GPIO_DIRECTION_IN, GPIO_PULLNONE, GPIO_INIT_LOW, GPIO_INT_LL_HIGH, NULL)) + { + return ERRNO_GPIO_FAILURE; + } + break; + + case BUTTON_RIGHT: + if (GPIO_cfg (GPIO_PIN_BUTTON_RIGHT, GPIO_DIRECTION_IN, GPIO_PULLNONE, GPIO_INIT_LOW, GPIO_INT_LL_HIGH, NULL)) + { + return ERRNO_GPIO_FAILURE; + } + break; + + default: + return ERRNO_INVALID_PARAM; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e BUTTON_is_pressed (BUTTON_e button, bool *p_pressed) +{ + if (!_button_init) + { + return ERRNO_NOT_INITIALIZED; + } + + switch (button) + { + case BUTTON_LEFT: + *p_pressed = GPIO_level_get (GPIO_PIN_BUTTON_LEFT); + /* Reset flag. */ + _button_left_pressed = 0; + break; + + case BUTTON_CENTER: + *p_pressed = GPIO_level_get (GPIO_PIN_BUTTON_CENTER); + /* Reset flag. */ + _button_center_pressed = 0; + break; + + case BUTTON_RIGHT: + *p_pressed = GPIO_level_get (GPIO_PIN_BUTTON_RIGHT); + /* Reset flag. */ + _button_right_pressed = 0; + break; + + default: + *p_pressed = false; + return ERRNO_INVALID_PARAM; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e BUTTON_was_pressed (BUTTON_e button, bool *p_pressed) +{ + bool pressed = false; + + if (!_button_init) + { + return ERRNO_NOT_INITIALIZED; + } + + switch (button) + { + case BUTTON_LEFT: + pressed = (bool) _button_left_pressed; + /* Reset flag. */ + _button_left_pressed = 0; + break; + + case BUTTON_CENTER: + pressed = (bool) _button_center_pressed; + /* Reset flag. */ + _button_center_pressed = 0; + break; + + case BUTTON_RIGHT: + pressed = (bool) _button_right_pressed; + /* Reset flag. */ + _button_right_pressed = 0; + break; + + default: + *p_pressed = false; + return ERRNO_INVALID_PARAM; + } + + *p_pressed = pressed; + + return ERRNO_SUCCESS; +} + +void BUTTON_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + bool was_left; + bool was_center; + bool was_right; + bool is_left; + bool is_center; + bool is_right; + + PRINT (INFO, "BUTTON\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "ISR Count\r\n"); + PRINT (INFO, " Left : %d\r\n", _button_left_pressed); + PRINT (INFO, " Center : %d\r\n", _button_center_pressed); + PRINT (INFO, " Right : %d\r\n", _button_right_pressed); + + (void) BUTTON_was_pressed (BUTTON_LEFT, &was_left); + (void) BUTTON_was_pressed (BUTTON_CENTER, &was_center); + (void) BUTTON_was_pressed (BUTTON_RIGHT, &was_right); + (void) BUTTON_is_pressed (BUTTON_LEFT, &is_left); + (void) BUTTON_is_pressed (BUTTON_CENTER, &is_center); + (void) BUTTON_is_pressed (BUTTON_RIGHT, &is_right); + + PRINT (INFO, "was pressed\r\n"); + PRINT (INFO, " Left : %s\r\n", (was_left ? "true" : "false")); + PRINT (INFO, " Center : %s\r\n", (was_center ? "true" : "false")); + PRINT (INFO, " Right : %s\r\n", (was_right ? "true" : "false")); + PRINT (INFO, "is pressed\r\n"); + PRINT (INFO, " Left : %s\r\n", (is_left ? "true" : "false")); + PRINT (INFO, " Center : %s\r\n", (is_center ? "true" : "false")); + PRINT (INFO, " Right : %s\r\n", (is_right ? "true" : "false")); + } + else if (argc == 1) + { + if (!strcmp (argv[0], "--init") || !strcmp (argv[0], "-i")) + { + PRINT (INFO, "Ret code : %d\r\n", BUTTON_init ()); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: button [OPTION...]\r\n"); + PRINT (INFO, " -i | --init Initializes button module\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _button_left_isr (void) +{ + _button_left_pressed++; +} + +static void _button_center_isr (void) +{ + _button_center_pressed++; +} + +static void _button_right_isr (void) +{ + _button_right_pressed++; +} diff --git a/src/bsp/button.h b/src/bsp/button.h new file mode 100644 index 0000000..e228562 --- /dev/null +++ b/src/bsp/button.h @@ -0,0 +1,56 @@ +/** + * @file button.h + * @brief Button module + * @author Kenny Tran + * @date Mar 18 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef BUTTON_H_ +#define BUTTON_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum BUTTON +{ + BUTTON_LEFT, + BUTTON_CENTER, + BUTTON_RIGHT +} BUTTON_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e BUTTON_init (void); + +ERRNO_e BUTTON_wake_on_press (BUTTON_e button); + +ERRNO_e BUTTON_is_pressed (BUTTON_e button, bool *p_pressed); + +ERRNO_e BUTTON_was_pressed (BUTTON_e button, bool *p_pressed); + +void BUTTON_cli_cmd (int32_t argc, char **argv); + + +#endif /* BUTTON_H_ */ diff --git a/src/bsp/imu.c b/src/bsp/imu.c new file mode 100644 index 0000000..721889f --- /dev/null +++ b/src/bsp/imu.c @@ -0,0 +1,3606 @@ +/** + * @file imu.c + * @brief LSM6DS3TR-C IMU module + * @author Kenny Tran + * @date Feb 28 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include +#include + +#include "imu.h" +#include "imu_reg.h" +#include "mcu.h" + +#include "../app/motion.h" +#include "../app/shot_capture.h" + +#include "../lib/errno.h" +#include "../lib/print.h" +#include "../lib/debug.h" +#include "../lib/fs.h" + +#include "../wrappers/i2c.h" +#include "../wrappers/gpio.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +K_SEM_DEFINE(_imu_int_sem, 0, 1); +K_SEM_DEFINE(shot_capture_sem, 0, 4); + + +/*-------------------------------------------------------------------------------------------------- + * THREAD DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +K_THREAD_STACK_DEFINE(_imu_task_stack, IMU_TASK_STACK_SIZE); +K_THREAD_STACK_DEFINE(_imu_interrrupt_handler_task_stack, IMU_INTERRUPT_HANDLER_TASK_STACK_SIZE); + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +/* Defines the physical location of a bit field in the IMU registers */ +typedef struct _imu_field_loc { + const uint8_t reg_addr : 8; // 2-digit hexidecimal address of the register in the IMU + const uint8_t field_start : 3; // the MSB of the field can be from 0th to 7th bit so 3 bits is enough + const uint8_t field_len : 4; // bit length is 1 to 8 +} __attribute__((packed, aligned(1))) _imu_field_loc_s; + +/* list of all the fields that can be configured */ +typedef struct _imu_fields { + /* Accelerometer */ + const _imu_field_loc_s fs_xl_f; + const _imu_field_loc_s odr_xl_f; + const _imu_field_loc_s lpf1_bw_sel_f; + const _imu_field_loc_s lpf2_xl_en_f; + const _imu_field_loc_s hp_slope_xl_en_f; + const _imu_field_loc_s hpcf_xl_f; + const _imu_field_loc_s input_composite_f; + + /* Gyroscope */ + const _imu_field_loc_s fs_125_f; // FS_125 CTRL2_G (0x11) + const _imu_field_loc_s fs_g_f; // FS_G CTRL2_G (0x11) + const _imu_field_loc_s odr_g_f; // ODR_G CTRL2_G (0x11) + const _imu_field_loc_s hp_en_g_f; // HP_EN_G CTRL7_G (0x16) + const _imu_field_loc_s hpm_g_f; // HPM_G CTRL7_G (0x16) + const _imu_field_loc_s lpf1_sel_g_f; // HPM_G CTRL4_C (0x13) + const _imu_field_loc_s ftype_f; // FTYPE CTRL6_C (0x15) + + /* FIFO */ + const _imu_field_loc_s fifo_thresh_low_f; + const _imu_field_loc_s fifo_thresh_high_f; + const _imu_field_loc_s dec_fifo_gyro_f; + const _imu_field_loc_s dec_fifo_xl_f; + const _imu_field_loc_s odr_fifo_f; + const _imu_field_loc_s fifo_mode_f; + + /* OTHERS*/ + const _imu_field_loc_s int1_fth_f; + const _imu_field_loc_s sw_reset_f; + const _imu_field_loc_s bdu_f; + const _imu_field_loc_s interrupts_enable_f; + const _imu_field_loc_s slope_fds_f; + const _imu_field_loc_s tap_x_en_f; + const _imu_field_loc_s tap_y_en_f; + const _imu_field_loc_s tap_z_en_f; + const _imu_field_loc_s lir_f; + const _imu_field_loc_s tap_ths_f; + const _imu_field_loc_s quiet_f; + const _imu_field_loc_s shock_f; + const _imu_field_loc_s single_double_tap_f; + const _imu_field_loc_s wk_ths_f; + const _imu_field_loc_s wake_dur_f; + const _imu_field_loc_s int1_single_tap_f; + const _imu_field_loc_s int1_wu_f; + const _imu_field_loc_s int1_double_tap_f; +} _imu_fields_s; + +typedef struct _imu_field_value { + /* Accelerometer */ + /* Accelerometer full-scale range value (g) + * 0: +/- 2 + * 1: +/- 16 + * 2: +/- 4 + * 3: +/- 8 + */ + LSM6DS3TR_C_FS_XL_e fs_xl_v; + /* Accelerometer ODR value (Hz) + * 0: power-down + * 1: 12.5 + * 2: 26 + * 3: 52 + * 4: 104 + * 5: 208 + * 6: 416 + * 7: 833 + * 8: 1666 + * 9: 3332 + * 10: 6664 + * 11: 1.6 (low power only) + */ + LSM6DS3TR_C_ODR_XL_e odr_xl_v; + /* Accelerometer low-pass filter 1 bandwidth selection (Hz) + * 0: odr/2 + * 1: odr/4 + */ + LSM6DS3TR_C_LPF1_BW_SEL_e lpf1_bw_sel_v; + /* Accelerometer low-pass filter LPF2 selection, default: 0 + * Only valid whe xl_hp_slope_xl_en is set to 0 + * 0: disable + * 1: enable + */ + LSM6DS3TR_C_LPF2_XL_EN_e lpf2_xl_en_v; + /* Accelerometer slope filter / high-pass filter selection, default: 0 + * 0: low-pass path + * 1: high-pass path + */ + LSM6DS3TR_C_HP_SLOPE_XL_EN_e hp_slope_xl_en_v; + /* Accelerometer LPF2 and high-pass filter configuration and cutoff setting, default: 0 + * LPF2 bandwith, only when hp_slope_xl_en_v is set to 0 and lpf2_xl_en_v is set to 1: + * 0: ODR/50 + * 1: ODR/100 + * 2: ODR/9 + * 3: ODR/400 + * slope fileter or high-pass bandwith, only when accel_hp_slope_xl_en is set to 1 + * 0: ODR/4, slope filter + * 1: ODR/100, HPF + * 2: ODR/9, HPF + * 3: ODR/400, HPF + */ + LSM6DS3TR_C_HPCF_XL_e hpcf_xl_v; + /* Composite filter input selection. default: 0 + * only valid when hp_slope_xl_en_v is set to 0 and lpf2_xl_en is set to 1 + * 0: ODR/2 low pass filtered sent to composite filter (low latency) + * 1: ODR/4 low pass filtered sent to composite filter (low noise) + */ + LSM6DS3TR_C_INPUT_COMPOSITE_e input_composite_v; + + + /* Gyroscope */ + /* Gyroscope full-scale range value (dps) + * 0: +/- 125 + * 1: +/- 250 + * 2: +/- 500 + * 3: +/- 1000 + * 4: +/- 2000 + */ + LSM6DS3TR_C_FS_G_ABSTR_e fs_g_v; + /* Gyroscope ODR value (Hz) + * 0: power-down + * 1: 12.5 + * 2: 26 + * 3: 52 + * 4: 104 + * 5: 208 + * 6: 416 + * 7: 833 + * 8: 1666 + * 9: 3332 + * 10: 6664 + */ + LSM6DS3TR_C_ODR_G_e odr_g_v; + /* Gyroscope digital high-pass filter enable, default: 0 + * 0: disable + * 1: enable + */ + LSM6DS3TR_C_HP_EN_G_e hp_en_g_v; + /* Gyroscope digital HP filter cutoff selection selection (Hz), default: 0 + * valid only when hp_en_g_v is set to 1 + * 0: 16m + * 1: 65m + * 2: 260m + * 3: 1.04Hz + */ + LSM6DS3TR_C_HPM_G_e hpm_g_v; + /* gyroscope digital LPF1 enable, default: 0 + * 0: disable + * 1: enable + */ + LSM6DS3TR_C_LPF1_SEL_G_e lpf1_sel_g_v; + /* Gyroscope digital LPF (LPF1) bandwidth selection (Hz) + * Depends on odr_g and only valid when lpf1_sel_g_v is set to 1 + *** 800 1.6k 3.3k 6.6k + * 0: 245 315 343 351 + * 1: 195 224 234 237 + * 2: 155 168 172 173 + * 3: 293 505 925 937 + */ + LSM6DS3TR_C_FTYPE_e ftype_v; + + /* FIFO */ + /* FIFO threshold value. 0 to 2047 16-bit samples */ + uint16_t fifo_threshold_v; + /* Gyro FIFO (first data set) decimation setting, default: 0 + * 0: Gyro sensor not in FIFO + * 1: No decimation + * 2: Decimation with factor 2 + * 3: Decimation with factor 3 + * 4: Decimation with factor 4 + * 5: Decimation with factor 8 + * 6: Decimation with factor 16 + * 7: Decimation with factor 32 + */ + LSM6DS3TR_C_DEC_FIFO_GYRO_e dec_fifo_gyro_v; + /* Accelerometer FIFO (second data set) decimation setting, default: 0 + * 0: Accelerometer sensor not in FIFO + * 1: No decimation + * 2: Decimation with factor 2 + * 3: Decimation with factor 3 + * 4: Decimation with factor 4 + * 5: Decimation with factor 8 + * 6: Decimation with factor 16 + * 7: Decimation with factor 32 + */ + LSM6DS3TR_C_DEC_FIFO_XL_e dec_fifo_xl_v; + /* FIFO ODR selection + * If the device is working at an ODR slower than the one selected, + * FIFO ODR is limited to that ODR value. + * 0: FIFO disabled + * 1: 12.5 Hz + * 2: 26 Hz + * 3: 52 Hz + * 4: 104 Hz + * 5: 208 Hz + * 6: 416 Hz + * 7: 833 Hz + * 8: 1.66 kHz + * 9: 3.33 kHz + * 10: 6.66 kHz + */ + LSM6DS3TR_C_ODR_FIFO_e odr_fifo_v; + /* FIFO mode selection + * 0: Bypass mode. FIFO disabled + * 1: FIFO mode. Stops collecting data when FIFO is full + * 3: Continuous mode until trigger is deasserted, then FIFO mode + * 4: Bypass mode until trigger is deasserted, then Continuous mode + * 6: Continuous mode. If the FIFO is full, the new sample overwrites the older one + */ + LSM6DS3TR_C_FIFO_MODE_e fifo_mode_v; + + /* others */ + /* FIFO threshold interrupt on INT1 pin + * 0: diable + * 1: enable + */ + LSM6DS3TR_C_INT1_FTH_e int1_fth_v; + /* Software reset + * 0: normal mode + * 1: reset all registers to default values + */ + LSM6DS3TR_C_SW_RESET_e sw_reset_v; + /* Block data update (BDU) enable. + * 0: continuous update + * 1: output registers not updated until MSB and LSB have been read + */ + + LSM6DS3TR_C_BDU_e bdu_v; + /* Enable basic interrupts (6D, tap, double tap, free fall, wake up) + * 0: disable + * 1: enable + */ + LSM6DS3TR_C_INTERRUPTS_ENABLE_e interrupts_enable_v; + /* HPF or SLOPE filter selection on wake-up and Activity/Inactivity functions. Refer to + * Default value: 0 + * 0: SLOPE filter applied; 1: HPF applied + */ + LSM6DS3TR_C_SLOPE_FDS_e slope_fds_v; + /* Tap detection on X axis enable + * 0: disable + * 1: enable + */ + LSM6DS3TR_C_TAP_X_EN_e tap_x_en_v; + /* Tap detection on Y axis enable + * 0: disable + * 1: enable + */ + LSM6DS3TR_C_TAP_Y_EN_e tap_y_en_v; + /* Tap detection on Z axis enable + * 0: disable + * 1: enable + */ + LSM6DS3TR_C_TAP_Z_EN_e tap_z_en_v; + /* Latch interrupt request + * 0: interrupt request not latched + * 1: interrupt request latched + */ + LSM6DS3TR_C_LIR_e lir_v; + /* Threshold for tap recognition. + * 1 LSB corresponds to FS_XL/2^5 + * max value is 2**5 - 1 = 31 + */ + uint8_t tap_ths_v; + /* Expected quiet time after a tap detection + * Quiet time is the time after the first detected tap in which there must not be any + * overthreshold event. The default value of these bits is 00b which corresponds to + * 2*ODR_XL time. If the QUIET[1:0] bits are set to a different value, 1LSB + * corresponds to 4*ODR_XL time + */ + LSM6DS3TR_C_QUIET_e quiet_v; + /* Maximum duration of overthreshold event. + * Maximum duration is the maximum time of an overthreshold signal detection to be + * recognized as a tap event. The default value of these bits is 00b which corresponds + * to 4*ODR_XL time. If the SHOCK[1:0] bits are set to a different value, 1LSB + * corresponds to 8*ODR_XL time. + */ + LSM6DS3TR_C_SHOCK_e shock_v; + /* Single and double-tap detection enable + * 0: only single-tap detection enabled + * 1: both single and double-tap detection enabled + */ + LSM6DS3TR_C_SINGLE_DOUBLE_TAP_e single_double_tap_v; + /* Threshold for wakeup. + * 1 LSB corresponds to FS_XL/2^6 max value is 2**6 - 1 = 63 + */ + uint8_t wk_ths_v; + /* Wake up duration event. + * The filtered samples must be greater than wk_ths_v + * for this duration to be considered as a wake up + * event. 1LSB = 1 ODR_time + */ + LSM6DS3TR_C_WAKE_DUR_e wake_dur_v; + /* Single-tap recongnition routing on INT1 pin + * 0: routing of single-tap event to INT1 pin disabled + * 1: routing of single-tap event to INT1 pin enabled + */ + LSM6DS3TR_C_INT1_SINGLE_TAP_e int1_single_tap_v; + /* Routing of wakeup event on INT1. Default value: 0 + * 0: routing of wakeup event on INT1 disabled; + * 1: routing of wakeup event on INT1 enabled + */ + LSM6DS3TR_C_INT1_WU_e int1_wu_v; + /* Double-tap recongnition routing on INT1 pin + * 0: routing of double-tap event to INT1 pin disabled + * 1: routing of double-tap event to INT1 pin enabled + */ + LSM6DS3TR_C_INT1_DOUBLE_TAP_e int1_double_tap_v; +} _imu_field_value_s; + +typedef struct _imu_config { + _imu_field_value_s field_v; + uint8_t temp_enabled; + uint16_t temp_sensitivity; + /* compensation matrix (A^1/2) */ + float A_comp[3][3]; + float bias[3]; + /* Interrupt Eanble Flags + * the bits in the flag indicates which interrupt is enabled + * and routed to the INT1 pin + */ + atomic_t interrupt_mode_flags; +} _imu_config_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static bool _imu_init = false; +static atomic_t _imu_motion_int_enable = ATOMIC_INIT(0); + +static const _imu_fields_s _imu_fields = { + + /* Accelerometer */ + .odr_xl_f = {.reg_addr = LSM6DS3TR_C_CTRL1_XL, .field_start = 4, .field_len = 4}, + .fs_xl_f = {.reg_addr = LSM6DS3TR_C_CTRL1_XL, .field_start = 2, .field_len = 2}, + .lpf1_bw_sel_f = {.reg_addr = LSM6DS3TR_C_CTRL1_XL, .field_start = 1, .field_len = 1}, + .lpf2_xl_en_f = {.reg_addr = LSM6DS3TR_C_CTRL8_XL, .field_start = 7, .field_len = 1}, + .hp_slope_xl_en_f = {.reg_addr = LSM6DS3TR_C_CTRL8_XL, .field_start = 2, .field_len = 1}, + .hpcf_xl_f = {.reg_addr = LSM6DS3TR_C_CTRL8_XL, .field_start = 5, .field_len = 2}, + .input_composite_f = {.reg_addr = LSM6DS3TR_C_CTRL8_XL, .field_start = 3, .field_len = 1}, + + /* Gyroscope */ + .fs_125_f = {.reg_addr = LSM6DS3TR_C_CTRL2_G, .field_start = 1, .field_len = 1}, + .fs_g_f = {.reg_addr = LSM6DS3TR_C_CTRL2_G, .field_start = 2, .field_len = 2}, + .odr_g_f = {.reg_addr = LSM6DS3TR_C_CTRL2_G, .field_start = 4, .field_len = 4}, + .hp_en_g_f = {.reg_addr = LSM6DS3TR_C_CTRL7_G, .field_start = 6, .field_len = 1}, + .hpm_g_f = {.reg_addr = LSM6DS3TR_C_CTRL7_G, .field_start = 4, .field_len = 2}, + .lpf1_sel_g_f = {.reg_addr = LSM6DS3TR_C_CTRL4_C, .field_start = 1, .field_len = 1}, + .ftype_f = {.reg_addr = LSM6DS3TR_C_CTRL6_C, .field_start = 0, .field_len = 2}, + + /* FIFO */ + .fifo_thresh_low_f = {.reg_addr = LSM6DS3TR_C_FIFO_CTRL1, .field_start = 0, .field_len = 8}, + .fifo_thresh_high_f = {.reg_addr = LSM6DS3TR_C_FIFO_CTRL2, .field_start = 0, .field_len = 3}, + .dec_fifo_gyro_f = {.reg_addr = LSM6DS3TR_C_FIFO_CTRL3, .field_start = 3, .field_len = 3}, + .dec_fifo_xl_f = {.reg_addr = LSM6DS3TR_C_FIFO_CTRL3, .field_start = 0, .field_len = 3}, + .odr_fifo_f = {.reg_addr = LSM6DS3TR_C_FIFO_CTRL5, .field_start = 3, .field_len = 4}, + .fifo_mode_f = {.reg_addr = LSM6DS3TR_C_FIFO_CTRL5, .field_start = 0, .field_len = 3}, + + /* Others */ + .int1_fth_f = {.reg_addr = LSM6DS3TR_C_INT1_CTRL, .field_start = 3, .field_len = 1}, + .sw_reset_f = {.reg_addr = LSM6DS3TR_C_CTRL3_C, .field_start = 0, .field_len = 1}, + .bdu_f = {.reg_addr = LSM6DS3TR_C_CTRL3_C, .field_start = 6, .field_len = 1}, + .interrupts_enable_f = {.reg_addr = LSM6DS3TR_C_TAP_CFG, .field_start = 7, .field_len = 1}, + .slope_fds_f = {.reg_addr = LSM6DS3TR_C_TAP_CFG, .field_start = 4, .field_len = 1}, + .tap_x_en_f = {.reg_addr = LSM6DS3TR_C_TAP_CFG, .field_start = 3, .field_len = 1}, + .tap_y_en_f = {.reg_addr = LSM6DS3TR_C_TAP_CFG, .field_start = 2, .field_len = 1}, + .tap_z_en_f = {.reg_addr = LSM6DS3TR_C_TAP_CFG, .field_start = 1, .field_len = 1}, + .lir_f = {.reg_addr = LSM6DS3TR_C_TAP_CFG, .field_start = 0, .field_len = 1}, + .tap_ths_f = {.reg_addr = LSM6DS3TR_C_TAP_THS_6D, .field_start = 0, .field_len = 5}, + .quiet_f = {.reg_addr = LSM6DS3TR_C_INT_DUR2, .field_start = 2, .field_len = 2}, + .shock_f = {.reg_addr = LSM6DS3TR_C_INT_DUR2, .field_start = 0, .field_len = 2}, + .single_double_tap_f = {.reg_addr = LSM6DS3TR_C_WAKE_UP_THS, .field_start = 7, .field_len = 1}, + .wk_ths_f = {.reg_addr = LSM6DS3TR_C_WAKE_UP_THS, .field_start = 0, .field_len = 6}, + .wake_dur_f = {.reg_addr = LSM6DS3TR_C_WAKE_UP_DUR, .field_start = 5, .field_len = 2}, + .int1_single_tap_f = {.reg_addr = LSM6DS3TR_C_MD1_CFG, .field_start = 6, .field_len = 1}, + .int1_wu_f = {.reg_addr = LSM6DS3TR_C_MD1_CFG, .field_start = 5, .field_len = 1}, + .int1_double_tap_f = {.reg_addr = LSM6DS3TR_C_MD1_CFG, .field_start = 3, .field_len = 1}, +}; + +/* default field values */ +static const _imu_field_value_s _imu_field_v_default = { + /* Accelerometer */ + .fs_xl_v = LSM6DS3TR_C_FS_XL_2g, + .odr_xl_v = LSM6DS3TR_C_ODR_XL_416Hz, + .lpf1_bw_sel_v = LSM6DS3TR_C_LPF1_BW_SEL_ODR_DIV_4, + .lpf2_xl_en_v = LSM6DS3TR_C_LPF2_XL_EN_DISABLED, + .hp_slope_xl_en_v = LSM6DS3TR_C_HP_SLOPE_XL_EN_DISABLED, + .hpcf_xl_v = LSM6DS3TR_C_HPCF_XL_00, + .input_composite_v = LSM6DS3TR_C_INPUT_COMPOSITE_LOW_LATENCY, + + /* Gyroscope */ + .fs_g_v = LSM6DS3TR_C_FS_G_ABSTR_250dps, + .odr_g_v = LSM6DS3TR_C_ODR_G_416Hz, + .hp_en_g_v = LSM6DS3TR_C_HP_EN_G_DISABLE, + .hpm_g_v = LSM6DS3TR_C_HPM_G_16mHz, + .lpf1_sel_g_v = LSM6DS3TR_C_LPF1_SEL_G_DISABLE, + .ftype_v = LSM6DS3TR_C_FTYPE_0, + + /* FIFO */ + .fifo_threshold_v = 0, + .dec_fifo_gyro_v = LSM6DS3TR_C_DEC_FIFO_GYRO_DATA_NOT_IN_FIFO, + .dec_fifo_xl_v = LSM6DS3TR_C_DEC_FIFO_XL_DATA_NOT_IN_FIFO, + .odr_fifo_v = LSM6DS3TR_C_ODR_FIFO_DISABLE, + .fifo_mode_v = LSM6DS3TR_C_FIFO_MODE_BYPASS, + + /* Others */ + .int1_fth_v = LSM6DS3TR_C_INT1_FTH_DISABLED, + .sw_reset_v = LSM6DS3TR_C_SW_RESET_NORMAL_MODE, + .bdu_v = LSM6DS3TR_C_BDU_CONTINUOUS, + .interrupts_enable_v = LSM6DS3TR_C_INTERRUPTS_DISABLE, + .tap_x_en_v = LSM6DS3TR_C_TAP_X_EN_DISABLED, + .tap_y_en_v = LSM6DS3TR_C_TAP_Y_EN_DISABLED, + .tap_z_en_v = LSM6DS3TR_C_TAP_Z_EN_DISABLED, + .lir_v = LSM6DS3TR_C_LIR_DISABLED, + .tap_ths_v = 0, + .quiet_v = LSM6DS3TR_C_QUIET_2_OVER_ODR_XL, + .shock_v = LSM6DS3TR_C_SHOCK_4_OVER_ODR_XL, + .single_double_tap_v = LSM6DS3TR_C_SINGLE_DOUBLE_TAP_SINGLE_ONLY, + .wk_ths_v = 2, + .wake_dur_v = LSM6DS3TR_C_WAKE_DUR_1_ODR_XL, + .int1_single_tap_v = LSM6DS3TR_C_INT1_SINGLE_TAP_DISABLED, + .int1_double_tap_v = LSM6DS3TR_C_INT1_DOUBLE_TAP_DISABLED +}; + +static _imu_config_s _imu_cfg = { + .temp_enabled = 1, + .A_comp = { {1.0f, 0.0f, 0.0f}, + {0.0f, 1.0f, 0.0f}, + {0.0f, 0.0f, 1.0f}, + }, + .bias = {0.0f}, + .interrupt_mode_flags = ATOMIC_INIT(0) +}; + +static IMU_cb_t _imu_wakeup_cb = NULL; +static bool _imu_data_dump = false; +static bool _imu_data_dump_hex = false; +static uint32_t _imu_data_dump_time_ms = 0; + +/* variables for various statistics */ +static atomic_t _interrupt_count = ATOMIC_INIT(0); +static bool _imu_statistic_dump = false; +static atomic_t _imu_fifo_is_set = ATOMIC_INIT(0); + +static volatile IMU_int_source_e _imu_int_source = IMU_INT_SOURCE_NONE; + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC VARIABLE DEFINITIOPNS (allocates memory) + *------------------------------------------------------------------------------------------------*/ +volatile bool busy_wait_active = false; +volatile uint32_t imu_task_counter = 0; +volatile uint32_t imu_task_during_busy_wait_counter = 0; +volatile uint32_t _interface_task_counter = 0; +volatile uint32_t _interface_task_during_i2c_counter = 0; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _imu_task(void *p1, void *p2, void *p3); +static void _imu_interrupt_handler_task(void *p1, void *p2, void *p3); +static ERRNO_e _imu_who_am_i(void); +static ERRNO_e _imu_cfg_init(void); +static float _imu_xl_raw_to_float(int16_t raw); +static float _imu_gyro_raw_to_float(int16_t raw); +static void _imu_config_write (void); +static void _imu_isr(void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIOPNS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e IMU_init (void) +{ + ERRNO_e err; + + if (_imu_init) { + return ERRNO_ALREADY_INITIALIZED; + } + + if (I2C_init (I2C_CH_1) < ERRNO_SUCCESS) { + return ERRNO_I2C_FAILURE; + } + + /* Initialize GPIO for use with IMU interrupt pin. */ + if (GPIO_init () < ERRNO_SUCCESS) { + return ERRNO_GPIO_FAILURE; + } + + /* Perform an ID check. */ + while (_imu_who_am_i() != ERRNO_SUCCESS) { + static uint32_t cnt = 0; + k_busy_wait (10000); + + if (cnt++ == 50) + { + PRINT (ERROR, "IMU WHO AM I failure\r\n"); + return ERRNO_I2C_FAILURE; + } + } + + /* Set init flag before IMU_reset so it doesn't fail. */ + _imu_init = true; + + err = IMU_reset(); + if (err != ERRNO_SUCCESS) { + return ERRNO_I2C_FAILURE; + } + + /* Register callback for IMU interrupts. */ + if (GPIO_cfg (GPIO_PIN_IMU_INT, GPIO_DIRECTION_IN, GPIO_PULLDOWN, GPIO_INIT_LOW, GPIO_INT_RISING_EDGE, _imu_isr)) { + PRINT(CRITICAL, "Failure to register IMU interrupt callback.\r\n"); + return ERRNO_GPIO_FAILURE; + } + + /* Configure LSM6DS3 with default settings. */ + err = _imu_cfg_init(); + if (err != ERRNO_SUCCESS) { + return err; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_int_cb_register(IMU_int_source_e src, IMU_cb_t cb) +{ + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (src) + { + case IMU_INT_SOURCE_WAKEUP: + _imu_wakeup_cb = cb; + break; + + default: + return ERRNO_INVALID_PARAM; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_gyro_enable(bool en) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + if (en) { + if (_imu_cfg.field_v.odr_g_v == LSM6DS3TR_C_ODR_G_POWER_DOWN) { + _imu_cfg.field_v.odr_g_v = LSM6DS3TR_C_ODR_G_416Hz; + } + err = I2C_field_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_g_f.reg_addr, + (uint8_t)_imu_cfg.field_v.odr_g_v, + _imu_fields.odr_g_f.field_start, + _imu_fields.odr_g_f.field_len); + + } else { + _imu_cfg.field_v.odr_g_v = LSM6DS3TR_C_ODR_G_POWER_DOWN; + err = I2C_field_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_g_f.reg_addr, + (uint8_t)_imu_cfg.field_v.odr_g_v, + _imu_fields.odr_g_f.field_start, + _imu_fields.odr_g_f.field_len); + + } + + return err; +} + +ERRNO_e IMU_is_gyro_enabled(bool *en) +{ + ERRNO_e err; + uint8_t gyro_enabled; + + err = I2C_field_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_g_f.reg_addr, + &gyro_enabled, + _imu_fields.odr_g_f.field_start, + _imu_fields.odr_g_f.field_len); + + *en = (bool) gyro_enabled; + + return err; +} + +ERRNO_e IMU_set_fs_g(LSM6DS3TR_C_FS_G_ABSTR_e value) +{ + ERRNO_e err; + uint8_t fs_125 = 0, fs_main = 0; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_FS_G_ABSTR_125dps: fs_125 = 1; fs_main = 0; break; + case LSM6DS3TR_C_FS_G_ABSTR_250dps: fs_main = 0; break; + case LSM6DS3TR_C_FS_G_ABSTR_500dps: fs_main = 1; break; + case LSM6DS3TR_C_FS_G_ABSTR_1000dps: fs_main = 2; break; + case LSM6DS3TR_C_FS_G_ABSTR_2000dps: fs_main = 3; break; + default: return ERRNO_INVALID_PARAM; + } + + /* update runtime value */ + _imu_cfg.field_v.fs_g_v = value; + err = I2C_field_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fs_125_f.reg_addr, + fs_125, + _imu_fields.fs_125_f.field_start, + _imu_fields.fs_125_f.field_len); + if (err == ERRNO_SUCCESS) { + err = I2C_field_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fs_g_f.reg_addr, + fs_main, + _imu_fields.fs_g_f.field_start, + _imu_fields.fs_g_f.field_len); + } + + return err; +} + +ERRNO_e IMU_get_fs_g(LSM6DS3TR_C_FS_G_ABSTR_e *value) +{ + ERRNO_e err; + uint8_t fs_125, fs_main; + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fs_125_f.reg_addr, + &fs_125, + _imu_fields.fs_125_f.field_start, + _imu_fields.fs_125_f.field_len); + + if (err == ERRNO_SUCCESS) { + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fs_g_f.reg_addr, + &fs_main, + _imu_fields.fs_g_f.field_start, + _imu_fields.fs_g_f.field_len); + if (err == ERRNO_SUCCESS) { + if (fs_125) { + *value = LSM6DS3TR_C_FS_G_ABSTR_125dps; + } else { + switch(fs_main) { + case 0: *value = LSM6DS3TR_C_FS_G_ABSTR_250dps; break; + case 1: *value = LSM6DS3TR_C_FS_G_ABSTR_500dps; break; + case 2: *value = LSM6DS3TR_C_FS_G_ABSTR_1000dps; break; + case 3: *value = LSM6DS3TR_C_FS_G_ABSTR_2000dps; break; + } + } + /* update runtime value */ + _imu_cfg.field_v.fs_g_v = *value; + } + } + + return err; +} + +ERRNO_e IMU_set_odr_g(LSM6DS3TR_C_ODR_G_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_ODR_G_POWER_DOWN: break; + case LSM6DS3TR_C_ODR_G_12_5Hz: break; + case LSM6DS3TR_C_ODR_G_26Hz: break; + case LSM6DS3TR_C_ODR_G_52Hz: break; + case LSM6DS3TR_C_ODR_G_104Hz: break; + case LSM6DS3TR_C_ODR_G_208Hz: break; + case LSM6DS3TR_C_ODR_G_416Hz: break; + case LSM6DS3TR_C_ODR_G_833Hz: break; + case LSM6DS3TR_C_ODR_G_1666Hz: break; + case LSM6DS3TR_C_ODR_G_3332Hz: break; + case LSM6DS3TR_C_ODR_G_6664Hz: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.odr_g_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_g_f.reg_addr, + (uint8_t)value, + _imu_fields.odr_g_f.field_start, + _imu_fields.odr_g_f.field_len); + return err; +} + +ERRNO_e IMU_get_odr_g(LSM6DS3TR_C_ODR_G_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_g_f.reg_addr, + &raw, + _imu_fields.odr_g_f.field_start, + _imu_fields.odr_g_f.field_len); + + *value = (LSM6DS3TR_C_ODR_G_e)raw; + _imu_cfg.field_v.odr_g_v = *value; + return err; +} + +ERRNO_e IMU_set_hp_en_g(LSM6DS3TR_C_HP_EN_G_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_HP_EN_G_DISABLE: break; + case LSM6DS3TR_C_HP_EN_G_ENABLE: break; + default: return ERRNO_INVALID_PARAM; + } + + if (_imu_cfg.field_v.hp_en_g_v != value) { + _imu_cfg.field_v.hp_en_g_v = value; + } + + err = I2C_field_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.hp_en_g_f.reg_addr, + (uint8_t)value, + _imu_fields.hp_en_g_f.field_start, + _imu_fields.hp_en_g_f.field_len); + return err; +} + +ERRNO_e IMU_get_hp_en_g(LSM6DS3TR_C_HP_EN_G_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.hp_en_g_f.reg_addr, + &raw, + _imu_fields.hp_en_g_f.field_start, + _imu_fields.hp_en_g_f.field_len); + *value = (LSM6DS3TR_C_HP_EN_G_e)raw; + + if (_imu_cfg.field_v.hp_en_g_v != *value) { + _imu_cfg.field_v.hp_en_g_v = *value; + } + + return err; +} + +ERRNO_e IMU_set_hpm_g(LSM6DS3TR_C_HPM_G_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_HPM_G_16mHz: break; + case LSM6DS3TR_C_HPM_G_65mHz: break; + case LSM6DS3TR_C_HPM_G_260mHz: break; + case LSM6DS3TR_C_HPM_G_1_04Hz: break; + default: return ERRNO_INVALID_PARAM; + } + + if (_imu_cfg.field_v.hpm_g_v != value) { + _imu_cfg.field_v.hpm_g_v = value; + } + + err = I2C_field_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.hpm_g_f.reg_addr, + (uint8_t)value, + _imu_fields.hpm_g_f.field_start, + _imu_fields.hpm_g_f.field_len); + return err; +} + +ERRNO_e IMU_get_hpm_g(LSM6DS3TR_C_HPM_G_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.hpm_g_f.reg_addr, + &raw, + _imu_fields.hpm_g_f.field_start, + _imu_fields.hpm_g_f.field_len); + *value = (LSM6DS3TR_C_HPM_G_e)raw; + + if (_imu_cfg.field_v.hpm_g_v != *value) { + _imu_cfg.field_v.hpm_g_v = *value; + } + + return err; +} + +ERRNO_e IMU_set_lpf1_sel_g(LSM6DS3TR_C_LPF1_SEL_G_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_LPF1_SEL_G_DISABLE: break; + case LSM6DS3TR_C_LPF1_SEL_G_ENABLE: break; + default: return ERRNO_INVALID_PARAM; + } + + if (_imu_cfg.field_v.lpf1_sel_g_v != value) { + _imu_cfg.field_v.lpf1_sel_g_v = value; + } + + err = I2C_field_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.lpf1_sel_g_f.reg_addr, + (uint8_t)value, + _imu_fields.lpf1_sel_g_f.field_start, + _imu_fields.lpf1_sel_g_f.field_len); + return err; +} + +ERRNO_e IMU_get_lpf1_sel_g(LSM6DS3TR_C_LPF1_SEL_G_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.lpf1_sel_g_f.reg_addr, + &raw, + _imu_fields.lpf1_sel_g_f.field_start, + _imu_fields.lpf1_sel_g_f.field_len); + *value = (LSM6DS3TR_C_LPF1_SEL_G_e)raw; + + if (_imu_cfg.field_v.lpf1_sel_g_v != *value) { + _imu_cfg.field_v.lpf1_sel_g_v = *value; + } + + return err; +} + +ERRNO_e IMU_set_ftype(LSM6DS3TR_C_FTYPE_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_FTYPE_0: break; + case LSM6DS3TR_C_FTYPE_1: break; + case LSM6DS3TR_C_FTYPE_2: break; + case LSM6DS3TR_C_FTYPE_3: break; + default: return ERRNO_INVALID_PARAM; + } + + if (_imu_cfg.field_v.ftype_v != value) { + _imu_cfg.field_v.ftype_v = value; + } + + err = I2C_field_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.ftype_f.reg_addr, + (uint8_t)value, + _imu_fields.ftype_f.field_start, + _imu_fields.ftype_f.field_len); + return err; +} + +ERRNO_e IMU_get_ftype(LSM6DS3TR_C_FTYPE_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.ftype_f.reg_addr, + &raw, + _imu_fields.ftype_f.field_start, + _imu_fields.ftype_f.field_len); + *value = (LSM6DS3TR_C_FTYPE_e)raw; + + if (_imu_cfg.field_v.ftype_v != *value) { + _imu_cfg.field_v.ftype_v = *value; + } + + return err; +} + +ERRNO_e IMU_xl_enable(bool en) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + if (en) { + if (_imu_cfg.field_v.odr_xl_v == LSM6DS3TR_C_ODR_XL_POWER_DOWN) { + _imu_cfg.field_v.odr_xl_v = LSM6DS3TR_C_ODR_XL_416Hz; + } + err = I2C_field_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_xl_f.reg_addr, + (uint8_t)_imu_cfg.field_v.odr_xl_v, + _imu_fields.odr_xl_f.field_start, + _imu_fields.odr_xl_f.field_len); + } else { + _imu_cfg.field_v.odr_xl_v = LSM6DS3TR_C_ODR_XL_POWER_DOWN; + err = I2C_field_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_xl_f.reg_addr, + (uint8_t)_imu_cfg.field_v.odr_xl_v, + _imu_fields.odr_xl_f.field_start, + _imu_fields.odr_xl_f.field_len); + } + + return err; +} + +ERRNO_e IMU_is_xl_enabled(bool *en) +{ + uint8_t xl_enabled; + ERRNO_e err; + + err = I2C_field_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_xl_f.reg_addr, + &xl_enabled, + _imu_fields.odr_xl_f.field_start, + _imu_fields.odr_xl_f.field_len); + + return (bool) xl_enabled; +} + +ERRNO_e IMU_set_fs_xl(LSM6DS3TR_C_FS_XL_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_FS_XL_2g: break; + case LSM6DS3TR_C_FS_XL_16g: break; + case LSM6DS3TR_C_FS_XL_4g: break; + case LSM6DS3TR_C_FS_XL_8g: break; + default: return ERRNO_INVALID_PARAM; + } + + /* update runtime value */ + _imu_cfg.field_v.fs_xl_v = value; + + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fs_xl_f.reg_addr, + (uint8_t)value, + _imu_fields.fs_xl_f.field_start, + _imu_fields.fs_xl_f.field_len); + + return err; +} + +ERRNO_e IMU_get_fs_xl(LSM6DS3TR_C_FS_XL_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fs_xl_f.reg_addr, + &raw, + _imu_fields.fs_xl_f.field_start, + _imu_fields.fs_xl_f.field_len); + *value = (LSM6DS3TR_C_FS_XL_e)raw; + _imu_cfg.field_v.fs_xl_v = *value; + + return err; +} + +ERRNO_e IMU_set_odr_xl(LSM6DS3TR_C_ODR_XL_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_ODR_XL_POWER_DOWN: break; + case LSM6DS3TR_C_ODR_XL_12_5Hz: break; + case LSM6DS3TR_C_ODR_XL_26Hz: break; + case LSM6DS3TR_C_ODR_XL_52Hz: break; + case LSM6DS3TR_C_ODR_XL_104Hz: break; + case LSM6DS3TR_C_ODR_XL_208Hz: break; + case LSM6DS3TR_C_ODR_XL_416Hz: break; + case LSM6DS3TR_C_ODR_XL_833Hz: break; + case LSM6DS3TR_C_ODR_XL_1666Hz: break; + case LSM6DS3TR_C_ODR_XL_3332Hz: break; + case LSM6DS3TR_C_ODR_XL_6664Hz: break; + case LSM6DS3TR_C_ODR_XL_1_6Hz: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.odr_xl_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_xl_f.reg_addr, + (uint8_t)value, + _imu_fields.odr_xl_f.field_start, + _imu_fields.odr_xl_f.field_len); + return err; +} + +ERRNO_e IMU_get_odr_xl(LSM6DS3TR_C_ODR_XL_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_xl_f.reg_addr, + &raw, + _imu_fields.odr_xl_f.field_start, + _imu_fields.odr_xl_f.field_len); + + *value = (LSM6DS3TR_C_ODR_XL_e)raw; + _imu_cfg.field_v.odr_xl_v = *value; + return err; +} + +ERRNO_e IMU_set_lpf1_bw_sel(LSM6DS3TR_C_LPF1_BW_SEL_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_LPF1_BW_SEL_ODR_DIV_2: break; + case LSM6DS3TR_C_LPF1_BW_SEL_ODR_DIV_4: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.lpf1_bw_sel_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.lpf1_bw_sel_f.reg_addr, + (uint8_t)value, + _imu_fields.lpf1_bw_sel_f.field_start, + _imu_fields.lpf1_bw_sel_f.field_len); + return err; +} + +ERRNO_e IMU_get_lpf1_bw_sel(LSM6DS3TR_C_LPF1_BW_SEL_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.lpf1_bw_sel_f.reg_addr, + &raw, + _imu_fields.lpf1_bw_sel_f.field_start, + _imu_fields.lpf1_bw_sel_f.field_len); + + *value = (LSM6DS3TR_C_LPF1_BW_SEL_e)raw; + _imu_cfg.field_v.lpf1_bw_sel_v = *value; + return err; +} + +ERRNO_e IMU_set_lpf2_xl_en(LSM6DS3TR_C_LPF2_XL_EN_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_LPF2_XL_EN_DISABLED: break; + case LSM6DS3TR_C_LPF2_XL_EN_ENABLED: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.lpf2_xl_en_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.lpf2_xl_en_f.reg_addr, + (uint8_t)value, + _imu_fields.lpf2_xl_en_f.field_start, + _imu_fields.lpf2_xl_en_f.field_len); + return err; +} + +ERRNO_e IMU_get_lpf2_xl_en(LSM6DS3TR_C_LPF2_XL_EN_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.lpf2_xl_en_f.reg_addr, + &raw, + _imu_fields.lpf2_xl_en_f.field_start, + _imu_fields.lpf2_xl_en_f.field_len); + + *value = (LSM6DS3TR_C_LPF2_XL_EN_e)raw; + _imu_cfg.field_v.lpf2_xl_en_v = *value; + return err; +} + +ERRNO_e IMU_set_hp_slope_xl_en(LSM6DS3TR_C_HP_SLOPE_XL_EN_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_HP_SLOPE_XL_EN_DISABLED: break; + case LSM6DS3TR_C_HP_SLOPE_XL_EN_ENABLED: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.hp_slope_xl_en_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.hp_slope_xl_en_f.reg_addr, + (uint8_t)value, + _imu_fields.hp_slope_xl_en_f.field_start, + _imu_fields.hp_slope_xl_en_f.field_len); + return err; +} + +ERRNO_e IMU_get_hp_slope_xl_en(LSM6DS3TR_C_HP_SLOPE_XL_EN_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.hp_slope_xl_en_f.reg_addr, + &raw, + _imu_fields.hp_slope_xl_en_f.field_start, + _imu_fields.hp_slope_xl_en_f.field_len); + + *value = (LSM6DS3TR_C_HP_SLOPE_XL_EN_e)raw; + _imu_cfg.field_v.hp_slope_xl_en_v = *value; + return err; +} + +ERRNO_e IMU_set_hpcf_xl(LSM6DS3TR_C_HPCF_XL_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_HPCF_XL_00: break; + case LSM6DS3TR_C_HPCF_XL_01: break; + case LSM6DS3TR_C_HPCF_XL_02: break; + case LSM6DS3TR_C_HPCF_XL_03: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.hpcf_xl_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.hpcf_xl_f.reg_addr, + (uint8_t)value, + _imu_fields.hpcf_xl_f.field_start, + _imu_fields.hpcf_xl_f.field_len); + return err; +} + +ERRNO_e IMU_get_hpcf_xl(LSM6DS3TR_C_HPCF_XL_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.hpcf_xl_f.reg_addr, + &raw, + _imu_fields.hpcf_xl_f.field_start, + _imu_fields.hpcf_xl_f.field_len); + + *value = (LSM6DS3TR_C_HPCF_XL_e)raw; + _imu_cfg.field_v.hpcf_xl_v = *value; + return err; +} + +ERRNO_e IMU_set_input_composite(LSM6DS3TR_C_INPUT_COMPOSITE_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_INPUT_COMPOSITE_LOW_LATENCY: break; + case LSM6DS3TR_C_INPUT_COMPOSITE_LOW_NOISE: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.input_composite_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.input_composite_f.reg_addr, + (uint8_t)value, + _imu_fields.input_composite_f.field_start, + _imu_fields.input_composite_f.field_len); + return err; +} + +ERRNO_e IMU_get_input_composite(LSM6DS3TR_C_INPUT_COMPOSITE_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.input_composite_f.reg_addr, + &raw, + _imu_fields.input_composite_f.field_start, + _imu_fields.input_composite_f.field_len); + + *value = (LSM6DS3TR_C_INPUT_COMPOSITE_e)raw; + _imu_cfg.field_v.input_composite_v = *value; + return err; +} + +ERRNO_e IMU_set_FTH(uint16_t value) +{ + ERRNO_e err; + if (value > 2047) { + return ERRNO_INVALID_PARAM; + } + _imu_cfg.field_v.fifo_threshold_v = value; + uint16_t safe_val = value & 0x07FF; + uint8_t low = safe_val & 0xFF; + uint8_t high = safe_val >> 8; + + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fifo_thresh_low_f.reg_addr, + low, + _imu_fields.fifo_thresh_low_f.field_start, + _imu_fields.fifo_thresh_low_f.field_len); + if (err == ERRNO_SUCCESS) { + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fifo_thresh_high_f.reg_addr, + high, + _imu_fields.fifo_thresh_high_f.field_start, + _imu_fields.fifo_thresh_high_f.field_len); + } + + return err; +} + +ERRNO_e IMU_get_FTH(uint16_t *value) +{ + ERRNO_e err; + uint8_t low, high; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fifo_thresh_low_f.reg_addr, + &low, + _imu_fields.fifo_thresh_low_f.field_start, + _imu_fields.fifo_thresh_low_f.field_len); + if (err == ERRNO_SUCCESS) { + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fifo_thresh_high_f.reg_addr, + &high, + _imu_fields.fifo_thresh_high_f.field_start, + _imu_fields.fifo_thresh_high_f.field_len); + } + *value = 0x07FF & ((uint16_t)low | ((uint16_t)high << 8)); + _imu_cfg.field_v.fifo_threshold_v = *value; + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_set_dec_fifo_gyro(LSM6DS3TR_C_DEC_FIFO_GYRO_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_DEC_FIFO_GYRO_DATA_NOT_IN_FIFO: break; + case LSM6DS3TR_C_DEC_FIFO_GYRO_NO_DECIMATION: break; + case LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_2: break; + case LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_3: break; + case LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_4: break; + case LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_8: break; + case LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_16: break; + case LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_32: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.dec_fifo_gyro_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.dec_fifo_gyro_f.reg_addr, + (uint8_t)value, + _imu_fields.dec_fifo_gyro_f.field_start, + _imu_fields.dec_fifo_gyro_f.field_len); + return err; +} + +ERRNO_e IMU_get_dec_fifo_gyro(LSM6DS3TR_C_DEC_FIFO_GYRO_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.dec_fifo_gyro_f.reg_addr, + &raw, + _imu_fields.dec_fifo_gyro_f.field_start, + _imu_fields.dec_fifo_gyro_f.field_len); + + *value = (LSM6DS3TR_C_DEC_FIFO_GYRO_e)raw; + _imu_cfg.field_v.dec_fifo_gyro_v = *value; + return err; +} + +ERRNO_e IMU_set_dec_fifo_xl(LSM6DS3TR_C_DEC_FIFO_XL_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_DEC_FIFO_XL_DATA_NOT_IN_FIFO: break; + case LSM6DS3TR_C_DEC_FIFO_XL_NO_DECIMATION: break; + case LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_2: break; + case LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_3: break; + case LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_4: break; + case LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_8: break; + case LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_16: break; + case LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_32: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.dec_fifo_xl_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.dec_fifo_xl_f.reg_addr, + (uint8_t)value, + _imu_fields.dec_fifo_xl_f.field_start, + _imu_fields.dec_fifo_xl_f.field_len); + return err; +} + +ERRNO_e IMU_get_dec_fifo_xl(LSM6DS3TR_C_DEC_FIFO_XL_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.dec_fifo_xl_f.reg_addr, + &raw, + _imu_fields.dec_fifo_xl_f.field_start, + _imu_fields.dec_fifo_xl_f.field_len); + + *value = (LSM6DS3TR_C_DEC_FIFO_XL_e)raw; + _imu_cfg.field_v.dec_fifo_xl_v = *value; + return err; +} + +ERRNO_e IMU_set_odr_fifo(LSM6DS3TR_C_ODR_FIFO_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_ODR_FIFO_DISABLE: break; + case LSM6DS3TR_C_ODR_FIFO_12_5Hz: break; + case LSM6DS3TR_C_ODR_FIFO_26Hz: break; + case LSM6DS3TR_C_ODR_FIFO_52Hz: break; + case LSM6DS3TR_C_ODR_FIFO_104Hz: break; + case LSM6DS3TR_C_ODR_FIFO_208Hz: break; + case LSM6DS3TR_C_ODR_FIFO_416Hz: break; + case LSM6DS3TR_C_ODR_FIFO_833Hz: break; + case LSM6DS3TR_C_ODR_FIFO_1666Hz: break; + case LSM6DS3TR_C_ODR_FIFO_3332Hz: break; + case LSM6DS3TR_C_ODR_FIFO_6664Hz: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.odr_fifo_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_fifo_f.reg_addr, + (uint8_t)value, + _imu_fields.odr_fifo_f.field_start, + _imu_fields.odr_fifo_f.field_len); + return err; +} + +ERRNO_e IMU_get_odr_fifo(LSM6DS3TR_C_ODR_FIFO_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.odr_fifo_f.reg_addr, + &raw, + _imu_fields.odr_fifo_f.field_start, + _imu_fields.odr_fifo_f.field_len); + + *value = (LSM6DS3TR_C_ODR_FIFO_e)raw; + _imu_cfg.field_v.odr_fifo_v = *value; + return err; +} + +ERRNO_e IMU_set_fifo_mode(LSM6DS3TR_C_FIFO_MODE_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_FIFO_MODE_BYPASS: break; + case LSM6DS3TR_C_FIFO_MODE_FIFO_STOP_ON_FULL: break; + case LSM6DS3TR_C_FIFO_MODE_CON_THEN_FIFO: break; + case LSM6DS3TR_C_FIFO_MODE_BYPASS_THEN_CON: break; + case LSM6DS3TR_C_FIFO_MODE_CONTINUOUS: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.fifo_mode_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fifo_mode_f.reg_addr, + (uint8_t)value, + _imu_fields.fifo_mode_f.field_start, + _imu_fields.fifo_mode_f.field_len); + return err; +} + +ERRNO_e IMU_get_fifo_mode(LSM6DS3TR_C_FIFO_MODE_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.fifo_mode_f.reg_addr, + &raw, + _imu_fields.fifo_mode_f.field_start, + _imu_fields.fifo_mode_f.field_len); + + *value = (LSM6DS3TR_C_FIFO_MODE_e)raw; + _imu_cfg.field_v.fifo_mode_v = *value; + return err; +} + +ERRNO_e IMU_set_int1_fth(LSM6DS3TR_C_INT1_FTH_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_INT1_FTH_DISABLED: break; + case LSM6DS3TR_C_INT1_FTH_ENABLED: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.int1_fth_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.int1_fth_f.reg_addr, + (uint8_t)value, + _imu_fields.int1_fth_f.field_start, + _imu_fields.int1_fth_f.field_len); + return err; +} + +ERRNO_e IMU_get_int1_fth(LSM6DS3TR_C_INT1_FTH_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.int1_fth_f.reg_addr, + &raw, + _imu_fields.int1_fth_f.field_start, + _imu_fields.int1_fth_f.field_len); + + *value = (LSM6DS3TR_C_INT1_FTH_e)raw; + _imu_cfg.field_v.int1_fth_v = *value; + return err; +} + +ERRNO_e IMU_set_sw_reset(LSM6DS3TR_C_SW_RESET_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_SW_RESET_NORMAL_MODE: break; + case LSM6DS3TR_C_SW_RESET_RESET_DEVICE: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.sw_reset_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.sw_reset_f.reg_addr, + (uint8_t)value, + _imu_fields.sw_reset_f.field_start, + _imu_fields.sw_reset_f.field_len); + return err; +} + +ERRNO_e IMU_get_sw_reset(LSM6DS3TR_C_SW_RESET_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.sw_reset_f.reg_addr, + &raw, + _imu_fields.sw_reset_f.field_start, + _imu_fields.sw_reset_f.field_len); + + *value = (LSM6DS3TR_C_SW_RESET_e)raw; + _imu_cfg.field_v.sw_reset_v = *value; + return err; +} + +ERRNO_e IMU_set_bdu(LSM6DS3TR_C_BDU_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_BDU_CONTINUOUS: break; + case LSM6DS3TR_C_BDU_BLOCK_UPDATE: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.bdu_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.bdu_f.reg_addr, + (uint8_t)value, + _imu_fields.bdu_f.field_start, + _imu_fields.bdu_f.field_len); + return err; +} + +ERRNO_e IMU_get_bdu(LSM6DS3TR_C_BDU_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.bdu_f.reg_addr, + &raw, + _imu_fields.bdu_f.field_start, + _imu_fields.bdu_f.field_len); + + *value = (LSM6DS3TR_C_BDU_e)raw; + _imu_cfg.field_v.bdu_v = *value; + return err; +} + +ERRNO_e IMU_set_interrupts_enable(LSM6DS3TR_C_INTERRUPTS_ENABLE_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_INTERRUPTS_DISABLE: break; + case LSM6DS3TR_C_INTERRUPTS_ENABLE: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.interrupts_enable_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.interrupts_enable_f.reg_addr, + (uint8_t)value, + _imu_fields.interrupts_enable_f.field_start, + _imu_fields.interrupts_enable_f.field_len); + return err; +} + +ERRNO_e IMU_get_interrupts_enable(LSM6DS3TR_C_INTERRUPTS_ENABLE_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.interrupts_enable_f.reg_addr, + &raw, + _imu_fields.interrupts_enable_f.field_start, + _imu_fields.interrupts_enable_f.field_len); + + *value = (LSM6DS3TR_C_INTERRUPTS_ENABLE_e)raw; + _imu_cfg.field_v.interrupts_enable_v = *value; + return err; +} + +ERRNO_e IMU_set_slope_fds(LSM6DS3TR_C_SLOPE_FDS_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_SLOPE_FDS_SLOPE: break; + case LSM6DS3TR_C_SLOPE_FDS_HPF: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.slope_fds_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.slope_fds_f.reg_addr, + (uint8_t)value, + _imu_fields.slope_fds_f.field_start, + _imu_fields.slope_fds_f.field_len); + return err; +} + +ERRNO_e IMU_get_slope_fds(LSM6DS3TR_C_SLOPE_FDS_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.slope_fds_f.reg_addr, + &raw, + _imu_fields.slope_fds_f.field_start, + _imu_fields.slope_fds_f.field_len); + + *value = (LSM6DS3TR_C_SLOPE_FDS_e)raw; + _imu_cfg.field_v.slope_fds_v = *value; + return err; +} + +ERRNO_e IMU_set_tap_x_en(LSM6DS3TR_C_TAP_X_EN_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_TAP_X_EN_DISABLED: break; + case LSM6DS3TR_C_TAP_X_EN_ENABLED: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.tap_x_en_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.tap_x_en_f.reg_addr, + (uint8_t)value, + _imu_fields.tap_x_en_f.field_start, + _imu_fields.tap_x_en_f.field_len); + return err; +} + +ERRNO_e IMU_get_tap_x_en(LSM6DS3TR_C_TAP_X_EN_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.tap_x_en_f.reg_addr, + &raw, + _imu_fields.tap_x_en_f.field_start, + _imu_fields.tap_x_en_f.field_len); + + *value = (LSM6DS3TR_C_TAP_X_EN_e)raw; + _imu_cfg.field_v.tap_x_en_v = *value; + return err; +} + +ERRNO_e IMU_set_tap_y_en(LSM6DS3TR_C_TAP_Y_EN_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_TAP_Y_EN_DISABLED: break; + case LSM6DS3TR_C_TAP_Y_EN_ENABLED: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.tap_y_en_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.tap_y_en_f.reg_addr, + (uint8_t)value, + _imu_fields.tap_y_en_f.field_start, + _imu_fields.tap_y_en_f.field_len); + return err; +} + +ERRNO_e IMU_get_tap_y_en(LSM6DS3TR_C_TAP_Y_EN_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.tap_y_en_f.reg_addr, + &raw, + _imu_fields.tap_y_en_f.field_start, + _imu_fields.tap_y_en_f.field_len); + + *value = (LSM6DS3TR_C_TAP_Y_EN_e)raw; + _imu_cfg.field_v.tap_y_en_v = *value; + return err; +} + +ERRNO_e IMU_set_tap_z_en(LSM6DS3TR_C_TAP_Z_EN_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_TAP_Z_EN_DISABLED: break; + case LSM6DS3TR_C_TAP_Z_EN_ENABLED: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.tap_z_en_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.tap_z_en_f.reg_addr, + (uint8_t)value, + _imu_fields.tap_z_en_f.field_start, + _imu_fields.tap_z_en_f.field_len); + return err; +} + +ERRNO_e IMU_get_tap_z_en(LSM6DS3TR_C_TAP_Z_EN_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.tap_z_en_f.reg_addr, + &raw, + _imu_fields.tap_z_en_f.field_start, + _imu_fields.tap_z_en_f.field_len); + + *value = (LSM6DS3TR_C_TAP_Z_EN_e)raw; + _imu_cfg.field_v.tap_z_en_v = *value; + return err; +} + +ERRNO_e IMU_set_lir(LSM6DS3TR_C_LIR_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_LIR_DISABLED: break; + case LSM6DS3TR_C_LIR_ENABLED: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.lir_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.lir_f.reg_addr, + (uint8_t)value, + _imu_fields.lir_f.field_start, + _imu_fields.lir_f.field_len); + return err; +} + +ERRNO_e IMU_get_lir(LSM6DS3TR_C_LIR_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.lir_f.reg_addr, + &raw, + _imu_fields.lir_f.field_start, + _imu_fields.lir_f.field_len); + + *value = (LSM6DS3TR_C_LIR_e)raw; + _imu_cfg.field_v.lir_v = *value; + return err; +} + +ERRNO_e IMU_set_tap_ths(uint8_t value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + if (value >= 32) { + return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.tap_ths_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.tap_ths_f.reg_addr, + (uint8_t)value, + _imu_fields.tap_ths_f.field_start, + _imu_fields.tap_ths_f.field_len); + return err; +} + +ERRNO_e IMU_get_tap_ths(uint8_t *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.tap_ths_f.reg_addr, + &raw, + _imu_fields.tap_ths_f.field_start, + _imu_fields.tap_ths_f.field_len); + + *value = raw; + _imu_cfg.field_v.tap_ths_v = *value; + return err; +} + +ERRNO_e IMU_set_quiet(LSM6DS3TR_C_QUIET_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_QUIET_2_OVER_ODR_XL: break; + case LSM6DS3TR_C_QUIET_4_OVER_ODR_XL: break; + case LSM6DS3TR_C_QUIET_8_OVER_ODR_XL: break; + case LSM6DS3TR_C_QUIET_12_OVER_ODR_XL: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.quiet_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.quiet_f.reg_addr, + (uint8_t)value, + _imu_fields.quiet_f.field_start, + _imu_fields.quiet_f.field_len); + return err; +} + +ERRNO_e IMU_get_quiet(LSM6DS3TR_C_QUIET_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.quiet_f.reg_addr, + &raw, + _imu_fields.quiet_f.field_start, + _imu_fields.quiet_f.field_len); + + *value = (LSM6DS3TR_C_QUIET_e)raw; + _imu_cfg.field_v.quiet_v = *value; + return err; +} + +ERRNO_e IMU_set_shock(LSM6DS3TR_C_SHOCK_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_SHOCK_4_OVER_ODR_XL: break; + case LSM6DS3TR_C_SHOCK_8_OVER_ODR_XL: break; + case LSM6DS3TR_C_SHOCK_16_OVER_ODR_XL: break; + case LSM6DS3TR_C_SHOCK_24_OVER_ODR_XL: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.shock_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.shock_f.reg_addr, + (uint8_t)value, + _imu_fields.shock_f.field_start, + _imu_fields.shock_f.field_len); + return err; +} + +ERRNO_e IMU_get_shock(LSM6DS3TR_C_SHOCK_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.shock_f.reg_addr, + &raw, + _imu_fields.shock_f.field_start, + _imu_fields.shock_f.field_len); + + *value = (LSM6DS3TR_C_SHOCK_e)raw; + _imu_cfg.field_v.shock_v = *value; + return err; +} + +ERRNO_e IMU_set_single_double_tap(LSM6DS3TR_C_SINGLE_DOUBLE_TAP_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_SINGLE_DOUBLE_TAP_SINGLE_ONLY: break; + case LSM6DS3TR_C_SINGLE_DOUBLE_TAP_SINGLE_AND_DOUBLE: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.single_double_tap_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.single_double_tap_f.reg_addr, + (uint8_t)value, + _imu_fields.single_double_tap_f.field_start, + _imu_fields.single_double_tap_f.field_len); + return err; +} + +ERRNO_e IMU_get_single_double_tap(LSM6DS3TR_C_SINGLE_DOUBLE_TAP_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.single_double_tap_f.reg_addr, + &raw, + _imu_fields.single_double_tap_f.field_start, + _imu_fields.single_double_tap_f.field_len); + + *value = (LSM6DS3TR_C_SINGLE_DOUBLE_TAP_e)raw; + _imu_cfg.field_v.single_double_tap_v = *value; + return err; +} + +ERRNO_e IMU_set_wk_ths(uint8_t value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + if (value > 63) { + return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.wk_ths_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.wk_ths_f.reg_addr, + (uint8_t)value, + _imu_fields.wk_ths_f.field_start, + _imu_fields.wk_ths_f.field_len); + return err; +} + +ERRNO_e IMU_get_wk_ths(uint8_t *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.wk_ths_f.reg_addr, + &raw, + _imu_fields.wk_ths_f.field_start, + _imu_fields.wk_ths_f.field_len); + + *value = raw; + _imu_cfg.field_v.wk_ths_v = *value; /* is this needed? */ + return err; +} + +ERRNO_e IMU_set_wake_dur(LSM6DS3TR_C_WAKE_DUR_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_WAKE_DUR_0_ODR_XL: break; + case LSM6DS3TR_C_WAKE_DUR_1_ODR_XL: break; + case LSM6DS3TR_C_WAKE_DUR_2_ODR_XL: break; + case LSM6DS3TR_C_WAKE_DUR_3_ODR_XL: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.wake_dur_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.wake_dur_f.reg_addr, + (uint8_t)value, + _imu_fields.wake_dur_f.field_start, + _imu_fields.wake_dur_f.field_len); + return err; +} + +ERRNO_e IMU_get_wake_dur(LSM6DS3TR_C_WAKE_DUR_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.wake_dur_f.reg_addr, + &raw, + _imu_fields.wake_dur_f.field_start, + _imu_fields.wake_dur_f.field_len); + + *value = (LSM6DS3TR_C_WAKE_DUR_e)raw; + _imu_cfg.field_v.wake_dur_v = *value; + return err; +} + +ERRNO_e IMU_set_int1_single_tap(LSM6DS3TR_C_INT1_SINGLE_TAP_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_INT1_SINGLE_TAP_DISABLED: break; + case LSM6DS3TR_C_INT1_SINGLE_TAP_ENABLED: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.int1_single_tap_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.int1_single_tap_f.reg_addr, + (uint8_t)value, + _imu_fields.int1_single_tap_f.field_start, + _imu_fields.int1_single_tap_f.field_len); + return err; +} + +ERRNO_e IMU_get_int1_single_tap(LSM6DS3TR_C_INT1_SINGLE_TAP_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.int1_single_tap_f.reg_addr, + &raw, + _imu_fields.int1_single_tap_f.field_start, + _imu_fields.int1_single_tap_f.field_len); + + *value = (LSM6DS3TR_C_INT1_SINGLE_TAP_e)raw; + _imu_cfg.field_v.int1_single_tap_v = *value; + return err; +} + +ERRNO_e IMU_set_int1_wu(LSM6DS3TR_C_INT1_WU_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_INT1_WU_DISABLED: break; + case LSM6DS3TR_C_INT1_WU_ENABLED: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.int1_wu_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.int1_wu_f.reg_addr, + (uint8_t)value, + _imu_fields.int1_wu_f.field_start, + _imu_fields.int1_wu_f.field_len); + return err; +} + +ERRNO_e IMU_get_int1_wu(LSM6DS3TR_C_INT1_WU_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.int1_wu_f.reg_addr, + &raw, + _imu_fields.int1_wu_f.field_start, + _imu_fields.int1_wu_f.field_len); + + *value = (LSM6DS3TR_C_INT1_WU_e)raw; + _imu_cfg.field_v.int1_wu_v = *value; + return err; +} + +ERRNO_e IMU_set_int1_double_tap(LSM6DS3TR_C_INT1_DOUBLE_TAP_e value) +{ + ERRNO_e err; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + switch (value) { + case LSM6DS3TR_C_INT1_DOUBLE_TAP_DISABLED: break; + case LSM6DS3TR_C_INT1_DOUBLE_TAP_ENABLED: break; + default: return ERRNO_INVALID_PARAM; + } + + _imu_cfg.field_v.int1_double_tap_v = value; + err = I2C_field_write(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.int1_double_tap_f.reg_addr, + (uint8_t)value, + _imu_fields.int1_double_tap_f.field_start, + _imu_fields.int1_double_tap_f.field_len); + return err; +} + +ERRNO_e IMU_get_int1_double_tap(LSM6DS3TR_C_INT1_DOUBLE_TAP_e *value) +{ + ERRNO_e err; + uint8_t raw; + + err = I2C_field_read(I2C_CH_1, + LSM6DS3_I2C_DEV_ADDR, + _imu_fields.int1_double_tap_f.reg_addr, + &raw, + _imu_fields.int1_double_tap_f.field_start, + _imu_fields.int1_double_tap_f.field_len); + + *value = (LSM6DS3TR_C_INT1_DOUBLE_TAP_e)raw; + _imu_cfg.field_v.int1_double_tap_v = *value; + return err; +} + +ERRNO_e IMU_temp_raw_read(int16_t *p_dest) +{ + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + else if (p_dest == NULL) { + return ERRNO_BAD_POINTER; + } + + if (I2C_words_read (I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_OUT_TEMP_L, (uint16_t *) p_dest, 1) != ERRNO_SUCCESS) { + return ERRNO_I2C_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_temp_c_read(float *p_dest) +{ + ERRNO_e err; + int16_t reading; + + err = IMU_temp_raw_read (&reading); + if (err != ERRNO_SUCCESS) { + return err; + } + + /* Need to divide by temp sensitivity to scale. */ + *p_dest = (float) reading / (float) _imu_cfg.temp_sensitivity; + + /* Add 25 degrees to remove offset. */ + // *p_dest += 25; + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_temp_f_read(float *p_dest) +{ + ERRNO_e err; + float reading; + + err = IMU_temp_c_read(&reading); + if (err != ERRNO_SUCCESS) { + return err; + } + + /* Convert to F. */ + *p_dest = (reading * (float)9.0) / (float)5.0 + (float)32.0; + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_reset(void) +{ + uint8_t byte = 0x01; + + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + if (I2C_bytes_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_CTRL3_C, &byte, 1) != ERRNO_SUCCESS) { + return ERRNO_I2C_FAILURE; + } + + /* Wait for 10 ms for the reset to complete. */ + k_busy_wait(10000); + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_xl_raw_x_read(int16_t *p_dest) +{ + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + else if (p_dest == NULL) { + return ERRNO_BAD_POINTER; + } + + if (I2C_words_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_OUTX_L_XL, (uint16_t *) p_dest, 1) != ERRNO_SUCCESS) { + return ERRNO_I2C_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_xl_raw_y_read(int16_t *p_dest) +{ + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + else if (p_dest == NULL) { + return ERRNO_BAD_POINTER; + } + + if (I2C_words_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_OUTY_L_XL, (uint16_t *) p_dest, 1) != ERRNO_SUCCESS) { + return ERRNO_I2C_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_xl_raw_z_read(int16_t *p_dest) +{ + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + else if (p_dest == NULL) { + return ERRNO_BAD_POINTER; + } + + if (I2C_words_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_OUTZ_L_XL, (uint16_t *) p_dest, 1) != ERRNO_SUCCESS) { + return ERRNO_I2C_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_xl_x_read(float *p_dest) +{ + int16_t x; + ERRNO_e err = IMU_xl_raw_x_read(&x); + + *p_dest = _imu_xl_raw_to_float(x); + + return err; +} + +ERRNO_e IMU_xl_y_read(float *p_dest) +{ + int16_t y; + ERRNO_e err = IMU_xl_raw_y_read(&y); + + *p_dest = _imu_xl_raw_to_float(y); + + return err; +} + +ERRNO_e IMU_xl_z_read(float *p_dest) +{ + int16_t z; + ERRNO_e err = IMU_xl_raw_z_read(&z); + + *p_dest = _imu_xl_raw_to_float(z); + + return err; +} + +ERRNO_e IMU_xl_read(IMU_data_s *p_dest) +{ + ERRNO_e err; + float x; + float y; + float z; + + err = IMU_xl_x_read(&x); + err |= IMU_xl_y_read(&y); + err |= IMU_xl_z_read(&z); + + p_dest->x = x; + p_dest->y = y; + p_dest->z = z; + + return err; +} + +ERRNO_e IMU_gyro_raw_x_read(int16_t *p_dest) +{ + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + else if (p_dest == NULL) { + return ERRNO_BAD_POINTER; + } + + if (I2C_words_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_OUTX_L_G, (uint16_t *) p_dest, 1) != ERRNO_SUCCESS) { + return ERRNO_I2C_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_gyro_raw_y_read(int16_t *p_dest) +{ + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + else if (p_dest == NULL) { + return ERRNO_BAD_POINTER; + } + + if (I2C_words_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_OUTY_L_G, (uint16_t *) p_dest, 1) != ERRNO_SUCCESS) { + return ERRNO_I2C_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_gyro_raw_z_read(int16_t *p_dest) +{ + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + else if (p_dest == NULL) { + return ERRNO_BAD_POINTER; + } + + if (I2C_words_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_OUTZ_L_G, (uint16_t *) p_dest, 1) != ERRNO_SUCCESS) { + return ERRNO_I2C_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_gyro_x_read(float *p_dest) +{ + int16_t x; + ERRNO_e err = IMU_gyro_raw_x_read(&x); + + *p_dest = _imu_gyro_raw_to_float(x); + + return err; +} + +ERRNO_e IMU_gyro_y_read(float *p_dest) +{ + int16_t y; + ERRNO_e err = IMU_gyro_raw_y_read (&y); + + *p_dest = _imu_gyro_raw_to_float (y); + + return err; +} + +ERRNO_e IMU_gyro_z_read(float *p_dest) +{ + int16_t z; + ERRNO_e err = IMU_gyro_raw_z_read (&z); + + *p_dest = _imu_gyro_raw_to_float (z); + + return err; +} + +ERRNO_e IMU_gyro_read(IMU_data_s *p_dest) +{ + ERRNO_e err; + float x; + float y; + float z; + + err = IMU_gyro_x_read (&x); + err |= IMU_gyro_y_read (&y); + err |= IMU_gyro_z_read (&z); + + p_dest->x = x; + p_dest->y = y; + p_dest->z = z; + + return err; +} + +void IMU_set_shot_capture_mode(bool enable) +{ + if (enable){ + atomic_set_bit(&_imu_cfg.interrupt_mode_flags, IMU_int_shot_capture_mode); + } else { + atomic_clear_bit(&_imu_cfg.interrupt_mode_flags, IMU_int_shot_capture_mode); + } + +} + +ERRNO_e IMU_fifo_status_1to2_read (uint16_t *unread_words, uint8_t *empty, uint8_t *smart_full, uint8_t *over_run, uint8_t *waterM) +{ + ERRNO_e err; + uint16_t regs_val; + //err = I2C_words_read (I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_STATUS1, ®s_val, 1); + err = I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_STATUS1, (uint8_t *) ®s_val, 2); + if (ERRNO_SUCCESS != err) { + PRINT (ERROR, "i2c read fifo status regs failed in isr!\r\n"); + } + + if (ERRNO_SUCCESS == err) { + *unread_words = regs_val & 0x07FF; + *empty = (uint8_t)(regs_val >> 8) & LSM6DS3TR_C_FIFO_EMPTY_FIFO_EMPTY; + *smart_full = (uint8_t)(regs_val >> 8) & LSM6DS3TR_C_FIFO_FULL_FIFO_FULL; + *over_run = (uint8_t)(regs_val >> 8) & LSM6DS3TR_C_OVERRUN_OVERRUN; + *waterM = (uint8_t)(regs_val >> 8) & LSM6DS3TR_C_WTM_ABOVE_OR_EQUAL_WTM; + } + + return err; +} + +ERRNO_e IMU_func_src1_read (uint8_t *sign_motion) +{ + ERRNO_e err; + uint8_t reg_val; + err = I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_STATUS1, ®_val, 1); + if (err != ERRNO_SUCCESS) + { + PRINT (ERROR, "i2c read func src1 reg failed in isr!\r\n"); + return err; + } + *sign_motion = reg_val & LSM6DS3TR_C_SIGN_MOT_EV_STATUS_DETECTED; + + return err; +} + +ERRNO_e IMU_fifo_th_set(uint16_t fifo_threshold) +{ + ERRNO_e err = ERRNO_SUCCESS; + uint8_t reset = 0; + LSM6DS3TR_C_ODR_FIFO_e max_odr; + + if (fifo_threshold == 0 && atomic_get(&_imu_fifo_is_set)) { + + /* unroute FIFO threshold interrupt to IMU INT1 pad */ + err = IMU_set_int1_fth(LSM6DS3TR_C_INT1_FTH_DISABLED); + + /* disable fifo by setting oodr_fifo and fifo_mode to 0 */ + if (err == ERRNO_SUCCESS) { + err = I2C_bytes_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_CTRL5, &reset, 1); + } + + /* diable accelerometer and gyro data in FIFO */ + if (err == ERRNO_SUCCESS) { + err = I2C_bytes_write(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_FIFO_CTRL3, &reset, 1); + } + + /* set bdu bit to continuous update */ + if (err == ERRNO_SUCCESS) { + err = IMU_set_bdu(LSM6DS3TR_C_BDU_CONTINUOUS); + } + + if (err == ERRNO_SUCCESS) { + err = IMU_set_FTH(0); + } + + atomic_set(&_imu_fifo_is_set, 0); + } else if (fifo_threshold && !atomic_get(&_imu_fifo_is_set)) { + err = IMU_set_FTH(fifo_threshold); + + /* set BDU bit to enable proper reading of fifo output registers*/ + if (err == ERRNO_SUCCESS) { + err = IMU_set_bdu(LSM6DS3TR_C_BDU_BLOCK_UPDATE); + } + + /* enable gyroscope without decimation into fifo*/ + if (err == ERRNO_SUCCESS) { + err = IMU_set_dec_fifo_gyro(LSM6DS3TR_C_DEC_FIFO_GYRO_NO_DECIMATION); + } + + /* enable accelerometer data without decimation into fifo*/ + if (err == ERRNO_SUCCESS) { + err = IMU_set_dec_fifo_xl(LSM6DS3TR_C_DEC_FIFO_XL_NO_DECIMATION); + } + + /* set fifo odr rate equal to maximum of accelerometer and gyroscope odr */ + max_odr = (LSM6DS3TR_C_ODR_FIFO_e) ((uint8_t) _imu_cfg.field_v.odr_fifo_v > (uint8_t) _imu_cfg.field_v.odr_xl_v ? _imu_cfg.field_v.odr_fifo_v : _imu_cfg.field_v.odr_xl_v); + if (err == ERRNO_SUCCESS) { + err = IMU_set_odr_fifo(max_odr); + } + + /* set fifo to continuous mode */ + if (err == ERRNO_SUCCESS) { + err = IMU_set_fifo_mode(LSM6DS3TR_C_FIFO_MODE_CONTINUOUS); + } + + /* route FIFO threshold interrupt to IMU INT1 pad*/ + if (err == ERRNO_SUCCESS) { + err = IMU_set_int1_fth(LSM6DS3TR_C_INT1_FTH_ENABLED); + } + + atomic_set(&_imu_fifo_is_set, 1); + } + + return err; +} + +bool IMU_is_fifo_set(void) +{ + return _imu_fifo_is_set; +} + +ERRNO_e IMU_motion_int_enable (bool en, uint8_t threshold, uint8_t duration) +{ + if (!_imu_init) { + return ERRNO_NOT_INITIALIZED; + } + + if (en && !atomic_get(&_imu_motion_int_enable)) { + if (IMU_set_interrupts_enable(LSM6DS3TR_C_INTERRUPTS_ENABLE)) { + return ERRNO_I2C_FAILURE; + } + + if (IMU_set_lir(LSM6DS3TR_C_LIR_DISABLED)) { + return ERRNO_I2C_FAILURE; + } + + if (IMU_set_slope_fds(LSM6DS3TR_C_SLOPE_FDS_SLOPE)) { + return ERRNO_I2C_FAILURE; + } + + if (IMU_set_wake_dur((LSM6DS3TR_C_WAKE_DUR_e)duration)) { + return ERRNO_I2C_FAILURE; + } + + if (IMU_set_wk_ths(threshold)) { + return ERRNO_I2C_FAILURE; + } + + if (IMU_set_int1_wu(LSM6DS3TR_C_INT1_WU_ENABLED)) { + return ERRNO_I2C_FAILURE; + } + + atomic_set_bit(&_imu_cfg.interrupt_mode_flags, IMU_int_wake_up_mode); + + /* Set enable flag. This is used so if the IMU is put to sleep, we keep accelerometer running in low + power mode to detect motion and interrupt. */ + atomic_set(&_imu_motion_int_enable, 1); + } + else if (!en && atomic_get(&_imu_motion_int_enable)) { + if (IMU_set_int1_wu(LSM6DS3TR_C_INT1_WU_DISABLED)) + { + return ERRNO_I2C_FAILURE; + } + + atomic_clear_bit(&_imu_cfg.interrupt_mode_flags, IMU_int_wake_up_mode); + atomic_set(&_imu_motion_int_enable, 0); + } else { + goto out; + } + +out: + return ERRNO_SUCCESS; +} + +ERRNO_e IMU_sleep (void) +{ + uint8_t byte = 0x00; + + if (!_imu_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* README: Not used in initial release. */ + /* Disable shot capture, if enabled. */ + // SHOT_CAPTURE_enable (false); + + if (atomic_get(&_imu_motion_int_enable)) + { + /* Set to accelerometer low performance mode. */ + /* This lowers the output data rate of the accelerometer to 26 Hz. */ + byte = 0x10; + if (I2C_bytes_write (I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_CTRL6_C, &byte, 1) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + byte = 0x20; + if (I2C_bytes_write (I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_CTRL1_XL, &byte, 1) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + /* AN5130 page 38, option b. */ + k_busy_wait (100000); + + /* Route the wake-up interrupt signal to INT1 pin. */ + // byte = 0x20; + // if (I2C_bytes_write (I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_MD1_CFG, &byte, 1) != ERRNO_SUCCESS) + // { + // return ERRNO_I2C_FAILURE; + // } + + /* Configure GPIO for interrupts and register callback. */ + if (GPIO_cfg (GPIO_PIN_IMU_INT, GPIO_DIRECTION_IN, GPIO_PULLDOWN, GPIO_INIT_LOW, GPIO_INT_LL_HIGH, NULL) != ERRNO_SUCCESS) + { + return ERRNO_GPIO_FAILURE; + } + } + else + { + /* Disable accelerometer. */ + byte = 0x00; + if (I2C_bytes_write (I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_CTRL1_XL, &byte, 1) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + } + + /* Disable gyro. */ + byte = 0x00; + if (I2C_bytes_write (I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_CTRL2_G, &byte, 1) != ERRNO_SUCCESS) + { + return ERRNO_I2C_FAILURE; + } + + return ERRNO_SUCCESS; +} + +void IMU_task_install(void) +{ + static k_tid_t id; + static struct k_thread data; + + id = k_thread_create(&data, + _imu_task_stack, + IMU_TASK_STACK_SIZE, + _imu_task, + NULL, + NULL, + NULL, + IMU_TASK_THREAD_PRIORITY, + 0, + K_NO_WAIT); + k_thread_name_set(&data, "IMU_task"); +} + +void IMU_interrupt_handler_task_install(void) +{ + static k_tid_t id; + static struct k_thread data; + + id = k_thread_create (&data, + _imu_interrrupt_handler_task_stack, + IMU_INTERRUPT_HANDLER_TASK_STACK_SIZE, + _imu_interrupt_handler_task, + NULL, + NULL, + NULL, + IMU_INTERRUPT_HANDLER_THREAD_PRIORITY, + 0, + K_NO_WAIT); + k_thread_name_set(&data, "IMU_interrupt_handler_task"); +} + +void IMU_cli_cmd (int32_t argc, char **argv) +{ + ERRNO_e err; + + if (argc == 1) { + if (!strcmp (argv[0], "--reset")) { + PRINT (INFO, "Ret code : %d\r\n", IMU_reset ()); + } + else if (!strcmp (argv[0], "-i") || !strcmp (argv[0], "--init")) { + PRINT (INFO, "Ret code : %d\r\n", IMU_init ()); + } + else if (!strcmp (argv[0], "-t") || !strcmp (argv[0], "--temp")) { + float celsius; + + err = IMU_temp_c_read (&celsius); + PRINT (INFO, "Ret code : %d\r\n", err); + + if (err) + { + return; + } + + PRINT (INFO, "Celsius : %.3f\r\n", (double)celsius); + PRINT (INFO, "Fahrenheit : %.3f\r\n", (((double)celsius * 9.0) / 5.0 + 32.0)); + } else if (!strcmp (argv[0], "-ds") || !strcmp (argv[0], "--dumpstatistic")) { + + _imu_statistic_dump = true; + + } else if (!strcmp (argv[0], "-r") || !strcmp (argv[0], "--read")) { + IMU_data_s xl; + IMU_data_s gyro; + + err = (IMU_xl_read (&xl) | IMU_gyro_read (&gyro)); + PRINT (INFO, "Ret code : %d\r\n", err); + + if (err) { + return; + } + else { + PRINT (INFO, "Accel X : %f\r\n", (double) xl.x); + PRINT (INFO, " Y : %f\r\n", (double) xl.y); + PRINT (INFO, " Z : %f\r\n", (double) xl.z); + PRINT (INFO, "Gyro X : %f\r\n", (double) gyro.x); + PRINT (INFO, " Y : %f\r\n", (double) gyro.y); + PRINT (INFO, " Z : %f\r\n", (double) gyro.z); + } + } else if (!strcmp (argv[0], "-rr") || !strcmp (argv[0], "--readraw")) { + int16_t xl_x, xl_y, xl_z; + int16_t gyro_x, gyro_y, gyro_z; + IMU_data_s xl; + IMU_data_s gyro; + err = (IMU_xl_raw_x_read (&xl_x) | IMU_xl_raw_y_read (&xl_y) | IMU_xl_raw_z_read (&xl_z) | IMU_gyro_raw_x_read (&gyro_x) | IMU_gyro_raw_y_read (&gyro_y) | IMU_gyro_raw_z_read (&gyro_z)); + xl.x = _imu_xl_raw_to_float(xl_x); + xl.y = _imu_xl_raw_to_float(xl_y); + xl.z = _imu_xl_raw_to_float(xl_z); + gyro.x = _imu_gyro_raw_to_float(gyro_x); + gyro.y = _imu_gyro_raw_to_float(gyro_y); + gyro.z = _imu_gyro_raw_to_float(gyro_z); + PRINT (INFO, "Ret code : %d\r\n", err); + + if (err) { + return; + } + else { + PRINT(INFO, "Accel X : %d\r\n", (int) xl_x); + PRINT(INFO, " Y : %d\r\n", (int) xl_y); + PRINT(INFO, " Z : %d\r\n", (int) xl_z); + //PRINT(INFO, "Gyro X : %d\r\n", (int) gyro_x); + //PRINT(INFO, " Y : %d\r\n", (int) gyro_y); + //PRINT(INFO, " Z : %d\r\n", (int) gyro_z); + //PRINT(INFO, "Accel X : %f\r\n", (double) xl.x); + //PRINT(INFO, " Y : %f\r\n", (double) xl.y); + //PRINT(INFO, " Z : %f\r\n", (double) xl.z); + //PRINT(INFO, "Gyro X : %f\r\n", (double) gyro.x); + //PRINT(INFO, " Y : %f\r\n", (double) gyro.y); + //PRINT(INFO, " Z : %f\r\n", (double) gyro.z); + } + } else if (!strcmp (argv[0], "-rxlsr") || !strcmp (argv[0], "--readxlsamplerate")) { + LSM6DS3TR_C_ODR_XL_e value; + float sample_rate = 0; + IMU_get_odr_xl(&value); + switch (value) { + case LSM6DS3TR_C_ODR_XL_POWER_DOWN: sample_rate = 0; break; + case LSM6DS3TR_C_ODR_XL_12_5Hz: sample_rate = 12.5; break; + case LSM6DS3TR_C_ODR_XL_26Hz: sample_rate = 26; break; + case LSM6DS3TR_C_ODR_XL_52Hz: sample_rate = 52; break; + case LSM6DS3TR_C_ODR_XL_104Hz: sample_rate = 104; break; + case LSM6DS3TR_C_ODR_XL_208Hz: sample_rate = 208; break; + case LSM6DS3TR_C_ODR_XL_416Hz: sample_rate = 416; break; + case LSM6DS3TR_C_ODR_XL_833Hz: sample_rate = 833; break; + case LSM6DS3TR_C_ODR_XL_1666Hz: sample_rate = 1666; break; + case LSM6DS3TR_C_ODR_XL_3332Hz: sample_rate = 3332; break; + case LSM6DS3TR_C_ODR_XL_6664Hz: sample_rate = 6664; break; + case LSM6DS3TR_C_ODR_XL_1_6Hz: sample_rate = 1.6; break; + } + PRINT(INFO, "Accelerometer Sample rate : %.1fHz\r\n", (double)sample_rate); + } else if (!strcmp (argv[0], "-rxlr") || !strcmp (argv[0], "--readxlrange")) { + LSM6DS3TR_C_FS_XL_e value; + uint8_t range = 0; + IMU_get_fs_xl(&value); + switch (value) { + case LSM6DS3TR_C_FS_XL_2g: range = 2; break; + case LSM6DS3TR_C_FS_XL_4g: range = 4; break; + case LSM6DS3TR_C_FS_XL_8g: range = 8; break; + case LSM6DS3TR_C_FS_XL_16g: range = 16; break; + } + PRINT(INFO, "Accelerometer range : %d g\r\n", range); + } else if (!strcmp (argv[0], "-rgsr") || !strcmp (argv[0], "--readgyrosamplerate")) { + LSM6DS3TR_C_ODR_G_e value; + float sample_rate = 0; + IMU_get_odr_g(&value); + switch (value) { + case LSM6DS3TR_C_ODR_G_POWER_DOWN: sample_rate = 0; break; + case LSM6DS3TR_C_ODR_G_12_5Hz: sample_rate = 12.5; break; + case LSM6DS3TR_C_ODR_G_26Hz: sample_rate = 26; break; + case LSM6DS3TR_C_ODR_G_52Hz: sample_rate = 52; break; + case LSM6DS3TR_C_ODR_G_104Hz: sample_rate = 104; break; + case LSM6DS3TR_C_ODR_G_208Hz: sample_rate = 208; break; + case LSM6DS3TR_C_ODR_G_416Hz: sample_rate = 416; break; + case LSM6DS3TR_C_ODR_G_833Hz: sample_rate = 833; break; + case LSM6DS3TR_C_ODR_G_1666Hz: sample_rate = 1666; break; + case LSM6DS3TR_C_ODR_G_3332Hz: sample_rate = 3332; break; + case LSM6DS3TR_C_ODR_G_6664Hz: sample_rate = 6664; break; + } + PRINT(INFO, "Gyro Sample rate : %.1fHz\r\n", (double)sample_rate); + } else if (!strcmp (argv[0], "-rgr") || !strcmp (argv[0], "--readgyrorange")) { + LSM6DS3TR_C_FS_G_ABSTR_e value; + uint16_t range = 0; + IMU_get_fs_g(&value); + switch (value) { + case LSM6DS3TR_C_FS_G_ABSTR_125dps: range = 125; break; + case LSM6DS3TR_C_FS_G_ABSTR_250dps: range = 250; break; + case LSM6DS3TR_C_FS_G_ABSTR_500dps: range = 500; break; + case LSM6DS3TR_C_FS_G_ABSTR_1000dps: range = 1000; break; + case LSM6DS3TR_C_FS_G_ABSTR_2000dps: range = 2000; break; + } + PRINT(INFO, "Gyro range : %d dps\r\n", range); + } else if (!strcmp (argv[0], "-rs") || !strcmp (argv[0], "--readshock")) { + LSM6DS3TR_C_SHOCK_e value; + const char *shock = "UNKNOWN"; + ERRNO_e err = IMU_get_shock(&value); + + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to read shock setting: %d\r\n", err); + return; + } + + switch (value) { + case LSM6DS3TR_C_SHOCK_4_OVER_ODR_XL: shock = "4/ODR_XL"; break; + case LSM6DS3TR_C_SHOCK_8_OVER_ODR_XL: shock = "8/ODR_XL"; break; + case LSM6DS3TR_C_SHOCK_16_OVER_ODR_XL: shock = "16/ODR_XL"; break; + case LSM6DS3TR_C_SHOCK_24_OVER_ODR_XL: shock = "24/ODR_XL"; break; + } + PRINT(INFO, "Tap shock duration: %s\r\n", shock); + } else if (!strcmp (argv[0], "-rq") || !strcmp (argv[0], "--readquiet")) { + LSM6DS3TR_C_QUIET_e value; + const char *quiet = "UNKNOWN"; + ERRNO_e err = IMU_get_quiet(&value); + + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to read quiet setting: %d\r\n", err); + return; + } + + switch (value) { + case LSM6DS3TR_C_QUIET_2_OVER_ODR_XL: quiet = "2/ODR_XL"; break; + case LSM6DS3TR_C_QUIET_4_OVER_ODR_XL: quiet = "4/ODR_XL"; break; + case LSM6DS3TR_C_QUIET_8_OVER_ODR_XL: quiet = "8/ODR_XL"; break; + case LSM6DS3TR_C_QUIET_12_OVER_ODR_XL: quiet = "16/ODR_XL"; break; + } + PRINT(INFO, "Tap quiet duration: %s\r\n", quiet); + } else if (!strcmp (argv[0], "-rths") || !strcmp (argv[0], "--readtapthreshold")) { + uint8_t value; + LSM6DS3TR_C_FS_XL_e range; + uint8_t fs_xl_g; + ERRNO_e err = IMU_get_tap_ths(&value); + + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to read tap threshold setting: %d\r\n", err); + return; + } + + err = IMU_get_fs_xl(&range); + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to read accelerometer range setting: %d\r\n", err); + return; + } + + switch (range) { + case LSM6DS3TR_C_FS_XL_2g: fs_xl_g = 2; break; + case LSM6DS3TR_C_FS_XL_4g: fs_xl_g = 4; break; + case LSM6DS3TR_C_FS_XL_8g: fs_xl_g = 8; break; + case LSM6DS3TR_C_FS_XL_16g: fs_xl_g = 16; break; + } + PRINT(INFO, "Tap threshold: %d, %f g\r\n", value, (float) (value * fs_xl_g/32.0f)); + } else if (!strcmp (argv[0], "-rws") || !strcmp (argv[0], "--readwakeupsrc")) { + uint8_t value; + + ERRNO_e err = I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_WAKE_UP_SRC, &value, 1); + + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to read wakeup src reg: %d\r\n", err); + return; + } + + PRINT(INFO, "Wakeup src reg value: %d\r\n", value); + + } else if (!strcmp (argv[0], "-ri") || !strcmp (argv[0], "--readint1cfg")) { + uint8_t value; + + ERRNO_e err = I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_INT1_CTRL, &value, 1); + + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to read int1 ctrl reg: %d\r\n", err); + return; + } + + PRINT(INFO, "Int1 ctrl reg value: 0x%02X\r\n", value); + + } else if (!strcmp (argv[0], "-rmd") || !strcmp (argv[0], "--readmd1cfg")) { + uint8_t value; + + ERRNO_e err = I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_MD1_CFG, &value, 1); + + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to read md1 cfg reg: %d\r\n", err); + return; + } + + PRINT(INFO, "MD1 cfg reg value: 0x%02X\r\n", value); + + } else if (!strcmp (argv[0], "-stc") || !strcmp (argv[0], "--settapconfig")) { + ERRNO_e err = IMU_set_interrupts_enable(LSM6DS3TR_C_INTERRUPTS_ENABLE); + + if (err != ERRNO_SUCCESS) { + PRINT(ERROR, "Failed to set tap config reg: %d\r\n", err); + return; + } + } else { + goto USAGE; + } + } + else if (argc == 2) + { + if (!strcmp (argv[0], "-ftr") || !strcmp (argv[0], "--fifothresholdread")) + { + + _imu_cfg.field_v.fifo_threshold_v = (uint16_t)strtoul (argv[1], NULL, 0); + if (_imu_cfg.field_v.fifo_threshold_v <= 2047 && _imu_cfg.field_v.fifo_threshold_v >= 0) { + PRINT (INFO, "Ret code : %d\r\n", IMU_fifo_th_set(_imu_cfg.field_v.fifo_threshold_v)); + } + else { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-d") || !strcmp (argv[0], "--dump")) + { + _imu_data_dump_time_ms = strtoul (argv[1], NULL, 0); + + _imu_data_dump = true; + + PRINT (INFO, "//Dumping IMU data for %d milliseconds...\r\n//ACCEL.x,ACCEL.y,ACCEL.z,GYRO.x,GYRO.y,GYRO.z\r\n", _imu_data_dump_time_ms); + } + else if (!strcmp (argv[0], "-ge") || !strcmp (argv[0], "--gyroenable")) + { + if (!strcmp (argv[1], "true")) + { + PRINT (INFO, "Ret code : %d\r\n", IMU_gyro_enable (true)); + } + else if (!strcmp (argv[1], "false")) + { + PRINT (INFO, "Ret code : %d\r\n", IMU_gyro_enable (false)); + } + else + { + goto USAGE; + } + } + else if (!strcmp(argv[0], "-gr") || !strcmp(argv[0], "--gyrorange")) + { + LSM6DS3TR_C_FS_G_ABSTR_e value; + uint16_t range = (uint16_t) strtoul(argv[1], NULL, 0); + switch (range) { + case 125: value = LSM6DS3TR_C_FS_G_ABSTR_125dps; break; + case 250: value = LSM6DS3TR_C_FS_G_ABSTR_250dps; break; + case 500: value = LSM6DS3TR_C_FS_G_ABSTR_500dps; break; + case 1000: value = LSM6DS3TR_C_FS_G_ABSTR_1000dps; break; + case 2000: value = LSM6DS3TR_C_FS_G_ABSTR_2000dps; break; + default: goto USAGE; + } + + PRINT(INFO, "Ret code : %d\r\n", IMU_set_fs_g(value)); + } + else if (!strcmp(argv[0], "-gsr") || !strcmp(argv[0], "--gyrosamplerate")) + { + LSM6DS3TR_C_ODR_G_e value; + uint16_t sample_rate = (uint16_t) strtoul(argv[1], NULL, 0); + switch (sample_rate) { + case 13: value = LSM6DS3TR_C_ODR_G_12_5Hz; break; + case 26: value = LSM6DS3TR_C_ODR_G_26Hz; break; + case 52: value = LSM6DS3TR_C_ODR_G_52Hz; break; + case 104: value = LSM6DS3TR_C_ODR_G_104Hz; break; + case 208: value = LSM6DS3TR_C_ODR_G_208Hz; break; + case 416: value = LSM6DS3TR_C_ODR_G_416Hz; break; + case 833: value = LSM6DS3TR_C_ODR_G_833Hz; break; + case 1666: value = LSM6DS3TR_C_ODR_G_1666Hz; break; + case 3332: value = LSM6DS3TR_C_ODR_G_3332Hz; break; + case 6664: value = LSM6DS3TR_C_ODR_G_6664Hz; break; + default: goto USAGE; + } + PRINT (INFO, "Ret code : %d\r\n", IMU_set_odr_g(value)); + } + else if (!strcmp (argv[0], "-gle") || !strcmp (argv[0], "--gyrolowpassen")) + { + if (!strcmp (argv[1], "true")) + { + PRINT (INFO, "Ret code : %d\r\n", IMU_set_lpf1_sel_g(LSM6DS3TR_C_LPF1_SEL_G_ENABLE)); + } + else if (!strcmp (argv[1], "false")) + { + PRINT (INFO, "Ret code : %d\r\n", IMU_set_lpf1_sel_g(LSM6DS3TR_C_LPF1_SEL_G_DISABLE)); + } + else + { + goto USAGE; + } + } + else if (!strcmp (argv[0], "-glb") || !strcmp (argv[0], "--gyrolowband")) + { + LSM6DS3TR_C_FTYPE_e bandwidth = (LSM6DS3TR_C_FTYPE_e) strtoul (argv[1], NULL, 0); + switch (bandwidth) { + case LSM6DS3TR_C_FTYPE_0: break; + case LSM6DS3TR_C_FTYPE_1: break; + case LSM6DS3TR_C_FTYPE_2: break; + case LSM6DS3TR_C_FTYPE_3: break; + default: goto USAGE; + } + PRINT (INFO, "Ret code : %d\r\n", IMU_set_ftype(bandwidth)); + } + else if (!strcmp (argv[0], "-xe") || !strcmp (argv[0], "--xlenable")) + { + if (!strcmp (argv[1], "true")) + { + PRINT (INFO, "Ret code : %d\r\n", IMU_xl_enable(true)); + } + else if (!strcmp (argv[1], "false")) + { + PRINT (INFO, "Ret code : %d\r\n", IMU_xl_enable(false)); + } + else + { + goto USAGE; + } + } + else if (!strcmp(argv[0], "-xr") || !strcmp(argv[0], "--xlrange")) + { + LSM6DS3TR_C_FS_G_e value; + uint8_t range = (uint8_t) strtoul(argv[1], NULL, 0); + switch (range) { + case 2: value = LSM6DS3TR_C_FS_XL_2g; break; + case 4: value = LSM6DS3TR_C_FS_XL_4g; break; + case 8: value = LSM6DS3TR_C_FS_XL_8g; break; + case 16: value = LSM6DS3TR_C_FS_XL_16g; break; + default: goto USAGE; + } + + PRINT(INFO, "Ret code : %d\r\n", IMU_set_fs_xl(value)); + } + else if (!strcmp(argv[0], "-xsr") || !strcmp(argv[0], "--xlsamplerate")) + { + LSM6DS3TR_C_ODR_XL_e value; + uint16_t sample_rate = (uint16_t) strtoul(argv[1], NULL, 0); + switch (sample_rate) { + case 13: value = LSM6DS3TR_C_ODR_G_12_5Hz; break; + case 26: value = LSM6DS3TR_C_ODR_G_26Hz; break; + case 52: value = LSM6DS3TR_C_ODR_G_52Hz; break; + case 104: value = LSM6DS3TR_C_ODR_G_104Hz; break; + case 208: value = LSM6DS3TR_C_ODR_G_208Hz; break; + case 416: value = LSM6DS3TR_C_ODR_G_416Hz; break; + case 833: value = LSM6DS3TR_C_ODR_G_833Hz; break; + case 1666: value = LSM6DS3TR_C_ODR_G_1666Hz; break; + case 3332: value = LSM6DS3TR_C_ODR_G_3332Hz; break; + case 6664: value = LSM6DS3TR_C_ODR_G_6664Hz; break; + case 2: value = LSM6DS3TR_C_ODR_XL_1_6Hz; break; + default: goto USAGE; + } + PRINT(INFO, "Ret code : %d\r\n", IMU_set_odr_xl(value)); + } + else if (!strcmp(argv[0], "-xlpf1b") || !strcmp(argv[0], "--xlow1band")) + { + LSM6DS3TR_C_LPF1_BW_SEL_e bandwidth = (LSM6DS3TR_C_FTYPE_e) strtoul(argv[1], NULL, 0); + switch (bandwidth) { + case LSM6DS3TR_C_LPF1_BW_SEL_ODR_DIV_2: break; + case LSM6DS3TR_C_LPF1_BW_SEL_ODR_DIV_4: break; + default: goto USAGE; + } + PRINT(INFO, "Ret code : %d\r\n", IMU_set_lpf1_bw_sel(bandwidth)); + } + else if (!strcmp (argv[0], "-gfd") || !strcmp (argv[0], "--gyrofifodecimate")) + { + LSM6DS3TR_C_DEC_FIFO_GYRO_e value; + uint8_t factor = (uint8_t) strtoul(argv[1], NULL, 0); + switch (factor) { + case 0: value = LSM6DS3TR_C_DEC_FIFO_GYRO_DATA_NOT_IN_FIFO; break; + case 1: value = LSM6DS3TR_C_DEC_FIFO_GYRO_NO_DECIMATION; break; + case 2: value = LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_2; break; + case 3: value = LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_3; break; + case 4: value = LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_4; break; + case 5: value = LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_8; break; + case 6: value = LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_16; break; + case 7: value = LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_32; break; + default: goto USAGE; + } + PRINT (INFO, "Ret code : %d\r\n", IMU_set_dec_fifo_gyro(value)); + } + else if (!strcmp (argv[0], "-xfd") || !strcmp (argv[0], "--xlfifodecimate")) + { + LSM6DS3TR_C_DEC_FIFO_XL_e value; + uint8_t factor = (uint8_t) strtoul(argv[1], NULL, 0); + switch (factor) { + case 0: value = LSM6DS3TR_C_DEC_FIFO_XL_DATA_NOT_IN_FIFO; break; + case 1: value = LSM6DS3TR_C_DEC_FIFO_XL_NO_DECIMATION; break; + case 2: value = LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_2; break; + case 3: value = LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_3; break; + case 4: value = LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_4; break; + case 5: value = LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_8; break; + case 6: value = LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_16; break; + case 7: value = LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_32; break; + default: goto USAGE; + } + PRINT (INFO, "Ret code : %d\r\n", IMU_set_dec_fifo_xl(value)); + } + else + { + goto USAGE; + } + } + else if (argc == 3) + { + if (!strcmp (argv[0], "-d") || !strcmp (argv[0], "--dump")) + { + _imu_data_dump_time_ms = strtoul (argv[1], NULL, 0); + + if (!strcmp (argv[2], "hex")) + { + _imu_data_dump_hex = true; + } + _imu_data_dump = true; + + PRINT (INFO, "//Dumping IMU data for %d milliseconds...\r\n//ACCEL.x,ACCEL.y,ACCEL.z,GYRO.x,GYRO.y,GYRO.z\r\n", _imu_data_dump_time_ms); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: imu [OPTION...]\r\n"); + PRINT (INFO, " --reset Resets LSM6DS3 IMU\r\n"); + PRINT (INFO, " -i | --init Initializes LSM6DS3 IMU\r\n"); + PRINT (INFO, " -t | --temp Gets the IMU temperature\r\n"); + PRINT (INFO, " -r | --read Reads IMU measurement\r\n"); + PRINT (INFO, " -lp | --sleep Puts the IMU to sleep\r\n"); + PRINT (INFO, " -ftr | ----fifothresholdread Read fifo when threshold reached \r\n"); + PRINT (INFO, " <%%d> threshold level 1 - 2023, 0 to stop fifo\r\n"); + PRINT (INFO, " -d | --dump Dumps IMU raw data\r\n"); + PRINT (INFO, " <%%d> number of milliseconds to dump for\r\n"); + PRINT (INFO, " hex [optional] dumps data in hexadecimal format\r\n"); + PRINT (INFO, " -ge | --gyroenable Enables / Disables gyroscope\r\n"); + PRINT (INFO, " <%%s> true - enable , false - disable\r\n"); + PRINT (INFO, " -gr | --gyrorange Max deg/s\r\n"); + PRINT (INFO, " <%%d> [125, 245, 500, 1000, 2000]\r\n"); + PRINT (INFO, " -gsr | --gyrosamplerate Gyroscope sample rate (Hz)\r\n"); + PRINT (INFO, " <%%d> [13, 26, 52, 104, 208, 416, 833, 1666, 3332, 6664]\r\n"); + PRINT (INFO, " -gle | --gyrolowpassen Enables / Disables gyroscope lowpass filter\r\n"); + PRINT (INFO, " <%%s> true - enable , false - disable\r\n"); + PRINT (INFO, " -glb | --gyrolowband Gyroscope lowpass bandwidth select\r\n"); + PRINT (INFO, " <%%d> [0, 1, 2, 3] (see table 68 for detailed bandwidth selecton)\r\n"); + PRINT (INFO, " -xe | --xlenable Enables / Disables accelerometer\r\n"); + PRINT (INFO, " <%%s> true - enable , false - disable\r\n"); + PRINT (INFO, " -xr | --xlrange Max G force\r\n"); + PRINT (INFO, " <%%d> [2, 4, 8, 16]\r\n"); + PRINT (INFO, " -xsr | --xlsamplerate Accelerometer sample rate (Hz)\r\n"); + PRINT (INFO, " <%%d> [13, 26, 52, 104, 208, 416, 833, 1666, 3332, 6664, 2]\r\n"); + PRINT (INFO, " -xlpf1b | --xlow1band Accelerometer lpf1 bandwidth\r\n"); + PRINT (INFO, " <%%d> [0 - odr/2, 1 - odr/4]\r\n"); + PRINT (INFO, " -gfd | --gyrofifodecimate Fifo decimation\r\n"); + PRINT (INFO, " <%%d> [0 - disable, 1, 2, 3, 4, 5 - 8, 6 - 16, 7 - 32]\r\n"); + PRINT (INFO, " -xfd | --xlfifodecimate Fifo decimation\r\n"); + PRINT (INFO, " <%%d> [0 - disable, 1, 2, 3, 4, 5 - 8, 6 - 16, 7 - 32]\r\n"); + } +} + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIOPNS + *------------------------------------------------------------------------------------------------*/ +static void _imu_task(void *p1, void *p2, void *p3) +{ + while (1) { + DBG_STAT_INC(imu_task_counter); + + DBG_STAT_INC_IF(i2c_transfer_active,imu_task_during_i2c_counter); + + if (_imu_statistic_dump) + { + PRINT (INFO, "//Dumping statistic data... \r\n"); + _imu_statistic_dump = false; + + /* get a copy of statistic data */ + #ifdef CONFIG_DBG_STATS + atomic_val_t interrupt_ctr = atomic_get(&_interrupt_count); + k_mutex_lock(&stat_mutex, K_FOREVER); + uint32_t _fifo_read_task_counter = fifo_read_task_counter; + uint32_t _read_shot_data_counter = read_shot_data_counter; + uint32_t _read_into_dummy_counter = read_into_dummy_counter; + uint32_t _fifo_read_FTH_counter = fifo_read_FTH_counter; + uint32_t _read_shot_data_after_fifo_read_counter = read_shot_data_after_fifo_read_counter; + uint32_t _fifo_waterM_total_hit_counter = fifo_waterM_total_hit_counter; + uint32_t _fifo_waterM_hit_counter = fifo_waterM_hit_counter; + uint32_t _fifo_overrun_counter = fifo_overrun_counter; + uint32_t _unread_words_before_read = unread_words_before_read; + uint32_t _unread_words_after_read = unread_words_after_read; + uint32_t _max_unread_words_before_read = max_unread_words_before_read; + uint32_t _max_unread_words_after_read = max_unread_words_after_read; + k_mutex_unlock(&stat_mutex); + #endif + + k_mutex_lock(&shot_data_mutex, K_FOREVER); + bool _marked = shot_data.marked; + bool _ready = shot_data.ready; + bool _saved = shot_data.saved; + k_mutex_unlock(&shot_data_mutex); + + #ifdef CONFIG_DBG_STATS + PRINT(INFO, "fth interrupt is hit %u times !\r\n", interrupt_ctr); + PRINT(INFO, "shot capture task has run %u times !\r\n", _fifo_read_task_counter); + PRINT(INFO, "shot data is read into ring buffer %u times !\r\n", _read_shot_data_counter); + PRINT(INFO, "fifo watermark full is totally hit %u times !\r\n", _fifo_waterM_total_hit_counter); + PRINT(INFO, "fifo watermark full is truely hit %u times !\r\n", _fifo_waterM_hit_counter); + PRINT(INFO, "fifo overrun is hit %u times !\r\n", _fifo_overrun_counter); + PRINT(INFO, "fifo data is read into dummy buffer for %u times !\r\n", _read_into_dummy_counter); + PRINT(INFO, "fifo FTH data is read into ring buffer %u times!\r\n", _fifo_read_FTH_counter); + PRINT(INFO, "shot data is read after fifo FTH read %u times !\r\n", _read_shot_data_after_fifo_read_counter); + PRINT(INFO, "last unread words before i2c read is %u !\r\n", _unread_words_before_read); + PRINT(INFO, "last unread words after i2c read is %u !\r\n", _unread_words_after_read); + PRINT(INFO, "maximum unread words before i2c read %u times !\r\n", _max_unread_words_before_read); + PRINT(INFO, "maximum unread words after i2c read %u times !\r\n\r\n", _max_unread_words_after_read); + PRINT(INFO, "_imu_task running during I2C transfer: %u times!\r\n", imu_task_during_i2c_counter); + PRINT(INFO, "_imu_task running: %u times!\r\n\r\n", imu_task_counter); + PRINT(INFO, "_fsm_task running during I2C transfer: %u times!\r\n", fsm_task_during_i2c_counter); + PRINT(INFO, "_fsm_task running: %u times!\r\n\r\n", fsm_task_counter); + PRINT(INFO, "_event_task running during I2C transfer: %u times!\r\n", event_task_during_i2c_counter); + PRINT(INFO, "_event_task running: %u times!\r\n\r\n", event_task_counter); + #endif + + if (_marked){ + PRINT(INFO, "shot data is marked!\r\n"); + } else { + PRINT(INFO, "shot data is not marked!\r\n"); + } + if (_ready) { + PRINT(INFO, "shot data is ready!\r\n"); + } else { + PRINT(INFO, "shot data is not ready!\r\n"); + } + if (_saved) { + PRINT(INFO, "shot data is saved!\r\n"); + } else { + PRINT(INFO, "shot data is not saved!\r\n"); + } + + // PRINT (INFO, "_imu_task running: %u times !\r\n", imu_task_counter); + // PRINT (INFO, "_imu_task running during busy wait: %u times!\r\n\r\n", imu_task_during_busy_wait_counter); + // PRINT (INFO, "_interface_task running: %u times!\r\n", _interface_task_counter); + // PRINT (INFO, "_interface_task running during I2C transfer: %u times!\r\n\r\n", _interface_task_during_i2c_counter); + } + + switch (_imu_int_source) + { + case IMU_INT_SOURCE_WAKEUP: + if (_imu_wakeup_cb != NULL) + { + _imu_wakeup_cb (); + } + break; + + default: + } + + /* Clear interrupt source. */ + _imu_int_source = IMU_INT_SOURCE_NONE; + + if (_imu_data_dump) + { + static uint32_t timer_cnt = IMU_TASK_PERIOD_MS; + int16_t xlx, xly, xlz; + int16_t gyx, gyy, gyz; + + (void) IMU_xl_raw_x_read (&xlx); + (void) IMU_xl_raw_y_read (&xly); + (void) IMU_xl_raw_z_read (&xlz); + (void) IMU_gyro_raw_x_read (&gyx); + (void) IMU_gyro_raw_y_read (&gyy); + (void) IMU_gyro_raw_z_read (&gyz); + + if (_imu_data_dump_hex) + { + PRINT(INFO, "%X,%X,%X,%X,%X,%X\r\n", xlx, xly, xlz, gyx, gyy, gyz); + } + else + { + PRINT(INFO, "%d,%d,%d,%d,%d,%d\r\n", xlx, xly, xlz, gyx, gyy, gyz); + } + + if (timer_cnt >= _imu_data_dump_time_ms) + { + /* Reset timer counter. */ + timer_cnt = 0; + + /* Clear dump flag. */ + _imu_data_dump = false; + + /* Clear hex flag. */ + _imu_data_dump_hex = false; + } + else + { + timer_cnt += IMU_TASK_PERIOD_MS; + } + } + + k_msleep(IMU_TASK_PERIOD_MS); + } +} + +static void _imu_interrupt_handler_task(void *p1, void *p2, void *p3) +{ + uint8_t reg; + + while (1) { + k_sem_take(&_imu_int_sem, K_FOREVER); + + if (atomic_test_bit(&_imu_cfg.interrupt_mode_flags, IMU_int_wake_up_mode)) { + if (I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_WAKE_UP_SRC, ®, 1)) { + PRINT (ERROR, "i2c read fifo status regs failed in isr!\r\n"); + } + if (reg & 0x08) { + /* FSM wakes up from idle disable IMU motion wake up function until fsm goes to idle again */ + MOTION_detected_flag_set(); + IMU_motion_int_enable(false, 0x2, 0x1); + } + } + + if (atomic_test_bit(&_imu_cfg.interrupt_mode_flags, IMU_int_shot_capture_mode)) { + k_sem_give(&shot_capture_sem); + } + } +} + +static ERRNO_e _imu_who_am_i(void) +{ + ERRNO_e err; + uint8_t result; + + err = I2C_bytes_read(I2C_CH_1, LSM6DS3_I2C_DEV_ADDR, LSM6DS3TR_C_WHO_AM_I_REG, &result, 1); + if (err != ERRNO_SUCCESS) { + return ERRNO_ID_FAILURE; + } + + /* Setup the internal temperature sensor. */ + if (_imu_cfg.temp_enabled == 1) { + /* 0x69 = LSM6DS3TR */ + if (result == LSM6DS3TR_WHO_AM_I) { + /* Sensitivity to scale 16 */ + _imu_cfg.temp_sensitivity = 16; + } + /* 0x6A = LSM6DS3TR-C */ + else if (result == LSM6DS3TR_C_WHO_AM_I) { + /* Sensitivity to scale 256 */ + _imu_cfg.temp_sensitivity = 256; + } + } + + return err; +} + +static ERRNO_e _imu_cfg_init(void) +{ + ERRNO_e err; + /* Gyroscope */ + err = IMU_set_fs_g(_imu_field_v_default.fs_g_v); + if (err == ERRNO_SUCCESS) { + err = IMU_set_odr_g(_imu_field_v_default.odr_g_v); + } + if (err == ERRNO_SUCCESS) { + err = IMU_set_hp_en_g(_imu_field_v_default.hp_en_g_v); + } + if (err == ERRNO_SUCCESS) { + err = IMU_set_hpm_g(_imu_field_v_default.hpm_g_v); + } + if (err == ERRNO_SUCCESS) { + err = IMU_set_lpf1_sel_g(_imu_field_v_default.lpf1_sel_g_v); + } + if (err == ERRNO_SUCCESS) { + err = IMU_set_ftype(_imu_field_v_default.ftype_v); + } + + /* Accelerometer */ + if (err == ERRNO_SUCCESS) { + err = IMU_set_fs_xl(_imu_field_v_default.fs_xl_v); + } + if (err == ERRNO_SUCCESS) { + err = IMU_set_odr_xl(_imu_field_v_default.odr_xl_v); + } + if (err == ERRNO_SUCCESS) { + err = IMU_set_lpf1_bw_sel(_imu_field_v_default.lpf1_bw_sel_v); + } + if (err == ERRNO_SUCCESS) { + err = IMU_set_lpf2_xl_en(_imu_field_v_default.lpf2_xl_en_v); + } + if (err == ERRNO_SUCCESS) { + err = IMU_set_hp_slope_xl_en(_imu_field_v_default.hp_slope_xl_en_v); + } + if (err == ERRNO_SUCCESS) { + err = IMU_set_hpcf_xl(_imu_field_v_default.hpcf_xl_v); + } + if (err == ERRNO_SUCCESS) { + err = IMU_set_input_composite(_imu_field_v_default.input_composite_v); + } + + /* wakeup function */ + /* set the wake up threshold to be 2 so noise does not + * trigger the interrupt + */ + if (err == ERRNO_SUCCESS) { + err = IMU_set_wk_ths(_imu_field_v_default.wk_ths_v); + } + + + return err; +} + +static float _imu_xl_raw_to_float(int16_t raw) +{ + uint8_t factor; + switch (_imu_cfg.field_v.fs_xl_v) { + case LSM6DS3TR_C_FS_XL_2g: factor = 1; break; + case LSM6DS3TR_C_FS_XL_4g: factor = 2; break; + case LSM6DS3TR_C_FS_XL_8g: factor = 4; break; + case LSM6DS3TR_C_FS_XL_16g: factor = 8; break; + default: factor = 1; + } + + return (float) raw * (float)0.061 * factor / 1000; +} + +static float _imu_gyro_raw_to_float (int16_t raw) +{ + uint8_t factor; + switch (_imu_cfg.field_v.fs_g_v) { + case LSM6DS3TR_C_FS_G_ABSTR_125dps: factor = 1; break; + case LSM6DS3TR_C_FS_G_ABSTR_250dps: factor = 2; break; + case LSM6DS3TR_C_FS_G_ABSTR_500dps: factor = 4; break; + case LSM6DS3TR_C_FS_G_ABSTR_1000dps: factor = 8; break; + case LSM6DS3TR_C_FS_G_ABSTR_2000dps: factor = 16; break; + default: factor = 1; + } + + return (float) raw * (float)4.375 * (factor) / 1000; +} + +static void _imu_isr(void) +{ + atomic_inc(&_interrupt_count); + + /* Signal IMU I2C fifo read thread to read IMU data via DMA */ + k_sem_give(&_imu_int_sem); +} diff --git a/src/bsp/imu.h b/src/bsp/imu.h new file mode 100644 index 0000000..34dec90 --- /dev/null +++ b/src/bsp/imu.h @@ -0,0 +1,202 @@ +/** + * @file imu.h + * @brief LSM6DS3TR-C IMU module + * @author Kenny Tran + * @date Feb 28 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef IMU_H_ +#define IMU_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include + +#include "../bsp/imu_reg.h" + +#include "../lib/errno.h" + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define IMU_TASK_PERIOD_MS (100) +#define IMU_TASK_STACK_SIZE (1024) +#define IMU_INTERRUPT_HANDLER_TASK_STACK_SIZE (1024) +#define IMU_TASK_THREAD_PRIORITY (9) +#define IMU_INTERRUPT_HANDLER_THREAD_PRIORITY (3) + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum IMU_int_source +{ + IMU_INT_SOURCE_NONE = 0, + IMU_INT_SOURCE_WAKEUP, + + IMU_INT_SOURCE_COUNT +} IMU_int_source_e; + +typedef enum IMU_sensor +{ + IMU_SENSOR_ACCEL = 0, + IMU_SENSOR_GYRO, + IMU_SENSOR_COUNT +} IMU_sensor_e; + +typedef struct IMU_data +{ + float x; + float y; + float z; +} IMU_data_s; + +typedef void (*IMU_cb_t) (void); + +typedef enum IMU_int_mode_flags +{ + IMU_int_shot_capture_mode = 0, // bit 0, set when fifo threshold and single tap detection is rounted to INT1 pin + IMU_int_wake_up_mode, // bit 1, set when wake up event is rounted to INT1 pin +} IMU_int_mode_flags_e; + + +/*-------------------------------------------------------------------------------------------------- + * GLOBAL VARIABLE + *------------------------------------------------------------------------------------------------*/ +extern struct k_sem shot_capture_sem; +extern volatile bool busy_wait_active; +extern volatile uint32_t imu_task_counter; +extern volatile uint32_t _interface_task_counter; +extern volatile uint32_t _interface_task_during_i2c_counter; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e IMU_init (void); +ERRNO_e IMU_int_cb_register (IMU_int_source_e src, IMU_cb_t cb); + +/* Gyro Fields Accessors*/ +ERRNO_e IMU_gyro_enable(bool en); +ERRNO_e IMU_is_gyro_enabled(bool *en); +ERRNO_e IMU_set_fs_g(LSM6DS3TR_C_FS_G_ABSTR_e value); +ERRNO_e IMU_get_fs_g(LSM6DS3TR_C_FS_G_ABSTR_e* value); +ERRNO_e IMU_set_odr_g(LSM6DS3TR_C_ODR_G_e value); +ERRNO_e IMU_get_odr_g(LSM6DS3TR_C_ODR_G_e *value); +ERRNO_e IMU_set_hp_en_g(LSM6DS3TR_C_HP_EN_G_e value); +ERRNO_e IMU_get_hp_en_g(LSM6DS3TR_C_HP_EN_G_e *value); +ERRNO_e IMU_set_hpm_g(LSM6DS3TR_C_HPM_G_e value); +ERRNO_e IMU_get_hpm_g(LSM6DS3TR_C_HPM_G_e *value); +ERRNO_e IMU_set_lpf1_sel_g(LSM6DS3TR_C_LPF1_SEL_G_e value); +ERRNO_e IMU_get_lpf1_sel_g(LSM6DS3TR_C_LPF1_SEL_G_e* value); +ERRNO_e IMU_set_ftype(LSM6DS3TR_C_FTYPE_e value); +ERRNO_e IMU_get_ftype(LSM6DS3TR_C_FTYPE_e *value); + +/* Accelerometer Fields Accessors */ +ERRNO_e IMU_xl_enable (bool en); +ERRNO_e IMU_is_xl_enabled (bool *en); +ERRNO_e IMU_set_fs_xl(LSM6DS3TR_C_FS_XL_e value); +ERRNO_e IMU_get_fs_xl(LSM6DS3TR_C_FS_XL_e *value); +ERRNO_e IMU_set_odr_xl(LSM6DS3TR_C_ODR_XL_e value); +ERRNO_e IMU_get_odr_xl(LSM6DS3TR_C_ODR_XL_e *value); +ERRNO_e IMU_set_lpf1_bw_sel(LSM6DS3TR_C_LPF1_BW_SEL_e value); +ERRNO_e IMU_get_lpf1_bw_sel(LSM6DS3TR_C_LPF1_BW_SEL_e *value); +ERRNO_e IMU_set_lpf2_xl_en(LSM6DS3TR_C_LPF2_XL_EN_e value); +ERRNO_e IMU_get_lpf2_xl_en(LSM6DS3TR_C_LPF2_XL_EN_e *value); +ERRNO_e IMU_set_hp_slope_xl_en(LSM6DS3TR_C_HP_SLOPE_XL_EN_e value); +ERRNO_e IMU_get_hp_slope_xl_en(LSM6DS3TR_C_HP_SLOPE_XL_EN_e *value); +ERRNO_e IMU_set_hpcf_xl(LSM6DS3TR_C_HPCF_XL_e value); +ERRNO_e IMU_get_hpcf_xl(LSM6DS3TR_C_HPCF_XL_e *value); +ERRNO_e IMU_set_input_composite(LSM6DS3TR_C_INPUT_COMPOSITE_e value); +ERRNO_e IMU_get_input_composite(LSM6DS3TR_C_INPUT_COMPOSITE_e *value); + +/* FIFO Fields Accessors*/ +ERRNO_e IMU_set_FTH(uint16_t value); +ERRNO_e IMU_get_FTH(uint16_t *value); +ERRNO_e IMU_set_dec_fifo_gyro(LSM6DS3TR_C_DEC_FIFO_GYRO_e value); +ERRNO_e IMU_get_dec_fifo_gyro(LSM6DS3TR_C_DEC_FIFO_GYRO_e *value); +ERRNO_e IMU_set_dec_fifo_xl(LSM6DS3TR_C_DEC_FIFO_XL_e value); +ERRNO_e IMU_get_dec_fifo_xl(LSM6DS3TR_C_DEC_FIFO_XL_e *value); +ERRNO_e IMU_set_odr_fifo(LSM6DS3TR_C_ODR_FIFO_e value); +ERRNO_e IMU_get_odr_fifo(LSM6DS3TR_C_ODR_FIFO_e *value); +ERRNO_e IMU_set_fifo_mode(LSM6DS3TR_C_FIFO_MODE_e value); +ERRNO_e IMU_get_fifo_mode(LSM6DS3TR_C_FIFO_MODE_e *value); + +/* Other Fields Accessors */ +ERRNO_e IMU_set_int1_fth(LSM6DS3TR_C_INT1_FTH_e value); +ERRNO_e IMU_get_int1_fth(LSM6DS3TR_C_INT1_FTH_e *value); +ERRNO_e IMU_set_bdu(LSM6DS3TR_C_BDU_e value); +ERRNO_e IMU_get_bdu(LSM6DS3TR_C_BDU_e *value); +ERRNO_e IMU_set_interrupts_enable(LSM6DS3TR_C_INTERRUPTS_ENABLE_e value); +ERRNO_e IMU_get_interrupts_enable(LSM6DS3TR_C_INTERRUPTS_ENABLE_e *value); +ERRNO_e IMU_set_tap_x_en(LSM6DS3TR_C_TAP_X_EN_e value); +ERRNO_e IMU_get_tap_x_en(LSM6DS3TR_C_TAP_X_EN_e *value); +ERRNO_e IMU_set_tap_y_en(LSM6DS3TR_C_TAP_Y_EN_e value); +ERRNO_e IMU_get_tap_y_en(LSM6DS3TR_C_TAP_Y_EN_e *value); +ERRNO_e IMU_set_tap_z_en(LSM6DS3TR_C_TAP_Z_EN_e value); +ERRNO_e IMU_get_tap_z_en(LSM6DS3TR_C_TAP_Z_EN_e *value); +ERRNO_e IMU_set_lir(LSM6DS3TR_C_LIR_e value); +ERRNO_e IMU_get_lir(LSM6DS3TR_C_LIR_e *value); +ERRNO_e IMU_set_tap_ths(uint8_t value); +ERRNO_e IMU_get_tap_ths(uint8_t *value); +ERRNO_e IMU_set_quiet(LSM6DS3TR_C_QUIET_e value); +ERRNO_e IMU_get_quiet(LSM6DS3TR_C_QUIET_e *value); +ERRNO_e IMU_set_shock(LSM6DS3TR_C_SHOCK_e value); +ERRNO_e IMU_get_shock(LSM6DS3TR_C_SHOCK_e *value); +ERRNO_e IMU_set_single_double_tap(LSM6DS3TR_C_SINGLE_DOUBLE_TAP_e value); +ERRNO_e IMU_get_single_double_tap(LSM6DS3TR_C_SINGLE_DOUBLE_TAP_e *value); +ERRNO_e IMU_set_wk_ths(uint8_t value); +ERRNO_e IMU_get_wk_ths(uint8_t *value); +ERRNO_e IMU_set_wake_dur(LSM6DS3TR_C_WAKE_DUR_e value); +ERRNO_e IMU_get_wake_dur(LSM6DS3TR_C_WAKE_DUR_e *value); +ERRNO_e IMU_set_int1_single_tap(LSM6DS3TR_C_INT1_SINGLE_TAP_e value); +ERRNO_e IMU_get_int1_single_tap(LSM6DS3TR_C_INT1_SINGLE_TAP_e *value); +ERRNO_e IMU_set_int1_double_tap(LSM6DS3TR_C_INT1_DOUBLE_TAP_e value); +ERRNO_e IMU_get_int1_double_tap(LSM6DS3TR_C_INT1_DOUBLE_TAP_e *value); + +ERRNO_e IMU_temp_raw_read (int16_t *p_dest); +ERRNO_e IMU_temp_c_read (float *p_dest); +ERRNO_e IMU_temp_f_read (float *p_dest); +ERRNO_e IMU_reset (void); +ERRNO_e IMU_xl_raw_x_read (int16_t *p_dest); +ERRNO_e IMU_xl_raw_y_read (int16_t *p_dest); +ERRNO_e IMU_xl_raw_z_read (int16_t *p_dest); +ERRNO_e IMU_xl_x_read (float *p_dest); +ERRNO_e IMU_xl_y_read (float *p_dest); +ERRNO_e IMU_xl_z_read (float *p_dest); +ERRNO_e IMU_xl_read (IMU_data_s *p_dest); +ERRNO_e IMU_gyro_raw_x_read (int16_t *p_dest); +ERRNO_e IMU_gyro_raw_y_read (int16_t *p_dest); +ERRNO_e IMU_gyro_raw_z_read (int16_t *p_dest); +ERRNO_e IMU_gyro_x_read (float *p_dest); +ERRNO_e IMU_gyro_y_read (float *p_dest); +ERRNO_e IMU_gyro_z_read (float *p_dest); +ERRNO_e IMU_gyro_read (IMU_data_s *p_dest); + + +void IMU_set_shot_capture_mode(bool enable); +ERRNO_e IMU_fifo_status_1to2_read (uint16_t *unread_words, uint8_t *empty, uint8_t *full_smart, uint8_t *over_run, uint8_t *waterM); +ERRNO_e IMU_func_src1_read (uint8_t *sign_motion); +ERRNO_e IMU_fifo_th_set(uint16_t fifo_threshold); +bool IMU_is_fifo_set(void); + +ERRNO_e IMU_motion_int_enable (bool en, uint8_t threshold, uint8_t duration); +ERRNO_e IMU_sleep (void); + +void IMU_task_install(void); +void IMU_interrupt_handler_task_install(void); +void Dummy_task_install (void); + +void IMU_cli_cmd (int32_t argc, char **argv); +ERRNO_e IMU_fifo_th_set(uint16_t fifo_threshold); + +#endif /* IMU_H_ */ \ No newline at end of file diff --git a/src/bsp/imu_reg.h b/src/bsp/imu_reg.h new file mode 100644 index 0000000..cd09c7f --- /dev/null +++ b/src/bsp/imu_reg.h @@ -0,0 +1,2211 @@ +/** + * @file imu_reg.h + * @brief LSM6DS3 IMU register addresses and definitions (lsm6ds3tr-c) + * @author Kenny Tran + * @date Feb 28 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef IMU_REG_H_ +#define IMU_REG_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define LSM6DS3_I2C_DEV_ADDR (0X6A) /* AD0 / SA0 determines LSB (grounded): + * if grounded, use 0x6A, if high, use 0x6B */ + +#define LSM6DS3TR_WHO_AM_I 0X69 +#define LSM6DS3TR_C_WHO_AM_I 0x6A + +/************** Device Register *******************/ +#define LSM6DS3TR_C_CFG_ACCESS 0X01 +#define LSM6DS3TR_C_SENSOR_SYNC_TIME 0X04 +#define LSM6DS3TR_C_SENSOR_SYNC_EN 0X05 +#define LSM6DS3TR_C_FIFO_CTRL1 0X06 +#define LSM6DS3TR_C_FIFO_CTRL2 0X07 +#define LSM6DS3TR_C_FIFO_CTRL3 0X08 +#define LSM6DS3TR_C_FIFO_CTRL4 0X09 +#define LSM6DS3TR_C_FIFO_CTRL5 0X0A +#define LSM6DS3TR_C_DRDY_PULSE_CFG_G 0X0B +#define LSM6DS3TR_C_INT1_CTRL 0X0D +#define LSM6DS3TR_C_INT2_CTRL 0X0E +#define LSM6DS3TR_C_WHO_AM_I_REG 0X0F +#define LSM6DS3TR_C_CTRL1_XL 0X10 +#define LSM6DS3TR_C_CTRL2_G 0X11 +#define LSM6DS3TR_C_CTRL3_C 0X12 +#define LSM6DS3TR_C_CTRL4_C 0X13 +#define LSM6DS3TR_C_CTRL5_C 0X14 +#define LSM6DS3TR_C_CTRL6_C 0X15 +#define LSM6DS3TR_C_CTRL7_G 0X16 +#define LSM6DS3TR_C_CTRL8_XL 0X17 +#define LSM6DS3TR_C_CTRL9_XL 0X18 +#define LSM6DS3TR_C_CTRL10_C 0X19 +#define LSM6DS3TR_C_MASTER_CONFIG 0X1A +#define LSM6DS3TR_C_WAKE_UP_SRC 0X1B +#define LSM6DS3TR_C_TAP_SRC 0X1C +#define LSM6DS3TR_C_D6D_SRC 0X1D +#define LSM6DS3TR_C_STATUS_REG 0X1E +#define LSM6DS3TR_C_OUT_TEMP_L 0X20 +#define LSM6DS3TR_C_OUT_TEMP_H 0X21 +#define LSM6DS3TR_C_OUTX_L_G 0X22 +#define LSM6DS3TR_C_OUTX_H_G 0X23 +#define LSM6DS3TR_C_OUTY_L_G 0X24 +#define LSM6DS3TR_C_OUTY_H_G 0X25 +#define LSM6DS3TR_C_OUTZ_L_G 0X26 +#define LSM6DS3TR_C_OUTZ_H_G 0X27 +#define LSM6DS3TR_C_OUTX_L_XL 0X28 +#define LSM6DS3TR_C_OUTX_H_XL 0X29 +#define LSM6DS3TR_C_OUTY_L_XL 0X2A +#define LSM6DS3TR_C_OUTY_H_XL 0X2B +#define LSM6DS3TR_C_OUTZ_L_XL 0X2C +#define LSM6DS3TR_C_OUTZ_H_XL 0X2D +#define LSM6DS3TR_C_SENSORHUB1_REG 0X2E +#define LSM6DS3TR_C_SENSORHUB2_REG 0X2F +#define LSM6DS3TR_C_SENSORHUB3_REG 0X30 +#define LSM6DS3TR_C_SENSORHUB4_REG 0X31 +#define LSM6DS3TR_C_SENSORHUB5_REG 0X32 +#define LSM6DS3TR_C_SENSORHUB6_REG 0X33 +#define LSM6DS3TR_C_SENSORHUB7_REG 0X34 +#define LSM6DS3TR_C_SENSORHUB8_REG 0X35 +#define LSM6DS3TR_C_SENSORHUB9_REG 0X36 +#define LSM6DS3TR_C_SENSORHUB10_REG 0X37 +#define LSM6DS3TR_C_SENSORHUB11_REG 0X38 +#define LSM6DS3TR_C_SENSORHUB12_REG 0X39 +#define LSM6DS3TR_C_FIFO_STATUS1 0X3A +#define LSM6DS3TR_C_FIFO_STATUS2 0X3B +#define LSM6DS3TR_C_FIFO_STATUS3 0X3C +#define LSM6DS3TR_C_FIFO_STATUS4 0X3D +#define LSM6DS3TR_C_FIFO_DATA_OUT_L 0X3E +#define LSM6DS3TR_C_FIFO_DATA_OUT_H 0X3F +#define LSM6DS3TR_C_TIMESTAMP0_REG 0X40 +#define LSM6DS3TR_C_TIMESTAMP1_REG 0X41 +#define LSM6DS3TR_C_TIMESTAMP2_REG 0X42 +#define LSM6DS3TR_C_STEP_TIMESTAMP_L 0X49 +#define LSM6DS3TR_C_STEP_TIMESTAMP_H 0X4A +#define LSM6DS3TR_C_STEP_COUNTER_L 0X4B +#define LSM6DS3TR_C_STEP_COUNTER_H 0X4C +#define LSM6DS3TR_C_SENSORHUB13_REG 0X4D +#define LSM6DS3TR_C_SENSORHUB14_REG 0X4E +#define LSM6DS3TR_C_SENSORHUB15_REG 0X4F +#define LSM6DS3TR_C_SENSORHUB16_REG 0X50 +#define LSM6DS3TR_C_SENSORHUB17_REG 0X51 +#define LSM6DS3TR_C_SENSORHUB18_REG 0X52 +#define LSM6DS3TR_C_FUNC_SRC1 0X53 +#define LSM6DS3TR_C_FUNC_SRC2 0X54 +#define LSM6DS3TR_C_WRIST_TILT_IA 0X55 +#define LSM6DS3TR_C_TAP_CFG 0X58 +#define LSM6DS3TR_C_TAP_THS_6D 0X59 +#define LSM6DS3TR_C_INT_DUR2 0X5A +#define LSM6DS3TR_C_WAKE_UP_THS 0X5B +#define LSM6DS3TR_C_WAKE_UP_DUR 0X5C +#define LSM6DS3TR_C_FREE_FALL 0X5D +#define LSM6DS3TR_C_MD1_CFG 0X5E +#define LSM6DS3TR_C_MD2_CFG 0X5F +#define LSM6DS3TR_C_MASTER_CMD_CODE 0X60 +#define LSM6DS3TR_C_SENS_SYNC_SPI_ERROR_CODE 0X61 +#define LSM6DS3TR_C_OUT_MAG_RAW_X_L 0X66 +#define LSM6DS3TR_C_OUT_MAG_RAW_X_H 0X67 +#define LSM6DS3TR_C_OUT_MAG_RAW_Y_L 0X68 +#define LSM6DS3TR_C_OUT_MAG_RAW_Y_H 0X69 +#define LSM6DS3TR_C_OUT_MAG_RAW_Z_L 0X6A +#define LSM6DS3TR_C_OUT_MAG_RAW_Z_H 0X6B +#define LSM6DS3TR_C_X_OFS_USR 0X73 +#define LSM6DS3TR_C_Y_OFS_USR 0X74 +#define LSM6DS3TR_C_Z_OFS_USR 0X75 + +/************** Access Device RAM *******************/ +#define LSM6DS3TR_C_ADDR0_TO_RW_RAM 0x62 +#define LSM6DS3TR_C_ADDR1_TO_RW_RAM 0x63 +#define LSM6DS3TR_C_DATA_TO_WR_RAM 0x64 +#define LSM6DS3TR_C_DATA_RD_FROM_RAM 0x65 + +#define LSM6DS3TR_C_RAM_SIZE 4096 + +/************** Embedded functions register mapping *******************/ +#define LSM6DS3TR_C_SLV0_ADD 0x02 +#define LSM6DS3TR_C_SLV0_SUBADD 0x03 +#define LSM6DS3TR_C_SLAVE0_CONFIG 0x04 +#define LSM6DS3TR_C_SLV1_ADD 0x05 +#define LSM6DS3TR_C_SLV1_SUBADD 0x06 +#define LSM6DS3TR_C_SLAVE1_CONFIG 0x07 +#define LSM6DS3TR_C_SLV2_ADD 0x08 +#define LSM6DS3TR_C_SLV2_SUBADD 0x09 +#define LSM6DS3TR_C_SLAVE2_CONFIG 0x0A +#define LSM6DS3TR_C_SLV3_ADD 0x0B +#define LSM6DS3TR_C_SLV3_SUBADD 0x0C +#define LSM6DS3TR_C_SLAVE3_CONFIG 0x0D +#define LSM6DS3TR_C_DATAWRITE_SRC_MODE_SUB_SLV0 0x0E +#define LSM6DS3TR_C_CONFIG_PEDO_THS_MIN 0x0F +#define LSM6DS3TR_C_CONFIG_TILT_IIR 0x10 +#define LSM6DS3TR_C_CONFIG_TILT_ACOS 0x11 +#define LSM6DS3TR_C_CONFIG_TILT_WTIME 0x12 +#define LSM6DS3TR_C_SM_STEP_THS 0x13 +#define LSM6DS3TR_C_MAG_SI_XX 0x24 +#define LSM6DS3TR_C_MAG_SI_XY 0x25 +#define LSM6DS3TR_C_MAG_SI_XZ 0x26 +#define LSM6DS3TR_C_MAG_SI_YX 0x27 +#define LSM6DS3TR_C_MAG_SI_YY 0x28 +#define LSM6DS3TR_C_MAG_SI_YZ 0x29 +#define LSM6DS3TR_C_MAG_SI_ZX 0x2A +#define LSM6DS3TR_C_MAG_SI_ZY 0x2B +#define LSM6DS3TR_C_MAG_SI_ZZ 0x2C +#define LSM6DS3TR_C_MAG_OFFX_L 0x2D +#define LSM6DS3TR_C_MAG_OFFX_H 0x2E +#define LSM6DS3TR_C_MAG_OFFY_L 0x2F +#define LSM6DS3TR_C_MAG_OFFY_H 0x30 +#define LSM6DS3TR_C_MAG_OFFZ_L 0x31 +#define LSM6DS3TR_C_MAG_OFFZ_H 0x32 + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +/******************************************************************************* + Register : RAM_ACCESS + Address : 0X01 + Bit Group Name: PROG_RAM1 + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_PROG_RAM1_DISABLED = 0x00, + LSM6DS3TR_C_PROG_RAM1_ENABLED = 0x01, +} LSM6DS3TR_C_PROG_RAM1_e; + +/******************************************************************************* + Register : RAM_ACCESS + Address : 0X01 + Bit Group Name: CUSTOMROM1 + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_CUSTOMROM1_DISABLED = 0x00, + LSM6DS3TR_C_CUSTOMROM1_ENABLED = 0x04, +} LSM6DS3TR_C_CUSTOMROM1_e; + +/******************************************************************************* + Register : RAM_ACCESS + Address : 0X01 + Bit Group Name: RAM_PAGE + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_RAM_PAGE_DISABLED = 0x00, + LSM6DS3TR_C_RAM_PAGE_ENABLED = 0x80, +} LSM6DS3TR_C_RAM_PAGE_e; + +/******************************************************************************* + Register : SENSOR_SYNC_TIME + Address : 0X04 + Bit Group Name: TPH + Permission : RW +*******************************************************************************/ +#define LSM6DS3TR_C_TPH_MASK 0xFF +#define LSM6DS3TR_C_TPH_POSITION 0 + +/******************************************************************************* + Register : SENSOR_SYNC_EN + Address : 0X05 + Bit Group Name: SYNC_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SYNC_EN_DISABLED = 0x00, + LSM6DS3TR_C_SYNC_EN_ENABLED = 0x01, +} LSM6DS3TR_C_SYNC_EN_e; + +/******************************************************************************* + Register : SENSOR_SYNC_EN + Address : 0X05 + Bit Group Name: HP_RST + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_HP_RST_RST_OFF = 0x00, + LSM6DS3TR_C_HP_RST_RST_ON = 0x02, +} LSM6DS3TR_C_HP_RST_e; + +/******************************************************************************* + Register : FIFO_CTRL2 + Address : 0X07 + Bit Group Name: TIM_PEDO_FIFO_DRDY + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_TIM_PEDO_FIFO_DRDY_DISABLED = 0x00, + LSM6DS3TR_C_TIM_PEDO_FIFO_DRDY_ENABLED = 0x40, +} LSM6DS3TR_C_TIM_PEDO_FIFO_DRDY_e; + +/******************************************************************************* + Register : FIFO_CTRL2 + Address : 0X07 + Bit Group Name: TIM_PEDO_FIFO_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_TIM_PEDO_FIFO_EN_DISABLED = 0x00, + LSM6DS3TR_C_TIM_PEDO_FIFO_EN_ENABLED = 0x80, +} LSM6DS3TR_C_TIM_PEDO_FIFO_EN_e; + +/******************************************************************************* + Register : FIFO_CTRL3 [2:0] + Address : 0X08 + Bit Group Name: DEC_FIFO_XL[2:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DEC_FIFO_XL_DATA_NOT_IN_FIFO = 0x00, + LSM6DS3TR_C_DEC_FIFO_XL_NO_DECIMATION = 0x01, + LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_2 = 0x02, + LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_3 = 0x03, + LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_4 = 0x04, + LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_8 = 0x05, + LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_16 = 0x06, + LSM6DS3TR_C_DEC_FIFO_XL_DECIMATION_BY_32 = 0x07, +} LSM6DS3TR_C_DEC_FIFO_XL_e; + +/******************************************************************************* + Register : FIFO_CTRL3 [5:3] + Address : 0X08 + Bit Group Name: DEC_FIFO_GYRO[2:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DEC_FIFO_GYRO_DATA_NOT_IN_FIFO = 0x00, + LSM6DS3TR_C_DEC_FIFO_GYRO_NO_DECIMATION = 0x01, + LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_2 = 0x02, + LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_3 = 0x03, + LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_4 = 0x04, + LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_8 = 0x05, + LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_16 = 0x06, + LSM6DS3TR_C_DEC_FIFO_GYRO_DECIMATION_BY_32 = 0x07, +} LSM6DS3TR_C_DEC_FIFO_GYRO_e; + +/******************************************************************************* + Register : FIFO_CTRL4 [2:0] + Address : 0X09 + Bit Group Name: DEC_DS3_FIFO[2:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DEC_DS3_FIFO_DATA_NOT_IN_FIFO = 0x00, + LSM6DS3TR_C_DEC_DS3_FIFO_NO_DECIMATION = 0x01, + LSM6DS3TR_C_DEC_DS3_FIFO_DECIMATION_BY_2 = 0x02, + LSM6DS3TR_C_DEC_DS3_FIFO_DECIMATION_BY_3 = 0x03, + LSM6DS3TR_C_DEC_DS3_FIFO_DECIMATION_BY_4 = 0x04, + LSM6DS3TR_C_DEC_DS3_FIFO_DECIMATION_BY_8 = 0x05, + LSM6DS3TR_C_DEC_DS3_FIFO_DECIMATION_BY_16 = 0x06, + LSM6DS3TR_C_DEC_DS3_FIFO_DECIMATION_BY_32 = 0x07, +} LSM6DS3TR_C_DEC_DS3_FIFO_e; + +/******************************************************************************* + Register : FIFO_CTRL4 [5:3] + Address : 0X09 + Bit Group Name: DEC_DS4_FIFO[2:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DEC_DS4_FIFO_DATA_NOT_IN_FIFO = 0x00, + LSM6DS3TR_C_DEC_DS4_FIFO_NO_DECIMATION = 0x08, + LSM6DS3TR_C_DEC_DS4_FIFO_DECIMATION_BY_2 = 0x10, + LSM6DS3TR_C_DEC_DS4_FIFO_DECIMATION_BY_3 = 0x18, + LSM6DS3TR_C_DEC_DS4_FIFO_DECIMATION_BY_4 = 0x20, + LSM6DS3TR_C_DEC_DS4_FIFO_DECIMATION_BY_8 = 0x28, + LSM6DS3TR_C_DEC_DS4_FIFO_DECIMATION_BY_16 = 0x30, + LSM6DS3TR_C_DEC_DS4_FIFO_DECIMATION_BY_32 = 0x38, +} LSM6DS3TR_C_DEC_DS4_FIFO_e; + +/******************************************************************************* + Register : FIFO_CTRL4 [6] + Address : 0X09 + Bit Group Name: ONLY_HIGH_DATA + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_ONLY_HIGH_DATA_DISABLED = 0x00, + LSM6DS3TR_C_ONLY_HIGH_DATA_ENABLED = 0x40, +} LSM6DS3TR_C_ONLY_HIGH_DATA_e; + +/******************************************************************************* + Register : FIFO_CTRL4 [7] + Address : 0X09 + Bit Group Name: STOP_ON_FTH + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_STOP_ON_FTH_DISABLED = 0x00, + LSM6DS3TR_C_STOP_ON_FTH_ENABLED = 0x80, +} LSM6DS3TR_C_STOP_ON_FTH_DATA_e; + +/******************************************************************************* + Register : FIFO_CTRL5 [2:0] + Address : 0X0A + Bit Group Name: FIFO_MODE[2:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_FIFO_MODE_BYPASS = 0x00, + LSM6DS3TR_C_FIFO_MODE_FIFO_STOP_ON_FULL = 0x01, + LSM6DS3TR_C_FIFO_MODE_CON_THEN_FIFO = 0x03, + LSM6DS3TR_C_FIFO_MODE_BYPASS_THEN_CON = 0x04, + LSM6DS3TR_C_FIFO_MODE_CONTINUOUS = 0x06, +} LSM6DS3TR_C_FIFO_MODE_e; + +/******************************************************************************* + Register : FIFO_CTRL5 [6:3] + Address : 0X0A + Bit Group Name: ODR_FIFO[3:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_ODR_FIFO_DISABLE = 0x00, + LSM6DS3TR_C_ODR_FIFO_12_5Hz = 0x01, + LSM6DS3TR_C_ODR_FIFO_26Hz = 0x02, + LSM6DS3TR_C_ODR_FIFO_52Hz = 0x03, + LSM6DS3TR_C_ODR_FIFO_104Hz = 0x04, + LSM6DS3TR_C_ODR_FIFO_208Hz = 0x05, + LSM6DS3TR_C_ODR_FIFO_416Hz = 0x06, + LSM6DS3TR_C_ODR_FIFO_833Hz = 0x07, + LSM6DS3TR_C_ODR_FIFO_1666Hz = 0x08, + LSM6DS3TR_C_ODR_FIFO_3332Hz = 0x09, + LSM6DS3TR_C_ODR_FIFO_6664Hz = 0x0A, +} LSM6DS3TR_C_ODR_FIFO_e; + +/******************************************************************************* + Register : ORIENT_CFG_G + Address : 0X0B + Bit Group Name: ORIENT + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_ORIENT_XYZ = 0x00, + LSM6DS3TR_C_ORIENT_XZY = 0x01, + LSM6DS3TR_C_ORIENT_YXZ = 0x02, + LSM6DS3TR_C_ORIENT_YZX = 0x03, + LSM6DS3TR_C_ORIENT_ZXY = 0x04, + LSM6DS3TR_C_ORIENT_ZYX = 0x05, +} LSM6DS3TR_C_ORIENT_e; + +/******************************************************************************* + Register : ORIENT_CFG_G + Address : 0X0B + Bit Group Name: SIGN_Z_G + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SIGN_Z_G_POSITIVE = 0x00, + LSM6DS3TR_C_SIGN_Z_G_NEGATIVE = 0x08, +} LSM6DS3TR_C_SIGN_Z_G_e; + +/******************************************************************************* + Register : ORIENT_CFG_G + Address : 0X0B + Bit Group Name: SIGN_Y_G + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SIGN_Y_G_POSITIVE = 0x00, + LSM6DS3TR_C_SIGN_Y_G_NEGATIVE = 0x10, +} LSM6DS3TR_C_SIGN_Y_G_e; + +/******************************************************************************* + Register : ORIENT_CFG_G + Address : 0X0B + Bit Group Name: SIGN_X_G + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SIGN_X_G_POSITIVE = 0x00, + LSM6DS3TR_C_SIGN_X_G_NEGATIVE = 0x20, +} LSM6DS3TR_C_SIGN_X_G_e; + +/******************************************************************************* + Register : REFERENCE_G + Address : 0X0C + Bit Group Name: REF_G + Permission : RW +*******************************************************************************/ +#define LSM6DS3TR_C_REF_G_MASK 0xFF +#define LSM6DS3TR_C_REF_G_POSITION 0 + +/******************************************************************************* + Register : INT1_CTRL + Address : 0X0D + Bit Group Name: INT1_DRDY_XL + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_DRDY_XL_DISABLED = 0x00, + LSM6DS3TR_C_INT1_DRDY_XL_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_DRDY_XL_e; + +/******************************************************************************* + Register : INT1_CTRL + Address : 0X0D + Bit Group Name: INT1_DRDY_G + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_DRDY_G_DISABLED = 0x00, + LSM6DS3TR_C_INT1_DRDY_G_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_DRDY_G_e; + +/******************************************************************************* + Register : INT1_CTRL + Address : 0X0D + Bit Group Name: INT1_BOOT + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_BOOT_DISABLED = 0x00, + LSM6DS3TR_C_INT1_BOOT_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_BOOT_e; + +/******************************************************************************* + Register : INT1_CTRL + Address : 0X0D + Bit Group Name: INT1_FTH + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_FTH_DISABLED = 0x00, + LSM6DS3TR_C_INT1_FTH_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_FTH_e; + +/******************************************************************************* + Register : INT1_CTRL + Address : 0X0D + Bit Group Name: INT1_FIFO_OVR + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_FIFO_OVR_DISABLED = 0x00, + LSM6DS3TR_C_INT1_FIFO_OVR_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_FIFO_OVR_e; + +/******************************************************************************* + Register : INT1_CTRL + Address : 0X0D + Bit Group Name: INT1_FULL_FLAG + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_FULL_FLAG_DISABLED = 0x00, + LSM6DS3TR_C_INT1_FULL_FLAG_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_FULL_FLAG_e; + +/******************************************************************************* + Register : INT1_CTRL + Address : 0X0D + Bit Group Name: INT1_SIGN_MOT + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_SIGN_MOT_DISABLED = 0x00, + LSM6DS3TR_C_INT1_SIGN_MOT_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_SIGN_MOT_e; + +/******************************************************************************* + Register : INT1_CTRL + Address : 0X0D + Bit Group Name: INT1_PEDO + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_PEDO_DISABLED = 0x00, + LSM6DS3TR_C_INT1_PEDO_ENABLED = 0x80, +} LSM6DS3TR_C_INT1_PEDO_e; + +/******************************************************************************* + Register : INT2_CTRL + Address : 0X0E + Bit Group Name: INT2_DRDY_XL + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_DRDY_XL_DISABLED = 0x00, + LSM6DS3TR_C_INT2_DRDY_XL_ENABLED = 0x01, +} LSM6DS3TR_C_INT2_DRDY_XL_e; + +/******************************************************************************* + Register : INT2_CTRL + Address : 0X0E + Bit Group Name: INT2_DRDY_G + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_DRDY_G_DISABLED = 0x00, + LSM6DS3TR_C_INT2_DRDY_G_ENABLED = 0x02, +} LSM6DS3TR_C_INT2_DRDY_G_e; + +/******************************************************************************* + Register : INT2_CTRL + Address : 0X0E + Bit Group Name: INT2_FTH + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_FTH_DISABLED = 0x00, + LSM6DS3TR_C_INT2_FTH_ENABLED = 0x08, +} LSM6DS3TR_C_INT2_FTH_e; + +/******************************************************************************* + Register : INT2_CTRL + Address : 0X0E + Bit Group Name: INT2_OVR + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_OVR_DISABLED = 0x00, + LSM6DS3TR_C_INT2_OVR_ENABLED = 0x10, +} LSM6DS3TR_C_INT2_OVR_e; + +/******************************************************************************* + Register : INT2_CTRL + Address : 0X0E + Bit Group Name: INT2_FSS5 + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_FSS5_DISABLED = 0x00, + LSM6DS3TR_C_INT2_FSS5_ENABLED = 0x20, +} LSM6DS3TR_C_INT2_FSS5_e; + +/******************************************************************************* + Register : INT2_CTRL + Address : 0X0E + Bit Group Name: INT2_SIGN_MOT + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_SIGN_MOT_DISABLED = 0x00, + LSM6DS3TR_C_INT2_SIGN_MOT_ENABLED = 0x40, +} LSM6DS3TR_C_INT2_SIGN_MOT_e; + +/******************************************************************************* + Register : INT2_CTRL + Address : 0X0E + Bit Group Name: INT2_PEDO + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_PEDO_DISABLED = 0x00, + LSM6DS3TR_C_INT2_PEDO_ENABLED = 0x80, +} LSM6DS3TR_C_INT2_PEDO_e; + +/******************************************************************************* + Register : WHO_AM_I + Address : 0X0F + Bit Group Name: WHO_AM_I_BIT + Permission : RO +*******************************************************************************/ +#define LSM6DS3TR_C_WHO_AM_I_BIT_MASK 0xFF +#define LSM6DS3TR_C_WHO_AM_I_BIT_POSITION 0 + +/******************************************************************************* + Register : CTRL1_XL [1] + Address : 0X10 + Bit Group Name: LPF1_BW_SEL + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_LPF1_BW_SEL_ODR_DIV_2 = 0x00, + LSM6DS3TR_C_LPF1_BW_SEL_ODR_DIV_4 = 0x01, +} LSM6DS3TR_C_LPF1_BW_SEL_e; + +/******************************************************************************* + Register : CTRL1_XL [3:2] + Address : 0X10 + Bit Group Name: FS_XL[1:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_FS_XL_2g = 0x00, + LSM6DS3TR_C_FS_XL_16g = 0x01, + LSM6DS3TR_C_FS_XL_4g = 0x02, + LSM6DS3TR_C_FS_XL_8g = 0x03, +} LSM6DS3TR_C_FS_XL_e; + +/******************************************************************************* + Register : CTRL1_XL [7:4] + Address : 0X10 + Bit Group Name: ODR_XL[3:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_ODR_XL_POWER_DOWN = 0x00, + LSM6DS3TR_C_ODR_XL_12_5Hz = 0x01, + LSM6DS3TR_C_ODR_XL_26Hz = 0x02, + LSM6DS3TR_C_ODR_XL_52Hz = 0x03, + LSM6DS3TR_C_ODR_XL_104Hz = 0x04, + LSM6DS3TR_C_ODR_XL_208Hz = 0x05, + LSM6DS3TR_C_ODR_XL_416Hz = 0x06, + LSM6DS3TR_C_ODR_XL_833Hz = 0x07, + LSM6DS3TR_C_ODR_XL_1666Hz = 0x08, + LSM6DS3TR_C_ODR_XL_3332Hz = 0x09, + LSM6DS3TR_C_ODR_XL_6664Hz = 0x0A, + LSM6DS3TR_C_ODR_XL_1_6Hz = 0x0B, +} LSM6DS3TR_C_ODR_XL_e; + +/******************************************************************************* + Register : CTRL2_G [1] + Address : 0X11 + Bit Group Name: FS_125 + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_FS_125_DISABLED = 0x00, + LSM6DS3TR_C_FS_125_ENABLED = 0x01, +} LSM6DS3TR_C_FS_125_e; + +/******************************************************************************* + Register : CTRL2_G [3:2] + Address : 0X11 + Bit Group Name: FS_G[1:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_FS_G_250dps = 0x00, + LSM6DS3TR_C_FS_G_500dps = 0x01, + LSM6DS3TR_C_FS_G_1000dps = 0x02, + LSM6DS3TR_C_FS_G_2000dps = 0x03, +} LSM6DS3TR_C_FS_G_e; + +/******************************************************************************* + Register : CTRL2_G + Address : 0X11 + Bit Group Name: FS_G_ABSTR + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_FS_G_ABSTR_125dps, + LSM6DS3TR_C_FS_G_ABSTR_250dps, + LSM6DS3TR_C_FS_G_ABSTR_500dps, + LSM6DS3TR_C_FS_G_ABSTR_1000dps, + LSM6DS3TR_C_FS_G_ABSTR_2000dps, +} LSM6DS3TR_C_FS_G_ABSTR_e; + +/******************************************************************************* + Register : CTRL2_G [7:4] + Address : 0X11 + Bit Group Name: ODR_G[3:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_ODR_G_POWER_DOWN = 0x00, + LSM6DS3TR_C_ODR_G_12_5Hz = 0x01, + LSM6DS3TR_C_ODR_G_26Hz = 0x02, + LSM6DS3TR_C_ODR_G_52Hz = 0x03, + LSM6DS3TR_C_ODR_G_104Hz = 0x04, + LSM6DS3TR_C_ODR_G_208Hz = 0x05, + LSM6DS3TR_C_ODR_G_416Hz = 0x06, + LSM6DS3TR_C_ODR_G_833Hz = 0x07, + LSM6DS3TR_C_ODR_G_1666Hz = 0x08, + LSM6DS3TR_C_ODR_G_3332Hz = 0x09, + LSM6DS3TR_C_ODR_G_6664Hz = 0x0A, +} LSM6DS3TR_C_ODR_G_e; + +/******************************************************************************* + Register : CTRL3_C + Address : 0X12 + Bit Group Name: SW_RESET + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SW_RESET_NORMAL_MODE = 0x00, + LSM6DS3TR_C_SW_RESET_RESET_DEVICE = 0x01, +} LSM6DS3TR_C_SW_RESET_e; + +/******************************************************************************* + Register : CTRL3_C + Address : 0X12 + Bit Group Name: BLE + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_BLE_LSB = 0x00, + LSM6DS3TR_C_BLE_MSB = 0x01, +} LSM6DS3TR_C_BLE_e; + +/******************************************************************************* + Register : CTRL3_C + Address : 0X12 + Bit Group Name: IF_INC + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_IF_INC_DISABLED = 0x00, + LSM6DS3TR_C_IF_INC_ENABLED = 0x01, +} LSM6DS3TR_C_IF_INC_e; + +/******************************************************************************* + Register : CTRL3_C + Address : 0X12 + Bit Group Name: SIM + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SIM_4_WIRE = 0x00, + LSM6DS3TR_C_SIM_3_WIRE = 0x01, +} LSM6DS3TR_C_SIM_e; + +/******************************************************************************* + Register : CTRL3_C + Address : 0X12 + Bit Group Name: PP_OD + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_PP_OD_PUSH_PULL = 0x00, + LSM6DS3TR_C_PP_OD_OPEN_DRAIN = 0x01, +} LSM6DS3TR_C_PP_OD_e; + +/******************************************************************************* + Register : CTRL3_C + Address : 0X12 + Bit Group Name: H_LACTIVE + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_H_LACTIVE_ACTIVE_HI = 0x00, + LSM6DS3TR_C_H_LACTIVE_ACTIVE_LO = 0x01, +} LSM6DS3TR_C_H_LACTIVE_e; + +/******************************************************************************* + Register : CTRL3_C + Address : 0X12 + Bit Group Name: BDU + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_BDU_CONTINUOUS = 0x00, + LSM6DS3TR_C_BDU_BLOCK_UPDATE = 0x01, +} LSM6DS3TR_C_BDU_e; + +/******************************************************************************* + Register : CTRL3_C + Address : 0X12 + Bit Group Name: BOOT + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_BOOT_NORMAL_MODE = 0x00, + LSM6DS3TR_C_BOOT_REBOOT_MODE = 0x01, +} LSM6DS3TR_C_BOOT_e; + +/******************************************************************************* + Register : CTRL4_C [1] + Address : 0X13 + Bit Group Name: LPF1_SEL_G + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_LPF1_SEL_G_DISABLE = 0x00, + LSM6DS3TR_C_LPF1_SEL_G_ENABLE = 0x01, +} LSM6DS3TR_C_LPF1_SEL_G_e; + +/******************************************************************************* + Register : CTRL4_C [2] + Address : 0X13 + Bit Group Name: I2C_DISABLE + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_I2C_DISABLE_I2C_AND_SPI = 0x00, + LSM6DS3TR_C_I2C_DISABLE_SPI_ONLY = 0x04, +} LSM6DS3TR_C_I2C_DISABLE_e; + +/******************************************************************************* + Register : CTRL4_C [3] + Address : 0X13 + Bit Group Name: DRDY_MSK + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DRDY_MSK_DISABLED = 0x00, + LSM6DS3TR_C_DRDY_MSK_ENABLED = 0x08, +} LSM6DS3TR_C_DRDY_MSK_e; + +/******************************************************************************* + Register : CTRL4_C [5] + Address : 0X13 + Bit Group Name: INT2_ON_INT1 + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_ON_INT1_DISABLED = 0x00, + LSM6DS3TR_C_INT2_ON_INT1_ENABLED = 0x20, +} LSM6DS3TR_C_INT2_ON_INT1_e; + +/******************************************************************************* + Register : CTRL4_C [6] + Address : 0X13 + Bit Group Name: SLEEP + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SLEEP_DISABLED = 0x00, + LSM6DS3TR_C_SLEEP_ENABLED = 0x40, +} LSM6DS3TR_C_SLEEP_G_e; + +/******************************************************************************* + Register : CTRL5_C + Address : 0X14 + Bit Group Name: ST_XL + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_ST_XL_NORMAL_MODE = 0x00, + LSM6DS3TR_C_ST_XL_POS_SIGN_TEST = 0x01, + LSM6DS3TR_C_ST_XL_NEG_SIGN_TEST = 0x02, + LSM6DS3TR_C_ST_XL_NA = 0x03, +} LSM6DS3TR_C_ST_XL_e; + +/******************************************************************************* + Register : CTRL5_C + Address : 0X14 + Bit Group Name: ST_G + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_ST_G_NORMAL_MODE = 0x00, + LSM6DS3TR_C_ST_G_POS_SIGN_TEST = 0x04, + LSM6DS3TR_C_ST_G_NA = 0x08, + LSM6DS3TR_C_ST_G_NEG_SIGN_TEST = 0x0C, +} LSM6DS3TR_C_ST_G_e; + +/******************************************************************************* + Register : CTRL6_C [1:0] + Address : 0X15 + Bit Group Name: FTYPE[1:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_FTYPE_0 = 0x00, + LSM6DS3TR_C_FTYPE_1 = 0x01, + LSM6DS3TR_C_FTYPE_2 = 0x02, + LSM6DS3TR_C_FTYPE_3 = 0x03, +} LSM6DS3TR_C_FTYPE_e; + +/******************************************************************************* + Register : CTRL6_C [4] + Address : 0X15 + Bit Group Name: XL_HM_MODE + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_XL_HM_MODE_ENABLED = 0x00, + LSM6DS3TR_C_XL_HM_MODE_DISABLED = 0x10, +} LSM6DS3TR_C_XL_HM_MODE_e; + +/******************************************************************************* + Register : CTRL6_C [5] + Address : 0X15 + Bit Group Name: LVL2_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_LVL2_EN_DISABLED = 0x00, + LSM6DS3TR_C_LVL2_EN_ENABLED = 0x20, +} LSM6DS3TR_C_DEN_LVL2_EN_e; + +/******************************************************************************* + Register : CTRL6_C [6] + Address : 0X15 + Bit Group Name: LVL_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_LVL_EN_DISABLED = 0x00, + LSM6DS3TR_C_LVL_EN_ENABLED = 0x40, +} LSM6DS3TR_C_DEN_LVL_EN_e; + +/******************************************************************************* + Register : CTRL6_C [7] + Address : 0X15 + Bit Group Name: TRIG_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_TRIG_EN_DISABLED = 0x00, + LSM6DS3TR_C_TRIG_EN_ENABLED = 0x80, +} LSM6DS3TR_C_TRIG_EN_e; + +/******************************************************************************* + Register : CTRL7_G [5:4] + Address : 0X16 + Bit Group Name: HPM_G[1:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_HPM_G_16mHz = 0x00, + LSM6DS3TR_C_HPM_G_65mHz = 0x01, + LSM6DS3TR_C_HPM_G_260mHz = 0x02, + LSM6DS3TR_C_HPM_G_1_04Hz = 0x03, +} LSM6DS3TR_C_HPM_G_e; + +/******************************************************************************* + Register : CTRL7_G [6] + Address : 0X16 + Bit Group Name: HP_EN_G + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_HP_EN_G_DISABLE = 0x00, + LSM6DS3TR_C_HP_EN_G_ENABLE = 0x01, +} LSM6DS3TR_C_HP_EN_G_e; + +/******************************************************************************* + Register : CTRL7_G [7] + Address : 0X16 + Bit Group Name: G_HM_MODE + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_G_HM_MODE_ENABLED = 0x80, + LSM6DS3TR_C_G_HM_MODE_DISABLED = 0x00, +} LSM6DS3TR_C_G_HM_MODE_e; + +/******************************************************************************* + Register : CTRL8_XL [2] + Address : 0X17 + Bit Group Name: HP_SLOPE_XL_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_HP_SLOPE_XL_EN_DISABLED = 0x00, + LSM6DS3TR_C_HP_SLOPE_XL_EN_ENABLED = 0x01, +} LSM6DS3TR_C_HP_SLOPE_XL_EN_e; + +/******************************************************************************* + Register : CTRL8_XL [3] + Address : 0X17 + Bit Group Name: INPUT_COMPOSITE + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INPUT_COMPOSITE_LOW_LATENCY = 0x00, + LSM6DS3TR_C_INPUT_COMPOSITE_LOW_NOISE = 0x01, +} LSM6DS3TR_C_INPUT_COMPOSITE_e; + +/******************************************************************************* + Register : CTRL8_XL [6:5] + Address : 0X17 + Bit Group Name: HPCF_XL[1:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_HPCF_XL_00 = 0x00, + LSM6DS3TR_C_HPCF_XL_01 = 0x01, + LSM6DS3TR_C_HPCF_XL_02 = 0x02, + LSM6DS3TR_C_HPCF_XL_03 = 0x03, +} LSM6DS3TR_C_HPCF_XL_e; + +/******************************************************************************* + Register : CTRL8_XL [7] + Address : 0X17 + Bit Group Name: LPF2_XL_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_LPF2_XL_EN_DISABLED = 0x00, + LSM6DS3TR_C_LPF2_XL_EN_ENABLED = 0x01, +} LSM6DS3TR_C_LPF2_XL_EN_e; + +/******************************************************************************* + Register : CTRL9_XL + Address : 0X18 + Bit Group Name: XEN_XL + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_XEN_XL_DISABLED = 0x00, + LSM6DS3TR_C_XEN_XL_ENABLED = 0x08, +} LSM6DS3TR_C_XEN_XL_e; + +/******************************************************************************* + Register : CTRL9_XL + Address : 0X18 + Bit Group Name: YEN_XL + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_YEN_XL_DISABLED = 0x00, + LSM6DS3TR_C_YEN_XL_ENABLED = 0x10, +} LSM6DS3TR_C_YEN_XL_e; + +/******************************************************************************* + Register : CTRL9_XL + Address : 0X18 + Bit Group Name: ZEN_XL + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_ZEN_XL_DISABLED = 0x00, + LSM6DS3TR_C_ZEN_XL_ENABLED = 0x20, +} LSM6DS3TR_C_ZEN_XL_e; + +/******************************************************************************* + Register : CTRL10_C + Address : 0X19 + Bit Group Name: SIGN_MOTION_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SIGN_MOTION_EN_DISABLED = 0x00, + LSM6DS3TR_C_SIGN_MOTION_EN_ENABLED = 0x01, +} LSM6DS3TR_C_SIGN_MOTION_EN_e; + +/******************************************************************************* + Register : CTRL10_C + Address : 0X19 + Bit Group Name: PEDO_RST_STEP + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_PEDO_RST_STEP_DISABLED = 0x00, + LSM6DS3TR_C_PEDO_RST_STEP_ENABLED = 0x02, +} LSM6DS3TR_C_PEDO_RST_STEP_e; + +/******************************************************************************* + Register : CTRL10_C + Address : 0X19 + Bit Group Name: XEN_G + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_XEN_G_DISABLED = 0x00, + LSM6DS3TR_C_XEN_G_ENABLED = 0x08, +} LSM6DS3TR_C_XEN_G_e; + +/******************************************************************************* + Register : CTRL10_C + Address : 0X19 + Bit Group Name: YEN_G + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_YEN_G_DISABLED = 0x00, + LSM6DS3TR_C_YEN_G_ENABLED = 0x10, +} LSM6DS3TR_C_YEN_G_e; + +/******************************************************************************* + Register : CTRL10_C + Address : 0X19 + Bit Group Name: ZEN_G + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_ZEN_G_DISABLED = 0x00, + LSM6DS3TR_C_ZEN_G_ENABLED = 0x20, +} LSM6DS3TR_C_ZEN_G_e; + +/******************************************************************************* + Register : CTRL10_C + Address : 0X19 + Bit Group Name: FUNC_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_FUNC_EN_DISABLED = 0x00, + LSM6DS3TR_C_FUNC_EN_ENABLED = 0x04, +} LSM6DS3TR_C_FUNC_EN_e; + +/******************************************************************************* + Register : MASTER_CONFIG + Address : 0X1A + Bit Group Name: MASTER_ON + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_MASTER_ON_DISABLED = 0x00, + LSM6DS3TR_C_MASTER_ON_ENABLED = 0x01, +} LSM6DS3TR_C_MASTER_ON_e; + +/******************************************************************************* + Register : MASTER_CONFIG + Address : 0X1A + Bit Group Name: IRON_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_IRON_EN_DISABLED = 0x00, + LSM6DS3TR_C_IRON_EN_ENABLED = 0x02, +} LSM6DS3TR_C_IRON_EN_e; + +/******************************************************************************* + Register : MASTER_CONFIG + Address : 0X1A + Bit Group Name: PASS_THRU_MODE + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_PASS_THRU_MODE_DISABLED = 0x00, + LSM6DS3TR_C_PASS_THRU_MODE_ENABLED = 0x04, +} LSM6DS3TR_C_PASS_THRU_MODE_e; + +/******************************************************************************* + Register : MASTER_CONFIG + Address : 0X1A + Bit Group Name: PULL_UP_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_PULL_UP_EN_DISABLED = 0x00, + LSM6DS3TR_C_PULL_UP_EN_ENABLED = 0x08, +} LSM6DS3TR_C_PULL_UP_EN_e; + +/******************************************************************************* + Register : MASTER_CONFIG + Address : 0X1A + Bit Group Name: START_CONFIG + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_START_CONFIG_XL_G_DRDY = 0x00, + LSM6DS3TR_C_START_CONFIG_EXT_INT2 = 0x10, +} LSM6DS3TR_C_START_CONFIG_e; + +/******************************************************************************* + Register : MASTER_CONFIG + Address : 0X1A + Bit Group Name: DATA_VAL_SEL_FIFO + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DATA_VAL_SEL_FIFO_XL_G_DRDY = 0x00, + LSM6DS3TR_C_DATA_VAL_SEL_FIFO_SHUB_DRDY = 0x40, +} LSM6DS3TR_C_DATA_VAL_SEL_FIFO_e; + +/******************************************************************************* + Register : MASTER_CONFIG + Address : 0X1A + Bit Group Name: DRDY_ON_INT1 + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DRDY_ON_INT1_DISABLED = 0x00, + LSM6DS3TR_C_DRDY_ON_INT1_ENABLED = 0x80, +} LSM6DS3TR_C_DRDY_ON_INT1_e; + +/******************************************************************************* + Register : WAKE_UP_SRC + Address : 0X1B + Bit Group Name: Z_WU + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_Z_WU_NOT_DETECTED = 0x00, + LSM6DS3TR_C_Z_WU_DETECTED = 0x01, +} LSM6DS3TR_C_Z_WU_e; + +/******************************************************************************* + Register : WAKE_UP_SRC + Address : 0X1B + Bit Group Name: Y_WU + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_Y_WU_NOT_DETECTED = 0x00, + LSM6DS3TR_C_Y_WU_DETECTED = 0x02, +} LSM6DS3TR_C_Y_WU_e; + +/******************************************************************************* + Register : WAKE_UP_SRC + Address : 0X1B + Bit Group Name: X_WU + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_X_WU_NOT_DETECTED = 0x00, + LSM6DS3TR_C_X_WU_DETECTED = 0x04, +} LSM6DS3TR_C_X_WU_e; + +/******************************************************************************* + Register : WAKE_UP_SRC + Address : 0X1B + Bit Group Name: WU_EV_STATUS + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_WU_EV_STATUS_NOT_DETECTED = 0x00, + LSM6DS3TR_C_WU_EV_STATUS_DETECTED = 0x08, +} LSM6DS3TR_C_WU_EV_STATUS_e; + +/******************************************************************************* + Register : WAKE_UP_SRC + Address : 0X1B + Bit Group Name: SLEEP_EV_STATUS + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SLEEP_EV_STATUS_NOT_DETECTED = 0x00, + LSM6DS3TR_C_SLEEP_EV_STATUS_DETECTED = 0x10, +} LSM6DS3TR_C_SLEEP_EV_STATUS_e; + +/******************************************************************************* + Register : WAKE_UP_SRC + Address : 0X1B + Bit Group Name: FF_EV_STATUS + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_FF_EV_STATUS_NOT_DETECTED = 0x00, + LSM6DS3TR_C_FF_EV_STATUS_DETECTED = 0x20, +} LSM6DS3TR_C_FF_EV_STATUS_e; + +/******************************************************************************* + Register : TAP_SRC + Address : 0X1C + Bit Group Name: Z_TAP + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_Z_TAP_NOT_DETECTED = 0x00, + LSM6DS3TR_C_Z_TAP_DETECTED = 0x01, +} LSM6DS3TR_C_Z_TAP_e; + +/******************************************************************************* + Register : TAP_SRC + Address : 0X1C + Bit Group Name: Y_TAP + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_Y_TAP_NOT_DETECTED = 0x00, + LSM6DS3TR_C_Y_TAP_DETECTED = 0x02, +} LSM6DS3TR_C_Y_TAP_e; + +/******************************************************************************* + Register : TAP_SRC + Address : 0X1C + Bit Group Name: X_TAP + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_X_TAP_NOT_DETECTED = 0x00, + LSM6DS3TR_C_X_TAP_DETECTED = 0x04, +} LSM6DS3TR_C_X_TAP_e; + +/******************************************************************************* + Register : TAP_SRC + Address : 0X1C + Bit Group Name: TAP_SIGN + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_TAP_SIGN_POS_SIGN = 0x00, + LSM6DS3TR_C_TAP_SIGN_NEG_SIGN = 0x08, +} LSM6DS3TR_C_TAP_SIGN_e; + +/******************************************************************************* + Register : TAP_SRC + Address : 0X1C + Bit Group Name: DOUBLE_TAP_EV_STATUS + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DOUBLE_TAP_EV_STATUS_NOT_DETECTED = 0x00, + LSM6DS3TR_C_DOUBLE_TAP_EV_STATUS_DETECTED = 0x10, +} LSM6DS3TR_C_DOUBLE_TAP_EV_STATUS_e; + +/******************************************************************************* + Register : TAP_SRC + Address : 0X1C + Bit Group Name: SINGLE_TAP_EV_STATUS + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SINGLE_TAP_EV_STATUS_NOT_DETECTED = 0x00, + LSM6DS3TR_C_SINGLE_TAP_EV_STATUS_DETECTED = 0x20, +} LSM6DS3TR_C_SINGLE_TAP_EV_STATUS_e; + +/******************************************************************************* + Register : TAP_SRC + Address : 0X1C + Bit Group Name: TAP_EV_STATUS + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_TAP_EV_STATUS_NOT_DETECTED = 0x00, + LSM6DS3TR_C_TAP_EV_STATUS_DETECTED = 0x40, +} LSM6DS3TR_C_TAP_EV_STATUS_e; + +/******************************************************************************* + Register : D6D_SRC + Address : 0X1D + Bit Group Name: DSD_XL + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DSD_XL_NOT_DETECTED = 0x00, + LSM6DS3TR_C_DSD_XL_DETECTED = 0x01, +} LSM6DS3TR_C_DSD_XL_e; + +/******************************************************************************* + Register : D6D_SRC + Address : 0X1D + Bit Group Name: DSD_XH + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DSD_XH_NOT_DETECTED = 0x00, + LSM6DS3TR_C_DSD_XH_DETECTED = 0x02, +} LSM6DS3TR_C_DSD_XH_e; + +/******************************************************************************* + Register : D6D_SRC + Address : 0X1D + Bit Group Name: DSD_YL + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DSD_YL_NOT_DETECTED = 0x00, + LSM6DS3TR_C_DSD_YL_DETECTED = 0x04, +} LSM6DS3TR_C_DSD_YL_e; + +/******************************************************************************* + Register : D6D_SRC + Address : 0X1D + Bit Group Name: DSD_YH + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DSD_YH_NOT_DETECTED = 0x00, + LSM6DS3TR_C_DSD_YH_DETECTED = 0x08, +} LSM6DS3TR_C_DSD_YH_e; + +/******************************************************************************* + Register : D6D_SRC + Address : 0X1D + Bit Group Name: DSD_ZL + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DSD_ZL_NOT_DETECTED = 0x00, + LSM6DS3TR_C_DSD_ZL_DETECTED = 0x10, +} LSM6DS3TR_C_DSD_ZL_e; + +/******************************************************************************* + Register : D6D_SRC + Address : 0X1D + Bit Group Name: DSD_ZH + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DSD_ZH_NOT_DETECTED = 0x00, + LSM6DS3TR_C_DSD_ZH_DETECTED = 0x20, +} LSM6DS3TR_C_DSD_ZH_e; + +/******************************************************************************* + Register : D6D_SRC + Address : 0X1D + Bit Group Name: D6D_EV_STATUS + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_D6D_EV_STATUS_NOT_DETECTED = 0x00, + LSM6DS3TR_C_D6D_EV_STATUS_DETECTED = 0x40, +} LSM6DS3TR_C_D6D_EV_STATUS_e; + +/******************************************************************************* + Register : STATUS_REG + Address : 0X1E + Bit Group Name: XLDA + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_XLDA_NO_DATA_AVAIL = 0x00, + LSM6DS3TR_C_XLDA_DATA_AVAIL = 0x01, +} LSM6DS3TR_C_XLDA_e; + +/******************************************************************************* + Register : STATUS_REG + Address : 0X1E + Bit Group Name: GDA + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_GDA_NO_DATA_AVAIL = 0x00, + LSM6DS3TR_C_GDA_DATA_AVAIL = 0x02, +} LSM6DS3TR_C_GDA_e; + +/******************************************************************************* + Register : STATUS_REG + Address : 0X1E + Bit Group Name: EV_BOOT + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_EV_BOOT_NO_BOOT_RUNNING = 0x00, + LSM6DS3TR_C_EV_BOOT_BOOT_IS_RUNNING = 0x08, +} LSM6DS3TR_C_EV_BOOT_e; + +/******************************************************************************* + Register : FIFO_STATUS1 + Address : 0X3A + Bit Group Name: DIFF_FIFO + Permission : RO +*******************************************************************************/ +#define LSM6DS3TR_C_DIFF_FIFO_STATUS1_MASK 0xFF +#define LSM6DS3TR_C_DIFF_FIFO_STATUS1_POSITION 0 +#define LSM6DS3TR_C_DIFF_FIFO_STATUS2_MASK 0xF +#define LSM6DS3TR_C_DIFF_FIFO_STATUS2_POSITION 0 + +/******************************************************************************* + Register : FIFO_STATUS2 + Address : 0X3B + Bit Group Name: FIFO_EMPTY + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_FIFO_EMPTY_FIFO_NOT_EMPTY = 0x00, + LSM6DS3TR_C_FIFO_EMPTY_FIFO_EMPTY = 0x10, +} LSM6DS3TR_C_FIFO_EMPTY_e; + +/******************************************************************************* + Register : FIFO_STATUS2 + Address : 0X3B + Bit Group Name: FIFO_FULL + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_FIFO_FULL_FIFO_NOT_FULL = 0x00, + LSM6DS3TR_C_FIFO_FULL_FIFO_FULL = 0x20, +} LSM6DS3TR_C_FIFO_FULL_e; + +/******************************************************************************* + Register : FIFO_STATUS2 + Address : 0X3B + Bit Group Name: OVERRUN + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_OVERRUN_NO_OVERRUN = 0x00, + LSM6DS3TR_C_OVERRUN_OVERRUN = 0x40, +} LSM6DS3TR_C_OVERRUN_e; + +/******************************************************************************* + Register : FIFO_STATUS2 + Address : 0X3B + Bit Group Name: WTM + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_WTM_BELOW_WTM = 0x00, + LSM6DS3TR_C_WTM_ABOVE_OR_EQUAL_WTM = 0x80, +} LSM6DS3TR_C_WTM_e; + +/******************************************************************************* + Register : FIFO_STATUS3 + Address : 0X3C + Bit Group Name: FIFO_PATTERN + Permission : RO +*******************************************************************************/ +#define LSM6DS3TR_C_FIFO_STATUS3_PATTERN_MASK 0xFF +#define LSM6DS3TR_C_FIFO_STATUS3_PATTERN_POSITION 0 +#define LSM6DS3TR_C_FIFO_STATUS4_PATTERN_MASK 0x03 +#define LSM6DS3TR_C_FIFO_STATUS4_PATTERN_POSITION 0 + +/******************************************************************************* + Register : FUNC_SRC + Address : 0X53 + Bit Group Name: SENS_HUB_END + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SENS_HUB_END_STILL_ONGOING = 0x00, + LSM6DS3TR_C_SENS_HUB_END_OP_COMPLETED = 0x01, +} LSM6DS3TR_C_SENS_HUB_END_e; + +/******************************************************************************* + Register : FUNC_SRC + Address : 0X53 + Bit Group Name: SOFT_IRON_END + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SOFT_IRON_END_NOT_COMPLETED = 0x00, + LSM6DS3TR_C_SOFT_IRON_END_COMPLETED = 0x02, +} LSM6DS3TR_C_SOFT_IRON_END_e; + +/******************************************************************************* + Register : FUNC_SRC + Address : 0X53 + Bit Group Name: PEDO_EV_STATUS + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_PEDO_EV_STATUS_NOT_DETECTED = 0x00, + LSM6DS3TR_C_PEDO_EV_STATUS_DETECTED = 0x10, +} LSM6DS3TR_C_PEDO_EV_STATUS_e; + +/******************************************************************************* + Register : FUNC_SRC + Address : 0X53 + Bit Group Name: TILT_EV_STATUS + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_TILT_EV_STATUS_NOT_DETECTED = 0x00, + LSM6DS3TR_C_TILT_EV_STATUS_DETECTED = 0x20, +} LSM6DS3TR_C_TILT_EV_STATUS_e; + +/******************************************************************************* + Register : FUNC_SRC + Address : 0X53 + Bit Group Name: SIGN_MOT_EV_STATUS + Permission : RO +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SIGN_MOT_EV_STATUS_NOT_DETECTED = 0x00, + LSM6DS3TR_C_SIGN_MOT_EV_STATUS_DETECTED = 0x40, +} LSM6DS3TR_C_SIGN_MOT_EV_STATUS_e; + +/******************************************************************************* + Register : TAP_CFG1 + Address : 0X58 + Bit Group Name: LIR + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_LIR_DISABLED = 0x00, + LSM6DS3TR_C_LIR_ENABLED = 0x01, +} LSM6DS3TR_C_LIR_e; + +/******************************************************************************* + Register : TAP_CFG1 + Address : 0X58 + Bit Group Name: TAP_Z_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_TAP_Z_EN_DISABLED = 0x00, + LSM6DS3TR_C_TAP_Z_EN_ENABLED = 0x01, +} LSM6DS3TR_C_TAP_Z_EN_e; + +/******************************************************************************* + Register : TAP_CFG1 + Address : 0X58 + Bit Group Name: TAP_Y_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_TAP_Y_EN_DISABLED = 0x00, + LSM6DS3TR_C_TAP_Y_EN_ENABLED = 0x01, +} LSM6DS3TR_C_TAP_Y_EN_e; + +/******************************************************************************* + Register : TAP_CFG1 + Address : 0X58 + Bit Group Name: TAP_X_EN + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_TAP_X_EN_DISABLED = 0x00, + LSM6DS3TR_C_TAP_X_EN_ENABLED = 0x01, +} LSM6DS3TR_C_TAP_X_EN_e; + +/******************************************************************************* + Register : TAP_CFG1 + Address : 0X58 + Bit Group Name: SLOPE_FDS + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SLOPE_FDS_SLOPE = 0x00, + LSM6DS3TR_C_SLOPE_FDS_HPF = 0x01, +} LSM6DS3TR_C_SLOPE_FDS_e; + +/******************************************************************************* + Register : TAP_CFG1 [6:5] + Address : 0X58 + Bit Group Name: INACT_EN[1:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INACT_EN_DISABLED = 0x00, + LSM6DS3TR_C_INACT_EN_GYRO_NOT_CHANGE = 0x01, + LSM6DS3TR_C_INACT_EN_GYRO_SLEEP = 0x02, + LSM6DS3TR_C_INACT_EN_GYRO_POWER_DOWN = 0x03, +} LSM6DS3TR_C_TILT_EN_e; + +/******************************************************************************* + Register : TAP_CFG1 + Address : 0X58 + Bit Group Name: INTERRUPTS_ENABLE + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INTERRUPTS_DISABLE = 0x00, + LSM6DS3TR_C_INTERRUPTS_ENABLE = 0x01, +} LSM6DS3TR_C_INTERRUPTS_ENABLE_e; + +/******************************************************************************* + Register : TAP_THS_6D [6:5] + Address : 0X59 + Bit Group Name: SIXD_THS [1:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SIXD_THS_80_degree = 0x00, + LSM6DS3TR_C_SIXD_THS_70_degree = 0x01, + LSM6DS3TR_C_SIXD_THS_60_degree = 0x02, + LSM6DS3TR_C_SIXD_THS_50_degree = 0x03, +} LSM6DS3TR_C_SIXD_THS_e; + +/******************************************************************************* + Register : INT_DUR2 [1:0] + Address : 0X5A + Bit Group Name: SHOCK[1:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SHOCK_4_OVER_ODR_XL = 0x00, + LSM6DS3TR_C_SHOCK_8_OVER_ODR_XL = 0x01, + LSM6DS3TR_C_SHOCK_16_OVER_ODR_XL = 0x02, + LSM6DS3TR_C_SHOCK_24_OVER_ODR_XL = 0x03, +} LSM6DS3TR_C_SHOCK_e; + +/******************************************************************************* + Register : INT_DUR2 [3:2] + Address : 0X5A + Bit Group Name: QUIET[1:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_QUIET_2_OVER_ODR_XL = 0x00, + LSM6DS3TR_C_QUIET_4_OVER_ODR_XL = 0x01, + LSM6DS3TR_C_QUIET_8_OVER_ODR_XL = 0x02, + LSM6DS3TR_C_QUIET_12_OVER_ODR_XL = 0x03, +} LSM6DS3TR_C_QUIET_e; + +/******************************************************************************* + Register : INT_DUR2 [7:4] + Address : 0X5A + Bit Group Name: DUR[1:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_DUR_16_OVER_ODR_XL = 0x00, + LSM6DS3TR_C_DUR_32_OVER_ODR_XL = 0x01, + LSM6DS3TR_C_DUR_64_OVER_ODR_XL = 0x02, + LSM6DS3TR_C_DUR_96_OVER_ODR_XL = 0x03, + LSM6DS3TR_C_DUR_128_OVER_ODR_XL = 0x04, + LSM6DS3TR_C_DUR_160_OVER_ODR_XL = 0x05, + LSM6DS3TR_C_DUR_192_OVER_ODR_XL = 0x06, + LSM6DS3TR_C_DUR_224_OVER_ODR_XL = 0x07, + LSM6DS3TR_C_DUR_256_OVER_ODR_XL = 0x08, + LSM6DS3TR_C_DUR_288_OVER_ODR_XL = 0x09, + LSM6DS3TR_C_DUR_320_OVER_ODR_XL = 0x0A, + LSM6DS3TR_C_DUR_352_OVER_ODR_XL = 0x0B, + LSM6DS3TR_C_DUR_384_OVER_ODR_XL = 0x0C, + LSM6DS3TR_C_DUR_416_OVER_ODR_XL = 0x0D, + LSM6DS3TR_C_DUR_448_OVER_ODR_XL = 0x0E, + LSM6DS3TR_C_DUR_480_OVER_ODR_XL = 0x0F, +} LSM6DS3TR_C_DUR_e; + +/******************************************************************************* + Register : WAKE_UP_THS + Address : 0X5B + Bit Group Name: SINGLE_DOUBLE_TAP + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_SINGLE_DOUBLE_TAP_SINGLE_ONLY = 0x00, + LSM6DS3TR_C_SINGLE_DOUBLE_TAP_SINGLE_AND_DOUBLE = 0x01, +} LSM6DS3TR_C_SINGLE_DOUBLE_TAP_e; + +/******************************************************************************* + Register : WAKE_UP_DUR + Address : 0X5C + Bit Group Name: SLEEP_DUR + Permission : RW +*******************************************************************************/ +#define LSM6DS3TR_C_SLEEP_DUR_MASK 0x0F +#define LSM6DS3TR_C_SLEEP_DUR_POSITION 0 + +/******************************************************************************* + Register : WAKE_UP_DUR + Address : 0X5C + Bit Group Name: TIMER_HR + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_TIMER_HR_6_4ms = 0x00, + LSM6DS3TR_C_TIMER_HR_25us = 0x10, +} LSM6DS3TR_C_TIMER_HR_e; + +/******************************************************************************* + Register : WAKE_UP_DUR [6:5] + Address : 0X5C + Bit Group Name: WAKE_DUR[1:0] + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_WAKE_DUR_0_ODR_XL = 0x00, + LSM6DS3TR_C_WAKE_DUR_1_ODR_XL = 0x01, + LSM6DS3TR_C_WAKE_DUR_2_ODR_XL = 0x02, + LSM6DS3TR_C_WAKE_DUR_3_ODR_XL = 0x03, +} LSM6DS3TR_C_WAKE_DUR_e; + +/******************************************************************************* + Register : FREE_FALL + Address : 0X5D + Bit Group Name: FF_DUR + Permission : RW +*******************************************************************************/ +#define LSM6DS3TR_C_FF_FREE_FALL_DUR_MASK 0xF8 +#define LSM6DS3TR_C_FF_FREE_FALL_DUR_POSITION 3 +#define LSM6DS3TR_C_FF_WAKE_UP_DUR_MASK 0x80 +#define LSM6DS3TR_C_FF_WAKE_UP_DUR_POSITION 7 + + +/******************************************************************************* + Register : FREE_FALL + Address : 0X5D + Bit Group Name: FF_THS + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_FF_THS_5 = 0x00, + LSM6DS3TR_C_FF_THS_7 = 0x01, + LSM6DS3TR_C_FF_THS_8 = 0x02, + LSM6DS3TR_C_FF_THS_10 = 0x03, + LSM6DS3TR_C_FF_THS_11 = 0x04, + LSM6DS3TR_C_FF_THS_13 = 0x05, + LSM6DS3TR_C_FF_THS_15 = 0x06, + LSM6DS3TR_C_FF_THS_16 = 0x07, +} LSM6DS3TR_C_FF_THS_e; + +/******************************************************************************* + Register : MD1_CFG + Address : 0X5E + Bit Group Name: INT1_TIMER + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_TIMER_DISABLED = 0x00, + LSM6DS3TR_C_INT1_TIMER_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_TIMER_e; + +/******************************************************************************* + Register : MD1_CFG + Address : 0X5E + Bit Group Name: INT1_TILT + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_TILT_DISABLED = 0x00, + LSM6DS3TR_C_INT1_TILT_ENABLED = 0x02, +} LSM6DS3TR_C_INT1_TILT_e; + +/******************************************************************************* + Register : MD1_CFG + Address : 0X5E + Bit Group Name: INT1_6D + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_6D_DISABLED = 0x00, + LSM6DS3TR_C_INT1_6D_ENABLED = 0x04, +} LSM6DS3TR_C_INT1_6D_e; + +/******************************************************************************* + Register : MD1_CFG + Address : 0X5E + Bit Group Name: INT1_TAP + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_DOUBLE_TAP_DISABLED = 0x00, + LSM6DS3TR_C_INT1_DOUBLE_TAP_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_DOUBLE_TAP_e; + +/******************************************************************************* + Register : MD1_CFG + Address : 0X5E + Bit Group Name: INT1_FF + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_FF_DISABLED = 0x00, + LSM6DS3TR_C_INT1_FF_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_FF_e; + +/******************************************************************************* + Register : MD1_CFG + Address : 0X5E + Bit Group Name: INT1_WU + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_WU_DISABLED = 0x00, + LSM6DS3TR_C_INT1_WU_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_WU_e; + +/******************************************************************************* + Register : MD1_CFG + Address : 0X5E + Bit Group Name: INT1_SINGLE_TAP + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_SINGLE_TAP_DISABLED = 0x00, + LSM6DS3TR_C_INT1_SINGLE_TAP_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_SINGLE_TAP_e; + +/******************************************************************************* + Register : MD1_CFG + Address : 0X5E + Bit Group Name: INT1_SLEEP + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT1_SLEEP_DISABLED = 0x00, + LSM6DS3TR_C_INT1_SLEEP_ENABLED = 0x01, +} LSM6DS3TR_C_INT1_SLEEP_e; + +/******************************************************************************* + Register : MD2_CFG + Address : 0X5F + Bit Group Name: INT2_TIMER + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_TIMER_DISABLED = 0x00, + LSM6DS3TR_C_INT2_TIMER_ENABLED = 0x01, +} LSM6DS3TR_C_INT2_TIMER_e; + +/******************************************************************************* + Register : MD2_CFG + Address : 0X5F + Bit Group Name: INT2_TILT + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_TILT_DISABLED = 0x00, + LSM6DS3TR_C_INT2_TILT_ENABLED = 0x02, +} LSM6DS3TR_C_INT2_TILT_e; + +/******************************************************************************* + Register : MD2_CFG + Address : 0X5F + Bit Group Name: INT2_6D + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_6D_DISABLED = 0x00, + LSM6DS3TR_C_INT2_6D_ENABLED = 0x04, +} LSM6DS3TR_C_INT2_6D_e; + +/******************************************************************************* + Register : MD2_CFG + Address : 0X5F + Bit Group Name: INT2_TAP + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_TAP_DISABLED = 0x00, + LSM6DS3TR_C_INT2_TAP_ENABLED = 0x08, +} LSM6DS3TR_C_INT2_TAP_e; + +/******************************************************************************* + Register : MD2_CFG + Address : 0X5F + Bit Group Name: INT2_FF + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_FF_DISABLED = 0x00, + LSM6DS3TR_C_INT2_FF_ENABLED = 0x10, +} LSM6DS3TR_C_INT2_FF_e; + +/******************************************************************************* + Register : MD2_CFG + Address : 0X5F + Bit Group Name: INT2_WU + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_WU_DISABLED = 0x00, + LSM6DS3TR_C_INT2_WU_ENABLED = 0x20, +} LSM6DS3TR_C_INT2_WU_e; + +/******************************************************************************* + Register : MD2_CFG + Address : 0X5F + Bit Group Name: INT2_SINGLE_TAP + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_SINGLE_TAP_DISABLED = 0x00, + LSM6DS3TR_C_INT2_SINGLE_TAP_ENABLED = 0x40, +} LSM6DS3TR_C_INT2_SINGLE_TAP_e; + +/******************************************************************************* + Register : MD2_CFG + Address : 0X5F + Bit Group Name: INT2_SLEEP + Permission : RW +*******************************************************************************/ +typedef enum +{ + LSM6DS3TR_C_INT2_SLEEP_DISABLED = 0x00, + LSM6DS3TR_C_INT2_SLEEP_ENABLED = 0x80, +} LSM6DS3TR_C_INT2_SLEEP_e; + + +/*-------------------------------------------------------------------------------------------------- + * CONVERSION MACROS + *------------------------------------------------------------------------------------------------*/ + +/* Convert Hz value to accelerometer ODR enum */ +#define LSM6DS3TR_C_HZ_TO_ODR_XL(hz) ( \ + (hz) == 0 ? LSM6DS3TR_C_ODR_XL_POWER_DOWN : \ + (hz) == 1 ? LSM6DS3TR_C_ODR_XL_1_6Hz : \ + (hz) == 12 ? LSM6DS3TR_C_ODR_XL_12_5Hz : \ + (hz) == 26 ? LSM6DS3TR_C_ODR_XL_26Hz : \ + (hz) == 52 ? LSM6DS3TR_C_ODR_XL_52Hz : \ + (hz) == 104 ? LSM6DS3TR_C_ODR_XL_104Hz : \ + (hz) == 208 ? LSM6DS3TR_C_ODR_XL_208Hz : \ + (hz) == 416 ? LSM6DS3TR_C_ODR_XL_416Hz : \ + (hz) == 833 ? LSM6DS3TR_C_ODR_XL_833Hz : \ + (hz) == 1666 ? LSM6DS3TR_C_ODR_XL_1666Hz : \ + (hz) == 3332 ? LSM6DS3TR_C_ODR_XL_3332Hz : \ + (hz) == 6664 ? LSM6DS3TR_C_ODR_XL_6664Hz : \ + LSM6DS3TR_C_ODR_XL_POWER_DOWN) + +/* Convert accelerometer ODR enum to Hz value */ +#define LSM6DS3TR_C_ODR_XL_TO_HZ(odr) ( \ + (odr) == LSM6DS3TR_C_ODR_XL_POWER_DOWN ? 0 : \ + (odr) == LSM6DS3TR_C_ODR_XL_1_6Hz ? 1 : \ + (odr) == LSM6DS3TR_C_ODR_XL_12_5Hz ? 12 : \ + (odr) == LSM6DS3TR_C_ODR_XL_26Hz ? 26 : \ + (odr) == LSM6DS3TR_C_ODR_XL_52Hz ? 52 : \ + (odr) == LSM6DS3TR_C_ODR_XL_104Hz ? 104 : \ + (odr) == LSM6DS3TR_C_ODR_XL_208Hz ? 208 : \ + (odr) == LSM6DS3TR_C_ODR_XL_416Hz ? 416 : \ + (odr) == LSM6DS3TR_C_ODR_XL_833Hz ? 833 : \ + (odr) == LSM6DS3TR_C_ODR_XL_1666Hz ? 1666 : \ + (odr) == LSM6DS3TR_C_ODR_XL_3332Hz ? 3332 : \ + (odr) == LSM6DS3TR_C_ODR_XL_6664Hz ? 6664 : 0) + +/* Convert Hz value to gyroscope ODR enum */ +#define LSM6DS3TR_C_HZ_TO_ODR_G(hz) ( \ + (hz) == 0 ? LSM6DS3TR_C_ODR_G_POWER_DOWN : \ + (hz) == 12 ? LSM6DS3TR_C_ODR_G_12_5Hz : \ + (hz) == 26 ? LSM6DS3TR_C_ODR_G_26Hz : \ + (hz) == 52 ? LSM6DS3TR_C_ODR_G_52Hz : \ + (hz) == 104 ? LSM6DS3TR_C_ODR_G_104Hz : \ + (hz) == 208 ? LSM6DS3TR_C_ODR_G_208Hz : \ + (hz) == 416 ? LSM6DS3TR_C_ODR_G_416Hz : \ + (hz) == 833 ? LSM6DS3TR_C_ODR_G_833Hz : \ + (hz) == 1666 ? LSM6DS3TR_C_ODR_G_1666Hz : \ + (hz) == 3332 ? LSM6DS3TR_C_ODR_G_3332Hz : \ + (hz) == 6664 ? LSM6DS3TR_C_ODR_G_6664Hz : \ + LSM6DS3TR_C_ODR_G_POWER_DOWN) + +/* Convert gyroscope ODR enum to Hz value */ +#define LSM6DS3TR_C_ODR_G_TO_HZ(odr) ( \ + (odr) == LSM6DS3TR_C_ODR_G_POWER_DOWN ? 0 : \ + (odr) == LSM6DS3TR_C_ODR_G_12_5Hz ? 12 : \ + (odr) == LSM6DS3TR_C_ODR_G_26Hz ? 26 : \ + (odr) == LSM6DS3TR_C_ODR_G_52Hz ? 52 : \ + (odr) == LSM6DS3TR_C_ODR_G_104Hz ? 104 : \ + (odr) == LSM6DS3TR_C_ODR_G_208Hz ? 208 : \ + (odr) == LSM6DS3TR_C_ODR_G_416Hz ? 416 : \ + (odr) == LSM6DS3TR_C_ODR_G_833Hz ? 833 : \ + (odr) == LSM6DS3TR_C_ODR_G_1666Hz ? 1666 : \ + (odr) == LSM6DS3TR_C_ODR_G_3332Hz ? 3332 : \ + (odr) == LSM6DS3TR_C_ODR_G_6664Hz ? 6664 : 0) + +/* Convert g value to accelerometer full scale enum */ +#define LSM6DS3TR_C_G_TO_FS_XL(g) ( \ + (g) == 2 ? LSM6DS3TR_C_FS_XL_2g : \ + (g) == 4 ? LSM6DS3TR_C_FS_XL_4g : \ + (g) == 8 ? LSM6DS3TR_C_FS_XL_8g : \ + (g) == 16 ? LSM6DS3TR_C_FS_XL_16g : \ + LSM6DS3TR_C_FS_XL_2g) + +/* Convert accelerometer full scale enum to g value */ +#define LSM6DS3TR_C_FS_XL_TO_G(fs) ( \ + (fs) == LSM6DS3TR_C_FS_XL_2g ? 2 : \ + (fs) == LSM6DS3TR_C_FS_XL_4g ? 4 : \ + (fs) == LSM6DS3TR_C_FS_XL_8g ? 8 : \ + (fs) == LSM6DS3TR_C_FS_XL_16g ? 16 : 2) + +/* Convert dps value to gyroscope full scale enum */ +#define LSM6DS3TR_C_DPS_TO_FS_G(dps) ( \ + (dps) == 125 ? LSM6DS3TR_C_FS_G_ABSTR_125dps : \ + (dps) == 250 ? LSM6DS3TR_C_FS_G_ABSTR_250dps : \ + (dps) == 500 ? LSM6DS3TR_C_FS_G_ABSTR_500dps : \ + (dps) == 1000 ? LSM6DS3TR_C_FS_G_ABSTR_1000dps : \ + (dps) == 2000 ? LSM6DS3TR_C_FS_G_ABSTR_2000dps : \ + LSM6DS3TR_C_FS_G_ABSTR_250dps) + +/* Convert gyroscope full scale enum to dps value */ +#define LSM6DS3TR_C_FS_G_TO_DPS(fs) ( \ + (fs) == LSM6DS3TR_C_FS_G_ABSTR_125dps ? 125 : \ + (fs) == LSM6DS3TR_C_FS_G_ABSTR_250dps ? 250 : \ + (fs) == LSM6DS3TR_C_FS_G_ABSTR_500dps ? 500 : \ + (fs) == LSM6DS3TR_C_FS_G_ABSTR_1000dps ? 1000 : \ + (fs) == LSM6DS3TR_C_FS_G_ABSTR_2000dps ? 2000 : 250) + +#endif /* IMU_REG_H_ */ diff --git a/src/bsp/led.c b/src/bsp/led.c new file mode 100644 index 0000000..f2cd413 --- /dev/null +++ b/src/bsp/led.c @@ -0,0 +1,159 @@ +/** + * @file led.c + * @brief LED module for bubble and pin + * @author Kenny Tran + * @date Feb 29 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "../wrappers/pwm.h" + +#include "led.h" + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static uint8_t _led_pwm_inst_id; +static bool _led_init = false; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e LED_init (void) +{ + ERRNO_e err; + + if (_led_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (PWM_init (&_led_pwm_inst_id, LED_PWM_PERIOD_NS) != ERRNO_SUCCESS) + { + return ERRNO_PWM_FAILURE; + } + + /* Set initialized flag. */ + _led_init = true; + + /* Initialize all LEDs to off. */ + err = LED_pwm_set (LED_BUBBLE, 0.0); + err |= LED_pwm_set (LED_PIN, 0.0); + err |= LED_pwm_set (LED_FIBER, 0.0); + + return err; +} + +ERRNO_e LED_pwm_set (LED_e led, float duty_cycle) +{ + /* Each PWM instance supports 4 PWM channels. Configure pins on different channels. + * Pin = channel 0 + * Bubble = channel 1 + * Fiber = channel 2 + */ + + if (!_led_init) + { + return ERRNO_NOT_INITIALIZED; + } + else if (duty_cycle > (float) 100.0 || duty_cycle < (float) 0.0) + { + return ERRNO_INVALID_PARAM; + } + + if (PWM_duty_cycle_set (_led_pwm_inst_id, (PWM_ch_e) led, duty_cycle)) + { + return ERRNO_PWM_FAILURE; + } + + return ERRNO_SUCCESS; +} + +void LED_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 1) + { + if (!strcmp (argv[0], "--init") || !strcmp (argv[0], "-i")) + { + PRINT (INFO, "Ret code : %d\r\n", LED_init ()); + } + else + { + goto USAGE; + } + } + else if (argc == 3) + { + if (!strcmp (argv[0], "--set") || !strcmp (argv[0], "-s")) + { + float dc = strtof (argv[2], NULL); + + if (!strcmp (argv[1], "pin")) + { + PRINT (INFO, "Ret code : %d\r\n", LED_pwm_set (LED_PIN, dc)); + } + else if (!strcmp (argv[1], "bubble")) + { + PRINT (INFO, "Ret code : %d\r\n", LED_pwm_set (LED_BUBBLE, dc)); + } + else if (!strcmp (argv[1], "fiber")) + { + PRINT (INFO, "Ret code : %d\r\n", LED_pwm_set (LED_FIBER, dc)); + } + else + { + goto USAGE; + } + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: led [OPTION...]\r\n"); + PRINT (INFO, " -i | --init Initializes LED module\r\n"); + PRINT (INFO, " -s | --set Sets LED to specified PWM duty cycle\r\n"); + PRINT (INFO, " <%%s> [bubble | pin | fiber]\r\n"); + PRINT (INFO, " <%%f> Duty Cycle\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ diff --git a/src/bsp/led.h b/src/bsp/led.h new file mode 100644 index 0000000..c886281 --- /dev/null +++ b/src/bsp/led.h @@ -0,0 +1,59 @@ +/** + * @file led.h + * @brief LED module for bubble and pin + * @author Kenny Tran + * @date Feb 29 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef LED_H_ +#define LED_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "../lib/errno.h" + +#include "../wrappers/pwm.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define LED_PWM_PERIOD_US (4000) /* 250 Hz */ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +/** Each PWM instance supports 4 PWM channels. Configure pins on different channels. + * Bubble = channel 0 + * Pin = channel 1 + * Fiber = channel 2 + */ +typedef enum LED +{ + LED_BUBBLE = PWM_CH_0, + LED_PIN = PWM_CH_1, + LED_FIBER = PWM_CH_2 +} LED_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e LED_init (void); + +ERRNO_e LED_pwm_set (LED_e led, float duty_cycle); + +void LED_cli_cmd (int32_t argc, char **argv); + + +#endif /* LED_H_ */ diff --git a/src/bsp/led_ring.c b/src/bsp/led_ring.c new file mode 100644 index 0000000..879ebb8 --- /dev/null +++ b/src/bsp/led_ring.c @@ -0,0 +1,501 @@ +/** + * @file led_ring.c + * @brief LED ring module + * @author Kenny Tran + * @date Feb 29 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include +#include + +#include "../lib/errno.h" +#include "../lib/print.h" +#include "../lib/rgb.h" + +#include "../wrappers/gpio.h" + +#include "led_ring.h" + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct led_rgb _led_ring_rgb_s; + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static const struct device *const _led_ring = DEVICE_DT_GET(DT_ALIAS(led_ring)); +static _led_ring_rgb_s _led_ring_rgb_arr[LED_RING_PIXELS]; +static _led_ring_rgb_s _led_ring_rgb_arr_prev[LED_RING_PIXELS]; +static bool _led_ring_init = false; +static bool _led_ring_din = false; +static uint16_t _led_ring_rainbow_bounds = LED_RING_PIXELS - 1; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static RGB_s _led_ring_hsv (uint16_t hue, uint8_t sat, uint8_t val); +static void _led_ring_din_isr (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e LED_RING_init (void) +{ + if (_led_ring_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (!device_is_ready (_led_ring)) + { + return ERRNO_NOT_READY; + } + + /* Initialize GPIO used to control FET (power to LED ring). */ + if (GPIO_init () < ERRNO_SUCCESS) + { + return ERRNO_GPIO_FAILURE; + } + + /* Configure GPIO as output and initialize to low. */ + if (GPIO_cfg (GPIO_PIN_LED_RING_PWR, GPIO_DIRECTION_OUT, GPIO_PULLNONE, GPIO_INIT_LOW, GPIO_INT_STATE_CHANGE_LL_HIGH, NULL)) + { + return ERRNO_GPIO_FAILURE; + } + + /* Configure GPIO as output to enable / disable level shifter. */ + if (GPIO_cfg (GPIO_PIN_LED_RING_LEVEL_SHIFT_ENABLE, GPIO_DIRECTION_OUT, GPIO_PULLNONE, GPIO_INIT_LOW, GPIO_INT_STATE_CHANGE_LL_HIGH, NULL)) + { + return ERRNO_GPIO_FAILURE; + } + + /* Configure GPIO for data in from LED ring. */ + if (GPIO_cfg (GPIO_PIN_LED_RING_DIN, GPIO_DIRECTION_IN, GPIO_PULLNONE, GPIO_INIT_LOW, GPIO_INT_STATE_CHANGE_LL_HIGH, _led_ring_din_isr)) + { + return ERRNO_GPIO_FAILURE; + } + + /* Set initialized flag. */ + _led_ring_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e LED_RING_clear (void) +{ + if (!_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Zero out RGB array. */ + memset (_led_ring_rgb_arr, 0, sizeof (_led_ring_rgb_arr)); + + return ERRNO_SUCCESS; +} + +ERRNO_e LED_RING_set (uint16_t idx, uint8_t r, uint8_t g, uint8_t b) +{ + if (!_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + else if (idx >= LED_RING_PIXELS) + { + return ERRNO_INVALID_PARAM; + } + + /* Update RGB array. */ + _led_ring_rgb_arr[idx].r = r; + _led_ring_rgb_arr[idx].g = g; + _led_ring_rgb_arr[idx].b = b; + + return ERRNO_SUCCESS; +} + +ERRNO_e LED_RING_bounds_set (uint16_t idx) +{ + if (!_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + + _led_ring_rainbow_bounds = idx; + + return ERRNO_SUCCESS; +} + +/* + @param first_hue Hue of first pixel, 0-65535, representing one full + cycle of the color wheel. Each subsequent pixel will + be offset to complete one or more cycles over the + length of the strip. + @param reps Number of cycles of the color wheel over the length + of the strip. Default is 1. Negative values can be + used to reverse the hue order. + @param saturation Saturation (optional), 0-255 = gray to pure hue, + default = 255. + @param brightness Brightness/value (optional), 0-255 = off to max, + default = 255. This is distinct and in combination + with any configured global strip brightness. + @param gammify If true (default), apply gamma correction to colors + for better appearance. +*/ +ERRNO_e LED_RING_rainbow (uint16_t first_hue, int8_t reps, uint8_t sat, uint8_t brightness, bool gammify) +{ + ERRNO_e err = ERRNO_SUCCESS; + uint8_t i; + static const uint8_t rgb_gamma_table[] = + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, + 2, 3, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 5, 5, 5, + 5, 6, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, + 10, 10, 11, 11, 11, 12, 12, 13, 13, 13, 14, 14, 15, 15, 16, 16, + 17, 17, 18, 18, 19, 19, 20, 20, 21, 21, 22, 22, 23, 24, 24, 25, + 25, 26, 27, 27, 28, 29, 29, 30, 31, 32, 32, 33, 34, 35, 35, 36, + 37, 38, 39, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 50, + 51, 52, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 66, 67, 68, + 69, 70, 72, 73, 74, 75, 77, 78, 79, 81, 82, 83, 85, 86, 87, 89, + 90, 92, 93, 95, 96, 98, 99, 101, 102, 104, 105, 107, 109, 110, 112, 114, + 115, 117, 119, 120, 122, 124, 126, 127, 129, 131, 133, 135, 137, 138, 140, 142, + 144, 146, 148, 150, 152, 154, 156, 158, 160, 162, 164, 167, 169, 171, 173, 175, + 177, 180, 182, 184, 186, 189, 191, 193, 196, 198, 200, 203, 205, 208, 210, 213, + 215, 218, 220, 223, 225, 228, 231, 233, 236, 239, 241, 244, 247, 249, 252, 255 + }; + + if (!_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + + for (i = 0; i <= _led_ring_rainbow_bounds; i++) + { + uint16_t hue = first_hue + (i * reps * 65536) / LED_RING_PIXELS; + RGB_s color = _led_ring_hsv (hue, sat, brightness); + + if (gammify) + { + color.r = rgb_gamma_table[color.r]; + color.g = rgb_gamma_table[color.g]; + color.b = rgb_gamma_table[color.b]; + } + + err |= LED_RING_set (i, color.r, color.g, color.b); + } + + return err; +} + +ERRNO_e LED_RING_update (void) +{ + if (!_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (!memcmp (_led_ring_rgb_arr, _led_ring_rgb_arr_prev, sizeof (_led_ring_rgb_arr))) + { + return ERRNO_SUCCESS; + } + + memcpy (_led_ring_rgb_arr_prev, _led_ring_rgb_arr, sizeof (_led_ring_rgb_arr)); + + if (led_strip_update_rgb (_led_ring, _led_ring_rgb_arr, LED_RING_PIXELS)) + { + return ERRNO_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e LED_RING_enable (bool en) +{ + if (!_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Enable / disable level shifter for LED ring. Active-high. */ + if (GPIO_level_set (GPIO_PIN_LED_RING_LEVEL_SHIFT_ENABLE, en)) + { + return ERRNO_GPIO_FAILURE; + } + + /* Enable / disable power to LED ring. Active-high. */ + if (GPIO_level_set (GPIO_PIN_LED_RING_PWR, en)) + { + return ERRNO_GPIO_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e LED_RING_din_received (bool *p_rx) +{ + if (!_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + + *p_rx = _led_ring_din; + + _led_ring_din = false; + + return ERRNO_SUCCESS; +} + +void LED_RING_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 1) + { + if (!strcmp (argv[0], "--init") || !strcmp (argv[0], "-i")) + { + PRINT (INFO, "Ret code : %d\r\n", LED_RING_init ()); + } + else if (!strcmp (argv[0], "--update") || !strcmp (argv[0], "-u")) + { + PRINT (INFO, "Ret code : %d\r\n", LED_RING_update ()); + } + else if (!strcmp (argv[0], "--din")) + { + bool din; + + PRINT (INFO, "Ret code : %d\r\n", LED_RING_din_received (&din)); + PRINT (INFO, "DIN : %s\r\n", (din ? "true" : "false")); + } + else + { + goto USAGE; + } + } + else if (argc == 2) + { + if (!strcmp (argv[0], "--enable") || !strcmp (argv[0], "-e")) + { + if (!strcmp (argv[1], "true")) + { + PRINT (INFO, "Ret code : %d\r\n", LED_RING_enable (true)); + } + else if (!strcmp (argv[1], "false")) + { + PRINT (INFO, "Ret code : %d\r\n", LED_RING_enable (false)); + } + else + { + goto USAGE; + } + + } + else + { + goto USAGE; + } + } + else if (argc == 5) + { + if (!strcmp (argv[0], "--set") || !strcmp (argv[0], "-s")) + { + uint16_t idx = (uint16_t) strtoul (argv[1], NULL, 0); + uint8_t r = (uint8_t) strtoul (argv[2], NULL, 0); + uint8_t g = (uint8_t) strtoul (argv[3], NULL, 0); + uint8_t b = (uint8_t) strtoul (argv[4], NULL, 0); + + PRINT (INFO, "Ret code : %d\r\n", LED_RING_set (idx, r, g, b)); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: led_ring [OPTION...]\r\n"); + PRINT (INFO, " -i | --init Initializes LED ring module\r\n"); + PRINT (INFO, " -e | --enable Enables power to the LED ring\r\n"); + PRINT (INFO, " <%%b> true = enable\r\n"); + PRINT (INFO, " false = disable\r\n"); + PRINT (INFO, " -s | --set Sets addressed pixel to specified RGB value\r\n"); + PRINT (INFO, " <%%d> LED index\r\n"); + PRINT (INFO, " <%%d> Red [0-255]\r\n"); + PRINT (INFO, " <%%d> Green [0-255]\r\n"); + PRINT (INFO, " <%%d> Blue [0-255]\r\n"); + PRINT (INFO, " -u | --update Updates / refreshes LED ring to newest setting\r\n"); + PRINT (INFO, " --din Checks if data out from LED ring is going back to MCU\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +/*! + @brief Convert hue, saturation and value into a packed 32-bit RGB color + that can be passed to setPixelColor() or other RGB-compatible + functions. + @param hue An unsigned 16-bit value, 0 to 65535, representing one full + loop of the color wheel, which allows 16-bit hues to "roll + over" while still doing the expected thing (and allowing + more precision than the wheel() function that was common to + prior NeoPixel examples). + @param sat Saturation, 8-bit value, 0 (min or pure grayscale) to 255 + (max or pure hue). Default of 255 if unspecified. + @param val Value (brightness), 8-bit value, 0 (min / black / off) to + 255 (max or full brightness). Default of 255 if unspecified. + @return Packed 32-bit RGB with the most significant byte set to 0 -- the + white element of WRGB pixels is NOT utilized. Result is linearly + but not perceptually correct, so you may want to pass the result + through the gamma32() function (or your own gamma-correction + operation) else colors may appear washed out. This is not done + automatically by this function because coders may desire a more + refined gamma-correction function than the simplified + one-size-fits-all operation of gamma32(). Diffusing the LEDs also + really seems to help when using low-saturation colors. +*/ +static RGB_s _led_ring_hsv (uint16_t hue, uint8_t sat, uint8_t val) +{ + RGB_s color; + uint32_t packed; + /* Remap 0-65535 to 0-1529. Pure red is CENTERED on the 64K rollover; + * 0 is not the start of pure red, but the midpoint...a few values above + * zero and a few below 65536 all yield pure red (similarly, 32768 is the + * midpoint, not start, of pure cyan). The 8-bit RGB hexcone (256 values + * each for red, green, blue) really only allows for 1530 distinct hues + * (not 1536, more on that below), but the full unsigned 16-bit type was + * chosen for hue so that one's code can easily handle a contiguous color + * wheel by allowing hue to roll over in either direction. + */ + hue = (hue * 1530L + 32768) / 65536; + /* Because red is centered on the rollover point (the +32768 above, + * essentially a fixed-point + 0.5), the above actually yields 0 to 1530, + * where 0 and 1530 would yield the same thing. Rather than apply a + * costly modulo operator, 1530 is handled as a special case below. + */ + + /* So you'd think that the color "hexcone" (the thing that ramps from + * pure red, to pure yellow, to pure green and so forth back to red, + * yielding six slices), and with each color component having 256 + * possible values (0-255), might have 1536 possible items (6*256), + * but in reality there's 1530. This is because the last element in + * each 256-element slice is equal to the first element of the next + * slice, and keeping those in there this would create small + * discontinuities in the color wheel. So the last element of each + * slice is dropped...we regard only elements 0-254, with item 255 + * being picked up as element 0 of the next slice. Like this: + * Red to not-quite-pure-yellow is: 255, 0, 0 to 255, 254, 0 + * Pure yellow to not-quite-pure-green is: 255, 255, 0 to 1, 255, 0 + * Pure green to not-quite-pure-cyan is: 0, 255, 0 to 0, 255, 254 + * and so forth. Hence, 1530 distinct hues (0 to 1529), and hence why + * the constants below are not the multiples of 256 you might expect. + */ + + /* Convert hue to R,G,B (nested ifs faster than divide+mod+switch) */ + if (hue < 510) + { + /* Red to Green-1 */ + color.b = 0; + if (hue < 255) + { + /* Red to Yellow-1 */ + color.r = 255; + /* color.g = 0 to 254 */ + color.g = hue; + } + else + { + /* Yellow to Green-1 */ + /* color.r = 255 to 1 */ + color.r = 510 - hue; + color.g = 255; + } + } + else if (hue < 1020) + { + /* Green to Blue-1 */ + color.r = 0; + if (hue < 765) + { + /* Green to Cyan-1 */ + color.g = 255; + /* color.b = 0 to 254 */ + color.b = hue - 510; + } + else + { + /* Cyan to Blue-1 */ + /* color.g = 255 to 1 */ + color.g = 1020 - hue; + color.b = 255; + } + } + else if (hue < 1530) + { + /* Blue to Red-1 */ + color.g = 0; + if (hue < 1275) + { + /* Blue to Magenta-1 */ + /* color.r = 0 to 254 */ + color.r = hue - 1020; + color.b = 255; + } + else + { + /* Magenta to Red-1 */ + color.r = 255; + /* color.b = 255 to 1 */ + color.b = 1530 - hue; + } + } + else + { + /* Last 0.5 Red (quicker than % operator) */ + color.r = 255; + color.g = color.b = 0; + } + + /* Apply saturation and value to R,G,B, pack into 32-bit result. */ + uint32_t v1 = 1 + val; /* 1 to 256; allows >> 8 instead of / 255. */ + uint16_t s1 = 1 + sat; /* 1 to 256; allows >> 8 instead of / 255. */ + uint8_t s2 = 255 - sat; /* 255 to 0 */ + + packed = ((((((color.r * s1) >> 8) + s2) * v1) & 0xff00) << 8) | + (((((color.g * s1) >> 8) + s2) * v1) & 0xff00) | + (((((color.b * s1) >> 8) + s2) * v1) >> 8); + + return (RGB_s) { .r = ((packed >> 16) & 0xFF), + .g = ((packed >> 8) & 0xFF), + .b = ((packed >> 0) & 0xFF) }; +} + +static void _led_ring_din_isr (void) +{ + _led_ring_din = true; +} + + diff --git a/src/bsp/led_ring.h b/src/bsp/led_ring.h new file mode 100644 index 0000000..67bb933 --- /dev/null +++ b/src/bsp/led_ring.h @@ -0,0 +1,60 @@ +/** + * @file led_ring.h + * @brief LED ring module + * @author Kenny Tran + * @date Feb 29 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef LED_RING_H_ +#define LED_RING_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +// #define LED_RING_PIXELS DT_PROP(DT_ALIAS(led_ring), chain_length) +#define LED_RING_PIXELS (24) +#define LED_RING_MAX_BRIGHTNESS (255) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e LED_RING_init (void); + +ERRNO_e LED_RING_clear (void); + +ERRNO_e LED_RING_set (uint16_t idx, uint8_t r, uint8_t g, uint8_t b); + +ERRNO_e LED_RING_bounds_set (uint16_t idx); + +ERRNO_e LED_RING_rainbow (uint16_t first_hue, int8_t reps, uint8_t sat, uint8_t brightness, bool gammify); + +ERRNO_e LED_RING_update (void); + +ERRNO_e LED_RING_enable (bool en); + +ERRNO_e LED_RING_din_received (bool *p_rx); + +void LED_RING_cli_cmd (int32_t argc, char **argv); + + +#endif /* LED_RING_H_ */ diff --git a/src/bsp/mcu.c b/src/bsp/mcu.c new file mode 100644 index 0000000..473f473 --- /dev/null +++ b/src/bsp/mcu.c @@ -0,0 +1,365 @@ +/** + * @file mcu.c + * @brief MCU module + * @author Kenny Tran + * @date Aug 16 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "../lib/errno.h" +#include "../lib/crc.h" +#include "../lib/print.h" + +#include "mcu.h" + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define _MCU_RAM_RETENTION_CRC_LEN (4) + +/* nRF52 RAM (really, RAM AHB slaves) are partitioned as: + * * Up to 8 blocks of two 4 KiBy byte "small" sections + * * A 9th block of with 32 KiBy "large" sections + * + * At time of writing the maximum number of large sections is 6, all + * within the first large block. Theoretically there could be more + * sections in the 9th block, and possibly more blocks. + */ +/* Inclusive address of RAM start */ +#define _MCU_SRAM_BEGIN (uintptr_t)DT_REG_ADDR(DT_NODELABEL(sram0)) + +/* Exclusive address of RAM end */ +#define _MCU_SRAM_END (_MCU_SRAM_BEGIN + (uintptr_t)DT_REG_SIZE(DT_NODELABEL(sram0))) + +/* Size of a controllable RAM section in the small blocks */ +#define _MCU_SMALL_SECTION_SIZE (4096) + +/* Number of controllable RAM sections in each of the lower blocks */ +#define _MCU_SMALL_SECTIONS_PER_BLOCK (2) + +/* Span of a small block */ +#define _MCU_SMALL_BLOCK_SIZE (_MCU_SMALL_SECTIONS_PER_BLOCK * _MCU_SMALL_SECTION_SIZE) + +/* Number of small blocks */ +#define _MCU_SMALL_BLOCK_COUNT (8) + +/* Span of the SRAM area covered by small sections */ +#define _MCU_SMALL_SECTION_SPAN (_MCU_SMALL_BLOCK_COUNT * _MCU_SMALL_BLOCK_SIZE) + +/* Inclusive address of the RAM range covered by large sections */ +#define _MCU_LARGE_SECTION_BEGIN (_MCU_SRAM_BEGIN + _MCU_SMALL_SECTION_SPAN) + +/* Size of a controllable RAM section in large blocks */ +#define _MCU_LARGE_SECTION_SIZE (32768) + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +__noinit static uint8_t _mcu_ram_data[MCU_RAM_RETENTION_LEN + _MCU_RAM_RETENTION_CRC_LEN]; +// another option: static uint8_t _mcu_ram_data[MCU_RAM_RETENTION_LEN + _MCU_RAM_RETENTION_CRC_LEN] __attribute__((section(".noinit"))); + static bool _mcu_init = false; + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +/* Set or clear RAM retention in SYSTEM_OFF for the provided object. + * + * @note This only works for nRF52 with the POWER module. The other + * Nordic chips use a different low-level API, which is not currently + * used by this function. + * + * @param ptr pointer to the start of the retainable object + * + * @param len length of the retainable object + * + * @param enable true to enable retention, false to clear retention + */ +static void _mcu_ram_retain (const void *ptr, size_t len, bool enable); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e MCU_init (void) +{ + if (_mcu_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + else if (CRC_init () < ERRNO_SUCCESS) + { + return ERRNO_CRC_FAILURE; + } + + _mcu_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e MCU_reset (bool cold) +{ + if (!_mcu_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (cold) + { + sys_reboot (SYS_REBOOT_COLD); + } + else + { + sys_reboot (SYS_REBOOT_WARM); + } + + return ERRNO_SUCCESS; +} + +ERRNO_e MCU_sleep (void) +{ + if (!_mcu_init) + { + return ERRNO_NOT_INITIALIZED; + } + + sys_poweroff (); + + return ERRNO_SUCCESS; +} + +ERRNO_e MCU_ram_retain (uint8_t *p_data, uint16_t len, bool enable) +{ + uint32_t checksum; + + if (!_mcu_init) + { + return ERRNO_NOT_INITIALIZED; + } + else if (len > MCU_RAM_RETENTION_LEN) + { + return ERRNO_LIMIT_REACHED; + } + + if (enable) + { + /* Calculate CRC checksum of data. */ + if (CRC_32_calculate (p_data, len, CRC_32_CHECKSUM_INIT, &checksum)) + { + return ERRNO_CRC_FAILURE; + } + + /* Copy data to retention buffer. */ + memcpy (_mcu_ram_data, p_data, len); + /* Append CRC checksum. */ + memcpy (&_mcu_ram_data[len], &checksum, _MCU_RAM_RETENTION_CRC_LEN); + } + + _mcu_ram_retain (_mcu_ram_data, sizeof (_mcu_ram_data), enable); + + return ERRNO_SUCCESS; +} + +ERRNO_e MCU_ram_fetch (uint8_t *p_dest, uint16_t len) +{ + uint32_t checksum; + + if (!_mcu_init) + { + return ERRNO_NOT_INITIALIZED; + } + else if (len > MCU_RAM_RETENTION_LEN) + { + return ERRNO_LIMIT_REACHED; + } + + /* Calculate CRC checksum of data. */ + if (CRC_32_calculate (_mcu_ram_data, len, CRC_32_CHECKSUM_INIT, &checksum)) + { + return ERRNO_CRC_FAILURE; + } + + if (checksum != *(uint32_t *) &_mcu_ram_data[len]) + { + memset (p_dest, 0, len); + return ERRNO_CRC_FAILURE; + } + + /* Copy data to retention buffer. */ + memcpy (p_dest, _mcu_ram_data, len); + + return ERRNO_SUCCESS; +} + +void MCU_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 1) + { + if (!strcmp (argv[0], "--init") || !strcmp (argv[0], "-i")) + { + PRINT (INFO, "Ret code : %d\r\n", MCU_init ()); + } + else if (!strcmp (argv[0], "--sleep") || !strcmp (argv[0], "-s")) + { + PRINT (INFO, "Ret code : %d\r\n", MCU_sleep ()); + } + else + { + goto USAGE; + } + } + else if (argc == 2) + { + if (!strcmp (argv[0], "--reset") || !strcmp (argv[0], "-r")) + { + if (!strcmp (argv[1], "cold")) + { + PRINT (INFO, "Ret code : %d\r\n", MCU_reset (true)); + } + else if (!strcmp (argv[1], "warm")) + { + PRINT (INFO, "Ret code : %d\r\n", MCU_reset (false)); + } + else + { + goto USAGE; + } + } + else + { + goto USAGE; + } + } + else if (argc == 3) + { + + if (!strcmp (argv[0], "--ram")) + { + if (!strcmp (argv[1], "fetch")) + { + uint8_t len = (uint8_t) strtoul (argv[2], NULL, 0); + uint8_t buf[len + 1]; + + buf[len] = 0; // NULL termination + + PRINT (INFO, "Ret code : %d\r\n", MCU_ram_fetch (buf, len)); + + PRINT (INFO, "Ram data : %s\r\n", buf); + } + else if (!strcmp (argv[1], "write")) + { + PRINT (INFO, "Ret code : %d\r\n", MCU_ram_retain (argv[2], strlen (argv[2]), true)); + } + else + { + goto USAGE; + } + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: mcu [OPTION...]\r\n"); + PRINT (INFO, " -i | --init Initializes MCU\r\n"); + PRINT (INFO, " -r | --reset Resets MCU\r\n"); + PRINT (INFO, " <%%s> [cold, warm]\r\n"); + PRINT (INFO, " -s | --sleep Puts MCU to sleep\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _mcu_ram_retain (const void *ptr, size_t len, bool enable) +{ + uintptr_t addr = (uintptr_t)ptr; + uintptr_t addr_end = addr + len; + + /* Error if the provided range is empty or doesn't lie + * entirely within the SRAM address space. + */ + if ((len == 0U) || (addr < _MCU_SRAM_BEGIN) || (addr > (_MCU_SRAM_END - len))) + { + PRINT (ERROR, "Range is empty or doesn't lie entirely within SRAM space\r\n"); + return; + } + + /* Iterate over each section covered by the range, setting the + * corresponding RAM OFF retention bit in the parent block. + */ + do { + uintptr_t block_base = _MCU_SRAM_BEGIN; + uint32_t section_size = _MCU_SMALL_SECTION_SIZE; + uint32_t sections_per_block = _MCU_SMALL_SECTIONS_PER_BLOCK; + bool is_large = (addr >= _MCU_LARGE_SECTION_BEGIN); + uint8_t block = 0; + uint32_t section; + uint32_t section_mask; + + if (is_large) + { + block = 8; + block_base = _MCU_LARGE_SECTION_BEGIN; + section_size = _MCU_LARGE_SECTION_SIZE; + + /* RAM[x] supports only 16 sections, each its own bit + * for POWER (0..15) and RETENTION (16..31). We don't + * know directly how many sections are present, so + * assume they all are; the true limit will be + * determined by the SRAM size. + */ + sections_per_block = 16; + } + + section = (addr - block_base) / section_size; + + if (section >= sections_per_block) + { + block += section / sections_per_block; + section %= sections_per_block; + } + + section_mask = (POWER_RAM_POWERSET_S0RETENTION_On << (section + POWER_RAM_POWERSET_S0RETENTION_Pos)); + + if (enable) + { + nrf_power_rampower_mask_on (NRF_POWER, block, section_mask); + } + else + { + nrf_power_rampower_mask_off (NRF_POWER, block, section_mask); + } + + /* Move to the first address in the next section. */ + addr += section_size - (addr % section_size); + } while (addr < addr_end); +} diff --git a/src/bsp/mcu.h b/src/bsp/mcu.h new file mode 100644 index 0000000..029a9d0 --- /dev/null +++ b/src/bsp/mcu.h @@ -0,0 +1,53 @@ +/** + * @file mcu.h + * @brief MCU module + * @author Kenny Tran + * @date Aug 16 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef MCU_H_ +#define MCU_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define MCU_RAM_RETENTION_LEN (512) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e MCU_init (void); + +ERRNO_e MCU_reset (bool cold); + +ERRNO_e MCU_sleep (void); + +ERRNO_e MCU_ram_retain (uint8_t *p_data, uint16_t len, bool enable); + +ERRNO_e MCU_ram_fetch (uint8_t *p_dest, uint16_t len); + +void MCU_cli_cmd (int32_t argc, char **argv); + + +#endif /* MCU_H_ */ diff --git a/src/bsp/nvm_ext.c b/src/bsp/nvm_ext.c new file mode 100644 index 0000000..c4acfe1 --- /dev/null +++ b/src/bsp/nvm_ext.c @@ -0,0 +1,736 @@ +/** + * @file nvm_ext.c + * @brief Non-volatile memory external module : W25Q16JV + * @author Kenny Tran + * @date Feb 29 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include + +#include + +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "../wrappers/spi.h" + +#include "nvm_ext.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define _NVM_EXT_MFG_ID (0xC8) /* C8 for GD25Q1C */ +#define _NVM_EXT_DEV_ID (0x4015) +// #define _NVM_EXT_DEV_ID (0x4015) /* 0x4015 for W25Q16JV-IQ/JQ +// 0x7015 for W25Q16JV-IM/JM */ +#define _NVM_EXT_JEDEC_ID ((_NVM_EXT_MFG_ID << 16) | _NVM_EXT_DEV_ID) + +/** + * @brief For use with reading NVM external status bit. + * */ +#define _NVM_EXT_STATUS_BUSY_MASK (0x01) +#define _NVM_EXT_STATUS_BUSY (0x01) + +/** + * @brief Value after byte is erased. Nature of a NOR NVM external chip. + */ +#define _NVM_EXT_ERASED_BYTE_VAL (0xFF) + +/** + * @brief Macro used for splitting larger values in to byte-size pieces. + */ +#define _NVM_EXT_SPLIT_BYTE(x, offset) (0xFF & (x >> (8 * offset))) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct _nvm_ext_reg +{ + uint32_t opcode; + uint8_t tx_len; /* Note: Includes dummy bytes */ + uint8_t rx_len; +} _nvm_ext_reg_s; + +typedef struct _nvm_ext_regs +{ + _nvm_ext_reg_s wr_enable; + _nvm_ext_reg_s sr_wr_enable; + _nvm_ext_reg_s wr_disable; + _nvm_ext_reg_s pwr_down_release; + _nvm_ext_reg_s mfg_id; + _nvm_ext_reg_s jedec_id; + _nvm_ext_reg_s unique_id; + _nvm_ext_reg_s rd_data; + _nvm_ext_reg_s fast_rd_data; + _nvm_ext_reg_s page_program; + _nvm_ext_reg_s sector_erase_4k; + _nvm_ext_reg_s block_erase_32k; + _nvm_ext_reg_s block_erase_64k; + _nvm_ext_reg_s chip_erase; + _nvm_ext_reg_s rd_status_1; + _nvm_ext_reg_s wr_status_1; + _nvm_ext_reg_s rd_status_2; + _nvm_ext_reg_s wr_status_2; + _nvm_ext_reg_s rd_status_3; + _nvm_ext_reg_s wr_status_3; + _nvm_ext_reg_s sfdp; + _nvm_ext_reg_s erase_security; + _nvm_ext_reg_s program_security; + _nvm_ext_reg_s rd_security; + _nvm_ext_reg_s gbl_block_lock; + _nvm_ext_reg_s gbl_block_unlock; + _nvm_ext_reg_s rd_block_lock; + _nvm_ext_reg_s individual_block_lock; + _nvm_ext_reg_s individual_block_unlock; + _nvm_ext_reg_s erase_suspend; + _nvm_ext_reg_s erase_resume; + _nvm_ext_reg_s pwr_down; + _nvm_ext_reg_s rst_enable; + _nvm_ext_reg_s rst_device; +} _nvm_ext_regs_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static bool _nvm_ext_init = false; +static const _nvm_ext_regs_s _nvm_ext_reg_table = { + .wr_enable = (_nvm_ext_reg_s) { .opcode = 0x06, .tx_len = 1, .rx_len = 0 }, + .sr_wr_enable = (_nvm_ext_reg_s) { .opcode = 0x50, .tx_len = 1, .rx_len = 0 }, + .wr_disable = (_nvm_ext_reg_s) { .opcode = 0x04, .tx_len = 1, .rx_len = 0 }, + .pwr_down_release = (_nvm_ext_reg_s) { .opcode = 0xAB, .tx_len = 4, .rx_len = 1 }, + .mfg_id = (_nvm_ext_reg_s) { .opcode = 0x90, .tx_len = 4, .rx_len = 2 }, + .jedec_id = (_nvm_ext_reg_s) { .opcode = 0x9F, .tx_len = 1, .rx_len = 3 }, + .unique_id = (_nvm_ext_reg_s) { .opcode = 0x4B, .tx_len = 5, .rx_len = 1 }, + .rd_data = (_nvm_ext_reg_s) { .opcode = 0x03, .tx_len = 4, .rx_len = 1 }, + .fast_rd_data = (_nvm_ext_reg_s) { .opcode = 0x0B, .tx_len = 5, .rx_len = 1 }, + .page_program = (_nvm_ext_reg_s) { .opcode = 0x02, .tx_len = 4, .rx_len = 0 }, + .sector_erase_4k = (_nvm_ext_reg_s) { .opcode = 0x20, .tx_len = 4, .rx_len = 0 }, + .block_erase_32k = (_nvm_ext_reg_s) { .opcode = 0x52, .tx_len = 4, .rx_len = 0 }, + .block_erase_64k = (_nvm_ext_reg_s) { .opcode = 0xD8, .tx_len = 4, .rx_len = 0 }, + .chip_erase = (_nvm_ext_reg_s) { .opcode = 0x60, .tx_len = 1, .rx_len = 0 }, + .rd_status_1 = (_nvm_ext_reg_s) { .opcode = 0x05, .tx_len = 1, .rx_len = 1 }, + .wr_status_1 = (_nvm_ext_reg_s) { .opcode = 0x01, .tx_len = 2, .rx_len = 0 }, + .rd_status_2 = (_nvm_ext_reg_s) { .opcode = 0x35, .tx_len = 1, .rx_len = 1 }, + .wr_status_2 = (_nvm_ext_reg_s) { .opcode = 0x31, .tx_len = 2, .rx_len = 0 }, + .rd_status_3 = (_nvm_ext_reg_s) { .opcode = 0x15, .tx_len = 1, .rx_len = 1 }, + .wr_status_3 = (_nvm_ext_reg_s) { .opcode = 0x11, .tx_len = 2, .rx_len = 0 }, + .sfdp = (_nvm_ext_reg_s) { .opcode = 0x5A, .tx_len = 5, .rx_len = 1 }, + .erase_security = (_nvm_ext_reg_s) { .opcode = 0x44, .tx_len = 4, .rx_len = 0 }, + .program_security = (_nvm_ext_reg_s) { .opcode = 0x42, .tx_len = 6, .rx_len = 0 }, + .rd_security = (_nvm_ext_reg_s) { .opcode = 0x48, .tx_len = 5, .rx_len = 1 }, + .gbl_block_lock = (_nvm_ext_reg_s) { .opcode = 0x7E, .tx_len = 1, .rx_len = 0 }, + .gbl_block_unlock = (_nvm_ext_reg_s) { .opcode = 0x98, .tx_len = 1, .rx_len = 0 }, + .rd_block_lock = (_nvm_ext_reg_s) { .opcode = 0x3D, .tx_len = 4, .rx_len = 1 }, + .individual_block_lock = (_nvm_ext_reg_s) { .opcode = 0x36, .tx_len = 4, .rx_len = 0 }, + .individual_block_unlock = (_nvm_ext_reg_s) { .opcode = 0x39, .tx_len = 4, .rx_len = 0 }, + .erase_suspend = (_nvm_ext_reg_s) { .opcode = 0x75, .tx_len = 1, .rx_len = 0 }, + .erase_resume = (_nvm_ext_reg_s) { .opcode = 0x7A, .tx_len = 1, .rx_len = 0 }, + .pwr_down = (_nvm_ext_reg_s) { .opcode = 0xB9, .tx_len = 1, .rx_len = 0 }, + .rst_enable = (_nvm_ext_reg_s) { .opcode = 0x66, .tx_len = 1, .rx_len = 0 }, + .rst_device = (_nvm_ext_reg_s) { .opcode = 0x99, .tx_len = 1, .rx_len = 0 } +}; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static uint32_t _nvm_ext_jedec_id_get (void); +static void _nvm_ext_write_enable (void); +static void _nvm_ext_write_disable (void); +static void _nvm_wait_til_ready (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIOPNS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e NVM_EXT_init (void) +{ + ERRNO_e err = ERRNO_FAILURE; + + if (_nvm_ext_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (SPI_init () != ERRNO_SUCCESS) + { + return ERRNO_SPI_FAILURE; + } + + /* SPI can sometimes read back all 0xFFs if transferring right after init. + Delay to work around. */ + k_busy_wait(10000); + + /* Set init flag so we only execute once. */ + /* NOTE : should be set before calling any NVM_EXT public functions since they will check for this flag. */ + _nvm_ext_init = true; + + /* Release power down. */ + err = NVM_EXT_release_power_down (); + if (err != ERRNO_SUCCESS) + { + return err; + } + + /* Check JEDEC ID to verify flash chip. */ + if (_nvm_ext_jedec_id_get () != (uint32_t) _NVM_EXT_JEDEC_ID) + { + return ERRNO_ID_FAILURE; + } + + /* Disable write until we are ready to use. */ + _nvm_ext_write_disable (); + + return ERRNO_SUCCESS; +} + +ERRNO_e NVM_EXT_power_down (void) +{ + _nvm_ext_reg_s reg = _nvm_ext_reg_table.pwr_down; + uint8_t tx_buf[reg.tx_len]; + + if (!_nvm_ext_init) + { + return ERRNO_NOT_INITIALIZED; + } + + tx_buf[0] = reg.opcode; + + /* Write power down register. */ + if (SPI_xfer (tx_buf, sizeof (tx_buf), NULL, 0) != ERRNO_SUCCESS) + { + return ERRNO_SPI_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e NVM_EXT_release_power_down (void) +{ + _nvm_ext_reg_s reg = _nvm_ext_reg_table.pwr_down_release; + uint8_t tx_buf[reg.tx_len]; + uint8_t rx_buf[reg.rx_len]; + + if (!_nvm_ext_init) + { + return ERRNO_NOT_INITIALIZED; + } + + tx_buf[0] = reg.opcode; + + /* Write release power down register. ID returned, check optional. */ + if (SPI_xfer (tx_buf, sizeof (tx_buf), rx_buf, sizeof (rx_buf)) != ERRNO_SUCCESS) + { + return ERRNO_SPI_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e NVM_EXT_erase_all (void) +{ + _nvm_ext_reg_s reg = _nvm_ext_reg_table.chip_erase; + uint8_t tx_buf[reg.tx_len]; + + if (!_nvm_ext_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Write enable command must set before performing an erase. */ + _nvm_ext_write_enable (); + + tx_buf[0] = reg.opcode; + + /* Write chip erase register. */ + if (SPI_xfer (tx_buf, sizeof (tx_buf), NULL, 0) != ERRNO_SUCCESS) + { + return ERRNO_SPI_FAILURE; + } + + /* Wait for erase to finish. */ + _nvm_wait_til_ready (); + + return ERRNO_SUCCESS; +} + +ERRNO_e NVM_EXT_erase_block (uint32_t addr, NVM_EXT_block_size_e block_size) +{ + _nvm_ext_reg_s reg = _nvm_ext_reg_table.sector_erase_4k; + uint8_t tx_buf[reg.tx_len]; + + if (!_nvm_ext_init) + { + return ERRNO_NOT_INITIALIZED; + } + /* Perform checks on input parameters. */ + else if (addr >= NVM_EXT_SIZE) + { + return ERRNO_INVALID_PARAM; + } + + /* Write enable command must set before performing an erase. */ + _nvm_ext_write_enable (); + + /* Split up address into bytes. */ + tx_buf[1] = _NVM_EXT_SPLIT_BYTE (addr, 2); /* A23 - A16 */ + tx_buf[2] = _NVM_EXT_SPLIT_BYTE (addr, 1); /* A15 - A8 */ + tx_buf[3] = _NVM_EXT_SPLIT_BYTE (addr, 0); /* A7 - A0 */ + + /* Perform a parameter check and set correct opcode. */ + switch (block_size) + { + case NVM_EXT_BLOCK_SIZE_4KB: + tx_buf[0] = _nvm_ext_reg_table.sector_erase_4k.opcode; + break; + + case NVM_EXT_BLOCK_SIZE_32KB: + tx_buf[0] = _nvm_ext_reg_table.block_erase_32k.opcode; + break; + + case NVM_EXT_BLOCK_SIZE_64KB: + tx_buf[0] = _nvm_ext_reg_table.block_erase_64k.opcode; + break; + + default: + return ERRNO_INVALID_PARAM; + } + + /* Write block / sector erase register. */ + if (SPI_xfer (tx_buf, sizeof (tx_buf), NULL, 0) != ERRNO_SUCCESS) + { + return ERRNO_SPI_FAILURE; + } + + /* Wait for erase to finish and measure elapsed time. */ + #ifdef CONFIG_DBG_STATS + uint32_t t_start = k_uptime_get_32(); + #endif + _nvm_wait_til_ready (); + #ifdef CONFIG_DBG_STATS + uint32_t elapsed = k_uptime_get_32() - t_start; + PRINT(INFO, "NVM_EXT_erase_block: addr=0x%06X size=%uKB took %u ms\r\n", + addr, (block_size == NVM_EXT_BLOCK_SIZE_4KB) ? 4 : (block_size == NVM_EXT_BLOCK_SIZE_32KB) ? 32 : 64, elapsed); + #endif + + return ERRNO_SUCCESS; +} + +ERRNO_e NVM_EXT_erase_range (uint32_t start_addr, uint32_t end_addr) +{ + /* To keep things simple, range erasing will use always use a block size of 4 Kb. */ + ERRNO_e err; + uint32_t i; + uint8_t data_start_buf[NVM_EXT_BLOCK_SIZE_4KB - 1]; + uint8_t data_end_buf [NVM_EXT_BLOCK_SIZE_4KB - 1]; + uint16_t block_start = start_addr / NVM_EXT_BLOCK_SIZE_4KB; + uint16_t block_end = end_addr / NVM_EXT_BLOCK_SIZE_4KB; + uint16_t data_start_addr = block_start * NVM_EXT_BLOCK_SIZE_4KB; + uint16_t data_end_addr = end_addr + 1; + uint16_t data_start_len = start_addr & (NVM_EXT_BLOCK_SIZE_4KB - 1); + uint16_t data_end_len = (~(end_addr % NVM_EXT_BLOCK_SIZE_4KB)) & (NVM_EXT_BLOCK_SIZE_4KB - 1); + + /* Perform checks on input parameters. */ + if ((start_addr >= NVM_EXT_SIZE) || (end_addr >= NVM_EXT_SIZE) || (start_addr > end_addr)) + { + return ERRNO_INVALID_PARAM; + } + + if (data_start_len != 0) + { + /* Read and save starting data in block section that is out of erase range. */ + err = NVM_EXT_read (data_start_addr, data_start_buf, data_start_len); + if (err != ERRNO_SUCCESS) + { + return err; + } + } + + if (data_end_len != 0) + { + /* Read and save ending data in block section that is out of erase range. */ + err = NVM_EXT_read (data_end_addr, data_end_buf, data_end_len); + if (err != ERRNO_SUCCESS) + { + return err; + } + } + + /* Loop through blocks and perform erases. */ + for (i = block_start; i <= block_end; i++) + { + err = NVM_EXT_erase_block (i * NVM_EXT_BLOCK_SIZE_4KB, NVM_EXT_BLOCK_SIZE_4KB); + if (err != ERRNO_SUCCESS) + { + return err; + } + } + + /* Rewrite back starting data our of the desired erase range that got erased. */ + if (data_start_len != 0) + { + err = NVM_EXT_write (data_start_addr, data_start_buf, data_start_len); + if (err != ERRNO_SUCCESS) + { + return err; + } + } + + /* Rewrite back ending data our of the desired erase range that got erased. */ + if (data_end_len != 0) + { + err = NVM_EXT_write (data_end_addr, data_end_buf, data_end_len); + if (err != ERRNO_SUCCESS) + { + return err; + } + } + + return ERRNO_SUCCESS; +} + +ERRNO_e NVM_EXT_read (uint32_t addr, uint8_t *p_dest, uint32_t len) +{ + _nvm_ext_reg_s reg = _nvm_ext_reg_table.rd_data; + uint8_t tx_buf[reg.tx_len]; + + /* Perform checks on input parameter. */ + if ((addr >= NVM_EXT_SIZE) || (len == 0) || (addr + len) > NVM_EXT_SIZE) + { + return ERRNO_INVALID_PARAM; + } + else if (p_dest == NULL) + { + return ERRNO_BAD_POINTER; + } + + /* Split up address into len. */ + tx_buf[0] = reg.opcode; + tx_buf[1] = _NVM_EXT_SPLIT_BYTE (addr, 2); /* A23 - A16 */ + tx_buf[2] = _NVM_EXT_SPLIT_BYTE (addr, 1); /* A15 - A8 */ + tx_buf[3] = _NVM_EXT_SPLIT_BYTE (addr, 0); /* A7 - A0 */ + + /* Perform read. */ + if (SPI_xfer (tx_buf, sizeof (tx_buf), p_dest, len) != ERRNO_SUCCESS) + { + return ERRNO_SPI_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e NVM_EXT_write (uint32_t addr, uint8_t *p_src, uint32_t len) +{ + _nvm_ext_reg_s reg = _nvm_ext_reg_table.page_program; + uint8_t tx_buf[reg.tx_len + len]; + + /* The calculated number of len to write */ + uint32_t cnt; + + /* Perform checks on input parameter. */ + if (addr >= NVM_EXT_SIZE || len == 0 || (addr + len) > NVM_EXT_SIZE) + { + return ERRNO_INVALID_PARAM; + } + + if (p_src == NULL) + { + return ERRNO_BAD_POINTER; + } + + while (len > 0) + { + /* Calculate the number of bytes to write (bytes until end of page) */ + cnt = NVM_EXT_PAGE_SIZE - (addr % NVM_EXT_PAGE_SIZE); + + /* Do not span pages if the data will fit in the remaining page space. */ + if (cnt >= len) + { + cnt = len; + } + + /* Write enable command must set before performing a write. */ + _nvm_ext_write_enable (); + + tx_buf[0] = reg.opcode; + tx_buf[1] = _NVM_EXT_SPLIT_BYTE (addr, 2); /* A23 - A16 */ + tx_buf[2] = _NVM_EXT_SPLIT_BYTE (addr, 1); /* A15 - A8 */ + tx_buf[3] = _NVM_EXT_SPLIT_BYTE (addr, 0); /* A7 - A0 */ + + /* Copy data buffer into tx_buffer. */ + memcpy (&tx_buf[reg.tx_len], p_src, cnt); + + /* Perform write. */ + if (SPI_xfer (tx_buf, (reg.tx_len + cnt), NULL, 0) != ERRNO_SUCCESS) + { + return ERRNO_SPI_FAILURE; + } + + /* Decrement byte count, increment address, and increment source pointer. */ + len -= cnt; + addr += cnt; + p_src += cnt; + + /* Wait for write to complete. */ + _nvm_wait_til_ready (); + } + + return ERRNO_SUCCESS; +} + +void NVM_EXT_cli_cmd (int32_t argc, char **argv) +{ + uint16_t i; + uint8_t buf[4096]; + uint32_t start_addr; + uint8_t data; + uint16_t n_bytes; + ERRNO_e err; + + if (argc == 0) + { + PRINT (INFO, "NVM EXTERNAL\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "JEDEC ID : 0x%06X\r\n", _nvm_ext_jedec_id_get ()); + PRINT (INFO, "Size (bytes) : %d\r\n", NVM_EXT_SIZE); + } + else if (argc == 1) + { + if (!strcmp (argv[0], "--help") || !strcmp (argv[0], "?")) + { + goto USAGE; + } + else + { + start_addr = (uint32_t) strtoul (argv[0], NULL, 0); + + err = NVM_EXT_read (start_addr, buf, 1); + PRINT (INFO, "Ret code : %d\r\n", err); + + if (err == ERRNO_SUCCESS) + { + PRINT (INFO, "Addr: 0x%06X = %d\r\n", start_addr, buf[0]); + } + } + } + else if (argc == 2) + { + if (!strcmp (argv[1], "--erase") || !strcmp (argv[1], "-e")) + { + if (!strcmp (argv[0], "all")) + { + err = NVM_EXT_erase_all (); + PRINT (INFO, "Ret code : %d\r\n", err); + } + else + { + goto USAGE; + } + } + else + { + goto USAGE; + } + } + else if (argc == 3) + { + if (!strcmp (argv[1], "--read") || !strcmp (argv[1], "-r")) + { + start_addr = (uint32_t) strtoul (argv[0], NULL, 0); + n_bytes = (uint16_t) strtoul (argv[2], NULL, 0); + err = NVM_EXT_read (start_addr, buf, n_bytes); + + PRINT (INFO, "Ret code : %d\r\n", err); + + if (err == ERRNO_SUCCESS) + { + for (i = 0; i < n_bytes; i++) + { + PRINT (INFO, "Addr: 0x%06X = %d\r\n", (start_addr + i), buf[i]); + } + } + } + else if (!strcmp (argv[1], "--set") || !strcmp (argv[1], "-s")) + { + start_addr = (uint32_t) strtoul (argv[0], NULL, 0); + data = (uint8_t) strtoul (argv[2], NULL, 0); + err = NVM_EXT_write (start_addr, &data, 1); + + PRINT (INFO, "Ret code : %d\r\n", err); + } + else if (!strcmp (argv[1], "--erase") || !strcmp (argv[1], "-e")) + { + uint32_t end_addr; + + start_addr = (uint32_t) strtoul (argv[0], NULL, 0); + end_addr = (uint32_t) strtoul (argv[2], NULL, 0) + start_addr; + err = NVM_EXT_erase_range (start_addr, end_addr); + + PRINT (INFO, "Ret code : %d\r\n", err); + + if (err == ERRNO_SUCCESS) + { + PRINT (INFO, "Addr: 0x%06X - 0x%06X erased\r\n", start_addr, end_addr); + } + } + else if (!strcmp (argv[1], "-type") || !strcmp (argv[1], "-t")) + { + start_addr = (uint32_t) strtoul (argv[0], NULL, 0); + err = NVM_EXT_read (start_addr, buf, 4); + + PRINT (INFO, "Ret code : %d\r\n", err); + + if (err == ERRNO_SUCCESS) + { + if (!strcmp (argv[2], "u8")) + { + PRINT (INFO, "%u\r\n", *(uint8_t *) buf); + } + else if (!strcmp (argv[2], "u16")) + { + PRINT (INFO, "%u\r\n", *(uint16_t *) buf); + } + else if (!strcmp (argv[2], "u32")) + { + PRINT (INFO, "%u\r\n", *(uint32_t *) buf); + } + else if (!strcmp (argv[2], "s8")) + { + PRINT (INFO, "%d\r\n", *(int8_t *) buf); + } + else if (!strcmp (argv[2], "s16")) + { + PRINT (INFO, "%d\r\n", *(int16_t *) buf); + } + else if (!strcmp (argv[2], "s32")) + { + PRINT (INFO, "%d\r\n", *(int32_t *) buf); + } + else if (!strcmp (argv[2], "float")) + { + PRINT (INFO, "%f\r\n", *(float *) buf); + } + else + { + PRINT (INFO, "Invalid argument\r\n"); + } + } + } + else + { + goto USAGE; + } + } + else if (argc == 4) + { + if (!strcmp (argv[1], "--set") || !strcmp (argv[1], "-s")) + { + start_addr = (uint32_t) strtoul (argv[0], NULL, 0); + data = (uint8_t) strtoul (argv[2], NULL, 0); + n_bytes = (uint32_t) strtoul (argv[3], NULL, 0); + + memset (buf, data, n_bytes); + + err = NVM_EXT_write (start_addr, buf, n_bytes); + PRINT (INFO, "Ret code : %d\r\n", err); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: nvm [OPTION...]\r\n"); + PRINT (INFO, " -r | --read reads from flash\r\n"); + PRINT (INFO, " <%%d> number of bytes [1-255]\r\n"); + PRINT (INFO, " -s |--set write value to flash\r\n"); + PRINT (INFO, " <%%d> value to set\r\n"); + PRINT (INFO, " -e | --erase erase flash contents\r\n"); + PRINT (INFO, " <%%d> bytes to erase\r\n"); + PRINT (INFO, " -t | --type typecast flash content\r\n"); + PRINT (INFO, " <%%s> [u8, u16, u32, s8, s16, s32, float]\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static uint32_t _nvm_ext_jedec_id_get (void) +{ + uint32_t jedec_id = 0; + _nvm_ext_reg_s reg = _nvm_ext_reg_table.jedec_id; + uint8_t tx_buf[reg.tx_len]; + uint8_t rx_buf[reg.rx_len]; + + tx_buf[0] = reg.opcode; + + /* Read JEDEC ID register. */ + if (SPI_xfer (tx_buf, sizeof (tx_buf), rx_buf, sizeof (rx_buf)) != ERRNO_SUCCESS) + { + PRINT (ERROR, "SPI failure reading JEDEC ID.\r\n"); + } + + jedec_id = (((uint32_t) rx_buf[0] << 16) | ((uint32_t) rx_buf[1] << 8) | (uint32_t) rx_buf[2]); + + return jedec_id; +} + +static void _nvm_ext_write_enable (void) +{ + _nvm_ext_reg_s reg = _nvm_ext_reg_table.wr_enable; + uint8_t tx_buf[reg.tx_len]; + + tx_buf[0] = reg.opcode; + + if (SPI_xfer (tx_buf, sizeof (tx_buf), NULL, 0) != ERRNO_SUCCESS) + { + PRINT (ERROR, "SPI failure transferring write enable.\r\n"); + } +} + +static void _nvm_ext_write_disable (void) +{ + _nvm_ext_reg_s reg = _nvm_ext_reg_table.wr_disable; + uint8_t tx_buf[reg.tx_len]; + + tx_buf[0] = reg.opcode; + + if (SPI_xfer (tx_buf, sizeof (tx_buf), NULL, 0) != ERRNO_SUCCESS) + { + PRINT (ERROR, "SPI failure transferring write enable.\r\n"); + } +} + +static void _nvm_wait_til_ready (void) +{ + _nvm_ext_reg_s reg = _nvm_ext_reg_table.rd_status_1; + uint8_t tx_buf[reg.tx_len]; + uint8_t rx_buf[reg.rx_len]; + + tx_buf[0] = reg.opcode; + + /* Wait for erase to complete by polling READYn/BUSY bit. */ + do + { + if (SPI_xfer (tx_buf, sizeof (tx_buf), rx_buf, sizeof (rx_buf)) != ERRNO_SUCCESS) + { + PRINT (ERROR, "SPI failure polling ready bit.\r\n"); + } + } while ((rx_buf[0] & _NVM_EXT_STATUS_BUSY_MASK) == _NVM_EXT_STATUS_BUSY); +} diff --git a/src/bsp/nvm_ext.h b/src/bsp/nvm_ext.h new file mode 100644 index 0000000..23ace35 --- /dev/null +++ b/src/bsp/nvm_ext.h @@ -0,0 +1,73 @@ +/** + * @file nvm_ext.h + * @brief Non-volatile memory external module : W25Q16JV + * @author Kenny Tran + * @date Feb 29 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef NVM_EXT_H_ +#define NVM_EXT_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define NVM_EXT_SCK_PIN BSP_NVM_EXT_SCK_PIN +#define NVM_EXT_MOSI_PIN BSP_NVM_EXT_MOSI_PIN +#define NVM_EXT_MISO_PIN BSP_NVM_EXT_MISO_PIN +#define NVM_EXT_CS_PIN BSP_NVM_EXT_CS_PIN /* Active-low */ + +#define NVM_EXT_START_ADDR (0x000000) /* Flash start address */ +#define NVM_EXT_PAGE_SIZE (256) /* Flash page size */ + +#define NVM_EXT_SIZE (0x200000) /* Flash size in bytes (2MB) */ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum NVM_EXT_block_size +{ + NVM_EXT_BLOCK_SIZE_4KB = 4096, + NVM_EXT_BLOCK_SIZE_32KB = 32768, + NVM_EXT_BLOCK_SIZE_64KB = 65536 +} NVM_EXT_block_size_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e NVM_EXT_init (void); + +ERRNO_e NVM_EXT_power_down (void); + +ERRNO_e NVM_EXT_release_power_down (void); + +ERRNO_e NVM_EXT_erase_all (void); + +ERRNO_e NVM_EXT_erase_block (uint32_t addr, NVM_EXT_block_size_e block_size); + +ERRNO_e NVM_EXT_erase_range (uint32_t start_addr, uint32_t end_addr); + +ERRNO_e NVM_EXT_read (uint32_t addr, uint8_t *p_dest, uint32_t len); + +ERRNO_e NVM_EXT_write (uint32_t addr, uint8_t *p_src, uint32_t len); + +void NVM_EXT_cli_cmd (int32_t argc, char **argv); + + +#endif /* NVM_EXT_H_ */ diff --git a/src/bsp/power.c b/src/bsp/power.c new file mode 100644 index 0000000..bbf2d7d --- /dev/null +++ b/src/bsp/power.c @@ -0,0 +1,161 @@ +/** + * @file battery.h + * @brief Battery module + * @author Kenny Tran + * @date Dec 02 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include + +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "../wrappers/gpio.h" + +#include "power.h" + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static bool _power_init = false; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e POWER_init (void) +{ + if (_power_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (GPIO_init () < ERRNO_SUCCESS) + { + return ERRNO_GPIO_FAILURE; + } + + if (GPIO_cfg (GPIO_PIN_5V_ENABLE, GPIO_DIRECTION_OUT, GPIO_PULLDOWN, GPIO_INIT_LOW, GPIO_INT_STATE_CHANGE_LL_HIGH, NULL)) + { + return ERRNO_GPIO_FAILURE; + } + + _power_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e POWER_enable (bool en) +{ + if (!_power_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (GPIO_level_set (GPIO_PIN_5V_ENABLE, en) != ERRNO_SUCCESS) + { + return ERRNO_GPIO_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e POWER_is_enabled (bool *p_enabled) +{ + if (!_power_init) + { + return ERRNO_NOT_INITIALIZED; + } + + *p_enabled = GPIO_level_get (GPIO_PIN_5V_ENABLE); + + return ERRNO_SUCCESS; +} + +void POWER_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + bool enabled; + + PRINT (INFO, "POWER\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + (void) POWER_is_enabled (&enabled); + PRINT (INFO, "5V power is %s\r\n", (enabled ? "enabled" : "disabled")); + } + else if (argc == 1) + { + if (!strcmp (argv[0], "-i") || !strcmp (argv[0], "--init")) + { + PRINT (INFO, "Ret code : %d\r\n", POWER_init ()); + } + else + { + goto USAGE; + } + } + else if (argc == 2) + { + if (!strcmp (argv[0], "-e") || !strcmp (argv[0], "--enable")) + { + if (!strcmp (argv[1], "true")) + { + PRINT (INFO, "Ret code : %d\r\n", POWER_enable (true)); + } + else if (!strcmp (argv[1], "false")) + { + PRINT (INFO, "Ret code : %d\r\n", POWER_enable (false)); + } + else + { + goto USAGE; + } + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: power [OPTION...]\r\n"); + PRINT (INFO, " -i | --init Initializes TPS61230A 5V power module\r\n"); + PRINT (INFO, " -e | --enable Enables TPS61230A 5V power module\r\n"); + PRINT (INFO, " <%%b> true = enable\r\n"); + PRINT (INFO, " false = disable\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ diff --git a/src/bsp/power.h b/src/bsp/power.h new file mode 100644 index 0000000..2432b38 --- /dev/null +++ b/src/bsp/power.h @@ -0,0 +1,48 @@ +/** + * @file power.h + * @brief TPS61230A power module + * @author Kenny Tran + * @date Mar 07 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef POWER_H_ +#define POWER_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e POWER_init (void); + +ERRNO_e POWER_enable (bool en); + +ERRNO_e POWER_is_enabled (bool *p_enabled); + +void POWER_cli_cmd (int32_t argc, char **argv); + + +#endif /* POWER_H_ */ diff --git a/src/bsp/rtc.c b/src/bsp/rtc.c new file mode 100644 index 0000000..a334024 --- /dev/null +++ b/src/bsp/rtc.c @@ -0,0 +1,150 @@ +/** + * @file rtc.c + * @brief Real Time Counter Modules + * @author Kenny Tran + * @date Nov 04 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include +#include + +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "rtc.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +/* Ticks per sec = clock frequency / (prescaler + 1) */ +#define _RTC_TICKS_TO_SECONDS(ticks) (ticks / (32768 / 4096)) + + +/*-------------------------------------------------------------------------------------------------- + * THREAD DEFINITIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static const struct device *_rtc_dev = DEVICE_DT_GET(DT_NODELABEL(rtc2)); +static bool _rtc_init = false; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIOPNS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e RTC_init (void) +{ + if (_rtc_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (!device_is_ready (_rtc_dev)) + { + return ERRNO_NOT_READY; + } + + _rtc_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e RTC_start (void) +{ + /* Start the counter (starts LFCLK if not running). */ + if (counter_start (_rtc_dev)) + { + return ERRNO_RTC_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e RTC_stop (void) +{ + /* Stop the counter. */ + if (counter_stop (_rtc_dev)) + { + return ERRNO_RTC_FAILURE; + } + + return ERRNO_SUCCESS; +} + +uint32_t RTC_seconds_elasped (void) +{ + uint32_t ticks; + + counter_get_value(_rtc_dev, &ticks); + + return _RTC_TICKS_TO_SECONDS(ticks); +} + +void RTC_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + uint32_t seconds = RTC_seconds_elasped (); + + PRINT (INFO, "RTC\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "%d seconds have elapsed since start.\r\n", seconds); + } + else if (argc == 1) + { + if (!strcmp (argv[0], "--init")) + { + PRINT (INFO, "Ret code : %d\r\n", RTC_init ()); + } + else if (!strcmp (argv[0], "--start")) + { + PRINT (INFO, "Ret code : %d\r\n", RTC_start ()); + } + else if (!strcmp (argv[0], "--stop")) + { + PRINT (INFO, "Ret code : %d\r\n", RTC_stop ()); + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: rtc [OPTION...]\r\n"); + PRINT (INFO, " --init Initializes rtc counter\r\n"); + PRINT (INFO, " --start Starts rtc counter\r\n"); + PRINT (INFO, " --stop Stops rtc counter\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ diff --git a/src/bsp/rtc.h b/src/bsp/rtc.h new file mode 100644 index 0000000..69ce05e --- /dev/null +++ b/src/bsp/rtc.h @@ -0,0 +1,50 @@ +/** + * @file rtc.h + * @brief Real Time Counter Modules + * @author Kenny Tran + * @date Nov 04 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef RTC_H_ +#define RTC_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e RTC_init (void); + +ERRNO_e RTC_start (void); + +ERRNO_e RTC_stop (void); + +uint32_t RTC_seconds_elasped (void); + +void RTC_cli_cmd (int32_t argc, char **argv); + + +#endif /* RTC_H_ */ diff --git a/src/bsp/wdt.c b/src/bsp/wdt.c new file mode 100644 index 0000000..51ceee3 --- /dev/null +++ b/src/bsp/wdt.c @@ -0,0 +1,175 @@ +/** + * @file wdt.c + * @brief Watchdog Timer Library + * @author Kenny Tran + * @date Jan 28 2026 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include + +#include +#include +#include + +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "wdt.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static const struct device *_wdt_dev; +static int _wdt_channel_id = -1; +static bool _wdt_init = false; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIOPNS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e WDT_init (void) +{ + int err; + struct wdt_timeout_cfg wdt_cfg; + + if (_wdt_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + /* Get watchdog device. */ + _wdt_dev = DEVICE_DT_GET(DT_ALIAS(watchdog0)); + if (!device_is_ready (_wdt_dev)) + { + return ERRNO_WDT_FAILURE; + } + + /* Configure timeout. */ + wdt_cfg.flags = WDT_FLAG_RESET_SOC; + wdt_cfg.window.min = 0; + wdt_cfg.window.max = WDT_TIMEOUT_MS; + wdt_cfg.callback = NULL; + + /* Install timeout. */ + _wdt_channel_id = wdt_install_timeout (_wdt_dev, &wdt_cfg); + if (_wdt_channel_id < 0) + { + return ERRNO_WDT_FAILURE; + } + + /* Start watchdog - CANNOT BE STOPPED. */ + err = wdt_setup (_wdt_dev, WDT_OPT_PAUSE_HALTED_BY_DBG); + if (err < 0) + { + return ERRNO_WDT_FAILURE; + } + + _wdt_init = true; + + return ERRNO_SUCCESS; +} + +void WDT_feed (void) +{ + if (_wdt_init) + { + wdt_feed (_wdt_dev, _wdt_channel_id); + } +} + +ERRNO_e WDT_was_reset (bool *p_was_reset) +{ + if (p_was_reset == NULL) + { + return ERRNO_BAD_POINTER; + } + + *p_was_reset = false; + +#if defined(NRF_POWER) + if (NRF_POWER->RESETREAS & POWER_RESETREAS_DOG_Msk) + { + *p_was_reset = true; + NRF_POWER->RESETREAS = POWER_RESETREAS_DOG_Msk; /* Clear flag */ + } +#endif + + return ERRNO_SUCCESS; +} + +void WDT_cli_cmd (int32_t argc, char **argv) +{ + bool was_reset; + + if (argc == 0) + { + WDT_was_reset(&was_reset); + + PRINT (INFO, "WATCHDOG TIMER\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "Initialized : %s\r\n", _wdt_init ? "true" : "false"); + PRINT (INFO, "Timeout : %d ms\r\n", WDT_TIMEOUT_MS); + PRINT (INFO, "Last reset : %s\r\n", was_reset ? "WATCHDOG" : "normal"); + } + else if (argc == 1) + { + if (!strcmp (argv[0], "--init") || !strcmp (argv[0], "-i")) + { + PRINT (INFO, "Ret code: %d\r\n", WDT_init ()); + } + else if (!strcmp (argv[0], "--feed") || !strcmp (argv[0], "-f")) + { + WDT_feed (); + PRINT (INFO, "Fed watchdog\r\n"); + } + else if (!strcmp (argv[0], "--test") || !strcmp (argv[0], "-t")) + { + PRINT (INFO, "Stopping feeds - reset in %d ms...\r\n", WDT_TIMEOUT_MS); + + while (1) + { + /* Hang to trigger watchdog. */ + } + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: watchdog [OPTION]\r\n"); + PRINT (INFO, " -i | --init Initialize watchdog\r\n"); + PRINT (INFO, " -f | --feed Feed watchdog\r\n"); + PRINT (INFO, " -t | --test Test watchdog (triggers reset!)\r\n"); + } +} diff --git a/src/bsp/wdt.h b/src/bsp/wdt.h new file mode 100644 index 0000000..e23ee1c --- /dev/null +++ b/src/bsp/wdt.h @@ -0,0 +1,49 @@ +/** + * @file wdt.h + * @brief Watchdog Timer Library + * @author Kenny Tran + * @date Jan 28 2026 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef WDT_H_ +#define WDT_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define WDT_TIMEOUT_MS (1500) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e WDT_init (void); + +void WDT_feed (void); + +ERRNO_e WDT_was_reset (bool *p_was_reset); + +void WDT_cli_cmd (int32_t argc, char **argv); + + +#endif /* WDT_H_ */ diff --git a/src/lib/cli.c b/src/lib/cli.c new file mode 100644 index 0000000..a254606 --- /dev/null +++ b/src/lib/cli.c @@ -0,0 +1,333 @@ +/** + * @file cli.c + * @brief Command line interface + * @author Kenny Tran + * @date Apr 25 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include + +#include "../wrappers/uart.h" + +#include "cli.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define _CLI_CR ('\r') +#define _CLI_LF ('\n') +#define _CLI_BS ('\b') +#define _CLI_NULL ('\0') +#define _CLI_SPACE (' ') + + +/*-------------------------------------------------------------------------------------------------- + * THREAD DEFINITIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct _cli +{ + char *cmd_str; + void (*cmd) (int32_t argc, char **argv); + bool debug; +} _cli_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static bool _cli_init = false; +static _cli_s _cli_list[CLI_MAX_COMMANDS+3]; /* +3 for "help", "?", and "debug" */ +static uint8_t _cli_list_len = 0; +static char *_cli_tokens[CLI_MAX_ARGS]; +static char _cli_buf[CLI_MAX_BUF_LEN]; +static CLI_cmd_e _cli_cmd_mode = CLI_CMD_APP; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _cli_line_clear (uint8_t n_chars); +static uint8_t _cli_tokens_parse (char *p_buf); +static bool _cli_chars_parse (void); +static void _cli_cmd_execute (void); +static void _cli_cmd_help (int32_t argc, char **argv); +static void _cli_cmd_debug (int32_t argc, char **argv); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e CLI_init (void) +{ + if (_cli_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + /* Initialize UART for use with CLI. */ + if (UART_init () < ERRNO_SUCCESS) + { + return ERRNO_UART_FAILURE; + } + + /* Set init flag so we this doesn't get called more than once. */ + _cli_init = true; + + /* Register CLI help commands + debug. */ + CLI_cmd_register (CLI_CMD_APP, (char *) "help", _cli_cmd_help); + CLI_cmd_register (CLI_CMD_APP, (char *) "?", _cli_cmd_help); + CLI_cmd_register (CLI_CMD_APP, (char *) "debug", _cli_cmd_debug); + + return ERRNO_SUCCESS; +} + +void CLI_task (void) +{ + /* Check for command. */ + if (_cli_chars_parse ()) + { + /* Execute command. */ + _cli_cmd_execute (); + + printk (">>"); + } +} + +ERRNO_e CLI_cmd_register (CLI_cmd_e type, char *cmd_str, void (*cmd) (int32_t argc, char **argv)) +{ + if (!_cli_init) + { + return ERRNO_NOT_INITIALIZED; + } + else if (cmd_str == NULL) + { + return ERRNO_BAD_POINTER; + } + else if (type > CLI_CMD_DEBUG) + { + return ERRNO_INVALID_PARAM; + } + /* +3 for "help", "?", and "debug" */ + else if (_cli_list_len >= CLI_MAX_COMMANDS+3) + { + return ERRNO_LIMIT_REACHED; + } + + /* Append new command to the list. */ + _cli_list[_cli_list_len++] = (_cli_s) { .cmd_str = cmd_str, + .cmd = cmd, + .debug = (bool) type }; + + return ERRNO_SUCCESS; +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _cli_line_clear (uint8_t n_chars) +{ + uint8_t i; + + /* Return cursor to beginning of line. */ + printk ("\r"); + + for (i = 0; i < n_chars; i++) + { + /* Print spaces to clear. */ + printk (" "); + } + + /* Return cursor to beginning of line. */ + printk ("\r>>"); +} + +static uint8_t _cli_tokens_parse (char *p_buf) +{ + uint8_t argc = 0; + + char *p_token = strtok (_cli_buf, " "); + + while (p_token != NULL) + { + if (argc >= CLI_MAX_ARGS) + { + printk ("Error: Exceeded max arguments."); + return 0xFF; + } + + _cli_tokens[argc++] = p_token; + + p_token = strtok (NULL, " "); + } + + return argc; +} + +static bool _cli_chars_parse (void) +{ + static uint8_t idx = 0; + + /* Read in character. */ + char ch; + + if (UART_getc (&ch)) + { + switch (ch) + { + /* Line feed or carriage return found. */ + case _CLI_CR: + case _CLI_LF: + /* Echo back character. */ + printk ("%c", ch); + _cli_buf[idx] = _CLI_NULL; + if (idx > 0) + { + /* Reset index. */ + idx = 0; + printk ("\r\n"); + return true; + } + else + { + printk ("\r\n>>"); + } + break; + + case _CLI_BS: + if (idx > 0) + { + /* Clear line. */ + _cli_line_clear (idx + 2); + + _cli_buf[--idx] = _CLI_NULL; + + /* Reprint */ + printk ("%s", _cli_buf); + } + break; + + default: + /* Echo back character. */ + printk ("%c", ch); + /* Check if number of characters read have exceeded max length. */ + if (idx < CLI_MAX_BUF_LEN) + { + /* Append character to buffer and update index. */ + _cli_buf[idx++] = ch; + } + break; + } + } + + return false; +} + +static void _cli_cmd_execute (void) +{ + uint8_t i; + uint8_t argc; + + /* Parse CLI tokens and get argument count. */ + argc = _cli_tokens_parse (_cli_buf); + + for (i = 0; i < _cli_list_len; i++) + { + /* If debug mode is enabled. */ + if (_cli_cmd_mode == CLI_CMD_DEBUG) + { + /* Loop through command list and compare commands. */ + if (!strcmp (_cli_tokens[0], _cli_list[i].cmd_str)) + { + /* Execute command. */ + _cli_list[i].cmd ((int32_t) (argc - 1), (char **) &_cli_tokens[1]); + + goto DONE; + } + } + /* If not, only execute app commands. */ + else + { + /* Loop through command list and compare commands. */ + if (!_cli_list[i].debug && !strcmp (_cli_tokens[0], _cli_list[i].cmd_str)) + { + /* Execute command. */ + _cli_list[i].cmd ((int32_t) (argc - 1), (char **) &_cli_tokens[1]); + + goto DONE; + } + } + } + + printk ("Invalid command\r\n"); + +DONE: + + /* Clear CLI buffer for next command. */ + memset (_cli_buf, 0, sizeof (_cli_buf)); + +} + +static void _cli_cmd_help (int32_t argc, char **argv) +{ + uint8_t i; + + printk ("COMMANDS\r\n"); + printk ("-------------------------------------------\r\n"); + + /* Start at index of 2 to skip "help", "?", and "debug" command. */ + for (i = 3; i < _cli_list_len; i++) + { + /* If debug mode is enabled. */ + if (_cli_cmd_mode == CLI_CMD_DEBUG) + { + printk ("%s", _cli_list[i].cmd_str); + printk ("\r\n"); + } + else + { + if (!_cli_list[i].debug) + { + printk ("%s", _cli_list[i].cmd_str); + printk ("\r\n"); + } + } + } +} + +static void _cli_cmd_debug (int32_t argc, char **argv) +{ + if (argc == 0) + { + if (_cli_cmd_mode == CLI_CMD_DEBUG) + { + _cli_cmd_mode = CLI_CMD_APP; + printk ("CLI mode : app\r\n"); + + } + else + { + _cli_cmd_mode = CLI_CMD_DEBUG; + printk ("CLI mode : debug\r\n"); + } + } +} diff --git a/src/lib/cli.h b/src/lib/cli.h new file mode 100644 index 0000000..f88f2c1 --- /dev/null +++ b/src/lib/cli.h @@ -0,0 +1,57 @@ +/** + * @file cli.h + * @brief Command line interface + * @author Kenny Tran + * @date Apr 25 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef CLI_H_ +#define CLI_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define CLI_TASK_PERIOD_MS (1) /* NOTE: Needs to be 1 ms to process data correctly. */ +#define CLI_STACK_SIZE (1024) +#define CLI_THREAD_PRIORITY (7) + +#define CLI_MAX_COMMANDS (32) +#define CLI_MAX_BUF_LEN (100) +#define CLI_MAX_ARGS (10) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum CLI_cmd +{ + CLI_CMD_APP = 0, + CLI_CMD_DEBUG +} CLI_cmd_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e CLI_init (void); + +void CLI_task (void); + +ERRNO_e CLI_cmd_register (CLI_cmd_e type, char *cmd_str, void (*cmd) (int32_t argc, char **argv)); + + +#endif /* CLI_H_ */ diff --git a/src/lib/crc.c b/src/lib/crc.c new file mode 100644 index 0000000..3a66e3a --- /dev/null +++ b/src/lib/crc.c @@ -0,0 +1,127 @@ +/** + * @file crc.c + * @brief Software cyclical redundancy check (CRC). + * @author Kenny Tran + * @date May 20 2022 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include + +#include "../lib/errno.h" + +#include "crc.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define _CRC_TABLE_SIZE (256) + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static uint32_t _crc_32_table[_CRC_TABLE_SIZE]; +static bool _crc_init = false; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +/** + * @fn _crc_32_table_init (void) + * @brief Initializes the _crc_32_table buffer for calculating CRC 32 checksums. + */ +static void _crc_32_table_init (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e CRC_init (void) +{ + if (_crc_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + /* Initialize CRC 32 table. */ + _crc_32_table_init (); + + /* Set init flag so we don't need to keep initializing table. */ + _crc_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e CRC_32_calculate (uint8_t *p_data, uint16_t len, uint32_t checksum_init, uint32_t *p_checksum) +{ + uint8_t *p; + uint8_t *q; + uint8_t octet; + uint32_t crc = checksum_init; + + if (!_crc_init) + { + return ERRNO_NOT_INITIALIZED; + } + else if (p_data == NULL || p_checksum == NULL) + { + return ERRNO_BAD_POINTER; + } + + q = p_data + len; + + for (p = p_data; p < q; p++) + { + /* Cast to unsigned octet */ + octet = *p; + crc = (crc >> 8) ^ _crc_32_table[(crc & 0xFF) ^ octet]; + } + + *p_checksum = ~crc; + + return ERRNO_SUCCESS; +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void _crc_32_table_init (void) +{ + uint16_t i; + uint16_t j; + uint32_t rem; + + /* Calculate and fill CRC table. */ + for (i = 0; i < _CRC_TABLE_SIZE; i++) + { + /* Remainder from polynomial division. */ + rem = i; + + for (j = 0; j < 8; j++) + { + if (rem & 1) + { + rem >>= 1; + rem ^= CRC_32_POLYNOMIAL; + } + else + { + rem >>= 1; + } + } + _crc_32_table[i] = rem; + } +} diff --git a/src/lib/crc.h b/src/lib/crc.h new file mode 100644 index 0000000..a824b18 --- /dev/null +++ b/src/lib/crc.h @@ -0,0 +1,57 @@ +/** + * @file crc.h + * @brief Software cyclical redundancy check (CRC). + * @author Kenny Tran + * @date May 20 2022 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef CRC_H_ +#define CRC_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define CRC_32_CHECKSUM_INIT (0xFFFFFFFF) +#define CRC_32_POLYNOMIAL (0xEDB88320) + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +/** + * @fn CRC_init (void) + * @brief Initializes table for CRC calculations. + * + * @return ERRNO_SUCCESS if successful, else ERRNO_e. + */ +ERRNO_e CRC_init (void); + +/** + * @fn CRC_32_calculate (uint8_t *const p_data, uint16_t len, uint32_t crc_init) + * @brief Calculates the CRC 32 checksum of the specified buffer and length. + * + * @param p_data - Pointer to data to CRC. + * @param len - Length of the data buffer. + * @param crc_init - The initial CRC value. Default is 0xFFFFFFFF. + * @param p_checksum - Pointer to register to store resulting CRC checksum. + * + * @return ERRNO_SUCCESS if successful, else ERRNO_e. + */ +ERRNO_e CRC_32_calculate (uint8_t *p_data, uint16_t len, uint32_t checksum_init, uint32_t *p_checksum); + + +#endif /* CRC_H_ */ diff --git a/src/lib/debug.c b/src/lib/debug.c new file mode 100644 index 0000000..3ebce38 --- /dev/null +++ b/src/lib/debug.c @@ -0,0 +1,37 @@ +/** + * @file debug.c + * @brief DEBUG module - variable definitions + * @author Eric Xu + * @date Oct 15 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + +#include + +#include "debug.h" + +#ifdef CONFIG_DBG_STATS +atomic_t i2c_transfer_active = ATOMIC_INIT(0); + +volatile uint32_t fifo_read_task_counter = 0; +volatile uint32_t read_shot_data_counter = 0; +volatile uint32_t read_into_dummy_counter = 0; +volatile uint32_t fifo_read_FTH_counter = 0; +volatile uint32_t read_shot_data_after_fifo_read_counter = 0; +volatile uint32_t fifo_waterM_total_hit_counter = 0; +volatile uint32_t fifo_waterM_hit_counter = 0; +volatile uint32_t fifo_overrun_counter = 0; +volatile uint32_t unread_words_before_read = 0; +volatile uint32_t unread_words_after_read = 0; +volatile uint32_t max_unread_words_before_read = 0; +volatile uint32_t max_unread_words_after_read = 0; + +volatile uint32_t imu_task_during_i2c_counter = 0; +volatile uint32_t fsm_task_counter = 0; +volatile uint32_t fsm_task_during_i2c_counter = 0; +volatile uint32_t event_task_counter = 0; +volatile uint32_t event_task_during_i2c_counter = 0; +#endif diff --git a/src/lib/debug.h b/src/lib/debug.h new file mode 100644 index 0000000..1916880 --- /dev/null +++ b/src/lib/debug.h @@ -0,0 +1,102 @@ +/** + * @file debug.h + * @brief DEBUG module + * @author Eric Xu + * @date Oct 15 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + +#ifndef DEBUG_H_ +#define DEBUG_H_ + +#include + +#ifdef CONFIG_DBG_STATS +/*-------------------------------------------------------------------------------------------------- + * DEBUG VARIABLE + *------------------------------------------------------------------------------------------------*/ +extern atomic_t i2c_transfer_active; + +extern volatile uint32_t fifo_read_task_counter; +extern volatile uint32_t read_shot_data_counter; +extern volatile uint32_t read_into_dummy_counter; +extern volatile uint32_t fifo_read_FTH_counter; +extern volatile uint32_t read_shot_data_after_fifo_read_counter; +extern volatile uint32_t fifo_waterM_total_hit_counter; +extern volatile uint32_t fifo_waterM_hit_counter; +extern volatile uint32_t fifo_overrun_counter; +extern volatile uint32_t unread_words_before_read; +extern volatile uint32_t unread_words_after_read; +extern volatile uint32_t max_unread_words_before_read; +extern volatile uint32_t max_unread_words_after_read; + +extern volatile uint32_t imu_task_during_i2c_counter; +extern volatile uint32_t fsm_task_counter; +extern volatile uint32_t fsm_task_during_i2c_counter; +extern volatile uint32_t event_task_counter; +extern volatile uint32_t event_task_during_i2c_counter; + + +/*-------------------------------------------------------------------------------------------------- + * DEBUG MACRO + *------------------------------------------------------------------------------------------------*/ +#define DBG_STAT_INC(counter) counter++ +#define DBG_STAT_INC_IF(condition, counter) do { if (condition) counter++; } while(0) +#define DBG_STAT_TRACK_MAX(current_value, max_value) \ + do { \ + __typeof__(current_value) _temp_val = (current_value); \ + if (_temp_val > (max_value)) { \ + (max_value) = _temp_val; \ + } \ + } while(0) + +/* Thread-safe versions using stat_mutex */ +#define DBG_STAT_INC_SAFE(counter, mutex) \ + do { \ + k_mutex_lock(&(mutex), K_FOREVER); \ + counter++; \ + k_mutex_unlock(&(mutex)); \ + } while(0) + +#define DBG_STAT_INC_IF_SAFE(condition, counter, mutex) \ + do { \ + if (condition) { \ + k_mutex_lock(&(mutex), K_FOREVER); \ + counter++; \ + k_mutex_unlock(&(mutex)); \ + } \ + } while(0) + +#define DBG_STAT_TRACK_VALUE_SAFE(current_value, latest_value, mutex) \ + do { \ + __typeof__(current_value) _temp_val = (current_value); \ + k_mutex_lock(&(mutex), K_FOREVER); \ + (latest_value) = _temp_val; \ + k_mutex_unlock(&(mutex)); \ + } while(0) + +#define DBG_STAT_TRACK_MAX_SAFE(current_value, max_value, mutex) \ + do { \ + __typeof__(current_value) _temp_val = (current_value); \ + k_mutex_lock(&(mutex), K_FOREVER); \ + if (_temp_val > (max_value)) { \ + (max_value) = _temp_val; \ + } \ + k_mutex_unlock(&(mutex)); \ + } while(0) + +#else +#define DBG_STAT_INC(counter) do {} while(0) +#define DBG_STAT_INC_IF(condition, counter) do {} while(0) +#define DBG_STAT_TRACK_MAX(current_value, max_value) do {} while(0) +#define DBG_STAT_INC_SAFE(counter, mutex) do {} while(0) +#define DBG_STAT_INC_IF_SAFE(condition, counter, mutex) do {} while(0) +#define DBG_STAT_TRACK_VALUE_SAFE(current_value, latest_value, mutex) do {} while(0) +#define DBG_STAT_TRACK_MAX_SAFE(current_value, max_value, mutex) do {} while(0) +#endif /* CONFIG_DBG_STATS */ + + +#endif \ No newline at end of file diff --git a/src/lib/errno.c b/src/lib/errno.c new file mode 100644 index 0000000..23f62a2 --- /dev/null +++ b/src/lib/errno.c @@ -0,0 +1,83 @@ +/** + * @file errno.c + * @brief Error codes + * @author Kenny Tran + * @date Aug 28 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "print.h" +#include "errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void ERRNO_cli_cmd (int32_t argc, char **argv) +{ + PRINT (INFO, "ERROR CODES\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "ERRNO_BUSY = %d\r\n", ERRNO_BUSY); + PRINT (INFO, "ERRNO_ALREADY_INITIALIZED = %d\r\n", ERRNO_ALREADY_INITIALIZED); + PRINT (INFO, "ERRNO_SUCCESS = %d\r\n", ERRNO_SUCCESS); + PRINT (INFO, "ERRNO_FAILURE = %d\r\n", ERRNO_FAILURE); + PRINT (INFO, "ERRNO_NOT_INITIALIZED = %d\r\n", ERRNO_NOT_INITIALIZED); + PRINT (INFO, "ERRNO_INVALID_PARAM = %d\r\n", ERRNO_INVALID_PARAM); + PRINT (INFO, "ERRNO_BAD_POINTER = %d\r\n", ERRNO_BAD_POINTER); + PRINT (INFO, "ERRNO_ID_FAILURE = %d\r\n", ERRNO_ID_FAILURE); + PRINT (INFO, "ERRNO_LIMIT_REACHED = %d\r\n", ERRNO_LIMIT_REACHED); + PRINT (INFO, "ERRNO_CRC_FAILURE = %d\r\n", ERRNO_CRC_FAILURE); + PRINT (INFO, "ERRNO_OUT_OF_RANGE = %d\r\n", ERRNO_OUT_OF_RANGE); + PRINT (INFO, "ERRNO_NOT_READY = %d\r\n", ERRNO_NOT_READY); + PRINT (INFO, "ERRNO_GPIO_FAILURE = %d\r\n", ERRNO_GPIO_FAILURE); + PRINT (INFO, "ERRNO_I2C_FAILURE = %d\r\n", ERRNO_I2C_FAILURE); + PRINT (INFO, "ERRNO_PWM_FAILURE = %d\r\n", ERRNO_PWM_FAILURE); + PRINT (INFO, "ERRNO_SPI_FAILURE = %d\r\n", ERRNO_SPI_FAILURE); + PRINT (INFO, "ERRNO_UART_FAILURE = %d\r\n", ERRNO_UART_FAILURE); + PRINT (INFO, "ERRNO_ADC_FAILURE = %d\r\n", ERRNO_ADC_FAILURE); + PRINT (INFO, "ERRNO_RTC_FAILURE = %d\r\n", ERRNO_RTC_FAILURE); + PRINT (INFO, "ERRNO_PWR_MGMT_FAILURE = %d\r\n", ERRNO_PWR_MGMT_FAILURE); + PRINT (INFO, "ERRNO_NVM_FAILURE = %d\r\n", ERRNO_NVM_FAILURE); + PRINT (INFO, "ERRNO_NOT_ENOUGH_MEMORY = %d\r\n", ERRNO_NOT_ENOUGH_MEMORY); + PRINT (INFO, "ERRNO_FILE_NOT_FOUND = %d\r\n", ERRNO_FILE_NOT_FOUND); + PRINT (INFO, "ERRNO_INVALID_DEPTH = %d\r\n", ERRNO_INVALID_DEPTH); + PRINT (INFO, "ERRNO_SIZE_MISMATCH = %d\r\n", ERRNO_SIZE_MISMATCH); + PRINT (INFO, "ERRNO_NO_VALID_ENTRIES = %d\r\n", ERRNO_NO_VALID_ENTRIES); + PRINT (INFO, "ERRNO_MEMORY_NOT_AVAILABLE = %d\r\n", ERRNO_MEMORY_NOT_AVAILABLE); + PRINT (INFO, "ERRNO_EXCEED_FILE_NUM = %d\r\n", ERRNO_EXCEED_FILE_NUM); + PRINT (INFO, "ERRNO_EXCEED_FILE_SIZE = %d\r\n", ERRNO_EXCEED_FILE_SIZE); + PRINT (INFO, "ERRNO_EXCEED_NAME_SIZE = %d\r\n", ERRNO_EXCEED_NAME_SIZE); +} diff --git a/src/lib/errno.h b/src/lib/errno.h new file mode 100644 index 0000000..68ab8e4 --- /dev/null +++ b/src/lib/errno.h @@ -0,0 +1,83 @@ +/** + * @file errno.h + * @brief Error codes + * @author Kenny Tran + * @date Aug 28 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef ERRNO_H_ +#define ERRNO_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum ERRNO +{ + ERRNO_BUSY = 2, + ERRNO_ALREADY_INITIALIZED = 1, + + ERRNO_SUCCESS = 0, + + ERRNO_FAILURE = -1, + ERRNO_NOT_INITIALIZED = -2, + ERRNO_INVALID_PARAM = -3, + ERRNO_BAD_POINTER = -4, + ERRNO_ID_FAILURE = -5, + ERRNO_LIMIT_REACHED = -6, + ERRNO_CRC_FAILURE = -7, + ERRNO_OUT_OF_RANGE = -8, + // ERRNO_NOT_FOUND = -9, + + /* Peripherals */ + ERRNO_NOT_READY = -10, + ERRNO_GPIO_FAILURE = -11, + ERRNO_I2C_FAILURE = -12, + ERRNO_PWM_FAILURE = -13, + ERRNO_SPI_FAILURE = -14, + ERRNO_UART_FAILURE = -15, + ERRNO_ADC_FAILURE = -16, + ERRNO_RTC_FAILURE = -17, /* Real-Time Counter */ + + ERRNO_PWR_MGMT_FAILURE = -18, + ERRNO_NVM_FAILURE = -19, + ERRNO_WDT_FAILURE = -20, + + /* File IO */ + ERRNO_NOT_ENOUGH_MEMORY = -30, + ERRNO_FILE_NOT_FOUND = -31, + ERRNO_INVALID_DEPTH = -32, + ERRNO_SIZE_MISMATCH = -33, + ERRNO_NO_VALID_ENTRIES = -34, + ERRNO_MEMORY_NOT_AVAILABLE = -35, + + /* Shot Storage */ + ERRNO_EXCEED_FILE_NUM = -40, + ERRNO_EXCEED_FILE_SIZE = -41, + ERRNO_EXCEED_NAME_SIZE = -42 +} ERRNO_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void ERRNO_cli_cmd (int32_t argc, char **argv); + + +#endif /* ERRNO_H_ */ diff --git a/src/lib/fs.c b/src/lib/fs.c new file mode 100644 index 0000000..c090cc2 --- /dev/null +++ b/src/lib/fs.c @@ -0,0 +1,1196 @@ +/** + * @file fs.c + * @brief File system using non-volatile external memory. + * @author Kenny Tran + * @date Mar 04 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include + +#include + +#include "../lib/crc.h" +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "../bsp/nvm_ext.h" + +#include "fs.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +/** + * @brief Size of flash space allocated to store metadata. + */ +#define _FS_META_SIZE (0x1000) +/** + * @brief Starting address of metadata. + */ +#define _FS_META_START_ADDR (NVM_EXT_START_ADDR) +/** + * @brief Ending address of metadata. + */ +#define _FS_META_END_ADDR (_FS_META_START_ADDR + _FS_META_SIZE - 1) +/** + * @brief Starting address for file storage. + */ +#define _FS_START_ADDR (_FS_META_END_ADDR + 1) +/** + * @brief Ending address for file storage. + */ +#define _FS_END_ADDR (NVM_EXT_START_ADDR + NVM_EXT_SIZE - 1) +/** + * @brief Size of flash space allocated to store files. + */ +#define _FS_SIZE (_FS_END_ADDR - _FS_START_ADDR + 1) +/** + * @brief Minimum sectors allocated for a file for wear-leveling. + */ +#define _FS_SECTOR_ALLOCATION_MIN (1) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +/** + * @brief Struct containing necessary metadata for each file. + * + * @note Packed and align to nearest 1 byte to save padding/alignment space. No need to align by + * word size for performance as this is read only once at startup. + */ +typedef struct +{ + char name[(FS_FILENAME_LEN + 1)]; + uint16_t size; + uint32_t start_addr; + uint32_t end_addr; + uint32_t checksum; +} __attribute__((packed, aligned(1))) _fs_meta_s; + +/** + * @brief File structure used to keep records and wear leveling. + */ +typedef struct +{ + _fs_meta_s meta; + uint32_t newest_idx_addr; + uint32_t empty_idx_addr; + uint32_t newest_idx; + uint16_t entries_per_sector; + uint16_t sectors; +} _fs_file_ctx_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static K_MUTEX_DEFINE (_fs_mutex); +static uint32_t _fs_meta_empty_addr = _FS_META_START_ADDR; +static uint8_t _fs_file_cnt = 0; +static _fs_file_ctx_s _fs_files[FS_MAX_FILES]; +static bool _fs_init = false; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +/** + * @fn ERRNO_e _fs_meta_init (void) + * @brief Scans the dedicated metadata section in flash for file table. + * Then scans each file to update the file context structure. + * + * @note Flash reserved space for metadata is assumed to be sector aligned. + * + * @return ERRNO_SUCCESS if successful, error code if not. + */ +static ERRNO_e _fs_meta_init (void); + +/** + * @fn ERRNO_e _fs_file_meta_add (_fs_meta_s file_meta) + * @brief Adds a new file entry to the metadata space. + * + * @param file_meta - The file's metadata information. + * + * @return ERRNO_SUCCESS if successful, error code if not. + */ +static ERRNO_e _fs_file_meta_add (_fs_meta_s file_meta); + +/** + * @fn ERRNO_e _fs_is_empty (uint32_t start_addr, uint16_t len) + * @brief Checks for empty space in the provided flash segment. + * + * @param start_addr - The starting address of the flash segment. + * @param len - The number of bytes to check. + * + * @return ERRNO_SUCCESS if empty, ERRNO_MEMORY_NOT_AVAILABLE if not, and error code if + * failure. + */ +static ERRNO_e _fs_is_empty (uint32_t start_addr, uint16_t len); + +/** + * @fn static uint32_t _fs_prev_entry_addr_get (uint32_t start_addr, _fs_file_ctx_s* file_ctx) + * @brief Returns the previous entry's starting address. + * + * @param start_addr - The current starting address. + * @param file - pointer to the file context. + * + * @return The starting address of the previous entry. + */ +static uint32_t _fs_prev_entry_addr_get (uint32_t start_addr, _fs_file_ctx_s* file_ctx); + +/** + * @fn uint32_t _fs_sector_boundary_addr_get (uint32_t addr) + * @brief Gets the starting address of the next sector starting at the provided address. + * + * @param addr - The address to start at. + * + * @return The next sector boundary address, starting at the provided address. + */ +static uint32_t _fs_sector_boundary_addr_get (uint32_t addr); + +/** + * @fn bool _fs_is_entry_valid (uint32_t start_addr, uint16_t len) + * @brief Checks if the entry is valid. + * + * @note Need to include index and checksum sizes into the length. + * + * @param start_addr - The starting address of the data to verify. + * @param len - The length of the data to verify, including index and checksum. + * + * @return True if entry is valid, false if not. + */ +static bool _fs_is_entry_valid (uint32_t start_addr, uint16_t len); + +/** + * @fn _fs_file_ctx_s* _fs_file_get (char* filename) + * @brief Gets file context for specified file. + * + * @param filename - The file name. + * + * @return The file context pointer, NULL if failure. + */ +static _fs_file_ctx_s *_fs_file_get (char *filename); + +/** + * @fn ERRNO_e _fs_meta_rewrite (void) + * @brief Erases the metadata sector and rewrites all current file metadata. + * + * @return ERRNO_SUCCESS if successful, error code if not. + */ +static ERRNO_e _fs_meta_rewrite (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e FS_init (void) +{ + ERRNO_e err = ERRNO_FAILURE; + + if (_fs_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + /* Initialize CRC.*/ + CRC_init (); + + if (NVM_EXT_init () < ERRNO_SUCCESS) + { + return ERRNO_NVM_FAILURE; + } + + /* Initialized metadata space. */ + err = _fs_meta_init (); + if (err != ERRNO_SUCCESS) + { + return err; + } + + /* Set init flag in case this gets called more than once. */ + _fs_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e FS_open_or_create (char *p_filename, FS_file_t *p_file, uint16_t size, uint16_t depth) +{ + ERRNO_e err; + + /* Check filesystem has been initialized. */ + if (!_fs_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Check if we've exceeded file limit. */ + if (_fs_file_cnt >= FS_MAX_FILES) + { + *p_file = NULL; + return ERRNO_LIMIT_REACHED; + } + + /* Check if we've exceeded size limit, including checksum. */ + if (size > FS_MAX_FILE_ENTRY_SIZE) + { + *p_file = NULL; + return ERRNO_NOT_ENOUGH_MEMORY; + } + + /* Depth minimum is 1. */ + if (depth < 1) + { + *p_file = NULL; + return ERRNO_INVALID_DEPTH; + } + + /* Fetch file. */ + *p_file = _fs_file_get (p_filename); + + /* Create file if it does not exist. */ + if (*p_file == NULL) + { + /* Calculate number of entries per sector. */ + _fs_files[_fs_file_cnt].entries_per_sector = (uint16_t) (FS_SECTOR_SIZE / + (size + FS_FILE_INDEX_SIZE + FS_FILE_CHECKSUM_SIZE)); + + /* Calculate number of sectors needed. */ + if (((depth / _fs_files[_fs_file_cnt].entries_per_sector) + 1) >= + _FS_SECTOR_ALLOCATION_MIN) + { + _fs_files[_fs_file_cnt].sectors = + ((depth / _fs_files[_fs_file_cnt].entries_per_sector) + 1); + } + else + { + _fs_files[_fs_file_cnt].sectors = _FS_SECTOR_ALLOCATION_MIN; + } + + /* Assign file name. */ + strcpy (_fs_files[_fs_file_cnt].meta.name, p_filename); + + /* Calculate and set starting address. */ + _fs_files[_fs_file_cnt].meta.start_addr = + (_fs_file_cnt) ? (_fs_files[(_fs_file_cnt - 1)].meta.end_addr + 1) : _FS_START_ADDR; + + /* Calculate size with depth (aligned by sector) and determine ending address. */ + _fs_files[_fs_file_cnt].meta.end_addr = _fs_files[_fs_file_cnt].meta.start_addr + + (_fs_files[_fs_file_cnt].sectors * FS_SECTOR_SIZE) - 1; + + /* Set size. */ + _fs_files[_fs_file_cnt].meta.size = size; + + /* Calculate new checksum for file metadata. */ + if (CRC_32_calculate ((uint8_t *) &_fs_files[_fs_file_cnt], + (sizeof (_fs_meta_s) - FS_FILE_CHECKSUM_SIZE), + CRC_32_CHECKSUM_INIT, + &_fs_files[_fs_file_cnt].meta.checksum)) + { + return ERRNO_CRC_FAILURE; + } + + /* Set newest index address to starting address since this is a new file. */ + _fs_files[_fs_file_cnt].newest_idx_addr = _fs_files[_fs_file_cnt].meta.start_addr; + + /* Set empty index address to starting address since this is a new file. */ + _fs_files[_fs_file_cnt].empty_idx_addr = _fs_files[_fs_file_cnt].meta.start_addr; + + /* Initialize entry index to -1 since we roll over to 0 for first write. */ + _fs_files[_fs_file_cnt].newest_idx = (uint32_t) -1; + + /* Add file information to flash metadata. */ + err = _fs_file_meta_add (_fs_files[_fs_file_cnt].meta); + if (err) + { + *p_file = NULL; + return err; + } + + /* Set file address and increment file count. */ + *p_file = (FS_file_t)&_fs_files[_fs_file_cnt++]; + } + else + { + /* Verify existing file size matches. */ + if (((_fs_file_ctx_s*)*p_file)->meta.size != size) + { + *p_file = NULL; + return ERRNO_SIZE_MISMATCH; + } + } + + return ERRNO_SUCCESS; +} + +ERRNO_e FS_write (FS_file_t file, uint8_t *p_src) +{ + ERRNO_e err; + _fs_file_ctx_s *file_ctx = (_fs_file_ctx_s *) file; + uint16_t entry_len = file_ctx->meta.size + FS_FILE_INDEX_SIZE + FS_FILE_CHECKSUM_SIZE; + uint32_t checksum; + uint32_t sector_boundary_addr = _fs_sector_boundary_addr_get (file_ctx->empty_idx_addr); + uint8_t buf[entry_len]; + + /* Check filesystem has been initialized. */ + if (!_fs_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Check if source pointer is valid. */ + if (p_src == NULL) + { + return ERRNO_BAD_POINTER; + } + + k_mutex_lock (&_fs_mutex, K_FOREVER); + + /* Verify space is empty prior to writing. */ + err = _fs_is_empty (file_ctx->empty_idx_addr, entry_len); + + if (err) + { + k_mutex_unlock (&_fs_mutex); + return err; + } + + /* Increment and check if we've exceeded number of entries. */ + if (++file_ctx->newest_idx >= FS_MAX_FILE_ENTRIES) + { + k_mutex_unlock (&_fs_mutex); + return ERRNO_LIMIT_REACHED; + } + + /* Copy data to buffer and append index. */ + memcpy (buf, p_src, file_ctx->meta.size); + memcpy (&buf[file_ctx->meta.size ], (uint8_t *) &file_ctx->newest_idx, FS_FILE_INDEX_SIZE); + + /* Calculate checksum of source data and newest index. */ + if (CRC_32_calculate (buf, (file_ctx->meta.size + FS_FILE_INDEX_SIZE), CRC_32_CHECKSUM_INIT, &checksum)) + { + k_mutex_unlock (&_fs_mutex); + return ERRNO_CRC_FAILURE; + } + + /* Copy calculated CRC to buffer. */ + memcpy (&buf[(file_ctx->meta.size + FS_FILE_INDEX_SIZE)], (uint8_t *) &checksum, FS_FILE_CHECKSUM_SIZE); + + /* Write the entire entry. */ + if (NVM_EXT_write (file_ctx->empty_idx_addr, buf, entry_len)) + { + k_mutex_unlock (&_fs_mutex); + return ERRNO_NVM_FAILURE; + } + + /* Update newest index address. */ + file_ctx->newest_idx_addr = file_ctx->empty_idx_addr; + + /* Check if next write will span sectors. */ + if ((file_ctx->empty_idx_addr + (2 * entry_len)) > sector_boundary_addr) + { + /* Check if we have reached the end of the file. */ + if (sector_boundary_addr > file_ctx->meta.end_addr) + { + /* Wrap to beginning of file. */ + sector_boundary_addr = file_ctx->meta.start_addr; + + /* Update empty index address to start address for the next write. */ + file_ctx->empty_idx_addr = file_ctx->meta.start_addr; + + /* If sector allocation is only 1, we will erase our own data that was just written above. + and rewrite to starting address. */ + if (file_ctx->sectors == 1) + { + /* Erase the sector. */ + if (NVM_EXT_erase_block (sector_boundary_addr, NVM_EXT_BLOCK_SIZE_4KB)) + { + k_mutex_unlock (&_fs_mutex); + return ERRNO_NVM_FAILURE; + } + + /* Write the entire entry. */ + if (NVM_EXT_write (file_ctx->empty_idx_addr, buf, entry_len)) + { + k_mutex_unlock (&_fs_mutex); + return ERRNO_NVM_FAILURE; + } + + /* Update newest and empty index address. + * The empty_idx_addr must be updated to prepare for the next write */ + file_ctx->newest_idx_addr = file_ctx->empty_idx_addr; + file_ctx->empty_idx_addr += entry_len; + + k_mutex_unlock (&_fs_mutex); + return ERRNO_SUCCESS; + } + } + else + { + /* Update empty index address to start at the next sector. */ + file_ctx->empty_idx_addr = sector_boundary_addr; + } + + /* Erase the sector. */ + if (NVM_EXT_erase_block (sector_boundary_addr, NVM_EXT_BLOCK_SIZE_4KB)) + { + k_mutex_unlock (&_fs_mutex); + return ERRNO_NVM_FAILURE; + } + } + else + { + /* Update empty index address for the next write. */ + file_ctx->empty_idx_addr += entry_len; + } + + k_mutex_unlock (&_fs_mutex); + + return ERRNO_SUCCESS; +} + +ERRNO_e FS_write_at_offset (FS_file_t file, uint8_t *p_src, uint16_t offset, uint16_t len) +{ + _fs_file_ctx_s *file_ctx = (_fs_file_ctx_s *) file; + uint8_t buf[file_ctx->meta.size]; + ERRNO_e err; + + /* Check filesystem has been initialized. */ + if (!_fs_init) + { + return ERRNO_NOT_INITIALIZED; + } + + err = FS_read (file, buf, 0, file_ctx->meta.size); + + if (err) + { + return err; + } + + /* Update contents. */ + memcpy (&buf[offset], p_src, len); + + err = FS_write (file, buf); + + return err; +} + +ERRNO_e FS_read (FS_file_t file, uint8_t *p_dest, uint16_t offset, uint16_t len) +{ + _fs_file_ctx_s *file_ctx = (_fs_file_ctx_s *) file; + uint32_t entry_start_addr = file_ctx->newest_idx_addr; + uint32_t entry_len = file_ctx->meta.size + FS_FILE_INDEX_SIZE + FS_FILE_CHECKSUM_SIZE; + uint16_t entries = (file_ctx->sectors * file_ctx->entries_per_sector); + uint16_t i; + + /* Check filesystem has been initialized. */ + if (!_fs_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Check if p_destination pointer is valid. */ + if (p_dest == NULL) + { + return ERRNO_BAD_POINTER; + } + + /* Check if we are over file size limit. */ + if (len > file_ctx->meta.size) + { + return ERRNO_NOT_ENOUGH_MEMORY; + } + + if (offset + len > file_ctx->meta.size) + { + return ERRNO_LIMIT_REACHED; + } + + k_mutex_lock (&_fs_mutex, K_FOREVER); + + /* Loop through entries until we find a valid entry. */ + for (i = 0; i < entries; i++) { + /* Check if entry is valid. */ + if (_fs_is_entry_valid (entry_start_addr, entry_len)) { + break; + } else { + if (i == (entries - 1)) { + return ERRNO_NO_VALID_ENTRIES; + } + } + + /* Get starting address for the previous entry. */ + entry_start_addr = _fs_prev_entry_addr_get (entry_start_addr, file_ctx); + } + + /* Read the entry. */ + if (NVM_EXT_read (entry_start_addr + offset, p_dest, len)) + { + return ERRNO_NVM_FAILURE; + } + + k_mutex_unlock (&_fs_mutex); + + return ERRNO_SUCCESS; +} + + +ERRNO_e FS_clear (FS_file_t file) +{ + _fs_file_ctx_s *file_ctx = (_fs_file_ctx_s *) file; + // uint32_t sector_len = (file_ctx->meta.end_addr - file_ctx->meta.start_addr + 1) % + // FS_SECTOR_SIZE + 1; + + /* Check filesystem has been initialized. */ + if (!_fs_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (NVM_EXT_erase_range (file_ctx->meta.start_addr, file_ctx->meta.end_addr)) + { + return ERRNO_NVM_FAILURE; + } + + /* Reset index addresses and entries. */ + file_ctx->newest_idx_addr = file_ctx->meta.start_addr; + file_ctx->empty_idx_addr = file_ctx->meta.start_addr; + file_ctx->newest_idx = (uint32_t) -1; + + return ERRNO_SUCCESS; +} + +ERRNO_e FS_delete (char *p_filename) +{ + ERRNO_e err; + int32_t del_idx = -1; + uint8_t buf[FS_SECTOR_SIZE]; + + /* Check filesystem has been initialized. */ + if (!_fs_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Find the file index. */ + for (uint8_t i = 0; i < _fs_file_cnt; i++) + { + if (!strcmp (p_filename, _fs_files[i].meta.name)) + { + del_idx = i; + break; + } + } + + if (del_idx == -1) + { + return ERRNO_FILE_NOT_FOUND; + } + + /* Erase the deleted file's data range. */ + err = NVM_EXT_erase_range (_fs_files[del_idx].meta.start_addr, _fs_files[del_idx].meta.end_addr); + if (err) + { + return err; + } + + /* Shift the in-memory array to remove the deleted file. */ + for (uint8_t i = del_idx + 1; i < _fs_file_cnt; i++) + { + _fs_files[i - 1] = _fs_files[i]; + } + _fs_file_cnt--; + + /* Reclaim space by shifting subsequent files' addresses and copying their data. */ + uint32_t next_start = (del_idx == 0) ? _FS_START_ADDR : (_fs_files[del_idx - 1].meta.end_addr + 1); + + for (uint8_t i = del_idx; i < _fs_file_cnt; i++) + { + uint32_t old_start = _fs_files[i].meta.start_addr; + uint32_t old_end = _fs_files[i].meta.end_addr; + uint32_t file_size = old_end - old_start + 1; + uint32_t new_start = next_start; + uint32_t new_end = new_start + file_size - 1; + + /* Erase the new range for the file. */ + err = NVM_EXT_erase_range (new_start, new_end); + if (err) + { + return err; + } + + /* Copy data from old address to new address in chunks. */ + for (uint32_t offset = 0; offset < file_size; offset += FS_SECTOR_SIZE) + { + uint32_t chunk_size = (file_size - offset < FS_SECTOR_SIZE) ? (file_size - offset) : FS_SECTOR_SIZE; + + err = NVM_EXT_read (old_start + offset, buf, chunk_size); + if (err) + { + return err; + } + + err = NVM_EXT_write (new_start + offset, buf, chunk_size); + if (err) + { + return err; + } + } + + /* Update the file's metadata with new addresses. */ + _fs_files[i].meta.start_addr = new_start; + _fs_files[i].meta.end_addr = new_end; + + /* Adjust internal addresses by the offset difference. */ + int32_t addr_offset = new_start - old_start; + _fs_files[i].newest_idx_addr += addr_offset; + _fs_files[i].empty_idx_addr += addr_offset; + + /* Recalculate metadata checksum. */ + if (CRC_32_calculate ((uint8_t *) &_fs_files[i].meta, + (sizeof (_fs_meta_s) - FS_FILE_CHECKSUM_SIZE), + CRC_32_CHECKSUM_INIT, + &_fs_files[i].meta.checksum)) + { + return ERRNO_CRC_FAILURE; + } + + /* Update next start for the following file. */ + next_start = new_end + 1; + } + + /* Rewrite the metadata sector without the deleted file. */ + err = _fs_meta_rewrite (); + if (err) + { + return err; + } + + return ERRNO_SUCCESS; +} + +uint32_t FS_memory_used (void) +{ + return (_fs_file_cnt ? + (_fs_files[(_fs_file_cnt - 1)].meta.end_addr - _FS_START_ADDR + 1) : 0); +} + +uint32_t FS_memory_available (void) +{ + return _FS_SIZE - FS_memory_used (); +} + +void FS_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + PRINT (INFO, "FS\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "Memory used (bytes) : %d\r\n", FS_memory_used ()); + PRINT (INFO, "Memory available (bytes) : %d\r\n", FS_memory_available ()); + PRINT (INFO, "Total memory (bytes) : %d\r\n", _FS_SIZE); + } + else if (argc == 1) + { + if (!strcmp (argv[0], "--meta")) + { + PRINT (INFO, "FS Metadata Space\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + PRINT (INFO, "Start address : %d\r\n", _FS_META_START_ADDR); + PRINT (INFO, "End address : %d\r\n", _FS_META_END_ADDR); + PRINT (INFO, "Total memory (bytes) : %d\r\n", _FS_META_SIZE); + PRINT (INFO, "Next entry address : %d\r\n", _fs_meta_empty_addr); + } + else if (!strcmp (argv[0], "--list")) + { + uint8_t i; + + PRINT (INFO, "FILES\r\n"); + PRINT (INFO, "-------------------------------------------\r\n"); + for (i = 0; i < _fs_file_cnt; i++) + { + PRINT (INFO, "%s\r\n", _fs_files[i].meta.name); + } + } + else + { + goto USAGE; + } + } + else if (argc == 2) + { + _fs_file_ctx_s *p_file; + + if (!strcmp (argv[0], "--details")) + { + p_file = _fs_file_get (argv[1]); + + if (p_file != NULL) + { + PRINT (INFO, "%s : \r\n", p_file->meta.name); + PRINT (INFO, "file start address : %d\r\n", p_file->meta.start_addr); + PRINT (INFO, "file end address : %d\r\n", p_file->meta.end_addr); + PRINT (INFO, "file size (bytes) : %d\r\n", p_file->meta.size); + PRINT (INFO, "checksum : 0x%08X\r\n", p_file->meta.checksum); + PRINT (INFO, "newest index address : %d\r\n", p_file->newest_idx_addr); + PRINT (INFO, "empty index address : %d\r\n", p_file->empty_idx_addr); + PRINT (INFO, "newest index : %d\r\n", p_file->newest_idx); + PRINT (INFO, "entries per sector : %d\r\n", p_file->entries_per_sector); + PRINT (INFO, "sectors : %d\r\n", p_file->sectors); + } + else + { + PRINT (INFO, "ERROR : %s does not exist.\r\n", argv[1]); + } + } + else if (!strcmp (argv[0], "--delete")) + { + ERRNO_e err = FS_delete (argv[1]); + if (err == ERRNO_SUCCESS) + { + PRINT (INFO, "%s deleted successfully.\r\n", argv[1]); + } + else + { + PRINT (INFO, "ERROR : Failed to delete %s (error: %d).\r\n", argv[1], err); + } + } + else + { + goto USAGE; + } + } + else if (argc == 4) + { + if (!strcmp (argv[0], "--create")) + { + ERRNO_e err; + FS_file_t file; + char *p_filename = argv[1]; + uint16_t size = (uint16_t) strtoul(argv[2], NULL, 0); + uint16_t depth = (uint16_t) strtoul(argv[3], NULL, 0); + + err = FS_open_or_create (p_filename, &file, size, depth); + if (err == ERRNO_SUCCESS) + { + PRINT (INFO, "%s created successfully.\r\n", p_filename); + } + else + { + PRINT (INFO, "ERROR : Failed to create %s (error: %d).\r\n", p_filename, err); + } + } + else if (!strcmp (argv[0], "--read")) + { + ERRNO_e err; + FS_file_t file; + char *p_filename = argv[1]; + uint16_t size = (uint16_t) strtoul(argv[2], NULL, 0); + uint16_t depth = (uint16_t) strtoul(argv[3], NULL, 0); + uint8_t buf[size]; + uint16_t i; + + err = FS_open_or_create (p_filename, &file, size, depth); + if (err != ERRNO_SUCCESS) + { + PRINT (INFO, "ERROR : Failed to open %s (error: %d).\r\n", p_filename, err); + return; + } + + err = FS_read (file, buf, 0, size); + if (err != ERRNO_SUCCESS) + { + PRINT (INFO, "ERROR : Failed to read %s (error: %d).\r\n", p_filename, err); + return; + } + + for (i = 0; i < size; i++) + { + PRINT (INFO, "%X", buf[i]); + } + PRINT (INFO, "\r\n"); + } + else + { + goto USAGE; + } + } + else if (argc == 5) + { + if (!strcmp (argv[0], "--write")) + { + ERRNO_e err; + FS_file_t file; + char *p_filename = argv[1]; + uint16_t size = (uint16_t) strtoul(argv[2], NULL, 0); + uint16_t depth = (uint16_t) strtoul(argv[3], NULL, 0); + + err = FS_open_or_create (p_filename, &file, size, depth); + if (err != ERRNO_SUCCESS) + { + PRINT (INFO, "ERROR : Failed to open or create %s (error: %d).\r\n", p_filename, err); + return; + } + + err = FS_write (file, argv[4]); + if (err == ERRNO_SUCCESS) + { + PRINT (INFO, "Data written to %s successfully.\r\n", p_filename); + } + else + { + PRINT (INFO, "ERROR : Failed to write to %s (error: %d).\r\n", p_filename, err); + } + } + else + { + goto USAGE; + } + } + else + { +USAGE: + PRINT (INFO, "Usage: fs [OPTION...]\r\n"); + PRINT (INFO, " --meta gets metadata boundary addresses and indexes\r\n"); + PRINT (INFO, " --list lists all files\r\n"); + PRINT (INFO, " --details gets file details\r\n"); + PRINT (INFO, " <%%s> filename\r\n"); + PRINT (INFO, " --delete deletes a file\r\n"); + PRINT (INFO, " <%%s> filename\r\n"); + PRINT (INFO, " --create creates a file\r\n"); + PRINT (INFO, " <%%s> filename\r\n"); + PRINT (INFO, " <%%u> size\r\n"); + PRINT (INFO, " <%%u> depth\r\n"); + PRINT (INFO, " --write writes hex data to a file\r\n"); + PRINT (INFO, " <%%s> filename\r\n"); + PRINT (INFO, " <%%d> size\r\n"); + PRINT (INFO, " <%%d> depth\r\n"); + PRINT (INFO, " <%%s> string\r\n"); + PRINT (INFO, " --read prints the contents of a file in hex\r\n"); + PRINT (INFO, " <%%s> filename\r\n"); + PRINT (INFO, " <%%d> size\r\n"); + PRINT (INFO, " <%%d> depth\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static ERRNO_e _fs_meta_init (void) +{ + ERRNO_e err; + uint32_t addr; + uint8_t file_idx; + uint32_t calc_checksum; + + /* Scan and update empty metadata address for next write. */ + for (_fs_meta_empty_addr = _FS_META_START_ADDR; + _fs_meta_empty_addr < _FS_META_END_ADDR; + _fs_meta_empty_addr += sizeof(_fs_meta_s)) + { + /* Check if metadata space is empty. */ + err = _fs_is_empty (_fs_meta_empty_addr, sizeof (_fs_meta_s)); + + if (!err) + { + /* Break if we've reached an empty slot. */ + break; + } + else if (err != ERRNO_MEMORY_NOT_AVAILABLE) + { + return err; + } + } + + /* Scan the entire metadata space. */ + /* TODO : Further analysis needed: + Previously scanned entire space, now only scanning til next empty space. This might be sufficient. + for (addr = _FS_META_START_ADDR; addr < _FS_META_END_ADDR; addr += sizeof(_fs_meta_s)) */ + for (addr = _FS_META_START_ADDR; addr < _fs_meta_empty_addr; addr += sizeof(_fs_meta_s)) + { + uint8_t buf[sizeof(_fs_meta_s)]; + uint16_t checksum_idx = sizeof(_fs_meta_s) - FS_FILE_CHECKSUM_SIZE; + + /* Read entry length. */ + if (NVM_EXT_read (addr, buf, sizeof(_fs_meta_s))) + { + return ERRNO_NVM_FAILURE; + } + + /* Verify if entry is valid by checking CRC checksum. */ + if (CRC_32_calculate (buf, checksum_idx, CRC_32_CHECKSUM_INIT, &calc_checksum)) + { + return ERRNO_CRC_FAILURE; + } + if (calc_checksum == *(uint32_t*)&buf[checksum_idx]) + { + /* Check if we've reached max files. */ + if (_fs_file_cnt == FS_MAX_FILES) + { + return ERRNO_LIMIT_REACHED; + } + else + { + /* Copy to local file table and increment file count. */ + _fs_files[_fs_file_cnt++].meta = *(_fs_meta_s*)buf; + } + } + } + + /* Loop through each file's metadata and scan for information. */ + for (file_idx = 0; file_idx < _fs_file_cnt; file_idx++) + { + uint16_t entry_len = _fs_files[file_idx].meta.size + FS_FILE_INDEX_SIZE + FS_FILE_CHECKSUM_SIZE; + uint16_t checksum_idx = _fs_files[file_idx].meta.size + FS_FILE_INDEX_SIZE; + uint8_t buf[entry_len]; + + /* Calculate number of entries per sector. */ + _fs_files[file_idx].entries_per_sector = (uint16_t) (FS_SECTOR_SIZE / entry_len); + + /* Calculate number of sectors needed. */ + _fs_files[file_idx].sectors = ((_fs_files[file_idx].meta.end_addr - _fs_files[file_idx].meta.start_addr) / + FS_SECTOR_SIZE) + 1; + + /* Set newest index address. */ + _fs_files[file_idx].newest_idx_addr = _fs_files[file_idx].meta.start_addr; + + /* Initialize entry index to -1 since we roll over to 0 for first write. */ + _fs_files[file_idx].newest_idx = (uint16_t) -1; + + /* Loop to find newest index and newest index address. */ + for (addr = _fs_files[file_idx].meta.start_addr; + addr < _fs_files[file_idx].meta.end_addr; ) + { + /* Read entry length. */ + if (NVM_EXT_read (addr, buf, entry_len)) + { + return ERRNO_NVM_FAILURE; + } + + if (CRC_32_calculate (buf, checksum_idx, CRC_32_CHECKSUM_INIT, &calc_checksum)) + { + return ERRNO_CRC_FAILURE; + } + /* Verify if entry is valid by checking CRC checksum. */ + if (calc_checksum == *(uint32_t *) &buf[checksum_idx]) + { + /* Check if index differences are greater than 0 to determine if index is newer. */ + if ((*(int16_t *) &buf[_fs_files[file_idx].meta.size] - + (int16_t) _fs_files[file_idx].newest_idx) > 0) + { + /* Update newest index address. */ + _fs_files[file_idx].newest_idx_addr = addr; + + /* Update the newest index. */ + _fs_files[file_idx].newest_idx = *(uint16_t *) &buf[_fs_files[file_idx].meta.size]; + } + } + + /* Check if we will span sectors. */ + if ((addr + entry_len) > _fs_sector_boundary_addr_get (addr)) + { + /* Update address to next sector. */ + addr = _fs_sector_boundary_addr_get (addr); + } + else + { + addr += entry_len; + } + } + + /* Loop to find empty index address. */ + for (addr = _fs_files[file_idx].meta.start_addr; + addr < _fs_files[file_idx].meta.end_addr; ) + { + /* Check if entry space is empty. */ + err = _fs_is_empty (addr, entry_len); + + if (!err) + { + /* Set empty index address if we've reached an empty slot. */ + _fs_files[file_idx].empty_idx_addr = addr; + break; + } + else if (err != ERRNO_MEMORY_NOT_AVAILABLE) + { + return err; + } + + /* Check if we will span sectors. */ + if ((addr + entry_len) > _fs_sector_boundary_addr_get (addr)) + { + /* Update address to next sector. */ + addr = _fs_sector_boundary_addr_get (addr); + } + else + { + addr += entry_len; + } + } + } + + return ERRNO_SUCCESS; +} + +static ERRNO_e _fs_file_meta_add (_fs_meta_s file_meta) +{ + /* Verify space is empty prior to writing. */ + ERRNO_e err = _fs_is_empty (_fs_meta_empty_addr, sizeof(_fs_meta_s)); + + if (err) + { + return err; + } + + /* Verify we have enough space in flash. */ + if ((_fs_meta_empty_addr + sizeof(_fs_meta_s)) > (_FS_META_END_ADDR + 1)) + { + return ERRNO_NOT_ENOUGH_MEMORY; + } + + /* Write new file to flash file table. */ + if (NVM_EXT_write (_fs_meta_empty_addr, (uint8_t *) &file_meta, sizeof(_fs_meta_s))) + { + return ERRNO_NVM_FAILURE; + } + + /* Update metadata address for next write. */ + _fs_meta_empty_addr += sizeof(_fs_meta_s); + + return ERRNO_SUCCESS; +} + +static ERRNO_e _fs_is_empty (uint32_t start_addr, uint16_t len) +{ + uint16_t i; + uint8_t buf[len]; + + /* Read entry length. */ + if (NVM_EXT_read (start_addr, buf, len)) + { + return ERRNO_NVM_FAILURE; + } + + /* Loop through the read data. */ + for (i = 0; i < len; i++) + { + /* Scan for empty space. */ + if (buf[i] != 0xFF) + { + return ERRNO_MEMORY_NOT_AVAILABLE; + } + } + + return ERRNO_SUCCESS; +} + +static uint32_t _fs_prev_entry_addr_get (uint32_t start_addr, _fs_file_ctx_s* file_ctx) +{ + uint16_t entry_len = file_ctx->meta.size + FS_FILE_INDEX_SIZE + FS_FILE_CHECKSUM_SIZE; + + /* Check for wraparound. */ + if ((int32_t) (start_addr - entry_len) < (int32_t) file_ctx->meta.start_addr) + { + /* Update address to entry before wraparound. */ + start_addr = file_ctx->meta.end_addr - entry_len - (FS_SECTOR_SIZE % entry_len) + 1; + } + else if (_fs_sector_boundary_addr_get (start_addr - entry_len) < + _fs_sector_boundary_addr_get (start_addr)) + { + /* Update address if we span sectors. */ + start_addr = _fs_sector_boundary_addr_get (start_addr - entry_len) - + entry_len - (FS_SECTOR_SIZE % entry_len); + } + else + { + /* Update next entry start address. */ + start_addr -= entry_len; + } + + return start_addr; +} + +static bool _fs_is_entry_valid (uint32_t start_addr, uint16_t len) +{ + uint8_t buf[len]; + uint16_t checksum_idx = len - FS_FILE_CHECKSUM_SIZE; + uint32_t calc_checksum; + + /* Read entry length. */ + if (NVM_EXT_read (start_addr, buf, len)) + { + return false; + } + + /* Verify if entry is valid by checking CRC checksum. */ + if (CRC_32_calculate (buf, checksum_idx, CRC_32_CHECKSUM_INIT, &calc_checksum)) + { + return false; + } + return (calc_checksum == *(uint32_t *) &buf[checksum_idx]); +} + +static _fs_file_ctx_s *_fs_file_get (char *filename) +{ + uint8_t i; + + /* Loop through existing files. */ + for (i = 0; i < _fs_file_cnt; i++) + { + /* Compare file names. */ + if (!strcmp (filename, _fs_files[i].meta.name)) + { + return &_fs_files[i]; + } + } + + /* Return NULL if file does not exist. */ + return NULL; +} + +static uint32_t _fs_sector_boundary_addr_get (uint32_t addr) +{ + uint16_t sectors = (uint16_t) (addr / FS_SECTOR_SIZE) + 1; + + return (sectors * FS_SECTOR_SIZE); +} + +static ERRNO_e _fs_meta_rewrite (void) +{ + ERRNO_e err; + + /* Erase the metadata sector. */ + err = NVM_EXT_erase_block (_FS_META_START_ADDR, NVM_EXT_BLOCK_SIZE_4KB); + if (err) + { + return err; + } + + /* Reset the empty metadata address. */ + _fs_meta_empty_addr = _FS_META_START_ADDR; + + /* Rewrite metadata for all remaining files. */ + for (uint8_t i = 0; i < _fs_file_cnt; i++) + { + err = _fs_file_meta_add (_fs_files[i].meta); + if (err) + { + return err; + } + } + + return ERRNO_SUCCESS; +} diff --git a/src/lib/fs.h b/src/lib/fs.h new file mode 100644 index 0000000..5e45a76 --- /dev/null +++ b/src/lib/fs.h @@ -0,0 +1,94 @@ +/** + * @file fs.h + * @brief File system using non-volatile external memory. + * @author Kenny Tran + * @date Mar 04 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef FS_H_ +#define FS_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "../lib/errno.h" + +#include "../bsp/nvm_ext.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define FS_SECTOR_SIZE (NVM_EXT_BLOCK_SIZE_4KB) +/** + * @brief Size of the index written after each file entry. + */ +#define FS_FILE_INDEX_SIZE (sizeof (uint32_t)) +/** + * @brief Size of checksum written after each file entry and index. + */ +#define FS_FILE_CHECKSUM_SIZE (sizeof (uint32_t)) +/** + * @brief Max amount of characters in the filename. + */ +#define FS_FILENAME_LEN (16) +/** + * @brief Max file entry size, accounting for the appended index and checksum. + */ +#define FS_MAX_FILE_ENTRY_SIZE (FS_SECTOR_SIZE - FS_FILE_INDEX_SIZE - FS_FILE_CHECKSUM_SIZE) +/** + * @brief Max amount of files to be created / stored. + */ +#define FS_MAX_FILES (16) +/** + * @brief Max amount of entries per file. + */ +#define FS_MAX_FILE_ENTRIES (0xFFFFFFFF) +/** + * @brief Default file depth + */ +#define FS_FILE_DEPTH_DEFAULT (16) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +/** + * @brief Used as the file handle. + */ +typedef void* FS_file_t; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e FS_init (void); + +ERRNO_e FS_open_or_create (char *p_filename, FS_file_t *p_file, uint16_t size, uint16_t depth); + +ERRNO_e FS_write (FS_file_t file, uint8_t *p_src); + +ERRNO_e FS_write_at_offset (FS_file_t file, uint8_t *p_src, uint16_t offset, uint16_t len); + +ERRNO_e FS_read (FS_file_t file, uint8_t *p_dest, uint16_t offset, uint16_t len); + +ERRNO_e FS_clear (FS_file_t file); + +ERRNO_e FS_delete (char *p_filename); + +uint32_t FS_memory_used (void); + +uint32_t FS_memory_available (void); + +void FS_cli_cmd (int32_t argc, char **argv); + + +#endif /* FS_H_ */ diff --git a/src/lib/gamma.c b/src/lib/gamma.c new file mode 100644 index 0000000..d32c152 --- /dev/null +++ b/src/lib/gamma.c @@ -0,0 +1,64 @@ +/** + * @file gamma.h + * @brief Gamma correction + * @author Kenny Tran + * @date Sep 19 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "gamma.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +uint32_t GAMMA_corrected_get (uint32_t step, uint32_t n_steps, uint32_t max_brightness, double cf) +{ + double normalized; + double corrected; + + if (step >= n_steps) + { + /* 0 based. Clamp to max step. */ + step = (n_steps - 1); + } + + normalized = (double) step / (n_steps - 1); + corrected = (double) pow (normalized, (double) cf); + + return (uint32_t) round (corrected * (double) max_brightness); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ diff --git a/src/lib/gamma.h b/src/lib/gamma.h new file mode 100644 index 0000000..195642f --- /dev/null +++ b/src/lib/gamma.h @@ -0,0 +1,39 @@ +/** + * @file gamma.h + * @brief Gamma correction + * @author Kenny Tran + * @date Sep 19 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef GAMMA_H_ +#define GAMMA_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +uint32_t GAMMA_corrected_get (uint32_t step, uint32_t n_steps, uint32_t max_brightness, double cf); + + +#endif /* GAMMA_H_ */ diff --git a/src/lib/print.c b/src/lib/print.c new file mode 100644 index 0000000..bacd7c1 --- /dev/null +++ b/src/lib/print.c @@ -0,0 +1,179 @@ +/** + * @file print.c + * @brief Printing / logging tool + * @author Kenny Tran + * @date Aug 29 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "print.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * THREAD DEFINITIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static PRINT_level_e _print_level = DEBUG; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +void PRINT_level_set (PRINT_level_e level) +{ + _print_level = level; +} + +int32_t PRINT (PRINT_level_e level, const char* format, ...) +{ + va_list vl; + int32_t ret = 0; + + if (_print_level == DISABLED) + { + return 0; + } + + va_start (vl, format); + + /* If debugging, print everything. */ + if (_print_level == DEBUG) + { + ret = vprintf (format, vl); + } + else if (_print_level == level) + { + ret = vprintf (format, vl); + } + + /* CRITICAL, system needs to be halted. */ + if (level == CRITICAL) + { + // __ASSERT (false, "Critial error\r\n"); + } + + va_end (vl); + + return ret; +} + +void PRINT_cli_cmd (int32_t argc, char **argv) +{ + if (argc == 0) + { + printk ("PRINT\r\n"); + printk ("-------------------------------------------\r\n"); + printk ("Severity Level : "); + switch (_print_level) + { + case DISABLED: + printk ("disabled\r\n"); + break; + case DEBUG: + printk ("debug\r\n"); + break; + case INFO: + printk ("info\r\n"); + break; + case WARNING: + printk ("warning\r\n"); + break; + case ERROR: + printk ("error\r\n"); + break; + case CRITICAL: + printk ("critical\r\n"); + break; + } + } + else if (argc == 2) + { + if (!strcmp (argv[0], "-l") || !strcmp (argv[0], "--level")) + { + if (!strcmp (argv[1], "disabled")) + { + PRINT_level_set (DISABLED); + } + else if (!strcmp (argv[1], "debug")) + { + PRINT_level_set (DEBUG); + } + else if (!strcmp (argv[1], "info")) + { + PRINT_level_set (INFO); + } + else if (!strcmp (argv[1], "warning")) + { + PRINT_level_set (WARNING); + } + else if (!strcmp (argv[1], "error")) + { + PRINT_level_set (ERROR); + } + else if (!strcmp (argv[1], "critical")) + { + PRINT_level_set (CRITICAL); + } + else + { + goto USAGE; + } + } + else + { + goto USAGE; + } + } + else + { +USAGE: + printk ("Usage: print [OPTION...]\r\n"); + printk (" -l | --level Sets the severity level to print\r\n"); + printk (" <%%s> debug\r\n"); + printk (" info\r\n"); + printk (" warning\r\n"); + printk (" error\r\n"); + printk (" critical\r\n"); + } +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ diff --git a/src/lib/print.h b/src/lib/print.h new file mode 100644 index 0000000..3503075 --- /dev/null +++ b/src/lib/print.h @@ -0,0 +1,53 @@ +/** + * @file print.h + * @brief Printing / logging tool + * @author Kenny Tran + * @date Aug 29 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef PRINT_H_ +#define PRINT_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum PRINT_level_e +{ + DISABLED = 0, + DEBUG, + INFO, + WARNING, + ERROR, + CRITICAL +} PRINT_level_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +void PRINT_level_set (PRINT_level_e level); + +int32_t PRINT (PRINT_level_e level, const char* format, ...); + +void PRINT_cli_cmd (int32_t argc, char **argv); + + +#endif /* PRINT_H_ */ diff --git a/src/lib/rgb.c b/src/lib/rgb.c new file mode 100644 index 0000000..7bcad7d --- /dev/null +++ b/src/lib/rgb.c @@ -0,0 +1,93 @@ +/** + * @file rgb.c + * @brief RGB color definitions + * @author Kenny Tran + * @date Mar 01 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "gamma.h" + +#include "rgb.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static const RGB_s _rgb_color_arr[RGB_COLOR_COUNT] = +{ + (RGB_s) { 255, 0, 0 }, /* RGB_COLOR_RED */ + (RGB_s) { 0, 255, 0 }, /* RGB_COLOR_GREEN */ + (RGB_s) { 0, 0, 255 }, /* RGB_COLOR_BLUE */ + (RGB_s) { 255, 127, 0 }, /* RGB_COLOR_ORANGE */ + (RGB_s) { 255, 255, 0 }, /* RGB_COLOR_YELLOW */ + (RGB_s) { 128, 0, 128 }, /* RGB_COLOR_PURPLE */ + (RGB_s) { 254, 1, 154 }, /* RGB_COLOR_PINK */ + (RGB_s) { 255, 255, 255 } /* RGB_COLOR_WHITE */ +}; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +RGB_s RGB_color_get (RGB_color_e color) +{ + if (color >= RGB_COLOR_COUNT) + { + return (RGB_s) { 0, 0, 0 }; + } + + return _rgb_color_arr[(uint32_t) color]; +} + +RGB_s RGB_gamma_corrected (RGB_color_e color, uint8_t step, uint8_t n_steps, uint8_t max_brightness, double cf) +{ + RGB_s ret; + double scaled; + + if (color >= RGB_COLOR_COUNT) + { + return (RGB_s) { 0, 0, 0 }; + } + + /* Calculate scaled max brightness. */ + scaled = ((double) _rgb_color_arr[(uint32_t) color].r / (double) RGB_BRIGHTNESS_MAX) * (double) max_brightness; + ret.r = (uint8_t) GAMMA_corrected_get ((uint32_t) step, (uint32_t) n_steps, (uint32_t) scaled, cf); + + scaled = ((double) _rgb_color_arr[(uint32_t) color].g / (double) RGB_BRIGHTNESS_MAX) * (double) max_brightness; + ret.g = (uint8_t) GAMMA_corrected_get ((uint32_t) step, (uint32_t) n_steps, (uint32_t) scaled, cf); + + scaled = ((double) _rgb_color_arr[(uint32_t) color].b / (double) RGB_BRIGHTNESS_MAX) * (double) max_brightness; + ret.b = (uint8_t) GAMMA_corrected_get ((uint32_t) step, (uint32_t) n_steps, (uint32_t) scaled, cf); + + return ret; +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ diff --git a/src/lib/rgb.h b/src/lib/rgb.h new file mode 100644 index 0000000..c555d25 --- /dev/null +++ b/src/lib/rgb.h @@ -0,0 +1,63 @@ +/** + * @file rgb.h + * @brief RGB color definitions + * @author Kenny Tran + * @date Mar 01 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef RGB_H_ +#define RGB_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define RGB_BRIGHTNESS_MAX ((uint8_t) 255) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct RGB +{ + uint8_t r; + uint8_t g; + uint8_t b; +} RGB_s; + +typedef enum RGB_color +{ + RGB_COLOR_RED = 0, + RGB_COLOR_GREEN, + RGB_COLOR_BLUE, + RGB_COLOR_ORANGE, + RGB_COLOR_YELLOW, + RGB_COLOR_PURPLE, + RGB_COLOR_PINK, + RGB_COLOR_WHITE, + + RGB_COLOR_COUNT, + RGB_COLOR_INVALID = RGB_COLOR_COUNT, +} RGB_color_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +RGB_s RGB_color_get (RGB_color_e color); + +RGB_s RGB_gamma_corrected (RGB_color_e color, uint8_t step, uint8_t n_steps, uint8_t max_brightness, double cf); + + +#endif /* RGB_H_ */ diff --git a/src/lib/virtual_led_ring.c b/src/lib/virtual_led_ring.c new file mode 100644 index 0000000..3d7f048 --- /dev/null +++ b/src/lib/virtual_led_ring.c @@ -0,0 +1,284 @@ +/** + * @file virtual_led_ring.c + * @brief Virtual LED ring module to simulate visual effect of having more LEDs. + * @author Kenny Tran + * @date Nov 13 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include +#include +#include + +#include "../lib/errno.h" + +#include "../bsp/led_ring.h" + +#include "virtual_led_ring.h" + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE TYPE DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct _virtual_led +{ + uint16_t r; + uint16_t g; + uint16_t b; +} _virtual_led_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE VARIABLES + *------------------------------------------------------------------------------------------------*/ +static bool _virtual_led_ring_init = false; +static _virtual_led_s _virtual_led_ring_buf[LED_RING_PIXELS]; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void _virtural_led_ring_acc_clear (void); +static void _virtual_led_ring_acc_add (uint16_t idx, uint16_t r, uint16_t g, uint16_t b); +static ERRNO_e _virtual_led_ring_acc_commit (void); +static float _virtual_led_ring_distance_calc(float pos1, float pos2); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e VIRTUAL_LED_RING_init (void) +{ + ERRNO_e err; + + if (_virtual_led_ring_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + _virtural_led_ring_acc_clear (); + + err = LED_RING_init (); + if (err != ERRNO_SUCCESS) + { + return err; + } + + _virtual_led_ring_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e VIRTUAL_LED_RING_set (uint16_t idx, uint8_t r, uint8_t g, uint8_t b, VIRTUAL_LED_RING_mode_e mode) +{ + float position; + + if (!_virtual_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + else if (idx >= VIRTUAL_LED_RING_PIXELS) + { + return ERRNO_OUT_OF_RANGE; + } + + position = (float) idx / (float) VIRTUAL_LED_RING_MULTIPLIER; + + return VIRTUAL_LED_RING_set_position (position, r, g, b, mode); +} + +ERRNO_e VIRTUAL_LED_RING_set_position (float position, uint8_t r, uint8_t g, uint8_t b, VIRTUAL_LED_RING_mode_e mode) +{ + if (!_virtual_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + else if (position < 0.0f || position >= (float) LED_RING_PIXELS) + { + return ERRNO_OUT_OF_RANGE; + } + + // _virtural_led_ring_acc_clear (); + + switch (mode) + { + case VIRTUAL_LED_RING_MODE_LINEAR: + { + /* Linear interpolation between two adjacent LEDs. */ + uint16_t led_low = (uint16_t) position; + uint16_t led_high = (led_low + 1) % LED_RING_PIXELS; + float fraction = position - (float) led_low; + + uint16_t brightness_low_r = (uint16_t) (r * (1.0f - fraction)); + uint16_t brightness_low_g = (uint16_t) (g * (1.0f - fraction)); + uint16_t brightness_low_b = (uint16_t) (b * (1.0f - fraction)); + + uint16_t brightness_high_r = (uint16_t) (r * fraction); + uint16_t brightness_high_g = (uint16_t) (g * fraction); + uint16_t brightness_high_b = (uint16_t) (b * fraction); + + _virtual_led_ring_acc_add (led_low, brightness_low_r, brightness_low_g, brightness_low_b); + _virtual_led_ring_acc_add (led_high, brightness_high_r, brightness_high_g, brightness_high_b); + break; + } + + case VIRTUAL_LED_RING_MODE_GAUSSIAN: + { + uint16_t i; + + /* Gaussian blur across multiple LEDs. */ + for (i = 0; i < LED_RING_PIXELS; i++) + { + float distance = _virtual_led_ring_distance_calc (position, (float) i); + + /* Gaussian falloff: exp(-(distance^2) / (2 * width^2)) */ + float intensity = expf (-(distance * distance) / (2.0f * VIRTUAL_LED_RING_GAUSSIAN_WIDTH * VIRTUAL_LED_RING_GAUSSIAN_WIDTH)); + + /* Only add if intensity is significant (optimization). */ + if (intensity > 0.01f) + { + _virtual_led_ring_acc_add (i, (uint16_t) (r * intensity), + (uint16_t) (g * intensity), + (uint16_t) (b * intensity)); + } + } + break; + } + + case VIRTUAL_LED_RING_MODE_COMET: + { + /* Trailing comet effect. */ + uint16_t i; + uint16_t head = (uint16_t) position; + float decay = 1.0f; + + for (i = 0; i < VIRTUAL_LED_RING_COMET_TAIL_LENGTH; i++) + { + uint16_t led_idx = (head - i + LED_RING_PIXELS) % LED_RING_PIXELS; + + _virtual_led_ring_acc_add (led_idx, (uint16_t) (r * decay), + (uint16_t) (g * decay), + (uint16_t) (b * decay)); + + decay *= VIRTUAL_LED_RING_COMET_DECAY; + } + break; + } + + default: + return ERRNO_INVALID_PARAM; + } + + return _virtual_led_ring_acc_commit (); +} + +ERRNO_e VIRTUAL_LED_RING_clear (void) +{ + if (!_virtual_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + + _virtural_led_ring_acc_clear (); + + return LED_RING_clear (); +} + +ERRNO_e VIRTUAL_LED_RING_update (void) +{ + if (!_virtual_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + + return LED_RING_update (); +} + +ERRNO_e VIRTUAL_LED_RING_enable (bool en) +{ + if (!_virtual_led_ring_init) + { + return ERRNO_NOT_INITIALIZED; + } + + return LED_RING_enable (en); +} + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTIONS + *------------------------------------------------------------------------------------------------*/ +static void _virtural_led_ring_acc_clear (void) +{ + memset (_virtual_led_ring_buf, 0, sizeof (_virtual_led_ring_buf)); +} + +static void _virtual_led_ring_acc_add (uint16_t idx, uint16_t r, uint16_t g, uint16_t b) +{ + if (idx >= LED_RING_PIXELS) + { + return; + } + + _virtual_led_ring_buf[idx].r += r; + _virtual_led_ring_buf[idx].g += g; + _virtual_led_ring_buf[idx].b += b; + + /* Clamp to max brightness. */ + if (_virtual_led_ring_buf[idx].r > LED_RING_MAX_BRIGHTNESS) + { + _virtual_led_ring_buf[idx].r = LED_RING_MAX_BRIGHTNESS; + } + if (_virtual_led_ring_buf[idx].g > LED_RING_MAX_BRIGHTNESS) + { + _virtual_led_ring_buf[idx].g = LED_RING_MAX_BRIGHTNESS; + } + if (_virtual_led_ring_buf[idx].b > LED_RING_MAX_BRIGHTNESS) + { + _virtual_led_ring_buf[idx].b = LED_RING_MAX_BRIGHTNESS; + } +} + +static ERRNO_e _virtual_led_ring_acc_commit (void) +{ + ERRNO_e err; + uint16_t i; + + for (i = 0; i < LED_RING_PIXELS; i++) + { + err = LED_RING_set (i, (uint8_t) _virtual_led_ring_buf[i].r, + (uint8_t) _virtual_led_ring_buf[i].g, + (uint8_t) _virtual_led_ring_buf[i].b); + if (err != ERRNO_SUCCESS) + { + return err; + } + } + + return ERRNO_SUCCESS; +} + +static float _virtual_led_ring_distance_calc(float pos1, float pos2) +{ + float dist = fabsf(pos1 - pos2); + + /* Account for wraparound. */ + if (dist > (LED_RING_PIXELS / 2.0f)) + { + dist = LED_RING_PIXELS - dist; + } + + return dist; +} diff --git a/src/lib/virtual_led_ring.h b/src/lib/virtual_led_ring.h new file mode 100644 index 0000000..777e6ae --- /dev/null +++ b/src/lib/virtual_led_ring.h @@ -0,0 +1,97 @@ +/** + * @file virtual_led_ring.h + * @brief Virtual LED ring module to simulate visual effect of having more LEDs. + * @author Kenny Tran + * @date Nov 13 2025 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef VIRTUAL_LED_RING_H_ +#define VIRTUAL_LED_RING_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "../lib/errno.h" + +#include "../bsp/led_ring.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +/* Virtual resolution multiplier (e.g., 4x means 96 virtual positions for 24 physical LEDs). */ +#define VIRTUAL_LED_RING_MULTIPLIER (4) +#define VIRTUAL_LED_RING_PIXELS (LED_RING_PIXELS * VIRTUAL_LED_RING_MULTIPLIER) + +#define VIRTUAL_LED_RING_GAUSSIAN_WIDTH (1.2f) /* Adjust for wider/narrower blur. */ +#define VIRTUAL_LED_RING_COMET_TAIL_LENGTH (4) /* Number of trailing LEDs. */ +#define VIRTUAL_LED_RING_COMET_DECAY (0.5f) /* Brightness decay per LED. */ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum +{ + VIRTUAL_LED_RING_MODE_LINEAR, /* Linear interpolation (2 LEDs) */ + VIRTUAL_LED_RING_MODE_GAUSSIAN, /* Gaussian blur (3-5 LEDs) */ + VIRTUAL_LED_RING_MODE_COMET /* Trailing comet effect */ +} VIRTUAL_LED_RING_mode_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + +/** + * @brief Initialize the smooth LED ring (calls LED_RING_init internally) + * @return ERRNO_e status code + */ +ERRNO_e VIRTUAL_LED_RING_init (void); + +/** + * @brief Set a virtual LED position with smooth interpolation + * @param idx Virtual index (0 to VIRTUAL_LED_RING_PIXELS - 1) + * @param r Red brightness (0-255) + * @param g Green brightness (0-255) + * @param b Blue brightness (0-255) + * @param mode Smoothing mode to use + * @return ERRNO_e status code + */ +ERRNO_e VIRTUAL_LED_RING_set (uint16_t idx, uint8_t r, uint8_t g, uint8_t b, VIRTUAL_LED_RING_mode_e mode); + +/** + * @brief Set a floating point position (more direct control) + * @param position Floating point position (0.0 to LED_RING_PIXELS - 0.001) + * @param r Red brightness (0-255) + * @param g Green brightness (0-255) + * @param b Blue brightness (0-255) + * @param mode Smoothing mode to use + * @return ERRNO_e status code + */ +ERRNO_e VIRTUAL_LED_RING_set_position (float position, uint8_t r, uint8_t g, uint8_t b, VIRTUAL_LED_RING_mode_e mode); + +/** + * @brief Clear all LEDs (wrapper for LED_RING_clear) + * @return ERRNO_e status code + */ +ERRNO_e VIRTUAL_LED_RING_clear (void); + +/** + * @brief Update the LED ring display (wrapper for LED_RING_update) + * @return ERRNO_e status code + */ +ERRNO_e VIRTUAL_LED_RING_update (void); + +ERRNO_e VIRTUAL_LED_RING_enable (bool en); + + +#endif /* VIRTUAL_LED_RING_H_ */ diff --git a/src/main.c b/src/main.c new file mode 100644 index 0000000..c41f247 --- /dev/null +++ b/src/main.c @@ -0,0 +1,29 @@ +/** + * @file main.c + * @brief Main module + * @author Kenny Tran + * @date Jul 05 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include "app/app.h" + + +/*-------------------------------------------------------------------------------------------------- + * MAIN FUNCTION + *------------------------------------------------------------------------------------------------*/ +int main (void) +{ + APP_init (); + + APP_start (); + + return 0; +} diff --git a/src/wrappers/adc.c b/src/wrappers/adc.c new file mode 100644 index 0000000..12d2f58 --- /dev/null +++ b/src/wrappers/adc.c @@ -0,0 +1,185 @@ +/** + * @file adc.h + * @brief ADC module + * @author Kenny Tran + * @date Dec 3 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include +#include +#include + +#include "../lib/errno.h" + +#include "adc.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct adc_dt_spec _adc_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static _adc_s _adc_ch_arr[] = +{ + { + .dev = DEVICE_DT_GET(DT_NODELABEL(adc)), + .channel_id = (uint8_t) 0, + .channel_cfg_dt_node_exists = (bool) true, + .channel_cfg = (struct adc_channel_cfg) { + .gain = (enum adc_gain) ADC_GAIN_DIV3, + .reference = (enum adc_reference) ADC_REF_INT, + .acquisition_time = (uint16_t) 0, + .channel_id = (uint8_t) ADC_CH_0, + .input_positive = (uint8_t) 1, + .input_negative = (uint8_t) 0 + }, + .vref_mv = (uint16_t) 0, + .resolution = (uint8_t) ADC_RESOLUTION_12_BITS, + .oversampling = (uint8_t) 0 + }, +}; + +// #define DT_SPEC_AND_COMMA(node_id, prop, idx) \ +// ADC_DT_SPEC_GET_BY_IDX(node_id, idx), + +// /* Data of ADC io-channels specified in devicetree. */ +// static const struct adc_dt_spec _adc_ch_arr[] = { +// DT_FOREACH_PROP_ELEM(DT_PATH(zephyr_user), io_channels, +// DT_SPEC_AND_COMMA) +// }; + +static bool _adc_init = false; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e ADC_init (void) +{ + ADC_ch_e ch; + + if (_adc_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + /* Only using channel 0. */ + for (ch = 0; ch < ADC_CH_1; ch++) + { + if (!adc_is_ready_dt (&_adc_ch_arr[ch])) + { + return ERRNO_NOT_READY; + } + } + + _adc_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e ADC_cfg (ADC_ch_e ch, ADC_gain_e gain, ADC_ref_e ref, ADC_resolution_e res) +{ + if (!_adc_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if ((ch >= ADC_CH_COUNT) || (gain > ADC_GAIN_X128) || (ref > ADC_REF_EXT_1) || + ((res != ADC_RESOLUTION_12_BITS) && (res != ADC_RESOLUTION_14_BITS))) + { + return ERRNO_INVALID_PARAM; + } + + _adc_ch_arr[ch].channel_cfg.gain = gain; + _adc_ch_arr[ch].channel_cfg.reference = ref; + + if (res == ADC_RESOLUTION_12_BITS) + { + _adc_ch_arr[ch].resolution = ADC_RESOLUTION_12_BITS; + _adc_ch_arr[ch].oversampling = 0; + } + else + { + _adc_ch_arr[ch].resolution = ADC_RESOLUTION_14_BITS; + _adc_ch_arr[ch].oversampling = 8; + } + + if (adc_channel_setup_dt (&_adc_ch_arr[ch]) < 0) + { + return ERRNO_ADC_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e ADC_read (ADC_ch_e ch, int32_t *p_dest) +{ + uint16_t buf; + struct adc_sequence sequence = + { + .buffer = &buf, + /* Buffer size in bytes, not number of samples. */ + .buffer_size = sizeof(buf), + }; + + if (!_adc_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (ch >= ADC_CH_COUNT) + { + return ERRNO_INVALID_PARAM; + } + + (void) adc_sequence_init_dt (&_adc_ch_arr[ch], &sequence); + + if (adc_read_dt (&_adc_ch_arr[ch], &sequence) < 0) + { + *p_dest = 0; + + return ERRNO_ADC_FAILURE; + } + + /* If using differential mode, the 16 bit value in the ADC sample buffer should be a signed 2's complement value. */ + if (_adc_ch_arr[ch].channel_cfg.differential) + { + *p_dest = (int32_t) ((int16_t) buf); + } + else + { + *p_dest = (int32_t) buf; + } + + return ERRNO_SUCCESS; +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ diff --git a/src/wrappers/adc.h b/src/wrappers/adc.h new file mode 100644 index 0000000..e68c7cc --- /dev/null +++ b/src/wrappers/adc.h @@ -0,0 +1,104 @@ +/** + * @file adc.h + * @brief ADC module + * @author Kenny Tran + * @date Dec 3 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef ADC_H_ +#define ADC_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum +{ + ADC_CH_0 = 0, /* P0.02 */ + ADC_CH_1, /* P0.03 */ + ADC_CH_2, /* P0.04 */ + ADC_CH_3, /* P0.05 */ + ADC_CH_4, /* P0.28 */ + ADC_CH_5, /* P0.29 */ + ADC_CH_6, /* P0.30 */ + ADC_CH_7, /* P0.31 */ + + ADC_CH_COUNT +} ADC_ch_e; + +typedef enum +{ + ADC_GAIN_DIV6 = ADC_GAIN_1_6, + ADC_GAIN_DIV5 = ADC_GAIN_1_5, + ADC_GAIN_DIV4 = ADC_GAIN_1_4, + ADC_GAIN_DIV3 = ADC_GAIN_1_3, + ADC_GAIN_X2_DIV5 = ADC_GAIN_2_5, + ADC_GAIN_DIV2 = ADC_GAIN_1_2, + ADC_GAIN_X2_DIV3 = ADC_GAIN_2_3, + ADC_GAIN_X4_DIV5 = ADC_GAIN_4_5, + ADC_GAIN_X1 = ADC_GAIN_1, + ADC_GAIN_X2 = ADC_GAIN_2, + ADC_GAIN_X3 = ADC_GAIN_3, + ADC_GAIN_X4 = ADC_GAIN_4, + ADC_GAIN_X6 = ADC_GAIN_6, + ADC_GAIN_X8 = ADC_GAIN_8, + ADC_GAIN_X12 = ADC_GAIN_12, + ADC_GAIN_X16 = ADC_GAIN_16, + ADC_GAIN_X24 = ADC_GAIN_24, + ADC_GAIN_X32 = ADC_GAIN_32, + ADC_GAIN_X64 = ADC_GAIN_64, + ADC_GAIN_X128 = ADC_GAIN_128 +} ADC_gain_e; + +typedef enum +{ + ADC_REF_VDD = ADC_REF_VDD_1, + ADC_REF_VDD_DIV2 = ADC_REF_VDD_1_2, + ADC_REF_VDD_DIV3 = ADC_REF_VDD_1_3, + ADC_REF_VDD_DIV4 = ADC_REF_VDD_1_4, + ADC_REF_INT = ADC_REF_INTERNAL, + ADC_REF_EXT_0 = ADC_REF_EXTERNAL0, + ADC_REF_EXT_1 = ADC_REF_EXTERNAL1 +} ADC_ref_e; + +typedef enum +{ + ADC_RESOLUTION_12_BITS = 12, + ADC_RESOLUTION_14_BITS = 14 +} ADC_resolution_e; + + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e ADC_init (void); + +ERRNO_e ADC_cfg (ADC_ch_e ch, ADC_gain_e gain, ADC_ref_e ref, ADC_resolution_e res); + +ERRNO_e ADC_read (ADC_ch_e ch, int32_t *p_dest); + + +#endif /* ADC_H_ */ + diff --git a/src/wrappers/gpio - Copy.c b/src/wrappers/gpio - Copy.c new file mode 100644 index 0000000..cb8136a --- /dev/null +++ b/src/wrappers/gpio - Copy.c @@ -0,0 +1,437 @@ +/** + * @file gpio.c + * @brief GPIO module + * @author Kenny Tran + * @date Mar 01 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include +#include + +#include "../lib/errno.h" + +#include "gpio.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct _gpio +{ + struct gpio_dt_spec spec; + struct gpio_callback cb; + bool cb_registered; + bool cfg_output; + bool high; /* NOTE: gpio_pin_get_dt() can't read status if configured + for output. Temporarily using flag to store state. */ +} _gpio_s; + + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void left_button_isr (void); +static void center_button_isr (void); +static void right_button_isr (void); +static void pwr_5v_isr (void); +static void led_ring_pwr_isr (void); +static void led_ring_level_shift_enable_isr (void); +static void led_ring_din_isr (void); +static void battery_check_enable_isr (void); +static void imu_int_isr (void); +static void charger_status_isr (void); + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static _gpio_s _gpio_arr[GPIO_PIN_COUNT] = { + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(left_button), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) left_button_isr, + .cb_registered = false, + .cfg_output = false, + .high = false + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(center_button), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) center_button_isr, + .cb_registered = false, + .cfg_output = false, + .high = false + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(right_button), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) right_button_isr, + .cb_registered = false, + .cfg_output = false, + .high = false + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(pwr_5v_enable), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) pwr_5v_isr, + .cb_registered = false, + .cfg_output = false, + .high = false + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(led_ring_pwr), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) led_ring_pwr_isr, + .cb_registered = false, + .cfg_output = false, + .high = false + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(led_ring_level_shift_enable), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) led_ring_level_shift_enable_isr, + .cb_registered = false, + .cfg_output = false, + .high = false + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(led_ring_din), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) led_ring_din_isr, + .cb_registered = false, + .cfg_output = false, + .high = false + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(battery_check_enable), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) battery_check_enable_isr, + .cb_registered = false, + .cfg_output = false, + .high = false + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(imu_int), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) imu_int_isr, + .cb_registered = false, + .cfg_output = false, + .high = false + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(charger_status), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) charger_status_isr, + .cb_registered = false, + .cfg_output = false, + .high = false + }, +}; +static bool _gpio_init = false; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e GPIO_init (void) +{ + uint32_t i; + + if (_gpio_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + for (i = 0; i < GPIO_PIN_COUNT; i++) + { + if (!gpio_is_ready_dt (&_gpio_arr[i].spec)) + { + return ERRNO_NOT_READY; + } + } + + _gpio_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e GPIO_cfg (GPIO_pin_e pin, GPIO_direction_e dir, GPIO_pull_e pull, GPIO_init_e init, GPIO_int_edge_e edge, GPIO_cb_t cb) +{ + uint32_t flags = 0; + + if (!_gpio_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (pin >= GPIO_PIN_COUNT) + { + return ERRNO_INVALID_PARAM; + } + + if (pull == GPIO_PULL_DOWN) + { + flags = GPIO_PULL_DOWN; + } + else if (pull == GPIO_PULL_UP) + { + flags = GPIO_PULL_UP; + } + + /* Disable interrupts. */ + gpio_pin_interrupt_configure_dt (&_gpio_arr[pin].spec, GPIO_INT_DISABLE); + + /* Clear any pending interrupts. */ + NVIC_ClearPendingIRQ (GPIOTE_IRQn); + + switch (dir) + { + case GPIO_DIRECTION_IN: + flags |= GPIO_INPUT; + + if (gpio_pin_configure_dt (&_gpio_arr[pin].spec, flags)) + { + return ERRNO_GPIO_FAILURE; + } + + switch (edge) + { + case GPIO_INT_RISING_EDGE: + /* GPIO interrupt to be triggered on pin rising edge. */ + flags = GPIO_INT_EDGE_RISING; + break; + case GPIO_INT_FALLING_EDGE: + /* GPIO interrupt to be triggered on pin falling edge. */ + flags = GPIO_INT_EDGE_FALLING; + break; + case GPIO_INT_BOTH_EDGES: + /* GPIO interrupt to be triggered on pin rising or falling edge. */ + flags = GPIO_INT_EDGE_BOTH; + break; + case GPIO_INT_PL_LOW: + /* GPIO interrupt to be triggered on pin physical level low. */ + flags = GPIO_INT_LEVEL_LOW; + break; + case GPIO_INT_PL_HIGH: + /* GPIO interrupt to be triggered on pin physical level high. */ + flags = GPIO_INT_LEVEL_HIGH; + break; + case GPIO_INT_STATE_CHANGE_LL_LOW: + /* GPIO interrupt to be triggered on pin state change to logical level 0. */ + flags = GPIO_INT_EDGE_TO_INACTIVE; + break; + case GPIO_INT_STATE_CHANGE_LL_HIGH: + /* GPIO interrupt to be triggered on pin state change to logical level 1. */ + flags = GPIO_INT_EDGE_TO_ACTIVE; + break; + case GPIO_INT_LL_LOW: + /* GPIO interrupt to be triggered on pin logical level 0. */ + flags = GPIO_INT_LEVEL_INACTIVE; + break; + case GPIO_INT_LL_HIGH: + /* GPIO interrupt to be triggered on pin logical level 1. */ + flags = GPIO_INT_LEVEL_ACTIVE; + break; + } + + if (gpio_pin_interrupt_configure_dt (&_gpio_arr[pin].spec, flags)) + { + return ERRNO_GPIO_FAILURE; + } + + if (_gpio_arr[pin].cb_registered) + { + /* Before adding the new callback, remove any existing. */ + gpio_remove_callback (_gpio_arr[pin].spec.port, &_gpio_arr[pin].cb); + } + + if (cb == NULL) + { + gpio_init_callback (&_gpio_arr[pin].cb, (gpio_callback_handler_t) _gpio_arr[pin].cb.handler, BIT(_gpio_arr[pin].spec.pin)); + } + else + { + gpio_init_callback (&_gpio_arr[pin].cb, (gpio_callback_handler_t) cb, BIT(_gpio_arr[pin].spec.pin)); + } + + if (gpio_add_callback (_gpio_arr[pin].spec.port, &_gpio_arr[pin].cb)) + { + return ERRNO_GPIO_FAILURE; + } + + _gpio_arr[pin].cb_registered = true; + _gpio_arr[pin].cfg_output = false; + + break; + + case GPIO_DIRECTION_OUT: + if (init == GPIO_INIT_LOW) + { + flags |= GPIO_OUTPUT_INACTIVE; + _gpio_arr[pin].high = false; + } + else + { + flags |= GPIO_OUTPUT_ACTIVE; + _gpio_arr[pin].high = true; + } + + if (gpio_pin_configure_dt (&_gpio_arr[pin].spec, flags)) + { + return ERRNO_GPIO_FAILURE; + } + + _gpio_arr[pin].cfg_output = true; + + break; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e GPIO_level_set (GPIO_pin_e pin, bool high) +{ + if (_gpio_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (pin >= GPIO_PIN_COUNT) + { + return ERRNO_INVALID_PARAM; + } + + /* Check that pin is not configured for input. */ + if (!_gpio_arr[pin].cfg_output) + { + return ERRNO_GPIO_FAILURE; + } + + if (gpio_pin_set_dt (&_gpio_arr[pin].spec, high)) + { + return ERRNO_GPIO_FAILURE; + } + + _gpio_arr[pin].high = high; + + return ERRNO_SUCCESS; +} + +bool GPIO_level_get (GPIO_pin_e pin) +{ + if (pin >= GPIO_PIN_COUNT) + { + /* TODO: Add asserts. */ + while (1) + ; + } + + /* FIXME: When configured as output, can't read back GPIO state. Using flag to store and readback. */ + if (_gpio_arr[pin].cfg_output) + { + return _gpio_arr[pin].high; + } + + return (bool) gpio_pin_get_dt (&_gpio_arr[pin].spec); +} + +ERRNO_e GPIO_interrupt_disable (GPIO_pin_e pin) +{ + if (_gpio_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (pin >= GPIO_PIN_COUNT) + { + return ERRNO_INVALID_PARAM; + } + + /* Disable interrupts. */ + if (gpio_pin_interrupt_configure_dt (&_gpio_arr[pin].spec, GPIO_INT_DISABLE)) + { + return ERRNO_GPIO_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e GPIO_pending_interrupts_clear (void) +{ + if (_gpio_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + /* Clear any pending interrupts. */ + NVIC_ClearPendingIRQ (GPIOTE_IRQn); + + return ERRNO_SUCCESS; +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void left_button_isr (void) +{ + /* Cannot have a NULL callback. Used for empty callback. */ + +} + +static void center_button_isr (void) +{ + /* Cannot have a NULL callback. Used for empty callback. */ + +} + +static void right_button_isr (void) +{ + /* Cannot have a NULL callback. Used for empty callback. */ + +} + +static void pwr_5v_isr (void) +{ + /* Cannot have a NULL callback. Used for empty callback. */ + +} + +static void led_ring_pwr_isr (void) +{ + /* Cannot have a NULL callback. Used for empty callback. */ + +} + +static void led_ring_level_shift_enable_isr (void) +{ + /* Cannot have a NULL callback. Used for empty callback. */ + +} + +static void led_ring_din_isr (void) +{ + /* Cannot have a NULL callback. Used for empty callback. */ +} + +static void battery_check_enable_isr (void) +{ + /* Cannot have a NULL callback. Used for empty callback. */ +} + +static void imu_int_isr (void) +{ + /* Cannot have a NULL callback. Used for empty callback. */ +} + +static void charger_status_isr (void) +{ + /* Cannot have a NULL callback. Used for empty callback. */ +} diff --git a/src/wrappers/gpio - Copy.h b/src/wrappers/gpio - Copy.h new file mode 100644 index 0000000..4318fa1 --- /dev/null +++ b/src/wrappers/gpio - Copy.h @@ -0,0 +1,100 @@ +/** + * @file gpio.h + * @brief GPIO module + * @author Kenny Tran + * @date Mar 01 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef GPIO_H_ +#define GPIO_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum GPIO_direction +{ + GPIO_DIRECTION_IN = 0, + GPIO_DIRECTION_OUT +} GPIO_direction_e; + +typedef enum GPIO_pull +{ + GPIO_PULLNONE = 0, + GPIO_PULLDOWN, + GPIO_PULLUP +} GPIO_pull_e; + +typedef enum GPIO_init +{ + GPIO_INIT_LOW = 0, + GPIO_INIT_HIGH, +} GPIO_init_e; + +typedef enum GPIO_int_edge +{ + GPIO_INT_RISING_EDGE = 0, /* GPIO interrupt to be triggered on pin rising edge. */ + GPIO_INT_FALLING_EDGE, /* GPIO interrupt to be triggered on pin falling edge. */ + GPIO_INT_BOTH_EDGES, /* GPIO interrupt to be triggered on pin rising or falling edge. */ + GPIO_INT_PL_LOW, /* GPIO interrupt to be triggered on pin physical level low. */ + GPIO_INT_PL_HIGH, /* GPIO interrupt to be triggered on pin physical level high. */ + GPIO_INT_STATE_CHANGE_LL_LOW, /* GPIO interrupt to be triggered on pin state change to logical level 0. */ + GPIO_INT_STATE_CHANGE_LL_HIGH, /* GPIO interrupt to be triggered on pin state change to logical level 1. */ + GPIO_INT_LL_LOW, /* GPIO interrupt to be triggered on pin logical level 0. */ + GPIO_INT_LL_HIGH /* GPIO interrupt to be triggered on pin logical level 1. */ +} GPIO_int_edge_e; + +typedef enum GPIO_pin +{ + GPIO_PIN_BUTTON_LEFT = 0, + GPIO_PIN_BUTTON_CENTER, + GPIO_PIN_BUTTON_RIGHT, + GPIO_PIN_5V_ENABLE, + GPIO_PIN_LED_RING_PWR, + GPIO_PIN_LED_RING_LEVEL_SHIFT_ENABLE, + GPIO_PIN_LED_RING_DIN, + GPIO_PIN_BATTERY_CHECK_ENABLE, + GPIO_PIN_IMU_INT, + GPIO_PIN_CHARGER_STATUS, + + GPIO_PIN_COUNT +} GPIO_pin_e; + +typedef void (*GPIO_cb_t) (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e GPIO_init (void); + +ERRNO_e GPIO_cfg (GPIO_pin_e pin, GPIO_direction_e dir, GPIO_pull_e pull, GPIO_init_e init, GPIO_int_edge_e edge, GPIO_cb_t cb); + +ERRNO_e GPIO_level_set (GPIO_pin_e pin, bool high); + +bool GPIO_level_get (GPIO_pin_e pin); + +ERRNO_e GPIO_interrupt_disable (GPIO_pin_e pin); + +ERRNO_e GPIO_pending_interrupts_clear (void); + +#endif /* GPIO_H_ */ diff --git a/src/wrappers/gpio.c b/src/wrappers/gpio.c new file mode 100644 index 0000000..e19ea4d --- /dev/null +++ b/src/wrappers/gpio.c @@ -0,0 +1,523 @@ +/** + * @file gpio.c + * @brief GPIO module + * @author Kenny Tran + * @date Mar 01 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include + +#include "../lib/errno.h" + +#include "gpio.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct _gpio +{ + struct gpio_dt_spec spec; + struct gpio_callback cb; + bool cfg_output; + bool high; /* NOTE: gpio_pin_get_dt() can't read status if configured + for output. Temporarily using flag to store state. */ + GPIO_cb_t user_cb; + uint32_t int_flags; +} _gpio_s; + + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +static void left_button_isr (void); +static void center_button_isr (void); +static void right_button_isr (void); +static void pwr_5v_isr (void); +static void led_ring_pwr_isr (void); +static void led_ring_level_shift_enable_isr (void); +static void led_ring_din_isr (void); +static void battery_check_enable_isr (void); +static void imu_int_isr (void); +static void charger_status_isr (void); + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static _gpio_s _gpio_arr[GPIO_PIN_COUNT] = { + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(left_button), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) left_button_isr, + .cfg_output = false, + .high = false, + .user_cb = NULL, + .int_flags = 0 + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(center_button), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) center_button_isr, + .cfg_output = false, + .high = false, + .user_cb = NULL, + .int_flags = 0 + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(right_button), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) right_button_isr, + .cfg_output = false, + .high = false, + .user_cb = NULL, + .int_flags = 0 + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(pwr_5v_enable), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) pwr_5v_isr, + .cfg_output = false, + .high = false, + .user_cb = NULL, + .int_flags = 0 + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(led_ring_pwr), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) led_ring_pwr_isr, + .cfg_output = false, + .high = false, + .user_cb = NULL, + .int_flags = 0 + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(led_ring_level_shift_enable), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) led_ring_level_shift_enable_isr, + .cfg_output = false, + .high = false, + .user_cb = NULL, + .int_flags = 0 + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(led_ring_din), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) led_ring_din_isr, + .cfg_output = false, + .high = false, + .user_cb = NULL, + .int_flags = 0 + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(battery_check_enable), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) battery_check_enable_isr, + .cfg_output = false, + .high = false, + .user_cb = NULL, + .int_flags = 0 + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(imu_int), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) imu_int_isr, + .cfg_output = false, + .high = false, + .user_cb = NULL, + .int_flags = 0 + }, + (_gpio_s) { + .spec = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(charger_status), gpios, {0}), + .cb.handler = (gpio_callback_handler_t) charger_status_isr, + .cfg_output = false, + .high = false, + .user_cb = NULL, + .int_flags = 0 + }, +}; +static bool _gpio_init = false; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e GPIO_init (void) +{ + uint32_t i; + + if (_gpio_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + for (i = 0; i < GPIO_PIN_COUNT; i++) + { + if (!gpio_is_ready_dt (&_gpio_arr[i].spec)) + { + return ERRNO_NOT_READY; + } + } + + _gpio_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e GPIO_cfg (GPIO_pin_e pin, GPIO_direction_e dir, GPIO_pull_e pull, GPIO_init_e init, GPIO_int_edge_e edge, GPIO_cb_t cb) +{ + uint32_t flags = 0; + + if (!_gpio_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (pin >= GPIO_PIN_COUNT) + { + return ERRNO_INVALID_PARAM; + } + + if (pull == GPIO_PULL_DOWN) + { + flags = GPIO_PULL_DOWN; + } + else if (pull == GPIO_PULL_UP) + { + flags = GPIO_PULL_UP; + } + + if (gpio_pin_interrupt_configure_dt (&_gpio_arr[pin].spec, GPIO_INT_DISABLE)) + { + return ERRNO_GPIO_FAILURE; + } + + switch (dir) + { + case GPIO_DIRECTION_IN: + flags |= GPIO_INPUT; + + if (gpio_pin_configure_dt (&_gpio_arr[pin].spec, flags)) + { + return ERRNO_GPIO_FAILURE; + } + + switch (edge) + { + case GPIO_INT_RISING_EDGE: + /* GPIO interrupt to be triggered on pin rising edge. */ + flags = GPIO_INT_EDGE_RISING; + break; + case GPIO_INT_FALLING_EDGE: + /* GPIO interrupt to be triggered on pin falling edge. */ + flags = GPIO_INT_EDGE_FALLING; + break; + case GPIO_INT_BOTH_EDGES: + /* GPIO interrupt to be triggered on pin rising or falling edge. */ + flags = GPIO_INT_EDGE_BOTH; + break; + case GPIO_INT_PL_LOW: + /* GPIO interrupt to be triggered on pin physical level low. */ + flags = GPIO_INT_LEVEL_LOW; + break; + case GPIO_INT_PL_HIGH: + /* GPIO interrupt to be triggered on pin physical level high. */ + flags = GPIO_INT_LEVEL_HIGH; + break; + case GPIO_INT_STATE_CHANGE_LL_LOW: + /* GPIO interrupt to be triggered on pin state change to logical level 0. */ + flags = GPIO_INT_EDGE_TO_INACTIVE; + break; + case GPIO_INT_STATE_CHANGE_LL_HIGH: + /* GPIO interrupt to be triggered on pin state change to logical level 1. */ + flags = GPIO_INT_EDGE_TO_ACTIVE; + break; + case GPIO_INT_LL_LOW: + /* GPIO interrupt to be triggered on pin logical level 0. */ + flags = GPIO_INT_LEVEL_INACTIVE; + break; + case GPIO_INT_LL_HIGH: + /* GPIO interrupt to be triggered on pin logical level 1. */ + flags = GPIO_INT_LEVEL_ACTIVE; + break; + } + + /* Preserve interrupt flag settings. */ + _gpio_arr[pin].int_flags = flags; + + if (gpio_pin_interrupt_configure_dt (&_gpio_arr[pin].spec, flags)) + { + return ERRNO_GPIO_FAILURE; + } + + /* Set the user callback. */ + _gpio_arr[pin].user_cb = cb; + + gpio_init_callback (&_gpio_arr[pin].cb, (gpio_callback_handler_t) _gpio_arr[pin].cb.handler, BIT(_gpio_arr[pin].spec.pin)); + + if (gpio_add_callback (_gpio_arr[pin].spec.port, &_gpio_arr[pin].cb)) + { + return ERRNO_GPIO_FAILURE; + } + + _gpio_arr[pin].cfg_output = false; + + break; + + case GPIO_DIRECTION_OUT: + if (init == GPIO_INIT_LOW) + { + flags |= GPIO_OUTPUT_INACTIVE; + _gpio_arr[pin].high = false; + } + else + { + flags |= GPIO_OUTPUT_ACTIVE; + _gpio_arr[pin].high = true; + } + + if (gpio_pin_configure_dt (&_gpio_arr[pin].spec, flags)) + { + return ERRNO_GPIO_FAILURE; + } + + _gpio_arr[pin].cfg_output = true; + + break; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e GPIO_level_set (GPIO_pin_e pin, bool high) +{ + if (pin >= GPIO_PIN_COUNT) + { + return ERRNO_INVALID_PARAM; + } + + /* Check that pin is not configured for input. */ + if (!_gpio_arr[pin].cfg_output) + { + return ERRNO_GPIO_FAILURE; + } + + if (gpio_pin_set_dt (&_gpio_arr[pin].spec, high)) + { + return ERRNO_GPIO_FAILURE; + } + + _gpio_arr[pin].high = high; + + return ERRNO_SUCCESS; +} + +bool GPIO_level_get (GPIO_pin_e pin) +{ + if (pin >= GPIO_PIN_COUNT) + { + /* TODO: Add asserts. */ + while (1) + ; + } + + /* FIXME: When configured as output, can't read back GPIO state. Using flag to store and readback. */ + if (_gpio_arr[pin].cfg_output) + { + return _gpio_arr[pin].high; + } + + return (bool) gpio_pin_get_dt (&_gpio_arr[pin].spec); +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +static void left_button_isr (void) +{ + /* Disable interrupts to clear. */ + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_BUTTON_LEFT].spec, GPIO_INT_DISABLE); + + /* Invoke user callback if not null. */ + if (_gpio_arr[GPIO_PIN_BUTTON_LEFT].user_cb) + { + _gpio_arr[GPIO_PIN_BUTTON_LEFT].user_cb (); + } + + /* Reconfigure preserved interrupt settings.*/ + if (_gpio_arr[GPIO_PIN_BUTTON_LEFT].int_flags) + { + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_BUTTON_LEFT].spec, _gpio_arr[GPIO_PIN_BUTTON_LEFT].int_flags); + } +} + +static void center_button_isr (void) +{ + /* Disable interrupts to clear. */ + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_BUTTON_CENTER].spec, GPIO_INT_DISABLE); + + /* Invoke user callback if not null. */ + if (_gpio_arr[GPIO_PIN_BUTTON_CENTER].user_cb) + { + _gpio_arr[GPIO_PIN_BUTTON_CENTER].user_cb (); + } + + /* Reconfigure preserved interrupt settings.*/ + if (_gpio_arr[GPIO_PIN_BUTTON_CENTER].int_flags) + { + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_BUTTON_CENTER].spec, _gpio_arr[GPIO_PIN_BUTTON_CENTER].int_flags); + } +} + +static void right_button_isr (void) +{ + /* Disable interrupts to clear. */ + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_BUTTON_RIGHT].spec, GPIO_INT_DISABLE); + + /* Invoke user callback if not null. */ + if (_gpio_arr[GPIO_PIN_BUTTON_RIGHT].user_cb) + { + _gpio_arr[GPIO_PIN_BUTTON_RIGHT].user_cb (); + } + + /* Reconfigure preserved interrupt settings.*/ + if (_gpio_arr[GPIO_PIN_BUTTON_RIGHT].int_flags) + { + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_BUTTON_RIGHT].spec, _gpio_arr[GPIO_PIN_BUTTON_RIGHT].int_flags); + } +} + +static void pwr_5v_isr (void) +{ + /* Disable interrupts to clear. */ + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_5V_ENABLE].spec, GPIO_INT_DISABLE); + + /* Invoke user callback if not null. */ + if (_gpio_arr[GPIO_PIN_5V_ENABLE].user_cb) + { + _gpio_arr[GPIO_PIN_5V_ENABLE].user_cb (); + } + + /* Reconfigure preserved interrupt settings.*/ + if (_gpio_arr[GPIO_PIN_5V_ENABLE].int_flags) + { + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_5V_ENABLE].spec, _gpio_arr[GPIO_PIN_5V_ENABLE].int_flags); + } +} + +static void led_ring_pwr_isr (void) +{ + /* Disable interrupts to clear. */ + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_LED_RING_PWR].spec, GPIO_INT_DISABLE); + + /* Invoke user callback if not null. */ + if (_gpio_arr[GPIO_PIN_LED_RING_PWR].user_cb) + { + _gpio_arr[GPIO_PIN_LED_RING_PWR].user_cb (); + } + + /* Reconfigure preserved interrupt settings.*/ + if (_gpio_arr[GPIO_PIN_LED_RING_PWR].int_flags) + { + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_LED_RING_PWR].spec, _gpio_arr[GPIO_PIN_LED_RING_PWR].int_flags); + } +} + +static void led_ring_level_shift_enable_isr (void) +{ + /* Disable interrupts to clear. */ + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_LED_RING_LEVEL_SHIFT_ENABLE].spec, GPIO_INT_DISABLE); + + /* Invoke user callback if not null. */ + if (_gpio_arr[GPIO_PIN_LED_RING_LEVEL_SHIFT_ENABLE].user_cb) + { + _gpio_arr[GPIO_PIN_LED_RING_LEVEL_SHIFT_ENABLE].user_cb (); + } + + /* Reconfigure preserved interrupt settings.*/ + if (_gpio_arr[GPIO_PIN_LED_RING_LEVEL_SHIFT_ENABLE].int_flags) + { + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_LED_RING_LEVEL_SHIFT_ENABLE].spec, _gpio_arr[GPIO_PIN_LED_RING_LEVEL_SHIFT_ENABLE].int_flags); + } +} + +static void led_ring_din_isr (void) +{ + /* Disable interrupts to clear. */ + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_LED_RING_DIN].spec, GPIO_INT_DISABLE); + + /* Invoke user callback if not null. */ + if (_gpio_arr[GPIO_PIN_LED_RING_DIN].user_cb) + { + _gpio_arr[GPIO_PIN_LED_RING_DIN].user_cb (); + } + + /* Reconfigure preserved interrupt settings.*/ + if (_gpio_arr[GPIO_PIN_LED_RING_DIN].int_flags) + { + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_LED_RING_DIN].spec, _gpio_arr[GPIO_PIN_LED_RING_DIN].int_flags); + } +} + +static void battery_check_enable_isr (void) +{ + /* Disable interrupts to clear. */ + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_BATTERY_CHECK_ENABLE].spec, GPIO_INT_DISABLE); + + /* Invoke user callback if not null. */ + if (_gpio_arr[GPIO_PIN_BATTERY_CHECK_ENABLE].user_cb) + { + _gpio_arr[GPIO_PIN_BATTERY_CHECK_ENABLE].user_cb (); + } + + /* Reconfigure preserved interrupt settings.*/ + if (_gpio_arr[GPIO_PIN_BATTERY_CHECK_ENABLE].int_flags) + { + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_BATTERY_CHECK_ENABLE].spec, _gpio_arr[GPIO_PIN_BATTERY_CHECK_ENABLE].int_flags); + } +} + +static void imu_int_isr (void) +{ + /* Disable interrupts to clear. */ + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_IMU_INT].spec, GPIO_INT_DISABLE); + + /* Invoke user callback if not null. */ + if (_gpio_arr[GPIO_PIN_IMU_INT].user_cb) + { + _gpio_arr[GPIO_PIN_IMU_INT].user_cb (); + } + + /* Reconfigure preserved interrupt settings.*/ + if (_gpio_arr[GPIO_PIN_IMU_INT].int_flags) + { + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_IMU_INT].spec, _gpio_arr[GPIO_PIN_IMU_INT].int_flags); + } +} + +static void charger_status_isr (void) +{ + /* Disable interrupts to clear. */ + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_CHARGER_STATUS].spec, GPIO_INT_DISABLE); + + /* Invoke user callback if not null. */ + if (_gpio_arr[GPIO_PIN_CHARGER_STATUS].user_cb) + { + _gpio_arr[GPIO_PIN_CHARGER_STATUS].user_cb (); + } + + /* Reconfigure preserved interrupt settings.*/ + if (_gpio_arr[GPIO_PIN_CHARGER_STATUS].int_flags) + { + (void) gpio_pin_interrupt_configure_dt (&_gpio_arr[GPIO_PIN_CHARGER_STATUS].spec, _gpio_arr[GPIO_PIN_CHARGER_STATUS].int_flags); + } +} diff --git a/src/wrappers/gpio.h b/src/wrappers/gpio.h new file mode 100644 index 0000000..f673d62 --- /dev/null +++ b/src/wrappers/gpio.h @@ -0,0 +1,98 @@ +/** + * @file gpio.h + * @brief GPIO module + * @author Kenny Tran + * @date Mar 01 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef GPIO_H_ +#define GPIO_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum GPIO_direction +{ + GPIO_DIRECTION_IN = 0, + GPIO_DIRECTION_OUT +} GPIO_direction_e; + +typedef enum GPIO_pull +{ + GPIO_PULLNONE = 0, + GPIO_PULLDOWN, + GPIO_PULLUP +} GPIO_pull_e; + +typedef enum GPIO_init +{ + GPIO_INIT_LOW = 0, + GPIO_INIT_HIGH, +} GPIO_init_e; + +typedef enum GPIO_int_edge +{ + GPIO_INT_RISING_EDGE = 0, /* GPIO interrupt to be triggered on pin rising edge. */ + GPIO_INT_FALLING_EDGE, /* GPIO interrupt to be triggered on pin falling edge. */ + GPIO_INT_BOTH_EDGES, /* GPIO interrupt to be triggered on pin rising or falling edge. */ + GPIO_INT_PL_LOW, /* GPIO interrupt to be triggered on pin physical level low. */ + GPIO_INT_PL_HIGH, /* GPIO interrupt to be triggered on pin physical level high. */ + GPIO_INT_STATE_CHANGE_LL_LOW, /* GPIO interrupt to be triggered on pin state change to logical level 0. */ + GPIO_INT_STATE_CHANGE_LL_HIGH, /* GPIO interrupt to be triggered on pin state change to logical level 1. */ + GPIO_INT_LL_LOW, /* GPIO interrupt to be triggered on pin logical level 0. */ + GPIO_INT_LL_HIGH /* GPIO interrupt to be triggered on pin logical level 1. */ +} GPIO_int_edge_e; + +typedef enum GPIO_pin +{ + GPIO_PIN_BUTTON_LEFT = 0, + GPIO_PIN_BUTTON_CENTER, + GPIO_PIN_BUTTON_RIGHT, + GPIO_PIN_5V_ENABLE, + GPIO_PIN_LED_RING_PWR, + GPIO_PIN_LED_RING_LEVEL_SHIFT_ENABLE, + GPIO_PIN_LED_RING_DIN, + GPIO_PIN_BATTERY_CHECK_ENABLE, + GPIO_PIN_IMU_INT, + GPIO_PIN_CHARGER_STATUS, + + GPIO_PIN_COUNT +} GPIO_pin_e; + +typedef void (*GPIO_cb_t) (void); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e GPIO_init (void); + +ERRNO_e GPIO_cfg (GPIO_pin_e pin, GPIO_direction_e dir, GPIO_pull_e pull, GPIO_init_e init, GPIO_int_edge_e edge, GPIO_cb_t cb); + +ERRNO_e GPIO_level_set (GPIO_pin_e pin, bool high); + +bool GPIO_level_get (GPIO_pin_e pin); + + +#endif /* GPIO_H_ */ + diff --git a/src/wrappers/i2c.c b/src/wrappers/i2c.c new file mode 100644 index 0000000..b3962fb --- /dev/null +++ b/src/wrappers/i2c.c @@ -0,0 +1,468 @@ +/** + * @file i2c.c + * @brief I2C Library + * @author Kenny Tran + * @date Jul 05 2022 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include +#include +#include + +#include "../lib/errno.h" +#include "../lib/debug.h" +#include "../bsp/imu_reg.h" + +#include "i2c.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +/* Ideally should be part of ctx structure but using Zephyr defines is easier. */ +K_MUTEX_DEFINE(_i2c0_mutex); +K_MUTEX_DEFINE(_i2c1_mutex); + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct _i2c_ctx +{ + const struct device *p_dev; + bool init; + struct k_mutex *p_mutex; +} _i2c_ctx_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +/* NOTE: SPI instance 0 and 1 share the same base address as TWI instance 0 and 1. + Reserve 0 and 1 for TWI and use 2 and 3 for SPI. */ +static _i2c_ctx_s _i2c_ctx_arr[I2C_CH_COUNT] = +{ + { + .p_dev = DEVICE_DT_GET(DT_NODELABEL(i2c0)), + .init = false, + .p_mutex = &_i2c0_mutex + }, + { + .p_dev = DEVICE_DT_GET(DT_NODELABEL(i2c1)), + .init = false, + .p_mutex = &_i2c1_mutex + }, +}; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e I2C_init (I2C_ch_e ch) +{ + if (ch >= I2C_CH_COUNT) + { + return ERRNO_LIMIT_REACHED; + } + else if (_i2c_ctx_arr[ch].init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (!device_is_ready (_i2c_ctx_arr[ch].p_dev)) + { + return ERRNO_NOT_READY; + } + + /* Set init flag upon successful initialization. */ + _i2c_ctx_arr[ch].init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e I2C_suspend (void) +{ + uint8_t i; + + for (i = 0; i < I2C_CH_COUNT; i++) + { + if (!_i2c_ctx_arr[i].init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Lock mutex */ + k_mutex_lock(_i2c_ctx_arr[i].p_mutex, K_FOREVER); + + if (pm_device_action_run (_i2c_ctx_arr[i].p_dev, PM_DEVICE_ACTION_SUSPEND) < 0) + { + return ERRNO_PWR_MGMT_FAILURE; + } + } + + return ERRNO_SUCCESS; +} + +ERRNO_e I2C_resume (void) +{ + uint8_t i; + + for (i = 0; i < I2C_CH_COUNT; i++) + { + if (!_i2c_ctx_arr[i].init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (pm_device_action_run (_i2c_ctx_arr[i].p_dev, PM_DEVICE_ACTION_RESUME) < 0) + { + return ERRNO_PWR_MGMT_FAILURE; + } + + /* Unlock mutex */ + k_mutex_unlock(_i2c_ctx_arr[i].p_mutex); + } + + return ERRNO_SUCCESS; +} + +ERRNO_e I2C_words_read (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint16_t *p_dest, uint16_t len) +{ + uint16_t i; + + if (ch >= I2C_CH_COUNT) + { + return ERRNO_INVALID_PARAM; + } + else if (p_dest == NULL) + { + return ERRNO_BAD_POINTER; + } + else if (!_i2c_ctx_arr[ch].init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Lock mutex */ + k_mutex_lock(_i2c_ctx_arr[ch].p_mutex, K_FOREVER); + + /* Write the reg_addr. */ + if (i2c_write (_i2c_ctx_arr[ch].p_dev, ®_addr, 1, dev_addr)) + { + k_mutex_unlock(_i2c_ctx_arr[ch].p_mutex); + return ERRNO_I2C_FAILURE; + } + + /* Loop through to read words. */ + for (i = 0; i < len; i++) + { + /* Transfer data */ + if (i2c_read (_i2c_ctx_arr[ch].p_dev, (uint8_t *) &p_dest[i], 2, dev_addr)) + { + k_mutex_unlock(_i2c_ctx_arr[ch].p_mutex); + return ERRNO_I2C_FAILURE; + } + } + + /* Unlock mutex */ + k_mutex_unlock(_i2c_ctx_arr[ch].p_mutex); + + return ERRNO_SUCCESS; +} + +ERRNO_e I2C_words_write (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint16_t *p_src, uint8_t len) +{ + uint8_t i; + const uint8_t tx_len = len * sizeof (uint16_t); + uint8_t tx_buf[tx_len]; + + if (ch >= I2C_CH_COUNT) + { + return ERRNO_INVALID_PARAM; + } + else if (p_src == NULL) + { + return ERRNO_BAD_POINTER; + } + else if (!_i2c_ctx_arr[ch].init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Lock mutex */ + k_mutex_lock(_i2c_ctx_arr[ch].p_mutex, K_FOREVER); + + /* Write the reg_addr. */ + if (i2c_write (_i2c_ctx_arr[ch].p_dev, ®_addr, 1, dev_addr)) + { + k_mutex_unlock(_i2c_ctx_arr[ch].p_mutex); + return ERRNO_I2C_FAILURE; + } + + /* Loop through mask and write words. */ + for (i = 0; i < len; i++) + { + tx_buf[(i * sizeof (uint16_t))] = p_src[i] >> 8; + tx_buf[(i * sizeof (uint16_t)) + 1] = p_src[i] & 0xFF; + } + + if (i2c_write (_i2c_ctx_arr[ch].p_dev, tx_buf, tx_len, dev_addr)) + { + k_mutex_unlock(_i2c_ctx_arr[ch].p_mutex); + return ERRNO_I2C_FAILURE; + } + + /* Unlock */ + k_mutex_unlock(_i2c_ctx_arr[ch].p_mutex); + + return ERRNO_SUCCESS; +} + +ERRNO_e I2C_bytes_read (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t *p_dest, uint32_t len) +{ + if (ch >= I2C_CH_COUNT) + { + return ERRNO_INVALID_PARAM; + } + else if (p_dest == NULL) + { + return ERRNO_BAD_POINTER; + } + else if (!_i2c_ctx_arr[ch].init) + { + return ERRNO_NOT_INITIALIZED; + } + + #ifdef CONFIG_DBG_STATS + if (reg_addr == LSM6DS3TR_C_FIFO_DATA_OUT_L) { + atomic_set(&i2c_transfer_active, 1); + } + #endif + + /* Lock mutex */ + k_mutex_lock(_i2c_ctx_arr[ch].p_mutex, K_FOREVER); + + if (i2c_write_read (_i2c_ctx_arr[ch].p_dev, dev_addr, ®_addr, 1, p_dest, len)) + { + k_mutex_unlock(_i2c_ctx_arr[ch].p_mutex); + return ERRNO_I2C_FAILURE; + } + + /* Unlock */ + k_mutex_unlock(_i2c_ctx_arr[ch].p_mutex); + + #ifdef CONFIG_DBG_STATS + atomic_set(&i2c_transfer_active, 0); + #endif + + return ERRNO_SUCCESS; +} + +ERRNO_e I2C_bytes_write (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t *p_src, uint8_t len) +{ + const uint8_t tx_len = len + 1; + uint8_t tx_buf[tx_len]; + + if (ch >= I2C_CH_COUNT) + { + return ERRNO_INVALID_PARAM; + } + else if (p_src == NULL) + { + return ERRNO_BAD_POINTER; + } + else if (!_i2c_ctx_arr[ch].init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Write the register address and data into transmit buffer. */ + tx_buf[0] = reg_addr; + memcpy (&tx_buf[1], p_src, len); + + /* Lock */ + k_mutex_lock(_i2c_ctx_arr[ch].p_mutex, K_FOREVER); + + if (i2c_write (_i2c_ctx_arr[ch].p_dev, tx_buf, tx_len, dev_addr)) + { + k_mutex_unlock(_i2c_ctx_arr[ch].p_mutex); + return ERRNO_I2C_FAILURE; + } + + /* Unlock */ + k_mutex_unlock(_i2c_ctx_arr[ch].p_mutex); + + return ERRNO_SUCCESS; +} + +ERRNO_e I2C_bits_read (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t *p_dest, uint8_t bit_start, uint8_t len) +{ + // 01101001 read byte + // 76543210 bit numbers + // xxx args: bitStart=4, length=3 + // 010 masked + // -> 010 shifted + ERRNO_e err = ERRNO_I2C_FAILURE; + uint8_t byte; + + if (p_dest == NULL) + { + return ERRNO_BAD_POINTER; + } + + err = I2C_bytes_read (ch, dev_addr, reg_addr, &byte, 1); + if (err == ERRNO_SUCCESS) + { + uint8_t mask = ((1 << len) - 1) << (bit_start - len + 1); + byte &= mask; + byte >>= (bit_start - len + 1); + *p_dest = byte; + } + + return err; +} + +ERRNO_e I2C_bits_write (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t data, uint8_t bit_start, uint8_t len) +{ + // 010 value to write + // 76543210 bit numbers + // xxx args: bitStart=4, length=3 + // 00011100 mask byte + // 10101111 original value (sample) + // 10100011 original & ~mask + // 10101011 masked | value + ERRNO_e err = ERRNO_I2C_FAILURE; + uint8_t byte; + uint8_t mask; + + err = I2C_bytes_read (ch, dev_addr, reg_addr, &byte, 1); + + if (err != ERRNO_SUCCESS) + { + return err; + } + + /* Determine correct mask. */ + mask = ((1 << len) - 1) << (bit_start - len + 1); + + /* Shift data into correct position */ + data <<= (bit_start - len + 1); + + /* Zero non-important bits in the data. */ + data &= mask; + + /* Zero all important bits in existing byte. */ + byte &= ~(mask); + + /* Combine new data with existing byte. */ + byte |= data; + + err = I2C_bytes_write (ch, dev_addr, reg_addr, &byte, 1); + + return err; +} + +ERRNO_e I2C_field_write(I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t field_data, uint8_t field_start, uint8_t len) +{ + // 010 data to write + // 76543210 bit index + // xxx args: field_start=2, length=3 + // 00011100 mask + // 00001000 data shifted + // 00001000 data & mask + // 10101111 original value (sample) + // 10100011 original & ~mask + // 10101011 (original value & ~mask) | (data & mask) + ERRNO_e err = ERRNO_I2C_FAILURE; + uint8_t byte = 0; + uint8_t mask = 0; + + err = I2C_bytes_read (ch, dev_addr, reg_addr, &byte, 1); + if (err != ERRNO_SUCCESS) + { + return err; + } + + /* Determine correct mask. */ + mask = ((1U << len) - 1) << field_start; + + /* Shift data into correct position */ + uint8_t data_shifted = field_data << field_start; + + /* Zero non-important bits in the data. */ + data_shifted &= mask; + + // Isolate the current bits in the register and compare to the new data + if ((byte & mask) == data_shifted) { + // The register already holds the correct value. + // Return SUCCESS immediately and skip the write. + return ERRNO_SUCCESS; + } + + /* Zero all important bits in existing byte. */ + byte &= ~(mask); + + /* Combine new data with existing byte. */ + byte |= data_shifted; + + err = I2C_bytes_write (ch, dev_addr, reg_addr, &byte, 1); + + return err; +} + +ERRNO_e I2C_field_read(I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t *field_data, uint8_t field_start, uint8_t len) +{ + ERRNO_e err = ERRNO_I2C_FAILURE; + uint8_t byte = 0; + uint8_t mask = 0; + + // 1. Safety Check + // Since we are returning data via a pointer, we must ensure it exists. + if (field_data == NULL) { + return ERRNO_BAD_POINTER; + } + + // 2. READ the full register value + err = I2C_bytes_read(ch, dev_addr, reg_addr, &byte, 1); + if (err != ERRNO_SUCCESS) { + return err; + } + + // 3. CALCULATE Mask + // Same logic as the write function: Create a window of 1s at the field location + mask = ((1U << len) - 1) << field_start; + + // 4. ISOLATE the field bits + // Clear everything outside the mask (zero out bits we don't care about) + byte &= mask; + + // 5. NORMALIZE the value (Right Shift) + // Move the bits down to position 0 so the value makes sense to the user. + // Example: If reading bits [3:2] and the value is binary '10', + // the register holds 0x08. We shift right by 2 to get 0x02. + byte >>= field_start; + + // 6. RETURN the value + *field_data = byte; + + return ERRNO_SUCCESS; +} + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ diff --git a/src/wrappers/i2c.h b/src/wrappers/i2c.h new file mode 100644 index 0000000..07dbcef --- /dev/null +++ b/src/wrappers/i2c.h @@ -0,0 +1,67 @@ +/** + * @file i2c.h + * @brief I2C Library + * @author Kenny Tran + * @date Jul 05 2022 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef I2C_H_ +#define I2C_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum I2C_ch +{ + I2C_CH_0 = 0, + I2C_CH_1, + + I2C_CH_COUNT, + I2C_CH_INVALID = I2C_CH_COUNT +} I2C_ch_e; + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e I2C_init (I2C_ch_e ch); + +ERRNO_e I2C_suspend (void); + +ERRNO_e I2C_resume (void); + +ERRNO_e I2C_words_read (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint16_t *p_dest, uint16_t len); + +ERRNO_e I2C_words_write (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint16_t *p_src, uint8_t len); + +ERRNO_e I2C_bytes_read (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t *p_dest, uint32_t len); + +ERRNO_e I2C_bytes_write (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t *p_src, uint8_t len); + +ERRNO_e I2C_bits_read (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t *p_dest, uint8_t bit_start, uint8_t len); + +ERRNO_e I2C_bits_write (I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t data, uint8_t bit_start, uint8_t len); + +ERRNO_e I2C_field_write(I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t field_data, uint8_t field_start, uint8_t len); +ERRNO_e I2C_field_read(I2C_ch_e ch, uint8_t dev_addr, uint8_t reg_addr, uint8_t *field_data, uint8_t field_start, uint8_t len); + +#endif /* I2C_H_ */ diff --git a/src/wrappers/pwm.c b/src/wrappers/pwm.c new file mode 100644 index 0000000..576369d --- /dev/null +++ b/src/wrappers/pwm.c @@ -0,0 +1,173 @@ +/** + * @file pwm.c + * @brief PWM module + * @author Kenny Tran + * @date May 11 2022 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include +#include + +#include "../lib/errno.h" + +#include "pwm.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define _PWM_MAX_INSTANCES (1) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef struct _pwm +{ + struct pwm_dt_spec spec[PWM_CH_COUNT]; + uint32_t period_ns; + bool init; +} _pwm_s; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static _pwm_s _pwm_arr[_PWM_MAX_INSTANCES] = { + (_pwm_s) { + .spec = + { + PWM_DT_SPEC_GET(DT_ALIAS(bubble_led)), + PWM_DT_SPEC_GET(DT_ALIAS(pin_led)), + PWM_DT_SPEC_GET(DT_ALIAS(fiber_led)), + }, + .period_ns = 0, + .init = false, + }, +}; +static uint8_t _pwm_idx = 0; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e PWM_init (uint8_t *p_inst_id, uint32_t period_ns) +{ + uint8_t i; + + if (_pwm_idx >= _PWM_MAX_INSTANCES) + { + return ERRNO_LIMIT_REACHED; + } + else if (p_inst_id == NULL) + { + return ERRNO_BAD_POINTER; + } + + for (i = 0; i < PWM_CH_COUNT; i++) + { + if (!pwm_is_ready_dt (&_pwm_arr[_pwm_idx].spec[i])) + { + return ERRNO_NOT_READY; + } + } + + _pwm_arr[_pwm_idx].period_ns = period_ns; + _pwm_arr[_pwm_idx].init = true; + + /* Set instance index and increment for next instance. */ + *p_inst_id = _pwm_idx++; + + return ERRNO_SUCCESS; +} + +ERRNO_e PWM_suspend (void) +{ + uint8_t i; + + for (i = 0; i < _PWM_MAX_INSTANCES; i++) + { + if (!_pwm_arr[i].init) + { + return ERRNO_NOT_INITIALIZED; + } + if (pm_device_action_run (_pwm_arr[i].spec[PWM_CH_0].dev, PM_DEVICE_ACTION_SUSPEND) < 0) + { + return ERRNO_PWR_MGMT_FAILURE; + } + } + + return ERRNO_SUCCESS; +} + +ERRNO_e PWM_resume (void) +{ + uint8_t i; + + for (i = 0; i < _PWM_MAX_INSTANCES; i++) + { + if (!_pwm_arr[i].init) + { + return ERRNO_NOT_INITIALIZED; + } + if (pm_device_action_run (_pwm_arr[i].spec[PWM_CH_0].dev, PM_DEVICE_ACTION_RESUME) < 0) + { + return ERRNO_PWR_MGMT_FAILURE; + } + } + + return ERRNO_SUCCESS; +} + +ERRNO_e PWM_duty_cycle_set (uint8_t inst_id, PWM_ch_e ch, float duty_cycle) +{ + uint32_t pulse; + + if (inst_id >= _pwm_idx) + { + return ERRNO_INVALID_PARAM; + } + else if (!_pwm_arr[inst_id].init) + { + return ERRNO_NOT_INITIALIZED; + } + else if (ch >= PWM_CH_COUNT) + { + return ERRNO_INVALID_PARAM; + } + + pulse = (duty_cycle / 100.0f) * _pwm_arr[inst_id].period_ns; + + if (pulse > _pwm_arr[inst_id].period_ns) + { + pulse = _pwm_arr[inst_id].period_ns; + } + + if (pwm_set_dt (&_pwm_arr[inst_id].spec[ch], _pwm_arr[inst_id].period_ns, pulse)) + { + return ERRNO_PWM_FAILURE; + } + + return ERRNO_SUCCESS; +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ diff --git a/src/wrappers/pwm.h b/src/wrappers/pwm.h new file mode 100644 index 0000000..8ab7a9b --- /dev/null +++ b/src/wrappers/pwm.h @@ -0,0 +1,65 @@ +/** + * @file pwm.h + * @brief PWM module + * @author Kenny Tran + * @date May 11 2022 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef PWM_H_ +#define PWM_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define LED_PWM_PERIOD_NS (4000) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ +typedef enum PWM_ch +{ + PWM_CH_0 = 0, /* Bubble LED */ + PWM_CH_1, /* Pin LED */ + PWM_CH_2, /* Fiber LED */ + // PWM_CH_3, /* Unused */ + + PWM_CH_COUNT +} PWM_ch_e; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e PWM_init (uint8_t *p_inst_id, uint32_t period_ns); + +ERRNO_e PWM_suspend (void); + +ERRNO_e PWM_duty_cycle_set (uint8_t inst_id, PWM_ch_e ch, float duty_cycle); + + +#endif /* PWM_H_ */ diff --git a/src/wrappers/spi.c b/src/wrappers/spi.c new file mode 100644 index 0000000..ca06975 --- /dev/null +++ b/src/wrappers/spi.c @@ -0,0 +1,179 @@ +/** + * @file spi.c + * @brief SPI Library + * @author Kenny Tran + * @date Jul 05 2022 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include +#include +#include +#include + +#include "../lib/errno.h" + +#include "spi.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +K_MUTEX_DEFINE(_spi_mutex); + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static const struct device *_spi_dev = DEVICE_DT_GET(DT_NODELABEL(spi2)); +static struct spi_config _spi_cfg = { 0 }; +static struct spi_cs_control _spi_cs = { 0 }; +static bool _spi_init = false; + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +// (struct spi_cs_control){(void).gpio = struct gpio_dt_spec{(void).port = (const struct device *)&__device_dts_ord_11, (void).pin = (gpio_pin_t)18U, (void).dt_flags = (gpio_dt_flags_t)1U}, (void).delay = (uint32_t)0U} + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e SPI_init (void) +{ + if (_spi_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + /* Configure chip select. */ + _spi_cs = (struct spi_cs_control) + { + .gpio = GPIO_DT_SPEC_GET(DT_NODELABEL(spi2), cs_gpios), + .delay = 0 + }; + + /* Configure SPI to run at 4 MHz. */ + _spi_cfg.operation = SPI_WORD_SET(8) | SPI_TRANSFER_MSB; + _spi_cfg.frequency = 4000000U; + _spi_cfg.cs = _spi_cs; + + if (!device_is_ready (_spi_dev)) + { + return ERRNO_NOT_READY; + } + + /* Set init flag upon successful initialization. */ + _spi_init = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e SPI_suspend (void) +{ + if (!_spi_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Lock mutex */ + k_mutex_lock(&_spi_mutex, K_FOREVER); + + if (pm_device_action_run (_spi_dev, PM_DEVICE_ACTION_SUSPEND) < 0) + { + return ERRNO_PWR_MGMT_FAILURE; + } + + return ERRNO_SUCCESS; +} + +ERRNO_e SPI_resume (void) +{ + if (!_spi_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (pm_device_action_run (_spi_dev, PM_DEVICE_ACTION_RESUME) < 0) + { + return ERRNO_PWR_MGMT_FAILURE; + } + + /* Unlock mutex */ + k_mutex_unlock(&_spi_mutex); + + return ERRNO_SUCCESS; +} + +ERRNO_e SPI_xfer (uint8_t *p_src, uint32_t src_len, uint8_t *p_dest, uint32_t dest_len) +{ + struct spi_buf tx_buf = { + .buf = p_src, + .len = src_len + }; + + /* Two buffers because we aren't reading during the send transaction. */ + struct spi_buf rx_buf[] = + { + { + .buf = NULL, + .len = src_len + }, + { + .buf = p_dest, + .len = dest_len + } + }; + + struct spi_buf_set tx = { + .buffers = &tx_buf, + .count = 1 + }; + + struct spi_buf_set rx = { + .buffers = rx_buf, + .count = 2 + }; + + /* Note: Only check p_src. Not all SPI transfers perform a read. */ + if (p_src == NULL) + { + return ERRNO_BAD_POINTER; + } + else if (!_spi_init) + { + return ERRNO_NOT_INITIALIZED; + } + + /* Lock mutex */ + k_mutex_lock(&_spi_mutex, K_FOREVER); + + if (spi_transceive (_spi_dev, &_spi_cfg, &tx, &rx)) + { + k_mutex_unlock(&_spi_mutex); + return ERRNO_SPI_FAILURE; + } + + /* Unlock mutex */ + k_mutex_unlock(&_spi_mutex); + + return ERRNO_SUCCESS; +} + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ diff --git a/src/wrappers/spi.h b/src/wrappers/spi.h new file mode 100644 index 0000000..19b43e4 --- /dev/null +++ b/src/wrappers/spi.h @@ -0,0 +1,47 @@ +/** + * @file spi.h + * @brief SPI Library + * @author Kenny Tran + * @date Feb 28 2024 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef SPI_H_ +#define SPI_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e SPI_init (void); + +ERRNO_e SPI_suspend (void); + +ERRNO_e SPI_resume (void); + +ERRNO_e SPI_xfer (uint8_t *p_src, uint32_t src_len, uint8_t *p_dest, uint32_t dest_len); + + +#endif /* SPI_H_ */ diff --git a/src/wrappers/uart.c b/src/wrappers/uart.c new file mode 100644 index 0000000..7af1c15 --- /dev/null +++ b/src/wrappers/uart.c @@ -0,0 +1,184 @@ +/** + * @file uart.c + * @brief UART module + * @author Kenny Tran + * @date Jul 05 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include +#include + +#include "../lib/errno.h" +#include "../lib/print.h" + +#include "uart.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS, STRUCTURES & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ +static const struct device *_uart_dev = DEVICE_DT_GET(DT_NODELABEL(uart0)); +static uint8_t _uart_rx_buf[UART_BUF_SIZE] = { 0 }; +static uint8_t _uart_rx_ch; +static bool _uart_rx_rdy = false; +static bool _uart_init = false; +static bool _uart_suspend = false; + + +/*------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *-----------------------------------------------------------------------------------------------*/ +static void _uart_cb (const struct device *dev, struct uart_event *evt, void *user_data); + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION DEFINITIONS + *------------------------------------------------------------------------------------------------*/ +ERRNO_e UART_init (void) +{ + if (_uart_init) + { + return ERRNO_ALREADY_INITIALIZED; + } + + if (!device_is_ready (_uart_dev)) + { + return ERRNO_NOT_READY; + } + + if (uart_callback_set (_uart_dev, _uart_cb, NULL) != 0) + { + return ERRNO_UART_FAILURE; + } + + if (uart_rx_enable(_uart_dev, _uart_rx_buf, UART_BUF_SIZE, UART_TIMEOUT_MS) != 0) + { + return ERRNO_UART_FAILURE; + } + + k_busy_wait(100000); + + _uart_init = true; + + return ERRNO_SUCCESS; +} + +bool UART_getc (uint8_t *ch) +{ + if (_uart_rx_rdy) + { + *ch = _uart_rx_ch; + + _uart_rx_rdy = false; + + return true; + } + + return false; +} + +ERRNO_e UART_suspend (void) +{ + if (!_uart_init) + { + return ERRNO_NOT_INITIALIZED; + } + + _uart_suspend = true; + + return ERRNO_SUCCESS; +} + +ERRNO_e UART_resume (void) +{ + if (!_uart_init) + { + return ERRNO_NOT_INITIALIZED; + } + + if (pm_device_action_run (_uart_dev, PM_DEVICE_ACTION_RESUME) < 0) + { + PRINT (ERROR, "Failure to suspend UART.\r\n"); + } + + _uart_suspend = false; + + return ERRNO_SUCCESS; +} + +/*------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION DEFINITIONS + *-----------------------------------------------------------------------------------------------*/ +static void _uart_cb (const struct device *dev, struct uart_event *evt, void *user_data) +{ + switch (evt->type) + { + // case UART_TX_DONE: + // break; + + // case UART_TX_ABORTED: + // break; + + case UART_RX_RDY: + _uart_rx_ch = evt->data.rx.buf[evt->data.rx.offset]; + _uart_rx_rdy = true; + break; + + // case UART_RX_BUF_REQUEST: + // break; + + // case UART_RX_BUF_RELEASED: + // break; + + /* Continuous reception is not enabled by default, which means once the receive buffer is full, + you must manually enable reception. Inside the UART_RX_DISABLED case of the UART callback, + you must re-enable UART to have continuous reception */ + case UART_RX_DISABLED: + if (_uart_suspend) + { + /* Disable RX if it's enabled (important to avoid issues during suspend). */ + if (uart_rx_disable(_uart_dev) != 0) + { + PRINT (ERROR, "Failure to disable UART RX.\r\n"); + } + /* UART has finished and is disables, suspend. */ + if (pm_device_action_run (_uart_dev, PM_DEVICE_ACTION_SUSPEND) < 0) + { + + PRINT (ERROR, "Failure to suspend UART.\r\n"); + } + } + else + { + uart_rx_enable (dev, _uart_rx_buf, UART_BUF_SIZE, UART_TIMEOUT_MS); + } + break; + + // case UART_RX_STOPPED: + // break; + + default: + break; + } +} diff --git a/src/wrappers/uart.h b/src/wrappers/uart.h new file mode 100644 index 0000000..f44cc44 --- /dev/null +++ b/src/wrappers/uart.h @@ -0,0 +1,60 @@ +/** + * @file uart.c + * @brief UART module + * @author Kenny Tran + * @date Jul 05 2023 + * @version 0.0.1 + * + * @section LICENSES + * Copyright (C) Morgan Advanced Programmable Systems, Inc. + */ + + +#ifndef UART_H_ +#define UART_H_ + + +/*-------------------------------------------------------------------------------------------------- + * INCLUDE FILES + *------------------------------------------------------------------------------------------------*/ +#include +#include + +#include "../lib/errno.h" + + +/*-------------------------------------------------------------------------------------------------- + * MACROS & CONSTANTS + *------------------------------------------------------------------------------------------------*/ +#define UART_BUF_SIZE (16) +#define UART_TIMEOUT_MS (100) + + +/*-------------------------------------------------------------------------------------------------- + * TYPE DEFINITIONS & ENUMERATIONS + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE CONSTANTS & VARIABLES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PRIVATE FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ + + +/*-------------------------------------------------------------------------------------------------- + * PUBLIC FUNCTION PROTOTYPES + *------------------------------------------------------------------------------------------------*/ +ERRNO_e UART_init (void); + +bool UART_getc (uint8_t *ch); + +ERRNO_e UART_suspend (void); + +ERRNO_e UART_resume (void); + + +#endif /* UART_H_ */ diff --git a/sysbuild.conf b/sysbuild.conf new file mode 100644 index 0000000..c47b805 --- /dev/null +++ b/sysbuild.conf @@ -0,0 +1,7 @@ +SB_CONFIG_PARTITION_MANAGER=y + +# # Enable MCU bootloader +SB_CONFIG_BOOTLOADER_MCUBOOT=y + +# Private key for signing image +SB_CONFIG_BOOT_SIGNATURE_KEY_FILE="C:/ncs/apps/trunk/keys/cyber_pk.pem" diff --git a/sysbuild/mcuboot.conf b/sysbuild/mcuboot.conf new file mode 100644 index 0000000..62caeb8 --- /dev/null +++ b/sysbuild/mcuboot.conf @@ -0,0 +1,12 @@ +CONFIG_SERIAL=n +CONFIG_UART_CONSOLE=n +CONFIG_LOG=n + +# Using the external crystal for more precise timing (+/-10 PPM) +CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=n +CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y +CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM=y + +# Using the internal oscillator (500 PPM) +# CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y +# CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=n \ No newline at end of file

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