Initial commit
Initial commit.
This commit is contained in:
kntran1
179
bootloader/mcuboot/boot/espressif/port/esp32h2/ld/bootloader.ld
Normal file
179
bootloader/mcuboot/boot/espressif/port/esp32h2/ld/bootloader.ld
Normal file
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/** Simplified memory map for the bootloader.
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* Make sure the bootloader can load into main memory without overwriting itself.
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*
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* ESP32-H2 ROM static data usage is as follows:
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* - 0x4083ba78 - 0x4084d380: Shared buffers, used in UART/USB/SPI download mode only
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* - 0x4084d380 - 0x4084f380: PRO CPU stack, can be reclaimed as heap after RTOS startup
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* - 0x4084f380 - 0x4084fee0: ROM .bss and .data used in startup code or nonos/early boot (can be freed when IDF runs)
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* - 0x4084fee0 - 0x40850000: ROM .bss and .data used in startup code and when IDF runs (cannot be freed)
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*
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* The 2nd stage bootloader can take space up to the end of ROM shared
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* buffers area (0x4084d380).
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*/
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/* We consider 0x3fcdc710 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg,
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* and work out iram_seg and iram_loader_seg addresses from there, backwards.
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*/
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/* These lengths can be adjusted, if necessary: */
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bootloader_usable_dram_end = 0x4084cfd0;
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bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
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bootloader_dram_seg_len = 0xA000;
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bootloader_iram_loader_seg_len = 0x7000;
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bootloader_iram_seg_len = 0x8800;
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/* Start of the lower region is determined by region size and the end of the higher region */
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bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead;
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bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len;
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bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len;
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bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len;
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MEMORY
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{
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iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len
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iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len
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dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len
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}
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/* The app may use RAM for static allocations up to the start of iram_loader_seg.
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* If you have changed something above and this assert fails:
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* 1. Check what the new value of bootloader_iram_loader_seg start is.
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* 2. Update the value in this assert.
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* 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32h2/memory.ld.in to the same value.
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*/
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ASSERT(bootloader_iram_loader_seg_start == 0x40839FD0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
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/* Default entry point: */
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ENTRY(main);
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SECTIONS
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{
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.iram_loader.text :
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{
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. = ALIGN (16);
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_loader_text_start = ABSOLUTE(.);
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*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
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*libhal.a:*.*(.literal .text .literal.* .text.*)
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*esp_mcuboot.*(.literal .text .literal.* .text.*)
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*esp_loader.*(.literal .text .literal.* .text.*)
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*main.*(.literal .text .literal.* .text.*)
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_loader_text_end = ABSOLUTE(.);
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} > iram_loader_seg
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.iram.text :
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{
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. = ALIGN (16);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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} > iram_seg
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/* Shared RAM */
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.dram0.bss (NOLOAD) :
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{
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. = ALIGN (8);
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_dram_start = ABSOLUTE(.);
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_bss_start = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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_bss_end = ABSOLUTE(.);
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} >dram_seg
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.dram0.data :
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{
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_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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_data_end = ABSOLUTE(.);
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} >dram_seg
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.dram0.rodata :
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{
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_rodata_start = ABSOLUTE(.);
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*(.rodata)
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*(.rodata.*)
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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*(.eh_frame)
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. = (. + 3) & ~ 3;
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/* C++ constructor and destructor tables, properly ordered: */
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__init_array_start = ABSOLUTE(.);
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KEEP (*crtbegin.*(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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__init_array_end = ABSOLUTE(.);
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KEEP (*crtbegin.*(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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_rodata_end = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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. = ALIGN(4);
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_dram_end = ABSOLUTE(.);
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} >dram_seg
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.iram.text :
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.iram .iram.*) /* catch stray IRAM_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_text_end = ABSOLUTE(.);
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_etext = .;
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} > iram_seg
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}
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