124 lines
2.6 KiB
Plaintext
124 lines
2.6 KiB
Plaintext
&pinctrl {
|
|
i2c0_default: i2c0_default {
|
|
group1 {
|
|
psels = <NRF_PSEL(TWIM_SCL, 0, 8)>,
|
|
<NRF_PSEL(TWIM_SDA, 0, 6)>;
|
|
};
|
|
};
|
|
|
|
i2c0_sleep: i2c0_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(TWIM_SCL, 0, 8)>,
|
|
<NRF_PSEL(TWIM_SDA, 0, 6)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
|
|
i2c1_default: i2c1_default {
|
|
group1 {
|
|
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
|
|
<NRF_PSEL(TWIM_SCL, 0, 27)>;
|
|
};
|
|
};
|
|
|
|
i2c1_sleep: i2c1_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
|
|
<NRF_PSEL(TWIM_SCL, 0, 27)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
|
|
i2s0_default: i2s0_default {
|
|
group1 {
|
|
/* Using i2s SDOUT to drive LED ring. SCK and LRCK not needed but Zephyr driver will not
|
|
* drive SDOUT without them. Workaround : Burn up 2 unused GPIO for SCK and LRCK.
|
|
*/
|
|
psels = <NRF_PSEL(I2S_SCK_M, 0, 14)>,
|
|
<NRF_PSEL(I2S_LRCK_M, 1, 14)>,
|
|
<NRF_PSEL(I2S_SDOUT, 0, 7)>;
|
|
};
|
|
};
|
|
|
|
i2s0_sleep: i2s0_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(I2S_SCK_M, 0, 14)>,
|
|
<NRF_PSEL(I2S_LRCK_M, 1, 14)>,
|
|
<NRF_PSEL(I2S_SDOUT, 0, 7)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
|
|
pwm0_default: pwm0_default {
|
|
group1 {
|
|
psels = <NRF_PSEL(PWM_OUT0, 0, 9)>,
|
|
<NRF_PSEL(PWM_OUT1, 0, 3)>,
|
|
<NRF_PSEL(PWM_OUT2, 1, 15)>;
|
|
};
|
|
};
|
|
|
|
pwm0_sleep: pwm0_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(PWM_OUT0, 0, 9)>,
|
|
<NRF_PSEL(PWM_OUT1, 0, 3)>,
|
|
<NRF_PSEL(PWM_OUT2, 1, 15)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
|
|
qspi_default: qspi_default {
|
|
group1 {
|
|
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
|
|
<NRF_PSEL(QSPI_CSN, 0, 20)>,
|
|
<NRF_PSEL(QSPI_IO0, 0, 23)>,
|
|
<NRF_PSEL(QSPI_IO1, 1, 0)>,
|
|
<NRF_PSEL(QSPI_IO2, 0, 22)>,
|
|
<NRF_PSEL(QSPI_IO3, 0, 21)>;
|
|
};
|
|
};
|
|
|
|
qspi_sleep: qspi_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
|
|
<NRF_PSEL(QSPI_CSN, 0, 20)>,
|
|
<NRF_PSEL(QSPI_IO0, 0, 23)>,
|
|
<NRF_PSEL(QSPI_IO1, 1, 0)>,
|
|
<NRF_PSEL(QSPI_IO2, 0, 22)>,
|
|
<NRF_PSEL(QSPI_IO3, 0, 21)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
|
|
spi2_default: spi2_default {
|
|
group1 {
|
|
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
|
|
<NRF_PSEL(SPIM_MOSI, 0, 23)>,
|
|
<NRF_PSEL(SPIM_MISO, 1, 0)>;
|
|
};
|
|
};
|
|
|
|
spi2_sleep: spi2_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
|
|
<NRF_PSEL(SPIM_MOSI, 0, 23)>,
|
|
<NRF_PSEL(SPIM_MISO, 1, 0)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
|
|
uart0_default: uart0_default {
|
|
group1 {
|
|
psels = <NRF_PSEL(UART_TX, 1, 12)>,
|
|
<NRF_PSEL(UART_RX, 1, 11)>;
|
|
};
|
|
};
|
|
|
|
uart0_sleep: uart0_sleep {
|
|
group1 {
|
|
psels = <NRF_PSEL(UART_TX, 1, 12)>,
|
|
<NRF_PSEL(UART_RX, 1, 11)>;
|
|
low-power-enable;
|
|
};
|
|
};
|
|
};
|